include/opcode/

	* aarch64.h (AARCH64_FEATURE_CRC): New macro.

opcodes/

	* aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros.
	(aarch64_feature_crc): New static.
	(CRC): New macro.
	(aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w,
	crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions.
	* aarch64-asm-2.c: Re-generate.
	* aarch64-dis-2.c: Ditto.
	* aarch64-opc-2.c: Ditto.

gas/

	* config/tc-aarch64.c (aarch64_features): Add the 'crc' option.

gas/testsuite/

	* gas/aarch64/crc32.s: New test.
	* gas/aarch64/crc32.d: Ditto.

5 files changed, 57 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3e2f60f..fe6741d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,9 @@
 2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
 
+	* config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
+
+2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
+
 	* config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
 	for system registers.
 
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 47c27fe..c10c723 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6991,6 +6991,7 @@ struct aarch64_option_cpu_value_table
 };
 
 static const struct aarch64_option_cpu_value_table aarch64_features[] = {
+  {"crc",		AARCH64_FEATURE (AARCH64_FEATURE_CRC, 0)},
   {"crypto",		AARCH64_FEATURE (AARCH64_FEATURE_CRYPTO, 0)},
   {"fp",		AARCH64_FEATURE (AARCH64_FEATURE_FP, 0)},
   {"simd",		AARCH64_FEATURE (AARCH64_FEATURE_SIMD, 0)},
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2cf4142..cb39336 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,10 @@
 2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
 
+	* gas/aarch64/crc32.s: New test.
+	* gas/aarch64/crc32.d: Ditto.
+
+2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
+
 	* gas/aarch64/illegal.l: Delete the error message for
 	msr S3_1_C13_C15_1,x7.
 	* gas/aarch64/sysreg.s: Add new tests.
diff --git a/gas/testsuite/gas/aarch64/crc32.d b/gas/testsuite/gas/aarch64/crc32.d
new file mode 100644
index 0000000..bba83b2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/crc32.d
@@ -0,0 +1,16 @@
+#objdump: -dr
+#as: -march=armv8-a+crc
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	1acf40e3 	crc32b	w3, w7, w15
+   4:	1ac345e7 	crc32h	w7, w15, w3
+   8:	1ac7486f 	crc32w	w15, w3, w7
+   c:	9acf4ce3 	crc32x	w3, w7, x15
+  10:	1acf50e3 	crc32cb	w3, w7, w15
+  14:	1ac355e7 	crc32ch	w7, w15, w3
+  18:	1ac7586f 	crc32cw	w15, w3, w7
+  1c:	9acf5ce3 	crc32cx	w3, w7, x15
diff --git a/gas/testsuite/gas/aarch64/crc32.s b/gas/testsuite/gas/aarch64/crc32.s
new file mode 100644
index 0000000..34d9d92
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/crc32.s
@@ -0,0 +1,31 @@
+/* crc32.s Test file for AArch64 CRC-32 and CRC-32C checksum instructions.
+
+   Copyright 2013 Free Software Foundation, Inc.
+   Contributed by ARM Ltd.
+
+   This file is part of GAS.
+
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the license, or
+   (at your option) any later version.
+
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; see the file COPYING3. If not,
+   see <http://www.gnu.org/licenses/>.  */
+
+
+	.text
+	crc32b	w3, w7, w15
+	crc32h	w7, w15, w3
+	crc32w	w15, w3, w7
+	crc32x	w3, w7, x15
+	crc32cb	w3, w7, w15
+	crc32ch	w7, w15, w3
+	crc32cw	w15, w3, w7
+	crc32cx	w3, w7, x15