Add files for ARM auto-IT patch

17 files changed, 349 insertions, 0 deletions

diff --git a/gas/testsuite/gas/arm/arm-it-auto-2.d b/gas/testsuite/gas/arm/arm-it-auto-2.d
new file mode 100644
index 0000000..fcdb507
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-auto-2.d
@@ -0,0 +1,15 @@
+#name: ARM IT automatic instruction generation 2
+#as: -mthumb -march=armv7a -mimplicit-it=always
+#objdump: -d --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+00000000 <.text> 3a40      	subs	r2, #64
+00000002 <.text\+0x2> bfa1      	itttt	ge
+00000004 <.text\+0x4> e8a0 500a 	stmiage.w	r0!, {r1, r3, ip, lr}
+00000008 <.text\+0x8> e8a0 500a 	stmiage.w	r0!, {r1, r3, ip, lr}
+0000000c <.text\+0xc> e8a0 500a 	stmiage.w	r0!, {r1, r3, ip, lr}
+00000010 <.text\+0x10> e8a0 500a 	stmiage.w	r0!, {r1, r3, ip, lr}
+00000014 <.text\+0x14> dcf4      	bgt.n	00000000 <.text>
diff --git a/gas/testsuite/gas/arm/arm-it-auto-2.s b/gas/testsuite/gas/arm/arm-it-auto-2.s
new file mode 100644
index 0000000..0026bc2
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-auto-2.s
@@ -0,0 +1,8 @@
+.syntax unified
+2:	subs	r2, r2, #64
+					@ IT generated automatically
+	stmge	r0!, {r1, r3, ip, lr}	@ 64 bytes at a time.
+	stmge	r0!, {r1, r3, ip, lr}
+	stmge	r0!, {r1, r3, ip, lr}
+	stmge	r0!, {r1, r3, ip, lr}
+	bgt	2b			@ This should not generate a new IT block
diff --git a/gas/testsuite/gas/arm/arm-it-auto-3.d b/gas/testsuite/gas/arm/arm-it-auto-3.d
new file mode 100644
index 0000000..c039895
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-auto-3.d
@@ -0,0 +1,15 @@
+#name: ARM IT automatic instruction generation 3
+#as: -mthumb -march=armv7a -mimplicit-it=always
+#objdump: -d --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+.*: +file format .*arm.*
+
+Disassembly of section .text.one:
+00000000 <.text.one> 2800      	cmp	r0, #0
+00000002 <.text.one\+0x2> bf08      	it	eq
+00000004 <.text.one\+0x4> 3102      	addeq	r1, #2
+
+Disassembly of section .text.two:
+00000000 <.text.two> bf08      	it	eq
+00000002 <.text.two\+0x2> 3103      	addeq	r1, #3
diff --git a/gas/testsuite/gas/arm/arm-it-auto-3.s b/gas/testsuite/gas/arm/arm-it-auto-3.s
new file mode 100644
index 0000000..d82e3a9
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-auto-3.s
@@ -0,0 +1,10 @@
+	.syntax unified
+	.thumb
+	.section .text.one
+	cmp	r0, #0
+	addeq	r1, #2
+	.data
+	.word	33
+	.section .text.two
+	addeq	r1, #3
+
diff --git a/gas/testsuite/gas/arm/arm-it-auto.d b/gas/testsuite/gas/arm/arm-it-auto.d
new file mode 100644
index 0000000..b2bfc32
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-auto.d
@@ -0,0 +1,81 @@
+#name: ARM IT automatic instruction generation
+#as: -mthumb -march=armv7 -mimplicit-it=always
+#objdump: -d --prefix-addresses --show-raw-insn
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+00000000 <main> f000 f821 	bl	00000046 <main\+0x46>
+00000004 <main\+0x4> f000 f80c 	bl	00000020 <main\+0x20>
+00000008 <main\+0x8> f000 f813 	bl	00000032 <main\+0x32>
+0000000c <main\+0xc> d142      	bne.n	00000094 <main\+0x94>
+0000000e <main\+0xe> bf18      	it	ne
+00000010 <main\+0x10> 4487      	addne	pc, r0
+00000012 <main\+0x12> bf18      	it	ne
+00000014 <main\+0x14> e8d0 f001 	tbbne	\[r0, r1\]
+00000018 <main\+0x18> bf08      	it	eq
+0000001a <main\+0x1a> e8d1 f010 	tbheq	\[r1, r0, lsl #1\]
+0000001e <main\+0x1e> bf0a      	itet	eq
+00000020 <main\+0x20> 2002      	moveq	r0, #2
+00000022 <main\+0x22> 2003      	movne	r0, #3
+00000024 <main\+0x24> 2004      	moveq	r0, #4
+00000026 <main\+0x26> bf16      	itet	ne
+00000028 <main\+0x28> 2002      	movne	r0, #2
+0000002a <main\+0x2a> 2003      	moveq	r0, #3
+0000002c <main\+0x2c> 2004      	movne	r0, #4
+0000002e <main\+0x2e> bf18      	it	ne
+00000030 <main\+0x30> 2001      	movne	r0, #1
+00000032 <main\+0x32> bf0c      	ite	eq
+00000034 <main\+0x34> 2002      	moveq	r0, #2
+00000036 <main\+0x36> f8d1 f000 	ldrne.w	pc, \[r1\]
+0000003a <main\+0x3a> bf18      	it	ne
+0000003c <main\+0x3c> f000 f82a 	blne	00000094 <main\+0x94>
+00000040 <main\+0x40> bfb8      	it	lt
+00000042 <main\+0x42> f000 f828 	bllt	00000096 <main\+0x96>
+00000046 <main\+0x46> bf17      	itett	ne
+00000048 <main\+0x48> 202d      	movne	r0, #45
+0000004a <main\+0x4a> 2005      	moveq	r0, #5
+0000004c <main\+0x4c> 2006      	movne	r0, #6
+0000004e <main\+0x4e> 4487      	addne	pc, r0
+00000050 <main\+0x50> bf0d      	iteet	eq
+00000052 <main\+0x52> 2007      	moveq	r0, #7
+00000054 <main\+0x54> 2008      	movne	r0, #8
+00000056 <main\+0x56> 2003      	movne	r0, #3
+00000058 <main\+0x58> 2004      	moveq	r0, #4
+0000005a <main\+0x5a> bf0b      	itete	eq
+0000005c <main\+0x5c> 2005      	moveq	r0, #5
+0000005e <main\+0x5e> 2006      	movne	r0, #6
+00000060 <main\+0x60> 2007      	moveq	r0, #7
+00000062 <main\+0x62> 2008      	movne	r0, #8
+00000064 <main\+0x64> bf0c      	ite	eq
+00000066 <main\+0x66> 2005      	moveq	r0, #5
+00000068 <main\+0x68> 2006      	movne	r0, #6
+0000006a <main\+0x6a> 4687      	mov	pc, r0
+0000006c <main\+0x6c> bf0b      	itete	eq
+0000006e <main\+0x6e> 2007      	moveq	r0, #7
+00000070 <main\+0x70> 2008      	movne	r0, #8
+00000072 <main\+0x72> 2005      	moveq	r0, #5
+00000074 <main\+0x74> 2006      	movne	r0, #6
+00000076 <main\+0x76> 4487      	add	pc, r0
+00000078 <main\+0x78> bf0c      	ite	eq
+0000007a <main\+0x7a> 2007      	moveq	r0, #7
+0000007c <main\+0x7c> 2008      	movne	r0, #8
+0000007e <main\+0x7e> bfcc      	ite	gt
+00000080 <main\+0x80> 2009      	movgt	r0, #9
+00000082 <main\+0x82> 200a      	movle	r0, #10
+00000084 <main\+0x84> bf08      	it	eq
+00000086 <main\+0x86> 200b      	moveq	r0, #11
+00000088 <main\+0x88> bfd8      	it	le
+0000008a <main\+0x8a> 200c      	movle	r0, #12
+0000008c <main\+0x8c> bf18      	it	ne
+0000008e <main\+0x8e> 200d      	movne	r0, #13
+00000090 <main\+0x90> f... f... 	bl	0000000. <f.*>
+00000094 <f\+0x94> bd10      	pop	{r4, pc}
+00000096 <f\+0x96> f... f... 	bl	0000000. <f.*>
+0000009a <f\+0x9a> bfb8      	it	lt
+0000009c <f\+0x9c> 2000      	movlt	r0, #0
+0000009e <f\+0x9e> 4348      	muls	r0, r1
+000000a0 <f\+0xa0> bfb8      	it	lt
+000000a2 <f\+0xa2> 2000      	movlt	r0, #0
+000000a4 <f\+0xa4> 4348      	muls	r0, r1
diff --git a/gas/testsuite/gas/arm/arm-it-auto.s b/gas/testsuite/gas/arm/arm-it-auto.s
new file mode 100644
index 0000000..b10a36e
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-auto.s
@@ -0,0 +1,110 @@
+	.syntax unified
+	.arch armv7
+	.thumb
+main:
+
+@These branches are to see the labels in the generated file
+	bl .L888
+	bl .L111
+	bl .L777
+
+@No IT block here:
+	bne .L4
+
+@The following groups should be an IT block each.
+@it ne
+	addne.n   pc, r0
+
+@it ne
+	tbbne [r0, r1]
+
+@it eq
+	tbheq [r1, r0]
+
+@The following group should be left as is:
+	itet	eq
+.L111:	moveq	r0, #2
+	movne   r0, #3
+	moveq   r0, #4
+
+@Same, reverted condition:
+	itet	ne
+	movne	r0, #2
+	moveq   r0, #3
+	movne   r0, #4
+
+
+@Two groups shall be generated, due to the label:
+    movne   r0, #1
+@ second group, the label should be at the IT insn
+.L777:	moveq	r0, #2
+	ldrne   pc, [r1]
+
+@it ne
+	blne .L4
+    
+@it lt
+	bllt .L9
+
+@itett ne
+.L888:	movne   r0, #45
+	moveq   r0, #5
+	movne	r0, #6
+	addne.n pc, r0
+
+@iteet eq
+	moveq   r0, #7
+	movne	r0, #8
+	movne   r0, #3
+	moveq	r0, #4
+
+@itete eq
+	moveq   r0, #5
+	movne	r0, #6
+	moveq   r0, #7
+	movne	r0, #8
+
+@ite eq - this group finishes due to the mov.n pc, rn
+	moveq   r0, #5
+	movne	r0, #6
+	mov.n   pc, r0
+
+@itete eq
+	moveq   r0, #7
+	movne	r0, #8
+	moveq   r0, #5
+	movne	r0, #6
+
+@this shall not generate an IT block
+	add.n   pc, r0
+
+@ite eq - testing condition change (eq -> gt)
+	moveq   r0, #7
+	movne	r0, #8
+
+@ite gt (group shall finish due to another condition change)
+	movgt	r0, #9
+	movle	r0, #10
+
+@it eq
+	moveq	r0, #11
+
+@it le
+	movle	r0, #12
+
+@it ne
+	movne	r0, #13
+
+	bl	f
+.L4:
+	pop	{r4, pc}
+.L9:
+	bl	f
+
+@Only the movlt shall be enclosed in the IT block
+movlt r0, #0
+muls r0, r0, r1
+
+@Same here:
+movlt r0, #0
+muls r0, r0, r1
diff --git a/gas/testsuite/gas/arm/arm-it-bad-2.d b/gas/testsuite/gas/arm/arm-it-bad-2.d
new file mode 100644
index 0000000..2a644a3
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad-2.d
@@ -0,0 +1,4 @@
+#name: Test unclosed IT block validation.
+#as: -march=armv7a
+#skip: *-*-*aout* *-*-pe
+#error-output: arm-it-bad-2.l
diff --git a/gas/testsuite/gas/arm/arm-it-bad-2.l b/gas/testsuite/gas/arm/arm-it-bad-2.l
new file mode 100644
index 0000000..3414ef7
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad-2.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:9: Warning: section '.text' finished with an open IT block.
+[^:]*:9: Warning: section 'second' finished with an open IT block.
diff --git a/gas/testsuite/gas/arm/arm-it-bad-2.s b/gas/testsuite/gas/arm/arm-it-bad-2.s
new file mode 100644
index 0000000..477975e
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad-2.s
@@ -0,0 +1,9 @@
+        .syntax unified
+        .text
+        cmp     r0, #0
+        itt     eq
+        moveq   r0, r1
+.section second
+	itt ne
+	movne r0, r1
+
diff --git a/gas/testsuite/gas/arm/arm-it-bad-3.d b/gas/testsuite/gas/arm/arm-it-bad-3.d
new file mode 100644
index 0000000..75e84b4
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad-3.d
@@ -0,0 +1,3 @@
+#name: Test automatic IT generation in Thumb-1 architectures.
+#as: -mimplicit-it=always
+#error-output: arm-it-bad-3.l
diff --git a/gas/testsuite/gas/arm/arm-it-bad-3.l b/gas/testsuite/gas/arm/arm-it-bad-3.l
new file mode 100644
index 0000000..7bb20d1
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad-3.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:4: Error: thumb conditional instruction should be in IT block -- `moveq r1,r8'
+[^:]*:5: Error: thumb conditional instruction should be in IT block -- `movne r1,r9'
diff --git a/gas/testsuite/gas/arm/arm-it-bad-3.s b/gas/testsuite/gas/arm/arm-it-bad-3.s
new file mode 100644
index 0000000..5e4c21e
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad-3.s
@@ -0,0 +1,6 @@
+.syntax unified
+.arch armv6
+.thumb
+moveq   r1, r8
+movne   r1, r9
+
diff --git a/gas/testsuite/gas/arm/arm-it-bad.d b/gas/testsuite/gas/arm/arm-it-bad.d
new file mode 100644
index 0000000..9b160cf
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad.d
@@ -0,0 +1,3 @@
+#name: Test IT block validation in ARM mode.
+#as: -march=armv7a -mimplicit-it=never
+#error-output: arm-it-bad.l
diff --git a/gas/testsuite/gas/arm/arm-it-bad.l b/gas/testsuite/gas/arm/arm-it-bad.l
new file mode 100644
index 0000000..2ba5253
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad.l
@@ -0,0 +1,3 @@
+[^:]*: Assembler messages:
+[^:]*:8: Error: incorrect condition in IT block -- `moveq r0,r1'
+[^:]*:10: Warning: conditional outside an IT block for Thumb.
diff --git a/gas/testsuite/gas/arm/arm-it-bad.s b/gas/testsuite/gas/arm/arm-it-bad.s
new file mode 100644
index 0000000..fe79938
--- /dev/null
+++ b/gas/testsuite/gas/arm/arm-it-bad.s
@@ -0,0 +1,10 @@
+	.syntax unified
+	.text
+	.global x
+x:
+	mov	r0, r1
+	cmp	r0, #0
+	it	ne
+	moveq	r0, r1
+	bx	lr
+	movgt	r1, r2
diff --git a/gas/testsuite/gas/arm/thumb2_it_auto.d b/gas/testsuite/gas/arm/thumb2_it_auto.d
new file mode 100644
index 0000000..c3fdbc2
--- /dev/null
+++ b/gas/testsuite/gas/arm/thumb2_it_auto.d
@@ -0,0 +1,62 @@
+# name: Mixed 16 and 32-bit Thumb conditional instructions
+# as: -march=armv6kt2 -mimplicit-it=always
+#skip: *-*-*aout*
+# source: thumb2_it.s
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0+000 <[^>]+> bf05      	ittet	eq
+0+002 <[^>]+> 1880      	addeq	r0, r0, r2
+0+004 <[^>]+> 4440      	addeq	r0, r8
+0+006 <[^>]+> 1888      	addne	r0, r1, r2
+0+008 <[^>]+> eb11 0002 	addseq.w	r0, r1, r2
+0+00c <[^>]+> 4410      	add	r0, r2
+0+00e <[^>]+> 4440      	add	r0, r8
+0+010 <[^>]+> 1880      	adds	r0, r0, r2
+0+012 <[^>]+> eb10 0008 	adds.w	r0, r0, r8
+0+016 <[^>]+> 1888      	adds	r0, r1, r2
+0+018 <[^>]+> bf0a      	itet	eq
+0+01a <[^>]+> 4310      	orreq	r0, r2
+0+01c <[^>]+> ea40 0008 	orrne.w	r0, r0, r8
+0+020 <[^>]+> ea50 0002 	orrseq.w	r0, r0, r2
+0+024 <[^>]+> ea40 0002 	orr.w	r0, r0, r2
+0+028 <[^>]+> ea40 0008 	orr.w	r0, r0, r8
+0+02c <[^>]+> 4310      	orrs	r0, r2
+0+02e <[^>]+> bf01      	itttt	eq
+0+030 <[^>]+> 4090      	lsleq	r0, r2
+0+032 <[^>]+> fa00 f008 	lsleq.w	r0, r0, r8
+0+036 <[^>]+> fa01 f002 	lsleq.w	r0, r1, r2
+0+03a <[^>]+> fa10 f002 	lslseq.w	r0, r0, r2
+0+03e <[^>]+> bf02      	ittt	eq
+0+040 <[^>]+> 0048      	lsleq	r0, r1, #1
+0+042 <[^>]+> ea4f 0048 	moveq.w	r0, r8, lsl #1
+0+046 <[^>]+> ea5f 0040 	movseq.w	r0, r0, lsl #1
+0+04a <[^>]+> fa00 f002 	lsl.w	r0, r0, r2
+0+04e <[^>]+> 4090      	lsls	r0, r2
+0+050 <[^>]+> ea4f 0041 	mov.w	r0, r1, lsl #1
+0+054 <[^>]+> 0048      	lsls	r0, r1, #1
+0+056 <[^>]+> bf01      	itttt	eq
+0+058 <[^>]+> 4288      	cmpeq	r0, r1
+0+05a <[^>]+> 4540      	cmpeq	r0, r8
+0+05c <[^>]+> 4608      	moveq	r0, r1
+0+05e <[^>]+> ea5f 0001 	movseq.w	r0, r1
+0+062 <[^>]+> bf08      	it	eq
+0+064 <[^>]+> 4640      	moveq	r0, r8
+0+066 <[^>]+> 4608      	mov	r0, r1
+0+068 <[^>]+> 1c08      	adds	r0, r1, #0
+0+06a <[^>]+> ea5f 0008 	movs.w	r0, r8
+0+06e <[^>]+> bf01      	itttt	eq
+0+070 <[^>]+> 43c8      	mvneq	r0, r1
+0+072 <[^>]+> ea6f 0008 	mvneq.w	r0, r8
+0+076 <[^>]+> ea7f 0001 	mvnseq.w	r0, r1
+0+07a <[^>]+> 42c8      	cmneq	r0, r1
+0+07c <[^>]+> ea6f 0001 	mvn.w	r0, r1
+0+080 <[^>]+> 43c8      	mvns	r0, r1
+0+082 <[^>]+> bf02      	ittt	eq
+0+084 <[^>]+> 4248      	negeq	r0, r1
+0+086 <[^>]+> f1c8 0000 	rsbeq	r0, r8, #0	; 0x0
+0+08a <[^>]+> f1d1 0000 	rsbseq	r0, r1, #0	; 0x0
+0+08e <[^>]+> f1c1 0000 	rsb	r0, r1, #0	; 0x0
+0+092 <[^>]+> 4248      	negs	r0, r1
diff --git a/gas/testsuite/gas/arm/thumb2_it_bad_auto.d b/gas/testsuite/gas/arm/thumb2_it_bad_auto.d
new file mode 100644
index 0000000..7274311
--- /dev/null
+++ b/gas/testsuite/gas/arm/thumb2_it_bad_auto.d
@@ -0,0 +1,4 @@
+#name: Invalid IT instructions
+#as: -mimplicit-it=always
+#source: thumb2_it_bad.s
+#error-output: thumb2_it_bad.l