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authorMike Frysinger <vapier@gentoo.org>2011-03-29 05:44:56 +0000
committerMike Frysinger <vapier@gentoo.org>2011-03-29 05:44:56 +0000
commit0be99d4ba6c89dca6bbee981c7b89d506f344a40 (patch)
tree4b130dba7e507d24f9a4b86e2c8c6ee14e83b1a4 /gas
parentc3a7b1206d72edcfeb965fdbd6cfd0c9d0100eba (diff)
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gas: blackfin: gas: blackfin: reject invalid BYTEOP16P insns
The destination registers must be different with BYTEOP16P insns, otherwise the hardware throws up an exception. So reject them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/bfin-parse.y2
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/bfin/expected_errors.l2
-rw-r--r--gas/testsuite/gas/bfin/expected_errors.s3
5 files changed, 17 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index fe0c466..428d266 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * config/bfin-parse.y (BYTEOP16P): Return yyerror when dest
+ reg $2 is the same as dest reg $4.
+
2011-03-28 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (16bit acc add): Return yyerror when dest
diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index fa81a61..12e7525 100644
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -831,6 +831,8 @@ asm_1:
{
if (!IS_DREG ($2) || !IS_DREG ($4))
return yyerror ("Dregs expected");
+ else if (REG_SAME ($2, $4))
+ return yyerror ("Illegal dest register combination");
else if (!valid_dreg_pair (&$9, $11))
return yyerror ("Bad dreg pair");
else if (!valid_dreg_pair (&$13, $15))
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index b4bdca1..2472627 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-29 Mike Frysinger <vapier@gentoo.org>
+
+ * gas/bfin/expected_errors.s: Add invalid BYTEOP16P insn tests.
+ * gas/bfin/expected_errors.l: Add new error messages.
+
2011-03-28 Mike Frysinger <vapier@gentoo.org>
* gas/bfin/expected_errors.s: Add invalid 16bit acc add insn tests.
diff --git a/gas/testsuite/gas/bfin/expected_errors.l b/gas/testsuite/gas/bfin/expected_errors.l
index 2f746db..216c8e1 100644
--- a/gas/testsuite/gas/bfin/expected_errors.l
+++ b/gas/testsuite/gas/bfin/expected_errors.l
@@ -101,3 +101,5 @@
.*:127: Error: Differing source registers.
.*:129: Error: Register mismatch.
.*:131: Error: Illegal dest register combination. Input text was A0.H.
+.*:133: Error: Illegal dest register combination.
+.*:134: Error: Illegal dest register combination.
diff --git a/gas/testsuite/gas/bfin/expected_errors.s b/gas/testsuite/gas/bfin/expected_errors.s
index f6e3f6f..677103c 100644
--- a/gas/testsuite/gas/bfin/expected_errors.s
+++ b/gas/testsuite/gas/bfin/expected_errors.s
@@ -129,3 +129,6 @@
R0 = R3 + R4, R1 = R5 - R6;
R7 = A1.L + A1.H, R7 = A0.L + A0.H;
+
+ (R0, R0) = BYTEOP16P (R1:0, R3:2);
+ (R7, R7) = BYTEOP16P (R1:0, R3:2);