x86: adjust {,E}VEX.W handling outside of 64-bit mode

Many VEX-/EVEX-encoded instructions accessing GPRs become WIG outside of
64-bit mode. The respective templates should specify neither VexWIG nor
VexW0, but instead the setting of the bit should be determined from
- REX.W in 64-bit mode,
- the setting established through -mvexwig= / -mevexwig= otherwise.
This implies that the evex-wig2 testcase needs to go away, as being
wrong altogether.

A few test additions desirable here will only happen in later patches,
as the disassembler needs adjustments first.

Once again SSE2AVX templates are left alone, for it being unclear what
the behavior there should be.

13 files changed, 241 insertions, 31 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c412458..eb71ac3 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,25 @@
 2018-11-06  Jan Beulich  <jbeulich@suse.com>
 
+	* config/tc-i386.c (build_vex_prefix, build_evex_prefix):
+	Consider execution mode when .vexw is not set.
+	* testsuite/gas/i386/avx-wig.s,
+	testsuite/gas/i386/x86-64-avx-wig.s: Add BMI, BMI2, TBM, LWP,
+	vcvtsi2s*, vcvt*2si, vmovd, vpcmpestr*, vpextrd, and vpinsrd
+	cases.
+	* testsuite/gas/i386/evex-wig.s: Add vcvt*si2s*, vcvt*2*si,
+	vextractps, vpextrb, vpextrw, vpinsrb, and vpinsrw cases.
+	* testsuite/gas/i386/x86-64-evex-wig.s: Add vpextrb, vpextrw,
+	vpinsrb, and vpinsrw cases.
+	* testsuite/gas/i386/avx-wig.d, testsuite/gas/i386/evex-wig.d,
+	testsuite/gas/i386/evex-wig1-intel.d,
+	testsuite/gas/i386/x86-64-evex-wig1.d,
+	testsuite/gas/i386/x86-64-evex-wig1-intel.d: Adjust expectations.
+	* testsuite/gas/i386/evex-wig2.d,
+	testsuite/gas/i386/evex-wig2.s: Delete.
+	* testsuite/gas/i386/i386.exp: Drop deleted test.
+
+2018-11-06  Jan Beulich  <jbeulich@suse.com>
+
 	* testsuite/gas/i386/evex-lig-2.s,
 	testsuite/gas/i386/x86-64-evex-lig-2.s: Add extract and insert
 	cases.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 7d4ffc8..4fe9f0d 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3453,7 +3453,7 @@ build_vex_prefix (const insn_template *t)
   else if (i.tm.opcode_modifier.vexw)
     w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
   else
-    w = (i.rex & REX_W) ? 1 : 0;
+    w = (flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1) ? 1 : 0;
 
   /* Use 2-byte VEX prefix if possible.  */
   if (w == 0
@@ -3646,7 +3646,7 @@ build_evex_prefix (void)
   else if (i.tm.opcode_modifier.vexw)
     w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0;
   else
-    w = (i.rex & REX_W) ? 1 : 0;
+    w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0;
 
   /* Encode the U bit.  */
   implied_prefix |= 0x4;
diff --git a/gas/testsuite/gas/i386/avx-wig.d b/gas/testsuite/gas/i386/avx-wig.d
index c36dc65..7063ad3 100644
--- a/gas/testsuite/gas/i386/avx-wig.d
+++ b/gas/testsuite/gas/i386/avx-wig.d
@@ -8,6 +8,33 @@
 Disassembly of section .text:
 
 0+ <_start>:
+ +[a-f0-9]+:	c4 e2 f8 f2 00       	andn   \(%eax\),%eax,%eax
+ +[a-f0-9]+:	c4 e2 f8 f7 00       	bextr  %eax,\(%eax\),%eax
+ +[a-f0-9]+:	8f ea f8 10 00 00 00 00 00 	bextr  \$0x0,\(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 01 08       	blcfill \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 02 30       	blci   \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 01 28       	blcic  \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 02 08       	blcmsk \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 01 18       	blcs   \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 01 10       	blsfill \(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 f8 f3 18       	blsi   \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 01 30       	blsic  \(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 f8 f3 10       	blsmsk \(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 f8 f3 08       	blsr   \(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 f8 f5 00       	bzhi   %eax,\(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 12 c0       	llwpcb %eax
+ +[a-f0-9]+:	8f ea f8 12 00 00 00 00 00 	lwpins \$0x0,\(%eax\),%eax
+ +[a-f0-9]+:	8f ea f8 12 08 00 00 00 00 	lwpval \$0x0,\(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 fb f6 00       	mulx   \(%eax\),%eax,%eax
+ +[a-f0-9]+:	c4 e2 fb f5 00       	pdep   \(%eax\),%eax,%eax
+ +[a-f0-9]+:	c4 e2 fa f5 00       	pext   \(%eax\),%eax,%eax
+ +[a-f0-9]+:	c4 e3 fb f0 00 00    	rorx   \$0x0,\(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 fa f7 00       	sarx   %eax,\(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 f9 f7 00       	shlx   %eax,\(%eax\),%eax
+ +[a-f0-9]+:	c4 e2 fb f7 00       	shrx   %eax,\(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 12 c8       	slwpcb %eax
+ +[a-f0-9]+:	8f e9 f8 01 38       	t1mskc \(%eax\),%eax
+ +[a-f0-9]+:	8f e9 f8 01 20       	tzmsk  \(%eax\),%eax
  +[a-f0-9]+:	c4 e1 cd 58 d4       	vaddpd %ymm4,%ymm6,%ymm2
  +[a-f0-9]+:	c4 e1 cc 58 d4       	vaddps %ymm4,%ymm6,%ymm2
  +[a-f0-9]+:	c4 e1 cb 58 d4       	vaddsd %xmm4,%xmm6,%xmm2
@@ -47,11 +74,19 @@ Disassembly of section .text:
  +[a-f0-9]+:	c4 e1 fd 5b f4       	vcvtps2dq %ymm4,%ymm6
  +[a-f0-9]+:	c4 e1 fc 5a e4       	vcvtps2pd %xmm4,%ymm4
  +[a-f0-9]+:	c4 e1 cb 5a d4       	vcvtsd2ss %xmm4,%xmm6,%xmm2
+ +[a-f0-9]+:	c4 e1 fa 2a c0       	vcvtsi2ss %eax,%xmm0,%xmm0
+ +[a-f0-9]+:	c4 e1 fa 2a 00       	vcvtsi2ssl? \(%eax\),%xmm0,%xmm0
+ +[a-f0-9]+:	c4 e1 fb 2a c0       	vcvtsi2sd %eax,%xmm0,%xmm0
+ +[a-f0-9]+:	c4 e1 fb 2a 00       	vcvtsi2sdl? \(%eax\),%xmm0,%xmm0
  +[a-f0-9]+:	c4 e1 ca 5a d4       	vcvtss2sd %xmm4,%xmm6,%xmm2
+ +[a-f0-9]+:	c4 e1 fa 2d c0       	vcvtss2si %xmm0,%eax
+ +[a-f0-9]+:	c4 e1 fb 2d c0       	vcvtsd2si %xmm0,%eax
  +[a-f0-9]+:	c4 e1 fd e6 e4       	vcvttpd2dq %ymm4,%xmm4
  +[a-f0-9]+:	c4 e1 f9 e6 f4       	vcvttpd2dq %xmm4,%xmm6
  +[a-f0-9]+:	c4 e1 fd e6 e4       	vcvttpd2dq %ymm4,%xmm4
  +[a-f0-9]+:	c4 e1 fe 5b f4       	vcvttps2dq %ymm4,%ymm6
+ +[a-f0-9]+:	c4 e1 fa 2c c0       	vcvttss2si %xmm0,%eax
+ +[a-f0-9]+:	c4 e1 fb 2c c0       	vcvttsd2si %xmm0,%eax
  +[a-f0-9]+:	c4 e1 cd 5e d4       	vdivpd %ymm4,%ymm6,%ymm2
  +[a-f0-9]+:	c4 e1 cc 5e d4       	vdivps %ymm4,%ymm6,%ymm2
  +[a-f0-9]+:	c4 e1 cb 5e d4       	vdivsd %xmm4,%xmm6,%xmm2
@@ -79,6 +114,10 @@ Disassembly of section .text:
  +[a-f0-9]+:	c4 e1 fc 28 f4       	vmovaps %ymm4,%ymm6
  +[a-f0-9]+:	c4 e1 fd 29 e6       	vmovapd %ymm4,%ymm6
  +[a-f0-9]+:	c4 e1 fc 29 e6       	vmovaps %ymm4,%ymm6
+ +[a-f0-9]+:	c4 e1 f9 6e c0       	vmovd  %eax,%xmm0
+ +[a-f0-9]+:	c4 e1 f9 6e 00       	vmovd  \(%eax\),%xmm0
+ +[a-f0-9]+:	c4 e1 f9 7e c0       	vmovd  %xmm0,%eax
+ +[a-f0-9]+:	c4 e1 f9 7e 00       	vmovd  %xmm0,\(%eax\)
  +[a-f0-9]+:	c4 e1 ff 12 f4       	vmovddup %ymm4,%ymm6
  +[a-f0-9]+:	c4 e1 fd 6f f4       	vmovdqa %ymm4,%ymm6
  +[a-f0-9]+:	c4 e1 fe 6f f4       	vmovdqu %ymm4,%ymm6
@@ -149,12 +188,16 @@ Disassembly of section .text:
  +[a-f0-9]+:	c4 e1 c9 76 d4       	vpcmpeqd %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 29 d4       	vpcmpeqq %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e1 c9 75 d4       	vpcmpeqw %xmm4,%xmm6,%xmm2
+ +[a-f0-9]+:	c4 e3 f9 61 c0 00    	vpcmpestri \$0x0,%xmm0,%xmm0
+ +[a-f0-9]+:	c4 e3 f9 60 c0 00    	vpcmpestrm \$0x0,%xmm0,%xmm0
  +[a-f0-9]+:	c4 e1 c9 64 d4       	vpcmpgtb %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e1 c9 66 d4       	vpcmpgtd %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 37 d4       	vpcmpgtq %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e1 c9 65 d4       	vpcmpgtw %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e3 f9 63 f4 07    	vpcmpistri \$0x7,%xmm4,%xmm6
  +[a-f0-9]+:	c4 e3 f9 62 f4 07    	vpcmpistrm \$0x7,%xmm4,%xmm6
+ +[a-f0-9]+:	c4 e3 f9 16 c0 00    	vpextrd \$0x0,%xmm0,%eax
+ +[a-f0-9]+:	c4 e3 f9 16 00 00    	vpextrd \$0x0,%xmm0,\(%eax\)
  +[a-f0-9]+:	c4 e2 c9 02 d4       	vphaddd %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 03 d4       	vphaddsw %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 01 d4       	vphaddw %xmm4,%xmm6,%xmm2
@@ -162,6 +205,8 @@ Disassembly of section .text:
  +[a-f0-9]+:	c4 e2 c9 06 d4       	vphsubd %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 07 d4       	vphsubsw %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 05 d4       	vphsubw %xmm4,%xmm6,%xmm2
+ +[a-f0-9]+:	c4 e3 f9 22 c0 00    	vpinsrd \$0x0,%eax,%xmm0,%xmm0
+ +[a-f0-9]+:	c4 e3 f9 22 00 00    	vpinsrd \$0x0,\(%eax\),%xmm0,%xmm0
  +[a-f0-9]+:	c4 e2 c9 04 d4       	vpmaddubsw %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e1 c9 f5 d4       	vpmaddwd %xmm4,%xmm6,%xmm2
  +[a-f0-9]+:	c4 e2 c9 3c d4       	vpmaxsb %xmm4,%xmm6,%xmm2
diff --git a/gas/testsuite/gas/i386/avx-wig.s b/gas/testsuite/gas/i386/avx-wig.s
index 9af865b..828099f 100644
--- a/gas/testsuite/gas/i386/avx-wig.s
+++ b/gas/testsuite/gas/i386/avx-wig.s
@@ -3,6 +3,33 @@
 	.allow_index_reg
 	.text
 _start:
+	andn (%eax), %eax, %eax
+	bextr %eax, (%eax), %eax
+	bextr $0, (%eax), %eax
+	blcfill (%eax), %eax
+	blci (%eax), %eax
+	blcic (%eax), %eax
+	blcmsk (%eax), %eax
+	blcs (%eax), %eax
+	blsfill (%eax), %eax
+	blsi (%eax), %eax
+	blsic (%eax), %eax
+	blsmsk (%eax), %eax
+	blsr (%eax), %eax
+	bzhi %eax, (%eax), %eax
+	llwpcb %eax
+	lwpins $0, (%eax), %eax
+	lwpval $0, (%eax), %eax
+	mulx (%eax), %eax, %eax
+	pdep (%eax), %eax, %eax
+	pext (%eax), %eax, %eax
+	rorx $0, (%eax), %eax
+	sarx %eax, (%eax), %eax
+	shlx %eax, (%eax), %eax
+	shrx %eax, (%eax), %eax
+	slwpcb %eax
+	t1mskc (%eax), %eax
+	tzmsk (%eax), %eax
 	vaddpd %ymm4,%ymm6,%ymm2
 	vaddps %ymm4,%ymm6,%ymm2
 	vaddsd %xmm4,%xmm6,%xmm2
@@ -42,11 +69,19 @@ _start:
 	vcvtps2dq %ymm4,%ymm6
 	vcvtps2pd %xmm4,%ymm4
 	vcvtsd2ss %xmm4,%xmm6,%xmm2
+	vcvtsi2ss %eax, %xmm0, %xmm0
+	vcvtsi2ss (%eax), %xmm0, %xmm0
+	vcvtsi2sd %eax, %xmm0, %xmm0
+	vcvtsi2sd (%eax), %xmm0, %xmm0
 	vcvtss2sd %xmm4,%xmm6,%xmm2
+	vcvtss2si %xmm0, %eax
+	vcvtsd2si %xmm0, %eax
 	vcvttpd2dqy %ymm4,%xmm4
 	vcvttpd2dqx %xmm4,%xmm6
 	vcvttpd2dqy %ymm4,%xmm4
 	vcvttps2dq %ymm4,%ymm6
+	vcvttss2si %xmm0, %eax
+	vcvttsd2si %xmm0, %eax
 	vdivpd %ymm4,%ymm6,%ymm2
 	vdivps %ymm4,%ymm6,%ymm2
 	vdivsd %xmm4,%xmm6,%xmm2
@@ -74,6 +109,10 @@ _start:
 	vmovaps %ymm4,%ymm6
 	{store} vmovapd %ymm4,%ymm6
 	{store} vmovaps %ymm4,%ymm6
+	vmovd %eax, %xmm0
+	vmovd (%eax), %xmm0
+	vmovd %xmm0, %eax
+	vmovd %xmm0, (%eax)
 	vmovddup %ymm4,%ymm6
 	vmovdqa %ymm4,%ymm6
 	vmovdqu %ymm4,%ymm6
@@ -144,12 +183,16 @@ _start:
 	vpcmpeqd %xmm4,%xmm6,%xmm2
 	vpcmpeqq %xmm4,%xmm6,%xmm2
 	vpcmpeqw %xmm4,%xmm6,%xmm2
+	vpcmpestri $0, %xmm0, %xmm0
+	vpcmpestrm $0, %xmm0, %xmm0
 	vpcmpgtb %xmm4,%xmm6,%xmm2
 	vpcmpgtd %xmm4,%xmm6,%xmm2
 	vpcmpgtq %xmm4,%xmm6,%xmm2
 	vpcmpgtw %xmm4,%xmm6,%xmm2
 	vpcmpistri $7,%xmm4,%xmm6
 	vpcmpistrm $7,%xmm4,%xmm6
+	vpextrd $0, %xmm0, %eax
+	vpextrd $0, %xmm0, (%eax)
 	vphaddd %xmm4,%xmm6,%xmm2
 	vphaddsw %xmm4,%xmm6,%xmm2
 	vphaddw %xmm4,%xmm6,%xmm2
@@ -157,6 +200,8 @@ _start:
 	vphsubd %xmm4,%xmm6,%xmm2
 	vphsubsw %xmm4,%xmm6,%xmm2
 	vphsubw %xmm4,%xmm6,%xmm2
+	vpinsrd $0, %eax, %xmm0, %xmm0
+	vpinsrd $0, (%eax), %xmm0, %xmm0
 	vpmaddubsw %xmm4,%xmm6,%xmm2
 	vpmaddwd %xmm4,%xmm6,%xmm2
 	vpmaxsb %xmm4,%xmm6,%xmm2
diff --git a/gas/testsuite/gas/i386/evex-wig.s b/gas/testsuite/gas/i386/evex-wig.s
index 9f06a7a..42369f5 100644
--- a/gas/testsuite/gas/i386/evex-wig.s
+++ b/gas/testsuite/gas/i386/evex-wig.s
@@ -4,6 +4,50 @@
 	.text
 _start:
 
+	{evex} vcvtsi2ss %eax, %xmm0, %xmm0
+	{evex} vcvtsi2ss 4(%eax), %xmm0, %xmm0
+
+	{evex} vcvtsi2sd %eax, %xmm0, %xmm0
+	{evex} vcvtsi2sd 4(%eax), %xmm0, %xmm0
+
+	{evex} vcvtss2si %xmm0, %eax
+
+	{evex} vcvtsd2si %xmm0, %eax
+
+	{evex} vcvttss2si %xmm0, %eax
+
+	{evex} vcvttsd2si %xmm0, %eax
+
+	vcvtusi2ss %eax, %xmm0, %xmm0
+	vcvtusi2ss 4(%eax), %xmm0, %xmm0
+
+	vcvtusi2sd %eax, %xmm0, %xmm0
+	vcvtusi2sd 4(%eax), %xmm0, %xmm0
+
+	vcvtss2usi %xmm0, %eax
+
+	vcvtsd2usi %xmm0, %eax
+
+	vcvttss2usi %xmm0, %eax
+
+	vcvttsd2usi %xmm0, %eax
+
+	{evex} vextractps $0, %xmm0, %eax
+	{evex} vextractps $0, %xmm0, 4(%eax)
+
+	{evex} vpextrb $0, %xmm0, %eax
+	{evex} vpextrb $0, %xmm0, 1(%eax)
+
+	{evex} vpextrw $0, %xmm0, %eax
+	{evex} {store} vpextrw $0, %xmm0, %eax
+	{evex} vpextrw $0, %xmm0, 2(%eax)
+
+	{evex} vpinsrb $0, %eax, %xmm0, %xmm0
+	{evex} vpinsrb $0, 1(%eax), %xmm0, %xmm0
+
+	{evex} vpinsrw $0, %eax, %xmm0, %xmm0
+	{evex} vpinsrw $0, 2(%eax), %xmm0, %xmm0
+
 	vpmovsxbd	%xmm5, %zmm6{%k7}	 # AVX512
 	vpmovsxbd	%xmm5, %zmm6{%k7}{z}	 # AVX512
 	vpmovsxbd	(%ecx), %zmm6{%k7}	 # AVX512
diff --git a/gas/testsuite/gas/i386/evex-wig1-intel.d b/gas/testsuite/gas/i386/evex-wig1-intel.d
index 65942ea..12cde27 100644
--- a/gas/testsuite/gas/i386/evex-wig1-intel.d
+++ b/gas/testsuite/gas/i386/evex-wig1-intel.d
@@ -9,6 +9,33 @@
 Disassembly of section .text:
 
 0+ <_start>:
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2a c0    	vcvtsi2ss xmm0,xmm0,eax
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2a 40 01 	vcvtsi2ss xmm0,xmm0,DWORD PTR \[eax\+0x4\]
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2a c0    	vcvtsi2sd xmm0,xmm0,eax
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2a 40 01 	vcvtsi2sd xmm0,xmm0,DWORD PTR \[eax\+0x4\]
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2d c0    	vcvtss2si eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2d c0    	vcvtsd2si eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2c c0    	vcvttss2si eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2c c0    	vcvttsd2si eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 7b c0    	vcvtusi2ss xmm0,xmm0,eax
+[ 	]*[a-f0-9]+:	62 f1 fe 08 7b 40 01 	vcvtusi2ss xmm0,xmm0,DWORD PTR \[eax\+0x4\]
+[ 	]*[a-f0-9]+:	62 f1 ff 08 7b c0    	vcvtusi2sd xmm0,xmm0,eax
+[ 	]*[a-f0-9]+:	62 f1 ff 08 7b 40 01 	vcvtusi2sd xmm0,xmm0,DWORD PTR \[eax\+0x4\]
+[ 	]*[a-f0-9]+:	62 f1 fe 08 79 c0    	vcvtss2usi eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 79 c0    	vcvtsd2usi eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 78 c0    	vcvttss2usi eax,xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 78 c0    	vcvttsd2usi eax,xmm0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 17 c0 00 	vextractps eax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 17 40 01 00 	vextractps DWORD PTR \[eax\+0x4\],xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 c0 00 	vpextrb eax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 40 01 00 	vpextrb BYTE PTR \[eax\+0x1\],xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c5 c0 00 	vpextrw eax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 c0 00 	vpextrw eax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 40 01 00 	vpextrw WORD PTR \[eax\+0x2\],xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 c0 00 	vpinsrb xmm0,xmm0,eax,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 40 01 00 	vpinsrb xmm0,xmm0,BYTE PTR \[eax\+0x1\],0x0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 c0 00 	vpinsrw xmm0,xmm0,eax,0x0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 40 01 00 	vpinsrw xmm0,xmm0,WORD PTR \[eax\+0x2\],0x0
 [ 	]*[a-f0-9]+:	62 f2 fd 4f 21 f5    	vpmovsxbd zmm6\{k7\},xmm5
 [ 	]*[a-f0-9]+:	62 f2 fd cf 21 f5    	vpmovsxbd zmm6\{k7\}\{z\},xmm5
 [ 	]*[a-f0-9]+:	62 f2 fd 4f 21 31    	vpmovsxbd zmm6\{k7\},XMMWORD PTR \[ecx\]
diff --git a/gas/testsuite/gas/i386/evex-wig1.d b/gas/testsuite/gas/i386/evex-wig1.d
index b55754e..beb269e 100644
--- a/gas/testsuite/gas/i386/evex-wig1.d
+++ b/gas/testsuite/gas/i386/evex-wig1.d
@@ -9,6 +9,33 @@
 Disassembly of section .text:
 
 0+ <_start>:
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2a c0    	vcvtsi2ss %eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2a 40 01 	vcvtsi2ssl 0x4\(%eax\),%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2a c0    	vcvtsi2sd %eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2a 40 01 	vcvtsi2sdl 0x4\(%eax\),%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2d c0    	vcvtss2si %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2d c0    	vcvtsd2si %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 fe 08 2c c0    	vcvttss2si %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 ff 08 2c c0    	vcvttsd2si %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 fe 08 7b c0    	vcvtusi2ss %eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 7b 40 01 	vcvtusi2ssl 0x4\(%eax\),%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 7b c0    	vcvtusi2sd %eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 ff 08 7b 40 01 	vcvtusi2sdl 0x4\(%eax\),%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fe 08 79 c0    	vcvtss2usi %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 ff 08 79 c0    	vcvtsd2usi %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 fe 08 78 c0    	vcvttss2usi %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f1 ff 08 78 c0    	vcvttsd2usi %xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 17 c0 00 	vextractps \$0x0,%xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 17 40 01 00 	vextractps \$0x0,%xmm0,0x4\(%eax\)
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 c0 00 	vpextrb \$0x0,%xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 40 01 00 	vpextrb \$0x0,%xmm0,0x1\(%eax\)
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c5 c0 00 	vpextrw \$0x0,%xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 c0 00 	vpextrw \$0x0,%xmm0,%eax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 40 01 00 	vpextrw \$0x0,%xmm0,0x2\(%eax\)
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 c0 00 	vpinsrb \$0x0,%eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 40 01 00 	vpinsrb \$0x0,0x1\(%eax\),%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 c0 00 	vpinsrw \$0x0,%eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 40 01 00 	vpinsrw \$0x0,0x2\(%eax\),%xmm0,%xmm0
 [ 	]*[a-f0-9]+:	62 f2 fd 4f 21 f5    	vpmovsxbd %xmm5,%zmm6\{%k7\}
 [ 	]*[a-f0-9]+:	62 f2 fd cf 21 f5    	vpmovsxbd %xmm5,%zmm6\{%k7\}\{z\}
 [ 	]*[a-f0-9]+:	62 f2 fd 4f 21 31    	vpmovsxbd \(%ecx\),%zmm6\{%k7\}
diff --git a/gas/testsuite/gas/i386/evex-wig2.d b/gas/testsuite/gas/i386/evex-wig2.d
deleted file mode 100644
index 753aad4..0000000
--- a/gas/testsuite/gas/i386/evex-wig2.d
+++ /dev/null
@@ -1,17 +0,0 @@
-#as: -mevexwig=1
-#objdump: -dw
-#name: i386 non-WIG EVEX insns with -mevexwig=1
-
-.*: +file format .*
-
-
-Disassembly of section .text:
-
-0+ <_start>:
- +[a-f0-9]+:	62 f1 56 38 2a f0    	vcvtsi2ss %eax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+:	62 f1 56 08 2a f0    	vcvtsi2ss %eax,%xmm5,%xmm6
- +[a-f0-9]+:	62 f1 57 08 2a f0    	vcvtsi2sd %eax,%xmm5,%xmm6
- +[a-f0-9]+:	62 f1 56 38 7b f0    	vcvtusi2ss %eax,\{rd-sae\},%xmm5,%xmm6
- +[a-f0-9]+:	62 f1 56 08 7b f0    	vcvtusi2ss %eax,%xmm5,%xmm6
- +[a-f0-9]+:	62 f1 57 08 7b f0    	vcvtusi2sd %eax,%xmm5,%xmm6
-#pass
diff --git a/gas/testsuite/gas/i386/evex-wig2.s b/gas/testsuite/gas/i386/evex-wig2.s
deleted file mode 100644
index df775df..0000000
--- a/gas/testsuite/gas/i386/evex-wig2.s
+++ /dev/null
@@ -1,11 +0,0 @@
-# Check non-WIG EVEX instructions with -mevexwig=1
-
-	.allow_index_reg
-	.text
-_start:
-	vcvtsi2ss %eax, {rd-sae}, %xmm5, %xmm6
-	{evex} vcvtsi2ss %eax, %xmm5, %xmm6
-	{evex}  vcvtsi2sd %eax, %xmm5, %xmm6
-	vcvtusi2ss %eax, {rd-sae}, %xmm5, %xmm6
-	{evex} vcvtusi2ss %eax, %xmm5, %xmm6
-	{evex}  vcvtusi2sd %eax, %xmm5, %xmm6
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 60439eb..e3eeaf8 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -238,7 +238,6 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "evex-lig-2"
     run_dump_test "evex-wig1"
     run_dump_test "evex-wig1-intel"
-    run_dump_test "evex-wig2"
     run_dump_test "sse2avx"
     run_list_test "inval-avx" "-al"
     run_list_test "inval-avx512f" "-al"
diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig.s b/gas/testsuite/gas/i386/x86-64-evex-wig.s
index e9a2016..8dee163 100644
--- a/gas/testsuite/gas/i386/x86-64-evex-wig.s
+++ b/gas/testsuite/gas/i386/x86-64-evex-wig.s
@@ -14,6 +14,19 @@ _start:
 	vextractps	$123, %xmm29, -512(%rdx)	 # AVX512 Disp8
 	vextractps	$123, %xmm29, -516(%rdx)	 # AVX512
 
+	{evex} vpextrb $0, %xmm0, %eax
+	{evex} vpextrb $0, %xmm0, (%rax)
+
+	{evex} vpextrw $0, %xmm0, %eax
+	{evex} {store} vpextrw $0, %xmm0, %eax
+	{evex} vpextrw $0, %xmm0, (%rax)
+
+	{evex} vpinsrb $0, %eax, %xmm0, %xmm0
+	{evex} vpinsrb $0, (%rax), %xmm0, %xmm0
+
+	{evex} vpinsrw $0, %eax, %xmm0, %xmm0
+	{evex} vpinsrw $0, (%rax), %xmm0, %xmm0
+
 	vpmovsxbd	%xmm29, %zmm30{%k7}	 # AVX512
 	vpmovsxbd	%xmm29, %zmm30{%k7}{z}	 # AVX512
 	vpmovsxbd	(%rcx), %zmm30{%k7}	 # AVX512
diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
index eb6bc7a..240148a 100644
--- a/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d
@@ -18,6 +18,15 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 63 fd 08 17 aa 00 02 00 00 7b 	vextractps DWORD PTR \[rdx\+0x200\],xmm29,0x7b
 [ 	]*[a-f0-9]+:	62 63 fd 08 17 6a 80 7b 	vextractps DWORD PTR \[rdx-0x200\],xmm29,0x7b
 [ 	]*[a-f0-9]+:	62 63 fd 08 17 aa fc fd ff ff 7b 	vextractps DWORD PTR \[rdx-0x204\],xmm29,0x7b
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 c0 00 	vpextrb rax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 00 00 	vpextrb BYTE PTR \[rax\],xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c5 c0 00 	vpextrw rax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 c0 00 	vpextrw rax,xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 00 00 	vpextrw WORD PTR \[rax\],xmm0,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 c0 00 	vpinsrb xmm0,xmm0,eax,0x0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 00 00 	vpinsrb xmm0,xmm0,BYTE PTR \[rax\],0x0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 c0 00 	vpinsrw xmm0,xmm0,eax,0x0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 00 00 	vpinsrw xmm0,xmm0,WORD PTR \[rax\],0x0
 [ 	]*[a-f0-9]+:	62 02 fd 4f 21 f5    	vpmovsxbd zmm30\{k7\},xmm29
 [ 	]*[a-f0-9]+:	62 02 fd cf 21 f5    	vpmovsxbd zmm30\{k7\}\{z\},xmm29
 [ 	]*[a-f0-9]+:	62 62 fd 4f 21 31    	vpmovsxbd zmm30\{k7\},XMMWORD PTR \[rcx\]
diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig1.d b/gas/testsuite/gas/i386/x86-64-evex-wig1.d
index 75272f5..56a937c 100644
--- a/gas/testsuite/gas/i386/x86-64-evex-wig1.d
+++ b/gas/testsuite/gas/i386/x86-64-evex-wig1.d
@@ -18,6 +18,15 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 63 fd 08 17 aa 00 02 00 00 7b 	vextractps \$0x7b,%xmm29,0x200\(%rdx\)
 [ 	]*[a-f0-9]+:	62 63 fd 08 17 6a 80 7b 	vextractps \$0x7b,%xmm29,-0x200\(%rdx\)
 [ 	]*[a-f0-9]+:	62 63 fd 08 17 aa fc fd ff ff 7b 	vextractps \$0x7b,%xmm29,-0x204\(%rdx\)
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 c0 00 	vpextrb \$0x0,%xmm0,%rax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 14 00 00 	vpextrb \$0x0,%xmm0,\(%rax\)
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c5 c0 00 	vpextrw \$0x0,%xmm0,%rax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 c0 00 	vpextrw \$0x0,%xmm0,%rax
+[ 	]*[a-f0-9]+:	62 f3 fd 08 15 00 00 	vpextrw \$0x0,%xmm0,\(%rax\)
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 c0 00 	vpinsrb \$0x0,%eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f3 fd 08 20 00 00 	vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 c0 00 	vpinsrw \$0x0,%eax,%xmm0,%xmm0
+[ 	]*[a-f0-9]+:	62 f1 fd 08 c4 00 00 	vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0
 [ 	]*[a-f0-9]+:	62 02 fd 4f 21 f5    	vpmovsxbd %xmm29,%zmm30\{%k7\}
 [ 	]*[a-f0-9]+:	62 02 fd cf 21 f5    	vpmovsxbd %xmm29,%zmm30\{%k7\}\{z\}
 [ 	]*[a-f0-9]+:	62 62 fd 4f 21 31    	vpmovsxbd \(%rcx\),%zmm30\{%k7\}