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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 16:49:34 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 16:49:34 +0000 |
| commit | 6b4680fbd08221530ad3d541cd51a866eefef6fc (patch) | |
| tree | b05cecde47fd0a28c948c8d66d79bbb0915c14bd /gas | |
| parent | 51d543ed936c9ea7d045ecf80030e6bc8ffff29f (diff) | |
| download | gdb-6b4680fbd08221530ad3d541cd51a866eefef6fc.zip gdb-6b4680fbd08221530ad3d541cd51a866eefef6fc.tar.gz gdb-6b4680fbd08221530ad3d541cd51a866eefef6fc.tar.bz2 | |
[AArch64][PATCH 3/14] Support ARMv8.2 FP16 Scalar Three Same instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Scalar Three Register Same, making them
available when +simd+fp16 is enabled.
The instructions added are: FABD, FMULX, FCMEQ, FCMGE, FCMGT, FACGE,
FACGT, FRECPS and FRSQRTS.
The general form for these instructions is
<OP> <Hd>, <Hs>, <Hm>
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for scalar three register same
instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (aarch64_opcode_table): Add fp16 versions of
fmulx, fcmeq, frecps, frsqrts, fcmge, facge, fabd, fcmgt and
facgt to the scalar three same group.
Change-Id: I155eb8d7c1e9a7c89d691d7e4aae83be51ff1238
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/advsimd-fp16.d | 36 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/advsimd-fp16.s | 19 |
3 files changed, 61 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index f228606..d6e3e48 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,11 @@ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> + * gas/aarch64/advsimd-fp16.d: Update expected output. + * gas/aarch64/advsimd-fp16.s: Add tests for scalar three register + same instructions. + +2015-12-14 Matthew Wahab <matthew.wahab@arm.com> + * gas/aarch64/advsimd-fp16.d: New. * gas/aarch64/advsimd-fp16.s: New. diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.d b/gas/testsuite/gas/aarch64/advsimd-fp16.d index 5b5e694..5814bec 100644 --- a/gas/testsuite/gas/aarch64/advsimd-fp16.d +++ b/gas/testsuite/gas/aarch64/advsimd-fp16.d @@ -167,3 +167,39 @@ Disassembly of section \.text: [0-9a-f]+: 0ec33c41 frsqrts v1.4h, v2.4h, v3.4h [0-9a-f]+: 4ec03c00 frsqrts v0.8h, v0.8h, v0.8h [0-9a-f]+: 4ec33c41 frsqrts v1.8h, v2.8h, v3.8h + [0-9a-f]+: 7ee2d420 fabd d0, d1, d2 + [0-9a-f]+: 7ea2d420 fabd s0, s1, s2 + [0-9a-f]+: 7ec21420 fabd h0, h1, h2 + [0-9a-f]+: 7ec01400 fabd h0, h0, h0 + [0-9a-f]+: 5e62dc20 fmulx d0, d1, d2 + [0-9a-f]+: 5e22dc20 fmulx s0, s1, s2 + [0-9a-f]+: 5e421c20 fmulx h0, h1, h2 + [0-9a-f]+: 5e401c00 fmulx h0, h0, h0 + [0-9a-f]+: 5e62e420 fcmeq d0, d1, d2 + [0-9a-f]+: 5e22e420 fcmeq s0, s1, s2 + [0-9a-f]+: 5e422420 fcmeq h0, h1, h2 + [0-9a-f]+: 5e402400 fcmeq h0, h0, h0 + [0-9a-f]+: 7ee2e420 fcmgt d0, d1, d2 + [0-9a-f]+: 7ea2e420 fcmgt s0, s1, s2 + [0-9a-f]+: 7ec22420 fcmgt h0, h1, h2 + [0-9a-f]+: 7ec02400 fcmgt h0, h0, h0 + [0-9a-f]+: 7e62e420 fcmge d0, d1, d2 + [0-9a-f]+: 7e22e420 fcmge s0, s1, s2 + [0-9a-f]+: 7e422420 fcmge h0, h1, h2 + [0-9a-f]+: 7e402400 fcmge h0, h0, h0 + [0-9a-f]+: 7e62ec20 facge d0, d1, d2 + [0-9a-f]+: 7e22ec20 facge s0, s1, s2 + [0-9a-f]+: 7e422c20 facge h0, h1, h2 + [0-9a-f]+: 7e402c00 facge h0, h0, h0 + [0-9a-f]+: 7ee2ec20 facgt d0, d1, d2 + [0-9a-f]+: 7ea2ec20 facgt s0, s1, s2 + [0-9a-f]+: 7ec22c20 facgt h0, h1, h2 + [0-9a-f]+: 7ec02c00 facgt h0, h0, h0 + [0-9a-f]+: 5e62fc20 frecps d0, d1, d2 + [0-9a-f]+: 5e22fc20 frecps s0, s1, s2 + [0-9a-f]+: 5e423c20 frecps h0, h1, h2 + [0-9a-f]+: 5e403c00 frecps h0, h0, h0 + [0-9a-f]+: 5ee2fc20 frsqrts d0, d1, d2 + [0-9a-f]+: 5ea2fc20 frsqrts s0, s1, s2 + [0-9a-f]+: 5ec23c20 frsqrts h0, h1, h2 + [0-9a-f]+: 5ec03c00 frsqrts h0, h0, h0 diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.s b/gas/testsuite/gas/aarch64/advsimd-fp16.s index 3649ca2..99f27f2 100644 --- a/gas/testsuite/gas/aarch64/advsimd-fp16.s +++ b/gas/testsuite/gas/aarch64/advsimd-fp16.s @@ -38,3 +38,22 @@ three_same frecps three_same fdiv three_same frsqrts + + /* Scalar three-same. */ + + .macro sthree_same, op + \op d0, d1, d2 + \op s0, s1, s2 + \op h0, h1, h2 + \op h0, h0, h0 + .endm + + sthree_same fabd + sthree_same fmulx + sthree_same fcmeq + sthree_same fcmgt + sthree_same fcmge + sthree_same facge + sthree_same facgt + sthree_same frecps + sthree_same frsqrts |