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author | Philipp Tomsich <prt@gnu.org> | 2021-01-07 15:53:25 +0800 |
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committer | Nelson Chu <nelson.chu@sifive.com> | 2021-01-07 16:45:43 +0800 |
commit | aa881ecde48c7a0224b92e2cfa43b37ee9ec9fa2 (patch) | |
tree | 1b0e0814c4a7ed9567d8d49aad19de327ea78682 /gas | |
parent | 4d4490b8d772321e9634541b81be25095a5a06ef (diff) | |
download | gdb-aa881ecde48c7a0224b92e2cfa43b37ee9ec9fa2.zip gdb-aa881ecde48c7a0224b92e2cfa43b37ee9ec9fa2.tar.gz gdb-aa881ecde48c7a0224b92e2cfa43b37ee9ec9fa2.tar.bz2 |
RISC-V: Add pause hint instruction.
Add support for the pause hint instruction, as specified in the
Zihintpause extension. The pause instruction is encoded as a
special form of a memory fence (which is available as part of the
base instruction set). The chosen encoding does not mandate any
particular memory ordering and therefore is a true hint.
bfd/
* elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause.
gas/
* config/tc-riscv.c (riscv_multi_subset_supports): Added
INSN_CLASS_ZIHINTPAUSE.
* testsuite/gas/riscv/pause.d: New testcase. Adding coverage for
the pause hint instruction.
* testsuite/gas/riscv/pause.s: Likewise.
include/
* opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN
for pause hint instruction.
* opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE.
opcodes/
* riscv-opc.c (riscv_opcodes): Add pause hint instruction.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 8 | ||||
-rw-r--r-- | gas/config/tc-riscv.c | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/pause.d | 10 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/pause.s | 2 |
4 files changed, 22 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index c99e1b3..48c21f7 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2021-01-07 Philipp Tomsich <prt@gnu.org> + + * config/tc-riscv.c (riscv_multi_subset_supports): Added + INSN_CLASS_ZIHINTPAUSE. + * testsuite/gas/riscv/pause.d: New testcase. Adding coverage for + the pause hint instruction. + * testsuite/gas/riscv/pause.s: Likewise. + 2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com> Jim Wilson <jimw@sifive.com> Andrew Waterman <andrew@sifive.com> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 052199e..8dc84cb 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -250,6 +250,8 @@ riscv_multi_subset_supports (enum riscv_insn_class insn_class) return riscv_subset_supports ("zicsr"); case INSN_CLASS_ZIFENCEI: return riscv_subset_supports ("zifencei"); + case INSN_CLASS_ZIHINTPAUSE: + return riscv_subset_supports ("zihintpause"); case INSN_CLASS_ZBA: return riscv_subset_supports ("zba"); diff --git a/gas/testsuite/gas/riscv/pause.d b/gas/testsuite/gas/riscv/pause.d new file mode 100644 index 0000000..13e581d --- /dev/null +++ b/gas/testsuite/gas/riscv/pause.d @@ -0,0 +1,10 @@ +#as: -march=rv32i_zihintpause +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+0100000f[ ]+pause diff --git a/gas/testsuite/gas/riscv/pause.s b/gas/testsuite/gas/riscv/pause.s new file mode 100644 index 0000000..4cdf357 --- /dev/null +++ b/gas/testsuite/gas/riscv/pause.s @@ -0,0 +1,2 @@ +target: + pause |