diff options
author | Tristan Gingold <gingold@adacore.com> | 2013-09-04 12:28:11 +0000 |
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committer | Tristan Gingold <gingold@adacore.com> | 2013-09-04 12:28:11 +0000 |
commit | ac21e7da5d0f378e2855df802d096a18ab41ac41 (patch) | |
tree | f18fdad2ee252b4c70a2891ab69b159c8e750926 /gas | |
parent | 74db7efbe3a09c00e5f4f5b99862f173258938f6 (diff) | |
download | gdb-ac21e7da5d0f378e2855df802d096a18ab41ac41.zip gdb-ac21e7da5d0f378e2855df802d096a18ab41ac41.tar.gz gdb-ac21e7da5d0f378e2855df802d096a18ab41ac41.tar.bz2 |
gas/
* config/tc-ppc.c (md_apply_fix): Handle defined after use toc
symbols.
gas/testsuite/
* gas/ppc/aix.exp: Run xcoff-toc-1 test.
* gas/ppc/xcoff-toc-1.s, gas/ppc/xcoff-toc-1.d: New test.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-ppc.c | 12 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/aix.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/xcoff-toc-1.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/xcoff-toc-1.s | 21 |
6 files changed, 56 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index d614224..89c9cc9 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2013-09-04 Tristan Gingold <gingold@adacore.com> + + * config/tc-ppc.c (md_apply_fix): Handle defined after use toc + symbols. + 2013-09-04 Roland McGrath <mcgrathr@google.com> PR gas/15914 diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 1631fb7..6b54f5a 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -3146,6 +3146,7 @@ md_assemble (char *str) && (operand->bitm & 0xfff0) == 0xfff0 && operand->shift == 0) { + /* Note: the symbol may be not yet defined. */ if (ppc_is_toc_sym (ex.X_add_symbol)) { reloc = BFD_RELOC_PPC_TOC16; @@ -6363,6 +6364,15 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) value = fixP->fx_offset; fixP->fx_done = 1; } + + /* During parsing of instructions, a TOC16 reloc is generated for + instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined + in the toc. But at parse time, SYM may be not yet defined, so + check again here. */ + if (fixP->fx_r_type == BFD_RELOC_16 + && fixP->fx_addsy != NULL + && ppc_is_toc_sym (fixP->fx_addsy)) + fixP->fx_r_type = BFD_RELOC_PPC_TOC16; #endif } @@ -6873,6 +6883,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) fixP->fx_addnumber = - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) - S_GET_VALUE (ppc_toc_csect); + /* Set *valP to avoid errors. */ + *valP = value; #endif } #endif diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 15e00f3..2110cd9 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2013-09-04 Tristan Gingold <gingold@adacore.com> + + * gas/ppc/aix.exp: Run xcoff-toc-1 test. + * gas/ppc/xcoff-toc-1.s, gas/ppc/xcoff-toc-1.d: New test. + 2013-09-04 Roland McGrath <mcgrathr@google.com> PR gas/15914 diff --git a/gas/testsuite/gas/ppc/aix.exp b/gas/testsuite/gas/ppc/aix.exp index 2789837..9612f27 100644 --- a/gas/testsuite/gas/ppc/aix.exp +++ b/gas/testsuite/gas/ppc/aix.exp @@ -67,6 +67,7 @@ if [istarget powerpc-ibm-aix*] then { run_dump_test "xcoff-branch-1-64" run_dump_test "xcoff-br16-1" run_dump_test "xcoff-br16-2" + run_dump_test "xcoff-toc-1" run_list_test "xcoff-ref-1" diff --git a/gas/testsuite/gas/ppc/xcoff-toc-1.d b/gas/testsuite/gas/ppc/xcoff-toc-1.d new file mode 100644 index 0000000..bb85694 --- /dev/null +++ b/gas/testsuite/gas/ppc/xcoff-toc-1.d @@ -0,0 +1,12 @@ +#as: -a32 +#source: xcoff-toc-1.s +#objdump: -dr +#name: XCOFF TOC reloc test 1 + +.* +Disassembly of section \.text: + +00000000 <\.foo>: + 0: 80 22 00 00 l r1,0\(r2\) + 2: R_TOC data-0x10010 + 4: 4e 80 00 20 br diff --git a/gas/testsuite/gas/ppc/xcoff-toc-1.s b/gas/testsuite/gas/ppc/xcoff-toc-1.s new file mode 100644 index 0000000..ac491ae --- /dev/null +++ b/gas/testsuite/gas/ppc/xcoff-toc-1.s @@ -0,0 +1,21 @@ + .csect _rw_[RW],4 + .toc + + .csect .text[PR] + .align 2 + .lglobl .foo + .csect foo[DS] +foo: + .long .foo, TOC[tc0], 0 + .csect .text[PR] +.foo: + lwz 1,LC..72(2) + blr + .align 2 + .toc +LC..72: + .tc data[TC],data + .csect _rw_[RW],4 + .align 2 +data: + .space 0x10000 |