[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction

This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order/bti-branch-target-identification)

The Branch Target Identification instructions (BTI) are allocated to
existing HINT space, using HINT numbers 32, 34, 36, 38, such that
bits[7:6] of the instruction identify the compatibility of the BTI
instruction to different branches.

	BTI {<targets>}

where <targets> one of the following, specifying which type of
indirection is allowed:

	j : Can be a target of any BR Xn isntruction.
	c : Can be a target of any BLR Xn and BR {X16|X17}.
	jc: Can be a target of any free branch.

A BTI instruction without any <targets> is the strictest of all and
can not be a target of nay free branch.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_BTI): New.
	(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_BTI by default.
	(aarch64_opnd): Add AARCH64_OPND_BTI_TARGET.
	(HINT_OPD_CSYNC, HINT_OPD_C, HINT_OPD_J): New macros to
	define HINT #imm values.
	(HINT_OPD_JC, HINT_OPD_NULL): Likewise.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-opc.h (HINT_OPD_NOPRINT, HINT_ENCODE): New.
	(HINT_FLAG, HINT_VALUE): New macros to encode NO_PRINT flag
	with the hint immediate.
	* aarch64-opc.c (aarch64_hint_options): New entries for
	c, j, jc and default (with HINT_OPD_F_NOPRINT flag) for BTI.
	(aarch64_print_operand): Add case for AARCH64_OPND_BTI_TARGET
	while checking for HINT_OPD_F_NOPRINT flag.
	* aarch64-dis.c (aarch64_ext_hint): Use new HINT_VALUE to
	extract value.
	* aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): New.
	(aarch64_opcode_table): Add entry for BTI.
	(AARCH64_OPERANDS): Add new description for BTI targets.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (parse_bti_operand): New.
	(process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
	(parse_operands): Likewise.
	* testsuite/gas/aarch64/system.d: Update for BTI.
	* testsuite/gas/aarch64/bti.s: New.
	* testsuite/gas/aarch64/bti.d: New.
	* testsuite/gas/aarch64/illegal-bti.d: New.
	* testsuite/gas/aarch64/illegal-bti.l: New.

7 files changed, 95 insertions, 4 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index dab1a01..6ed2407 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,16 @@
 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 
+	* config/tc-aarch64.c (parse_bti_operand): New.
+	(process_omitted_operand): Add case for AARCH64_OPND_BTI_TARGET.
+	(parse_operands): Likewise.
+	* testsuite/gas/aarch64/system.d: Update for BTI.
+	* testsuite/gas/aarch64/bti.s: New.
+	* testsuite/gas/aarch64/bti.d: New.
+	* testsuite/gas/aarch64/illegal-bti.d: New.
+	* testsuite/gas/aarch64/illegal-bti.l: New.
+
+2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+
 	* config/tc-aarch64.c (aarch64_features): New "rng" option.
 	* doc/c-aarch64.texi: Document the same.
 	* testsuite/gas/aarch64/sysreg-4.s: Test both instructions.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b09c416..582c3ec 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -3933,6 +3933,47 @@ parse_barrier_psb (char **str,
   return 0;
 }
 
+/* Parse an operand for BTI.  Set *HINT_OPT to the hint-option record
+   return 0 if successful.  Otherwise return PARSE_FAIL.  */
+
+static int
+parse_bti_operand (char **str,
+		   const struct aarch64_name_value_pair ** hint_opt)
+{
+  char *p, *q;
+  const struct aarch64_name_value_pair *o;
+
+  p = q = *str;
+  while (ISALPHA (*q))
+    q++;
+
+  o = hash_find_n (aarch64_hint_opt_hsh, p, q - p);
+  if (!o)
+    {
+      set_fatal_syntax_error
+	( _("unknown option to BTI"));
+      return PARSE_FAIL;
+    }
+
+  switch (o->value)
+    {
+    /* Valid BTI operands.  */
+    case HINT_OPD_C:
+    case HINT_OPD_J:
+    case HINT_OPD_JC:
+      break;
+
+    default:
+      set_syntax_error
+	(_("unknown option to BTI"));
+      return PARSE_FAIL;
+    }
+
+  *str = q;
+  *hint_opt = o;
+  return 0;
+}
+
 /* Parse a system register or a PSTATE field name for an MSR/MRS instruction.
    Returns the encoding for the option, or PARSE_FAIL.
 
@@ -5151,6 +5192,11 @@ process_omitted_operand (enum aarch64_opnd type, const aarch64_opcode *opcode,
 
     case AARCH64_OPND_BARRIER_ISB:
       operand->barrier = aarch64_barrier_options + default_value;
+      break;
+
+    case AARCH64_OPND_BTI_TARGET:
+      operand->hint_option = aarch64_hint_options + default_value;
+      break;
 
     default:
       break;
@@ -6483,6 +6529,12 @@ sys_reg_ins:
 	    goto failure;
 	  break;
 
+	case AARCH64_OPND_BTI_TARGET:
+	  val = parse_bti_operand (&str, &(info->hint_option));
+	  if (val == PARSE_FAIL)
+	    goto failure;
+	  break;
+
 	default:
 	  as_fatal (_("unhandled operand code %d"), operands[i]);
 	}
diff --git a/gas/testsuite/gas/aarch64/bti.d b/gas/testsuite/gas/aarch64/bti.d
new file mode 100644
index 0000000..4f65ee5
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/bti.d
@@ -0,0 +1,12 @@
+#as: -march=armv8.5-a
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*:	d503241f 	bti
+.*:	d503245f 	bti	c
+.*:	d503249f 	bti	j
+.*:	d50324df 	bti	jc
diff --git a/gas/testsuite/gas/aarch64/bti.s b/gas/testsuite/gas/aarch64/bti.s
new file mode 100644
index 0000000..42f199d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/bti.s
@@ -0,0 +1,8 @@
+// Test file for AArch64 bti.
+
+	.text
+
+	bti
+	bti c
+	bti j
+	bti jc
diff --git a/gas/testsuite/gas/aarch64/illegal-bti.d b/gas/testsuite/gas/aarch64/illegal-bti.d
new file mode 100644
index 0000000..174d97a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-bti.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: bti.s
+#error_output: illegal-bti.l
diff --git a/gas/testsuite/gas/aarch64/illegal-bti.l b/gas/testsuite/gas/aarch64/illegal-bti.l
new file mode 100644
index 0000000..354c6f2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-bti.l
@@ -0,0 +1,5 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]+: Error: selected processor does not support `bti'
+[^:]*:[0-9]+: Error: selected processor does not support `bti c'
+[^:]*:[0-9]+: Error: selected processor does not support `bti j'
+[^:]*:[0-9]+: Error: selected processor does not support `bti jc'
diff --git a/gas/testsuite/gas/aarch64/system.d b/gas/testsuite/gas/aarch64/system.d
index ca908ef..291d04d 100644
--- a/gas/testsuite/gas/aarch64/system.d
+++ b/gas/testsuite/gas/aarch64/system.d
@@ -44,13 +44,13 @@ Disassembly of section \.text:
 .*:	d50323bf 	(hint	#0x1d|autiasp)
 .*:	d50323df 	(hint	#0x1e|autibz)
 .*:	d50323ff 	(hint	#0x1f|autibsp)
-.*:	d503241f 	hint	#0x20
+.*:	d503241f 	(hint	#0x20|bti)
 .*:	d503243f 	hint	#0x21
-.*:	d503245f 	hint	#0x22
+.*:	d503245f 	(hint	#0x22|bti	c)
 .*:	d503247f 	hint	#0x23
-.*:	d503249f 	hint	#0x24
+.*:	d503249f 	(hint	#0x24|bti	j)
 .*:	d50324bf 	hint	#0x25
-.*:	d50324df 	hint	#0x26
+.*:	d50324df 	(hint	#0x26|bti	jc)
 .*:	d50324ff 	hint	#0x27
 .*:	d503251f 	hint	#0x28
 .*:	d503253f 	hint	#0x29