* arm-dis.c (print_insn): Fixed search for next

    symbol and data dumping condition, and the
    initial mapping symbol state.

    * gas/arm/dis-data.d: New test case.
    * gas/arm/dis-data.s: New file.

6 files changed, 61 insertions, 18 deletions

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 97db70c..b0184a5 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -13666,12 +13666,22 @@ do_vfp_nsyn_cvtz (void)
 }
 
 static void
-do_neon_cvt (void)
+do_neon_cvt_1 (bfd_boolean round_to_zero ATTRIBUTE_UNUSED)
 {
   enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_FFI, NS_DD, NS_QQ,
     NS_FD, NS_DF, NS_FF, NS_QD, NS_DQ, NS_NULL);
   int flavour = neon_cvt_flavour (rs);
 
+  /* PR11109: Handle round-to-zero for VCVT conversions.  */
+  if (round_to_zero
+      && ARM_CPU_HAS_FEATURE (cpu_variant, fpu_arch_vfp_v2)
+      && (flavour == 0 || flavour == 1 || flavour == 8 || flavour == 9)
+      && (rs == NS_FD || rs == NS_FF))
+    {
+      do_vfp_nsyn_cvtz ();
+      return;
+    }
+
   /* VFP rather than Neon conversions.  */
   if (flavour >= 6)
     {
@@ -13772,6 +13782,18 @@ do_neon_cvt (void)
 }
 
 static void
+do_neon_cvtr (void)
+{
+  do_neon_cvt_1 (FALSE);
+}
+
+static void
+do_neon_cvt (void)
+{
+  do_neon_cvt_1 (TRUE);
+}
+
+static void
 do_neon_cvtb (void)
 {
   inst.instruction = 0xeb20a40;
@@ -17416,7 +17438,8 @@ static const struct asm_opcode insns[] =
  NCE(vldr,      d100b00, 2, (RVSD, ADDRGLDC), neon_ldr_str),
  NCE(vstr,      d000b00, 2, (RVSD, ADDRGLDC), neon_ldr_str),
 
- nCEF(vcvt,     _vcvt,    3, (RNSDQ, RNSDQ, oI32b), neon_cvt),
+ nCEF(vcvt,     _vcvt,   3, (RNSDQ, RNSDQ, oI32b), neon_cvt),
+ nCEF(vcvtr,    _vcvt,   2, (RNSDQ, RNSDQ), neon_cvtr),
  nCEF(vcvtb,	_vcvt,	 2, (RVS, RVS), neon_cvtb),
  nCEF(vcvtt,	_vcvt,	 2, (RVS, RVS), neon_cvtt),
 
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 10128ad..a18ddcd 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
+
+	* gas/arm/dis-data.d: New test case.
+	* gas/arm/dis-data.s: New file.
+
 2010-01-04  Daniel Gutson  <dgutson@codesourcery.com>
 
 	* gas/arm/neon-logic.d: New test case.
diff --git a/gas/testsuite/gas/arm/dis-data.d b/gas/testsuite/gas/arm/dis-data.d
new file mode 100644
index 0000000..9715453
--- /dev/null
+++ b/gas/testsuite/gas/arm/dis-data.d
@@ -0,0 +1,10 @@
+# name: Data disassembler test
+# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+# objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+0x00000000 20010000 	.word	0x20010000
+0x00000004 000000f9 	.word	0x000000f9
+0x00000008 00004cd5 	.word	0x00004cd5
diff --git a/gas/testsuite/gas/arm/dis-data.s b/gas/testsuite/gas/arm/dis-data.s
new file mode 100644
index 0000000..6b63a93
--- /dev/null
+++ b/gas/testsuite/gas/arm/dis-data.s
@@ -0,0 +1,5 @@
+.syntax unified
+.word	0x20010000
+.word	0x000000f9
+.word	0x00004cd5
+
diff --git a/gas/testsuite/gas/arm/vfp-neon-syntax.d b/gas/testsuite/gas/arm/vfp-neon-syntax.d
index b26a1a8..8b2a257 100644
--- a/gas/testsuite/gas/arm/vfp-neon-syntax.d
+++ b/gas/testsuite/gas/arm/vfp-neon-syntax.d
@@ -93,24 +93,24 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> 0ebc0ae0 	(vcvteq\.u32\.f32|ftouizseq)	s0, s1
 0[0-9a-f]+ <[^>]+> 0ebd0bc1 	(vcvteq\.s32\.f64|ftosizdeq)	s0, d1
 0[0-9a-f]+ <[^>]+> 0ebc0bc1 	(vcvteq\.u32\.f64|ftouizdeq)	s0, d1
-0[0-9a-f]+ <[^>]+> eebd0a60 	(vcvtr\.s32\.f32|ftosis)	s0, s1
-0[0-9a-f]+ <[^>]+> eebc0a60 	(vcvtr\.u32\.f32|ftouis)	s0, s1
+0[0-9a-f]+ <[^>]+> eebd0ae0 	(vcvt\.s32\.f32|ftosis)	s0, s1
+0[0-9a-f]+ <[^>]+> eebc0ae0 	(vcvt\.u32\.f32|ftouis)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb80ae0 	(vcvt\.f32\.s32|fsitos)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb80a60 	(vcvt\.f32\.u32|fuitos)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb70bc1 	(vcvt\.f32\.f64|fcvtsd)	s0, d1
 0[0-9a-f]+ <[^>]+> eeb70ae0 	(vcvt\.f64\.f32|fcvtds)	d0, s1
-0[0-9a-f]+ <[^>]+> eebd0b41 	(vcvtr\.s32\.f64|ftosid)	s0, d1
-0[0-9a-f]+ <[^>]+> eebc0b41 	(vcvtr\.u32\.f64|ftouid)	s0, d1
+0[0-9a-f]+ <[^>]+> eebd0bc1 	(vcvt\.s32\.f64|ftosid)	s0, d1
+0[0-9a-f]+ <[^>]+> eebc0bc1 	(vcvt\.u32\.f64|ftouid)	s0, d1
 0[0-9a-f]+ <[^>]+> eeb80be0 	(vcvt\.f64\.s32|fsitod)	d0, s1
 0[0-9a-f]+ <[^>]+> eeb80b60 	(vcvt\.f64\.u32|fuitod)	d0, s1
-0[0-9a-f]+ <[^>]+> 0ebd0a60 	(vcvtreq\.s32\.f32|ftosiseq)	s0, s1
-0[0-9a-f]+ <[^>]+> 0ebc0a60 	(vcvtreq\.u32\.f32|ftouiseq)	s0, s1
+0[0-9a-f]+ <[^>]+> 0ebd0ae0 	(vcvteq\.s32\.f32|ftosiseq)	s0, s1
+0[0-9a-f]+ <[^>]+> 0ebc0ae0 	(vcvteq\.u32\.f32|ftouiseq)	s0, s1
 0[0-9a-f]+ <[^>]+> 0eb80ae0 	(vcvteq\.f32\.s32|fsitoseq)	s0, s1
 0[0-9a-f]+ <[^>]+> 0eb80a60 	(vcvteq\.f32\.u32|fuitoseq)	s0, s1
 0[0-9a-f]+ <[^>]+> 0eb70bc1 	(vcvteq\.f32\.f64|fcvtsdeq)	s0, d1
 0[0-9a-f]+ <[^>]+> 0eb70ae0 	(vcvteq\.f64\.f32|fcvtdseq)	d0, s1
-0[0-9a-f]+ <[^>]+> 0ebd0b41 	(vcvtreq\.s32\.f64|ftosideq)	s0, d1
-0[0-9a-f]+ <[^>]+> 0ebc0b41 	(vcvtreq\.u32\.f64|ftouideq)	s0, d1
+0[0-9a-f]+ <[^>]+> 0ebd0bc1 	(vcvteq\.s32\.f64|ftosideq)	s0, d1
+0[0-9a-f]+ <[^>]+> 0ebc0bc1 	(vcvteq\.u32\.f64|ftouideq)	s0, d1
 0[0-9a-f]+ <[^>]+> 0eb80be0 	(vcvteq\.f64\.s32|fsitodeq)	d0, s1
 0[0-9a-f]+ <[^>]+> 0eb80b60 	(vcvteq\.f64\.u32|fuitodeq)	d0, s1
 0[0-9a-f]+ <[^>]+> eebe0aef 	(vcvt\.s32\.f32	s0, s0, #1|ftosls	s0, #1)
diff --git a/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d b/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d
index 616ec4b..40ff132 100644
--- a/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d
+++ b/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d
@@ -112,26 +112,26 @@ Disassembly of section \.text:
 0[0-9a-f]+ <[^>]+> eebc 0ae0 	(vcvteq\.u32\.f32|ftouizseq)	s0, s1
 0[0-9a-f]+ <[^>]+> eebd 0bc1 	(vcvteq\.s32\.f64|ftosizdeq)	s0, d1
 0[0-9a-f]+ <[^>]+> eebc 0bc1 	(vcvteq\.u32\.f64|ftouizdeq)	s0, d1
-0[0-9a-f]+ <[^>]+> eebd 0a60 	(vcvtr\.s32\.f32|ftosis)	s0, s1
-0[0-9a-f]+ <[^>]+> eebc 0a60 	(vcvtr\.u32\.f32|ftouis)	s0, s1
+0[0-9a-f]+ <[^>]+> eebd 0ae0 	(vcvt\.s32\.f32|ftosis)	s0, s1
+0[0-9a-f]+ <[^>]+> eebc 0ae0 	(vcvt\.u32\.f32|ftouis)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb8 0ae0 	(vcvt\.f32\.s32|fsitos)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb8 0a60 	(vcvt\.f32\.u32|fuitos)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb7 0bc1 	(vcvt\.f32\.f64|fcvtsd)	s0, d1
 0[0-9a-f]+ <[^>]+> eeb7 0ae0 	(vcvt\.f64\.f32|fcvtds)	d0, s1
-0[0-9a-f]+ <[^>]+> eebd 0b41 	(vcvtr\.s32\.f64|ftosid)	s0, d1
-0[0-9a-f]+ <[^>]+> eebc 0b41 	(vcvtr\.u32\.f64|ftouid)	s0, d1
+0[0-9a-f]+ <[^>]+> eebd 0bc1 	(vcvt\.s32\.f64|ftosid)	s0, d1
+0[0-9a-f]+ <[^>]+> eebc 0bc1 	(vcvt\.u32\.f64|ftouid)	s0, d1
 0[0-9a-f]+ <[^>]+> eeb8 0be0 	(vcvt\.f64\.s32|fsitod)	d0, s1
 0[0-9a-f]+ <[^>]+> eeb8 0b60 	(vcvt\.f64\.u32|fuitod)	d0, s1
 0[0-9a-f]+ <[^>]+> bf01      	itttt	eq
-0[0-9a-f]+ <[^>]+> eebd 0a60 	(vcvtreq\.s32\.f32|ftosiseq)	s0, s1
-0[0-9a-f]+ <[^>]+> eebc 0a60 	(vcvtreq\.u32\.f32|ftouiseq)	s0, s1
+0[0-9a-f]+ <[^>]+> eebd 0ae0 	(vcvteq\.s32\.f32|ftosiseq)	s0, s1
+0[0-9a-f]+ <[^>]+> eebc 0ae0 	(vcvteq\.u32\.f32|ftouiseq)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb8 0ae0 	(vcvteq\.f32\.s32|fsitoseq)	s0, s1
 0[0-9a-f]+ <[^>]+> eeb8 0a60 	(vcvteq\.f32\.u32|fuitoseq)	s0, s1
 0[0-9a-f]+ <[^>]+> bf01      	itttt	eq
 0[0-9a-f]+ <[^>]+> eeb7 0bc1 	(vcvteq\.f32\.f64|fcvtsdeq)	s0, d1
 0[0-9a-f]+ <[^>]+> eeb7 0ae0 	(vcvteq\.f64\.f32|fcvtdseq)	d0, s1
-0[0-9a-f]+ <[^>]+> eebd 0b41 	(vcvtreq\.s32\.f64|ftosideq)	s0, d1
-0[0-9a-f]+ <[^>]+> eebc 0b41 	(vcvtreq\.u32\.f64|ftouideq)	s0, d1
+0[0-9a-f]+ <[^>]+> eebd 0bc1 	(vcvteq\.s32\.f64|ftosideq)	s0, d1
+0[0-9a-f]+ <[^>]+> eebc 0bc1 	(vcvteq\.u32\.f64|ftouideq)	s0, d1
 0[0-9a-f]+ <[^>]+> bf04      	itt	eq
 0[0-9a-f]+ <[^>]+> eeb8 0be0 	(vcvteq\.f64\.s32|fsitodeq)	d0, s1
 0[0-9a-f]+ <[^>]+> eeb8 0b60 	(vcvteq\.f64\.u32|fuitodeq)	d0, s1