Allow VL=1 on AVX scalar instructions.

gas/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (avxscalar): New.
	(OPTION_MAVXSCALAR): Likewise.
	(build_vex_prefix): Select vector_length for scalar instructions
	based on avxscalar.
	(md_longopts): Add OPTION_MAVXSCALAR.
	(md_parse_option): Handle OPTION_MAVXSCALAR.
	(md_show_usage): Add -mavxscalar=.

	* doc/c-i386.texi: Document -mavxscalar=.

gas/testsuite/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx-scalar-intel.d: New.
	* gas/i386/avx-scalar.d: Likewise.
	* gas/i386/avx-scalar.s: Likewise.
	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
	* gas/i386/x86-64-avx-scalar.d: Likewise.
	* gas/i386/x86-64-avx-scalar.s: Likewise.

	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
	x86-64-avx-scalar and x86-64-avx-scalar-intel.

opcodes/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.

11 files changed, 3831 insertions, 1 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d0c4723..b045c55 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,15 @@
+2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (avxscalar): New.
+	(OPTION_MAVXSCALAR): Likewise.
+	(build_vex_prefix): Select vector_length for scalar instructions
+	based on avxscalar.
+	(md_longopts): Add OPTION_MAVXSCALAR.
+	(md_parse_option): Handle OPTION_MAVXSCALAR.
+	(md_show_usage): Add -mavxscalar=.
+
+	* doc/c-i386.texi: Document -mavxscalar=.
+
 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 7f5ced7..4a71209 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -448,6 +448,13 @@ static unsigned int no_cond_jump_promotion = 0;
 /* Encode SSE instructions with VEX prefix.  */
 static unsigned int sse2avx;
 
+/* Encode scalar AVX instructions with specific vector length.  */
+static enum
+  {
+    vex128 = 0,
+    vex256
+  } avxscalar;
+
 /* Pre-defined "_GLOBAL_OFFSET_TABLE_".  */
 static symbolS *GOT_symbol;
 
@@ -2706,7 +2713,10 @@ build_vex_prefix (const insn_template *t)
       i.tm = t[1];
     }
 
-  vector_length = i.tm.opcode_modifier.vex == VEX256 ? 1 : 0;
+  if (i.tm.opcode_modifier.vex == VEXScalar)
+    vector_length = avxscalar;
+  else
+    vector_length = i.tm.opcode_modifier.vex == VEX256 ? 1 : 0;
 
   switch ((i.tm.base_opcode >> 8) & 0xff)
     {
@@ -7868,6 +7878,7 @@ const char *md_shortopts = "qn";
 #define OPTION_MOLD_GCC (OPTION_MD_BASE + 9)
 #define OPTION_MSSE2AVX (OPTION_MD_BASE + 10)
 #define OPTION_MSSE_CHECK (OPTION_MD_BASE + 11)
+#define OPTION_MAVXSCALAR (OPTION_MSSE_CHECK + 11)
 
 struct option md_longopts[] =
 {
@@ -7886,6 +7897,7 @@ struct option md_longopts[] =
   {"mold-gcc", no_argument, NULL, OPTION_MOLD_GCC},
   {"msse2avx", no_argument, NULL, OPTION_MSSE2AVX},
   {"msse-check", required_argument, NULL, OPTION_MSSE_CHECK},
+  {"mavxscalar", required_argument, NULL, OPTION_MAVXSCALAR},
   {NULL, no_argument, NULL, 0}
 };
 size_t md_longopts_size = sizeof (md_longopts);
@@ -8096,6 +8108,15 @@ md_parse_option (int c, char *arg)
 	as_fatal (_("Invalid -msse-check= option: `%s'"), arg);
       break;
 
+    case OPTION_MAVXSCALAR:
+      if (strcasecmp (arg, "128") == 0)
+	avxscalar = vex128;
+      else if (strcasecmp (arg, "256") == 0)
+	avxscalar = vex256;
+      else
+	as_fatal (_("Invalid -mavxscalar= option: `%s'"), arg);
+      break;
+
     default:
       return 0;
     }
@@ -8220,6 +8241,9 @@ md_show_usage (FILE *stream)
   -msse-check=[none|error|warning]\n\
                           check SSE instructions\n"));
   fprintf (stream, _("\
+  -mavxscalar=[128|256]   encode scalar AVX instructions with specific vector\n\
+                           length\n"));
+  fprintf (stream, _("\
   -mmnemonic=[att|intel]  use AT&T/Intel mnemonic\n"));
   fprintf (stream, _("\
   -msyntax=[att|intel]    use AT&T/Intel syntax\n"));
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 4a9f661..e657ab3 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -189,6 +189,16 @@ will make the assembler issue a warning for any SSE intruction.
 @option{-msse-check=@var{error}} will make the assembler issue an error
 for any SSE intruction.
 
+@cindex @samp{-mavxscalar=} option, i386
+@cindex @samp{-mavxscalar=} option, x86-64
+@item -mavxscalar=@var{128}
+@item -mavxscalar=@var{256}
+This options control how the assembler should encode scalar AVX
+instructions.  @option{-mavxscalar=@var{128}} will encode scalar
+AVX instructions with 128bit vector length, which is the default.
+@option{-mavxscalar=@var{256}} will encode scalar AVX instructions
+with 256bit vector length.
+
 @cindex @samp{-mmnemonic=} option, i386
 @cindex @samp{-mmnemonic=} option, x86-64
 @item -mmnemonic=@var{att}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2560c9b..b12983d 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,15 @@
+2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/avx-scalar-intel.d: New.
+	* gas/i386/avx-scalar.d: Likewise.
+	* gas/i386/avx-scalar.s: Likewise.
+	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
+	* gas/i386/x86-64-avx-scalar.d: Likewise.
+	* gas/i386/x86-64-avx-scalar.s: Likewise.
+
+	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
+	x86-64-avx-scalar and x86-64-avx-scalar-intel.
+
 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/avx.s: Add more tests.
diff --git a/gas/testsuite/gas/i386/avx-scalar-intel.d b/gas/testsuite/gas/i386/avx-scalar-intel.d
new file mode 100644
index 0000000..83837d3
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-scalar-intel.d
@@ -0,0 +1,568 @@
+#as: -mavxscalar=256
+#objdump: -dwMintel
+#name: i386 AVX scalar insns (Intel disassembly)
+#source: avx-scalar.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si ecx,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si ecx,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si ecx,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si ecx,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 05 34 12 00 00 	vmovd  DWORD PTR ds:0x1234,xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3d 34 12 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR ds:0x1234
+[ 	]*[a-f0-9]+:	c5 fd 7e 45 00       	vmovd  DWORD PTR \[ebp\+0x0\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 7d 00       	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x0\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 24       	vmovd  DWORD PTR \[esp\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 24       	vcvtsi2sd xmm7,xmm0,DWORD PTR \[esp\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 85 99 00 00 00 	vmovd  DWORD PTR \[ebp\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bd 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 25 99 00 00 00 	vmovd  DWORD PTR \[eiz\*1\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 25 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*1\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 65 99 00 00 00 	vmovd  DWORD PTR \[eiz\*2\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 65 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*2\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 20 99 00 00 00 	vmovd  DWORD PTR \[eax\+eiz\*1\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 20 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*1\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 60 99 00 00 00 	vmovd  DWORD PTR \[eax\+eiz\*2\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 60 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*2\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 98 99 00 00 00 	vmovd  DWORD PTR \[eax\+ebx\*4\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 98 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+ebx\*4\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 cc 99 00 00 00 	vmovd  DWORD PTR \[esp\+ecx\*8\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc cc 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[esp\+ecx\*8\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 15 99 00 00 00 	vmovd  DWORD PTR \[ebp\+edx\*1\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 15 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+edx\*1\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  QWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  xmm4,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si ecx,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si ecx,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si ecx,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si ecx,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[ecx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si ecx,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si ecx,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si ecx,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si ecx,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 05 34 12 00 00 	vmovd  DWORD PTR ds:0x1234,xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3d 34 12 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR ds:0x1234
+[ 	]*[a-f0-9]+:	c5 fd 7e 45 00       	vmovd  DWORD PTR \[ebp\+0x0\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 7d 00       	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x0\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 85 99 00 00 00 	vmovd  DWORD PTR \[ebp\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bd 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 25 99 00 00 00 	vmovd  DWORD PTR \[eiz\*1\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 25 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*1\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 65 99 00 00 00 	vmovd  DWORD PTR \[eiz\*2\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 65 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eiz\*2\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 20 99 00 00 00 	vmovd  DWORD PTR \[eax\+eiz\*1\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 20 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*1\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 60 99 00 00 00 	vmovd  DWORD PTR \[eax\+eiz\*2\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 60 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+eiz\*2\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 98 99 00 00 00 	vmovd  DWORD PTR \[eax\+ebx\*4\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 98 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[eax\+ebx\*4\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 cc 99 00 00 00 	vmovd  DWORD PTR \[esp\+ecx\*8\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc cc 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[esp\+ecx\*8\+0x99\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 15 99 00 00 00 	vmovd  DWORD PTR \[ebp\+edx\*1\+0x99\],xmm0
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 15 99 00 00 00 	vcvtsi2sd xmm7,xmm0,DWORD PTR \[ebp\+edx\*1\+0x99\]
+#pass
diff --git a/gas/testsuite/gas/i386/avx-scalar.d b/gas/testsuite/gas/i386/avx-scalar.d
new file mode 100644
index 0000000..b1a89e5
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-scalar.d
@@ -0,0 +1,567 @@
+#as: -mavxscalar=256
+#objdump: -dw
+#name: i386 AVX scalar insns
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  %ecx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ssl \(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fd 7e 05 34 12 00 00 	vmovd  %xmm0,0x1234
+[ 	]*[a-f0-9]+:	c5 ff 2a 3d 34 12 00 00 	vcvtsi2sdl 0x1234,%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 45 00       	vmovd  %xmm0,0x0\(%ebp\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 7d 00       	vcvtsi2sdl 0x0\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 24       	vmovd  %xmm0,\(%esp\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 24       	vcvtsi2sdl \(%esp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 85 99 00 00 00 	vmovd  %xmm0,0x99\(%ebp\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 25 99 00 00 00 	vmovd  %xmm0,0x99\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 25 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 65 99 00 00 00 	vmovd  %xmm0,0x99\(,%eiz,2\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 65 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 20 99 00 00 00 	vmovd  %xmm0,0x99\(%eax,%eiz,1\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 20 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 60 99 00 00 00 	vmovd  %xmm0,0x99\(%eax,%eiz,2\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 60 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 98 99 00 00 00 	vmovd  %xmm0,0x99\(%eax,%ebx,4\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 98 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%ebx,4\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 cc 99 00 00 00 	vmovd  %xmm0,0x99\(%esp,%ecx,8\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc cc 99 00 00 00 	vcvtsi2sdl 0x99\(%esp,%ecx,8\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 15 99 00 00 00 	vmovd  %xmm0,0x99\(%ebp,%edx,1\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 15 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp,%edx,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  %ecx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%ecx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%ecx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si \(%ecx\),%ecx
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sdl \(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ssl \(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ssl \(%ecx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fd 7e 05 34 12 00 00 	vmovd  %xmm0,0x1234
+[ 	]*[a-f0-9]+:	c5 ff 2a 3d 34 12 00 00 	vcvtsi2sdl 0x1234,%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 45 00       	vmovd  %xmm0,0x0\(%ebp\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 7d 00       	vcvtsi2sdl 0x0\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 85 99 00 00 00 	vmovd  %xmm0,0x99\(%ebp\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 25 99 00 00 00 	vmovd  %xmm0,0x99\(,%eiz,1\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 25 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 04 65 99 00 00 00 	vmovd  %xmm0,0x99\(,%eiz,2\)
+[ 	]*[a-f0-9]+:	c5 ff 2a 3c 65 99 00 00 00 	vcvtsi2sdl 0x99\(,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 20 99 00 00 00 	vmovd  %xmm0,0x99\(%eax,%eiz,1\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 20 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,1\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 60 99 00 00 00 	vmovd  %xmm0,0x99\(%eax,%eiz,2\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 60 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%eiz,2\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 98 99 00 00 00 	vmovd  %xmm0,0x99\(%eax,%ebx,4\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 98 99 00 00 00 	vcvtsi2sdl 0x99\(%eax,%ebx,4\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 cc 99 00 00 00 	vmovd  %xmm0,0x99\(%esp,%ecx,8\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc cc 99 00 00 00 	vcvtsi2sdl 0x99\(%esp,%ecx,8\),%xmm0,%xmm7
+[ 	]*[a-f0-9]+:	c5 fd 7e 84 15 99 00 00 00 	vmovd  %xmm0,0x99\(%ebp,%edx,1\)
+[ 	]*[a-f0-9]+:	c5 ff 2a bc 15 99 00 00 00 	vcvtsi2sdl 0x99\(%ebp,%edx,1\),%xmm0,%xmm7
+#pass
diff --git a/gas/testsuite/gas/i386/avx-scalar.s b/gas/testsuite/gas/i386/avx-scalar.s
new file mode 100644
index 0000000..fbda32e
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx-scalar.s
@@ -0,0 +1,639 @@
+# Check AVX scalar instructions
+
+	.allow_index_reg
+	.text
+_start:
+
+# Tests for op xmm/mem64, xmm
+	vcomisd %xmm4,%xmm6
+	vcomisd (%ecx),%xmm4
+	vucomisd %xmm4,%xmm6
+	vucomisd (%ecx),%xmm4
+
+# Tests for op mem64, xmm
+	vmovsd (%ecx),%xmm4
+
+# Tests for op xmm, mem64
+	vmovsd %xmm4,(%ecx)
+
+# Tests for op xmm, regq/mem64
+# Tests for op regq/mem64, xmm
+	vmovq %xmm4,(%ecx)
+	vmovq (%ecx),%xmm4
+
+# Tests for op xmm/mem64, regl
+	vcvtsd2si %xmm4,%ecx
+	vcvtsd2si (%ecx),%ecx
+	vcvttsd2si %xmm4,%ecx
+	vcvttsd2si (%ecx),%ecx
+
+# Tests for op imm8, xmm/mem64, xmm, xmm
+	vcmpsd $7,%xmm4,%xmm6,%xmm2
+	vcmpsd $7,(%ecx),%xmm6,%xmm2
+	vroundsd $7,%xmm4,%xmm6,%xmm2
+	vroundsd $7,(%ecx),%xmm6,%xmm2
+
+# Tests for op xmm/mem64, xmm, xmm
+	vaddsd %xmm4,%xmm6,%xmm2
+	vaddsd (%ecx),%xmm6,%xmm2
+	vcvtsd2ss %xmm4,%xmm6,%xmm2
+	vcvtsd2ss (%ecx),%xmm6,%xmm2
+	vdivsd %xmm4,%xmm6,%xmm2
+	vdivsd (%ecx),%xmm6,%xmm2
+	vmaxsd %xmm4,%xmm6,%xmm2
+	vmaxsd (%ecx),%xmm6,%xmm2
+	vminsd %xmm4,%xmm6,%xmm2
+	vminsd (%ecx),%xmm6,%xmm2
+	vmulsd %xmm4,%xmm6,%xmm2
+	vmulsd (%ecx),%xmm6,%xmm2
+	vsqrtsd %xmm4,%xmm6,%xmm2
+	vsqrtsd (%ecx),%xmm6,%xmm2
+	vsubsd %xmm4,%xmm6,%xmm2
+	vsubsd (%ecx),%xmm6,%xmm2
+	vcmpeqsd %xmm4,%xmm6,%xmm2
+	vcmpeqsd (%ecx),%xmm6,%xmm2
+	vcmpltsd %xmm4,%xmm6,%xmm2
+	vcmpltsd (%ecx),%xmm6,%xmm2
+	vcmplesd %xmm4,%xmm6,%xmm2
+	vcmplesd (%ecx),%xmm6,%xmm2
+	vcmpunordsd %xmm4,%xmm6,%xmm2
+	vcmpunordsd (%ecx),%xmm6,%xmm2
+	vcmpneqsd %xmm4,%xmm6,%xmm2
+	vcmpneqsd (%ecx),%xmm6,%xmm2
+	vcmpnltsd %xmm4,%xmm6,%xmm2
+	vcmpnltsd (%ecx),%xmm6,%xmm2
+	vcmpnlesd %xmm4,%xmm6,%xmm2
+	vcmpnlesd (%ecx),%xmm6,%xmm2
+	vcmpordsd %xmm4,%xmm6,%xmm2
+	vcmpordsd (%ecx),%xmm6,%xmm2
+	vcmpeq_uqsd %xmm4,%xmm6,%xmm2
+	vcmpeq_uqsd (%ecx),%xmm6,%xmm2
+	vcmpngesd %xmm4,%xmm6,%xmm2
+	vcmpngesd (%ecx),%xmm6,%xmm2
+	vcmpngtsd %xmm4,%xmm6,%xmm2
+	vcmpngtsd (%ecx),%xmm6,%xmm2
+	vcmpfalsesd %xmm4,%xmm6,%xmm2
+	vcmpfalsesd (%ecx),%xmm6,%xmm2
+	vcmpneq_oqsd %xmm4,%xmm6,%xmm2
+	vcmpneq_oqsd (%ecx),%xmm6,%xmm2
+	vcmpgesd %xmm4,%xmm6,%xmm2
+	vcmpgesd (%ecx),%xmm6,%xmm2
+	vcmpgtsd %xmm4,%xmm6,%xmm2
+	vcmpgtsd (%ecx),%xmm6,%xmm2
+	vcmptruesd %xmm4,%xmm6,%xmm2
+	vcmptruesd (%ecx),%xmm6,%xmm2
+	vcmpeq_ossd %xmm4,%xmm6,%xmm2
+	vcmpeq_ossd (%ecx),%xmm6,%xmm2
+	vcmplt_oqsd %xmm4,%xmm6,%xmm2
+	vcmplt_oqsd (%ecx),%xmm6,%xmm2
+	vcmple_oqsd %xmm4,%xmm6,%xmm2
+	vcmple_oqsd (%ecx),%xmm6,%xmm2
+	vcmpunord_ssd %xmm4,%xmm6,%xmm2
+	vcmpunord_ssd (%ecx),%xmm6,%xmm2
+	vcmpneq_ussd %xmm4,%xmm6,%xmm2
+	vcmpneq_ussd (%ecx),%xmm6,%xmm2
+	vcmpnlt_uqsd %xmm4,%xmm6,%xmm2
+	vcmpnlt_uqsd (%ecx),%xmm6,%xmm2
+	vcmpnle_uqsd %xmm4,%xmm6,%xmm2
+	vcmpnle_uqsd (%ecx),%xmm6,%xmm2
+	vcmpord_ssd %xmm4,%xmm6,%xmm2
+	vcmpord_ssd (%ecx),%xmm6,%xmm2
+	vcmpeq_ussd %xmm4,%xmm6,%xmm2
+	vcmpeq_ussd (%ecx),%xmm6,%xmm2
+	vcmpnge_uqsd %xmm4,%xmm6,%xmm2
+	vcmpnge_uqsd (%ecx),%xmm6,%xmm2
+	vcmpngt_uqsd %xmm4,%xmm6,%xmm2
+	vcmpngt_uqsd (%ecx),%xmm6,%xmm2
+	vcmpfalse_ossd %xmm4,%xmm6,%xmm2
+	vcmpfalse_ossd (%ecx),%xmm6,%xmm2
+	vcmpneq_ossd %xmm4,%xmm6,%xmm2
+	vcmpneq_ossd (%ecx),%xmm6,%xmm2
+	vcmpge_oqsd %xmm4,%xmm6,%xmm2
+	vcmpge_oqsd (%ecx),%xmm6,%xmm2
+	vcmpgt_oqsd %xmm4,%xmm6,%xmm2
+	vcmpgt_oqsd (%ecx),%xmm6,%xmm2
+	vcmptrue_ussd %xmm4,%xmm6,%xmm2
+	vcmptrue_ussd (%ecx),%xmm6,%xmm2
+
+# Tests for op xmm/mem32, xmm, xmm
+	vaddss %xmm4,%xmm6,%xmm2
+	vaddss (%ecx),%xmm6,%xmm2
+	vcvtss2sd %xmm4,%xmm6,%xmm2
+	vcvtss2sd (%ecx),%xmm6,%xmm2
+	vdivss %xmm4,%xmm6,%xmm2
+	vdivss (%ecx),%xmm6,%xmm2
+	vmaxss %xmm4,%xmm6,%xmm2
+	vmaxss (%ecx),%xmm6,%xmm2
+	vminss %xmm4,%xmm6,%xmm2
+	vminss (%ecx),%xmm6,%xmm2
+	vmulss %xmm4,%xmm6,%xmm2
+	vmulss (%ecx),%xmm6,%xmm2
+	vrcpss %xmm4,%xmm6,%xmm2
+	vrcpss (%ecx),%xmm6,%xmm2
+	vrsqrtss %xmm4,%xmm6,%xmm2
+	vrsqrtss (%ecx),%xmm6,%xmm2
+	vsqrtss %xmm4,%xmm6,%xmm2
+	vsqrtss (%ecx),%xmm6,%xmm2
+	vsubss %xmm4,%xmm6,%xmm2
+	vsubss (%ecx),%xmm6,%xmm2
+	vcmpeqss %xmm4,%xmm6,%xmm2
+	vcmpeqss (%ecx),%xmm6,%xmm2
+	vcmpltss %xmm4,%xmm6,%xmm2
+	vcmpltss (%ecx),%xmm6,%xmm2
+	vcmpless %xmm4,%xmm6,%xmm2
+	vcmpless (%ecx),%xmm6,%xmm2
+	vcmpunordss %xmm4,%xmm6,%xmm2
+	vcmpunordss (%ecx),%xmm6,%xmm2
+	vcmpneqss %xmm4,%xmm6,%xmm2
+	vcmpneqss (%ecx),%xmm6,%xmm2
+	vcmpnltss %xmm4,%xmm6,%xmm2
+	vcmpnltss (%ecx),%xmm6,%xmm2
+	vcmpnless %xmm4,%xmm6,%xmm2
+	vcmpnless (%ecx),%xmm6,%xmm2
+	vcmpordss %xmm4,%xmm6,%xmm2
+	vcmpordss (%ecx),%xmm6,%xmm2
+	vcmpeq_uqss %xmm4,%xmm6,%xmm2
+	vcmpeq_uqss (%ecx),%xmm6,%xmm2
+	vcmpngess %xmm4,%xmm6,%xmm2
+	vcmpngess (%ecx),%xmm6,%xmm2
+	vcmpngtss %xmm4,%xmm6,%xmm2
+	vcmpngtss (%ecx),%xmm6,%xmm2
+	vcmpfalsess %xmm4,%xmm6,%xmm2
+	vcmpfalsess (%ecx),%xmm6,%xmm2
+	vcmpneq_oqss %xmm4,%xmm6,%xmm2
+	vcmpneq_oqss (%ecx),%xmm6,%xmm2
+	vcmpgess %xmm4,%xmm6,%xmm2
+	vcmpgess (%ecx),%xmm6,%xmm2
+	vcmpgtss %xmm4,%xmm6,%xmm2
+	vcmpgtss (%ecx),%xmm6,%xmm2
+	vcmptruess %xmm4,%xmm6,%xmm2
+	vcmptruess (%ecx),%xmm6,%xmm2
+	vcmpeq_osss %xmm4,%xmm6,%xmm2
+	vcmpeq_osss (%ecx),%xmm6,%xmm2
+	vcmplt_oqss %xmm4,%xmm6,%xmm2
+	vcmplt_oqss (%ecx),%xmm6,%xmm2
+	vcmple_oqss %xmm4,%xmm6,%xmm2
+	vcmple_oqss (%ecx),%xmm6,%xmm2
+	vcmpunord_sss %xmm4,%xmm6,%xmm2
+	vcmpunord_sss (%ecx),%xmm6,%xmm2
+	vcmpneq_usss %xmm4,%xmm6,%xmm2
+	vcmpneq_usss (%ecx),%xmm6,%xmm2
+	vcmpnlt_uqss %xmm4,%xmm6,%xmm2
+	vcmpnlt_uqss (%ecx),%xmm6,%xmm2
+	vcmpnle_uqss %xmm4,%xmm6,%xmm2
+	vcmpnle_uqss (%ecx),%xmm6,%xmm2
+	vcmpord_sss %xmm4,%xmm6,%xmm2
+	vcmpord_sss (%ecx),%xmm6,%xmm2
+	vcmpeq_usss %xmm4,%xmm6,%xmm2
+	vcmpeq_usss (%ecx),%xmm6,%xmm2
+	vcmpnge_uqss %xmm4,%xmm6,%xmm2
+	vcmpnge_uqss (%ecx),%xmm6,%xmm2
+	vcmpngt_uqss %xmm4,%xmm6,%xmm2
+	vcmpngt_uqss (%ecx),%xmm6,%xmm2
+	vcmpfalse_osss %xmm4,%xmm6,%xmm2
+	vcmpfalse_osss (%ecx),%xmm6,%xmm2
+	vcmpneq_osss %xmm4,%xmm6,%xmm2
+	vcmpneq_osss (%ecx),%xmm6,%xmm2
+	vcmpge_oqss %xmm4,%xmm6,%xmm2
+	vcmpge_oqss (%ecx),%xmm6,%xmm2
+	vcmpgt_oqss %xmm4,%xmm6,%xmm2
+	vcmpgt_oqss (%ecx),%xmm6,%xmm2
+	vcmptrue_usss %xmm4,%xmm6,%xmm2
+	vcmptrue_usss (%ecx),%xmm6,%xmm2
+
+# Tests for op xmm/mem32, xmm
+	vcomiss %xmm4,%xmm6
+	vcomiss (%ecx),%xmm4
+	vucomiss %xmm4,%xmm6
+	vucomiss (%ecx),%xmm4
+
+# Tests for op mem32, xmm
+	vmovss (%ecx),%xmm4
+
+# Tests for op xmm, mem32
+	vmovss %xmm4,(%ecx)
+
+# Tests for op xmm, regl/mem32
+# Tests for op regl/mem32, xmm
+	vmovd %xmm4,%ecx
+	vmovd %xmm4,(%ecx)
+	vmovd %ecx,%xmm4
+	vmovd (%ecx),%xmm4
+
+# Tests for op xmm/mem32, regl
+	vcvtss2si %xmm4,%ecx
+	vcvtss2si (%ecx),%ecx
+	vcvttss2si %xmm4,%ecx
+	vcvttss2si (%ecx),%ecx
+
+# Tests for op regl/mem32, xmm, xmm
+	vcvtsi2sd %ecx,%xmm4,%xmm6
+	vcvtsi2sd (%ecx),%xmm4,%xmm6
+	vcvtsi2ss %ecx,%xmm4,%xmm6
+	vcvtsi2ss (%ecx),%xmm4,%xmm6
+
+# Tests for op imm8, xmm/mem32, xmm, xmm
+	vcmpss $7,%xmm4,%xmm6,%xmm2
+	vcmpss $7,(%ecx),%xmm6,%xmm2
+	vroundss $7,%xmm4,%xmm6,%xmm2
+	vroundss $7,(%ecx),%xmm6,%xmm2
+
+# Tests for op xmm, xmm
+	vmovq %xmm4,%xmm6
+
+# Tests for op xmm, xmm, xmm
+	vmovsd %xmm4,%xmm6,%xmm2
+	vmovss %xmm4,%xmm6,%xmm2
+
+#Tests with different memory and register operands.
+	vmovd %xmm0,0x1234
+	vcvtsi2sdl 0x1234,%xmm0,%xmm7
+	vmovd %xmm0,(%ebp)
+	vcvtsi2sdl (%ebp),%xmm0,%xmm7
+	vmovd %xmm0,(%esp)
+	vcvtsi2sdl (%esp),%xmm0,%xmm7
+	vmovd %xmm0,0x99(%ebp)
+	vcvtsi2sdl 0x99(%ebp),%xmm0,%xmm7
+	vmovd %xmm0,0x99(,%eiz)
+	vcvtsi2sdl 0x99(,%eiz),%xmm0,%xmm7
+	vmovd %xmm0,0x99(,%eiz,2)
+	vcvtsi2sdl 0x99(,%eiz,2),%xmm0,%xmm7
+	vmovd %xmm0,0x99(%eax,%eiz)
+	vcvtsi2sdl 0x99(%eax,%eiz),%xmm0,%xmm7
+	vmovd %xmm0,0x99(%eax,%eiz,2)
+	vcvtsi2sdl 0x99(%eax,%eiz,2),%xmm0,%xmm7
+	vmovd %xmm0,0x99(%eax,%ebx,4)
+	vcvtsi2sdl 0x99(%eax,%ebx,4),%xmm0,%xmm7
+	vmovd %xmm0,0x99(%esp,%ecx,8)
+	vcvtsi2sdl 0x99(%esp,%ecx,8),%xmm0,%xmm7
+	vmovd %xmm0,0x99(%ebp,%edx,1)
+	vcvtsi2sdl 0x99(%ebp,%edx,1),%xmm0,%xmm7
+
+	.intel_syntax noprefix
+
+# Tests for op xmm/mem64, xmm
+	vcomisd xmm6,xmm4
+	vcomisd xmm4,QWORD PTR [ecx]
+	vcomisd xmm4,[ecx]
+	vucomisd xmm6,xmm4
+	vucomisd xmm4,QWORD PTR [ecx]
+	vucomisd xmm4,[ecx]
+
+# Tests for op mem64, xmm
+	vmovsd xmm4,QWORD PTR [ecx]
+	vmovsd xmm4,[ecx]
+
+# Tests for op xmm, mem64
+	vmovsd QWORD PTR [ecx],xmm4
+	vmovsd [ecx],xmm4
+
+# Tests for op xmm, regq/mem64
+# Tests for op regq/mem64, xmm
+	vmovq QWORD PTR [ecx],xmm4
+	vmovq xmm4,QWORD PTR [ecx]
+	vmovq [ecx],xmm4
+	vmovq xmm4,[ecx]
+
+# Tests for op xmm/mem64, regl
+	vcvtsd2si ecx,xmm4
+	vcvtsd2si ecx,QWORD PTR [ecx]
+	vcvtsd2si ecx,[ecx]
+	vcvttsd2si ecx,xmm4
+	vcvttsd2si ecx,QWORD PTR [ecx]
+	vcvttsd2si ecx,[ecx]
+
+# Tests for op imm8, xmm/mem64, xmm, xmm
+	vcmpsd xmm2,xmm6,xmm4,7
+	vcmpsd xmm2,xmm6,QWORD PTR [ecx],7
+	vcmpsd xmm2,xmm6,[ecx],7
+	vroundsd xmm2,xmm6,xmm4,7
+	vroundsd xmm2,xmm6,QWORD PTR [ecx],7
+	vroundsd xmm2,xmm6,[ecx],7
+
+# Tests for op xmm/mem64, xmm, xmm
+	vaddsd xmm2,xmm6,xmm4
+	vaddsd xmm2,xmm6,QWORD PTR [ecx]
+	vaddsd xmm2,xmm6,[ecx]
+	vcvtsd2ss xmm2,xmm6,xmm4
+	vcvtsd2ss xmm2,xmm6,QWORD PTR [ecx]
+	vcvtsd2ss xmm2,xmm6,[ecx]
+	vdivsd xmm2,xmm6,xmm4
+	vdivsd xmm2,xmm6,QWORD PTR [ecx]
+	vdivsd xmm2,xmm6,[ecx]
+	vmaxsd xmm2,xmm6,xmm4
+	vmaxsd xmm2,xmm6,QWORD PTR [ecx]
+	vmaxsd xmm2,xmm6,[ecx]
+	vminsd xmm2,xmm6,xmm4
+	vminsd xmm2,xmm6,QWORD PTR [ecx]
+	vminsd xmm2,xmm6,[ecx]
+	vmulsd xmm2,xmm6,xmm4
+	vmulsd xmm2,xmm6,QWORD PTR [ecx]
+	vmulsd xmm2,xmm6,[ecx]
+	vsqrtsd xmm2,xmm6,xmm4
+	vsqrtsd xmm2,xmm6,QWORD PTR [ecx]
+	vsqrtsd xmm2,xmm6,[ecx]
+	vsubsd xmm2,xmm6,xmm4
+	vsubsd xmm2,xmm6,QWORD PTR [ecx]
+	vsubsd xmm2,xmm6,[ecx]
+	vcmpeqsd xmm2,xmm6,xmm4
+	vcmpeqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpeqsd xmm2,xmm6,[ecx]
+	vcmpltsd xmm2,xmm6,xmm4
+	vcmpltsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpltsd xmm2,xmm6,[ecx]
+	vcmplesd xmm2,xmm6,xmm4
+	vcmplesd xmm2,xmm6,QWORD PTR [ecx]
+	vcmplesd xmm2,xmm6,[ecx]
+	vcmpunordsd xmm2,xmm6,xmm4
+	vcmpunordsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpunordsd xmm2,xmm6,[ecx]
+	vcmpneqsd xmm2,xmm6,xmm4
+	vcmpneqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpneqsd xmm2,xmm6,[ecx]
+	vcmpnltsd xmm2,xmm6,xmm4
+	vcmpnltsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpnltsd xmm2,xmm6,[ecx]
+	vcmpnlesd xmm2,xmm6,xmm4
+	vcmpnlesd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpnlesd xmm2,xmm6,[ecx]
+	vcmpordsd xmm2,xmm6,xmm4
+	vcmpordsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpordsd xmm2,xmm6,[ecx]
+	vcmpeq_uqsd xmm2,xmm6,xmm4
+	vcmpeq_uqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpeq_uqsd xmm2,xmm6,[ecx]
+	vcmpngesd xmm2,xmm6,xmm4
+	vcmpngesd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpngesd xmm2,xmm6,[ecx]
+	vcmpngtsd xmm2,xmm6,xmm4
+	vcmpngtsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpngtsd xmm2,xmm6,[ecx]
+	vcmpfalsesd xmm2,xmm6,xmm4
+	vcmpfalsesd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpfalsesd xmm2,xmm6,[ecx]
+	vcmpneq_oqsd xmm2,xmm6,xmm4
+	vcmpneq_oqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpneq_oqsd xmm2,xmm6,[ecx]
+	vcmpgesd xmm2,xmm6,xmm4
+	vcmpgesd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpgesd xmm2,xmm6,[ecx]
+	vcmpgtsd xmm2,xmm6,xmm4
+	vcmpgtsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpgtsd xmm2,xmm6,[ecx]
+	vcmptruesd xmm2,xmm6,xmm4
+	vcmptruesd xmm2,xmm6,QWORD PTR [ecx]
+	vcmptruesd xmm2,xmm6,[ecx]
+	vcmpeq_ossd xmm2,xmm6,xmm4
+	vcmpeq_ossd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpeq_ossd xmm2,xmm6,[ecx]
+	vcmplt_oqsd xmm2,xmm6,xmm4
+	vcmplt_oqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmplt_oqsd xmm2,xmm6,[ecx]
+	vcmple_oqsd xmm2,xmm6,xmm4
+	vcmple_oqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmple_oqsd xmm2,xmm6,[ecx]
+	vcmpunord_ssd xmm2,xmm6,xmm4
+	vcmpunord_ssd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpunord_ssd xmm2,xmm6,[ecx]
+	vcmpneq_ussd xmm2,xmm6,xmm4
+	vcmpneq_ussd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpneq_ussd xmm2,xmm6,[ecx]
+	vcmpnlt_uqsd xmm2,xmm6,xmm4
+	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpnlt_uqsd xmm2,xmm6,[ecx]
+	vcmpnle_uqsd xmm2,xmm6,xmm4
+	vcmpnle_uqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpnle_uqsd xmm2,xmm6,[ecx]
+	vcmpord_ssd xmm2,xmm6,xmm4
+	vcmpord_ssd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpord_ssd xmm2,xmm6,[ecx]
+	vcmpeq_ussd xmm2,xmm6,xmm4
+	vcmpeq_ussd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpeq_ussd xmm2,xmm6,[ecx]
+	vcmpnge_uqsd xmm2,xmm6,xmm4
+	vcmpnge_uqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpnge_uqsd xmm2,xmm6,[ecx]
+	vcmpngt_uqsd xmm2,xmm6,xmm4
+	vcmpngt_uqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpngt_uqsd xmm2,xmm6,[ecx]
+	vcmpfalse_ossd xmm2,xmm6,xmm4
+	vcmpfalse_ossd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpfalse_ossd xmm2,xmm6,[ecx]
+	vcmpneq_ossd xmm2,xmm6,xmm4
+	vcmpneq_ossd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpneq_ossd xmm2,xmm6,[ecx]
+	vcmpge_oqsd xmm2,xmm6,xmm4
+	vcmpge_oqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpge_oqsd xmm2,xmm6,[ecx]
+	vcmpgt_oqsd xmm2,xmm6,xmm4
+	vcmpgt_oqsd xmm2,xmm6,QWORD PTR [ecx]
+	vcmpgt_oqsd xmm2,xmm6,[ecx]
+	vcmptrue_ussd xmm2,xmm6,xmm4
+	vcmptrue_ussd xmm2,xmm6,QWORD PTR [ecx]
+	vcmptrue_ussd xmm2,xmm6,[ecx]
+
+# Tests for op xmm/mem32, xmm, xmm
+	vaddss xmm2,xmm6,xmm4
+	vaddss xmm2,xmm6,DWORD PTR [ecx]
+	vaddss xmm2,xmm6,[ecx]
+	vcvtss2sd xmm2,xmm6,xmm4
+	vcvtss2sd xmm2,xmm6,DWORD PTR [ecx]
+	vcvtss2sd xmm2,xmm6,[ecx]
+	vdivss xmm2,xmm6,xmm4
+	vdivss xmm2,xmm6,DWORD PTR [ecx]
+	vdivss xmm2,xmm6,[ecx]
+	vmaxss xmm2,xmm6,xmm4
+	vmaxss xmm2,xmm6,DWORD PTR [ecx]
+	vmaxss xmm2,xmm6,[ecx]
+	vminss xmm2,xmm6,xmm4
+	vminss xmm2,xmm6,DWORD PTR [ecx]
+	vminss xmm2,xmm6,[ecx]
+	vmulss xmm2,xmm6,xmm4
+	vmulss xmm2,xmm6,DWORD PTR [ecx]
+	vmulss xmm2,xmm6,[ecx]
+	vrcpss xmm2,xmm6,xmm4
+	vrcpss xmm2,xmm6,DWORD PTR [ecx]
+	vrcpss xmm2,xmm6,[ecx]
+	vrsqrtss xmm2,xmm6,xmm4
+	vrsqrtss xmm2,xmm6,DWORD PTR [ecx]
+	vrsqrtss xmm2,xmm6,[ecx]
+	vsqrtss xmm2,xmm6,xmm4
+	vsqrtss xmm2,xmm6,DWORD PTR [ecx]
+	vsqrtss xmm2,xmm6,[ecx]
+	vsubss xmm2,xmm6,xmm4
+	vsubss xmm2,xmm6,DWORD PTR [ecx]
+	vsubss xmm2,xmm6,[ecx]
+	vcmpeqss xmm2,xmm6,xmm4
+	vcmpeqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpeqss xmm2,xmm6,[ecx]
+	vcmpltss xmm2,xmm6,xmm4
+	vcmpltss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpltss xmm2,xmm6,[ecx]
+	vcmpless xmm2,xmm6,xmm4
+	vcmpless xmm2,xmm6,DWORD PTR [ecx]
+	vcmpless xmm2,xmm6,[ecx]
+	vcmpunordss xmm2,xmm6,xmm4
+	vcmpunordss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpunordss xmm2,xmm6,[ecx]
+	vcmpneqss xmm2,xmm6,xmm4
+	vcmpneqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpneqss xmm2,xmm6,[ecx]
+	vcmpnltss xmm2,xmm6,xmm4
+	vcmpnltss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpnltss xmm2,xmm6,[ecx]
+	vcmpnless xmm2,xmm6,xmm4
+	vcmpnless xmm2,xmm6,DWORD PTR [ecx]
+	vcmpnless xmm2,xmm6,[ecx]
+	vcmpordss xmm2,xmm6,xmm4
+	vcmpordss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpordss xmm2,xmm6,[ecx]
+	vcmpeq_uqss xmm2,xmm6,xmm4
+	vcmpeq_uqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpeq_uqss xmm2,xmm6,[ecx]
+	vcmpngess xmm2,xmm6,xmm4
+	vcmpngess xmm2,xmm6,DWORD PTR [ecx]
+	vcmpngess xmm2,xmm6,[ecx]
+	vcmpngtss xmm2,xmm6,xmm4
+	vcmpngtss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpngtss xmm2,xmm6,[ecx]
+	vcmpfalsess xmm2,xmm6,xmm4
+	vcmpfalsess xmm2,xmm6,DWORD PTR [ecx]
+	vcmpfalsess xmm2,xmm6,[ecx]
+	vcmpneq_oqss xmm2,xmm6,xmm4
+	vcmpneq_oqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpneq_oqss xmm2,xmm6,[ecx]
+	vcmpgess xmm2,xmm6,xmm4
+	vcmpgess xmm2,xmm6,DWORD PTR [ecx]
+	vcmpgess xmm2,xmm6,[ecx]
+	vcmpgtss xmm2,xmm6,xmm4
+	vcmpgtss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpgtss xmm2,xmm6,[ecx]
+	vcmptruess xmm2,xmm6,xmm4
+	vcmptruess xmm2,xmm6,DWORD PTR [ecx]
+	vcmptruess xmm2,xmm6,[ecx]
+	vcmpeq_osss xmm2,xmm6,xmm4
+	vcmpeq_osss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpeq_osss xmm2,xmm6,[ecx]
+	vcmplt_oqss xmm2,xmm6,xmm4
+	vcmplt_oqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmplt_oqss xmm2,xmm6,[ecx]
+	vcmple_oqss xmm2,xmm6,xmm4
+	vcmple_oqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmple_oqss xmm2,xmm6,[ecx]
+	vcmpunord_sss xmm2,xmm6,xmm4
+	vcmpunord_sss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpunord_sss xmm2,xmm6,[ecx]
+	vcmpneq_usss xmm2,xmm6,xmm4
+	vcmpneq_usss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpneq_usss xmm2,xmm6,[ecx]
+	vcmpnlt_uqss xmm2,xmm6,xmm4
+	vcmpnlt_uqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpnlt_uqss xmm2,xmm6,[ecx]
+	vcmpnle_uqss xmm2,xmm6,xmm4
+	vcmpnle_uqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpnle_uqss xmm2,xmm6,[ecx]
+	vcmpord_sss xmm2,xmm6,xmm4
+	vcmpord_sss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpord_sss xmm2,xmm6,[ecx]
+	vcmpeq_usss xmm2,xmm6,xmm4
+	vcmpeq_usss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpeq_usss xmm2,xmm6,[ecx]
+	vcmpnge_uqss xmm2,xmm6,xmm4
+	vcmpnge_uqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpnge_uqss xmm2,xmm6,[ecx]
+	vcmpngt_uqss xmm2,xmm6,xmm4
+	vcmpngt_uqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpngt_uqss xmm2,xmm6,[ecx]
+	vcmpfalse_osss xmm2,xmm6,xmm4
+	vcmpfalse_osss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpfalse_osss xmm2,xmm6,[ecx]
+	vcmpneq_osss xmm2,xmm6,xmm4
+	vcmpneq_osss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpneq_osss xmm2,xmm6,[ecx]
+	vcmpge_oqss xmm2,xmm6,xmm4
+	vcmpge_oqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpge_oqss xmm2,xmm6,[ecx]
+	vcmpgt_oqss xmm2,xmm6,xmm4
+	vcmpgt_oqss xmm2,xmm6,DWORD PTR [ecx]
+	vcmpgt_oqss xmm2,xmm6,[ecx]
+	vcmptrue_usss xmm2,xmm6,xmm4
+	vcmptrue_usss xmm2,xmm6,DWORD PTR [ecx]
+	vcmptrue_usss xmm2,xmm6,[ecx]
+
+# Tests for op xmm/mem32, xmm
+	vcomiss xmm6,xmm4
+	vcomiss xmm4,DWORD PTR [ecx]
+	vcomiss xmm4,[ecx]
+	vucomiss xmm6,xmm4
+	vucomiss xmm4,DWORD PTR [ecx]
+	vucomiss xmm4,[ecx]
+
+# Tests for op mem32, xmm
+	vmovss xmm4,DWORD PTR [ecx]
+	vmovss xmm4,[ecx]
+
+# Tests for op xmm, mem32
+	vmovss DWORD PTR [ecx],xmm4
+	vmovss [ecx],xmm4
+
+# Tests for op xmm, regl/mem32
+# Tests for op regl/mem32, xmm
+	vmovd ecx,xmm4
+	vmovd DWORD PTR [ecx],xmm4
+	vmovd xmm4,ecx
+	vmovd xmm4,DWORD PTR [ecx]
+	vmovd [ecx],xmm4
+	vmovd xmm4,[ecx]
+
+# Tests for op xmm/mem32, regl
+	vcvtss2si ecx,xmm4
+	vcvtss2si ecx,DWORD PTR [ecx]
+	vcvtss2si ecx,[ecx]
+	vcvttss2si ecx,xmm4
+	vcvttss2si ecx,DWORD PTR [ecx]
+	vcvttss2si ecx,[ecx]
+
+# Tests for op regl/mem32, xmm, xmm
+	vcvtsi2sd xmm6,xmm4,ecx
+	vcvtsi2sd xmm6,xmm4,DWORD PTR [ecx]
+	vcvtsi2sd xmm6,xmm4,[ecx]
+	vcvtsi2ss xmm6,xmm4,ecx
+	vcvtsi2ss xmm6,xmm4,DWORD PTR [ecx]
+	vcvtsi2ss xmm6,xmm4,[ecx]
+
+# Tests for op imm8, xmm/mem32, xmm, xmm
+	vcmpss xmm2,xmm6,xmm4,7
+	vcmpss xmm2,xmm6,DWORD PTR [ecx],7
+	vcmpss xmm2,xmm6,[ecx],7
+	vroundss xmm2,xmm6,xmm4,7
+	vroundss xmm2,xmm6,DWORD PTR [ecx],7
+	vroundss xmm2,xmm6,[ecx],7
+
+# Tests for op xmm, xmm
+	vmovq xmm6,xmm4
+
+# Tests for op xmm, xmm, xmm
+	vmovsd xmm2,xmm6,xmm4
+	vmovss xmm2,xmm6,xmm4
+
+#Tests with different memory and register operands.
+	vmovd DWORD PTR ds:0x1234,xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR ds:0x1234
+	vmovd DWORD PTR [ebp],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [ebp]
+	vmovd DWORD PTR [ebp+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [ebp+0x99]
+	vmovd DWORD PTR [eiz*1+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [eiz*1+0x99]
+	vmovd DWORD PTR [eiz*2+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [eiz*2+0x99]
+	vmovd DWORD PTR [eax+eiz*1+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [eax+eiz*1+0x99]
+	vmovd DWORD PTR [eax+eiz*2+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [eax+eiz*2+0x99]
+	vmovd DWORD PTR [eax+ebx*4+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [eax+ebx*4+0x99]
+	vmovd DWORD PTR [esp+ecx*8+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [esp+ecx*8+0x99]
+	vmovd DWORD PTR [ebp+edx*1+0x99],xmm0
+	vcvtsi2sd xmm7,xmm0,DWORD PTR [ebp+edx*1+0x99]
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 661d7a0..c53ca3b 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -135,6 +135,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "clmul-intel"
     run_dump_test "avx"
     run_dump_test "avx-intel"
+    run_dump_test "avx-scalar"
+    run_dump_test "avx-scalar-intel"
     run_dump_test "sse2avx"
     run_list_test "inval-avx" "-al"
     run_dump_test "sse-check"
@@ -318,6 +320,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-clmul-intel"
     run_dump_test "x86-64-avx"
     run_dump_test "x86-64-avx-intel"
+    run_dump_test "x86-64-avx-scalar"
+    run_dump_test "x86-64-avx-scalar-intel"
     run_dump_test "x86-64-sse2avx"
     run_list_test "x86-64-inval-avx" "-al"
     run_dump_test "x86-64-sse-check"
diff --git a/gas/testsuite/gas/i386/x86-64-avx-scalar-intel.d b/gas/testsuite/gas/i386/x86-64-avx-scalar-intel.d
new file mode 100644
index 0000000..8766c7c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-scalar-intel.d
@@ -0,0 +1,636 @@
+#as: -mavxscalar=256
+#objdump: -dwMintel
+#name: x86-64 AVX scalar insns (Intel disassembly)
+#source: x86-64-avx-scalar.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  xmm4,rcx
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  xmm4,rcx
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si ecx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si ecx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d cc       	vcvtsd2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d 09       	vcvtsd2si rcx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c cc       	vcvttsd2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c 09       	vcvttsd2si rcx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 df 2a f1       	vcvtsi2sd xmm6,xmm4,rcx
+[ 	]*[a-f0-9]+:	c4 e1 df 2a 31       	vcvtsi2sd xmm6,xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 de 2a f1       	vcvtsi2ss xmm6,xmm4,rcx
+[ 	]*[a-f0-9]+:	c4 e1 de 2a 31       	vcvtsi2ss xmm6,xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si ecx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si ecx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d cc       	vcvtss2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d 09       	vcvtss2si rcx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c cc       	vcvttss2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c 09       	vcvttss2si rcx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 78 56 34 12 	vmovd  DWORD PTR ds:0x12345678,xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 78 56 34 12 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0x12345678
+[ 	]*[a-f0-9]+:	c5 7d 7e 45 00       	vmovd  DWORD PTR \[rbp\+0x0\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 7d 00       	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x0\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 24       	vmovd  DWORD PTR \[rsp\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 24       	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 85 99 00 00 00 	vmovd  DWORD PTR \[rbp\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bd 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x99\]
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 87 99 00 00 00 	vmovd  DWORD PTR \[r15\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bf 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r15\+0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 05 99 00 00 00 	vmovd  DWORD PTR \[rip\+0x99\],xmm8        # 4f9 <_start\+0x4f9>
+[ 	]*[a-f0-9]+:	c5 3f 2a 3d 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\]        # 501 <_start\+0x501>
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 24 99 00 00 00 	vmovd  DWORD PTR \[rsp\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+0x99\]
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 84 24 99 00 00 00 	vmovd  DWORD PTR \[r12\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 67 ff ff ff 	vmovd  DWORD PTR ds:0xffffffffffffff67,xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 65 67 ff ff ff 	vmovd  DWORD PTR \[riz\*2-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 65 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[riz\*2-0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 23 67 ff ff ff 	vmovd  DWORD PTR \[rbx\+riz\*1-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 23 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*1-0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 63 67 ff ff ff 	vmovd  DWORD PTR \[rbx\+riz\*2-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 63 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*2-0x99\]
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 bc 67 ff ff ff 	vmovd  DWORD PTR \[r12\+r15\*4-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc bc 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+r15\*4-0x99\]
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 f8 67 ff ff ff 	vmovd  DWORD PTR \[r8\+r15\*8-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc f8 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r8\+r15\*8-0x99\]
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 ad 67 ff ff ff 	vmovd  DWORD PTR \[rbp\+r13\*4-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc ad 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+r13\*4-0x99\]
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 24 67 ff ff ff 	vmovd  DWORD PTR \[rsp\+r12\*1-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc 24 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+r12\*1-0x99\]
+[ 	]*[a-f0-9]+:	c4 41 7d 7e c0       	vmovd  r8d,xmm8
+[ 	]*[a-f0-9]+:	c4 41 7f 2d c0       	vcvtsd2si r8d,xmm8
+[ 	]*[a-f0-9]+:	c4 41 3f 2a f8       	vcvtsi2sd xmm15,xmm8,r8d
+[ 	]*[a-f0-9]+:	c4 61 ff 2d 01       	vcvtsd2si r8,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 61 fe 2d 01       	vcvtss2si r8,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  xmm4,rcx
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  xmm4,rcx
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  QWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si ecx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si ecx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si ecx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si ecx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d cc       	vcvtsd2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d 09       	vcvtsd2si rcx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d 09       	vcvtsd2si rcx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c cc       	vcvttsd2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c 09       	vcvttsd2si rcx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c 09       	vcvttsd2si rcx,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 df 2a f1       	vcvtsi2sd xmm6,xmm4,rcx
+[ 	]*[a-f0-9]+:	c4 e1 df 2a 31       	vcvtsi2sd xmm6,xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 df 2a 31       	vcvtsi2sd xmm6,xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 de 2a f1       	vcvtsi2ss xmm6,xmm4,rcx
+[ 	]*[a-f0-9]+:	c4 e1 de 2a 31       	vcvtsi2ss xmm6,xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 de 2a 31       	vcvtsi2ss xmm6,xmm4,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd xmm2,xmm6,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  DWORD PTR \[rcx\],xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si ecx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si ecx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si ecx,xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si ecx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si ecx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d cc       	vcvtss2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d 09       	vcvtss2si rcx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d 09       	vcvtss2si rcx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c cc       	vcvttss2si rcx,xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c 09       	vcvttss2si rcx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c 09       	vcvttss2si rcx,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sd xmm6,xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss xmm6,xmm4,ecx
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ss xmm6,xmm4,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss xmm2,xmm6,xmm4,0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss xmm2,xmm6,xmm4
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 78 56 34 12 	vmovd  DWORD PTR ds:0x12345678,xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 78 56 34 12 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0x12345678
+[ 	]*[a-f0-9]+:	c5 7d 7e 45 00       	vmovd  DWORD PTR \[rbp\+0x0\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 7d 00       	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x0\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 85 99 00 00 00 	vmovd  DWORD PTR \[rbp\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bd 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+0x99\]
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 87 99 00 00 00 	vmovd  DWORD PTR \[r15\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bf 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r15\+0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 05 99 00 00 00 	vmovd  DWORD PTR \[rip\+0x99\],xmm8        # c32 <_start\+0xc32>
+[ 	]*[a-f0-9]+:	c5 3f 2a 3d 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\]        # c3a <_start\+0xc3a>
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 24 99 00 00 00 	vmovd  DWORD PTR \[rsp\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+0x99\]
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 84 24 99 00 00 00 	vmovd  DWORD PTR \[r12\+0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bc 24 99 00 00 00 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 67 ff ff ff 	vmovd  DWORD PTR ds:0xffffffffffffff67,xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 65 67 ff ff ff 	vmovd  DWORD PTR \[riz\*2-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 65 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[riz\*2-0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 23 67 ff ff ff 	vmovd  DWORD PTR \[rbx\+riz\*1-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 23 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*1-0x99\]
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 63 67 ff ff ff 	vmovd  DWORD PTR \[rbx\+riz\*2-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 63 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbx\+riz\*2-0x99\]
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 bc 67 ff ff ff 	vmovd  DWORD PTR \[r12\+r15\*4-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc bc 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r12\+r15\*4-0x99\]
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 f8 67 ff ff ff 	vmovd  DWORD PTR \[r8\+r15\*8-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc f8 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[r8\+r15\*8-0x99\]
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 a5 67 ff ff ff 	vmovd  DWORD PTR \[rbp\+r12\*4-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc a5 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rbp\+r12\*4-0x99\]
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 2c 67 ff ff ff 	vmovd  DWORD PTR \[rsp\+r13\*1-0x99\],xmm8
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc 2c 67 ff ff ff 	vcvtsi2sd xmm15,xmm8,DWORD PTR \[rsp\+r13\*1-0x99\]
+[ 	]*[a-f0-9]+:	c4 41 7d 7e c0       	vmovd  r8d,xmm8
+[ 	]*[a-f0-9]+:	c4 41 7f 2d c0       	vcvtsd2si r8d,xmm8
+[ 	]*[a-f0-9]+:	c4 41 3f 2a f8       	vcvtsi2sd xmm15,xmm8,r8d
+[ 	]*[a-f0-9]+:	c4 61 ff 2d 01       	vcvtsd2si r8,QWORD PTR \[rcx\]
+[ 	]*[a-f0-9]+:	c4 61 fe 2d 01       	vcvtss2si r8,DWORD PTR \[rcx\]
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx-scalar.d b/gas/testsuite/gas/i386/x86-64-avx-scalar.d
new file mode 100644
index 0000000..f93413d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-scalar.d
@@ -0,0 +1,635 @@
+#as: -mavxscalar=256
+#objdump: -dw
+#name: x86-64 AVX scalar insns
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  %rcx,%xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  %rcx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d cc       	vcvtsd2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d 09       	vcvtsd2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c cc       	vcvttsd2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c 09       	vcvttsd2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 df 2a f1       	vcvtsi2sd %rcx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 df 2a 31       	vcvtsi2sdq \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 de 2a f1       	vcvtsi2ss %rcx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 de 2a 31       	vcvtsi2ssq \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  %ecx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d cc       	vcvtss2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d 09       	vcvtss2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c cc       	vcvttss2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c 09       	vcvttss2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ssl \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 78 56 34 12 	vmovd  %xmm8,0x12345678
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 78 56 34 12 	vcvtsi2sdl 0x12345678,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 45 00       	vmovd  %xmm8,0x0\(%rbp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a 7d 00       	vcvtsi2sdl 0x0\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 24       	vmovd  %xmm8,\(%rsp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 24       	vcvtsi2sdl \(%rsp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 85 99 00 00 00 	vmovd  %xmm8,0x99\(%rbp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 87 99 00 00 00 	vmovd  %xmm8,0x99\(%r15\)
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bf 99 00 00 00 	vcvtsi2sdl 0x99\(%r15\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 05 99 00 00 00 	vmovd  %xmm8,0x99\(%rip\)        # 4f9 <_start\+0x4f9>
+[ 	]*[a-f0-9]+:	c5 3f 2a 3d 99 00 00 00 	vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15        # 501 <_start\+0x501>
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 24 99 00 00 00 	vmovd  %xmm8,0x99\(%rsp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%rsp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 84 24 99 00 00 00 	vmovd  %xmm8,0x99\(%r12\)
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%r12\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 67 ff ff ff 	vmovd  %xmm8,0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 67 ff ff ff 	vcvtsi2sdl 0xffffffffffffff67,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 65 67 ff ff ff 	vmovd  %xmm8,-0x99\(,%riz,2\)
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 65 67 ff ff ff 	vcvtsi2sdl -0x99\(,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 23 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rbx,%riz,1\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 23 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 63 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rbx,%riz,2\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 63 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 bc 67 ff ff ff 	vmovd  %xmm8,-0x99\(%r12,%r15,4\)
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc bc 67 ff ff ff 	vcvtsi2sdl -0x99\(%r12,%r15,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 f8 67 ff ff ff 	vmovd  %xmm8,-0x99\(%r8,%r15,8\)
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc f8 67 ff ff ff 	vcvtsi2sdl -0x99\(%r8,%r15,8\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 ad 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rbp,%r13,4\)
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc ad 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbp,%r13,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 24 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rsp,%r12,1\)
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc 24 67 ff ff ff 	vcvtsi2sdl -0x99\(%rsp,%r12,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 41 7d 7e c0       	vmovd  %xmm8,%r8d
+[ 	]*[a-f0-9]+:	c4 41 7f 2d c0       	vcvtsd2si %xmm8,%r8d
+[ 	]*[a-f0-9]+:	c4 41 3f 2a f8       	vcvtsi2sd %r8d,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 61 ff 2d 01       	vcvtsd2si \(%rcx\),%r8
+[ 	]*[a-f0-9]+:	c4 61 fe 2d 01       	vcvtss2si \(%rcx\),%r8
+[ 	]*[a-f0-9]+:	c5 fd 2f f4          	vcomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2f 21          	vcomisd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e f4          	vucomisd %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 2e 21          	vucomisd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 10 21          	vmovsd \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 ff 11 21          	vmovsd %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  %rcx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c4 e1 fd 7e e1       	vmovq  %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fd 6e e1       	vmovq  %rcx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd d6 21          	vmovq  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fe 7e 21          	vmovq  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 ff 2d cc          	vcvtsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2d 09          	vcvtsd2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c cc          	vcvttsd2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 ff 2c 09          	vcvttsd2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d cc       	vcvtsd2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d 09       	vcvtsd2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2d 09       	vcvtsd2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c cc       	vcvttsd2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c 09       	vcvttsd2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 ff 2c 09       	vcvttsd2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 df 2a f1       	vcvtsi2sd %rcx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 df 2a 31       	vcvtsi2sdq \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 df 2a 31       	vcvtsi2sdq \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 de 2a f1       	vcvtsi2ss %rcx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 de 2a 31       	vcvtsi2ssq \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c4 e1 de 2a 31       	vcvtsi2ssq \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b d4 07    	vroundsd \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0b 11 07    	vroundsd \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 d4          	vaddsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 58 11          	vaddsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a d4          	vcvtsd2ss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5a 11          	vcvtsd2ss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e d4          	vdivsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5e 11          	vdivsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f d4          	vmaxsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5f 11          	vmaxsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d d4          	vminsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5d 11          	vminsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 d4          	vmulsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 59 11          	vmulsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 d4          	vsqrtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 51 11          	vsqrtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c d4          	vsubsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf 5c 11          	vsubsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 00       	vcmpeqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 00       	vcmpeqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 01       	vcmpltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 01       	vcmpltsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 02       	vcmplesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 02       	vcmplesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 03       	vcmpunordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 03       	vcmpunordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 04       	vcmpneqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 04       	vcmpneqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 05       	vcmpnltsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 05       	vcmpnltsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 06       	vcmpnlesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 06       	vcmpnlesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 07       	vcmpordsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 07       	vcmpordsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 08       	vcmpeq_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 08       	vcmpeq_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 09       	vcmpngesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 09       	vcmpngesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0a       	vcmpngtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0a       	vcmpngtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0b       	vcmpfalsesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0b       	vcmpfalsesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0c       	vcmpneq_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0c       	vcmpneq_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0d       	vcmpgesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0d       	vcmpgesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0e       	vcmpgtsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0e       	vcmpgtsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 0f       	vcmptruesd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 0f       	vcmptruesd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 10       	vcmpeq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 10       	vcmpeq_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 11       	vcmplt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 11       	vcmplt_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 12       	vcmple_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 12       	vcmple_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 13       	vcmpunord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 13       	vcmpunord_ssd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 14       	vcmpneq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 14       	vcmpneq_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 15       	vcmpnlt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 15       	vcmpnlt_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 16       	vcmpnle_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 16       	vcmpnle_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 17       	vcmpord_ssd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 17       	vcmpord_ssd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 18       	vcmpeq_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 18       	vcmpeq_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 19       	vcmpnge_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 19       	vcmpnge_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1a       	vcmpngt_uqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1a       	vcmpngt_uqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1b       	vcmpfalse_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1b       	vcmpfalse_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1c       	vcmpneq_ossd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1c       	vcmpneq_ossd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1d       	vcmpge_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1d       	vcmpge_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1e       	vcmpgt_oqsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1e       	vcmpgt_oqsd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 d4 1f       	vcmptrue_ussd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 cf c2 11 1f       	vcmptrue_ussd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 d4          	vaddss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 58 11          	vaddss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a d4          	vcvtss2sd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5a 11          	vcvtss2sd \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e d4          	vdivss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5e 11          	vdivss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f d4          	vmaxss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5f 11          	vmaxss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d d4          	vminss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5d 11          	vminss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 d4          	vmulss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 59 11          	vmulss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 d4          	vrcpss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 53 11          	vrcpss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 d4          	vrsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 52 11          	vrsqrtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 d4          	vsqrtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 51 11          	vsqrtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c d4          	vsubss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 5c 11          	vsubss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 00       	vcmpeqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 00       	vcmpeqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 01       	vcmpltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 01       	vcmpltss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 02       	vcmpless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 02       	vcmpless \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 03       	vcmpunordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 03       	vcmpunordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 04       	vcmpneqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 04       	vcmpneqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 05       	vcmpnltss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 05       	vcmpnltss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 06       	vcmpnless %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 06       	vcmpnless \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 08       	vcmpeq_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 08       	vcmpeq_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 09       	vcmpngess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 09       	vcmpngess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0a       	vcmpngtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0a       	vcmpngtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0b       	vcmpfalsess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0b       	vcmpfalsess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0c       	vcmpneq_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0c       	vcmpneq_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0d       	vcmpgess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0d       	vcmpgess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0e       	vcmpgtss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0e       	vcmpgtss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 0f       	vcmptruess %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 0f       	vcmptruess \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 10       	vcmpeq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 10       	vcmpeq_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 11       	vcmplt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 11       	vcmplt_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 12       	vcmple_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 12       	vcmple_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 13       	vcmpunord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 13       	vcmpunord_sss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 14       	vcmpneq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 14       	vcmpneq_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 15       	vcmpnlt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 15       	vcmpnlt_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 16       	vcmpnle_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 16       	vcmpnle_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 17       	vcmpord_sss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 17       	vcmpord_sss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 18       	vcmpeq_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 18       	vcmpeq_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 19       	vcmpnge_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 19       	vcmpnge_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1a       	vcmpngt_uqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1a       	vcmpngt_uqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1b       	vcmpfalse_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1b       	vcmpfalse_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1c       	vcmpneq_osss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1c       	vcmpneq_osss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1d       	vcmpge_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1d       	vcmpge_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1e       	vcmpgt_oqss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1e       	vcmpgt_oqss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 1f       	vcmptrue_usss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 1f       	vcmptrue_usss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fc 2f f4          	vcomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2f 21          	vcomiss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e f4          	vucomiss %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fc 2e 21          	vucomiss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 10 21          	vmovss \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fe 11 21          	vmovss %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fd 7e e1          	vmovd  %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e e1          	vmovd  %ecx,%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fd 7e 21          	vmovd  %xmm4,\(%rcx\)
+[ 	]*[a-f0-9]+:	c5 fd 6e 21          	vmovd  \(%rcx\),%xmm4
+[ 	]*[a-f0-9]+:	c5 fe 2d cc          	vcvtss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2d 09          	vcvtss2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c cc          	vcvttss2si %xmm4,%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c5 fe 2c 09          	vcvttss2si \(%rcx\),%ecx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d cc       	vcvtss2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d 09       	vcvtss2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2d 09       	vcvtss2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c cc       	vcvttss2si %xmm4,%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c 09       	vcvttss2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c4 e1 fe 2c 09       	vcvttss2si \(%rcx\),%rcx
+[ 	]*[a-f0-9]+:	c5 df 2a f1          	vcvtsi2sd %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 df 2a 31          	vcvtsi2sdl \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a f1          	vcvtsi2ss %ecx,%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 de 2a 31          	vcvtsi2ssl \(%rcx\),%xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 ce c2 d4 07       	vcmpordss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce c2 11 07       	vcmpordss \(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a d4 07    	vroundss \$0x7,%xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c4 e3 4d 0a 11 07    	vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 fe 7e f4          	vmovq  %xmm4,%xmm6
+[ 	]*[a-f0-9]+:	c5 cf 10 d4          	vmovsd %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 ce 10 d4          	vmovss %xmm4,%xmm6,%xmm2
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 78 56 34 12 	vmovd  %xmm8,0x12345678
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 78 56 34 12 	vcvtsi2sdl 0x12345678,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 45 00       	vmovd  %xmm8,0x0\(%rbp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a 7d 00       	vcvtsi2sdl 0x0\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 85 99 00 00 00 	vmovd  %xmm8,0x99\(%rbp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bd 99 00 00 00 	vcvtsi2sdl 0x99\(%rbp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 87 99 00 00 00 	vmovd  %xmm8,0x99\(%r15\)
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bf 99 00 00 00 	vcvtsi2sdl 0x99\(%r15\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 05 99 00 00 00 	vmovd  %xmm8,0x99\(%rip\)        # c32 <_start\+0xc32>
+[ 	]*[a-f0-9]+:	c5 3f 2a 3d 99 00 00 00 	vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15        # c3a <_start\+0xc3a>
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 24 99 00 00 00 	vmovd  %xmm8,0x99\(%rsp\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%rsp\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 41 7d 7e 84 24 99 00 00 00 	vmovd  %xmm8,0x99\(%r12\)
+[ 	]*[a-f0-9]+:	c4 41 3f 2a bc 24 99 00 00 00 	vcvtsi2sdl 0x99\(%r12\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 25 67 ff ff ff 	vmovd  %xmm8,0xffffffffffffff67
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 25 67 ff ff ff 	vcvtsi2sdl 0xffffffffffffff67,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 04 65 67 ff ff ff 	vmovd  %xmm8,-0x99\(,%riz,2\)
+[ 	]*[a-f0-9]+:	c5 3f 2a 3c 65 67 ff ff ff 	vcvtsi2sdl -0x99\(,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 23 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rbx,%riz,1\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 23 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c5 7d 7e 84 63 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rbx,%riz,2\)
+[ 	]*[a-f0-9]+:	c5 3f 2a bc 63 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbx,%riz,2\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 bc 67 ff ff ff 	vmovd  %xmm8,-0x99\(%r12,%r15,4\)
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc bc 67 ff ff ff 	vcvtsi2sdl -0x99\(%r12,%r15,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 01 7d 7e 84 f8 67 ff ff ff 	vmovd  %xmm8,-0x99\(%r8,%r15,8\)
+[ 	]*[a-f0-9]+:	c4 01 3f 2a bc f8 67 ff ff ff 	vcvtsi2sdl -0x99\(%r8,%r15,8\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 a5 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rbp,%r12,4\)
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc a5 67 ff ff ff 	vcvtsi2sdl -0x99\(%rbp,%r12,4\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 21 7d 7e 84 2c 67 ff ff ff 	vmovd  %xmm8,-0x99\(%rsp,%r13,1\)
+[ 	]*[a-f0-9]+:	c4 21 3f 2a bc 2c 67 ff ff ff 	vcvtsi2sdl -0x99\(%rsp,%r13,1\),%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 41 7d 7e c0       	vmovd  %xmm8,%r8d
+[ 	]*[a-f0-9]+:	c4 41 7f 2d c0       	vcvtsd2si %xmm8,%r8d
+[ 	]*[a-f0-9]+:	c4 41 3f 2a f8       	vcvtsi2sd %r8d,%xmm8,%xmm15
+[ 	]*[a-f0-9]+:	c4 61 ff 2d 01       	vcvtsd2si \(%rcx\),%r8
+[ 	]*[a-f0-9]+:	c4 61 fe 2d 01       	vcvtss2si \(%rcx\),%r8
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx-scalar.s b/gas/testsuite/gas/i386/x86-64-avx-scalar.s
new file mode 100644
index 0000000..553d209
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx-scalar.s
@@ -0,0 +1,723 @@
+# Check 64bit AVX scalar instructions
+
+	.allow_index_reg
+	.text
+_start:
+
+# Tests for op xmm/mem64, xmm
+	vcomisd %xmm4,%xmm6
+	vcomisd (%rcx),%xmm4
+	vucomisd %xmm4,%xmm6
+	vucomisd (%rcx),%xmm4
+
+# Tests for op mem64, xmm
+	vmovsd (%rcx),%xmm4
+
+# Tests for op xmm, mem64
+	vmovsd %xmm4,(%rcx)
+
+# Tests for op xmm, regq/mem64
+# Tests for op regq/mem64, xmm
+	vmovd %xmm4,%rcx
+	vmovd %rcx,%xmm4
+	vmovq %xmm4,%rcx
+	vmovq %rcx,%xmm4
+	vmovq %xmm4,(%rcx)
+	vmovq (%rcx),%xmm4
+
+# Tests for op xmm/mem64, regl
+	vcvtsd2si %xmm4,%ecx
+	vcvtsd2si (%rcx),%ecx
+	vcvttsd2si %xmm4,%ecx
+	vcvttsd2si (%rcx),%ecx
+
+# Tests for op xmm/mem64, regq
+	vcvtsd2si %xmm4,%rcx
+	vcvtsd2si (%rcx),%rcx
+	vcvttsd2si %xmm4,%rcx
+	vcvttsd2si (%rcx),%rcx
+
+# Tests for op regq/mem64, xmm, xmm
+	vcvtsi2sdq %rcx,%xmm4,%xmm6
+	vcvtsi2sdq (%rcx),%xmm4,%xmm6
+	vcvtsi2ssq %rcx,%xmm4,%xmm6
+	vcvtsi2ssq (%rcx),%xmm4,%xmm6
+
+# Tests for op imm8, xmm/mem64, xmm, xmm
+	vcmpsd $7,%xmm4,%xmm6,%xmm2
+	vcmpsd $7,(%rcx),%xmm6,%xmm2
+	vroundsd $7,%xmm4,%xmm6,%xmm2
+	vroundsd $7,(%rcx),%xmm6,%xmm2
+
+# Tests for op xmm/mem64, xmm, xmm
+	vaddsd %xmm4,%xmm6,%xmm2
+	vaddsd (%rcx),%xmm6,%xmm2
+	vcvtsd2ss %xmm4,%xmm6,%xmm2
+	vcvtsd2ss (%rcx),%xmm6,%xmm2
+	vdivsd %xmm4,%xmm6,%xmm2
+	vdivsd (%rcx),%xmm6,%xmm2
+	vmaxsd %xmm4,%xmm6,%xmm2
+	vmaxsd (%rcx),%xmm6,%xmm2
+	vminsd %xmm4,%xmm6,%xmm2
+	vminsd (%rcx),%xmm6,%xmm2
+	vmulsd %xmm4,%xmm6,%xmm2
+	vmulsd (%rcx),%xmm6,%xmm2
+	vsqrtsd %xmm4,%xmm6,%xmm2
+	vsqrtsd (%rcx),%xmm6,%xmm2
+	vsubsd %xmm4,%xmm6,%xmm2
+	vsubsd (%rcx),%xmm6,%xmm2
+	vcmpeqsd %xmm4,%xmm6,%xmm2
+	vcmpeqsd (%rcx),%xmm6,%xmm2
+	vcmpltsd %xmm4,%xmm6,%xmm2
+	vcmpltsd (%rcx),%xmm6,%xmm2
+	vcmplesd %xmm4,%xmm6,%xmm2
+	vcmplesd (%rcx),%xmm6,%xmm2
+	vcmpunordsd %xmm4,%xmm6,%xmm2
+	vcmpunordsd (%rcx),%xmm6,%xmm2
+	vcmpneqsd %xmm4,%xmm6,%xmm2
+	vcmpneqsd (%rcx),%xmm6,%xmm2
+	vcmpnltsd %xmm4,%xmm6,%xmm2
+	vcmpnltsd (%rcx),%xmm6,%xmm2
+	vcmpnlesd %xmm4,%xmm6,%xmm2
+	vcmpnlesd (%rcx),%xmm6,%xmm2
+	vcmpordsd %xmm4,%xmm6,%xmm2
+	vcmpordsd (%rcx),%xmm6,%xmm2
+	vcmpeq_uqsd %xmm4,%xmm6,%xmm2
+	vcmpeq_uqsd (%rcx),%xmm6,%xmm2
+	vcmpngesd %xmm4,%xmm6,%xmm2
+	vcmpngesd (%rcx),%xmm6,%xmm2
+	vcmpngtsd %xmm4,%xmm6,%xmm2
+	vcmpngtsd (%rcx),%xmm6,%xmm2
+	vcmpfalsesd %xmm4,%xmm6,%xmm2
+	vcmpfalsesd (%rcx),%xmm6,%xmm2
+	vcmpneq_oqsd %xmm4,%xmm6,%xmm2
+	vcmpneq_oqsd (%rcx),%xmm6,%xmm2
+	vcmpgesd %xmm4,%xmm6,%xmm2
+	vcmpgesd (%rcx),%xmm6,%xmm2
+	vcmpgtsd %xmm4,%xmm6,%xmm2
+	vcmpgtsd (%rcx),%xmm6,%xmm2
+	vcmptruesd %xmm4,%xmm6,%xmm2
+	vcmptruesd (%rcx),%xmm6,%xmm2
+	vcmpeq_ossd %xmm4,%xmm6,%xmm2
+	vcmpeq_ossd (%rcx),%xmm6,%xmm2
+	vcmplt_oqsd %xmm4,%xmm6,%xmm2
+	vcmplt_oqsd (%rcx),%xmm6,%xmm2
+	vcmple_oqsd %xmm4,%xmm6,%xmm2
+	vcmple_oqsd (%rcx),%xmm6,%xmm2
+	vcmpunord_ssd %xmm4,%xmm6,%xmm2
+	vcmpunord_ssd (%rcx),%xmm6,%xmm2
+	vcmpneq_ussd %xmm4,%xmm6,%xmm2
+	vcmpneq_ussd (%rcx),%xmm6,%xmm2
+	vcmpnlt_uqsd %xmm4,%xmm6,%xmm2
+	vcmpnlt_uqsd (%rcx),%xmm6,%xmm2
+	vcmpnle_uqsd %xmm4,%xmm6,%xmm2
+	vcmpnle_uqsd (%rcx),%xmm6,%xmm2
+	vcmpord_ssd %xmm4,%xmm6,%xmm2
+	vcmpord_ssd (%rcx),%xmm6,%xmm2
+	vcmpeq_ussd %xmm4,%xmm6,%xmm2
+	vcmpeq_ussd (%rcx),%xmm6,%xmm2
+	vcmpnge_uqsd %xmm4,%xmm6,%xmm2
+	vcmpnge_uqsd (%rcx),%xmm6,%xmm2
+	vcmpngt_uqsd %xmm4,%xmm6,%xmm2
+	vcmpngt_uqsd (%rcx),%xmm6,%xmm2
+	vcmpfalse_ossd %xmm4,%xmm6,%xmm2
+	vcmpfalse_ossd (%rcx),%xmm6,%xmm2
+	vcmpneq_ossd %xmm4,%xmm6,%xmm2
+	vcmpneq_ossd (%rcx),%xmm6,%xmm2
+	vcmpge_oqsd %xmm4,%xmm6,%xmm2
+	vcmpge_oqsd (%rcx),%xmm6,%xmm2
+	vcmpgt_oqsd %xmm4,%xmm6,%xmm2
+	vcmpgt_oqsd (%rcx),%xmm6,%xmm2
+	vcmptrue_ussd %xmm4,%xmm6,%xmm2
+	vcmptrue_ussd (%rcx),%xmm6,%xmm2
+
+# Tests for op xmm/mem32, xmm, xmm
+	vaddss %xmm4,%xmm6,%xmm2
+	vaddss (%rcx),%xmm6,%xmm2
+	vcvtss2sd %xmm4,%xmm6,%xmm2
+	vcvtss2sd (%rcx),%xmm6,%xmm2
+	vdivss %xmm4,%xmm6,%xmm2
+	vdivss (%rcx),%xmm6,%xmm2
+	vmaxss %xmm4,%xmm6,%xmm2
+	vmaxss (%rcx),%xmm6,%xmm2
+	vminss %xmm4,%xmm6,%xmm2
+	vminss (%rcx),%xmm6,%xmm2
+	vmulss %xmm4,%xmm6,%xmm2
+	vmulss (%rcx),%xmm6,%xmm2
+	vrcpss %xmm4,%xmm6,%xmm2
+	vrcpss (%rcx),%xmm6,%xmm2
+	vrsqrtss %xmm4,%xmm6,%xmm2
+	vrsqrtss (%rcx),%xmm6,%xmm2
+	vsqrtss %xmm4,%xmm6,%xmm2
+	vsqrtss (%rcx),%xmm6,%xmm2
+	vsubss %xmm4,%xmm6,%xmm2
+	vsubss (%rcx),%xmm6,%xmm2
+	vcmpeqss %xmm4,%xmm6,%xmm2
+	vcmpeqss (%rcx),%xmm6,%xmm2
+	vcmpltss %xmm4,%xmm6,%xmm2
+	vcmpltss (%rcx),%xmm6,%xmm2
+	vcmpless %xmm4,%xmm6,%xmm2
+	vcmpless (%rcx),%xmm6,%xmm2
+	vcmpunordss %xmm4,%xmm6,%xmm2
+	vcmpunordss (%rcx),%xmm6,%xmm2
+	vcmpneqss %xmm4,%xmm6,%xmm2
+	vcmpneqss (%rcx),%xmm6,%xmm2
+	vcmpnltss %xmm4,%xmm6,%xmm2
+	vcmpnltss (%rcx),%xmm6,%xmm2
+	vcmpnless %xmm4,%xmm6,%xmm2
+	vcmpnless (%rcx),%xmm6,%xmm2
+	vcmpordss %xmm4,%xmm6,%xmm2
+	vcmpordss (%rcx),%xmm6,%xmm2
+	vcmpeq_uqss %xmm4,%xmm6,%xmm2
+	vcmpeq_uqss (%rcx),%xmm6,%xmm2
+	vcmpngess %xmm4,%xmm6,%xmm2
+	vcmpngess (%rcx),%xmm6,%xmm2
+	vcmpngtss %xmm4,%xmm6,%xmm2
+	vcmpngtss (%rcx),%xmm6,%xmm2
+	vcmpfalsess %xmm4,%xmm6,%xmm2
+	vcmpfalsess (%rcx),%xmm6,%xmm2
+	vcmpneq_oqss %xmm4,%xmm6,%xmm2
+	vcmpneq_oqss (%rcx),%xmm6,%xmm2
+	vcmpgess %xmm4,%xmm6,%xmm2
+	vcmpgess (%rcx),%xmm6,%xmm2
+	vcmpgtss %xmm4,%xmm6,%xmm2
+	vcmpgtss (%rcx),%xmm6,%xmm2
+	vcmptruess %xmm4,%xmm6,%xmm2
+	vcmptruess (%rcx),%xmm6,%xmm2
+	vcmpeq_osss %xmm4,%xmm6,%xmm2
+	vcmpeq_osss (%rcx),%xmm6,%xmm2
+	vcmplt_oqss %xmm4,%xmm6,%xmm2
+	vcmplt_oqss (%rcx),%xmm6,%xmm2
+	vcmple_oqss %xmm4,%xmm6,%xmm2
+	vcmple_oqss (%rcx),%xmm6,%xmm2
+	vcmpunord_sss %xmm4,%xmm6,%xmm2
+	vcmpunord_sss (%rcx),%xmm6,%xmm2
+	vcmpneq_usss %xmm4,%xmm6,%xmm2
+	vcmpneq_usss (%rcx),%xmm6,%xmm2
+	vcmpnlt_uqss %xmm4,%xmm6,%xmm2
+	vcmpnlt_uqss (%rcx),%xmm6,%xmm2
+	vcmpnle_uqss %xmm4,%xmm6,%xmm2
+	vcmpnle_uqss (%rcx),%xmm6,%xmm2
+	vcmpord_sss %xmm4,%xmm6,%xmm2
+	vcmpord_sss (%rcx),%xmm6,%xmm2
+	vcmpeq_usss %xmm4,%xmm6,%xmm2
+	vcmpeq_usss (%rcx),%xmm6,%xmm2
+	vcmpnge_uqss %xmm4,%xmm6,%xmm2
+	vcmpnge_uqss (%rcx),%xmm6,%xmm2
+	vcmpngt_uqss %xmm4,%xmm6,%xmm2
+	vcmpngt_uqss (%rcx),%xmm6,%xmm2
+	vcmpfalse_osss %xmm4,%xmm6,%xmm2
+	vcmpfalse_osss (%rcx),%xmm6,%xmm2
+	vcmpneq_osss %xmm4,%xmm6,%xmm2
+	vcmpneq_osss (%rcx),%xmm6,%xmm2
+	vcmpge_oqss %xmm4,%xmm6,%xmm2
+	vcmpge_oqss (%rcx),%xmm6,%xmm2
+	vcmpgt_oqss %xmm4,%xmm6,%xmm2
+	vcmpgt_oqss (%rcx),%xmm6,%xmm2
+	vcmptrue_usss %xmm4,%xmm6,%xmm2
+	vcmptrue_usss (%rcx),%xmm6,%xmm2
+
+# Tests for op xmm/mem32, xmm
+	vcomiss %xmm4,%xmm6
+	vcomiss (%rcx),%xmm4
+	vucomiss %xmm4,%xmm6
+	vucomiss (%rcx),%xmm4
+
+# Tests for op mem32, xmm
+	vmovss (%rcx),%xmm4
+
+# Tests for op xmm, mem32
+	vmovss %xmm4,(%rcx)
+
+# Tests for op xmm, regl/mem32
+# Tests for op regl/mem32, xmm
+	vmovd %xmm4,%ecx
+	vmovd %xmm4,(%rcx)
+	vmovd %ecx,%xmm4
+	vmovd (%rcx),%xmm4
+
+# Tests for op xmm/mem32, regl
+	vcvtss2si %xmm4,%ecx
+	vcvtss2si (%rcx),%ecx
+	vcvttss2si %xmm4,%ecx
+	vcvttss2si (%rcx),%ecx
+
+# Tests for op xmm/mem32, regq
+	vcvtss2si %xmm4,%rcx
+	vcvtss2si (%rcx),%rcx
+	vcvttss2si %xmm4,%rcx
+	vcvttss2si (%rcx),%rcx
+
+# Tests for op regl/mem32, xmm, xmm
+	vcvtsi2sd %ecx,%xmm4,%xmm6
+	vcvtsi2sd (%rcx),%xmm4,%xmm6
+	vcvtsi2ss %ecx,%xmm4,%xmm6
+	vcvtsi2ss (%rcx),%xmm4,%xmm6
+
+# Tests for op imm8, xmm/mem32, xmm, xmm
+	vcmpss $7,%xmm4,%xmm6,%xmm2
+	vcmpss $7,(%rcx),%xmm6,%xmm2
+	vroundss $7,%xmm4,%xmm6,%xmm2
+	vroundss $7,(%rcx),%xmm6,%xmm2
+
+# Tests for op xmm, xmm
+	vmovq %xmm4,%xmm6
+
+# Tests for op xmm, xmm, xmm
+	vmovsd %xmm4,%xmm6,%xmm2
+	vmovss %xmm4,%xmm6,%xmm2
+
+#Tests with different memory and register operands.
+	vmovd %xmm8,0x12345678
+	vcvtsi2sdl 0x12345678,%xmm8,%xmm15
+	vmovd %xmm8,(%rbp)
+	vcvtsi2sdl (%rbp),%xmm8,%xmm15
+	vmovd %xmm8,(%rsp)
+	vcvtsi2sdl (%rsp),%xmm8,%xmm15
+	vmovd %xmm8,0x99(%rbp)
+	vcvtsi2sdl 0x99(%rbp),%xmm8,%xmm15
+	vmovd %xmm8,0x99(%r15)
+	vcvtsi2sdl 0x99(%r15),%xmm8,%xmm15
+	vmovd %xmm8,0x99(%rip)
+	vcvtsi2sdl 0x99(%rip),%xmm8,%xmm15
+	vmovd %xmm8,0x99(%rsp)
+	vcvtsi2sdl 0x99(%rsp),%xmm8,%xmm15
+	vmovd %xmm8,0x99(%r12)
+	vcvtsi2sdl 0x99(%r12),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(,%riz)
+	vcvtsi2sdl -0x99(,%riz),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(,%riz,2)
+	vcvtsi2sdl -0x99(,%riz,2),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(%rbx,%riz)
+	vcvtsi2sdl -0x99(%rbx,%riz),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(%rbx,%riz,2)
+	vcvtsi2sdl -0x99(%rbx,%riz,2),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(%r12,%r15,4)
+	vcvtsi2sdl -0x99(%r12,%r15,4),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(%r8,%r15,8)
+	vcvtsi2sdl -0x99(%r8,%r15,8),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(%rbp,%r13,4)
+	vcvtsi2sdl -0x99(%rbp,%r13,4),%xmm8,%xmm15
+	vmovd %xmm8,-0x99(%rsp,%r12,1)
+	vcvtsi2sdl -0x99(%rsp,%r12,1),%xmm8,%xmm15
+# Tests for all register operands.
+	vmovd %xmm8,%r8d
+	vcvtsd2si %xmm8,%r8d
+	vcvtsi2sdl %r8d,%xmm8,%xmm15
+# Tests for different memory/register operand
+	vcvtsd2si (%rcx),%r8
+	vcvtss2si (%rcx),%r8
+
+	.intel_syntax noprefix
+
+# Tests for op xmm/mem64, xmm
+	vcomisd xmm6,xmm4
+	vcomisd xmm4,QWORD PTR [rcx]
+	vcomisd xmm4,[rcx]
+	vucomisd xmm6,xmm4
+	vucomisd xmm4,QWORD PTR [rcx]
+	vucomisd xmm4,[rcx]
+
+# Tests for op mem64, xmm
+	vmovsd xmm4,QWORD PTR [rcx]
+	vmovsd xmm4,[rcx]
+
+# Tests for op xmm, mem64
+	vmovsd QWORD PTR [rcx],xmm4
+	vmovsd [rcx],xmm4
+
+# Tests for op xmm, regq/mem64
+# Tests for op regq/mem64, xmm
+	vmovd rcx,xmm4
+	vmovd xmm4,rcx
+	vmovd [rcx],xmm4
+	vmovd xmm4,[rcx]
+	vmovq rcx,xmm4
+	vmovq xmm4,rcx
+	vmovq QWORD PTR [rcx],xmm4
+	vmovq xmm4,QWORD PTR [rcx]
+	vmovq [rcx],xmm4
+	vmovq xmm4,[rcx]
+
+# Tests for op xmm/mem64, regl
+	vcvtsd2si ecx,xmm4
+	vcvtsd2si ecx,QWORD PTR [rcx]
+	vcvtsd2si ecx,[rcx]
+	vcvttsd2si ecx,xmm4
+	vcvttsd2si ecx,QWORD PTR [rcx]
+	vcvttsd2si ecx,[rcx]
+
+# Tests for op xmm/mem64, regq
+	vcvtsd2si rcx,xmm4
+	vcvtsd2si rcx,QWORD PTR [rcx]
+	vcvtsd2si rcx,[rcx]
+	vcvttsd2si rcx,xmm4
+	vcvttsd2si rcx,QWORD PTR [rcx]
+	vcvttsd2si rcx,[rcx]
+
+# Tests for op regq/mem64, xmm, xmm
+	vcvtsi2sdq xmm6,xmm4,rcx
+	vcvtsi2sdq xmm6,xmm4,QWORD PTR [rcx]
+	vcvtsi2sdq xmm6,xmm4,[rcx]
+	vcvtsi2ssq xmm6,xmm4,rcx
+	vcvtsi2ssq xmm6,xmm4,QWORD PTR [rcx]
+	vcvtsi2ssq xmm6,xmm4,[rcx]
+
+# Tests for op imm8, xmm/mem64, xmm, xmm
+	vcmpsd xmm2,xmm6,xmm4,7
+	vcmpsd xmm2,xmm6,QWORD PTR [rcx],7
+	vcmpsd xmm2,xmm6,[rcx],7
+	vroundsd xmm2,xmm6,xmm4,7
+	vroundsd xmm2,xmm6,QWORD PTR [rcx],7
+	vroundsd xmm2,xmm6,[rcx],7
+
+# Tests for op xmm/mem64, xmm, xmm
+	vaddsd xmm2,xmm6,xmm4
+	vaddsd xmm2,xmm6,QWORD PTR [rcx]
+	vaddsd xmm2,xmm6,[rcx]
+	vcvtsd2ss xmm2,xmm6,xmm4
+	vcvtsd2ss xmm2,xmm6,QWORD PTR [rcx]
+	vcvtsd2ss xmm2,xmm6,[rcx]
+	vdivsd xmm2,xmm6,xmm4
+	vdivsd xmm2,xmm6,QWORD PTR [rcx]
+	vdivsd xmm2,xmm6,[rcx]
+	vmaxsd xmm2,xmm6,xmm4
+	vmaxsd xmm2,xmm6,QWORD PTR [rcx]
+	vmaxsd xmm2,xmm6,[rcx]
+	vminsd xmm2,xmm6,xmm4
+	vminsd xmm2,xmm6,QWORD PTR [rcx]
+	vminsd xmm2,xmm6,[rcx]
+	vmulsd xmm2,xmm6,xmm4
+	vmulsd xmm2,xmm6,QWORD PTR [rcx]
+	vmulsd xmm2,xmm6,[rcx]
+	vsqrtsd xmm2,xmm6,xmm4
+	vsqrtsd xmm2,xmm6,QWORD PTR [rcx]
+	vsqrtsd xmm2,xmm6,[rcx]
+	vsubsd xmm2,xmm6,xmm4
+	vsubsd xmm2,xmm6,QWORD PTR [rcx]
+	vsubsd xmm2,xmm6,[rcx]
+	vcmpeqsd xmm2,xmm6,xmm4
+	vcmpeqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpeqsd xmm2,xmm6,[rcx]
+	vcmpltsd xmm2,xmm6,xmm4
+	vcmpltsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpltsd xmm2,xmm6,[rcx]
+	vcmplesd xmm2,xmm6,xmm4
+	vcmplesd xmm2,xmm6,QWORD PTR [rcx]
+	vcmplesd xmm2,xmm6,[rcx]
+	vcmpunordsd xmm2,xmm6,xmm4
+	vcmpunordsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpunordsd xmm2,xmm6,[rcx]
+	vcmpneqsd xmm2,xmm6,xmm4
+	vcmpneqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpneqsd xmm2,xmm6,[rcx]
+	vcmpnltsd xmm2,xmm6,xmm4
+	vcmpnltsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpnltsd xmm2,xmm6,[rcx]
+	vcmpnlesd xmm2,xmm6,xmm4
+	vcmpnlesd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpnlesd xmm2,xmm6,[rcx]
+	vcmpordsd xmm2,xmm6,xmm4
+	vcmpordsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpordsd xmm2,xmm6,[rcx]
+	vcmpeq_uqsd xmm2,xmm6,xmm4
+	vcmpeq_uqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpeq_uqsd xmm2,xmm6,[rcx]
+	vcmpngesd xmm2,xmm6,xmm4
+	vcmpngesd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpngesd xmm2,xmm6,[rcx]
+	vcmpngtsd xmm2,xmm6,xmm4
+	vcmpngtsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpngtsd xmm2,xmm6,[rcx]
+	vcmpfalsesd xmm2,xmm6,xmm4
+	vcmpfalsesd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpfalsesd xmm2,xmm6,[rcx]
+	vcmpneq_oqsd xmm2,xmm6,xmm4
+	vcmpneq_oqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpneq_oqsd xmm2,xmm6,[rcx]
+	vcmpgesd xmm2,xmm6,xmm4
+	vcmpgesd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpgesd xmm2,xmm6,[rcx]
+	vcmpgtsd xmm2,xmm6,xmm4
+	vcmpgtsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpgtsd xmm2,xmm6,[rcx]
+	vcmptruesd xmm2,xmm6,xmm4
+	vcmptruesd xmm2,xmm6,QWORD PTR [rcx]
+	vcmptruesd xmm2,xmm6,[rcx]
+	vcmpeq_ossd xmm2,xmm6,xmm4
+	vcmpeq_ossd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpeq_ossd xmm2,xmm6,[rcx]
+	vcmplt_oqsd xmm2,xmm6,xmm4
+	vcmplt_oqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmplt_oqsd xmm2,xmm6,[rcx]
+	vcmple_oqsd xmm2,xmm6,xmm4
+	vcmple_oqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmple_oqsd xmm2,xmm6,[rcx]
+	vcmpunord_ssd xmm2,xmm6,xmm4
+	vcmpunord_ssd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpunord_ssd xmm2,xmm6,[rcx]
+	vcmpneq_ussd xmm2,xmm6,xmm4
+	vcmpneq_ussd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpneq_ussd xmm2,xmm6,[rcx]
+	vcmpnlt_uqsd xmm2,xmm6,xmm4
+	vcmpnlt_uqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpnlt_uqsd xmm2,xmm6,[rcx]
+	vcmpnle_uqsd xmm2,xmm6,xmm4
+	vcmpnle_uqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpnle_uqsd xmm2,xmm6,[rcx]
+	vcmpord_ssd xmm2,xmm6,xmm4
+	vcmpord_ssd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpord_ssd xmm2,xmm6,[rcx]
+	vcmpeq_ussd xmm2,xmm6,xmm4
+	vcmpeq_ussd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpeq_ussd xmm2,xmm6,[rcx]
+	vcmpnge_uqsd xmm2,xmm6,xmm4
+	vcmpnge_uqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpnge_uqsd xmm2,xmm6,[rcx]
+	vcmpngt_uqsd xmm2,xmm6,xmm4
+	vcmpngt_uqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpngt_uqsd xmm2,xmm6,[rcx]
+	vcmpfalse_ossd xmm2,xmm6,xmm4
+	vcmpfalse_ossd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpfalse_ossd xmm2,xmm6,[rcx]
+	vcmpneq_ossd xmm2,xmm6,xmm4
+	vcmpneq_ossd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpneq_ossd xmm2,xmm6,[rcx]
+	vcmpge_oqsd xmm2,xmm6,xmm4
+	vcmpge_oqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpge_oqsd xmm2,xmm6,[rcx]
+	vcmpgt_oqsd xmm2,xmm6,xmm4
+	vcmpgt_oqsd xmm2,xmm6,QWORD PTR [rcx]
+	vcmpgt_oqsd xmm2,xmm6,[rcx]
+	vcmptrue_ussd xmm2,xmm6,xmm4
+	vcmptrue_ussd xmm2,xmm6,QWORD PTR [rcx]
+	vcmptrue_ussd xmm2,xmm6,[rcx]
+
+# Tests for op xmm/mem32, xmm, xmm
+	vaddss xmm2,xmm6,xmm4
+	vaddss xmm2,xmm6,DWORD PTR [rcx]
+	vaddss xmm2,xmm6,[rcx]
+	vcvtss2sd xmm2,xmm6,xmm4
+	vcvtss2sd xmm2,xmm6,DWORD PTR [rcx]
+	vcvtss2sd xmm2,xmm6,[rcx]
+	vdivss xmm2,xmm6,xmm4
+	vdivss xmm2,xmm6,DWORD PTR [rcx]
+	vdivss xmm2,xmm6,[rcx]
+	vmaxss xmm2,xmm6,xmm4
+	vmaxss xmm2,xmm6,DWORD PTR [rcx]
+	vmaxss xmm2,xmm6,[rcx]
+	vminss xmm2,xmm6,xmm4
+	vminss xmm2,xmm6,DWORD PTR [rcx]
+	vminss xmm2,xmm6,[rcx]
+	vmulss xmm2,xmm6,xmm4
+	vmulss xmm2,xmm6,DWORD PTR [rcx]
+	vmulss xmm2,xmm6,[rcx]
+	vrcpss xmm2,xmm6,xmm4
+	vrcpss xmm2,xmm6,DWORD PTR [rcx]
+	vrcpss xmm2,xmm6,[rcx]
+	vrsqrtss xmm2,xmm6,xmm4
+	vrsqrtss xmm2,xmm6,DWORD PTR [rcx]
+	vrsqrtss xmm2,xmm6,[rcx]
+	vsqrtss xmm2,xmm6,xmm4
+	vsqrtss xmm2,xmm6,DWORD PTR [rcx]
+	vsqrtss xmm2,xmm6,[rcx]
+	vsubss xmm2,xmm6,xmm4
+	vsubss xmm2,xmm6,DWORD PTR [rcx]
+	vsubss xmm2,xmm6,[rcx]
+	vcmpeqss xmm2,xmm6,xmm4
+	vcmpeqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpeqss xmm2,xmm6,[rcx]
+	vcmpltss xmm2,xmm6,xmm4
+	vcmpltss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpltss xmm2,xmm6,[rcx]
+	vcmpless xmm2,xmm6,xmm4
+	vcmpless xmm2,xmm6,DWORD PTR [rcx]
+	vcmpless xmm2,xmm6,[rcx]
+	vcmpunordss xmm2,xmm6,xmm4
+	vcmpunordss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpunordss xmm2,xmm6,[rcx]
+	vcmpneqss xmm2,xmm6,xmm4
+	vcmpneqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpneqss xmm2,xmm6,[rcx]
+	vcmpnltss xmm2,xmm6,xmm4
+	vcmpnltss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpnltss xmm2,xmm6,[rcx]
+	vcmpnless xmm2,xmm6,xmm4
+	vcmpnless xmm2,xmm6,DWORD PTR [rcx]
+	vcmpnless xmm2,xmm6,[rcx]
+	vcmpordss xmm2,xmm6,xmm4
+	vcmpordss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpordss xmm2,xmm6,[rcx]
+	vcmpeq_uqss xmm2,xmm6,xmm4
+	vcmpeq_uqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpeq_uqss xmm2,xmm6,[rcx]
+	vcmpngess xmm2,xmm6,xmm4
+	vcmpngess xmm2,xmm6,DWORD PTR [rcx]
+	vcmpngess xmm2,xmm6,[rcx]
+	vcmpngtss xmm2,xmm6,xmm4
+	vcmpngtss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpngtss xmm2,xmm6,[rcx]
+	vcmpfalsess xmm2,xmm6,xmm4
+	vcmpfalsess xmm2,xmm6,DWORD PTR [rcx]
+	vcmpfalsess xmm2,xmm6,[rcx]
+	vcmpneq_oqss xmm2,xmm6,xmm4
+	vcmpneq_oqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpneq_oqss xmm2,xmm6,[rcx]
+	vcmpgess xmm2,xmm6,xmm4
+	vcmpgess xmm2,xmm6,DWORD PTR [rcx]
+	vcmpgess xmm2,xmm6,[rcx]
+	vcmpgtss xmm2,xmm6,xmm4
+	vcmpgtss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpgtss xmm2,xmm6,[rcx]
+	vcmptruess xmm2,xmm6,xmm4
+	vcmptruess xmm2,xmm6,DWORD PTR [rcx]
+	vcmptruess xmm2,xmm6,[rcx]
+	vcmpeq_osss xmm2,xmm6,xmm4
+	vcmpeq_osss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpeq_osss xmm2,xmm6,[rcx]
+	vcmplt_oqss xmm2,xmm6,xmm4
+	vcmplt_oqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmplt_oqss xmm2,xmm6,[rcx]
+	vcmple_oqss xmm2,xmm6,xmm4
+	vcmple_oqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmple_oqss xmm2,xmm6,[rcx]
+	vcmpunord_sss xmm2,xmm6,xmm4
+	vcmpunord_sss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpunord_sss xmm2,xmm6,[rcx]
+	vcmpneq_usss xmm2,xmm6,xmm4
+	vcmpneq_usss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpneq_usss xmm2,xmm6,[rcx]
+	vcmpnlt_uqss xmm2,xmm6,xmm4
+	vcmpnlt_uqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpnlt_uqss xmm2,xmm6,[rcx]
+	vcmpnle_uqss xmm2,xmm6,xmm4
+	vcmpnle_uqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpnle_uqss xmm2,xmm6,[rcx]
+	vcmpord_sss xmm2,xmm6,xmm4
+	vcmpord_sss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpord_sss xmm2,xmm6,[rcx]
+	vcmpeq_usss xmm2,xmm6,xmm4
+	vcmpeq_usss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpeq_usss xmm2,xmm6,[rcx]
+	vcmpnge_uqss xmm2,xmm6,xmm4
+	vcmpnge_uqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpnge_uqss xmm2,xmm6,[rcx]
+	vcmpngt_uqss xmm2,xmm6,xmm4
+	vcmpngt_uqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpngt_uqss xmm2,xmm6,[rcx]
+	vcmpfalse_osss xmm2,xmm6,xmm4
+	vcmpfalse_osss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpfalse_osss xmm2,xmm6,[rcx]
+	vcmpneq_osss xmm2,xmm6,xmm4
+	vcmpneq_osss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpneq_osss xmm2,xmm6,[rcx]
+	vcmpge_oqss xmm2,xmm6,xmm4
+	vcmpge_oqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpge_oqss xmm2,xmm6,[rcx]
+	vcmpgt_oqss xmm2,xmm6,xmm4
+	vcmpgt_oqss xmm2,xmm6,DWORD PTR [rcx]
+	vcmpgt_oqss xmm2,xmm6,[rcx]
+	vcmptrue_usss xmm2,xmm6,xmm4
+	vcmptrue_usss xmm2,xmm6,DWORD PTR [rcx]
+	vcmptrue_usss xmm2,xmm6,[rcx]
+
+# Tests for op xmm/mem32, xmm
+	vcomiss xmm6,xmm4
+	vcomiss xmm4,DWORD PTR [rcx]
+	vcomiss xmm4,[rcx]
+	vucomiss xmm6,xmm4
+	vucomiss xmm4,DWORD PTR [rcx]
+	vucomiss xmm4,[rcx]
+
+# Tests for op mem32, xmm
+	vmovss xmm4,DWORD PTR [rcx]
+	vmovss xmm4,[rcx]
+
+# Tests for op xmm, mem32
+	vmovss DWORD PTR [rcx],xmm4
+	vmovss [rcx],xmm4
+
+# Tests for op xmm, regl/mem32
+# Tests for op regl/mem32, xmm
+	vmovd ecx,xmm4
+	vmovd DWORD PTR [rcx],xmm4
+	vmovd xmm4,ecx
+	vmovd xmm4,DWORD PTR [rcx]
+	vmovd [rcx],xmm4
+	vmovd xmm4,[rcx]
+
+# Tests for op xmm/mem32, regl
+	vcvtss2si ecx,xmm4
+	vcvtss2si ecx,DWORD PTR [rcx]
+	vcvtss2si ecx,[rcx]
+	vcvttss2si ecx,xmm4
+	vcvttss2si ecx,DWORD PTR [rcx]
+	vcvttss2si ecx,[rcx]
+
+# Tests for op xmm/mem32, regq
+	vcvtss2si rcx,xmm4
+	vcvtss2si rcx,DWORD PTR [rcx]
+	vcvtss2si rcx,[rcx]
+	vcvttss2si rcx,xmm4
+	vcvttss2si rcx,DWORD PTR [rcx]
+	vcvttss2si rcx,[rcx]
+
+# Tests for op regl/mem32, xmm, xmm
+	vcvtsi2sd xmm6,xmm4,ecx
+	vcvtsi2sd xmm6,xmm4,DWORD PTR [rcx]
+	vcvtsi2ss xmm6,xmm4,ecx
+	vcvtsi2ss xmm6,xmm4,DWORD PTR [rcx]
+
+# Tests for op imm8, xmm/mem32, xmm, xmm
+	vcmpss xmm2,xmm6,xmm4,7
+	vcmpss xmm2,xmm6,DWORD PTR [rcx],7
+	vcmpss xmm2,xmm6,[rcx],7
+	vroundss xmm2,xmm6,xmm4,7
+	vroundss xmm2,xmm6,DWORD PTR [rcx],7
+	vroundss xmm2,xmm6,[rcx],7
+
+# Tests for op xmm, xmm
+	vmovq xmm6,xmm4
+
+# Tests for op xmm, xmm, xmm
+	vmovsd xmm2,xmm6,xmm4
+	vmovss xmm2,xmm6,xmm4
+
+#Tests with different memory and register operands.
+	vmovd DWORD PTR ds:0x12345678,xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR ds:0x12345678
+	vmovd DWORD PTR [rbp],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbp]
+	vmovd DWORD PTR [rbp+0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbp+0x99]
+	vmovd DWORD PTR [r15+0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [r15+0x99]
+	vmovd DWORD PTR [rip+0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rip+0x99]
+	vmovd DWORD PTR [rsp+0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rsp+0x99]
+	vmovd DWORD PTR [r12+0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [r12+0x99]
+	vmovd DWORD PTR [riz*1-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [riz*1-0x99]
+	vmovd DWORD PTR [riz*2-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [riz*2-0x99]
+	vmovd DWORD PTR [rbx+riz*1-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbx+riz*1-0x99]
+	vmovd DWORD PTR [rbx+riz*2-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbx+riz*2-0x99]
+	vmovd DWORD PTR [r12+r15*4-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [r12+r15*4-0x99]
+	vmovd DWORD PTR [r8+r15*8-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [r8+r15*8-0x99]
+	vmovd DWORD PTR [rbp+r12*4-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rbp+r12*4-0x99]
+	vmovd DWORD PTR [rsp+r13*1-0x99],xmm8
+	vcvtsi2sd xmm15,xmm8,DWORD PTR [rsp+r13*1-0x99]
+# Tests for all register operands.
+	vmovd r8d,xmm8
+	vcvtsd2si r8d,xmm8
+	vcvtsi2sd xmm15,xmm8,r8d
+# Tests for different memory/register operand
+	vcvtsd2si r8,QWORD PTR  [rcx]
+	vcvtss2si r8,DWORD PTR  [rcx]