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authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-03-29 10:28:40 +0000
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-03-29 10:28:40 +0000
commitce32bd10dfbbac0a59d33433732fd523ae482163 (patch)
tree7fba2755d5d113ed88104a650c59e8a037179f38 /gas
parent658c734487ff8b2dfebaca5e95a5cc18049225a9 (diff)
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2012-03-29 Terry Guo <terry.guo@arm.com>
* gas/config/tc-arm.c (arm_cpus): Add cortex-m0plus. * gas/doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-arm.c1
-rw-r--r--gas/doc/c-arm.texi1
3 files changed, 7 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 8fdde79..b49697b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2012-03-29 Terry Guo <terry.guo@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add cortex-m0plus.
+ * doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
+
2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9222aff..585f78e 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -23060,6 +23060,7 @@ static const struct arm_cpu_option_table arm_cpus[] =
ARM_CPU_OPT ("cortex-m3", ARM_ARCH_V7M, FPU_NONE, "Cortex-M3"),
ARM_CPU_OPT ("cortex-m1", ARM_ARCH_V6SM, FPU_NONE, "Cortex-M1"),
ARM_CPU_OPT ("cortex-m0", ARM_ARCH_V6SM, FPU_NONE, "Cortex-M0"),
+ ARM_CPU_OPT ("cortex-m0plus", ARM_ARCH_V6SM, FPU_NONE, "Cortex-M0+"),
/* ??? XSCALE is really an architecture. */
ARM_CPU_OPT ("xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL),
/* ??? iwmmxt is not a processor. */
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index b7859a7..ae6c488 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -126,6 +126,7 @@ recognized:
@code{cortex-m3},
@code{cortex-m1},
@code{cortex-m0},
+@code{cortex-m0plus},
@code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
@code{i80200} (Intel XScale processor)
@code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)