Add support for 48 and 64 bit ARC instructions.

gas	* config/tc-arc.c (parse_opcode_flags): New function.
	(find_opcode_match): Move flag parsing code out to new function.
	Ignore operands marked IGNORE.
	(build_fake_opcode_hash_entry): New function.
	(find_special_case_long_opcode): New function.
	(find_special_case): Lookup long opcodes.
	* testsuite/gas/arc/nps400-7.d: New file.
	* testsuite/gas/arc/nps400-7.s: New file.

include	* opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
	(struct arc_long_opcode): New structure.
	(arc_long_opcodes): Declare.
	(arc_num_long_opcodes): Declare.

opcodes	* arc-dis.c (struct arc_operand_iterator): New structure.
	(find_format_from_table): All the old content from find_format,
	with some minor adjustments, and parameter renaming.
	(find_format_long_instructions): New function.
	(find_format): Rewritten.
	(arc_insn_length): Add LSB parameter.
	(extract_operand_value): New function.
	(operand_iterator_next): New function.
	(print_insn_arc): Use new functions to find opcode, and iterator
	over operands.
	* arc-opc.c (insert_nps_3bit_dst_short): New function.
	(extract_nps_3bit_dst_short): New function.
	(insert_nps_3bit_src2_short): New function.
	(extract_nps_3bit_src2_short): New function.
	(insert_nps_bitop1_size): New function.
	(extract_nps_bitop1_size): New function.
	(insert_nps_bitop2_size): New function.
	(extract_nps_bitop2_size): New function.
	(insert_nps_bitop_mod4_msb): New function.
	(extract_nps_bitop_mod4_msb): New function.
	(insert_nps_bitop_mod4_lsb): New function.
	(extract_nps_bitop_mod4_lsb): New function.
	(insert_nps_bitop_dst_pos3_pos4): New function.
	(extract_nps_bitop_dst_pos3_pos4): New function.
	(insert_nps_bitop_ins_ext): New function.
	(extract_nps_bitop_ins_ext): New function.
	(arc_operands): Add new operands.
	(arc_long_opcodes): New global array.
	(arc_num_long_opcodes): New global.
	* arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.

4 files changed, 276 insertions, 69 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 116ab89..235db52 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* config/tc-arc.c (parse_opcode_flags): New function.
+	(find_opcode_match): Move flag parsing code out to new function.
+	Ignore operands marked IGNORE.
+	(build_fake_opcode_hash_entry): New function.
+	(find_special_case_long_opcode): New function.
+	(find_special_case): Lookup long opcodes.
+	* testsuite/gas/arc/nps400-7.d: New file.
+	* testsuite/gas/arc/nps400-7.s: New file.
+
 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 
 	* config/tc-ns32k.c: Remove definition of input_line_pointer.
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 7eb577f..a5b9a98 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -1548,6 +1548,90 @@ check_cpu_feature (insn_subclass_t sc)
   return TRUE;
 }
 
+/* Parse the flags described by FIRST_PFLAG and NFLGS against the flag
+   operands in OPCODE.  Stores the matching OPCODES into the FIRST_PFLAG
+   array and returns TRUE if the flag operands all match, otherwise,
+   returns FALSE, in which case the FIRST_PFLAG array may have been
+   modified.  */
+
+static bfd_boolean
+parse_opcode_flags (const struct arc_opcode *opcode,
+                    int nflgs,
+                    struct arc_flags *first_pflag)
+{
+  int lnflg, i;
+  const unsigned char *flgidx;
+
+  lnflg = nflgs;
+  for (i = 0; i < nflgs; i++)
+    first_pflag[i].flgp = NULL;
+
+  /* Check the flags.  Iterate over the valid flag classes.  */
+  for (flgidx = opcode->flags; *flgidx; ++flgidx)
+    {
+      /* Get a valid flag class.  */
+      const struct arc_flag_class *cl_flags = &arc_flag_classes[*flgidx];
+      const unsigned *flgopridx;
+      int cl_matches = 0;
+      struct arc_flags *pflag = NULL;
+
+      /* Check for extension conditional codes.  */
+      if (ext_condcode.arc_ext_condcode
+          && cl_flags->flag_class & F_CLASS_EXTEND)
+        {
+          struct arc_flag_operand *pf = ext_condcode.arc_ext_condcode;
+          while (pf->name)
+            {
+              pflag = first_pflag;
+              for (i = 0; i < nflgs; i++, pflag++)
+                {
+                  if (!strcmp (pf->name, pflag->name))
+                    {
+                      if (pflag->flgp != NULL)
+                        return FALSE;
+                      /* Found it.  */
+                      cl_matches++;
+                      pflag->flgp = pf;
+                      lnflg--;
+                      break;
+                    }
+                }
+              pf++;
+            }
+        }
+
+      for (flgopridx = cl_flags->flags; *flgopridx; ++flgopridx)
+        {
+          const struct arc_flag_operand *flg_operand;
+
+          pflag = first_pflag;
+          flg_operand = &arc_flag_operands[*flgopridx];
+          for (i = 0; i < nflgs; i++, pflag++)
+            {
+              /* Match against the parsed flags.  */
+              if (!strcmp (flg_operand->name, pflag->name))
+                {
+                  if (pflag->flgp != NULL)
+                    return FALSE;
+                  cl_matches++;
+                  pflag->flgp = flg_operand;
+                  lnflg--;
+                  break; /* goto next flag class and parsed flag.  */
+                }
+            }
+        }
+
+      if ((cl_flags->flag_class & F_CLASS_REQUIRED) && cl_matches == 0)
+        return FALSE;
+      if ((cl_flags->flag_class & F_CLASS_OPTIONAL) && cl_matches > 1)
+        return FALSE;
+    }
+
+  /* Did I check all the parsed flags?  */
+  return lnflg ? FALSE : TRUE;
+}
+
+
 /* Search forward through all variants of an opcode looking for a
    syntax match.  */
 
@@ -1577,8 +1661,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
        opcode = arc_opcode_hash_entry_iterator_next (entry, &iter))
     {
       const unsigned char *opidx;
-      const unsigned char *flgidx;
-      int tokidx = 0, lnflg, i;
+      int tokidx = 0;
       const expressionS *t = &emptyE;
 
       pr_debug ("%s:%d: find_opcode_match: trying opcode 0x%08X ",
@@ -1754,7 +1837,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
 			  if (errmsg)
 			    goto match_failed;
 			}
-		      else
+		      else if (!(operand->flags & ARC_OPERAND_IGNORE))
 			goto match_failed;
 		    }
 		  break;
@@ -1831,72 +1914,7 @@ find_opcode_match (const struct arc_opcode_hash_entry *entry,
       pr_debug ("opr ");
 
       /* Setup ready for flag parsing.  */
-      lnflg = nflgs;
-      for (i = 0; i < nflgs; i++)
-	first_pflag[i].flgp = NULL;
-
-      /* Check the flags.  Iterate over the valid flag classes.  */
-      for (flgidx = opcode->flags; *flgidx; ++flgidx)
-	{
-	  /* Get a valid flag class.  */
-	  const struct arc_flag_class *cl_flags = &arc_flag_classes[*flgidx];
-	  const unsigned *flgopridx;
-	  int cl_matches = 0;
-	  struct arc_flags *pflag = NULL;
-
-	  /* Check for extension conditional codes.  */
-	  if (ext_condcode.arc_ext_condcode
-	      && cl_flags->flag_class & F_CLASS_EXTEND)
-	    {
-	      struct arc_flag_operand *pf = ext_condcode.arc_ext_condcode;
-	      while (pf->name)
-		{
-		  pflag = first_pflag;
-		  for (i = 0; i < nflgs; i++, pflag++)
-		    {
-		      if (!strcmp (pf->name, pflag->name))
-			{
-			  if (pflag->flgp != NULL)
-			    goto match_failed;
-			  /* Found it.  */
-			  cl_matches++;
-			  pflag->flgp = pf;
-			  lnflg--;
-			  break;
-			}
-		    }
-		  pf++;
-		}
-	    }
-
-	  for (flgopridx = cl_flags->flags; *flgopridx; ++flgopridx)
-	    {
-	      const struct arc_flag_operand *flg_operand;
-
-	      pflag = first_pflag;
-	      flg_operand = &arc_flag_operands[*flgopridx];
-	      for (i = 0; i < nflgs; i++, pflag++)
-		{
-		  /* Match against the parsed flags.  */
-		  if (!strcmp (flg_operand->name, pflag->name))
-		    {
-		      if (pflag->flgp != NULL)
-			goto match_failed;
-		      cl_matches++;
-		      pflag->flgp = flg_operand;
-		      lnflg--;
-		      break; /* goto next flag class and parsed flag.  */
-		    }
-		}
-	    }
-
-	  if ((cl_flags->flag_class & F_CLASS_REQUIRED) && cl_matches == 0)
-	    goto match_failed;
-	  if ((cl_flags->flag_class & F_CLASS_OPTIONAL) && cl_matches > 1)
-	    goto match_failed;
-	}
-      /* Did I check all the parsed flags?  */
-      if (lnflg)
+      if (!parse_opcode_flags (opcode, nflgs, first_pflag))
 	goto match_failed;
 
       pr_debug ("flg");
@@ -2179,6 +2197,108 @@ find_special_case_flag (const char *opname,
   return NULL;
 }
 
+/* The long instructions are not stored in a hash (there's not many of
+   them) and so there's no arc_opcode_hash_entry structure to return.  This
+   helper function for find_special_case_long_opcode takes an arc_opcode
+   result and places it into a fake arc_opcode_hash_entry that points to
+   the single arc_opcode OPCODE, which is then returned.  */
+
+static const struct arc_opcode_hash_entry *
+build_fake_opcode_hash_entry (const struct arc_opcode *opcode)
+{
+  static struct arc_opcode_hash_entry entry;
+  static struct arc_opcode tmp[2];
+  static const struct arc_opcode *ptr[2];
+
+  memcpy (&tmp[0], opcode, sizeof (struct arc_opcode));
+  memset (&tmp[1], 0, sizeof (struct arc_opcode));
+  entry.count = 1;
+  entry.opcode = ptr;
+  ptr[0] = tmp;
+  ptr[1] = NULL;
+  return &entry;
+}
+
+
+/* Used by the assembler to match the list of tokens against a long (48 or
+   64 bits) instruction.  If a matching long instruction is found, then
+   some of the tokens are consumed in this function and converted into a
+   single LIMM value, which is then added to the end of the token list,
+   where it will be consumed by a LIMM operand that exists in the base
+   opcode of the long instruction.  */
+
+static const struct arc_opcode_hash_entry *
+find_special_case_long_opcode (const char *opname,
+                               int *ntok ATTRIBUTE_UNUSED,
+                               expressionS *tok ATTRIBUTE_UNUSED,
+                               int *nflgs,
+                               struct arc_flags *pflags)
+{
+  unsigned i;
+
+  if (*ntok == MAX_INSN_ARGS)
+    return NULL;
+
+  for (i = 0; i < arc_num_long_opcodes; ++i)
+    {
+      struct arc_opcode fake_opcode;
+      const struct arc_opcode *opcode;
+      struct arc_insn insn;
+      expressionS *limm_token;
+
+      opcode = &arc_long_opcodes[i].base_opcode;
+
+      if (!(opcode->cpu & arc_target))
+        continue;
+
+      if (!check_cpu_feature (opcode->subclass))
+        continue;
+
+      if (strcmp (opname, opcode->name) != 0)
+        continue;
+
+      /* Check that the flags are a match.  */
+      if (!parse_opcode_flags (opcode, *nflgs, pflags))
+        continue;
+
+      /* Parse the LIMM operands into the LIMM template.  */
+      memset (&fake_opcode, 0, sizeof (fake_opcode));
+      fake_opcode.name = "fake limm";
+      fake_opcode.opcode = arc_long_opcodes[i].limm_template;
+      fake_opcode.mask = arc_long_opcodes[i].limm_mask;
+      fake_opcode.cpu = opcode->cpu;
+      fake_opcode.insn_class = opcode->insn_class;
+      fake_opcode.subclass = opcode->subclass;
+      memcpy (&fake_opcode.operands[0],
+              &arc_long_opcodes[i].operands,
+              MAX_INSN_ARGS);
+      /* Leave fake_opcode.flags as zero.  */
+
+      pr_debug ("Calling assemble_insn to build fake limm value\n");
+      assemble_insn (&fake_opcode, tok, *ntok,
+                     NULL, 0, &insn);
+      pr_debug ("   got limm value: 0x%x\n", insn.insn);
+
+      /* Now create a new token at the end of the token array (We know this
+         is safe as the token array is always created with enough space for
+         MAX_INSN_ARGS, and we check at the start at the start of this
+         function that we're not there yet).  This new token will
+         correspond to a LIMM operand that will be contained in the
+         base_opcode of the arc_long_opcode.  */
+      limm_token = &tok[(*ntok)];
+      (*ntok)++;
+
+      /* Modify the LIMM token to hold the constant.  */
+      limm_token->X_op = O_constant;
+      limm_token->X_add_number = insn.insn;
+
+      /* Return the base opcode.  */
+      return build_fake_opcode_hash_entry (opcode);
+    }
+
+    return NULL;
+}
+
 /* Used to find special case opcode.  */
 
 static const struct arc_opcode_hash_entry *
@@ -2195,6 +2315,9 @@ find_special_case (const char *opname,
   if (entry == NULL)
     entry = find_special_case_flag (opname, nflgs, pflags);
 
+  if (entry == NULL)
+    entry = find_special_case_long_opcode (opname, ntok, tok, nflgs, pflags);
+
   return entry;
 }
 
diff --git a/gas/testsuite/gas/arc/nps400-7.d b/gas/testsuite/gas/arc/nps400-7.d
new file mode 100644
index 0000000..8e47d19
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-7.d
@@ -0,0 +1,32 @@
+#as: -mcpu=nps400
+#objdump: -dr
+
+.*: +file format .*arc.*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.*>:
+   0:	5823 0224 10c5      	mrgb	r0,r0,r1,0x4,0x5,0x3,0x8,0x6,0x2
+   6:	5a23 8224 10c5      	mrgb.cl	r2,r2,r1,0x4,0x5,0x3,0x8,0x6,0x2
+   c:	5940 0e04 10c2      	mov2b	r1,r1,r2,0x4,0x3,0x2,0x8,0x1,0x6
+  12:	5940 8e04 10c2      	mov2b.cl	r1,r2,0x4,0x3,0x2,0x8,0x1,0x6
+  18:	5b81 01cf f945      	ext4b	r3,r3,r12,0x1c,0x5,0xa,0x1e,0x1f
+  1e:	5aa1 81cf f945      	ext4b.cl	r2,r13,0x1c,0x5,0xa,0x1e,0x1f
+  24:	5b82 01cf f945      	ins4b	r3,r3,r12,0x5,0xa,0x1e,0x1f,0x1c
+  2a:	5aa2 81cf f945      	ins4b.cl	r2,r13,0x5,0xa,0x1e,0x1f,0x1c
+  30:	5e90 5280 d953 8446 	mov3b	r14,r14,r12,0x1,0,0x6,0x7,0x3,0x2,0x14,0x2,0x15
+  38:	5990 0c60 e281 9201 	mov3b	r1,r1,r12,0x4,0x1,0x1,0x3,0,0x10,0x3,0x3,0x8
+  40:	5e90 39c0 8c34 204e 	mov3b	r14,r14,r12,0x8,0x2,0xe,0x8,0x1,0x2,0xe,0,0x3
+  48:	5990 14a0 b621 b1a1 	mov3b	r1,r1,r12,0xc,0x3,0x1,0x3,0x2,0xd,0x5,0x1,0x2
+  50:	5831 3180 e800 0421 	mov3bcl	r0,r1,0x1,0,0x1,0,0x1,0x1,0xc,0x3,0
+  58:	5831 7fe0 d23b 0845 	mov3bcl	r0,r1,0x2,0x1,0x5,0x16,0x2,0x2,0x1f,0x2,0x3
+  60:	5831 7bc0 bdfb 8cc9 	mov3bcl	r0,r1,0x3,0x2,0x9,0x17,0x3,0x6,0x1e,0x1,0x1f
+  68:	5831 7bc0 87ec 13cb 	mov3bcl	r0,r1,0x4,0x3,0xb,0x18,0,0x1e,0x1e,0,0x1e
+  70:	58d0 38c3 3671 2814 	mov4b	r0,r0,r14,0xa,0x3,0x14,0x2,0x2,0,0x6,0x1,0x7,0xe,0,0x3
+  78:	58d0 e3e2 58b6 048b 	mov4b	r0,r0,r14,0x1,0,0xb,0xc,0x3,0x4,0x1f,0x2,0xb,0x18,0x1,0x2
+  80:	58d0 2068 e3fa 97c8 	mov4b	r0,r0,r14,0x5,0x1,0x8,0x15,0,0x1e,0x3,0x3,0x1f,0x8,0x2,0x8
+  88:	58d0 91a4 8deb 3ecd 	mov4b	r0,r0,r14,0xf,0x2,0xd,0x16,0x1,0x16,0xd,0,0x1e,0x4,0x3,0x4
+  90:	5cb1 1064 7231 0441 	mov4bcl	r12,r13,0x1,0x1,0x1,0x2,0x2,0x2,0x3,0x3,0x3,0x4,0,0x4
+  98:	5dd1 9064 1c31 0441 	mov4bcl	r13,r14,0x1,0x2,0x1,0x2,0x3,0x2,0x3,0,0x3,0x4,0x1,0x4
+  a0:	5a71 1064 a631 0441 	mov4bcl	r2,r3,0x1,0x3,0x1,0x2,0,0x2,0x3,0x1,0x3,0x4,0x2,0x4
+  a8:	5951 9064 c831 0441 	mov4bcl	r1,r2,0x1,0,0x1,0x2,0x1,0x2,0x3,0x2,0x3,0x4,0x3,0x4
diff --git a/gas/testsuite/gas/arc/nps400-7.s b/gas/testsuite/gas/arc/nps400-7.s
new file mode 100644
index 0000000..d02712b
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-7.s
@@ -0,0 +1,41 @@
+        .text
+
+        ;; mrgb
+        mrgb		r0,r0,r1,4,5,3,8,6,2
+        mrgb.cl		r2,r2,r1,4,5,3,8,6,2
+
+        ;; mov2b
+        mov2b		r1,r1,r2,4,3,2,8,1,6
+        mov2b.cl	r1,r2,4,3,2,8,1,6
+
+        ;; ext4b
+        ext4b		r3,r3,r12,28,5,10,30,31
+        ext4b.cl	r2,r13,28,5,10,30,31
+
+        ;; ins4b
+        ins4b		r3,r3,r12,5,10,30,31,28
+        ins4b.cl	r2,r13,5,10,30,31,28
+
+        ;; mov3b
+        mov3b   r14,r14,r12, 1,0,6,  7,3,2,  20,2,21
+        mov3b   r1,r1,r12,   4,1,1,  3,0,16, 3,3,8
+        mov3b   r14,r14,r12, 8,2,14, 8,1,2,  14,0,3
+        mov3b   r1,r1,r12,   12,3,1, 3,2,13, 5,1,2
+
+        ;; mov3bcl
+        mov3bcl    r0,r1,  1,0,1,  0,1,1,   12,3,0
+        mov3b.cl   r0,r1,  2,1,5,  22,2,2,  31,2,3
+        mov3bcl    r0,r1,  3,2,9,  23,3,6,  30,1,31
+        mov3b.cl   r0,r1,  4,3,11, 24,0,30, 30,0,30
+
+        ;; mov4b
+        mov4b   r0,r0,r14,  10,3,20, 2,2,0,   6,1,7,   14,0,3
+        mov4b   r0,r0,r14,  1,0,11,  12,3,4,  31,2,11, 24,1,2
+        mov4b   r0,r0,r14,  5,1,8,   21,0,30, 3,3,31,  8,2,8
+        mov4b   r0,r0,r14,  15,2,13, 22,1,22, 13,0,30, 4,3,4
+
+        ;; mov4bl
+        mov4bcl    r12,r13,1,1,1,2,2,2,3,3,3,4,0,4
+        mov4b.cl   r13,r14,1,2,1,2,3,2,3,0,3,4,1,4
+        mov4bcl    r2,r3,  1,3,1,2,0,2,3,1,3,4,2,4
+        mov4b.cl   r1,r2,  1,0,1,2,1,2,3,2,3,4,3,4