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| author | Renlin Li <renlin.li@arm.com> | 2016-02-24 13:55:30 +0000 |
|---|---|---|
| committer | Renlin Li <renlin.li@arm.com> | 2016-02-24 14:02:51 +0000 |
| commit | 3e309328e8d91e37f2f3cea15f8a686d3bdfa700 (patch) | |
| tree | 7355b5d4b1b3ab76217baa8e5f7279b5e07bbf27 /gas | |
| parent | 8afc7bea4018bf535902503c9a25dd4a96dfa3ca (diff) | |
| download | gdb-3e309328e8d91e37f2f3cea15f8a686d3bdfa700.zip gdb-3e309328e8d91e37f2f3cea15f8a686d3bdfa700.tar.gz gdb-3e309328e8d91e37f2f3cea15f8a686d3bdfa700.tar.bz2 | |
[OPCODES][ARM]Fix mask for a few coprocessor opcodes.
opcodes/
2016-02-24 Renlin Li <renlin.li@arm.com>
* arm-dis.c (coprocessor_opcodes): Fix mask for vsel, vmaxnm, vminnm,
vrint(mpna).
gas/
2016-02-24 Renlin Li <renlin.li@arm.com>
* testsuite/gas/arm/mask_1.d: New.
* testsuite/gas/arm/mask_1.s: New.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/mask_1.d | 28 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/mask_1.s | 17 |
3 files changed, 50 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 9efeae4..37c5daa 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2016-02-24 Renlin Li <renlin.li@arm.com> + * testsuite/gas/arm/mask_1.d: New. + * testsuite/gas/arm/mask_1.s: New. + +2016-02-24 Renlin Li <renlin.li@arm.com> + * testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11. * testsuite/gas/arm/copro.d: Update. diff --git a/gas/testsuite/gas/arm/mask_1.d b/gas/testsuite/gas/arm/mask_1.d new file mode 100644 index 0000000..eddcd65 --- /dev/null +++ b/gas/testsuite/gas/arm/mask_1.d @@ -0,0 +1,28 @@ +#objdump: -dr --prefix-address --show-raw-insn +#name: vsel, vmaxnm, vminnm, vrint decoding mask. +#as: -march=armv8-a +# This test is only valid on ELF based ports. +#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +# Test VFMA instruction disassembly + +.*: *file format .*arm.* + + +Disassembly of section .text: +0+000 <.*> fe011a10 mcr2 10, 0, r1, cr1, cr0, \{0\} ; <UNPREDICTABLE> +0+004 <.*> fe011b10 mcr2 11, 0, r1, cr1, cr0, \{0\} ; <UNPREDICTABLE> +0+008 <.*> fe811a10 mcr2 10, 4, r1, cr1, cr0, \{0\} ; <UNPREDICTABLE> +0+00c <.*> fe811b10 mcr2 11, 4, r1, cr1, cr0, \{0\} ; <UNPREDICTABLE> +0+010 <.*> fe811a50 mcr2 10, 4, r1, cr1, cr0, \{2\} ; <UNPREDICTABLE> +0+014 <.*> fe811b50 mcr2 11, 4, r1, cr1, cr0, \{2\} ; <UNPREDICTABLE> +0+018 <.*> fefb0ae0 ; <UNDEFINED> instruction: 0xfefb0ae0 +0+01c <.*> fefb0be0 ; <UNDEFINED> instruction: 0xfefb0be0 +0+020 <.*> fefb0ae0 ; <UNDEFINED> instruction: 0xfefb0ae0 +0+024 <.*> fefb0be0 ; <UNDEFINED> instruction: 0xfefb0be0 +0+028 <.*> fef80ae0 ; <UNDEFINED> instruction: 0xfef80ae0 +0+02c <.*> fef80be0 ; <UNDEFINED> instruction: 0xfef80be0 +0+030 <.*> fef90ae0 ; <UNDEFINED> instruction: 0xfef90ae0 +0+034 <.*> fef90be0 ; <UNDEFINED> instruction: 0xfef90be0 +0+038 <.*> fefa0ae0 ; <UNDEFINED> instruction: 0xfefa0ae0 +0+03c <.*> fefa0be0 ; <UNDEFINED> instruction: 0xfefa0be0 diff --git a/gas/testsuite/gas/arm/mask_1.s b/gas/testsuite/gas/arm/mask_1.s new file mode 100644 index 0000000..7a347d8 --- /dev/null +++ b/gas/testsuite/gas/arm/mask_1.s @@ -0,0 +1,17 @@ + .text + .inst 0xfe011a10 @ mcr2 10, 0, r1, cr1, cr0, {0} <UNPREDICTABLE> + .inst 0xfe011b10 @ mcr2 11, 0, r1, cr1, cr0, {0} <UNPREDICTABLE> + .inst 0xfe811a10 @ mcr2 10, 4, r1, cr1, cr0, {0} <UNPREDICTABLE> + .inst 0xfe811b10 @ mcr2 11, 4, r1, cr1, cr0, {0} <UNPREDICTABLE> + .inst 0xfe811a50 @ mcr2 10, 4, r1, cr1, cr0, {2} <UNPREDICTABLE> + .inst 0xfe811b50 @ mcr2 11, 4, r1, cr1, cr0, {2} <UNPREDICTABLE> + .inst 0xfefb0ae0 @ <UNDEFINED> instruction: 0xfefb0ae0 + .inst 0xfefb0be0 @ <UNDEFINED> instruction: 0xfefb0be0 + .inst 0xfefb0ae0 @ <UNDEFINED> instruction: 0xfefb0ae0 + .inst 0xfefb0be0 @ <UNDEFINED> instruction: 0xfefb0be0 + .inst 0xfef80ae0 @ <UNDEFINED> instruction: 0xfef80ae0 + .inst 0xfef80be0 @ <UNDEFINED> instruction: 0xfef80be0 + .inst 0xfef90ae0 @ <UNDEFINED> instruction: 0xfef90ae0 + .inst 0xfef90be0 @ <UNDEFINED> instruction: 0xfef90be0 + .inst 0xfefa0ae0 @ <UNDEFINED> instruction: 0xfefa0ae0 + .inst 0xfefa0be0 @ <UNDEFINED> instruction: 0xfefa0be0 |