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authorThiemo Seufer <ths@networkno.de>2006-07-18 14:06:10 +0000
committerThiemo Seufer <ths@networkno.de>2006-07-18 14:06:10 +0000
commit2f2760a39d021c06873f0c3bb7bb2bd55b6934cd (patch)
tree1ee966d27a6c71167449b6c21ef8d5ba26159589 /gas
parent9cd732686aaea238144977b4287bcf08e934db5b (diff)
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* gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
arguments for "madd.s" so that the instruction is correct for mips1 and still matches "bc3*".
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/mips/mips4.d17
-rw-r--r--gas/testsuite/gas/mips/mips4.s13
3 files changed, 19 insertions, 17 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index ecf5b43..327364b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-07-18 Maciej W. Rozycki <macro@mips.com>
+
+ * gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
+ arguments for "madd.s" so that the instruction is correct for mips1
+ and still matches "bc3*".
+
2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
Michael Meissner <michael.meissner@amd.com>
diff --git a/gas/testsuite/gas/mips/mips4.d b/gas/testsuite/gas/mips/mips4.d
index bc3e924..1dfcb39 100644
--- a/gas/testsuite/gas/mips/mips4.d
+++ b/gas/testsuite/gas/mips/mips4.d
@@ -21,7 +21,7 @@ Disassembly of section .text:
0+0030 <[^>]*> ldxc1 \$f2,a0\(a1\)
0+0034 <[^>]*> lwxc1 \$f2,a0\(a1\)
0+0038 <[^>]*> madd.d \$f0,\$f2,\$f4,\$f6
-0+003c <[^>]*> madd.s \$f0,\$f2,\$f4,\$f6
+0+003c <[^>]*> madd.s \$f10,\$f8,\$f2,\$f0
0+0040 <[^>]*> movf a0,a1,\$fcc4
0+0044 <[^>]*> movf.d \$f4,\$f6,\$fcc0
0+0048 <[^>]*> movf.s \$f4,\$f6,\$fcc0
@@ -40,11 +40,12 @@ Disassembly of section .text:
0+007c <[^>]*> nmadd.s \$f0,\$f2,\$f4,\$f6
0+0080 <[^>]*> nmsub.d \$f0,\$f2,\$f4,\$f6
0+0084 <[^>]*> nmsub.s \$f0,\$f2,\$f4,\$f6
-0+0088 <[^>]*> prefx 0x4,a0\(a1\)
-0+008c <[^>]*> recip.d \$f4,\$f6
-0+0090 <[^>]*> recip.s \$f4,\$f6
-0+0094 <[^>]*> rsqrt.d \$f4,\$f6
-0+0098 <[^>]*> rsqrt.s \$f4,\$f6
-0+009c <[^>]*> sdxc1 \$f4,a0\(a1\)
-0+00a0 <[^>]*> swxc1 \$f4,a0\(a1\)
+0+0088 <[^>]*> pref 0x4,0\(a0\)
+0+008c <[^>]*> prefx 0x4,a0\(a1\)
+0+0090 <[^>]*> recip.d \$f4,\$f6
+0+0094 <[^>]*> recip.s \$f4,\$f6
+0+0098 <[^>]*> rsqrt.d \$f4,\$f6
+0+009c <[^>]*> rsqrt.s \$f4,\$f6
+0+00a0 <[^>]*> sdxc1 \$f4,a0\(a1\)
+0+00a4 <[^>]*> swxc1 \$f4,a0\(a1\)
...
diff --git a/gas/testsuite/gas/mips/mips4.s b/gas/testsuite/gas/mips/mips4.s
index 591292b..d346c2a 100644
--- a/gas/testsuite/gas/mips/mips4.s
+++ b/gas/testsuite/gas/mips/mips4.s
@@ -11,7 +11,8 @@ text_label:
ldxc1 $f2,$4($5)
lwxc1 $f2,$4($5)
madd.d $f0,$f2,$f4,$f6
- madd.s $f0,$f2,$f4,$f6
+ # This choice of arguments is so that it matches bc3f on pre-mips4.
+ madd.s $f10,$f8,$f2,$f0
movf $4,$5,$fcc4
movf.d $f4,$f6,$fcc0
movf.s $f4,$f6,$fcc0
@@ -30,14 +31,8 @@ text_label:
nmadd.s $f0,$f2,$f4,$f6
nmsub.d $f0,$f2,$f4,$f6
nmsub.s $f0,$f2,$f4,$f6
-
- # We don't test pref because currently the disassembler will
- # disassemble it as lwc3. lwc3 is correct for mips1 to mips3,
- # while pref is correct for mips4. Unfortunately, the
- # disassembler does not know which architecture it is
- # disassembling for.
- # pref 4,0($4)
-
+ # It used to be disabled due to a clash with lwc3.
+ pref 4,0($4)
prefx 4,$4($5)
recip.d $f4,$f6
recip.s $f4,$f6