MIPS: Fix XPA base and Virtualization ASE instruction handling

Correct a commit 7d64c587c15f ("Add support for the MIPS eXtended
Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization
ASE instructions to be wrongly always enabled with the selection of the
MIPS32r2 or higher ISA.

For example this source assembles successfully as shown below:

$ cat xpa.s
	mfhc0	$2, $1
$ as -32 -mips32 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1'
$ as -32 -mips32r2 -o xpa.o xpa.s
$ objdump -d xpa.o

xpa.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <.text>:
   0:	40420800 	mfhc0	v0,c0_random
	...
$

To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA
instructions in the opcode table.  Additionally, for XPA Virtualization
ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag
and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA).

Now the same source is correctly rejected unless the `-mxpa' option is
also used:

$ as -32 -mips32r2 -o xpa.o xpa.s
xpa.s: Assembler messages:
xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1'
$ as -32 -mips32r2 -mxpa -o xpa.o xpa.s
$

Add test cases for XPA base and XPA Virtualization ASE instructions.

Parts of this change by Andrew Bennett.

	include/
	* opcode/mips.h (ASE_XPA_VIRT): New macro.

	opcodes/
	* mips-dis.c (mips_calculate_combination_ases): Handle the
	ASE_XPA_VIRT flag.
	(parse_mips_ase_option): New function.
	(parse_mips_dis_option): Factor out ASE option handling to the
	new function.  Call `mips_calculate_combination_ases'.
	* mips-opc.c (XPAVZ): New macro.
	(mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0",
	"mfhgc0", "mthc0" and "mthgc0".

	gas/
	* config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag.
	* testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump'
	flags.  Add `-mvirt' to `as' flags.
	* testsuite/gas/mips/xpa-err.d: New test.
	* testsuite/gas/mips/xpa-virt-err.d: New test.
	* testsuite/gas/mips/xpa-err.l: New stderr output.
	* testsuite/gas/mips/xpa-virt-err.l: New stderr output.
	* testsuite/gas/mips/xpa-err.s: New test source.
	* testsuite/gas/mips/xpa-virt-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	binutils/
	* testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test.
	* testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test.
	* testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test.
	* testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test.
	* testsuite/binutils-all/mips/mips-xpa-virt.s: New test source.
	* testsuite/binutils-all/mips/mips.exp: Run the new tests.

10 files changed, 62 insertions, 3 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d152909..4d8f552 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,17 @@
+2017-06-30  Maciej W. Rozycki  <macro@imgtec.com>
+	    Andrew Bennett  <andrew.bennett@imgtec.com>
+
+	* config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag.
+	* testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump'
+	flags.  Add `-mvirt' to `as' flags.
+	* testsuite/gas/mips/xpa-err.d: New test.
+	* testsuite/gas/mips/xpa-virt-err.d: New test.
+	* testsuite/gas/mips/xpa-err.l: New stderr output.
+	* testsuite/gas/mips/xpa-virt-err.l: New stderr output.
+	* testsuite/gas/mips/xpa-err.s: New test source.
+	* testsuite/gas/mips/xpa-virt-err.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
 2017-06-29  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index d06143a..9b42ef8 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -2133,11 +2133,19 @@ mips_set_ase (const struct mips_ase *ase, struct mips_set_options *opts,
 
   /* Clear combination ASE flags, which need to be recalculated based on
      updated regular ASE settings.  */
-  opts->ase &= ~ASE_MIPS16E2_MT;
+  opts->ase &= ~(ASE_MIPS16E2_MT | ASE_XPA_VIRT);
 
   if (enabled_p)
     opts->ase |= ase->flags;
 
+  /* The Virtualization ASE has eXtended Physical Addressing (XPA)
+     instructions which are only valid when both ASEs are enabled.
+     This sets the ASE_XPA_VIRT flag when both ASEs are present.  */
+  if ((opts->ase & (ASE_XPA | ASE_VIRT)) == (ASE_XPA | ASE_VIRT))
+    {
+      opts->ase |= ASE_XPA_VIRT;
+      mask |= ASE_XPA_VIRT;
+    }
   if ((opts->ase & (ASE_MIPS16E2 | ASE_MT)) == (ASE_MIPS16E2 | ASE_MT))
     {
       opts->ase |= ASE_MIPS16E2_MT;
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 26d29e4..6a6b47d 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1562,6 +1562,9 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test_arches "msa-branch"	[mips_arch_list_matching mips32r2]
 
     run_dump_test_arches "xpa"		[mips_arch_list_matching mips32r2 !micromips]
+    run_dump_test_arches "xpa-err"	[mips_arch_list_matching mips32r2 !micromips]
+    run_dump_test_arches "xpa-virt-err" \
+				[mips_arch_list_matching mips32r2 !micromips]
     run_dump_test_arches "r5" "-32"	[mips_arch_list_matching mips32r5 !micromips]
 
     run_dump_test "pcrel-1"
diff --git a/gas/testsuite/gas/mips/xpa-err.d b/gas/testsuite/gas/mips/xpa-err.d
new file mode 100644
index 0000000..772bd49
--- /dev/null
+++ b/gas/testsuite/gas/mips/xpa-err.d
@@ -0,0 +1,3 @@
+#name: MIPS XPA instruction errors
+#as: -32 -mxpa
+#error-output: xpa-err.l
diff --git a/gas/testsuite/gas/mips/xpa-err.l b/gas/testsuite/gas/mips/xpa-err.l
new file mode 100644
index 0000000..0ea0fc9
--- /dev/null
+++ b/gas/testsuite/gas/mips/xpa-err.l
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*:8: Error: opcode not supported on this processor: [^ ]+ \([^)]+\) `mthc0 \$2,\$1'
diff --git a/gas/testsuite/gas/mips/xpa-err.s b/gas/testsuite/gas/mips/xpa-err.s
new file mode 100644
index 0000000..0bd9daf
--- /dev/null
+++ b/gas/testsuite/gas/mips/xpa-err.s
@@ -0,0 +1,8 @@
+# Verify that switching off either `xpa' causes an assembly error
+# with an XPA instruction.
+
+	.text
+foo:
+	mfhc0	$2, $1
+	.set	noxpa
+	mthc0	$2, $1
diff --git a/gas/testsuite/gas/mips/xpa-virt-err.d b/gas/testsuite/gas/mips/xpa-virt-err.d
new file mode 100644
index 0000000..bc51319
--- /dev/null
+++ b/gas/testsuite/gas/mips/xpa-virt-err.d
@@ -0,0 +1,3 @@
+#name: MIPS XPA Virtualization ASE instruction errors
+#as: -32 -mxpa -mvirt
+#error-output: xpa-virt-err.l
diff --git a/gas/testsuite/gas/mips/xpa-virt-err.l b/gas/testsuite/gas/mips/xpa-virt-err.l
new file mode 100644
index 0000000..8f964c5
--- /dev/null
+++ b/gas/testsuite/gas/mips/xpa-virt-err.l
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*:9: Error: opcode not supported on this processor: [^ ]+ \([^)]+\) `mthgc0 \$2,\$1'
+.*:13: Error: opcode not supported on this processor: [^ ]+ \([^)]+\) `mthgc0 \$2,\$1'
diff --git a/gas/testsuite/gas/mips/xpa-virt-err.s b/gas/testsuite/gas/mips/xpa-virt-err.s
new file mode 100644
index 0000000..fcc0c73
--- /dev/null
+++ b/gas/testsuite/gas/mips/xpa-virt-err.s
@@ -0,0 +1,15 @@
+# Verify that switching off either `xpa' or `virt' causes an assembly
+# error with an XPA Virtualization ASE instruction, which requires
+# both at a time.
+
+	.text
+foo:
+	mfhgc0	$2, $1
+	.set	noxpa
+	mthgc0	$2, $1
+	.set	xpa
+	mfhgc0	$2, $1
+	.set	novirt
+	mthgc0	$2, $1
+	.set	virt
+	mfhgc0	$2, $1
diff --git a/gas/testsuite/gas/mips/xpa.d b/gas/testsuite/gas/mips/xpa.d
index f1047c9..32098f1 100644
--- a/gas/testsuite/gas/mips/xpa.d
+++ b/gas/testsuite/gas/mips/xpa.d
@@ -1,6 +1,6 @@
-#objdump: -dr --prefix-addresses --show-raw-insn -Mxpa,cp0-names=mips32r2
+#objdump: -dr --prefix-addresses --show-raw-insn -M cp0-names=mips32r2
 #name: XPA instructions
-#as: -32 -mxpa
+#as: -32 -mxpa -mvirt
 
 .*: +file format .*mips.*