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| author | Jan Beulich <jbeulich@novell.com> | 2013-04-09 11:05:45 +0000 |
|---|---|---|
| committer | Jan Beulich <jbeulich@novell.com> | 2013-04-09 11:05:45 +0000 |
| commit | 05ac0ffbb586a4a1f7689a591da10134da78a443 (patch) | |
| tree | 9562240aad3e60b5dfbb8cf8b7b8c1e0b15acb80 /gas | |
| parent | 2d51fb74314efc1494043f60c72c92e6a62f623d (diff) | |
| download | gdb-05ac0ffbb586a4a1f7689a591da10134da78a443.zip gdb-05ac0ffbb586a4a1f7689a591da10134da78a443.tar.gz gdb-05ac0ffbb586a4a1f7689a591da10134da78a443.tar.bz2 | |
gas/
2013-04-09 Jan Beulich <jbeulich@suse.com>
* gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
if there was none specified for moves between scalar and core
register.
gas/testsuite/
2013-04-09 Jan Beulich <jbeulich@suse.com>
* gas/arm/neon-omit.s: Add tests for suffix less VMOV.
* gas/arm/neon-omit.d: Update accordingly.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 20 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/neon-omit.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/neon-omit.s | 5 |
5 files changed, 38 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index c9b1e31..48ac7e5 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2013-04-09 Jan Beulich <jbeulich@suse.com> + * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix + if there was none specified for moves between scalar and core + register. + +2013-04-09 Jan Beulich <jbeulich@suse.com> + * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the NEON_ALL_LANES case. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 83f66dd..9b8d8c1 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -15360,6 +15360,16 @@ do_neon_mov (void) unsigned dn = NEON_SCALAR_REG (inst.operands[0].reg); unsigned x = NEON_SCALAR_INDEX (inst.operands[0].reg); + /* .<size> is optional here, defaulting to .32. */ + if (inst.vectype.elems == 0 + && inst.operands[0].vectype.type == NT_invtype + && inst.operands[1].vectype.type == NT_invtype) + { + inst.vectype.el[0].type = NT_untyped; + inst.vectype.el[0].size = 32; + inst.vectype.elems = 1; + } + et = neon_check_type (2, NS_NULL, N_8 | N_16 | N_32 | N_KEY, N_EQK); logsize = neon_logbits (et.size); @@ -15409,6 +15419,16 @@ do_neon_mov (void) unsigned x = NEON_SCALAR_INDEX (inst.operands[1].reg); unsigned abcdebits = 0; + /* .<dt> is optional here, defaulting to .32. */ + if (inst.vectype.elems == 0 + && inst.operands[0].vectype.type == NT_invtype + && inst.operands[1].vectype.type == NT_invtype) + { + inst.vectype.el[0].type = NT_untyped; + inst.vectype.el[0].size = 32; + inst.vectype.elems = 1; + } + et = neon_check_type (2, NS_NULL, N_EQK, N_S8 | N_S16 | N_U8 | N_U16 | N_32 | N_KEY); logsize = neon_logbits (et.size); diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 28d8530..510927f 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2013-04-09 Jan Beulich <jbeulich@suse.com> + * gas/arm/neon-omit.s: Add tests for suffix less VMOV. + * gas/arm/neon-omit.d: Update accordingly. + +2013-04-09 Jan Beulich <jbeulich@suse.com> + * gas/arm/neon-addressing-bad.s: Add test for further invalid VST operands. * gas/arm/neon-addressing-bad.l: Update accordingly. diff --git a/gas/testsuite/gas/arm/neon-omit.d b/gas/testsuite/gas/arm/neon-omit.d index 3a1eeab..540f453 100644 --- a/gas/testsuite/gas/arm/neon-omit.d +++ b/gas/testsuite/gas/arm/neon-omit.d @@ -93,4 +93,6 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> f3954556 vsli\.16 q2, q3, #5 0[0-9a-f]+ <[^>]+> f3bff6b7 vqshlu\.s64 d15, d23, #63.* 0[0-9a-f]+ <[^>]+> f2b25386 vext\.8 d5, d18, d6, #3 +0[0-9a-f]+ <[^>]+> ee000b10 vmov(\.32)? d0\[0\], r0 +0[0-9a-f]+ <[^>]+> ee100b10 vmov(\.32)? r0, d0\[0\] 0[0-9a-f]+ <[^>]+> f3020d54 vmul\.f32 q0, q1, q2 diff --git a/gas/testsuite/gas/arm/neon-omit.s b/gas/testsuite/gas/arm/neon-omit.s index 35490a5..54f1817 100644 --- a/gas/testsuite/gas/arm/neon-omit.s +++ b/gas/testsuite/gas/arm/neon-omit.s @@ -96,5 +96,10 @@ vqshlu.s64 d15,d23,#63 vext.8 d5,d18,d6,#3 +@ Also test VMOV with omitted suffix: + + vmov d0[0], r0 + vmov r0, d0[0] + @ PR 11136 - this used to crash the assembler. vmul.f32 q0,q1,q2 |