* gas/macros/macros.exp: xfail powerpc-*-aix.

	* gas/ppc/astest64.s: New.
	* gas/ppc/astest64.d: New.
	* gas/ppc/astest2_64.s: New.
	* gas/ppc/astest2_64.d: New.
	* gas/ppc/test1elf.asm: New.
	* gas/ppc/test1xcoff.asm: New.
	* gas/ppc/generate.sh: New. Generate new files below from above .asm
	* gas/ppc/test1elf32.s: New.
	* gas/ppc/test1elf32.d: New.
	* gas/ppc/test1elf64.s: New.
	* gas/ppc/test1elf64.d: New.
	* gas/ppc/test1xcoff32.s: New.
	* gas/ppc/test1xcoff32.d: New.
	* gas/ppc/ppc.exp: Run new tests.
	* gas/ppc/simpshft.s: Tweak align now that we get nops.

17 files changed, 1063 insertions, 3 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 34d24dc..21e65a3 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,23 @@
+2001-08-27  Staffan Ulfberg  <staffanu@swox.se>
+	    Alan Modra  <amodra@bigpond.net.au>
+
+	* gas/macros/macros.exp: xfail powerpc-*-aix.
+	* gas/ppc/astest64.s: New.
+	* gas/ppc/astest64.d: New.
+	* gas/ppc/astest2_64.s: New.
+	* gas/ppc/astest2_64.d: New.
+	* gas/ppc/test1elf.asm: New.
+	* gas/ppc/test1xcoff.asm: New.
+	* gas/ppc/generate.sh: New. Generate new files below from above .asm
+	* gas/ppc/test1elf32.s: New.
+	* gas/ppc/test1elf32.d: New.
+	* gas/ppc/test1elf64.s: New.
+	* gas/ppc/test1elf64.d: New.
+	* gas/ppc/test1xcoff32.s: New.
+	* gas/ppc/test1xcoff32.d: New.
+	* gas/ppc/ppc.exp: Run new tests.
+	* gas/ppc/simpshft.s: Tweak align now that we get nops.
+
 2001-08-24  Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
 
 	* binutils-all/readelf.exp: Don't regard mips*el-*-* as traditional
diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp
index b4ddefe..fd481df 100644
--- a/gas/testsuite/gas/macros/macros.exp
+++ b/gas/testsuite/gas/macros/macros.exp
@@ -26,9 +26,10 @@ case $target_triplet in {
     }
 }
 
-if { ![istarget hppa*-*-*] || [istarget *-*-linux*] } {
+if { ![istarget hppa*-*-*] || [istarget *-*-linux*]} {
     # FIXME: Due to macro mishandling of ONLY_STANDARD_ESCAPES.
     setup_xfail cris-*-*
+    setup_xfail powerpc-*-aix*
     setup_xfail sh*-*-*
     setup_xfail z8k*-*-*
     run_dump_test strings
diff --git a/gas/testsuite/gas/ppc/astest2_64.d b/gas/testsuite/gas/ppc/astest2_64.d
new file mode 100644
index 0000000..3a3d7db
--- /dev/null
+++ b/gas/testsuite/gas/ppc/astest2_64.d
@@ -0,0 +1,70 @@
+#objdump: -Dr
+#name: PowerPC 64-bit test 2
+
+.*: +file format elf64-powerpc
+
+Disassembly of section \.text:
+
+0000000000000000 <foo>:
+   0:	60 00 00 00 	nop
+   4:	60 00 00 00 	nop
+   8:	60 00 00 00 	nop
+   c:	48 00 00 04 	b	10 <foo\+0x10>
+  10:	48 00 00 08 	b	18 <foo\+0x18>
+  14:	48 00 00 00 	b	14 <foo\+0x14>
+			14: R_PPC64_REL24	x
+  18:	48 00 00 04 	b	1c <foo\+0x1c>
+			18: R_PPC64_REL24	\.data\+0x4
+  1c:	48 00 00 00 	b	1c <foo\+0x1c>
+			1c: R_PPC64_REL24	z
+  20:	48 00 00 14 	b	34 <foo\+0x34>
+			20: R_PPC64_REL24	z\+0x14
+  24:	48 00 00 04 	b	28 <foo\+0x28>
+  28:	48 00 00 00 	b	28 <foo\+0x28>
+			28: R_PPC64_REL24	a
+  2c:	48 00 00 48 	b	74 <apfour>
+  30:	48 00 00 04 	b	34 <foo\+0x34>
+			30: R_PPC64_REL24	a\+0x4
+  34:	48 00 00 44 	b	78 <apfour\+0x4>
+  38:	00 00 00 38 	\.long 0x38
+			38: R_PPC64_ADDR32	\.text\+0x38
+  3c:	00 00 00 44 	\.long 0x44
+			3c: R_PPC64_ADDR32	\.text\+0x44
+  40:	00 00 00 00 	\.long 0x0
+			40: R_PPC64_REL32	x
+  44:	00 00 00 04 	\.long 0x4
+			44: R_PPC64_REL32	x\+0x4
+	\.\.\.
+			48: R_PPC64_REL32	z
+			4c: R_PPC64_REL32	y
+			50: R_PPC64_ADDR32	x
+			54: R_PPC64_ADDR32	y
+			58: R_PPC64_ADDR32	z
+  5c:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			5c: R_PPC64_ADDR32	x\+0xfffffffffffffffc
+  60:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			60: R_PPC64_ADDR32	y\+0xfffffffffffffffc
+  64:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			64: R_PPC64_ADDR32	z\+0xfffffffffffffffc
+  68:	00 00 00 08 	\.long 0x8
+  6c:	00 00 00 08 	\.long 0x8
+
+0000000000000070 <a>:
+  70:	00 00 00 00 	\.long 0x0
+			70: R_PPC64_ADDR32	a
+
+0000000000000074 <apfour>:
+	\.\.\.
+			74: R_PPC64_ADDR32	b
+			78: R_PPC64_ADDR32	apfour
+  7c:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+  80:	00 00 00 02 	\.long 0x2
+			80: R_PPC64_ADDR32	apfour\+0x2
+  84:	00 00 00 00 	\.long 0x0
+Disassembly of section \.data:
+
+0000000000000000 <x>:
+   0:	00 00 00 00 	\.long 0x0
+
+0000000000000004 <y>:
+   4:	00 00 00 00 	\.long 0x0
diff --git a/gas/testsuite/gas/ppc/astest2_64.s b/gas/testsuite/gas/ppc/astest2_64.s
new file mode 100644
index 0000000..c70248d
--- /dev/null
+++ b/gas/testsuite/gas/ppc/astest2_64.s
@@ -0,0 +1,50 @@
+four	= 4
+	.section ".text"
+foo:	
+	nop ; nop ; nop
+	.globl a
+	b .+4
+	b .+8
+	b x
+	b y
+	b z
+	b z+20
+	b .+four
+	b a
+	b b
+	b a+4
+	b b+4
+	.long .
+	.long .+8
+	.long x-.
+	.long x+4-.
+	.long z-.
+	.long y-.
+	.long x
+	.long y
+	.long z
+	.long x-four
+	.long y-four
+	.long z-four
+	.long a-.
+	.long b-.
+a:	.long a
+b:	.long b
+
+apfour	= a + four
+	.long apfour
+	.long a-apfour
+	.long apfour+2
+	.long apfour-b
+
+	.section ".data"
+	.globl x
+	.globl z
+x:	.long 0
+z	= . + 4
+y:	.long 0
+
+	.type	foo,@function
+	.type	a,@function
+	.type	b,@function
+	.type	apfour,@function
diff --git a/gas/testsuite/gas/ppc/astest64.d b/gas/testsuite/gas/ppc/astest64.d
new file mode 100644
index 0000000..a87415a
--- /dev/null
+++ b/gas/testsuite/gas/ppc/astest64.d
@@ -0,0 +1,69 @@
+#objdump: -Dr
+#name: PowerPC 64-bit test 1
+
+.*: +file format elf64-powerpc
+
+Disassembly of section \.text:
+
+0000000000000000 <foo>:
+   0:	60 00 00 00 	nop
+   4:	60 00 00 00 	nop
+   8:	60 00 00 00 	nop
+
+000000000000000c <a>:
+   c:	48 00 00 04 	b	10 <apfour>
+
+0000000000000010 <apfour>:
+  10:	48 00 00 08 	b	18 <apfour\+0x8>
+  14:	48 00 00 00 	b	14 <apfour\+0x4>
+			14: R_PPC64_REL24	x
+  18:	48 00 00 04 	b	1c <apfour\+0xc>
+			18: R_PPC64_REL24	\.data\+0x4
+  1c:	48 00 00 00 	b	1c <apfour\+0xc>
+			1c: R_PPC64_REL24	z
+  20:	48 00 00 14 	b	34 <apfour\+0x24>
+			20: R_PPC64_REL24	z\+0x14
+  24:	48 00 00 04 	b	28 <apfour\+0x18>
+  28:	48 00 00 00 	b	28 <apfour\+0x18>
+			28: R_PPC64_REL24	a
+  2c:	4b ff ff e4 	b	10 <apfour>
+  30:	48 00 00 04 	b	34 <apfour\+0x24>
+			30: R_PPC64_REL24	a\+0x4
+  34:	4b ff ff e0 	b	14 <apfour\+0x4>
+  38:	00 00 00 38 	\.long 0x38
+			38: R_PPC64_ADDR32	\.text\+0x38
+  3c:	00 00 00 44 	\.long 0x44
+			3c: R_PPC64_ADDR32	\.text\+0x44
+  40:	00 00 00 00 	\.long 0x0
+			40: R_PPC64_REL32	x
+  44:	00 00 00 04 	\.long 0x4
+			44: R_PPC64_REL32	x\+0x4
+	\.\.\.
+			48: R_PPC64_REL32	z
+			4c: R_PPC64_REL32	y
+			50: R_PPC64_ADDR32	x
+			54: R_PPC64_ADDR32	y
+			58: R_PPC64_ADDR32	z
+  5c:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			5c: R_PPC64_ADDR32	x\+0xfffffffffffffffc
+  60:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			60: R_PPC64_ADDR32	y\+0xfffffffffffffffc
+  64:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			64: R_PPC64_ADDR32	z\+0xfffffffffffffffc
+  68:	ff ff ff a4 	\.long 0xffffffa4
+  6c:	ff ff ff a4 	\.long 0xffffffa4
+	\.\.\.
+			70: R_PPC64_ADDR32	a
+			74: R_PPC64_ADDR32	b
+			78: R_PPC64_ADDR32	apfour
+  7c:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+  80:	00 00 00 02 	\.long 0x2
+			80: R_PPC64_ADDR32	apfour\+0x2
+  84:	00 00 00 00 	\.long 0x0
+Disassembly of section \.data:
+
+0000000000000000 <x>:
+   0:	00 00 00 00 	\.long 0x0
+
+0000000000000004 <y>:
+   4:	00 00 00 00 	\.long 0x0
diff --git a/gas/testsuite/gas/ppc/astest64.s b/gas/testsuite/gas/ppc/astest64.s
new file mode 100644
index 0000000..908889d
--- /dev/null
+++ b/gas/testsuite/gas/ppc/astest64.s
@@ -0,0 +1,50 @@
+	.section ".data"
+	.globl x
+	.globl z
+x:	.long 0
+z	= . + 4
+four	= z - x - 4
+y:	.long 0
+	
+	.section ".text"
+foo:	
+	nop ; nop ; nop
+	.globl a
+a:	b .+4
+b:	b .+8
+	b x
+	b y
+	b z
+	b z+20
+	b .+four
+	b a
+	b b
+	b a+4
+	b b+4
+	.long .
+	.long .+8
+	.long x-.
+	.long x+4-.
+	.long z-.
+	.long y-.
+	.long x
+	.long y
+	.long z
+	.long x-four
+	.long y-four
+	.long z-four
+	.long a-.
+	.long b-.
+	.long a
+	.long b
+
+apfour	= a + four
+	.long apfour
+	.long a-apfour
+	.long apfour+2
+	.long apfour-b
+
+	.type	foo,@function
+	.type	a,@function
+	.type	b,@function
+	.type	apfour,@function
diff --git a/gas/testsuite/gas/ppc/generate.sh b/gas/testsuite/gas/ppc/generate.sh
new file mode 100755
index 0000000..069ced3
--- /dev/null
+++ b/gas/testsuite/gas/ppc/generate.sh
@@ -0,0 +1,6 @@
+#! /bin/sh
+
+m4 -DELF32 test1elf.asm >test1elf32.s
+m4 -DELF64 test1elf.asm >test1elf64.s
+m4 -DXCOFF32 test1xcoff.asm >test1xcoff32.s
+#m4 -DXCOFF64 test1xcoff.asm >test1xcoff64.s
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 572fbc3..c7d5274 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -5,7 +5,14 @@
 # These tests are currently ELF specific, only because nobody has
 # converted them to look for XCOFF relocations.
 
-if { [istarget powerpc*-*-*bsd*] \
+if { [istarget powerpc64*-*-*] || [istarget *-*-elf64*]} then {
+# FIXME: Pass -x to objdump as well as -Dr for astest64 and astest2_64.
+    run_dump_test "astest64"
+    run_dump_test "astest2_64"
+    run_dump_test "test1elf64"
+} elseif { [istarget powerpc*-*aix*] } then {
+    run_dump_test "test1xcoff32"
+} elseif { [istarget powerpc*-*-*bsd*] \
      || [istarget powerpc*-*-elf*] \
      || [istarget powerpc*-*-eabi*] \
      || [istarget powerpc*-*-sysv4*] \
@@ -14,6 +21,7 @@ if { [istarget powerpc*-*-*bsd*] \
      || [istarget powerpc*-*-rtems*] } then {
     run_dump_test "astest"
     run_dump_test "astest2"
+    run_dump_test "test1elf32"
 }
 
 if { [istarget powerpc*-*-*] } then {
diff --git a/gas/testsuite/gas/ppc/simpshft.s b/gas/testsuite/gas/ppc/simpshft.s
index 39ff98d..608f0e9 100644
--- a/gas/testsuite/gas/ppc/simpshft.s
+++ b/gas/testsuite/gas/ppc/simpshft.s
@@ -107,4 +107,4 @@
 	clrlslwi	%r4,%r3,31,31
 
 # Force alignment so that we pass the test on AIX
-	.p2align	3
+	.p2align	3,0
diff --git a/gas/testsuite/gas/ppc/test1elf.asm b/gas/testsuite/gas/ppc/test1elf.asm
new file mode 100644
index 0000000..51f881c
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1elf.asm
@@ -0,0 +1,95 @@
+dnl divert(-1)
+ifdef(`ELF64',
+`	define(`WORD',`.llong')
+	define(`LDW',`ld')')
+ifdef(`ELF32',
+`	define(`WORD',`.long')
+	define(`LDW',`lwz')')
+dnl divert(0) dnl
+
+define(`nl',`
+') nl nl nl nl nl nl
+
+	.section	".data"
+dsym0:	WORD	0xdeadbeef
+dsym1:
+
+ifdef(`ELF64',`
+	.section	".toc"
+.L_tsym0:
+	.tc	ignored0[TC],dsym0
+.L_tsym1:
+	.tc	ignored1[TC],dsym1
+.L_tsym2:
+	.tc	ignored2[TC],usym0
+.L_tsym3:
+	.tc	ignored3[TC],usym1
+.L_tsym4:
+	.tc	ignored4[TC],esym0
+.L_tsym5:
+	.tc	ignored5[TC],esym1
+')
+
+	.section	".text"
+	LDW	3,dsym0@l(3)
+	LDW	3,dsym1@l(3)
+	LDW	3,usym0@l(3)
+	LDW	3,usym1@l(3)
+	LDW	3,esym0@l(3)
+	LDW	3,esym1@l(3)
+
+ifdef(`ELF64',`
+	LDW	3,.L_tsym0@toc(2)
+	LDW	3,.L_tsym1@toc(2)
+	LDW	3,.L_tsym2@toc(2)
+	LDW	3,.L_tsym3@toc(2)
+	LDW	3,.L_tsym4@toc(2)
+	LDW	3,.L_tsym5@toc(2)
+
+	lis	4,.L_tsym5@toc@ha
+	LDW	3,.L_tsym5@toc@l(2)
+')
+
+	li	3,dsym1-dsym0
+	li	3,dsym0-dsym1
+	li	3,usym1-usym0
+	li	3,usym0-usym1
+	li	3,dsym0-usym0
+	li	3,usym0-dsym0
+
+	li	3,dsym0@l
+	li	3,dsym0@h
+	li	3,dsym0@ha
+ifdef(`ELF64',`
+	li	3,dsym0@higher
+	li	3,dsym0@highera
+	li	3,dsym0@highest
+	li	3,dsym0@highesta
+')
+
+	li	3,usym0-usym1@l
+	li	3,usym0-usym1@h
+	li	3,usym0-usym1@ha
+ifdef(`ELF64',`
+	li	3,usym0-usym1@higher
+	li	3,usym0-usym1@highera
+	li	3,usym0-usym1@highest
+	li	3,usym0-usym1@highesta
+')
+
+	LDW	3,dsym1-dsym0@l(4)
+
+	LDW	3,.text@l(0)
+
+	.section	".data"
+usym0:	WORD	0xcafebabe
+usym1:
+
+datpt:	.long	jk-.+10000000
+dat0:	.long	jk-dat1
+dat1:	.long	jk-dat1
+dat2:	.long	jk-dat1
+ifdef(`ELF64',`
+dat3:	.llong	jk-dat1
+dat4:	.llong	jk-dat1
+')
diff --git a/gas/testsuite/gas/ppc/test1elf32.d b/gas/testsuite/gas/ppc/test1elf32.d
new file mode 100644
index 0000000..e7f2da6
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1elf32.d
@@ -0,0 +1,90 @@
+#objdump: -Drx
+#name: PowerPC Test 1, 32 bit elf
+
+.*: +file format elf32-powerpc
+.*
+architecture: powerpc:common, flags 0x00000011:
+HAS_RELOC, HAS_SYMS
+start address 0x00000000
+
+Sections:
+Idx Name +Size +VMA +LMA +File off +Algn
+  0 \.text +00000050  0+0000  0+0000  .*
+ +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+  1 \.data +00000018  0+0000  0+0000  .*
+ +CONTENTS, ALLOC, LOAD, RELOC, DATA
+  2 \.bss  +00000000  0+0000  0+0000  .*
+ +ALLOC
+SYMBOL TABLE:
+0+0000 l    d  \.text	0+0000 
+0+0000 l    d  \.data	0+0000 
+0+0000 l    d  \.bss	0+0000 
+0+0000 l       \.data	0+0000 dsym0
+0+0004 l       \.data	0+0000 dsym1
+0+0004 l       \.data	0+0000 usym0
+0+0008 l       \.data	0+0000 usym1
+0+0008 l       \.data	0+0000 datpt
+0+000c l       \.data	0+0000 dat0
+0+0010 l       \.data	0+0000 dat1
+0+0014 l       \.data	0+0000 dat2
+0+0000         \*UND\*	0+0000 esym0
+0+0000         \*UND\*	0+0000 esym1
+0+0000         \*UND\*	0+0000 jk
+
+
+Disassembly of section \.text:
+
+0+0000 <\.text>:
+   0:	80 63 00 00 	lwz	r3,0\(r3\)
+			2: R_PPC_ADDR16_LO	dsym0
+   4:	80 63 00 00 	lwz	r3,0\(r3\)
+			6: R_PPC_ADDR16_LO	dsym1
+   8:	80 63 00 00 	lwz	r3,0\(r3\)
+			a: R_PPC_ADDR16_LO	usym0
+   c:	80 63 00 00 	lwz	r3,0\(r3\)
+			e: R_PPC_ADDR16_LO	usym1
+  10:	80 63 00 00 	lwz	r3,0\(r3\)
+			12: R_PPC_ADDR16_LO	esym0
+  14:	80 63 00 00 	lwz	r3,0\(r3\)
+			16: R_PPC_ADDR16_LO	esym1
+  18:	38 60 00 04 	li	r3,4
+  1c:	38 60 ff fc 	li	r3,-4
+  20:	38 60 00 04 	li	r3,4
+  24:	38 60 ff fc 	li	r3,-4
+  28:	38 60 ff fc 	li	r3,-4
+  2c:	38 60 00 04 	li	r3,4
+  30:	38 60 00 00 	li	r3,0
+			32: R_PPC_ADDR16_LO	dsym0
+  34:	38 60 00 00 	li	r3,0
+			36: R_PPC_ADDR16_HI	dsym0
+  38:	38 60 00 00 	li	r3,0
+			3a: R_PPC_ADDR16_HA	dsym0
+  3c:	38 60 ff fc 	li	r3,-4
+  40:	38 60 ff ff 	li	r3,-1
+  44:	38 60 00 00 	li	r3,0
+  48:	80 64 00 04 	lwz	r3,4\(r4\)
+  4c:	80 60 00 00 	lwz	r3,0\(r0\)
+			4e: R_PPC_ADDR16_LO	\.text
+Disassembly of section \.data:
+
+0+0000 <dsym0>:
+   0:	de ad be ef 	stfdu	f21,-16657\(r13\)
+
+0+0004 <dsym1>:
+   4:	ca fe ba be 	lfd	f23,-17730\(r30\)
+
+0+0008 <datpt>:
+   8:	00 98 96 80 	\.long 0x989680
+			8: R_PPC_REL32	jk\+0x989680
+
+0+000c <dat0>:
+   c:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			c: R_PPC_REL32	jk\+0xf+fffc
+
+0+0010 <dat1>:
+  10:	00 00 00 00 	\.long 0x0
+			10: R_PPC_REL32	jk
+
+0+0014 <dat2>:
+  14:	00 00 00 04 	\.long 0x4
+			14: R_PPC_REL32	jk\+0x4
diff --git a/gas/testsuite/gas/ppc/test1elf32.s b/gas/testsuite/gas/ppc/test1elf32.s
new file mode 100644
index 0000000..decc7f2
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1elf32.s
@@ -0,0 +1,58 @@
+
+	
+	
+
+ 
+ 
+ 
+ 
+ 
+ 
+
+
+	.section	".data"
+dsym0:	.long	0xdeadbeef
+dsym1:
+
+
+
+	.section	".text"
+	lwz	3,dsym0@l(3)
+	lwz	3,dsym1@l(3)
+	lwz	3,usym0@l(3)
+	lwz	3,usym1@l(3)
+	lwz	3,esym0@l(3)
+	lwz	3,esym1@l(3)
+
+
+
+	li	3,dsym1-dsym0
+	li	3,dsym0-dsym1
+	li	3,usym1-usym0
+	li	3,usym0-usym1
+	li	3,dsym0-usym0
+	li	3,usym0-dsym0
+
+	li	3,dsym0@l
+	li	3,dsym0@h
+	li	3,dsym0@ha
+
+
+	li	3,usym0-usym1@l
+	li	3,usym0-usym1@h
+	li	3,usym0-usym1@ha
+
+
+	lwz	3,dsym1-dsym0@l(4)
+
+	lwz	3,.text@l(0)
+
+	.section	".data"
+usym0:	.long	0xcafebabe
+usym1:
+
+datpt:	.long	jk-.+10000000
+dat0:	.long	jk-dat1
+dat1:	.long	jk-dat1
+dat2:	.long	jk-dat1
+
diff --git a/gas/testsuite/gas/ppc/test1elf64.d b/gas/testsuite/gas/ppc/test1elf64.d
new file mode 100644
index 0000000..2e98ae3
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1elf64.d
@@ -0,0 +1,145 @@
+#objdump: -Drx
+#name: PowerPC Test 1, 64 bit elf
+
+.*: +file format elf64-powerpc
+.*
+architecture: powerpc:common, flags 0x00000011:
+HAS_RELOC, HAS_SYMS
+start address 0x0000000000000000
+
+Sections:
+Idx Name          Size      VMA               LMA               File off  Algn
+  0 \.text         00000090  0000000000000000  0000000000000000  .*
+                  CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+  1 \.data         00000030  0000000000000000  0000000000000000  .*
+                  CONTENTS, ALLOC, LOAD, RELOC, DATA
+  2 \.bss          00000000  0000000000000000  0000000000000000  .*
+                  ALLOC
+  3 \.toc          00000030  0000000000000000  0000000000000000  .*
+                  CONTENTS, ALLOC, LOAD, RELOC, DATA
+SYMBOL TABLE:
+0000000000000000 l    d  \.text	0000000000000000 
+0000000000000000 l    d  \.data	0000000000000000 
+0000000000000000 l    d  \.bss	0000000000000000 
+0000000000000000 l       \.data	0000000000000000 dsym0
+0000000000000008 l       \.data	0000000000000000 dsym1
+0000000000000000 l    d  \.toc	0000000000000000 
+0000000000000008 l       \.data	0000000000000000 usym0
+0000000000000010 l       \.data	0000000000000000 usym1
+0000000000000010 l       \.data	0000000000000000 datpt
+0000000000000014 l       \.data	0000000000000000 dat0
+0000000000000018 l       \.data	0000000000000000 dat1
+000000000000001c l       \.data	0000000000000000 dat2
+0000000000000020 l       \.data	0000000000000000 dat3
+0000000000000028 l       \.data	0000000000000000 dat4
+0000000000000000         \*UND\*	0000000000000000 esym0
+0000000000000000         \*UND\*	0000000000000000 esym1
+0000000000000000         \*UND\*	0000000000000000 jk
+
+
+Disassembly of section \.text:
+
+0000000000000000 <\.text>:
+   0:	e8 63 00 00 	ld	r3,0\(r3\)
+			2: R_PPC64_ADDR16_LO_DS	dsym0
+   4:	e8 63 00 00 	ld	r3,0\(r3\)
+			6: R_PPC64_ADDR16_LO_DS	dsym1
+   8:	e8 63 00 00 	ld	r3,0\(r3\)
+			a: R_PPC64_ADDR16_LO_DS	usym0
+   c:	e8 63 00 00 	ld	r3,0\(r3\)
+			e: R_PPC64_ADDR16_LO_DS	usym1
+  10:	e8 63 00 00 	ld	r3,0\(r3\)
+			12: R_PPC64_ADDR16_LO_DS	esym0
+  14:	e8 63 00 00 	ld	r3,0\(r3\)
+			16: R_PPC64_ADDR16_LO_DS	esym1
+  18:	e8 62 00 00 	ld	r3,0\(r2\)
+			1a: R_PPC64_TOC16_DS	\.toc
+  1c:	e8 62 00 08 	ld	r3,8\(r2\)
+			1e: R_PPC64_TOC16_DS	\.toc\+0x8
+  20:	e8 62 00 10 	ld	r3,16\(r2\)
+			22: R_PPC64_TOC16_DS	\.toc\+0x10
+  24:	e8 62 00 18 	ld	r3,24\(r2\)
+			26: R_PPC64_TOC16_DS	\.toc\+0x18
+  28:	e8 62 00 20 	ld	r3,32\(r2\)
+			2a: R_PPC64_TOC16_DS	\.toc\+0x20
+  2c:	e8 62 00 28 	ld	r3,40\(r2\)
+			2e: R_PPC64_TOC16_DS	\.toc\+0x28
+  30:	3c 80 00 28 	lis	r4,40
+			32: R_PPC64_TOC16_HA	\.toc\+0x28
+  34:	e8 62 00 28 	ld	r3,40\(r2\)
+			36: R_PPC64_TOC16_LO_DS	\.toc\+0x28
+  38:	38 60 00 08 	li	r3,8
+  3c:	38 60 ff f8 	li	r3,-8
+  40:	38 60 00 08 	li	r3,8
+  44:	38 60 ff f8 	li	r3,-8
+  48:	38 60 ff f8 	li	r3,-8
+  4c:	38 60 00 08 	li	r3,8
+  50:	38 60 00 00 	li	r3,0
+			52: R_PPC64_ADDR16_LO	dsym0
+  54:	38 60 00 00 	li	r3,0
+			56: R_PPC64_ADDR16_HI	dsym0
+  58:	38 60 00 00 	li	r3,0
+			5a: R_PPC64_ADDR16_HA	dsym0
+  5c:	38 60 00 00 	li	r3,0
+			5e: R_PPC64_ADDR16_HIGHER	dsym0
+  60:	38 60 00 00 	li	r3,0
+			62: R_PPC64_ADDR16_HIGHERA	dsym0
+  64:	38 60 00 00 	li	r3,0
+			66: R_PPC64_ADDR16_HIGHEST	dsym0
+  68:	38 60 00 00 	li	r3,0
+			6a: R_PPC64_ADDR16_HIGHESTA	dsym0
+  6c:	38 60 ff f8 	li	r3,-8
+  70:	38 60 ff ff 	li	r3,-1
+  74:	38 60 00 00 	li	r3,0
+  78:	38 60 ff ff 	li	r3,-1
+  7c:	38 60 00 00 	li	r3,0
+  80:	38 60 ff ff 	li	r3,-1
+  84:	38 60 00 00 	li	r3,0
+  88:	e8 64 00 08 	ld	r3,8\(r4\)
+  8c:	e8 60 00 00 	ld	r3,0\(r0\)
+			8e: R_PPC64_ADDR16_LO_DS	\.text
+Disassembly of section \.data:
+
+0000000000000000 <dsym0>:
+   0:	00 00 00 00 	\.long 0x0
+   4:	de ad be ef 	stfdu	f21,-16657\(r13\)
+
+0000000000000008 <dsym1>:
+   8:	00 00 00 00 	\.long 0x0
+   c:	ca fe ba be 	lfd	f23,-17730\(r30\)
+
+0000000000000010 <datpt>:
+  10:	00 98 96 80 	\.long 0x989680
+			10: R_PPC64_REL32	jk\+0x989680
+
+0000000000000014 <dat0>:
+  14:	ff ff ff fc 	fnmsub	f31,f31,f31,f31
+			14: R_PPC64_REL32	jk\+0xfffffffffffffffc
+
+0000000000000018 <dat1>:
+  18:	00 00 00 00 	\.long 0x0
+			18: R_PPC64_REL32	jk
+
+000000000000001c <dat2>:
+  1c:	00 00 00 04 	\.long 0x4
+			1c: R_PPC64_REL32	jk\+0x4
+
+0000000000000020 <dat3>:
+  20:	00 00 00 00 	\.long 0x0
+			20: R_PPC64_REL64	jk\+0x8
+  24:	00 00 00 08 	\.long 0x8
+
+0000000000000028 <dat4>:
+  28:	00 00 00 00 	\.long 0x0
+			28: R_PPC64_REL64	jk\+0x10
+  2c:	00 00 00 10 	\.long 0x10
+Disassembly of section \.toc:
+
+0000000000000000 <\.toc>:
+	\.\.\.
+			0: R_PPC64_ADDR64	dsym0
+			8: R_PPC64_ADDR64	dsym1
+			10: R_PPC64_ADDR64	usym0
+			18: R_PPC64_ADDR64	usym1
+			20: R_PPC64_ADDR64	esym0
+			28: R_PPC64_ADDR64	esym1
diff --git a/gas/testsuite/gas/ppc/test1elf64.s b/gas/testsuite/gas/ppc/test1elf64.s
new file mode 100644
index 0000000..3d89922
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1elf64.s
@@ -0,0 +1,95 @@
+	
+	
+
+
+ 
+ 
+ 
+ 
+ 
+ 
+
+
+	.section	".data"
+dsym0:	.llong	0xdeadbeef
+dsym1:
+
+
+	.section	".toc"
+.L_tsym0:
+	.tc	ignored0[TC],dsym0
+.L_tsym1:
+	.tc	ignored1[TC],dsym1
+.L_tsym2:
+	.tc	ignored2[TC],usym0
+.L_tsym3:
+	.tc	ignored3[TC],usym1
+.L_tsym4:
+	.tc	ignored4[TC],esym0
+.L_tsym5:
+	.tc	ignored5[TC],esym1
+
+
+	.section	".text"
+	ld	3,dsym0@l(3)
+	ld	3,dsym1@l(3)
+	ld	3,usym0@l(3)
+	ld	3,usym1@l(3)
+	ld	3,esym0@l(3)
+	ld	3,esym1@l(3)
+
+
+	ld	3,.L_tsym0@toc(2)
+	ld	3,.L_tsym1@toc(2)
+	ld	3,.L_tsym2@toc(2)
+	ld	3,.L_tsym3@toc(2)
+	ld	3,.L_tsym4@toc(2)
+	ld	3,.L_tsym5@toc(2)
+
+	lis	4,.L_tsym5@toc@ha
+	ld	3,.L_tsym5@toc@l(2)
+
+
+	li	3,dsym1-dsym0
+	li	3,dsym0-dsym1
+	li	3,usym1-usym0
+	li	3,usym0-usym1
+	li	3,dsym0-usym0
+	li	3,usym0-dsym0
+
+	li	3,dsym0@l
+	li	3,dsym0@h
+	li	3,dsym0@ha
+
+	li	3,dsym0@higher
+	li	3,dsym0@highera
+	li	3,dsym0@highest
+	li	3,dsym0@highesta
+
+
+	li	3,usym0-usym1@l
+	li	3,usym0-usym1@h
+	li	3,usym0-usym1@ha
+
+	li	3,usym0-usym1@higher
+	li	3,usym0-usym1@highera
+	li	3,usym0-usym1@highest
+	li	3,usym0-usym1@highesta
+
+
+	ld	3,dsym1-dsym0@l(4)
+
+	ld	3,.text@l(0)
+
+	.section	".data"
+usym0:	.llong	0xcafebabe
+usym1:
+
+datpt:	.long	jk-.+10000000
+dat0:	.long	jk-dat1
+dat1:	.long	jk-dat1
+dat2:	.long	jk-dat1
+
+dat3:	.llong	jk-dat1
+dat4:	.llong	jk-dat1
+
diff --git a/gas/testsuite/gas/ppc/test1xcoff.asm b/gas/testsuite/gas/ppc/test1xcoff.asm
new file mode 100644
index 0000000..cdfb19d
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1xcoff.asm
@@ -0,0 +1,82 @@
+dnl divert(-1)
+ifdef(`XCOFF64',
+`	define(`WORD',`.llong')
+	define(`LDW',`ld')')
+ifdef(`XCOFF32',
+`	define(`WORD',`.long')
+	define(`LDW',`lwz')')
+dnl divert(0) dnl
+
+define(`nl',`
+') nl nl nl nl nl nl
+
+	.csect	[RW]
+dsym0:	WORD	0xdeadbeef
+dsym1:
+
+	.toc
+.L_tsym0:
+	.tc	ignored0[TC],dsym0
+.L_tsym1:
+	.tc	ignored1[TC],dsym1
+.L_tsym2:
+	.tc	ignored2[TC],usym0
+.L_tsym3:
+	.tc	ignored3[TC],usym1
+.L_tsym4:
+	.tc	ignored4[TC],esym0
+.L_tsym5:
+	.tc	ignored5[TC],esym1
+.L_tsym6:
+	.tc	ignored6[TC],.text
+
+	.csect	.crazy_table[RO]
+xdsym0:	WORD	0xbeefed
+xdsym1:
+	.csect	[PR]
+	.lglobl	reference_csect_relative_symbols
+reference_csect_relative_symbols:
+	LDW	3,xdsym0(3)
+	LDW	3,xdsym1(3)
+	LDW	3,xusym0(3)
+	LDW	3,xusym1(3)
+
+	.lglobl	dubious_references_to_default_RW_csect
+dubious_references_to_default_RW_csect:
+	LDW	3,dsym0(3)
+	LDW	3,dsym1(3)
+	LDW	3,usym0(3)
+	LDW	3,usym1(3)
+
+	.lglobl	reference_via_toc
+reference_via_toc:
+	LDW	3,.L_tsym0(2)
+	LDW	3,.L_tsym1(2)
+	LDW	3,.L_tsym2(2)
+	LDW	3,.L_tsym3(2)
+	LDW	3,.L_tsym4(2)
+	LDW	3,.L_tsym5(2)
+
+	.lglobl	subtract_symbols
+subtract_symbols:
+	li	3,dsym1-dsym0
+	li	3,dsym0-dsym1
+	li	3,usym1-usym0
+	li	3,usym0-usym1
+	li	3,dsym0-usym0
+	li	3,usym0-dsym0
+	LDW	3,dsym1-dsym0(4)
+
+	.lglobl	load_addresses
+load_addresses:
+	la	3,xdsym0(0)
+	la	3,xusym0(0)
+
+	la	3,.L_tsym6(2)
+
+	.csect	[RW]
+usym0:	WORD	0xcafebabe
+usym1:  WORD    0xbaad
+	.csect	.crazy_table[RO]
+xusym0:	WORD	0xbeefed
+xusym1:
diff --git a/gas/testsuite/gas/ppc/test1xcoff32.d b/gas/testsuite/gas/ppc/test1xcoff32.d
new file mode 100644
index 0000000..6bbea53
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1xcoff32.d
@@ -0,0 +1,139 @@
+#objdump: -Drx
+#as:
+#name: PowerPC Test 1, 32 bit XCOFF
+
+.*: +file format aixcoff-rs6000
+.*
+architecture: rs6000:6000, flags 0x00000031:
+HAS_RELOC, HAS_SYMS, HAS_LOCALS
+start address 0x0+0000
+
+Sections:
+Idx Name +Size +VMA +LMA +File off +Algn
+  0 \.text +00000068  0+0000  0+0000  000000a8  2\*\*3
+ +CONTENTS, ALLOC, LOAD, RELOC, CODE
+  1 \.data +00000028  0+0068  0+0068  00000110  2\*\*3
+ +CONTENTS, ALLOC, LOAD, RELOC, DATA
+  2 \.bss  +00000000  0+0090  0+0090  00000000  2\*\*3
+ +ALLOC
+SYMBOL TABLE:
+\[  0\]\(sec -2\)\(fl 0x00\)\(ty   0\)\(scl 103\) \(nx 1\) 0x00000000 fake
+File 
+\[  2\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000000 \.crazy_table
+AUX val     8 prmhsh 0 snhsh 0 typ 1 algn 2 clss 1 stb 0 snstb 0
+\[  4\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000008 
+AUX val    96 prmhsh 0 snhsh 0 typ 1 algn 2 clss 0 stb 0 snstb 0
+\[  6\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000008 reference_csect_relative_symbols
+AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
+\[  8\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000018 dubious_references_to_default_RW_csect
+AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
+\[ 10\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000028 reference_via_toc
+AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
+\[ 12\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000040 subtract_symbols
+AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
+\[ 14\]\(sec  1\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x0000005c load_addresses
+AUX indx    4 prmhsh 0 snhsh 0 typ 2 algn 0 clss 0 stb 0 snstb 0
+\[ 16\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000068 
+AUX val    12 prmhsh 0 snhsh 0 typ 1 algn 2 clss 5 stb 0 snstb 0
+\[ 18\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000074 TOC
+AUX val     0 prmhsh 0 snhsh 0 typ 1 algn 2 clss 15 stb 0 snstb 0
+\[ 20\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000074 ignored0
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 22\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000078 ignored1
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 24\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x0000007c ignored2
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 26\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000080 ignored3
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 28\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000084 ignored4
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 30\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x00000088 ignored5
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 32\]\(sec  2\)\(fl 0x00\)\(ty   0\)\(scl 107\) \(nx 1\) 0x0000008c ignored6
+AUX val     4 prmhsh 0 snhsh 0 typ 1 algn 2 clss 3 stb 0 snstb 0
+\[ 34\]\(sec  0\)\(fl 0x00\)\(ty   0\)\(scl   2\) \(nx 1\) 0x00000000 esym0
+AUX val     0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0
+\[ 36\]\(sec  0\)\(fl 0x00\)\(ty   0\)\(scl   2\) \(nx 1\) 0x00000000 esym1
+AUX val     0 prmhsh 0 snhsh 0 typ 0 algn 0 clss 0 stb 0 snstb 0
+
+
+Disassembly of section \.text:
+
+0+0000 <\.crazy_table>:
+   0:	00 be ef ed 	\.long 0xbeefed
+   4:	00 be ef ed 	\.long 0xbeefed
+
+0+0008 <reference_csect_relative_symbols>:
+   8:	80 63 00 00 	l	r3,0\(r3\)
+   c:	80 63 00 04 	l	r3,4\(r3\)
+  10:	80 63 00 04 	l	r3,4\(r3\)
+  14:	80 63 00 00 	l	r3,0\(r3\)
+
+0+0018 <dubious_references_to_default_RW_csect>:
+  18:	80 63 00 00 	l	r3,0\(r3\)
+  1c:	80 63 00 04 	l	r3,4\(r3\)
+  20:	80 63 00 04 	l	r3,4\(r3\)
+  24:	80 63 00 08 	l	r3,8\(r3\)
+
+0+0028 <reference_via_toc>:
+  28:	80 62 00 0c 	l	r3,12\(r2\)
+			2a: R_TOC	ignored0\+0xf+ff8c
+  2c:	80 62 00 10 	l	r3,16\(r2\)
+			2e: R_TOC	ignored1\+0xf+ff88
+  30:	80 62 00 14 	l	r3,20\(r2\)
+			32: R_TOC	ignored2\+0xf+ff84
+  34:	80 62 00 18 	l	r3,24\(r2\)
+			36: R_TOC	ignored3\+0xf+ff80
+  38:	80 62 00 1c 	l	r3,28\(r2\)
+			3a: R_TOC	ignored4\+0xf+ff7c
+  3c:	80 62 00 20 	l	r3,32\(r2\)
+			3e: R_TOC	ignored5\+0xf+ff78
+
+0+0040 <subtract_symbols>:
+  40:	38 60 00 04 	lil	r3,4
+  44:	38 60 ff fc 	lil	r3,-4
+  48:	38 60 00 04 	lil	r3,4
+  4c:	38 60 ff fc 	lil	r3,-4
+  50:	38 60 ff fc 	lil	r3,-4
+  54:	38 60 00 04 	lil	r3,4
+  58:	80 64 00 04 	l	r3,4\(r4\)
+
+0+005c <load_addresses>:
+  5c:	38 60 00 00 	lil	r3,0
+  60:	38 60 00 04 	lil	r3,4
+  64:	38 62 00 24 	cal	r3,36\(r2\)
+			66: R_TOC	ignored6\+0xf+ff74
+Disassembly of section \.data:
+
+0+0068 <TOC-0xc>:
+  68:	de ad be ef 	stfdu	f21,-16657\(r13\)
+  6c:	ca fe ba be 	lfd	f23,-17730\(r30\)
+  70:	00 00 ba ad 	\.long 0xbaad
+
+0+0074 <TOC>:
+  74:	00 00 00 68 	\.long 0x68
+			74: R_POS	\.data\+0xf+ff98
+
+0+0078 <ignored1>:
+  78:	00 00 00 6c 	\.long 0x6c
+			78: R_POS	\.data\+0xf+ff98
+
+0+007c <ignored2>:
+  7c:	00 00 00 6c 	\.long 0x6c
+			7c: R_POS	\.data\+0xf+ff98
+
+0+0080 <ignored3>:
+  80:	00 00 00 70 	\.long 0x70
+			80: R_POS	\.data\+0xf+ff98
+
+0+0084 <ignored4>:
+  84:	00 00 00 00 	\.long 0x0
+			84: R_POS	esym0
+
+0+0088 <ignored5>:
+  88:	00 00 00 00 	\.long 0x0
+			88: R_POS	esym1
+
+0+008c <ignored6>:
+  8c:	00 00 00 00 	\.long 0x0
+			8c: R_POS	\.crazy_table
diff --git a/gas/testsuite/gas/ppc/test1xcoff32.s b/gas/testsuite/gas/ppc/test1xcoff32.s
new file mode 100644
index 0000000..83ae981
--- /dev/null
+++ b/gas/testsuite/gas/ppc/test1xcoff32.s
@@ -0,0 +1,82 @@
+
+	
+	
+
+ 
+ 
+ 
+ 
+ 
+ 
+
+
+	.csect	[RW]
+dsym0:	.long	0xdeadbeef
+dsym1:
+
+	.toc
+.L_tsym0:
+	.tc	ignored0[TC],dsym0
+.L_tsym1:
+	.tc	ignored1[TC],dsym1
+.L_tsym2:
+	.tc	ignored2[TC],usym0
+.L_tsym3:
+	.tc	ignored3[TC],usym1
+.L_tsym4:
+	.tc	ignored4[TC],esym0
+.L_tsym5:
+	.tc	ignored5[TC],esym1
+.L_tsym6:
+	.tc	ignored6[TC],.text
+
+	.csect	.crazy_table[RO]
+xdsym0:	.long	0xbeefed
+xdsym1:
+	.csect	[PR]
+	.lglobl	reference_csect_relative_symbols
+reference_csect_relative_symbols:
+	lwz	3,xdsym0(3)
+	lwz	3,xdsym1(3)
+	lwz	3,xusym0(3)
+	lwz	3,xusym1(3)
+
+	.lglobl	dubious_references_to_default_RW_csect
+dubious_references_to_default_RW_csect:
+	lwz	3,dsym0(3)
+	lwz	3,dsym1(3)
+	lwz	3,usym0(3)
+	lwz	3,usym1(3)
+
+	.lglobl	reference_via_toc
+reference_via_toc:
+	lwz	3,.L_tsym0(2)
+	lwz	3,.L_tsym1(2)
+	lwz	3,.L_tsym2(2)
+	lwz	3,.L_tsym3(2)
+	lwz	3,.L_tsym4(2)
+	lwz	3,.L_tsym5(2)
+
+	.lglobl	subtract_symbols
+subtract_symbols:
+	li	3,dsym1-dsym0
+	li	3,dsym0-dsym1
+	li	3,usym1-usym0
+	li	3,usym0-usym1
+	li	3,dsym0-usym0
+	li	3,usym0-dsym0
+	lwz	3,dsym1-dsym0(4)
+
+	.lglobl	load_addresses
+load_addresses:
+	la	3,xdsym0(0)
+	la	3,xusym0(0)
+
+	la	3,.L_tsym6(2)
+
+	.csect	[RW]
+usym0:	.long	0xcafebabe
+usym1:  .long    0xbaad
+	.csect	.crazy_table[RO]
+xusym0:	.long	0xbeefed
+xusym1: