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author | Kazu Hirata <kazu@codesourcery.com> | 2007-08-28 13:43:06 +0000 |
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committer | Kazu Hirata <kazu@codesourcery.com> | 2007-08-28 13:43:06 +0000 |
commit | def8fc92cd99eaefc284d7ac90ef671d32888544 (patch) | |
tree | 29adeeeb2b41550b44e9640ad3d9ea4372fb65c8 /gas | |
parent | f75192f2d0ae5241a96e5856e2a9aa74b9ac204c (diff) | |
download | gdb-def8fc92cd99eaefc284d7ac90ef671d32888544.zip gdb-def8fc92cd99eaefc284d7ac90ef671d32888544.tar.gz gdb-def8fc92cd99eaefc284d7ac90ef671d32888544.tar.bz2 |
* config/tc-m68k.c (mcf52235_ctrl): Add cache registers.
(mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2.
(mcf5407_ctrl): New.
(m68k_cpus): Adjust 5407 entry.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/config/tc-m68k.c | 15 |
2 files changed, 19 insertions, 3 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 4e91f92..71276d4 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2007-08-28 Nathan Sidwell <nathan@codesourcery.com> + + * config/tc-m68k.c (mcf52235_ctrl): Add cache registers. + (mcf5253_ctrl): Add RAMBAR, MBAR, MBAR2. + (mcf5407_ctrl): New. + (m68k_cpus): Adjust 5407 entry. + 2007-08-28 Maxim Kuvyrkov <maxim@codesourcery.com> * config/tc-m68k.c (mcf51qe_ctrl): Define 51QE control registers. diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c index e821237..d4e21ce 100644 --- a/gas/config/tc-m68k.c +++ b/gas/config/tc-m68k.c @@ -205,7 +205,7 @@ static const enum m68k_register mcf52223_ctrl[] = { 0 }; static const enum m68k_register mcf52235_ctrl[] = { - VBR, FLASHBAR, RAMBAR, RAMBAR1, + VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1, 0 }; static const enum m68k_register mcf5225_ctrl[] = { @@ -225,7 +225,7 @@ static const enum m68k_register mcf5250_ctrl[] = { 0 }; static const enum m68k_register mcf5253_ctrl[] = { - VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR1, MBAR, + VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR1, RAMBAR, MBAR, MBAR2, 0 }; static const enum m68k_register mcf5271_ctrl[] = { @@ -272,6 +272,15 @@ static const enum m68k_register mcfv4e_ctrl[] = { ROMBAR /* ROMBAR0 */, RAMBAR /* RAMBAR1 */, 0 }; +static const enum m68k_register mcf5407_ctrl[] = { + CACR, ASID, ACR0, ACR1, ACR2, ACR3, + VBR, PC, RAMBAR0, RAMBAR1, MBAR, + /* Legacy names */ + TC /* ASID */, + ITT0 /* ACR0 */, ITT1 /* ACR1 */, DTT0 /* ACR2 */, DTT1 /* ACR3 */, + MBAR1 /* MBAR */, RAMBAR /* RAMBAR1 */, + 0 +}; static const enum m68k_register mcf54455_ctrl[] = { CACR, ASID, ACR0, ACR1, ACR2, ACR3, MMUBAR, VBR, PC, RAMBAR1, MBAR, @@ -632,7 +641,7 @@ static const struct m68k_cpu m68k_cpus[] = {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5373_ctrl, "5373", -1}, {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp, mcf5373_ctrl, "537x", 0}, - {mcfisa_a|mcfisa_b|mcfhwdiv|mcfmac, mcf_ctrl, "5407",0}, + {mcfisa_a|mcfisa_b|mcfhwdiv|mcfmac, mcf5407_ctrl, "5407",0}, {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54450", -1}, {mcfisa_a|mcfisa_c|mcfhwdiv|mcfemac|mcfusp, mcf54455_ctrl, "54451", -1}, |