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authorAndreas Krebbel <krebbel@linux.vnet.ibm.com>2016-09-12 16:32:02 +0200
committerAndreas Krebbel <krebbel@linux.vnet.ibm.com>2016-09-12 16:32:02 +0200
commit952c3f51ac994f5e98aa829076609124cf9e5243 (patch)
tree7e9c42ce478209b9b242bb46d078ae397f39fd80 /gas
parent58af639728582db42765e6f2c73ea61e75b66c8e (diff)
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S/390: Add alternate processor names.
This patch adds alternate CPU names which adhere to the number of the architecture document. So instead of having z196, zEC12, and z13 you can use arch9, arch10, and arch11. The old cpu names stay valid and should primarily be used. The alternate names are supposed to improve compatibility with the IBM XL compiler toolchain which uses the arch numbering. opcodes/ChangeLog: 2016-09-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-mkopc.c (main): Support alternate arch strings. gas/ChangeLog: 2016-09-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/tc-s390.c (s390_parse_cpu): Support alternate arch strings. * doc/as.texinfo: Document new arch strings. * doc/c-s390.texi: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog7
-rw-r--r--gas/config/tc-s390.c44
-rw-r--r--gas/doc/as.texinfo8
-rw-r--r--gas/doc/c-s390.texi40
4 files changed, 70 insertions, 29 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index c2dadcb..6544175 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
2016-09-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+ * config/tc-s390.c (s390_parse_cpu): Support alternate arch
+ strings.
+ * doc/as.texinfo: Document new arch strings.
+ * doc/c-s390.texi: Likewise.
+
+2016-09-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
+
* config/tc-s390.c: Set all facitily bits by default
2016-09-12 Patrick Steuer <steuer@linux.vnet.ibm.com>
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index ec3c5e5..356bbb0 100644
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -272,20 +272,24 @@ s390_parse_cpu (const char * arg,
static struct
{
const char * name;
- unsigned int len;
+ unsigned int name_len;
+ const char * alt_name;
+ unsigned int alt_name_len;
unsigned int flags;
} cpu_table[S390_OPCODE_MAXCPU] =
{
- { STRING_COMMA_LEN ("g5"), 0 },
- { STRING_COMMA_LEN ("g6"), 0 },
- { STRING_COMMA_LEN ("z900"), 0 },
- { STRING_COMMA_LEN ("z990"), 0 },
- { STRING_COMMA_LEN ("z9-109"), 0 },
- { STRING_COMMA_LEN ("z9-ec"), 0 },
- { STRING_COMMA_LEN ("z10"), 0 },
- { STRING_COMMA_LEN ("z196"), 0 },
- { STRING_COMMA_LEN ("zEC12"), S390_INSTR_FLAG_HTM },
- { STRING_COMMA_LEN ("z13"), S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
+ { STRING_COMMA_LEN ("g5"), STRING_COMMA_LEN ("arch3"), 0 },
+ { STRING_COMMA_LEN ("g6"), STRING_COMMA_LEN (""), 0 },
+ { STRING_COMMA_LEN ("z900"), STRING_COMMA_LEN ("arch5"), 0 },
+ { STRING_COMMA_LEN ("z990"), STRING_COMMA_LEN ("arch6"), 0 },
+ { STRING_COMMA_LEN ("z9-109"), STRING_COMMA_LEN (""), 0 },
+ { STRING_COMMA_LEN ("z9-ec"), STRING_COMMA_LEN ("arch7"), 0 },
+ { STRING_COMMA_LEN ("z10"), STRING_COMMA_LEN ("arch8"), 0 },
+ { STRING_COMMA_LEN ("z196"), STRING_COMMA_LEN ("arch9"), 0 },
+ { STRING_COMMA_LEN ("zEC12"), STRING_COMMA_LEN ("arch10"),
+ S390_INSTR_FLAG_HTM },
+ { STRING_COMMA_LEN ("z13"), STRING_COMMA_LEN ("arch11"),
+ S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
};
static struct
{
@@ -312,18 +316,32 @@ s390_parse_cpu (const char * arg,
{
for (icpu = 0; icpu < S390_OPCODE_MAXCPU; icpu++)
{
- unsigned int l;
+ unsigned int l, l_alt;
+
+ l = cpu_table[icpu].name_len;
- l = cpu_table[icpu].len;
if (strncmp (arg, cpu_table[icpu].name, l) == 0
&& (arg[l] == 0 || arg[l] == '+'))
{
arg += l;
break;
}
+
+ l_alt = cpu_table[icpu].alt_name_len;
+
+ if (l_alt > 0
+ && strncmp (arg, cpu_table[icpu].alt_name, l_alt) == 0
+ && (arg[l_alt] == 0 || arg[l_alt] == '+'))
+ {
+ arg += l_alt;
+ break;
+ }
}
}
+ if (icpu == S390_OPCODE_MAXCPU)
+ return S390_OPCODE_MAXCPU;
+
ilp_bak = input_line_pointer;
if (icpu != S390_OPCODE_MAXCPU)
{
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 9ebfda0..d09e0d4 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -1654,9 +1654,11 @@ Select the word size, either 31/32 bits or 64 bits.
Select the architecture mode, either the Enterprise System
Architecture (esa) or the z/Architecture mode (zarch).
@item -march=@var{processor}
-Specify which s390 processor variant is the target, @samp{g6}, @samp{g6},
-@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, @samp{z10},
-@samp{z196}, @samp{zEC12}, or @samp{z13}.
+Specify which s390 processor variant is the target, @samp{g5} (or
+@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
+@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
+@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
+or @samp{z13} (or @samp{arch11}).
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index e3277cb..1cbf308 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -14,9 +14,11 @@
@cindex s390 support
The s390 version of @code{@value{AS}} supports two architectures modes
-and seven chip levels. The architecture modes are the Enterprise System
+and ten chip levels. The architecture modes are the Enterprise System
Architecture (ESA) and the newer z/Architecture mode. The chip levels
-are g5, g6, z900, z990, z9-109, z9-ec, z10, z196, zEC12, and z13.
+are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
+(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), and
+z13 (or arch11).
@menu
* s390 Options:: Command-line Options.
@@ -58,19 +60,31 @@ message.
@item -march=@var{CPU}
This option specifies the target processor. The following processor names
are recognized:
-@code{g5},
+@code{g5} (or @code{arch3}),
@code{g6},
-@code{z900},
-@code{z990},
+@code{z900} (or @code{arch5}),
+@code{z990} (or @code{arch6}),
@code{z9-109},
-@code{z9-ec},
-@code{z10},
-@code{z196},
-@code{zEC12}, and
-@code{z13}.
-Assembling an instruction that is not supported on the target processor
-results in an error message. Do not specify @code{g5} or @code{g6}
-with @samp{-mzarch}.
+@code{z9-ec} (or @code{arch7}),
+@code{z10} (or @code{arch8}),
+@code{z196} (or @code{arch9}),
+@code{zEC12} (or @code{arch10}) and
+@code{z13} (or @code{arch11}).
+
+Assembling an instruction that is not supported on the target
+processor results in an error message.
+
+The processor names starting with @code{arch} refer to the edition
+number in the Principle of Operations manual. They can be used as
+alternate processor names and have been added for compatibility with
+the IBM XL compiler.
+
+@code{arch3}, @code{g5} and @code{g6} cannot be used with the
+@samp{-mzarch} option since the z/Architecture mode is not supported
+on these processor levels.
+
+There is no @code{arch4} option supported. @code{arch4} matches
+@code{-march=arch5 -mesa}.
@cindex @samp{-mregnames} option, s390
@item -mregnames