<gas changes>

2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
	(build_modrm_byte): Add support to handle FMA4 instructions.
	(md_show_usage): Add fma4.

<gas/testsuite changes>
2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* gas/i386/i386.exp: Add FMA4 tests.
	* gas/i386/x86-64-fma4.d: Ditto.
	* gas/i386/fma4.d: Ditto.
	* gas/i386/x86-64-fma4.s: Ditto.
	* gas/i386/fma4.s: Ditto.

<opcodes changes>
2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* i386-opc.h (CpuFMA4): Add CpuFMA4.
	(i386_cpu_flags): New.
	* i386-gen.c: Add CPU_FMA4_FLAGS.
	* i386-opc.tbl: Add FMA4 instructions.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Regenerate.
	* i386-dis.c (OP_VEX_FMA): New. Handle FMA4.
	(OP_XMM_VexW): Ditto.
	(OP_EX_VexW): Ditto.
	(VEXI4_Fixup): Ditto.
	(VexI4, VexFMA, Vex128FMA, EXVexW, EXdVexW, XMVexW): New Macros.
	(PREFIX_VEX_3A5C, PREFIX_VEX_3A5D, PREFIX_VEX_3A5E): New.
	(PREFIX_VEX_3A5F, PREFIX_VEX_3A60): New.
	(PREFIX_VEX_3A68, PREFIX_VEX_3A69, PREFIX_VEX_3A6A): New.
	(PREFIX_VEX_3A6B, PREFIX_VEX_3A6C, PREFIX_VEX_3A6D): New.
	(PREFIX_VEX_3A6E, PREFIX_VEX_3A6F, PREFIX_VEX_3A7A): New.
	(PREFIX_VEX_3A7B, PREFIX_VEX_3A7C, PREFIX_VEX_3A7D): New.
	(PREFIX_VEX_3A7E, PREFIX_VEX_3A7F): New.
	(VEX_LEN_3A6A_P_2,VEX_LEN_3A6B_P_2, VEX_LEN_3A6E_P_2): New.
	(VEX_LEN_3A6F_P_2,VEX_LEN_3A7A_P_2, VEX_LEN_3A7B_P_2): New.
	(VEX_LEN_3A7E_P_2,VEX_LEN_3A7F_P_2): New.
	(get_vex_imm8): New. handle FMA4.
	(OP_EX_VexReg): Ditto.

8 files changed, 374 insertions, 25 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5e09779..4467287 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
+
+	* config/tc-i386.c (cpu_arch): Add .fma4 and CPU_FMA4_FLAGS.
+	(build_modrm_byte): Add support to handle FMA4 instructions.
+	(md_show_usage): Add fma4.
+	
 2009-07-04  Alan Modra  <amodra@bigpond.net.au>
 
 	* config/tc-cr16.h (TC_LINKRELAX_FIXUP): Set only for code sections.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 1a15d1d..7d170f4 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -623,6 +623,8 @@ static const arch_entry cpu_arch[] =
     CPU_PCLMUL_FLAGS },
   { ".fma", PROCESSOR_UNKNOWN,
     CPU_FMA_FLAGS },
+  { ".fma4", PROCESSOR_UNKNOWN,
+    CPU_FMA4_FLAGS },
   { ".movbe", PROCESSOR_UNKNOWN,
     CPU_MOVBE_FLAGS },
   { ".ept", PROCESSOR_UNKNOWN,
@@ -4757,31 +4759,25 @@ build_modrm_byte (void)
     {
       unsigned int nds, reg;
 
+      if (i.tm.opcode_modifier.veximmext
+	  && i.tm.opcode_modifier.immext)
+	{
+	  dest = i.operands - 2;
+	  gas_assert (dest == 3);
+	}
+      else
       dest = i.operands - 1;
       nds = dest - 1;
-      source = 1;
-      reg = 0;
-
-      /* This instruction must have 4 operands: 4 register operands
-	 or 3 register operands plus 1 memory operand.  It must have
-	 VexNDS and VexImmExt.  */
-      gas_assert (i.operands == 4
-		  && (i.reg_operands == 4
+
+      /* This instruction must have 4 register operands 
+	 or 3 register operands plus 1 memory operand.  
+	 It must have VexNDS and VexImmExt.  */
+      gas_assert ((i.reg_operands == 4
 		      || (i.reg_operands == 3 && i.mem_operands == 1))
 		  && i.tm.opcode_modifier.vexnds
 		  && i.tm.opcode_modifier.veximmext
-		  && (operand_type_equal (&i.tm.operand_types[dest],
-					  &regxmm)
-		      || operand_type_equal (&i.tm.operand_types[dest],
-					     &regymm))
-		  && (operand_type_equal (&i.tm.operand_types[nds],
-					  &regxmm)
-		      || operand_type_equal (&i.tm.operand_types[nds],
-					     &regymm))
-		  && (operand_type_equal (&i.tm.operand_types[reg],
-					  &regxmm)
-		      || operand_type_equal (&i.tm.operand_types[reg],
-					     &regymm)));
+	    && (operand_type_equal (&i.tm.operand_types[dest], &regxmm)
+		|| operand_type_equal (&i.tm.operand_types[dest], &regymm)));
 
       /* Generate an 8bit immediate operand to encode the register
 	 operand.  */
@@ -4789,11 +4785,36 @@ build_modrm_byte (void)
       i.op[i.operands].imms = exp;
       i.types[i.operands] = imm8;
       i.operands++;
+      /* If VexW1 is set, the first operand is the source and
+	 the second operand is encoded in the immediate operand.  */
+      if (i.tm.opcode_modifier.vexw1)
+	{
+	  source = 0;
+	  reg = 1;
+	}
+      else
+	{
+	  source = 1;
+	  reg = 0;
+	}      
+      /* FMA4 swaps REG and NDS.  */
+      if (i.tm.cpu_flags.bitfield.cpufma4)
+	{
+	  unsigned int tmp;
+	  tmp = reg;
+	  reg = nds;
+	  nds = tmp;
+	}      
+      gas_assert ((operand_type_equal (&i.tm.operand_types[reg], &regxmm)
+		   || operand_type_equal (&i.tm.operand_types[reg],
+					  &regymm)) 
+		  && (operand_type_equal (&i.tm.operand_types[nds], &regxmm)
+		      || operand_type_equal (&i.tm.operand_types[nds], 
+					     &regymm)));
       exp->X_op = O_constant;
       exp->X_add_number
-	= ((i.op[0].regs->reg_num
-	    + ((i.op[0].regs->reg_flags & RegRex) ? 8 : 0)) << 4);
-
+	= ((i.op[reg].regs->reg_num
+	    + ((i.op[reg].regs->reg_flags & RegRex) ? 8 : 0)) << 4);      
       i.vex.register_specifier = i.op[nds].regs;
     }
   else
@@ -4931,7 +4952,6 @@ build_modrm_byte (void)
 	  for (op = 0; op < i.operands; op++)
 	    if (operand_type_check (i.types[op], anymem))
 	      break;
-
 	  gas_assert (op < i.operands);
 
 	  default_seg = &ds;
@@ -7855,7 +7875,7 @@ md_show_usage (stream)
                            mmx, sse, sse2, sse3, ssse3, sse4.1, sse4.2, sse4,\n\
                            avx, vmx, smx, xsave, movbe, ept, aes, pclmul, fma,\n\
                            clflush, syscall, rdtscp, 3dnow, 3dnowa, sse4a,\n\
-                           svme, abm, padlock\n"));
+                           svme, abm, padlock, fma4\n"));
   fprintf (stream, _("\
   -mtune=CPU              optimize for CPU, CPU is one of:\n\
                            i8086, i186, i286, i386, i486, pentium, pentiumpro,\n\
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index ccb7ecf..854cae0 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2009-07-06  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
+
+	* gas/i386/i386.exp: Add FMA4 tests.
+	* gas/i386/x86-64-fma4.d: Ditto.
+	* gas/i386/fma4.d: Ditto.
+	* gas/i386/x86-64-fma4.s: Ditto.
+	* gas/i386/fma4.s: Ditto.	
+	
 2009-07-01  Nick Clifton  <nickc@redhat.com>
 
 	PR 10168
diff --git a/gas/testsuite/gas/i386/fma4.d b/gas/testsuite/gas/i386/fma4.d
new file mode 100644
index 0000000..58b72f4
--- /dev/null
+++ b/gas/testsuite/gas/i386/fma4.d
@@ -0,0 +1,92 @@
+#objdump: -dw
+#name: i386 FMA4
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5f fc 20    	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5f 39 20    	vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5e fc 20    	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5e 39 20    	vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 6d fc 20    	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 6d 39 20    	vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 6c fc 20    	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 6c 39 20    	vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5f fc 20    	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5f 39 20    	vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 5f 39 20    	vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5e fc 20    	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5e 39 20    	vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 5e 39 20    	vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6d fc 20    	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6d 39 20    	vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6d 39 20    	vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6c fc 20    	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6c 39 20    	vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6c 39 20    	vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6f fc 20    	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6f 39 20    	vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6f 39 20    	vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6e fc 20    	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6e 39 20    	vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6e 39 20    	vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7e 39 20    	vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
diff --git a/gas/testsuite/gas/i386/fma4.s b/gas/testsuite/gas/i386/fma4.s
new file mode 100644
index 0000000..c1ec47f
--- /dev/null
+++ b/gas/testsuite/gas/i386/fma4.s
@@ -0,0 +1,91 @@
+# Check FMA4 instructions
+
+	.allow_index_reg
+	.text
+_start:
+
+	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddpd (%ecx),%ymm6,%ymm2,%ymm7
+	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddps (%ecx),%ymm6,%ymm2,%ymm7
+	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddsubpd (%ecx),%ymm6,%ymm2,%ymm7
+	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddsubps (%ecx),%ymm6,%ymm2,%ymm7
+	vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfmsubaddpd (%ecx),%ymm6,%ymm2,%ymm7
+	vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+	vfmsubaddps (%ecx),%ymm6,%ymm2,%ymm7
+	vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfmsubpd (%ecx),%ymm6,%ymm2,%ymm7
+	vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+	vfmsubps (%ecx),%ymm6,%ymm2,%ymm7
+	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddpd (%ecx),%xmm6,%xmm2,%xmm7
+	vfmaddpd %xmm4,(%ecx),%xmm2,%xmm7
+	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddps (%ecx),%xmm6,%xmm2,%xmm7
+	vfmaddps %xmm4,(%ecx),%xmm2,%xmm7
+	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddsubpd (%ecx),%xmm6,%xmm2,%xmm7
+	vfmaddsubpd %xmm4,(%ecx),%xmm2,%xmm7
+	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddsubps (%ecx),%xmm6,%xmm2,%xmm7
+	vfmaddsubps %xmm4,(%ecx),%xmm2,%xmm7
+	vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmsubaddpd (%ecx),%xmm6,%xmm2,%xmm7
+	vfmsubaddpd %xmm4,(%ecx),%xmm2,%xmm7
+	vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+	vfmsubaddps (%ecx),%xmm6,%xmm2,%xmm7
+	vfmsubaddps %xmm4,(%ecx),%xmm2,%xmm7
+	vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmsubpd (%ecx),%xmm6,%xmm2,%xmm7
+	vfmsubpd %xmm4,(%ecx),%xmm2,%xmm7
+	vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+	vfmsubps (%ecx),%xmm6,%xmm2,%xmm7
+	vfmsubps %xmm4,(%ecx),%xmm2,%xmm7
+	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddsd (%ecx),%xmm6,%xmm2,%xmm7
+	vfmaddsd %xmm4,(%ecx),%xmm2,%xmm7
+	vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmsubsd (%ecx),%xmm6,%xmm2,%xmm7
+	vfmsubsd %xmm4,(%ecx),%xmm2,%xmm7
+	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddss (%ecx),%xmm6,%xmm2,%xmm7
+	vfmaddss %xmm4,(%ecx),%xmm2,%xmm7
+	vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+	vfmsubss (%ecx),%xmm6,%xmm2,%xmm7
+	vfmsubss %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmaddpd (%ecx),%ymm6,%ymm2,%ymm7
+	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmaddps (%ecx),%ymm6,%ymm2,%ymm7
+	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmsubpd (%ecx),%ymm6,%ymm2,%ymm7
+	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmsubps (%ecx),%ymm6,%ymm2,%ymm7
+	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddpd (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmaddpd %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddps (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmaddps %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubpd (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmsubpd %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubps (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmsubps %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddsd (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmaddsd %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubsd (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmsubsd %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddss (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmaddss %xmm4,(%ecx),%xmm2,%xmm7
+	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubss (%ecx),%xmm6,%xmm2,%xmm7
+	vfnmsubss %xmm4,(%ecx),%xmm2,%xmm7
+
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index b140754..68211de 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -148,6 +148,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "sse2avx-opts-intel"
     run_dump_test "fma"
     run_dump_test "fma-intel"
+    run_dump_test "fma4"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -307,6 +308,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-avx-swap-intel"
     run_dump_test "x86-64-fma"
     run_dump_test "x86-64-fma-intel"
+    run_dump_test "x86-64-fma4"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-fma4.d b/gas/testsuite/gas/i386/x86-64-fma4.d
new file mode 100644
index 0000000..b0ac81f
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-fma4.d
@@ -0,0 +1,66 @@
+#objdump: -dw
+#name: x86-64 FMA4
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e3 cd 69 fc 20    	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 69 39 20    	vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 68 fc 20    	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 68 39 20    	vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5d fc 20    	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5d 39 20    	vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5c fc 20    	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 5c 39 20    	vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 69 fc 20    	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 69 39 20    	vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 69 39 20    	vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 68 fc 20    	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 68 39 20    	vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 68 39 20    	vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5d fc 20    	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5d 39 20    	vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 5d 39 20    	vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5c fc 20    	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 5c 39 20    	vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 5c 39 20    	vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6b fc 20    	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6b 39 20    	vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6b 39 20    	vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6a fc 20    	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 6a 39 20    	vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 6a 39 20    	vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 79 fc 20    	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 79 39 20    	vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 78 fc 20    	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 78 39 20    	vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7d fc 20    	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7d 39 20    	vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7c fc 20    	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 cd 7c 39 20    	vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 79 fc 20    	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 79 39 20    	vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 79 39 20    	vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 78 fc 20    	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 78 39 20    	vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 78 39 20    	vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7d fc 20    	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7d 39 20    	vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7d 39 20    	vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7c fc 20    	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7c 39 20    	vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7c 39 20    	vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7b fc 20    	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7b 39 20    	vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7b 39 20    	vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7f fc 20    	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7f 39 20    	vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7f 39 20    	vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7a fc 20    	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7a 39 20    	vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 59 7a 39 20    	vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7e fc 20    	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[ 	]*[a-f0-9]+:	c4 e3 c9 7e 39 20    	vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
+
diff --git a/gas/testsuite/gas/i386/x86-64-fma4.s b/gas/testsuite/gas/i386/x86-64-fma4.s
new file mode 100644
index 0000000..b316f69
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-fma4.s
@@ -0,0 +1,64 @@
+# Check 64bit FMA4 instructions
+	
+	.allow_index_reg
+	.text
+_start:
+	
+	vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddpd (%rcx),%ymm6,%ymm2,%ymm7
+	vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddps (%rcx),%ymm6,%ymm2,%ymm7
+	vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddsubpd (%rcx),%ymm6,%ymm2,%ymm7
+	vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+	vfmaddsubps (%rcx),%ymm6,%ymm2,%ymm7
+	vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddpd (%rcx),%xmm6,%xmm2,%xmm7
+	vfmaddpd %xmm4,(%rcx),%xmm2,%xmm7
+	vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddps (%rcx),%xmm6,%xmm2,%xmm7
+	vfmaddps %xmm4,(%rcx),%xmm2,%xmm7
+	vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddsubpd (%rcx),%xmm6,%xmm2,%xmm7
+	vfmaddsubpd %xmm4,(%rcx),%xmm2,%xmm7
+	vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddsubps (%rcx),%xmm6,%xmm2,%xmm7
+	vfmaddsubps %xmm4,(%rcx),%xmm2,%xmm7
+	vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddsd (%rcx),%xmm6,%xmm2,%xmm7
+	vfmaddsd %xmm4,(%rcx),%xmm2,%xmm7
+	vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+	vfmaddss (%rcx),%xmm6,%xmm2,%xmm7
+	vfmaddss %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmaddpd (%rcx),%ymm6,%ymm2,%ymm7
+	vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmaddps (%rcx),%ymm6,%ymm2,%ymm7
+	vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmsubpd (%rcx),%ymm6,%ymm2,%ymm7
+	vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+	vfnmsubps (%rcx),%ymm6,%ymm2,%ymm7
+	vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddpd (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmaddpd %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddps (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmaddps %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubpd (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmsubpd %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubps (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmsubps %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddsd (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmaddsd %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubsd (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmsubsd %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmaddss (%rcx),%xmm6,%xmm2,%xmm7
+	vfnmaddss %xmm4,(%rcx),%xmm2,%xmm7
+	vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+	vfnmsubss (%rcx),%xmm6,%xmm2,%xmm7
+