diff options
author | H.J. Lu <hjl.tools@gmail.com> | 2009-12-16 02:10:45 +0000 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2009-12-16 02:10:45 +0000 |
commit | 1ef99a7be96373a4018f793730e9366172510bb7 (patch) | |
tree | dd3c7c4dc6b1faca75e91e854f9bf9ffa7992bbc /gas | |
parent | 0175442dfa8f5f0f3e14cad5347d922bbe9f6b7d (diff) | |
download | gdb-1ef99a7be96373a4018f793730e9366172510bb7.zip gdb-1ef99a7be96373a4018f793730e9366172510bb7.tar.gz gdb-1ef99a7be96373a4018f793730e9366172510bb7.tar.bz2 |
Remove VexW0 and VexW1. Add VexW.
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
with vexw.
(build_modrm_byte): Likewise.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
VexW.
* i386-opc.h (VexW0): Removed.
(VexW1): Likewise.
(VEXW0): New.
(VEXW1): Likewise.
(VexW): Likewise.
(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
Vex=2.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 6 | ||||
-rw-r--r-- | gas/config/tc-i386.c | 10 |
2 files changed, 11 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 595cbfb..837020e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1 + with vexw. + (build_modrm_byte): Likewise. + +2009-12-15 H.J. Lu <hongjiu.lu@intel.com> + * as.h (mempcpy): New. * configure.in: Check if mempcpy is declared. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 1b96a5f..ac99ffd 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2776,12 +2776,12 @@ build_vex_prefix (const insn_template *t) /* Check the REX.W bit. */ w = (i.rex & REX_W) ? 1 : 0; - if (i.tm.opcode_modifier.vexw0 || i.tm.opcode_modifier.vexw1) + if (i.tm.opcode_modifier.vexw) { if (w) abort (); - if (i.tm.opcode_modifier.vexw1) + if (i.tm.opcode_modifier.vexw == VEXW1) w = 1; } @@ -4961,7 +4961,7 @@ build_modrm_byte (void) i.operands++; /* If VexW1 is set, the first operand is the source and the second operand is encoded in the immediate operand. */ - if (i.tm.opcode_modifier.vexw1) + if (i.tm.opcode_modifier.vexw == VEXW1) { source = 0; reg_slot = 1; @@ -5319,7 +5319,7 @@ build_modrm_byte (void) { /* VEX.vvvv encodes one of the sources when the first operand is not an immediate. */ - if (i.tm.opcode_modifier.vexw0) + if (i.tm.opcode_modifier.vexw == VEXW0) i.vex.register_specifier = i.op[0].regs; else i.vex.register_specifier = i.op[1].regs; @@ -5336,7 +5336,7 @@ build_modrm_byte (void) { i.rm.mode = 3; - if (i.tm.opcode_modifier.vexw0) + if (i.tm.opcode_modifier.vexw == VEXW0) i.rm.regmem = i.op[1].regs->reg_num; else i.rm.regmem = i.op[0].regs->reg_num; |