Support Intel MPX

gas/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config/tc-i386.c (BND_PREFIX): New.
	(struct _i386_insn): Add new field bnd_prefix.
	(add_bnd_prefix): New.
	(cpu_arch): Add MPX.
	(i386_operand_type): Add regbnd.
	(md_assemble): Handle BND prefixes.
	(parse_insn): Likewise.
	(output_branch): Likewise.
	(output_jump): Likewise.
	(build_modrm_byte): Handle regbnd.
	(OPTION_MADD_BND_PREFIX): New.
	(md_longopts): Add entry for 'madd-bnd-prefix'.
	(md_parse_option): Handle madd-bnd-prefix option.
	(md_show_usage): Add description for madd-bnd-prefix
	option.
	* doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.

gas/testsuite/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* gas/i386/mpx-add-bnd-prefix.s: New.
	* gas/i386/mpx-add-bnd-prefix.d: New.
	* gas/i386/mpx-inval-1.l: New.
	* gas/i386/mpx-inval-1.s: New.
	* gas/i386/mpx.d: New.
	* gas/i386/mpx.s: New.
	* gas/i386/x86-64-mpx-add-bnd-prefix.d: New.
	* gas/i386/x86-64-mpx-add-bnd-prefix.s: New.
	* gas/i386/x86-64-mpx-addr32.d: New.
	* gas/i386/x86-64-mpx-addr32.s: New.
	* gas/i386/x86-64-mpx-inval-1.l: New.
	* gas/i386/x86-64-mpx-inval-1.s: New.
	* gas/i386/x86-64-mpx-inval-2.l: New.
	* gas/i386/x86-64-mpx-inval-2.s: New.
	* gas/i386/x86-64-mpx.d: New.
	* gas/i386/x86-64-mpx.s: New.
	* gas/i386/nops.d: Adjust to MPX changes.
	* gas/i386/nops.s: Likewise.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-nops.s: Likewise.
	* gas/i386/ilp32/x86-64-nops.d: Likewise.
	* gas/i386/i386.exp: Run new MPX tests.

include/opcode/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386.h (BND_PREFIX_OPCODE): New.

opcodes/

2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* i386-dis.c (BND_Fixup): New.
	(Ebnd): New.
	(Ev_bnd): New.
	(Gbnd): New.
	(BND): New.
	(v_bnd_mode): New.
	(bnd_mode): New.
	(MOD enum): Add new entries.
	(PREFIX enum): Likewise.
	(dis tables): Replace XX with BND for near branch and call
	instructions.
	(prefix_table): Add new entries.
	(mod_table): Likewise.
	(names_bnd): New.
	(intel_names_bnd): New.
	(att_names_bnd): New.
	(BND_PREFIX): New.
	(prefix_name): Handle BND_PREFIX.
	(print_insn): Initialize names_bnd.
	(intel_operand_size): Handle new modes.
	(OP_E_register): Likewise.
	(OP_E_memory): Likewise.
	(OP_G): Likewise.
	* i386-gen.c (cpu_flag_init): Add CpuMPX.
	(cpu_flags): Add CpuMPX.
	(operand_type_init): Add RegBND.
	(opcode_modifiers): Add BNDPrefixOk.
	(operand_types): Add RegBND.
	* i386-init.h: Regenerate.
	* i386-opc.h (CpuMPX): New.
	(CpuUnused): Comment out.
	(i386_cpu_flags): Add cpumpx.
	(BNDPrefixOk): New.
	(i386_opcode_modifier): Add bndprefixok.
	(RegBND): New.
	(i386_operand_type): Add regbnd.
	* i386-opc.tbl: Add BNDPrefixOk to near jumps, calls and rets.
	Add MPX instructions and bnd prefix.
	* i386-reg.tbl: Add bnd0-bnd3 registers.
	* i386-tbl.h: Regenerate.

26 files changed, 1344 insertions, 41 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 37cc8ce..18cdcb5 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,24 @@
+2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
+	    Kirill Yukhin  <kirill.yukhin@intel.com>
+	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+	* config/tc-i386.c (BND_PREFIX): New.
+	(struct _i386_insn): Add new field bnd_prefix.
+	(add_bnd_prefix): New.
+	(cpu_arch): Add MPX.
+	(i386_operand_type): Add regbnd.
+	(md_assemble): Handle BND prefixes.
+	(parse_insn): Likewise.
+	(output_branch): Likewise.
+	(output_jump): Likewise.
+	(build_modrm_byte): Handle regbnd.
+	(OPTION_MADD_BND_PREFIX): New.
+	(md_longopts): Add entry for 'madd-bnd-prefix'.
+	(md_parse_option): Handle madd-bnd-prefix option.
+	(md_show_usage): Add description for madd-bnd-prefix
+	option.
+	* doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
+
 2013-07-24  Tristan Gingold  <gingold@adacore.com>
 
 	* config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index eb57599..fed8e3b 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -67,6 +67,7 @@
 #define DATA_PREFIX	3
 #define REP_PREFIX	4
 #define HLE_PREFIX	REP_PREFIX
+#define BND_PREFIX	REP_PREFIX
 #define LOCK_PREFIX	5
 #define REX_PREFIX	6       /* must come last.  */
 #define MAX_PREFIXES	7	/* max prefixes per opcode */
@@ -296,6 +297,9 @@ struct _i386_insn
     /* HLE prefix.  */
     const char *hle_prefix;
 
+    /* Have BND prefix.  */
+    const char *bnd_prefix;
+
     /* Error message.  */
     enum i386_error error;
   };
@@ -442,6 +446,11 @@ static int allow_pseudo_reg = 0;
 /* 1 if register prefix % not required.  */
 static int allow_naked_reg = 0;
 
+/* 1 if the assembler should add BND prefix for all control-tranferring
+   instructions supporting it, even if this prefix wasn't specified
+   explicitly.  */
+static int add_bnd_prefix = 0;
+
 /* 1 if pseudo index register, eiz/riz, is allowed .  */
 static int allow_index_reg = 0;
 
@@ -779,6 +788,8 @@ static const arch_entry cpu_arch[] =
     CPU_PRFCHW_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".smap"), PROCESSOR_UNKNOWN,
     CPU_SMAP_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".mpx"), PROCESSOR_UNKNOWN,
+    CPU_MPX_FLAGS, 0, 0 },
 };
 
 #ifdef I386COFF
@@ -1540,6 +1551,7 @@ static const i386_operand_type imm16_32 = OPERAND_TYPE_IMM16_32;
 static const i386_operand_type imm16_32s = OPERAND_TYPE_IMM16_32S;
 static const i386_operand_type imm16_32_32s = OPERAND_TYPE_IMM16_32_32S;
 static const i386_operand_type vec_imm4 = OPERAND_TYPE_VEC_IMM4;
+static const i386_operand_type regbnd = OPERAND_TYPE_REGBND;
 
 enum operand_type
 {
@@ -3214,6 +3226,21 @@ md_assemble (char *line)
   if (i.hle_prefix && !check_hle ())
     return;
 
+  /* Check BND prefix.  */
+  if (i.bnd_prefix && !i.tm.opcode_modifier.bndprefixok)
+    as_bad (_("expecting valid branch instruction after `bnd'"));
+
+  if (i.tm.cpu_flags.bitfield.cpumpx
+      && flag_code == CODE_64BIT
+      && i.prefix[ADDR_PREFIX])
+    as_bad (_("32-bit address isn't allowed in 64-bit MPX instructions."));
+
+  /* Insert BND prefix.  */
+  if (add_bnd_prefix
+      && i.tm.opcode_modifier.bndprefixok
+      && !i.prefix[BND_PREFIX])
+    add_prefix (BND_PREFIX_OPCODE);
+
   /* Check string instruction segment overrides.  */
   if (i.tm.opcode_modifier.isstring && i.mem_operands != 0)
     {
@@ -3416,6 +3443,8 @@ parse_insn (char *line, char *mnemonic)
 	    case PREFIX_REP:
 	      if (current_templates->start->cpu_flags.bitfield.cpuhle)
 		i.hle_prefix = current_templates->start->name;
+	      else if (current_templates->start->cpu_flags.bitfield.cpumpx)
+		i.bnd_prefix = current_templates->start->name;
 	      else
 		i.rep_prefix = current_templates->start->name;
 	      break;
@@ -5892,6 +5921,7 @@ build_modrm_byte (void)
 		|| i.types[op].bitfield.regmmx
 		|| i.types[op].bitfield.regxmm
 		|| i.types[op].bitfield.regymm
+		|| i.types[op].bitfield.regbnd
 		|| i.types[op].bitfield.sreg2
 		|| i.types[op].bitfield.sreg3
 		|| i.types[op].bitfield.control
@@ -6031,6 +6061,13 @@ output_branch (void)
       i.prefixes--;
     }
 
+  /* BND prefixed jump.  */
+  if (i.prefix[BND_PREFIX] != 0)
+    {
+      FRAG_APPEND_1_CHAR (i.prefix[BND_PREFIX]);
+      i.prefixes -= 1;
+    }
+
   if (i.prefixes != 0 && !intel_syntax)
     as_warn (_("skipping prefixes on this instruction"));
 
@@ -6125,6 +6162,13 @@ output_jump (void)
       i.prefixes -= 1;
     }
 
+  /* BND prefixed jump.  */
+  if (i.prefix[BND_PREFIX] != 0)
+    {
+      FRAG_APPEND_1_CHAR (i.prefix[BND_PREFIX]);
+      i.prefixes -= 1;
+    }
+
   if (i.prefixes != 0 && !intel_syntax)
     as_warn (_("skipping prefixes on this instruction"));
 
@@ -8536,6 +8580,7 @@ const char *md_shortopts = "qn";
 #define OPTION_MOPERAND_CHECK (OPTION_MD_BASE + 12)
 #define OPTION_MAVXSCALAR (OPTION_MD_BASE + 13)
 #define OPTION_X32 (OPTION_MD_BASE + 14)
+#define OPTION_MADD_BND_PREFIX (OPTION_MD_BASE + 15)
 
 struct option md_longopts[] =
 {
@@ -8559,6 +8604,7 @@ struct option md_longopts[] =
   {"msse-check", required_argument, NULL, OPTION_MSSE_CHECK},
   {"moperand-check", required_argument, NULL, OPTION_MOPERAND_CHECK},
   {"mavxscalar", required_argument, NULL, OPTION_MAVXSCALAR},
+  {"madd-bnd-prefix", no_argument, NULL, OPTION_MADD_BND_PREFIX},
   {NULL, no_argument, NULL, 0}
 };
 size_t md_longopts_size = sizeof (md_longopts);
@@ -8816,6 +8862,10 @@ md_parse_option (int c, char *arg)
 	as_fatal (_("invalid -mavxscalar= option: `%s'"), arg);
       break;
 
+    case OPTION_MADD_BND_PREFIX:
+      add_bnd_prefix = 1;
+      break;
+
     default:
       return 0;
     }
@@ -8960,6 +9010,8 @@ md_show_usage (FILE *stream)
   -mnaked-reg             don't require `%%' prefix for registers\n"));
   fprintf (stream, _("\
   -mold-gcc               support old (<= 2.8.1) versions of gcc\n"));
+  fprintf (stream, _("\
+  -madd-bnd-prefix        add BND prefix for all valid branches\n"));
 }
 
 #if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 9aae847..8a3a292 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -150,6 +150,7 @@ accept various extension mnemonics.  For example,
 @code{rdseed},
 @code{prfchw},
 @code{smap},
+@code{mpx},
 @code{noavx},
 @code{vmx},
 @code{vmfunc},
@@ -250,6 +251,12 @@ take precedent.
 This opetion specifies that registers don't require a @samp{%} prefix.
 The @code{.att_syntax} and @code{.intel_syntax} directives will take precedent.
 
+@cindex @samp{-madd-bnd-prefix} option, i386
+@cindex @samp{-madd-bnd-prefix} option, x86-64
+@item -madd-bnd-prefix
+This option forces the assembler to add BND prefix to all branches, even
+if such prefix was not explicitly specified in the source code.
+
 @end table
 @c man end
 
@@ -1028,7 +1035,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
 @item @samp{.lzcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc} @tab @samp{.hle}
 @item @samp{.rtm} @tab @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw}
-@item @samp{.smap}
+@item @samp{.smap} @tab @samp{.mpx}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index e8b2eb6..d5c5174 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,30 @@
+2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
+	    Kirill Yukhin  <kirill.yukhin@intel.com>
+	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+	* gas/i386/mpx-add-bnd-prefix.s: New.
+	* gas/i386/mpx-add-bnd-prefix.d: New.
+	* gas/i386/mpx-inval-1.l: New.
+	* gas/i386/mpx-inval-1.s: New.
+	* gas/i386/mpx.d: New.
+	* gas/i386/mpx.s: New.
+	* gas/i386/x86-64-mpx-add-bnd-prefix.d: New.
+	* gas/i386/x86-64-mpx-add-bnd-prefix.s: New.
+	* gas/i386/x86-64-mpx-addr32.d: New.
+	* gas/i386/x86-64-mpx-addr32.s: New.
+	* gas/i386/x86-64-mpx-inval-1.l: New.
+	* gas/i386/x86-64-mpx-inval-1.s: New.
+	* gas/i386/x86-64-mpx-inval-2.l: New.
+	* gas/i386/x86-64-mpx-inval-2.s: New.
+	* gas/i386/x86-64-mpx.d: New.
+	* gas/i386/x86-64-mpx.s: New.
+	* gas/i386/nops.d: Adjust to MPX changes.
+	* gas/i386/nops.s: Likewise.
+	* gas/i386/x86-64-nops.d: Likewise.
+	* gas/i386/x86-64-nops.s: Likewise.
+	* gas/i386/ilp32/x86-64-nops.d: Likewise.
+	* gas/i386/i386.exp: Run new MPX tests.
+
 2013-07-24  Tristan Gingold  <gingold@adacore.com>
 
 	* gas/ppc/test2xcoff32.s, gas/ppc/test2xcoff32.d: New files
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index a8743e9..7e98644 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -245,6 +245,9 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "prefetch"
     run_dump_test "prefetch-intel"
     run_dump_test "smap"
+    run_dump_test "mpx"
+    run_list_test "mpx-inval-1" "-al"
+    run_dump_test "mpx-add-bnd-prefix"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -506,6 +509,11 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-prefetch"
     run_dump_test "x86-64-prefetch-intel"
     run_dump_test "x86-64-smap"
+    run_dump_test "x86-64-mpx"
+    run_list_test "x86-64-mpx-inval-1" "-al"
+    run_list_test "x86-64-mpx-inval-2" "-al"
+    run_dump_test "x86-64-mpx-addr32"
+    run_dump_test "x86-64-mpx-add-bnd-prefix"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-nops.d b/gas/testsuite/gas/i386/ilp32/x86-64-nops.d
index fa63aea..282ec5e 100644
--- a/gas/testsuite/gas/i386/ilp32/x86-64-nops.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-nops.d
@@ -23,29 +23,21 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 1e ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1f ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 19 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1a 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1b 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1c 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1d 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1e 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1f 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 19 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1a 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1b 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1c 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1d 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1e 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1f 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 19 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1a 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1b 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1c 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1d 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1e 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1f 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 19 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1a 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1b 04 59          	nopl   \(%rcx,%rbx,2\)
 [ 	]*[a-f0-9]+:	0f 1c 04 59          	nopl   \(%rcx,%rbx,2\)
 [ 	]*[a-f0-9]+:	0f 1d 04 59          	nopl   \(%rcx,%rbx,2\)
 [ 	]*[a-f0-9]+:	0f 1e 04 59          	nopl   \(%rcx,%rbx,2\)
diff --git a/gas/testsuite/gas/i386/mpx-add-bnd-prefix.d b/gas/testsuite/gas/i386/mpx-add-bnd-prefix.d
new file mode 100644
index 0000000..1e925ef
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx-add-bnd-prefix.d
@@ -0,0 +1,24 @@
+#as: -madd-bnd-prefix
+#objdump: -drw
+#name: Check -madd-bnd-prefix
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo-0x14>:
+[ 	]*[a-f0-9]+:	f2 e8 0e 00 00 00    	bnd call 14 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 10             	bnd call \*\(%eax\)
+[ 	]*[a-f0-9]+:	f2 74 08             	bnd je 14 <foo>
+[ 	]*[a-f0-9]+:	f2 eb 05             	bnd jmp 14 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 23             	bnd jmp \*\(%ebx\)
+[ 	]*[a-f0-9]+:	f2 c3                	bnd ret 
+
+0+14 <foo>:
+[ 	]*[a-f0-9]+:	f2 c3                	bnd ret 
+[ 	]*[a-f0-9]+:	f2 c3                	bnd ret 
+[ 	]*[a-f0-9]+:	f2 e8 f6 ff ff ff    	bnd call 14 <foo>
+[ 	]*[a-f0-9]+:	01 c3                	add    %eax,%ebx
+[ 	]*[a-f0-9]+:	e2 f2                	loop   14 <foo>
+#pass
diff --git a/gas/testsuite/gas/i386/mpx-add-bnd-prefix.s b/gas/testsuite/gas/i386/mpx-add-bnd-prefix.s
new file mode 100644
index 0000000..638dafa
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx-add-bnd-prefix.s
@@ -0,0 +1,19 @@
+# Check -madd-bnd-prefix option
+	.text
+
+	call	foo
+	call	*(%eax)
+	je	foo
+	jmp	foo
+	jmp	*(%ebx)
+	ret
+foo:
+	# Use of REPNE prefix - we shouldn't get any error
+	repne ret
+	# BND prefix already exists - we shouldn't get any error here
+	bnd ret
+	bnd call	foo
+	# Following instructions can't have BND prefix even if
+	# -madd-bnd-prefix is specified
+	add %eax, %ebx
+	loop foo
diff --git a/gas/testsuite/gas/i386/mpx-inval-1.l b/gas/testsuite/gas/i386/mpx-inval-1.l
new file mode 100644
index 0000000..41de5a0
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx-inval-1.l
@@ -0,0 +1,55 @@
+.*: Assembler messages:
+.*:6: Error: expecting valid branch instruction after `bnd'
+.*:7: Error: expecting valid branch instruction after `bnd'
+.*:8: Error: expecting valid branch instruction after `bnd'
+.*:8: Warning: skipping prefixes on this instruction
+.*:9: Error: expecting valid branch instruction after `bnd'
+.*:9: Warning: skipping prefixes on this instruction
+.*:10: Error: expecting valid branch instruction after `bnd'
+.*:11: Error: expecting valid branch instruction after `bnd'
+.*:14: Error: expecting valid branch instruction after `bnd'
+.*:15: Error: expecting valid branch instruction after `bnd'
+.*:16: Error: expecting valid branch instruction after `bnd'
+.*:17: Error: expecting valid branch instruction after `bnd'
+.*:18: Error: expecting valid branch instruction after `bnd'
+.*:19: Error: expecting valid branch instruction after `bnd'
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# MPX instructions
+[ 	]*2[ 	]+\.allow_index_reg
+[ 	]*3[ 	]+\.text
+[ 	]*4[ 	]+\.extern xxx
+[ 	]*5[ 	]+foo:
+[ 	]*6[ 	]+\?\?\?\? F201C3   		bnd add %eax, %ebx  		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*7[ 	]+\?\?\?\? 66F2AB   		bnd stosw \(%edi\)    		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*8[ 	]+\?\?\?\? 9A000000 		bnd lcall \$0x1234,\$xxx
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+\*\*\*\*  Warning:skipping prefixes on this instruction
+[ 	]*8[ 	]+003412
+[ 	]*9[ 	]+\?\?\?\? EA000000 		bnd ljmp \$0x1234,\$xxx
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+\*\*\*\*  Warning:skipping prefixes on this instruction
+[ 	]*9[ 	]+003412
+[ 	]*10[ 	]+\?\?\?\? F2E200   		bnd loop foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*11[ 	]+\?\?\?\? 67F2E300 		bnd jcxz foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*12[ 	]+
+[ 	]*13[ 	]+\.intel_syntax noprefix
+[ 	]*14[ 	]+\?\?\?\? F201C3   		bnd add ebx, eax		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*15[ 	]+\?\?\?\? 66F2AB   		bnd stos WORD PTR\[edi]		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*16[ 	]+\?\?\?\? 9A000000 		bnd lcall 0x1234,xxx
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*16[ 	]+003412
+[ 	]*17[ 	]+\?\?\?\? EA000000 		bnd ljmp 0x1234,xxx
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*17[ 	]+003412
+[ 	]*18[ 	]+\?\?\?\? F2E200   		bnd loop foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*19[ 	]+\?\?\?\? 67F2E300 		bnd jcxz foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
diff --git a/gas/testsuite/gas/i386/mpx-inval-1.s b/gas/testsuite/gas/i386/mpx-inval-1.s
new file mode 100644
index 0000000..74de4f7
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx-inval-1.s
@@ -0,0 +1,19 @@
+# MPX instructions
+	.allow_index_reg
+	.text
+	.extern xxx
+foo:
+	bnd add %eax, %ebx  		# Bad
+	bnd stosw (%edi)    		# Bad
+	bnd lcall $0x1234,$xxx
+	bnd ljmp $0x1234,$xxx
+	bnd loop foo
+	bnd jcxz foo
+
+.intel_syntax noprefix
+	bnd add ebx, eax		# Bad
+	bnd stos WORD PTR[edi]		# Bad
+	bnd lcall 0x1234,xxx
+	bnd ljmp 0x1234,xxx
+	bnd loop foo
+	bnd jcxz foo
diff --git a/gas/testsuite/gas/i386/mpx.d b/gas/testsuite/gas/i386/mpx.d
new file mode 100644
index 0000000..09a3ab5
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx.d
@@ -0,0 +1,139 @@
+#objdump: -drw
+#name: i386 MPX
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo-0x2c1>:
+[ 	]*[a-f0-9]+:	f3 0f 1b 08          	bndmk  \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0d 99 03 00 00 	bndmk  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 4a 03       	bndmk  0x3\(%edx\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 08       	bndmk  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 0d 00 00 00 00 	bndmk  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 4c 01 03    	bndmk  0x3\(%ecx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 08          	bndmov \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 0d 99 03 00 00 	bndmov 0x399,%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 52 03       	bndmov 0x3\(%edx\),%bnd2
+[ 	]*[a-f0-9]+:	66 0f 1a 14 10       	bndmov \(%eax,%edx,1\),%bnd2
+[ 	]*[a-f0-9]+:	66 0f 1a 14 05 00 00 00 00 	bndmov 0x0\(,%eax,1\),%bnd2
+[ 	]*[a-f0-9]+:	66 0f 1a 4c 01 03    	bndmov 0x3\(%ecx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a c2          	bndmov %bnd2,%bnd0
+[ 	]*[a-f0-9]+:	66 0f 1b 08          	bndmov %bnd1,\(%eax\)
+[ 	]*[a-f0-9]+:	66 0f 1b 0d 99 03 00 00 	bndmov %bnd1,0x399
+[ 	]*[a-f0-9]+:	66 0f 1b 52 03       	bndmov %bnd2,0x3\(%edx\)
+[ 	]*[a-f0-9]+:	66 0f 1b 14 10       	bndmov %bnd2,\(%eax,%edx,1\)
+[ 	]*[a-f0-9]+:	66 0f 1b 14 05 00 00 00 00 	bndmov %bnd2,0x0\(,%eax,1\)
+[ 	]*[a-f0-9]+:	66 0f 1b 4c 01 03    	bndmov %bnd1,0x3\(%ecx,%eax,1\)
+[ 	]*[a-f0-9]+:	66 0f 1a d0          	bndmov %bnd0,%bnd2
+[ 	]*[a-f0-9]+:	f3 0f 1a 09          	bndcl  \(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a c9          	bndcl  %ecx,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a c8          	bndcl  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0d 99 03 00 00 	bndcl  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 4a 03       	bndcl  0x3\(%edx\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 08       	bndcl  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 0d 00 00 00 00 	bndcl  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 4c 01 03    	bndcl  0x3\(%ecx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 09          	bndcu  \(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a c9          	bndcu  %ecx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a c8          	bndcu  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0d 99 03 00 00 	bndcu  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 4a 03       	bndcu  0x3\(%edx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 08       	bndcu  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 0d 00 00 00 00 	bndcu  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 4c 01 03    	bndcu  0x3\(%ecx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 09          	bndcn  \(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b c9          	bndcn  %ecx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b c8          	bndcn  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0d 99 03 00 00 	bndcn  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 4a 03       	bndcn  0x3\(%edx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 08       	bndcn  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 0d 00 00 00 00 	bndcn  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 4c 01 03    	bndcn  0x3\(%ecx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	0f 1b 44 18 03       	bndstx %bnd0,0x3\(%eax,%ebx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 54 13 03       	bndstx %bnd2,0x3\(%ebx,%edx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 14 15 03 00 00 00 	bndstx %bnd2,0x3\(,%edx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 9a 99 03 00 00 	bndstx %bnd3,0x399\(%edx\)
+[ 	]*[a-f0-9]+:	0f 1b 93 34 12 00 00 	bndstx %bnd2,0x1234\(%ebx\)
+[ 	]*[a-f0-9]+:	0f 1b 53 03          	bndstx %bnd2,0x3\(%ebx\)
+[ 	]*[a-f0-9]+:	0f 1b 0a             	bndstx %bnd1,\(%edx\)
+[ 	]*[a-f0-9]+:	0f 1a 44 18 03       	bndldx 0x3\(%eax,%ebx,1\),%bnd0
+[ 	]*[a-f0-9]+:	0f 1a 54 13 03       	bndldx 0x3\(%ebx,%edx,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 14 15 03 00 00 00 	bndldx 0x3\(,%edx,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 9a 99 03 00 00 	bndldx 0x399\(%edx\),%bnd3
+[ 	]*[a-f0-9]+:	0f 1a 93 34 12 00 00 	bndldx 0x1234\(%ebx\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 53 03          	bndldx 0x3\(%ebx\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 0a             	bndldx \(%edx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 e8 6f 01 00 00    	bnd call 2c1 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 10             	bnd call \*\(%eax\)
+[ 	]*[a-f0-9]+:	f2 0f 84 65 01 00 00 	bnd je 2c1 <foo>
+[ 	]*[a-f0-9]+:	f2 e9 5f 01 00 00    	bnd jmp 2c1 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 21             	bnd jmp \*\(%ecx\)
+[ 	]*[a-f0-9]+:	f2 c3                	bnd ret 
+[ 	]*[a-f0-9]+:	f3 0f 1b 08          	bndmk  \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0d 99 03 00 00 	bndmk  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 49 03       	bndmk  0x3\(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 08       	bndmk  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 0d 00 00 00 00 	bndmk  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 4c 02 03    	bndmk  0x3\(%edx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 08          	bndmov \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 0d 99 03 00 00 	bndmov 0x399,%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 49 03       	bndmov 0x3\(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 0c 08       	bndmov \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 0c 0d 00 00 00 00 	bndmov 0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 4c 02 03    	bndmov 0x3\(%edx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a c1          	bndmov %bnd1,%bnd0
+[ 	]*[a-f0-9]+:	66 0f 1b 08          	bndmov %bnd1,\(%eax\)
+[ 	]*[a-f0-9]+:	66 0f 1b 0d 99 03 00 00 	bndmov %bnd1,0x399
+[ 	]*[a-f0-9]+:	66 0f 1b 49 03       	bndmov %bnd1,0x3\(%ecx\)
+[ 	]*[a-f0-9]+:	66 0f 1b 0c 08       	bndmov %bnd1,\(%eax,%ecx,1\)
+[ 	]*[a-f0-9]+:	66 0f 1b 0c 0d 00 00 00 00 	bndmov %bnd1,0x0\(,%ecx,1\)
+[ 	]*[a-f0-9]+:	66 0f 1b 4c 02 03    	bndmov %bnd1,0x3\(%edx,%eax,1\)
+[ 	]*[a-f0-9]+:	66 0f 1a c8          	bndmov %bnd0,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 08          	bndcl  \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a c9          	bndcl  %ecx,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a c8          	bndcl  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0d 99 03 00 00 	bndcl  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 49 03       	bndcl  0x3\(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 08       	bndcl  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 0d 00 00 00 00 	bndcl  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 4c 02 03    	bndcl  0x3\(%edx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 08          	bndcu  \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a c9          	bndcu  %ecx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a c8          	bndcu  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0d 99 03 00 00 	bndcu  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 49 03       	bndcu  0x3\(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 08       	bndcu  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 0d 00 00 00 00 	bndcu  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 4c 02 03    	bndcu  0x3\(%edx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 08          	bndcn  \(%eax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b c9          	bndcn  %ecx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b c8          	bndcn  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0d 99 03 00 00 	bndcn  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 49 03       	bndcn  0x3\(%ecx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 08       	bndcn  \(%eax,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 0d 00 00 00 00 	bndcn  0x0\(,%ecx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 4c 02 03    	bndcn  0x3\(%edx,%eax,1\),%bnd1
+[ 	]*[a-f0-9]+:	0f 1b 44 18 03       	bndstx %bnd0,0x3\(%eax,%ebx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 54 13 03       	bndstx %bnd2,0x3\(%ebx,%edx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 14 0d 00 00 00 00 	bndstx %bnd2,0x0\(,%ecx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 9a 99 03 00 00 	bndstx %bnd3,0x399\(%edx\)
+[ 	]*[a-f0-9]+:	0f 1b 14 1d 03 00 00 00 	bndstx %bnd2,0x3\(,%ebx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 0a             	bndstx %bnd1,\(%edx\)
+[ 	]*[a-f0-9]+:	0f 1a 44 18 03       	bndldx 0x3\(%eax,%ebx,1\),%bnd0
+[ 	]*[a-f0-9]+:	0f 1a 54 13 03       	bndldx 0x3\(%ebx,%edx,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 14 0d 00 00 00 00 	bndldx 0x0\(,%ecx,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 9a 99 03 00 00 	bndldx 0x399\(%edx\),%bnd3
+[ 	]*[a-f0-9]+:	0f 1a 14 1d 03 00 00 00 	bndldx 0x3\(,%ebx,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 0a             	bndldx \(%edx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 e8 0e 00 00 00    	bnd call 2c1 <foo>
+[ 	]*[a-f0-9]+:	f2 ff d0             	bnd call \*%eax
+[ 	]*[a-f0-9]+:	f2 74 08             	bnd je 2c1 <foo>
+[ 	]*[a-f0-9]+:	f2 eb 05             	bnd jmp 2c1 <foo>
+[ 	]*[a-f0-9]+:	f2 ff e1             	bnd jmp \*%ecx
+[ 	]*[a-f0-9]+:	f2 c3                	bnd ret 
+
+0+2c1 <foo>:
+[ 	]*[a-f0-9]+:	f2 c3                	bnd ret 
+#pass
diff --git a/gas/testsuite/gas/i386/mpx.s b/gas/testsuite/gas/i386/mpx.s
new file mode 100644
index 0000000..8c5f043
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx.s
@@ -0,0 +1,165 @@
+# MPX instructions
+	.allow_index_reg
+	.text
+
+	### bndmk
+	bndmk (%eax), %bnd1
+	bndmk (0x399), %bnd1
+	bndmk 0x3(%edx), %bnd1
+	bndmk (%eax,%ecx), %bnd1
+	bndmk (,%ecx,1), %bnd1
+	bndmk 0x3(%ecx,%eax,1), %bnd1
+
+	### bndmov
+	bndmov (%eax), %bnd1
+	bndmov (0x399), %bnd1
+	bndmov 0x3(%edx), %bnd2
+	bndmov (%eax,%edx), %bnd2
+	bndmov (,%eax,1), %bnd2
+	bndmov 0x3(%ecx,%eax,1), %bnd1
+	bndmov %bnd2, %bnd0
+
+	bndmov %bnd1, (%eax)
+	bndmov %bnd1, (0x399)
+	bndmov %bnd2, 0x3(%edx)
+	bndmov %bnd2, (%eax,%edx)
+	bndmov %bnd2, (,%eax,1)
+	bndmov %bnd1, 0x3(%ecx,%eax,1)
+	bndmov %bnd0, %bnd2
+
+	### bndcl
+	bndcl (%ecx), %bnd1
+	bndcl %ecx, %bnd1
+	bndcl %ax, %bnd1
+	bndcl (0x399), %bnd1
+	bndcl 0x3(%edx), %bnd1
+	bndcl (%eax,%ecx), %bnd1
+	bndcl (,%ecx,1), %bnd1
+	bndcl 0x3(%ecx,%eax,1), %bnd1
+
+	### bndcu
+	bndcu (%ecx), %bnd1
+	bndcu %ecx, %bnd1
+	bndcu %ax, %bnd1
+	bndcu (0x399), %bnd1
+	bndcu 0x3(%edx), %bnd1
+	bndcu (%eax,%ecx), %bnd1
+	bndcu (,%ecx,1), %bnd1
+	bndcu 0x3(%ecx,%eax,1), %bnd1
+
+	### bndcn
+	bndcn (%ecx), %bnd1
+	bndcn %ecx, %bnd1
+	bndcn %ax, %bnd1
+	bndcn (0x399), %bnd1
+	bndcn 0x3(%edx), %bnd1
+	bndcn (%eax,%ecx), %bnd1
+	bndcn (,%ecx,1), %bnd1
+	bndcn 0x3(%ecx,%eax,1), %bnd1
+
+	### bndstx
+	bndstx %bnd0, 0x3(%eax,%ebx,1)
+	bndstx %bnd2, 3(%ebx,%edx)
+	bndstx %bnd2, 3(,%edx,1)
+	bndstx %bnd3, 0x399(%edx)
+	bndstx %bnd2, 0x1234(%ebx)
+	bndstx %bnd2, 3(%ebx,1)
+	bndstx %bnd1, (%edx)
+
+	### bndldx
+	bndldx 0x3(%eax,%ebx,1), %bnd0
+	bndldx 3(%ebx,%edx), %bnd2
+	bndldx 3(,%edx,1), %bnd2
+	bndldx 0x399(%edx), %bnd3
+	bndldx 0x1234(%ebx), %bnd2
+	bndldx 3(%ebx,1), %bnd2
+	bndldx (%edx), %bnd1
+
+	### bnd
+	bnd call	foo
+	bnd call	*(%eax)
+	bnd je	foo
+	bnd jmp	foo
+	bnd jmp	*(%ecx)
+	bnd ret
+
+.intel_syntax noprefix
+	bndmk bnd1, [eax]
+	bndmk bnd1, [0x399]
+	bndmk bnd1, [ecx+0x3]
+	bndmk bnd1, [eax+ecx]
+	bndmk bnd1, [ecx*1]
+	bndmk bnd1, [edx+1*eax+0x3]
+
+	### bndmov
+	bndmov bnd1, [eax]
+	bndmov bnd1, [0x399]
+	bndmov bnd1, [ecx+0x3]
+	bndmov bnd1, [eax+ecx]
+	bndmov bnd1, [ecx*1]
+	bndmov bnd1, [edx+1*eax+0x3]
+	bndmov bnd0, bnd1
+
+	bndmov [eax], bnd1
+	bndmov [0x399], bnd1
+	bndmov [ecx+0x3], bnd1
+	bndmov [eax+ecx], bnd1
+	bndmov [ecx*1], bnd1
+	bndmov [edx+1*eax+0x3], bnd1
+	bndmov bnd1, bnd0
+
+	### bndcl
+	bndcl bnd1, [eax]
+	bndcl bnd1, ecx
+	bndcl bnd1, ax
+	bndcl bnd1, [0x399]
+	bndcl bnd1, [ecx+0x3]
+	bndcl bnd1, [eax+ecx]
+	bndcl bnd1, [ecx*1]
+	bndcl bnd1, [edx+1*eax+0x3]
+
+	### bndcu
+	bndcu bnd1, [eax]
+	bndcu bnd1, ecx
+	bndcu bnd1, ax
+	bndcu bnd1, [0x399]
+	bndcu bnd1, [ecx+0x3]
+	bndcu bnd1, [eax+ecx]
+	bndcu bnd1, [ecx*1]
+	bndcu bnd1, [edx+1*eax+0x3]
+
+	### bndcn
+	bndcn bnd1, [eax]
+	bndcn bnd1, ecx
+	bndcn bnd1, ax
+	bndcn bnd1, [0x399]
+	bndcn bnd1, [ecx+0x3]
+	bndcn bnd1, [eax+ecx]
+	bndcn bnd1, [ecx*1]
+	bndcn bnd1, [edx+1*eax+0x3]
+
+	### bndstx
+	bndstx [eax+ebx*1+0x3], bnd0
+	bndstx [ebx+edx+3], bnd2
+	bndstx [ecx*1], bnd2
+	bndstx [edx+0x399], bnd3
+	bndstx [1*ebx+3], bnd2
+	bndstx [edx], bnd1
+
+	### bndldx
+	bndldx bnd0, [eax+ebx*1+0x3]
+	bndldx bnd2, [ebx+edx+3]
+	bndldx bnd2, [ecx*1]
+	bndldx bnd3, [edx+0x399]
+	bndldx bnd2, [1*ebx+3]
+	bndldx bnd1, [edx]
+
+	### bnd
+	bnd call	foo
+	bnd call	eax
+	bnd je	foo
+	bnd jmp	foo
+	bnd jmp	ecx
+	bnd ret
+
+foo:	bnd ret
diff --git a/gas/testsuite/gas/i386/nops.d b/gas/testsuite/gas/i386/nops.d
index 1fe43e2..2884927 100644
--- a/gas/testsuite/gas/i386/nops.d
+++ b/gas/testsuite/gas/i386/nops.d
@@ -22,29 +22,21 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 1e ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1f ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 19 5a 22          	nopl   0x22\(%edx\)
-[ 	]*[a-f0-9]+:	0f 1a 5a 22          	nopl   0x22\(%edx\)
-[ 	]*[a-f0-9]+:	0f 1b 5a 22          	nopl   0x22\(%edx\)
 [ 	]*[a-f0-9]+:	0f 1c 5a 22          	nopl   0x22\(%edx\)
 [ 	]*[a-f0-9]+:	0f 1d 5a 22          	nopl   0x22\(%edx\)
 [ 	]*[a-f0-9]+:	0f 1e 5a 22          	nopl   0x22\(%edx\)
 [ 	]*[a-f0-9]+:	0f 1f 5a 22          	nopl   0x22\(%edx\)
 [ 	]*[a-f0-9]+:	0f 19 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
-[ 	]*[a-f0-9]+:	0f 1a 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
-[ 	]*[a-f0-9]+:	0f 1b 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
 [ 	]*[a-f0-9]+:	0f 1c 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
 [ 	]*[a-f0-9]+:	0f 1d 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
 [ 	]*[a-f0-9]+:	0f 1e 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
 [ 	]*[a-f0-9]+:	0f 1f 9c 1d 11 22 33 44 	nopl   0x44332211\(%ebp,%ebx,1\)
 [ 	]*[a-f0-9]+:	0f 19 04 60          	nopl   \(%eax,%eiz,2\)
-[ 	]*[a-f0-9]+:	0f 1a 04 60          	nopl   \(%eax,%eiz,2\)
-[ 	]*[a-f0-9]+:	0f 1b 04 60          	nopl   \(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	0f 1c 04 60          	nopl   \(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	0f 1d 04 60          	nopl   \(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	0f 1e 04 60          	nopl   \(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	0f 1f 04 60          	nopl   \(%eax,%eiz,2\)
 [ 	]*[a-f0-9]+:	0f 19 04 59          	nopl   \(%ecx,%ebx,2\)
-[ 	]*[a-f0-9]+:	0f 1a 04 59          	nopl   \(%ecx,%ebx,2\)
-[ 	]*[a-f0-9]+:	0f 1b 04 59          	nopl   \(%ecx,%ebx,2\)
 [ 	]*[a-f0-9]+:	0f 1c 04 59          	nopl   \(%ecx,%ebx,2\)
 [ 	]*[a-f0-9]+:	0f 1d 04 59          	nopl   \(%ecx,%ebx,2\)
 [ 	]*[a-f0-9]+:	0f 1e 04 59          	nopl   \(%ecx,%ebx,2\)
diff --git a/gas/testsuite/gas/i386/nops.s b/gas/testsuite/gas/i386/nops.s
index 1397ec5..abeff5e 100644
--- a/gas/testsuite/gas/i386/nops.s
+++ b/gas/testsuite/gas/i386/nops.s
@@ -20,8 +20,6 @@
 
 	# with base and imm8
 	.byte 0x0f, 0x19, 0x5A, 0x22
-	.byte 0x0f, 0x1a, 0x5A, 0x22
-	.byte 0x0f, 0x1b, 0x5A, 0x22
 	.byte 0x0f, 0x1c, 0x5A, 0x22
 	.byte 0x0f, 0x1d, 0x5A, 0x22
 	.byte 0x0f, 0x1e, 0x5A, 0x22
@@ -29,24 +27,18 @@
 
 	# with sib and imm32
 	.byte 0x0f, 0x19, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1a, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1b, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1c, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1d, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1e, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 
 	.byte 0x0f, 0x19, 0x04, 0x60
-	.byte 0x0f, 0x1a, 0x04, 0x60
-	.byte 0x0f, 0x1b, 0x04, 0x60
 	.byte 0x0f, 0x1c, 0x04, 0x60
 	.byte 0x0f, 0x1d, 0x04, 0x60
 	.byte 0x0f, 0x1e, 0x04, 0x60
 	.byte 0x0f, 0x1f, 0x04, 0x60
 
 	.byte 0x0f, 0x19, 0x04, 0x59
-	.byte 0x0f, 0x1a, 0x04, 0x59
-	.byte 0x0f, 0x1b, 0x04, 0x59
 	.byte 0x0f, 0x1c, 0x04, 0x59
 	.byte 0x0f, 0x1d, 0x04, 0x59
 	.byte 0x0f, 0x1e, 0x04, 0x59
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d b/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d
new file mode 100644
index 0000000..cbd77b8
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d
@@ -0,0 +1,24 @@
+#as: -madd-bnd-prefix
+#objdump: -drw
+#name: Check -madd-bnd-prefix (x86-64)
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo-0x14>:
+[ 	]*[a-f0-9]+:	f2 e8 0e 00 00 00    	bnd callq 14 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 10             	bnd callq \*\(%rax\)
+[ 	]*[a-f0-9]+:	f2 74 08             	bnd je 14 <foo>
+[ 	]*[a-f0-9]+:	f2 eb 05             	bnd jmp 14 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 23             	bnd jmpq \*\(%rbx\)
+[ 	]*[a-f0-9]+:	f2 c3                	bnd retq 
+
+0+14 <foo>:
+[ 	]*[a-f0-9]+:	f2 c3                	bnd retq 
+[ 	]*[a-f0-9]+:	f2 c3                	bnd retq 
+[ 	]*[a-f0-9]+:	f2 e8 f6 ff ff ff    	bnd callq 14 <foo>
+[ 	]*[a-f0-9]+:	48 01 c3             	add    %rax,%rbx
+[ 	]*[a-f0-9]+:	e2 f1                	loop   14 <foo>
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.s b/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.s
new file mode 100644
index 0000000..f9a900c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.s
@@ -0,0 +1,19 @@
+# Check -madd-bnd-prefix option
+	.text
+
+	call	foo
+	call	*(%rax)
+	je	foo
+	jmp	foo
+	jmp	*(%rbx)
+	ret
+foo:
+	# Use of REPNE prefix - we shouldn't get any error
+	repne ret
+	# BND prefix already exists - we shouldn't get any error here
+	bnd ret
+	bnd call	foo
+	# Following instructions can't have BND prefix even if
+	# -madd-bnd-prefix is specified
+	add %rax, %rbx
+	loop foo
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-addr32.d b/gas/testsuite/gas/i386/x86-64-mpx-addr32.d
new file mode 100644
index 0000000..4bf830c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-addr32.d
@@ -0,0 +1,40 @@
+#objdump: -drw
+#name: x86-64 MPX addr32 tests
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0000000000000000 <.text>:
+[ 	]*[a-f0-9]+:	67 f3 0f 1b 08       	addr32 bndmk \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	67 f3 0f 1b 4c 19 03 	addr32 bndmk 0x3\(%rcx,%rbx,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 66 41 0f 1a 08    	addr32 bndmov \(%r8\),%bnd1
+[ 	]*[a-f0-9]+:	67 66 41 0f 1a 4c 11 03 	addr32 bndmov 0x3\(%r9,%rdx,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 66 0f 1b 08       	addr32 bndmov %bnd1,\(%rax\)
+[ 	]*[a-f0-9]+:	67 66 0f 1b 4c 01 03 	addr32 bndmov %bnd1,0x3\(%rcx,%rax,1\)
+[ 	]*[a-f0-9]+:	67 f3 0f 1a 09       	addr32 bndcl \(%rcx\),%bnd1
+[ 	]*[a-f0-9]+:	67 f3 0f 1a 4c 01 03 	addr32 bndcl 0x3\(%rcx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1a 09       	addr32 bndcu \(%rcx\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1a 4c 01 03 	addr32 bndcu 0x3\(%rcx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1b 09       	addr32 bndcn \(%rcx\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1b 4c 01 03 	addr32 bndcn 0x3\(%rcx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 0f 1b 44 18 03    	addr32 bndstx %bnd0,0x3\(%rax,%rbx,1\)
+[ 	]*[a-f0-9]+:	67 0f 1b 53 03       	addr32 bndstx %bnd2,0x3\(%rbx\)
+[ 	]*[a-f0-9]+:	67 0f 1a 44 18 03    	addr32 bndldx 0x3\(%rax,%rbx,1\),%bnd0
+[ 	]*[a-f0-9]+:	67 0f 1a 53 03       	addr32 bndldx 0x3\(%rbx\),%bnd2
+[ 	]*[a-f0-9]+:	67 f3 0f 1b 08       	addr32 bndmk \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	67 f3 0f 1b 4c 02 03 	addr32 bndmk 0x3\(%rdx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 66 0f 1a 08       	addr32 bndmov \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	67 66 0f 1a 4c 02 03 	addr32 bndmov 0x3\(%rdx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 66 0f 1b 08       	addr32 bndmov %bnd1,\(%rax\)
+[ 	]*[a-f0-9]+:	67 66 0f 1b 4c 02 03 	addr32 bndmov %bnd1,0x3\(%rdx,%rax,1\)
+[ 	]*[a-f0-9]+:	67 f3 0f 1a 08       	addr32 bndcl \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	67 f3 0f 1a 4c 02 03 	addr32 bndcl 0x3\(%rdx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1a 08       	addr32 bndcu \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1a 4c 02 03 	addr32 bndcu 0x3\(%rdx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1b 08       	addr32 bndcn \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	67 f2 0f 1b 4c 02 03 	addr32 bndcn 0x3\(%rdx,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	67 0f 1b 44 18 03    	addr32 bndstx %bnd0,0x3\(%rax,%rbx,1\)
+[ 	]*[a-f0-9]+:	67 0f 1b 14 1d 03 00 00 00 	addr32 bndstx %bnd2,0x3\(,%rbx,1\)
+[ 	]*[a-f0-9]+:	67 0f 1a 44 18 03    	addr32 bndldx 0x3\(%rax,%rbx,1\),%bnd0
+[ 	]*[a-f0-9]+:	67 0f 1a 14 1d 03 00 00 00 	addr32 bndldx 0x3\(,%rbx,1\),%bnd2
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-addr32.s b/gas/testsuite/gas/i386/x86-64-mpx-addr32.s
new file mode 100644
index 0000000..d4185a3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-addr32.s
@@ -0,0 +1,32 @@
+.byte 0x67; bndmk  (%rax),%bnd1
+.byte 0x67; bndmk  0x3(%rcx,%rbx,1),%bnd1
+.byte 0x67; bndmov (%r8),%bnd1
+.byte 0x67; bndmov 0x3(%r9,%rdx,1),%bnd1
+.byte 0x67; bndmov %bnd1,(%rax)
+.byte 0x67; bndmov %bnd1,0x3(%rcx,%rax,1)
+.byte 0x67; bndcl  (%rcx),%bnd1
+.byte 0x67; bndcl  0x3(%rcx,%rax,1),%bnd1
+.byte 0x67; bndcu  (%rcx),%bnd1
+.byte 0x67; bndcu  0x3(%rcx,%rax,1),%bnd1
+.byte 0x67; bndcn  (%rcx),%bnd1
+.byte 0x67; bndcn  0x3(%rcx,%rax,1),%bnd1
+.byte 0x67; bndstx %bnd0,0x3(%rax,%rbx,1)
+.byte 0x67; bndstx %bnd2,0x3(%rbx)
+.byte 0x67; bndldx 0x3(%rax,%rbx,1),%bnd0
+.byte 0x67; bndldx 0x3(%rbx),%bnd2
+.byte 0x67; bndmk  (%rax),%bnd1
+.byte 0x67; bndmk  0x3(%rdx,%rax,1),%bnd1
+.byte 0x67; bndmov (%rax),%bnd1
+.byte 0x67; bndmov 0x3(%rdx,%rax,1),%bnd1
+.byte 0x67; bndmov %bnd1,(%rax)
+.byte 0x67; bndmov %bnd1,0x3(%rdx,%rax,1)
+.byte 0x67; bndcl  (%rax),%bnd1
+.byte 0x67; bndcl  0x3(%rdx,%rax,1),%bnd1
+.byte 0x67; bndcu  (%rax),%bnd1
+.byte 0x67; bndcu  0x3(%rdx,%rax,1),%bnd1
+.byte 0x67; bndcn  (%rax),%bnd1
+.byte 0x67; bndcn  0x3(%rdx,%rax,1),%bnd1
+.byte 0x67; bndstx %bnd0,0x3(%rax,%rbx,1)
+.byte 0x67; bndstx %bnd2,0x3(,%rbx,1)
+.byte 0x67; bndldx 0x3(%rax,%rbx,1),%bnd0
+.byte 0x67; bndldx 0x3(,%rbx,1),%bnd2
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-inval-1.l b/gas/testsuite/gas/i386/x86-64-mpx-inval-1.l
new file mode 100644
index 0000000..e78ab7c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-inval-1.l
@@ -0,0 +1,33 @@
+.*: Assembler messages:
+.*:4: Error: expecting valid branch instruction after `bnd'
+.*:5: Error: expecting valid branch instruction after `bnd'
+.*:6: Error: expecting valid branch instruction after `bnd'
+.*:7: Error: expecting valid branch instruction after `bnd'
+.*:10: Error: expecting valid branch instruction after `bnd'
+.*:11: Error: expecting valid branch instruction after `bnd'
+.*:12: Error: expecting valid branch instruction after `bnd'
+.*:13: Error: expecting valid branch instruction after `bnd'
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# MPX instructions
+[ 	]*2[ 	]+\.allow_index_reg
+[ 	]*3[ 	]+\.text
+[ 	]*4[ 	]+\?\?\?\? F24801C3 		bnd add %rax, %rbx  		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*5[ 	]+\?\?\?\? 6766F2AB 		bnd stosw \(%edi\)    		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*6[ 	]+\?\?\?\? F2E200   		bnd loop foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*7[ 	]+\?\?\?\? F2E300   		bnd jrcxz foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*8[ 	]+
+[ 	]*9[ 	]+\.intel_syntax noprefix
+[ 	]*10[ 	]+\?\?\?\? F24801C3 		bnd add rbx, rax		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*11[ 	]+\?\?\?\? 6766F2AB 		bnd stos WORD PTR \[edi]		\# Bad
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*12[ 	]+\?\?\?\? F2E200   		bnd loop foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
+[ 	]*13[ 	]+\?\?\?\? F2E300   		bnd jrcxz foo
+\*\*\*\*  Error:expecting valid branch instruction after `bnd'
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-inval-1.s b/gas/testsuite/gas/i386/x86-64-mpx-inval-1.s
new file mode 100644
index 0000000..afa04fc
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-inval-1.s
@@ -0,0 +1,13 @@
+# MPX instructions
+	.allow_index_reg
+	.text
+	bnd add %rax, %rbx  		# Bad
+	bnd stosw (%edi)    		# Bad
+	bnd loop foo
+	bnd jrcxz foo
+
+.intel_syntax noprefix
+	bnd add rbx, rax		# Bad
+	bnd stos WORD PTR [edi]		# Bad
+	bnd loop foo
+	bnd jrcxz foo
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l b/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l
new file mode 100644
index 0000000..820d87a
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-inval-2.l
@@ -0,0 +1,173 @@
+.*: Assembler messages:
+.*:6: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:7: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:10: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:11: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:13: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:14: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:17: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:18: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:21: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:22: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:25: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:26: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:29: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:30: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:33: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:34: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:37: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:38: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:41: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:42: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:44: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:45: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:48: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:49: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:52: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:53: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:56: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:57: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:60: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:61: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:64: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+.*:65: Error: 32-bit address isn't allowed in 64-bit MPX instructions.
+GAS LISTING .*
+
+
+[ 	]*1[ 	]+\# MPX instructions
+[ 	]*2[ 	]+\.allow_index_reg
+[ 	]*3[ 	]+\.text
+[ 	]*4[ 	]+
+[ 	]*5[ 	]+\#\#\# bndmk
+[ 	]*6[ 	]+\?\?\?\? 67F30F1B 		bndmk \(%eax\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*6[ 	]+08
+[ 	]*7[ 	]+\?\?\?\? 67F30F1B 		bndmk 0x3\(%ecx,%ebx,1\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*7[ 	]+4C1903
+[ 	]*8[ 	]+
+[ 	]*9[ 	]+\#\#\# bndmov
+[ 	]*10[ 	]+\?\?\?\? 6766410F 		bndmov \(%r8d\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*10[ 	]+1A08
+[ 	]*11[ 	]+\?\?\?\? 6766410F 		bndmov 0x3\(%r9d,%edx,1\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*11[ 	]+1A4C1103 
+[ 	]*12[ 	]+
+[ 	]*13[ 	]+\?\?\?\? 67660F1B 		bndmov %bnd1, \(%eax\)
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*13[ 	]+08
+[ 	]*14[ 	]+\?\?\?\? 67660F1B 		bndmov %bnd1, 0x3\(%ecx,%eax,1\)
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*14[ 	]+4C0103
+[ 	]*15[ 	]+
+[ 	]*16[ 	]+\#\#\# bndcl
+[ 	]*17[ 	]+\?\?\?\? 67F30F1A 		bndcl \(%ecx\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*17[ 	]+09
+[ 	]*18[ 	]+\?\?\?\? 67F30F1A 		bndcl 0x3\(%ecx,%eax,1\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*18[ 	]+4C0103
+[ 	]*19[ 	]+
+[ 	]*20[ 	]+\#\#\# bndcu
+[ 	]*21[ 	]+\?\?\?\? 67F20F1A 		bndcu \(%ecx\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*21[ 	]+09
+[ 	]*22[ 	]+\?\?\?\? 67F20F1A 		bndcu 0x3\(%ecx,%eax,1\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*22[ 	]+4C0103
+[ 	]*23[ 	]+
+[ 	]*24[ 	]+\#\#\# bndcn
+[ 	]*25[ 	]+\?\?\?\? 67F20F1B 		bndcn \(%ecx\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*25[ 	]+09
+[ 	]*26[ 	]+\?\?\?\? 67F20F1B 		bndcn 0x3\(%ecx,%eax,1\), %bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*26[ 	]+4C0103
+[ 	]*27[ 	]+
+[ 	]*28[ 	]+\#\#\# bndstx
+[ 	]*29[ 	]+\?\?\?\? 670F1B44 		bndstx %bnd0, 0x3\(%eax,%ebx,1\)
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*29[ 	]+1803
+[ 	]*30[ 	]+\?\?\?\? 670F1B53 		bndstx %bnd2, 3\(%ebx,1\)
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+GAS LISTING .*
+
+
+[ 	]*30[ 	]+03
+[ 	]*31[ 	]+
+[ 	]*32[ 	]+\#\#\# bndldx
+[ 	]*33[ 	]+\?\?\?\? 670F1A44 		bndldx 0x3\(%eax,%ebx,1\), %bnd0
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*33[ 	]+1803
+[ 	]*34[ 	]+\?\?\?\? 670F1A53 		bndldx 3\(%ebx,1\), %bnd2
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*34[ 	]+03
+[ 	]*35[ 	]+
+[ 	]*36[ 	]+\.intel_syntax noprefix
+[ 	]*37[ 	]+\?\?\?\? 67F30F1B 		bndmk bnd1, \[eax\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*37[ 	]+08
+[ 	]*38[ 	]+\?\?\?\? 67F30F1B 		bndmk bnd1, \[edx\+1\*eax\+0x3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*38[ 	]+4C0203
+[ 	]*39[ 	]+
+[ 	]*40[ 	]+\#\#\# bndmov
+[ 	]*41[ 	]+\?\?\?\? 67660F1A 		bndmov bnd1, \[eax\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*41[ 	]+08
+[ 	]*42[ 	]+\?\?\?\? 67660F1A 		bndmov bnd1, \[edx\+1\*eax\+0x3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*42[ 	]+4C0203
+[ 	]*43[ 	]+
+[ 	]*44[ 	]+\?\?\?\? 67660F1B 		bndmov \[eax\], bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*44[ 	]+08
+[ 	]*45[ 	]+\?\?\?\? 67660F1B 		bndmov \[edx\+1\*eax\+0x3\], bnd1
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*45[ 	]+4C0203
+[ 	]*46[ 	]+
+[ 	]*47[ 	]+\#\#\# bndcl
+[ 	]*48[ 	]+\?\?\?\? 67F30F1A 		bndcl bnd1, \[eax\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*48[ 	]+08
+[ 	]*49[ 	]+\?\?\?\? 67F30F1A 		bndcl bnd1, \[edx\+1\*eax\+0x3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*49[ 	]+4C0203
+[ 	]*50[ 	]+
+[ 	]*51[ 	]+\#\#\# bndcu
+[ 	]*52[ 	]+\?\?\?\? 67F20F1A 		bndcu bnd1, \[eax\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*52[ 	]+08
+[ 	]*53[ 	]+\?\?\?\? 67F20F1A 		bndcu bnd1, \[edx\+1\*eax\+0x3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*53[ 	]+4C0203
+[ 	]*54[ 	]+
+[ 	]*55[ 	]+\#\#\# bndcn
+[ 	]*56[ 	]+\?\?\?\? 67F20F1B 		bndcn bnd1, \[eax\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*56[ 	]+08
+[ 	]*57[ 	]+\?\?\?\? 67F20F1B 		bndcn bnd1, \[edx\+1\*eax\+0x3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*57[ 	]+4C0203
+[ 	]*58[ 	]+
+GAS LISTING .*
+
+
+[ 	]*59[ 	]+\#\#\# bndstx
+[ 	]*60[ 	]+\?\?\?\? 670F1B44 		bndstx \[eax\+ebx\*1\+0x3\], bnd0
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*60[ 	]+1803
+[ 	]*61[ 	]+\?\?\?\? 670F1B14 		bndstx \[1\*ebx\+3\], bnd2
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*61[ 	]+1D030000 
+[ 	]*61[ 	]+00
+[ 	]*62[ 	]+
+[ 	]*63[ 	]+\#\#\# bndldx
+[ 	]*64[ 	]+\?\?\?\? 670F1A44 		bndldx bnd0, \[eax\+ebx\*1\+0x3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*64[ 	]+1803
+[ 	]*65[ 	]+\?\?\?\? 670F1A14 		bndldx bnd2, \[1\*ebx\+3\]
+\*\*\*\*  Error:32-bit address isn't allowed in 64-bit MPX instructions\.
+[ 	]*65[ 	]+1D030000 
+[ 	]*65[ 	]+00
diff --git a/gas/testsuite/gas/i386/x86-64-mpx-inval-2.s b/gas/testsuite/gas/i386/x86-64-mpx-inval-2.s
new file mode 100644
index 0000000..e15d952
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx-inval-2.s
@@ -0,0 +1,65 @@
+# MPX instructions
+	.allow_index_reg
+	.text
+
+	### bndmk
+	bndmk (%eax), %bnd1
+	bndmk 0x3(%ecx,%ebx,1), %bnd1
+
+	### bndmov
+	bndmov (%r8d), %bnd1
+	bndmov 0x3(%r9d,%edx,1), %bnd1
+
+	bndmov %bnd1, (%eax)
+	bndmov %bnd1, 0x3(%ecx,%eax,1)
+
+	### bndcl
+	bndcl (%ecx), %bnd1
+	bndcl 0x3(%ecx,%eax,1), %bnd1
+
+	### bndcu
+	bndcu (%ecx), %bnd1
+	bndcu 0x3(%ecx,%eax,1), %bnd1
+
+	### bndcn
+	bndcn (%ecx), %bnd1
+	bndcn 0x3(%ecx,%eax,1), %bnd1
+
+	### bndstx
+	bndstx %bnd0, 0x3(%eax,%ebx,1)
+	bndstx %bnd2, 3(%ebx,1)
+
+	### bndldx
+	bndldx 0x3(%eax,%ebx,1), %bnd0
+	bndldx 3(%ebx,1), %bnd2
+
+.intel_syntax noprefix
+	bndmk bnd1, [eax]
+	bndmk bnd1, [edx+1*eax+0x3]
+
+	### bndmov
+	bndmov bnd1, [eax]
+	bndmov bnd1, [edx+1*eax+0x3]
+
+	bndmov [eax], bnd1
+	bndmov [edx+1*eax+0x3], bnd1
+
+	### bndcl
+	bndcl bnd1, [eax]
+	bndcl bnd1, [edx+1*eax+0x3]
+
+	### bndcu
+	bndcu bnd1, [eax]
+	bndcu bnd1, [edx+1*eax+0x3]
+
+	### bndcn
+	bndcn bnd1, [eax]
+	bndcn bnd1, [edx+1*eax+0x3]
+
+	### bndstx
+	bndstx [eax+ebx*1+0x3], bnd0
+	bndstx [1*ebx+3], bnd2
+
+	### bndldx
+	bndldx bnd0, [eax+ebx*1+0x3]
+	bndldx bnd2, [1*ebx+3]
diff --git a/gas/testsuite/gas/i386/x86-64-mpx.d b/gas/testsuite/gas/i386/x86-64-mpx.d
new file mode 100644
index 0000000..cef040c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx.d
@@ -0,0 +1,191 @@
+#objdump: -drw
+#name: x86-64 MPX
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <foo-0x434>:
+[ 	]*[a-f0-9]+:	f3 41 0f 1b 0b       	bndmk  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 08          	bndmk  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 25 99 03 00 00 	bndmk  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1b 49 03    	bndmk  0x3\(%r9\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 48 03       	bndmk  0x3\(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1b 0c 25 03 00 00 00 	bndmk  0x3\(,%r12,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 08       	bndmk  \(%rax,%rcx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1b 4c 03 03 	bndmk  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1b 4c 0b 03 	bndmk  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 41 0f 1a 0b       	bndmov \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 08          	bndmov \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 0c 25 99 03 00 00 	bndmov 0x399,%bnd1
+[ 	]*[a-f0-9]+:	66 41 0f 1a 51 03    	bndmov 0x3\(%r9\),%bnd2
+[ 	]*[a-f0-9]+:	66 0f 1a 50 03       	bndmov 0x3\(%rax\),%bnd2
+[ 	]*[a-f0-9]+:	66 42 0f 1a 04 25 03 00 00 00 	bndmov 0x3\(,%r12,1\),%bnd0
+[ 	]*[a-f0-9]+:	66 0f 1a 14 10       	bndmov \(%rax,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	66 41 0f 1a 4c 03 03 	bndmov 0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 42 0f 1a 4c 0b 03 	bndmov 0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a c2          	bndmov %bnd2,%bnd0
+[ 	]*[a-f0-9]+:	66 41 0f 1b 0b       	bndmov %bnd1,\(%r11\)
+[ 	]*[a-f0-9]+:	66 0f 1b 08          	bndmov %bnd1,\(%rax\)
+[ 	]*[a-f0-9]+:	66 0f 1b 0c 25 99 03 00 00 	bndmov %bnd1,0x399
+[ 	]*[a-f0-9]+:	66 41 0f 1b 51 03    	bndmov %bnd2,0x3\(%r9\)
+[ 	]*[a-f0-9]+:	66 0f 1b 50 03       	bndmov %bnd2,0x3\(%rax\)
+[ 	]*[a-f0-9]+:	66 42 0f 1b 04 25 03 00 00 00 	bndmov %bnd0,0x3\(,%r12,1\)
+[ 	]*[a-f0-9]+:	66 0f 1b 14 10       	bndmov %bnd2,\(%rax,%rdx,1\)
+[ 	]*[a-f0-9]+:	66 41 0f 1b 4c 03 03 	bndmov %bnd1,0x3\(%r11,%rax,1\)
+[ 	]*[a-f0-9]+:	66 42 0f 1b 4c 0b 03 	bndmov %bnd1,0x3\(%rbx,%r9,1\)
+[ 	]*[a-f0-9]+:	66 0f 1a d0          	bndmov %bnd0,%bnd2
+[ 	]*[a-f0-9]+:	f3 41 0f 1a 0b       	bndcl  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 08          	bndcl  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 49 0f 1a cb       	bndcl  %r11,%bnd1
+[ 	]*[a-f0-9]+:	f3 48 0f 1a c9       	bndcl  %rcx,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a c8          	bndcl  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 25 99 03 00 00 	bndcl  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1a 51 03    	bndcl  0x3\(%r9\),%bnd2
+[ 	]*[a-f0-9]+:	f3 0f 1a 50 03       	bndcl  0x3\(%rax\),%bnd2
+[ 	]*[a-f0-9]+:	f3 42 0f 1a 04 25 03 00 00 00 	bndcl  0x3\(,%r12,1\),%bnd0
+[ 	]*[a-f0-9]+:	f3 0f 1a 14 10       	bndcl  \(%rax,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	f3 41 0f 1a 4c 03 03 	bndcl  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1a 4c 0b 03 	bndcl  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1a 0b       	bndcu  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 08          	bndcu  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 49 0f 1a cb       	bndcu  %r11,%bnd1
+[ 	]*[a-f0-9]+:	f2 48 0f 1a c9       	bndcu  %rcx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a c8          	bndcu  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 25 99 03 00 00 	bndcu  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1a 51 03    	bndcu  0x3\(%r9\),%bnd2
+[ 	]*[a-f0-9]+:	f2 0f 1a 50 03       	bndcu  0x3\(%rax\),%bnd2
+[ 	]*[a-f0-9]+:	f2 42 0f 1a 04 25 03 00 00 00 	bndcu  0x3\(,%r12,1\),%bnd0
+[ 	]*[a-f0-9]+:	f2 0f 1a 14 10       	bndcu  \(%rax,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	f2 41 0f 1a 4c 03 03 	bndcu  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 42 0f 1a 4c 0b 03 	bndcu  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1b 0b       	bndcn  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 08          	bndcn  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 49 0f 1b cb       	bndcn  %r11,%bnd1
+[ 	]*[a-f0-9]+:	f2 48 0f 1b c9       	bndcn  %rcx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b c8          	bndcn  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 25 99 03 00 00 	bndcn  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1b 51 03    	bndcn  0x3\(%r9\),%bnd2
+[ 	]*[a-f0-9]+:	f2 0f 1b 50 03       	bndcn  0x3\(%rax\),%bnd2
+[ 	]*[a-f0-9]+:	f2 42 0f 1b 04 25 03 00 00 00 	bndcn  0x3\(,%r12,1\),%bnd0
+[ 	]*[a-f0-9]+:	f2 0f 1b 14 10       	bndcn  \(%rax,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	f2 41 0f 1b 4c 03 03 	bndcn  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 42 0f 1b 4c 0b 03 	bndcn  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	0f 1b 44 18 03       	bndstx %bnd0,0x3\(%rax,%rbx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 54 13 03       	bndstx %bnd2,0x3\(%rbx,%rdx,1\)
+[ 	]*[a-f0-9]+:	41 0f 1b 9c 24 99 03 00 00 	bndstx %bnd3,0x399\(%r12\)
+[ 	]*[a-f0-9]+:	41 0f 1b 8b 34 12 00 00 	bndstx %bnd1,0x1234\(%r11\)
+[ 	]*[a-f0-9]+:	0f 1b 93 34 12 00 00 	bndstx %bnd2,0x1234\(%rbx\)
+[ 	]*[a-f0-9]+:	0f 1b 14 1d 03 00 00 00 	bndstx %bnd2,0x3\(,%rbx,1\)
+[ 	]*[a-f0-9]+:	42 0f 1b 14 25 03 00 00 00 	bndstx %bnd2,0x3\(,%r12,1\)
+[ 	]*[a-f0-9]+:	0f 1b 0a             	bndstx %bnd1,\(%rdx\)
+[ 	]*[a-f0-9]+:	0f 1a 44 18 03       	bndldx 0x3\(%rax,%rbx,1\),%bnd0
+[ 	]*[a-f0-9]+:	0f 1a 54 13 03       	bndldx 0x3\(%rbx,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	41 0f 1a 9c 24 99 03 00 00 	bndldx 0x399\(%r12\),%bnd3
+[ 	]*[a-f0-9]+:	41 0f 1a 8b 34 12 00 00 	bndldx 0x1234\(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	0f 1a 93 34 12 00 00 	bndldx 0x1234\(%rbx\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 14 1d 03 00 00 00 	bndldx 0x3\(,%rbx,1\),%bnd2
+[ 	]*[a-f0-9]+:	42 0f 1a 14 25 03 00 00 00 	bndldx 0x3\(,%r12,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 0a             	bndldx \(%rdx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 e8 34 02 00 00    	bnd callq 434 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 10             	bnd callq \*\(%rax\)
+[ 	]*[a-f0-9]+:	f2 41 ff 13          	bnd callq \*\(%r11\)
+[ 	]*[a-f0-9]+:	f2 0f 84 26 02 00 00 	bnd je 434 <foo>
+[ 	]*[a-f0-9]+:	f2 e9 20 02 00 00    	bnd jmpq 434 <foo>
+[ 	]*[a-f0-9]+:	f2 ff 21             	bnd jmpq \*\(%rcx\)
+[ 	]*[a-f0-9]+:	f2 41 ff 24 24       	bnd jmpq \*\(%r12\)
+[ 	]*[a-f0-9]+:	f2 c3                	bnd retq 
+[ 	]*[a-f0-9]+:	f3 41 0f 1b 0b       	bndmk  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 08          	bndmk  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 25 99 03 00 00 	bndmk  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1b 49 03    	bndmk  0x3\(%r9\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 48 03       	bndmk  0x3\(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1b 0c 25 03 00 00 00 	bndmk  0x3\(,%r12,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1b 0c 08       	bndmk  \(%rax,%rcx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1b 4c 03 03 	bndmk  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1b 4c 0b 03 	bndmk  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 41 0f 1a 0b       	bndmov \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 08          	bndmov \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a 0c 25 99 03 00 00 	bndmov 0x399,%bnd1
+[ 	]*[a-f0-9]+:	66 41 0f 1a 51 03    	bndmov 0x3\(%r9\),%bnd2
+[ 	]*[a-f0-9]+:	66 0f 1a 50 03       	bndmov 0x3\(%rax\),%bnd2
+[ 	]*[a-f0-9]+:	66 42 0f 1a 04 25 03 00 00 00 	bndmov 0x3\(,%r12,1\),%bnd0
+[ 	]*[a-f0-9]+:	66 0f 1a 14 10       	bndmov \(%rax,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	66 41 0f 1a 4c 03 03 	bndmov 0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 42 0f 1a 4c 0b 03 	bndmov 0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	66 0f 1a c2          	bndmov %bnd2,%bnd0
+[ 	]*[a-f0-9]+:	66 41 0f 1b 0b       	bndmov %bnd1,\(%r11\)
+[ 	]*[a-f0-9]+:	66 0f 1b 08          	bndmov %bnd1,\(%rax\)
+[ 	]*[a-f0-9]+:	66 0f 1b 0c 25 99 03 00 00 	bndmov %bnd1,0x399
+[ 	]*[a-f0-9]+:	66 41 0f 1b 51 03    	bndmov %bnd2,0x3\(%r9\)
+[ 	]*[a-f0-9]+:	66 0f 1b 50 03       	bndmov %bnd2,0x3\(%rax\)
+[ 	]*[a-f0-9]+:	66 42 0f 1b 04 25 03 00 00 00 	bndmov %bnd0,0x3\(,%r12,1\)
+[ 	]*[a-f0-9]+:	66 0f 1b 14 10       	bndmov %bnd2,\(%rax,%rdx,1\)
+[ 	]*[a-f0-9]+:	66 41 0f 1b 4c 03 03 	bndmov %bnd1,0x3\(%r11,%rax,1\)
+[ 	]*[a-f0-9]+:	66 42 0f 1b 4c 0b 03 	bndmov %bnd1,0x3\(%rbx,%r9,1\)
+[ 	]*[a-f0-9]+:	66 0f 1a d0          	bndmov %bnd0,%bnd2
+[ 	]*[a-f0-9]+:	f3 41 0f 1a 0b       	bndcl  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 08          	bndcl  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 49 0f 1a cb       	bndcl  %r11,%bnd1
+[ 	]*[a-f0-9]+:	f3 48 0f 1a c9       	bndcl  %rcx,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a c8          	bndcl  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 25 99 03 00 00 	bndcl  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1a 49 03    	bndcl  0x3\(%r9\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 48 03       	bndcl  0x3\(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1a 0c 25 03 00 00 00 	bndcl  0x3\(,%r12,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 0f 1a 0c 08       	bndcl  \(%rax,%rcx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 41 0f 1a 4c 03 03 	bndcl  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f3 42 0f 1a 4c 0b 03 	bndcl  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1a 0b       	bndcu  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 08          	bndcu  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 49 0f 1a cb       	bndcu  %r11,%bnd1
+[ 	]*[a-f0-9]+:	f2 48 0f 1a c9       	bndcu  %rcx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a c8          	bndcu  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 25 99 03 00 00 	bndcu  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1a 49 03    	bndcu  0x3\(%r9\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 48 03       	bndcu  0x3\(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 42 0f 1a 0c 25 03 00 00 00 	bndcu  0x3\(,%r12,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1a 0c 08       	bndcu  \(%rax,%rcx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1a 4c 03 03 	bndcu  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 42 0f 1a 4c 0b 03 	bndcu  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1b 0b       	bndcn  \(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 08          	bndcn  \(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 49 0f 1b cb       	bndcn  %r11,%bnd1
+[ 	]*[a-f0-9]+:	f2 48 0f 1b c9       	bndcn  %rcx,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b c8          	bndcn  %eax,%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 25 99 03 00 00 	bndcn  0x399,%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1b 49 03    	bndcn  0x3\(%r9\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 48 03       	bndcn  0x3\(%rax\),%bnd1
+[ 	]*[a-f0-9]+:	f2 42 0f 1b 0c 0d 03 00 00 00 	bndcn  0x3\(,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 0f 1b 0c 08       	bndcn  \(%rax,%rcx,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 41 0f 1b 4c 03 03 	bndcn  0x3\(%r11,%rax,1\),%bnd1
+[ 	]*[a-f0-9]+:	f2 42 0f 1b 4c 0b 03 	bndcn  0x3\(%rbx,%r9,1\),%bnd1
+[ 	]*[a-f0-9]+:	0f 1b 44 18 03       	bndstx %bnd0,0x3\(%rax,%rbx,1\)
+[ 	]*[a-f0-9]+:	0f 1b 54 13 03       	bndstx %bnd2,0x3\(%rbx,%rdx,1\)
+[ 	]*[a-f0-9]+:	41 0f 1b 9c 24 99 03 00 00 	bndstx %bnd3,0x399\(%r12\)
+[ 	]*[a-f0-9]+:	41 0f 1b 8b 34 12 00 00 	bndstx %bnd1,0x1234\(%r11\)
+[ 	]*[a-f0-9]+:	0f 1b 93 34 12 00 00 	bndstx %bnd2,0x1234\(%rbx\)
+[ 	]*[a-f0-9]+:	0f 1b 14 1d 03 00 00 00 	bndstx %bnd2,0x3\(,%rbx,1\)
+[ 	]*[a-f0-9]+:	42 0f 1b 14 25 03 00 00 00 	bndstx %bnd2,0x3\(,%r12,1\)
+[ 	]*[a-f0-9]+:	0f 1b 0a             	bndstx %bnd1,\(%rdx\)
+[ 	]*[a-f0-9]+:	0f 1a 44 18 03       	bndldx 0x3\(%rax,%rbx,1\),%bnd0
+[ 	]*[a-f0-9]+:	0f 1a 54 13 03       	bndldx 0x3\(%rbx,%rdx,1\),%bnd2
+[ 	]*[a-f0-9]+:	41 0f 1a 9c 24 99 03 00 00 	bndldx 0x399\(%r12\),%bnd3
+[ 	]*[a-f0-9]+:	41 0f 1a 8b 34 12 00 00 	bndldx 0x1234\(%r11\),%bnd1
+[ 	]*[a-f0-9]+:	0f 1a 93 34 12 00 00 	bndldx 0x1234\(%rbx\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 14 1d 03 00 00 00 	bndldx 0x3\(,%rbx,1\),%bnd2
+[ 	]*[a-f0-9]+:	42 0f 1a 14 25 03 00 00 00 	bndldx 0x3\(,%r12,1\),%bnd2
+[ 	]*[a-f0-9]+:	0f 1a 0a             	bndldx \(%rdx\),%bnd1
+[ 	]*[a-f0-9]+:	f2 e8 16 00 00 00    	bnd callq 434 <foo>
+[ 	]*[a-f0-9]+:	f2 ff d0             	bnd callq \*%rax
+[ 	]*[a-f0-9]+:	f2 41 ff d3          	bnd callq \*%r11
+[ 	]*[a-f0-9]+:	f2 74 0c             	bnd je 434 <foo>
+[ 	]*[a-f0-9]+:	f2 eb 09             	bnd jmp 434 <foo>
+[ 	]*[a-f0-9]+:	f2 ff e1             	bnd jmpq \*%rcx
+[ 	]*[a-f0-9]+:	f2 41 ff e4          	bnd jmpq \*%r12
+[ 	]*[a-f0-9]+:	f2 c3                	bnd retq 
+
+0+434 <foo>:
+[ 	]*[a-f0-9]+:	f2 c3                	bnd retq 
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-mpx.s b/gas/testsuite/gas/i386/x86-64-mpx.s
new file mode 100644
index 0000000..1b696c0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-mpx.s
@@ -0,0 +1,217 @@
+# MPX instructions
+	.allow_index_reg
+	.text
+
+	### bndmk
+	bndmk (%r11), %bnd1
+	bndmk (%rax), %bnd1
+	bndmk (0x399), %bnd1
+	bndmk 0x3(%r9), %bnd1
+	bndmk 0x3(%rax), %bnd1
+	bndmk 0x3(,%r12,1), %bnd1
+	bndmk (%rax,%rcx), %bnd1
+	bndmk 0x3(%r11,%rax,1), %bnd1
+	bndmk 0x3(%rbx,%r9,1), %bnd1
+
+	### bndmov
+	bndmov (%r11), %bnd1
+	bndmov (%rax), %bnd1
+	bndmov (0x399), %bnd1
+	bndmov 0x3(%r9), %bnd2
+	bndmov 0x3(%rax), %bnd2
+	bndmov 0x3(,%r12,1), %bnd0
+	bndmov (%rax,%rdx), %bnd2
+	bndmov 0x3(%r11,%rax,1), %bnd1
+	bndmov 0x3(%rbx,%r9,1), %bnd1
+	bndmov %bnd2, %bnd0
+
+	bndmov %bnd1, (%r11)
+	bndmov %bnd1, (%rax)
+	bndmov %bnd1, (0x399)
+	bndmov %bnd2, 0x3(%r9)
+	bndmov %bnd2, 0x3(%rax)
+	bndmov %bnd0, 0x3(,%r12,1)
+	bndmov %bnd2, (%rax,%rdx)
+	bndmov %bnd1, 0x3(%r11,%rax,1)
+	bndmov %bnd1, 0x3(%rbx,%r9,1)
+	bndmov %bnd0, %bnd2
+
+	### bndcl
+	bndcl (%r11), %bnd1
+	bndcl (%rax), %bnd1
+	bndcl %r11, %bnd1
+	bndcl %rcx, %bnd1
+	bndcl %ax, %bnd1
+	bndcl (0x399), %bnd1
+	bndcl 0x3(%r9), %bnd2
+	bndcl 0x3(%rax), %bnd2
+	bndcl 0x3(,%r12,1), %bnd0
+	bndcl (%rax,%rdx), %bnd2
+	bndcl 0x3(%r11,%rax,1), %bnd1
+	bndcl 0x3(%rbx,%r9,1), %bnd1
+
+	### bndcu
+	bndcu (%r11), %bnd1
+	bndcu (%rax), %bnd1
+	bndcu %r11, %bnd1
+	bndcu %rcx, %bnd1
+	bndcu %ax, %bnd1
+	bndcu (0x399), %bnd1
+	bndcu 0x3(%r9), %bnd2
+	bndcu 0x3(%rax), %bnd2
+	bndcu 0x3(,%r12,1), %bnd0
+	bndcu (%rax,%rdx), %bnd2
+	bndcu 0x3(%r11,%rax,1), %bnd1
+	bndcu 0x3(%rbx,%r9,1), %bnd1
+
+	### bndcn
+	bndcn (%r11), %bnd1
+	bndcn (%rax), %bnd1
+	bndcn %r11, %bnd1
+	bndcn %rcx, %bnd1
+	bndcn %ax, %bnd1
+	bndcn (0x399), %bnd1
+	bndcn 0x3(%r9), %bnd2
+	bndcn 0x3(%rax), %bnd2
+	bndcn 0x3(,%r12,1), %bnd0
+	bndcn (%rax,%rdx), %bnd2
+	bndcn 0x3(%r11,%rax,1), %bnd1
+	bndcn 0x3(%rbx,%r9,1), %bnd1
+
+	### bndstx
+	bndstx %bnd0, 0x3(%rax,%rbx,1)
+	bndstx %bnd2, 3(%rbx,%rdx)
+	bndstx %bnd3, 0x399(%r12)
+	bndstx %bnd1, 0x1234(%r11)
+	bndstx %bnd2, 0x1234(%rbx)
+	bndstx %bnd2, 3(,%rbx,1)
+	bndstx %bnd2, 3(,%r12,1)
+	bndstx %bnd1, (%rdx)
+
+	### bndldx
+	bndldx 0x3(%rax,%rbx,1), %bnd0
+	bndldx 3(%rbx,%rdx), %bnd2
+	bndldx 0x399(%r12), %bnd3
+	bndldx 0x1234(%r11), %bnd1
+	bndldx 0x1234(%rbx), %bnd2
+	bndldx 3(,%rbx,1), %bnd2
+	bndldx 3(,%r12,1), %bnd2
+	bndldx (%rdx), %bnd1
+
+	### bnd
+	bnd call	foo
+	bnd call	*(%rax)
+	bnd call	*(%r11)
+	bnd je	foo
+	bnd jmp	foo
+	bnd jmp	*(%rcx)
+	bnd jmp	*(%r12)
+	bnd ret
+
+.intel_syntax noprefix
+	bndmk bnd1, [r11]
+	bndmk bnd1, [rax]
+	bndmk bnd1, [0x399]
+	bndmk bnd1, [r9+0x3]
+	bndmk bnd1, [rax+0x3]
+	bndmk bnd1, [1*r12+0x3]
+	bndmk bnd1, [rax+rcx]
+	bndmk bnd1, [r11+1*rax+0x3]
+	bndmk bnd1, [rbx+1*r9+0x3]
+
+	### bndmov
+	bndmov bnd1, [r11]
+	bndmov bnd1, [rax]
+	bndmov bnd1, [0x399]
+	bndmov bnd2, [r9+0x3]
+	bndmov bnd2, [rax+0x3]
+	bndmov bnd0, [1*r12+0x3]
+	bndmov bnd2, [rax+rdx]
+	bndmov bnd1, [r11+1*rax+0x3]
+	bndmov bnd1, [rbx+1*r9+0x3]
+	bndmov bnd0, bnd2
+
+	bndmov [r11], bnd1
+	bndmov [rax], bnd1
+	bndmov [0x399], bnd1
+	bndmov [r9+0x3], bnd2
+	bndmov [rax+0x3], bnd2
+	bndmov [1*r12+0x3], bnd0
+	bndmov [rax+rdx], bnd2
+	bndmov [r11+1*rax+0x3], bnd1
+	bndmov [rbx+1*r9+0x3], bnd1
+	bndmov bnd2, bnd0
+
+	### bndcl
+	bndcl bnd1, [r11]
+	bndcl bnd1, [rax]
+	bndcl bnd1, r11
+	bndcl bnd1, rcx
+	bndcl bnd1, ax
+	bndcl bnd1, [0x399]
+	bndcl bnd1, [r9+0x3]
+	bndcl bnd1, [rax+0x3]
+	bndcl bnd1, [1*r12+0x3]
+	bndcl bnd1, [rax+rcx]
+	bndcl bnd1, [r11+1*rax+0x3]
+	bndcl bnd1, [rbx+1*r9+0x3]
+
+	### bndcu
+	bndcu bnd1, [r11]
+	bndcu bnd1, [rax]
+	bndcu bnd1, r11
+	bndcu bnd1, rcx
+	bndcu bnd1, ax
+	bndcu bnd1, [0x399]
+	bndcu bnd1, [r9+0x3]
+	bndcu bnd1, [rax+0x3]
+	bndcu bnd1, [1*r12+0x3]
+	bndcu bnd1, [rax+rcx]
+	bndcu bnd1, [r11+1*rax+0x3]
+	bndcu bnd1, [rbx+1*r9+0x3]
+
+	### bndcn
+	bndcn bnd1, [r11]
+	bndcn bnd1, [rax]
+	bndcn bnd1, r11
+	bndcn bnd1, rcx
+	bndcn bnd1, ax
+	bndcn bnd1, [0x399]
+	bndcn bnd1, [r9+0x3]
+	bndcn bnd1, [rax+0x3]
+	bndcn bnd1, [1*r9+0x3]
+	bndcn bnd1, [rax+rcx]
+	bndcn bnd1, [r11+1*rax+0x3]
+	bndcn bnd1, [rbx+1*r9+0x3]
+
+	### bndstx
+	bndstx [rax+rbx*1+0x3], bnd0
+	bndstx [rbx+rdx+3], bnd2
+	bndstx [r12+0x399], bnd3
+	bndstx [r11+0x1234], bnd1
+	bndstx [rbx+0x1234], bnd2
+	bndstx [1*rbx+3], bnd2
+	bndstx [1*r12+3], bnd2
+	bndstx [rdx], bnd1
+
+	### bndldx
+	bndldx bnd0, [rax+rbx*1+0x3]
+	bndldx bnd2, [rbx+rdx+3]
+	bndldx bnd3, [r12+0x399]
+	bndldx bnd1, [r11+0x1234]
+	bndldx bnd2, [rbx+0x1234]
+	bndldx bnd2, [1*rbx+3]
+	bndldx bnd2, [1*r12+3]
+	bndldx bnd1, [rdx]
+
+	### bnd
+	bnd call	foo
+	bnd call	rax
+	bnd call	r11
+	bnd je	foo
+	bnd jmp	foo
+	bnd jmp	rcx
+	bnd jmp	r12
+	bnd ret
+
+foo:	bnd ret
diff --git a/gas/testsuite/gas/i386/x86-64-nops.d b/gas/testsuite/gas/i386/x86-64-nops.d
index 72bde05..da87676 100644
--- a/gas/testsuite/gas/i386/x86-64-nops.d
+++ b/gas/testsuite/gas/i386/x86-64-nops.d
@@ -22,29 +22,21 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 1e ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1f ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 19 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1a 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1b 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1c 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1d 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1e 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 1f 5a 22          	nopl   0x22\(%rdx\)
 [ 	]*[a-f0-9]+:	0f 19 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1a 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1b 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1c 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1d 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1e 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 1f 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
 [ 	]*[a-f0-9]+:	0f 19 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1a 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1b 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1c 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1d 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1e 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 1f 04 60          	nopl   \(%rax,%riz,2\)
 [ 	]*[a-f0-9]+:	0f 19 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1a 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1b 04 59          	nopl   \(%rcx,%rbx,2\)
 [ 	]*[a-f0-9]+:	0f 1c 04 59          	nopl   \(%rcx,%rbx,2\)
 [ 	]*[a-f0-9]+:	0f 1d 04 59          	nopl   \(%rcx,%rbx,2\)
 [ 	]*[a-f0-9]+:	0f 1e 04 59          	nopl   \(%rcx,%rbx,2\)
diff --git a/gas/testsuite/gas/i386/x86-64-nops.s b/gas/testsuite/gas/i386/x86-64-nops.s
index 961f3d4..1e04891 100644
--- a/gas/testsuite/gas/i386/x86-64-nops.s
+++ b/gas/testsuite/gas/i386/x86-64-nops.s
@@ -20,8 +20,6 @@
 
 	# with base and imm8
 	.byte 0x0f, 0x19, 0x5A, 0x22
-	.byte 0x0f, 0x1a, 0x5A, 0x22
-	.byte 0x0f, 0x1b, 0x5A, 0x22
 	.byte 0x0f, 0x1c, 0x5A, 0x22
 	.byte 0x0f, 0x1d, 0x5A, 0x22
 	.byte 0x0f, 0x1e, 0x5A, 0x22
@@ -29,24 +27,18 @@
 
 	# with sib and imm32
 	.byte 0x0f, 0x19, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1a, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1b, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1c, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1d, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1e, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 	.byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
 
 	.byte 0x0f, 0x19, 0x04, 0x60
-	.byte 0x0f, 0x1a, 0x04, 0x60
-	.byte 0x0f, 0x1b, 0x04, 0x60
 	.byte 0x0f, 0x1c, 0x04, 0x60
 	.byte 0x0f, 0x1d, 0x04, 0x60
 	.byte 0x0f, 0x1e, 0x04, 0x60
 	.byte 0x0f, 0x1f, 0x04, 0x60
 
 	.byte 0x0f, 0x19, 0x04, 0x59
-	.byte 0x0f, 0x1a, 0x04, 0x59
-	.byte 0x0f, 0x1b, 0x04, 0x59
 	.byte 0x0f, 0x1c, 0x04, 0x59
 	.byte 0x0f, 0x1d, 0x04, 0x59
 	.byte 0x0f, 0x1e, 0x04, 0x59