include/opcode/

        * mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
        Update comment before MIPS16 field descriptors to mention MIPS16.
        (OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
        BBIT.
        (OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
        New bit masks and shift counts for cins and exts.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptors
        +x, +X, +p, +P, +s, +S.
        (mips_ip): Likewise.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
        +s, +S.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
        baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
        syncw, syncws, vm3mulu, vm0 and vmulu.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
        bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
        syncws, vm3mulu, vm0 and vmulu.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
        * gas/mips/mips.exp: Run it.  Run octeon test with
        run_dump_test_arches.

8 files changed, 268 insertions, 3 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1e241ee..d16f283 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* config/tc-mips.c (validate_mips_insn): Handle field descriptors
+	+x, +X, +p, +P, +s, +S.
+	(mips_ip): Likewise.
+
 2008-06-09  Eric B. Weddington  <eric.weddington@atmel.com>
 
 	* config/tc-avr.c (mcu_types): Remove support for ATmega32HVB device.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 484f5b4..f5ed52b 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -8268,6 +8268,13 @@ validate_mips_insn (const struct mips_opcode *opc)
 	  case 't': USE_BITS (OP_MASK_RT,	OP_SH_RT);	break;
 	  case 'T': USE_BITS (OP_MASK_RT,	OP_SH_RT);
 		    USE_BITS (OP_MASK_SEL,	OP_SH_SEL);	break;
+	  case 'x': USE_BITS (OP_MASK_BBITIND,	OP_SH_BBITIND);	break;
+	  case 'X': USE_BITS (OP_MASK_BBITIND,	OP_SH_BBITIND);	break;
+	  case 'p': USE_BITS (OP_MASK_CINSPOS,	OP_SH_CINSPOS);	break;
+	  case 'P': USE_BITS (OP_MASK_CINSPOS,	OP_SH_CINSPOS);	break;
+	  case 's': USE_BITS (OP_MASK_CINSLM1,	OP_SH_CINSLM1);	break;
+	  case 'S': USE_BITS (OP_MASK_CINSLM1,	OP_SH_CINSLM1);	break;
+
 	  default:
 	    as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"),
 		    c, opc->name, opc->args);
@@ -8967,6 +8974,100 @@ do_msbd:
 		    as_bad (_("Invalid coprocessor 0 register number"));
 		  break;
 
+		case 'x':
+		  /* bbit[01] and bbit[01]32 bit index.  Give error if index
+		     is not in the valid range.  */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  if ((unsigned) imm_expr.X_add_number > 31)
+		    {
+		      as_bad (_("Improper bit index (%lu)"),
+			      (unsigned long) imm_expr.X_add_number);
+		      imm_expr.X_add_number = 0;
+		    }
+		  INSERT_OPERAND (BBITIND, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'X':
+		  /* bbit[01] bit index when bbit is used but we generate
+		     bbit[01]32 because the index is over 32.  Move to the
+		     next candidate if index is not in the valid range.  */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  if ((unsigned) imm_expr.X_add_number < 32
+		      || (unsigned) imm_expr.X_add_number > 63)
+		    break;
+		  INSERT_OPERAND (BBITIND, *ip, imm_expr.X_add_number - 32);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'p':
+		  /* cins, cins32, exts and exts32 position field.  Give error
+		     if it's not in the valid range.  */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  if ((unsigned) imm_expr.X_add_number > 31)
+		    {
+		      as_bad (_("Improper position (%lu)"),
+			      (unsigned long) imm_expr.X_add_number);
+		      imm_expr.X_add_number = 0;
+		    }
+		  /* Make the pos explicit to simplify +S.  */
+		  lastpos = imm_expr.X_add_number + 32;
+		  INSERT_OPERAND (CINSPOS, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'P':
+		  /* cins, cins32, exts and exts32 position field.  Move to
+		     the next candidate if it's not in the valid range.  */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  if ((unsigned) imm_expr.X_add_number < 32
+		      || (unsigned) imm_expr.X_add_number > 63)
+		    break;
+ 		  lastpos = imm_expr.X_add_number;
+		  INSERT_OPERAND (CINSPOS, *ip, imm_expr.X_add_number - 32);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 's':
+		  /* cins and exts length-minus-one field.  */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  if ((unsigned long) imm_expr.X_add_number > 31)
+		    {
+		      as_bad (_("Improper size (%lu)"),
+			      (unsigned long) imm_expr.X_add_number);
+		      imm_expr.X_add_number = 0;
+		    }
+		  INSERT_OPERAND (CINSLM1, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
+		case 'S':
+		  /* cins32/exts32 and cins/exts aliasing cint32/exts32
+		     length-minus-one field.  */
+		  my_getExpression (&imm_expr, s);
+		  check_absolute_expr (ip, &imm_expr);
+		  if ((long) imm_expr.X_add_number < 0
+		      || (unsigned long) imm_expr.X_add_number + lastpos > 63)
+		    {
+		      as_bad (_("Improper size (%lu)"),
+			      (unsigned long) imm_expr.X_add_number);
+		      imm_expr.X_add_number = 0;
+		    }
+		  INSERT_OPERAND (CINSLM1, *ip, imm_expr.X_add_number);
+		  imm_expr.X_op = O_absent;
+		  s = expr_end;
+		  continue;
+
 		default:
 		  as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"),
 		    *args, insn->name, insn->args);
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index e5738e0..234bbc2 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
+
+	* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
+	bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
+	syncws, vm3mulu, vm0 and vmulu.
+	* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
+	* gas/mips/mips.exp: Run it.  Run octeon test with
+	run_dump_test_arches.
+
 2008-06-03  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/i386.exp: Run sse-check-none and
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 29cff0c..c960bf2 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -776,7 +776,9 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "loongson-2e"
     run_dump_test "loongson-2f"
 
-    run_dump_test "octeon"
+    run_dump_test_arches "octeon"	[mips_arch_list_matching octeon]
+    run_list_test_arches "octeon-ill" "" \
+					[mips_arch_list_matching octeon]
 
     run_dump_test "smartmips"
     run_dump_test "mips32-dsp"
diff --git a/gas/testsuite/gas/mips/octeon-ill.l b/gas/testsuite/gas/mips/octeon-ill.l
new file mode 100644
index 0000000..9fcfb94
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon-ill.l
@@ -0,0 +1,15 @@
+.*: Assembler messages:
+.*:5: Error: Improper bit index \(51\)
+.*:7: Error: Improper bit index \(71\)
+.*:10: Error: Improper bit index \(49\)
+.*:12: Error: Improper bit index \(74\)
+.*:15: Error: Improper size \(37\)
+.*:17: Error: Improper position \(39\)
+.*:18: Error: Improper size \(25\)
+.*:20: Error: Improper position \(64\)
+.*:21: Error: Improper size \(14\)
+.*:23: Error: Improper size \(32\)
+.*:25: Error: Improper position \(32\)
+.*:26: Error: Improper size \(29\)
+.*:28: Error: Improper position \(70\)
+.*:29: Error: Improper size \(25\)
diff --git a/gas/testsuite/gas/mips/octeon-ill.s b/gas/testsuite/gas/mips/octeon-ill.s
new file mode 100644
index 0000000..0f3013d
--- /dev/null
+++ b/gas/testsuite/gas/mips/octeon-ill.s
@@ -0,0 +1,29 @@
+	.text
+	.set noreorder
+
+foo:
+        bbit032 $23,51,foo
+        nop
+        bbit0   $23,71,foo
+        nop
+
+        bbit132 $23,49,foo
+        nop
+        bbit1   $23,74,foo
+        nop
+
+        cins    $2,0,37
+
+        cins32  $19,$31,39,12
+        cins32  $17,$20,7,25
+
+        cins    $24,$10,64,8
+        cins    $21,$30,50,14
+
+        exts    $26,26,32
+
+        exts32  $7,$21,32,10
+        exts32  $31,$13,3,29
+
+        exts    $14,$29,70,14
+        exts    $20,$16,39,25
diff --git a/gas/testsuite/gas/mips/octeon.d b/gas/testsuite/gas/mips/octeon.d
index 130cff2..0cedad8 100644
--- a/gas/testsuite/gas/mips/octeon.d
+++ b/gas/testsuite/gas/mips/octeon.d
@@ -6,6 +6,53 @@
 
 Disassembly of section .text:
 
-[0-9a-f]+ <sync_insns>:
+[0-9a-f]+ <foo>:
+.*:	72538828 	baddu	\$17,\$18,\$19
+.*:	70431028 	baddu	\$2,\$2,\$3
+.*:	ca76fffd 	bbit0	\$19,0x16,[0-9a-f]+ <foo>
+.*:	00000000 	nop
+.*:	dbcbfffb 	bbit032	\$30,0xb,[0-9a-f]+ <foo>
+.*:	00000000 	nop
+.*:	d90afff9 	bbit032	\$8,0xa,[0-9a-f]+ <foo>
+.*:	00000000 	nop
+.*:	e87ffff7 	bbit1	\$3,0x1f,[0-9a-f]+ <foo>
+.*:	00000000 	nop
+.*:	fb0afff5 	bbit132	\$24,0xa,[0-9a-f]+ <foo>
+.*:	00000000 	nop
+.*:	f9cefff3 	bbit132	\$14,0xe,[0-9a-f]+ <foo>
+.*:	00000000 	nop
+.*:	715915b2 	cins	\$25,\$10,0x16,0x2
+.*:	7129ec72 	cins	\$9,\$9,0x11,0x1d
+.*:	704f44b3 	cins32	\$15,\$2,0x12,0x8
+.*:	72d6b273 	cins32	\$22,\$22,0x9,0x16
+.*:	73f8f833 	cins32	\$24,\$31,0x0,0x1f
+.*:	71ef2973 	cins32	\$15,\$15,0x5,0x5
+.*:	731c9803 	dmul	\$19,\$24,\$28
+.*:	72b9a803 	dmul	\$21,\$21,\$25
+.*:	7260402c 	pop	\$8,\$19
+.*:	7040102c 	pop	\$2,\$2
+.*:	72c0782d 	dpop	\$15,\$22
+.*:	7180602d 	dpop	\$12,\$12
+.*:	73847efa 	exts	\$4,\$28,0x1b,0xf
+.*:	71ef347a 	exts	\$15,\$15,0x11,0x6
+.*:	71a442bb 	exts32	\$4,\$13,0xa,0x8
+.*:	71efa2fb 	exts32	\$15,\$15,0xb,0x14
+.*:	70874dbb 	exts32	\$7,\$4,0x16,0x9
+.*:	7339c97b 	exts32	\$25,\$25,0x5,0x19
+.*:	73400008 	mtm0	\$26
+.*:	7260000c 	mtm1	\$19
+.*:	7240000d 	mtm2	\$18
+.*:	72000009 	mtp0	\$16
+.*:	7320000a 	mtp1	\$25
+.*:	7120000b 	mtp2	\$9
 .*:	0000008f 	synciobdma
+.*:	0000018f 	syncs
+.*:	0000010f 	syncw
+.*:	0000014f 	syncws
+.*:	7155a811 	v3mulu	\$21,\$10,\$21
+.*:	728aa011 	v3mulu	\$20,\$20,\$10
+.*:	72701810 	vmm0	\$3,\$19,\$16
+.*:	73e9f810 	vmm0	\$31,\$31,\$9
+.*:	7151e80f 	vmulu	\$29,\$10,\$17
+.*:	7366d80f 	vmulu	\$27,\$27,\$6
 #pass
diff --git a/gas/testsuite/gas/mips/octeon.s b/gas/testsuite/gas/mips/octeon.s
index 20c584a..45154dc 100644
--- a/gas/testsuite/gas/mips/octeon.s
+++ b/gas/testsuite/gas/mips/octeon.s
@@ -1,6 +1,62 @@
 	.text
 	.set noreorder
 
-sync_insns:
+foo:
+        baddu   $17,$18,$19
+        baddu   $2,$3
+
+        bbit0   $19,22,foo
+        nop
+        bbit032 $30,11,foo
+        nop
+        bbit0   $8,42,foo
+        nop
+
+        bbit1   $3,31,foo
+        nop
+        bbit132 $24,10,foo
+        nop
+        bbit1   $14,46,foo
+        nop
+
+        cins    $25,$10,22,2
+        cins    $9,17,29
+        cins32  $15,$2,18,8
+        cins32  $22,9,22
+        cins    $24,$31,32,31
+        cins    $15,37,5
+
+        dmul    $19,$24,$28
+        dmul    $21,$25
+
+        pop     $8,$19
+        pop     $2
+        dpop    $15,$22
+        dpop    $12
+
+        exts    $4,$28,27,15
+        exts    $15,17,6
+        exts32  $4,$13,10,8
+        exts32  $15,11,20
+        exts    $7,$4,54,9
+        exts    $25,37,25
+
+        mtm0    $26
+        mtm1    $19
+        mtm2    $18
+
+        mtp0    $16
+        mtp1    $25
+        mtp2    $9
+
 	synciobdma
+        syncs
+        syncw
+        syncws
 
+        v3mulu  $21,$10,$21
+        v3mulu  $20,$10
+        vmm0    $3,$19,$16
+        vmm0    $31,$9
+        vmulu   $29,$10,$17
+        vmulu   $27,$6