* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.

    (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
    (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
    and elfxx-tilegx.lo.
    (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
    elfxx-tilegx.c.
    (BFD64_BACKENDS): Add elf64-tilegx.lo.
    (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
    * Makefile.in: Regenerate.
    * arctures.c (bfd_architecture): Define bfd_arch_tilepro,
    bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
    (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
    (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
    bfd-in2.h: Regenerate.
    * config.bfd: Handle tilegx-*-* and tilepro-*-*.
    * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * configure: Regenerate.
    * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
    TILEPRO_ELF_DATA.
    * libbfd.h: Regenerate.
    * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
    RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
    IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
    IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
    IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
    IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
    IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
    IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
    IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
    IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
    MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
    IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
    IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
    IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
    IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
    IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
    IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
    HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
    JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
    DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
    SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
    IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
    IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
    IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
    IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
    IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
    IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
    IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
    IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
    IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
    IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
    IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
    IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
    IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
    IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
    IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
    IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
    IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
    IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
    IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
    IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
    IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
    IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
    IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
    IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
    IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
    IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
    IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
    TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
    * targets.c (bfd_elf32_tilegx_vec): Declare.
    (bfd_elf32_tilepro_vec): Declare.
    (bfd_elf64_tilegx_vec): Declare.
    (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
    and bfd_elf64_tilegx_vec.
    * cpu-tilegx.c: New file.
    * cpu-tilepro.c: New file.
    * elf32-tilepro.h: New file.
    * elf32-tilepro.c: New file.
    * elf32-tilegx.c: New file.
    * elf32-tilegx.h: New file.
    * elf64-tilegx.c: New file.
    * elf64-tilegx.h: New file.
    * elfxx-tilegx.c: New file.
    * elfxx-tilegx.h: New file.

	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
	config/tc-tilepro.c.
	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
	config/tc-tilepro.h.
	* Makefile.in: Regenerate.
	* configure.tgt (tilepro-*-*): New.
	(tilegx-*-*): Likewise.
	* config/tc-tilegx.c: New file.
	* config/tc-tilegx.h: Likewise.
	* config/tc-tilepro.h: Likewise.
	* config/tc-tilepro.c: Likewise.
	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
	c-tilepro.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TILEGX): Define.
	(TILEPRO): Define.
	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
	c-tilegx.texi and c-tilepro.texi.
	* doc/c-tilegx.texi: New.
	* doc/c-tilepro.texi: New.

        * gas/tilepro/t_constants.s: New file.
	* gas/tilepro/t_constants.d: Likewise.
	* gas/tilepro/t_insns.s: Likewise.
	* gas/tilepro/tilepro.exp: Likewise.
	* gas/tilepro/t_insns.d: Likewise.
	* gas/tilegx/tilegx.exp: Likewise.
	* gas/tilegx/t_insns.d: Likewise.
	* gas/tilegx/t_insns.s: Likewise.

	* dis-asm.h (print_insn_tilegx): Declare.
	(print_insn_tilepro): Likewise.

	* tilegx.h: New file.
	* tilepro.h: New file.

	* common.h: Add EM_TILEGX.
	* tilegx.h: New file.
	* tilepro.h: New file.

	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
	eelf32tilepro.c.
	(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
	(eelf32tilegx.c): New target.
	(eelf32tilepro.c): Likewise.
	(eelf64tilegx.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
	* emulparams/elf32tilegx.sh: New file.
	* emulparams/elf64tilegx.sh: New file.
	* emulparams/elf32tilepro.sh: New file.

	* ld-elf/eh5.d: Don't run on tile*.
	* ld-srec/srec.exp: xfail on tile*.
	* ld-tilegx/external.s: New file.
	* ld-tilegx/reloc.d: New file.
	* ld-tilegx/reloc.s: New file.
	* ld-tilegx/tilegx.exp: New file.
	* ld-tilepro/external.s: New file.
	* ld-tilepro/reloc.d: New file.
	* ld-tilepro/reloc.s: New file.
	* ld-tilepro/tilepro.exp: New file.

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
	tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
	* po/POTFILES.in: Regenerate.
	* tilegx-dis.c: New file.
	* tilegx-opc.c: New file.
	* tilepro-dis.c: New file.
	* tilepro-opc.c: New file.

23 files changed, 42624 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 90c585f..3399fc0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,26 @@
+2011-06-13  Walter Lee  <walt@tilera.com>
+
+	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
+	config/tc-tilepro.c.
+	(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
+	config/tc-tilepro.h.
+	* Makefile.in: Regenerate.
+	* configure.tgt (tilepro-*-*): New.
+	(tilegx-*-*): Likewise.
+	* config/tc-tilegx.c: New file.
+	* config/tc-tilegx.h: Likewise.
+	* config/tc-tilepro.h: Likewise.
+	* config/tc-tilepro.c: Likewise.
+	* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
+	c-tilepro.texi.
+	* doc/Makefile.in: Regenerate.
+	* doc/all.texi (TILEGX): Define.
+	(TILEPRO): Define.
+	* doc/as.texinfo: Add Tile-Gx and TILEPro documentation.  Include
+	c-tilegx.texi and c-tilepro.texi.
+	* doc/c-tilegx.texi: New.
+	* doc/c-tilepro.texi: New.
+
 2011-06-13  Nick Clifton  <nickc@redhat.com>
 
 	PR gas/12854
diff --git a/gas/Makefile.am b/gas/Makefile.am
index 7b897f3..8074903 100644
--- a/gas/Makefile.am
+++ b/gas/Makefile.am
@@ -161,6 +161,8 @@ TARGET_CPU_CFILES = \
 	config/tc-tic4x.c \
 	config/tc-tic54x.c \
 	config/tc-tic6x.c \
+	config/tc-tilegx.c \
+	config/tc-tilepro.c \
 	config/tc-vax.c \
 	config/tc-v850.c \
 	config/tc-xstormy16.c \
@@ -224,6 +226,8 @@ TARGET_CPU_HFILES = \
 	config/tc-tic4x.h \
 	config/tc-tic54x.h \
 	config/tc-tic6x.h \
+	config/tc-tilegx.h \
+	config/tc-tilepro.h \
 	config/tc-vax.h \
 	config/tc-v850.h \
 	config/tc-xstormy16.h \
diff --git a/gas/Makefile.in b/gas/Makefile.in
index 1aa9bb4..ddd42d7 100644
--- a/gas/Makefile.in
+++ b/gas/Makefile.in
@@ -428,6 +428,8 @@ TARGET_CPU_CFILES = \
 	config/tc-tic4x.c \
 	config/tc-tic54x.c \
 	config/tc-tic6x.c \
+	config/tc-tilegx.c \
+	config/tc-tilepro.c \
 	config/tc-vax.c \
 	config/tc-v850.c \
 	config/tc-xstormy16.c \
@@ -491,6 +493,8 @@ TARGET_CPU_HFILES = \
 	config/tc-tic4x.h \
 	config/tc-tic54x.h \
 	config/tc-tic6x.h \
+	config/tc-tilegx.h \
+	config/tc-tilepro.h \
 	config/tc-vax.h \
 	config/tc-v850.h \
 	config/tc-xstormy16.h \
@@ -835,6 +839,8 @@ distclean-compile:
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic4x.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic54x.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tic6x.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tilegx.Po@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-tilepro.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-v850.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-vax.Po@am__quote@
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-xc16x.Po@am__quote@
@@ -1623,6 +1629,34 @@ tc-tic6x.obj: config/tc-tic6x.c
 @AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
 @am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tic6x.obj `if test -f 'config/tc-tic6x.c'; then $(CYGPATH_W) 'config/tc-tic6x.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tic6x.c'; fi`
 
+tc-tilegx.o: config/tc-tilegx.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilegx.o -MD -MP -MF $(DEPDIR)/tc-tilegx.Tpo -c -o tc-tilegx.o `test -f 'config/tc-tilegx.c' || echo '$(srcdir)/'`config/tc-tilegx.c
+@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-tilegx.Tpo $(DEPDIR)/tc-tilegx.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-tilegx.c' object='tc-tilegx.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilegx.o `test -f 'config/tc-tilegx.c' || echo '$(srcdir)/'`config/tc-tilegx.c
+
+tc-tilegx.obj: config/tc-tilegx.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilegx.obj -MD -MP -MF $(DEPDIR)/tc-tilegx.Tpo -c -o tc-tilegx.obj `if test -f 'config/tc-tilegx.c'; then $(CYGPATH_W) 'config/tc-tilegx.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilegx.c'; fi`
+@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-tilegx.Tpo $(DEPDIR)/tc-tilegx.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-tilegx.c' object='tc-tilegx.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilegx.obj `if test -f 'config/tc-tilegx.c'; then $(CYGPATH_W) 'config/tc-tilegx.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilegx.c'; fi`
+
+tc-tilepro.o: config/tc-tilepro.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilepro.o -MD -MP -MF $(DEPDIR)/tc-tilepro.Tpo -c -o tc-tilepro.o `test -f 'config/tc-tilepro.c' || echo '$(srcdir)/'`config/tc-tilepro.c
+@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-tilepro.Tpo $(DEPDIR)/tc-tilepro.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-tilepro.c' object='tc-tilepro.o' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilepro.o `test -f 'config/tc-tilepro.c' || echo '$(srcdir)/'`config/tc-tilepro.c
+
+tc-tilepro.obj: config/tc-tilepro.c
+@am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-tilepro.obj -MD -MP -MF $(DEPDIR)/tc-tilepro.Tpo -c -o tc-tilepro.obj `if test -f 'config/tc-tilepro.c'; then $(CYGPATH_W) 'config/tc-tilepro.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilepro.c'; fi`
+@am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-tilepro.Tpo $(DEPDIR)/tc-tilepro.Po
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	source='config/tc-tilepro.c' object='tc-tilepro.obj' libtool=no @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@	DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-tilepro.obj `if test -f 'config/tc-tilepro.c'; then $(CYGPATH_W) 'config/tc-tilepro.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-tilepro.c'; fi`
+
 tc-vax.o: config/tc-vax.c
 @am__fastdepCC_TRUE@	$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-vax.o -MD -MP -MF $(DEPDIR)/tc-vax.Tpo -c -o tc-vax.o `test -f 'config/tc-vax.c' || echo '$(srcdir)/'`config/tc-vax.c
 @am__fastdepCC_TRUE@	$(am__mv) $(DEPDIR)/tc-vax.Tpo $(DEPDIR)/tc-vax.Po
diff --git a/gas/config/tc-tilegx.c b/gas/config/tc-tilegx.c
new file mode 100644
index 0000000..2f4d79c
--- /dev/null
+++ b/gas/config/tc-tilegx.c
@@ -0,0 +1,1844 @@
+/* tc-tilegx.c -- Assemble for a Tile-Gx chip.
+   Copyright 2011 Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "as.h"
+#include "struc-symbol.h"
+#include "subsegs.h"
+
+#include "elf/tilegx.h"
+#include "opcode/tilegx.h"
+
+#include "dwarf2dbg.h"
+#include "dw2gencfi.h"
+
+#include "safe-ctype.h"
+
+
+/* Special registers.  */
+#define TREG_IDN0     57
+#define TREG_IDN1     58
+#define TREG_UDN0     59
+#define TREG_UDN1     60
+#define TREG_UDN2     61
+#define TREG_UDN3     62
+#define TREG_ZERO     63
+
+
+/* Generic assembler global variables which must be defined by all
+   targets.  */
+
+/* The dwarf2 data alignment, adjusted for 32 or 64 bit.  */
+int tilegx_cie_data_alignment;
+
+/* Characters which always start a comment.  */
+const char comment_chars[] = "#";
+
+/* Characters which start a comment at the beginning of a line.  */
+const char line_comment_chars[] = "#";
+
+/* Characters which may be used to separate multiple commands on a
+   single line.  */
+const char line_separator_chars[] = ";";
+
+/* Characters which are used to indicate an exponent in a floating
+   point number.  */
+const char EXP_CHARS[] = "eE";
+
+/* Characters which mean that a number is a floating point constant,
+   as in 0d1.0.  */
+const char FLT_CHARS[] = "rRsSfFdDxXpP";
+
+/* Either 32 or 64.  */
+static int tilegx_arch_size = 64;
+
+
+const char *
+tilegx_target_format (void)
+{
+  return tilegx_arch_size == 64 ? "elf64-tilegx" : "elf32-tilegx";
+}
+
+
+#define OPTION_32 (OPTION_MD_BASE + 0)
+#define OPTION_64 (OPTION_MD_BASE + 1)
+
+const char *md_shortopts = "VQ:";
+
+struct option md_longopts[] =
+{
+  {"32", no_argument, NULL, OPTION_32},
+  {"64", no_argument, NULL, OPTION_64},
+  {NULL, no_argument, NULL, 0}
+};
+
+size_t md_longopts_size = sizeof (md_longopts);
+
+int
+md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
+{
+  switch (c)
+    {
+      /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
+	 should be emitted or not.  FIXME: Not implemented.  */
+    case 'Q':
+      break;
+
+      /* -V: SVR4 argument to print version ID.  */
+    case 'V':
+      print_version_id ();
+      break;
+
+    case OPTION_32:
+      tilegx_arch_size = 32;
+      break;
+
+    case OPTION_64:
+      tilegx_arch_size = 64;
+      break;
+
+    default:
+      return 0;
+    }
+
+  return 1;
+}
+
+void
+md_show_usage (FILE *stream)
+{
+  fprintf (stream, _("\
+  -Q                      ignored\n\
+  -V                      print assembler version number\n\
+  --32/--64               generate 32bit/64bit code\n"));
+}
+
+
+/* Extra expression types.  */
+
+#define O_hw0			O_md1
+#define O_hw1			O_md2
+#define O_hw2			O_md3
+#define O_hw3			O_md4
+#define O_hw0_last		O_md5
+#define O_hw1_last		O_md6
+#define O_hw2_last		O_md7
+#define O_hw0_got		O_md8
+#define O_hw1_got		O_md9
+#define O_hw2_got		O_md10
+#define O_hw3_got		O_md11
+#define O_hw0_last_got		O_md12
+#define O_hw1_last_got		O_md13
+#define O_hw2_last_got		O_md14
+#define O_plt		   	O_md15
+#define O_hw0_tls_gd		O_md16
+#define O_hw1_tls_gd		O_md17
+#define O_hw2_tls_gd		O_md18
+#define O_hw3_tls_gd		O_md19
+#define O_hw0_last_tls_gd	O_md20
+#define O_hw1_last_tls_gd	O_md21
+#define O_hw2_last_tls_gd	O_md22
+#define O_hw0_tls_ie		O_md23
+#define O_hw1_tls_ie		O_md24
+#define O_hw2_tls_ie		O_md25
+#define O_hw3_tls_ie		O_md26
+#define O_hw0_last_tls_ie	O_md27
+#define O_hw1_last_tls_ie	O_md28
+#define O_hw2_last_tls_ie	O_md29
+
+static struct hash_control *special_operator_hash;
+
+/* Hash tables for instruction mnemonic lookup.  */
+static struct hash_control *op_hash;
+
+/* Hash table for spr lookup.  */
+static struct hash_control *spr_hash;
+
+/* True temporarily while parsing an SPR expression. This changes the
+ * namespace to include SPR names.  */
+static int parsing_spr;
+
+/* Are we currently inside `{ ... }'?  */
+static int inside_bundle;
+
+struct tilegx_instruction
+{
+  const struct tilegx_opcode *opcode;
+  tilegx_pipeline pipe;
+  expressionS operand_values[TILEGX_MAX_OPERANDS];
+};
+
+/* This keeps track of the current bundle being built up.  */
+static struct tilegx_instruction current_bundle[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
+
+/* Index in current_bundle for the next instruction to parse.  */
+static int current_bundle_index;
+
+/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
+   'zero' is not a real register, so using it accidentally would be a
+   nasty bug. For other registers, such as 'sp', code using multiple names
+   for the same physical register is excessively confusing.
+
+   The '.require_canonical_reg_names' pseudo-op turns this error on,
+   and the '.no_require_canonical_reg_names' pseudo-op turns this off.
+   By default the error is on.  */
+static int require_canonical_reg_names;
+
+/* Allow bundles that do undefined or suspicious things like write
+   two different values to the same register at the same time.
+
+   The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
+   and the '.allow_suspicious_bundles' pseudo-op turns this off.  */
+static int allow_suspicious_bundles;
+
+
+/* A hash table of main processor registers, mapping each register name
+   to its index.
+
+   Furthermore, if the register number is greater than the number
+   of registers for that processor, the user used an illegal alias
+   for that register (e.g. r63 instead of zero), so we should generate
+   a warning. The attempted register number can be found by clearing
+   NONCANONICAL_REG_NAME_FLAG.  */
+static struct hash_control *main_reg_hash;
+
+
+/* We cannot unambiguously store a 0 in a hash table and look it up,
+   so we OR in this flag to every canonical register.  */
+#define CANONICAL_REG_NAME_FLAG    0x1000
+
+/* By default we disallow register aliases like r63, but we record
+   them in the hash table in case the .no_require_canonical_reg_names
+   directive is used. Noncanonical names have this value added to them.  */
+#define NONCANONICAL_REG_NAME_FLAG 0x2000
+
+/* Discards flags for register hash table entries and returns the
+   reg number.  */
+#define EXTRACT_REGNO(p) ((p) & 63)
+
+/* This function is called once, at assembler startup time.  It should
+   set up all the tables, etc., that the MD part of the assembler will
+   need.  */
+
+void
+md_begin (void)
+{
+  const struct tilegx_opcode *op;
+  int i;
+
+  /* Guarantee text section is aligned.  */
+  bfd_set_section_alignment (stdoutput, text_section,
+                             TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
+
+  require_canonical_reg_names = 1;
+  allow_suspicious_bundles = 0;
+  current_bundle_index = 0;
+  inside_bundle = 0;
+
+  tilegx_cie_data_alignment = (tilegx_arch_size == 64 ? -8 : -4);
+
+  /* Initialize special operator hash table.  */
+  special_operator_hash = hash_new ();
+#define INSERT_SPECIAL_OP(name)					\
+  hash_insert (special_operator_hash, #name, (void *)O_##name)
+
+  INSERT_SPECIAL_OP (hw0);
+  INSERT_SPECIAL_OP (hw1);
+  INSERT_SPECIAL_OP (hw2);
+  INSERT_SPECIAL_OP (hw3);
+  INSERT_SPECIAL_OP (hw0_last);
+  INSERT_SPECIAL_OP (hw1_last);
+  INSERT_SPECIAL_OP (hw2_last);
+  /* hw3_last is a convenience alias for the equivalent hw3.  */
+  hash_insert (special_operator_hash, "hw3_last", (void*)O_hw3);
+  INSERT_SPECIAL_OP (hw0_got);
+  INSERT_SPECIAL_OP (hw1_got);
+  INSERT_SPECIAL_OP (hw2_got);
+  INSERT_SPECIAL_OP (hw3_got);
+  INSERT_SPECIAL_OP (hw0_last_got);
+  INSERT_SPECIAL_OP (hw1_last_got);
+  INSERT_SPECIAL_OP (hw2_last_got);
+  INSERT_SPECIAL_OP(plt);
+  INSERT_SPECIAL_OP (hw0_tls_gd);
+  INSERT_SPECIAL_OP (hw1_tls_gd);
+  INSERT_SPECIAL_OP (hw2_tls_gd);
+  INSERT_SPECIAL_OP (hw3_tls_gd);
+  INSERT_SPECIAL_OP (hw0_last_tls_gd);
+  INSERT_SPECIAL_OP (hw1_last_tls_gd);
+  INSERT_SPECIAL_OP (hw2_last_tls_gd);
+  INSERT_SPECIAL_OP (hw0_tls_ie);
+  INSERT_SPECIAL_OP (hw1_tls_ie);
+  INSERT_SPECIAL_OP (hw2_tls_ie);
+  INSERT_SPECIAL_OP (hw3_tls_ie);
+  INSERT_SPECIAL_OP (hw0_last_tls_ie);
+  INSERT_SPECIAL_OP (hw1_last_tls_ie);
+  INSERT_SPECIAL_OP (hw2_last_tls_ie);
+#undef INSERT_SPECIAL_OP
+
+  /* Initialize op_hash hash table.  */
+  op_hash = hash_new ();
+  for (op = &tilegx_opcodes[0]; op->name != NULL; op++)
+    {
+      const char *hash_err = hash_insert (op_hash, op->name, (void *)op);
+      if (hash_err != NULL)
+	as_fatal (_("Internal Error:  Can't hash %s: %s"), op->name, hash_err);
+    }
+
+  /* Initialize the spr hash table.  */
+  parsing_spr = 0;
+  spr_hash = hash_new ();
+  for (i = 0; i < tilegx_num_sprs; i++)
+    hash_insert (spr_hash, tilegx_sprs[i].name,
+                 (void *) &tilegx_sprs[i]);
+
+  /* Set up the main_reg_hash table. We use this instead of
+     creating a symbol in the register section to avoid ambiguities
+     with labels that have the same names as registers.  */
+  main_reg_hash = hash_new ();
+  for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
+    {
+      char buf[64];
+
+      hash_insert (main_reg_hash, tilegx_register_names[i],
+		   (void *) (long) (i | CANONICAL_REG_NAME_FLAG));
+
+      /* See if we should insert a noncanonical alias, like r63.  */
+      sprintf (buf, "r%d", i);
+      if (strcmp (buf, tilegx_register_names[i]) != 0)
+	hash_insert (main_reg_hash, xstrdup (buf),
+		     (void *) (long) (i | NONCANONICAL_REG_NAME_FLAG));
+    }
+}
+
+#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
+  ((p0) | ((p1) << 8) | ((p2) << 16))
+#define BUNDLE_TEMPLATE(p0, p1, p2) \
+  { { (p0), (p1), (p2) }, \
+     BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
+  }
+
+#define NO_PIPELINE TILEGX_NUM_PIPELINE_ENCODINGS
+
+struct bundle_template
+{
+  tilegx_pipeline pipe[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
+  unsigned int pipe_mask;
+};
+
+static const struct bundle_template bundle_templates[] =
+{
+  /* In Y format we must always have something in Y2, since it has
+     no fnop, so this conveys that Y2 must always be used.  */
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0, TILEGX_PIPELINE_Y2, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1, TILEGX_PIPELINE_Y2, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y0, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y1, NO_PIPELINE),
+
+  /* Y format has three instructions.  */
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0),
+
+  /* X format has only two instructions.  */
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_X0, TILEGX_PIPELINE_X1, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEGX_PIPELINE_X1, TILEGX_PIPELINE_X0, NO_PIPELINE)
+};
+
+
+static void
+prepend_nop_to_bundle (tilegx_mnemonic mnemonic)
+{
+  memmove (&current_bundle[1], &current_bundle[0],
+	   current_bundle_index * sizeof current_bundle[0]);
+  current_bundle[0].opcode = &tilegx_opcodes[mnemonic];
+  ++current_bundle_index;
+}
+
+static tilegx_bundle_bits
+insert_operand (tilegx_bundle_bits bits,
+                const struct tilegx_operand *operand,
+                int operand_value,
+                char *file,
+                unsigned lineno)
+{
+  /* Range-check the immediate.  */
+  int num_bits = operand->num_bits;
+
+  operand_value >>= operand->rightshift;
+
+  if (bfd_check_overflow (operand->is_signed
+                          ? complain_overflow_signed
+                          : complain_overflow_unsigned,
+                          num_bits,
+                          0,
+                          bfd_arch_bits_per_address (stdoutput),
+                          operand_value)
+      != bfd_reloc_ok)
+    {
+      offsetT min, max;
+      if (operand->is_signed)
+	{
+	  min = -(1 << (num_bits - 1));
+	  max = (1 << (num_bits - 1)) - 1;
+	}
+      else
+	{
+	  min = 0;
+	  max = (1 << num_bits) - 1;
+	}
+      as_bad_value_out_of_range (_("operand"), operand_value, min, max,
+				 file, lineno);
+    }
+
+  /* Write out the bits for the immediate.  */
+  return bits | operand->insert (operand_value);
+}
+
+
+static int
+apply_special_operator (operatorT op, offsetT num, char *file, unsigned lineno)
+{
+  int ret;
+  int check_shift = -1;
+
+  switch (op)
+    {
+    case O_hw0_last_tls_gd:
+    case O_hw0_last_tls_ie:
+    case O_hw0_last:
+      check_shift = 0;
+      /* Fall through.  */
+    case O_hw0_tls_gd:
+    case O_hw0_tls_ie:
+    case O_hw0:
+      ret = (signed short)num;
+      break;
+
+    case O_hw1_last_tls_gd:
+    case O_hw1_last_tls_ie:
+    case O_hw1_last:
+      check_shift = 16;
+      /* Fall through.  */
+    case O_hw1_tls_gd:
+    case O_hw1_tls_ie:
+    case O_hw1:
+      ret = (signed short)(num >> 16);
+      break;
+
+    case O_hw2_last_tls_gd:
+    case O_hw2_last_tls_ie:
+    case O_hw2_last:
+      check_shift = 32;
+      /* Fall through.  */
+    case O_hw2_tls_gd:
+    case O_hw2_tls_ie:
+    case O_hw2:
+      ret = (signed short)(num >> 32);
+      break;
+
+    case O_hw3_tls_gd:
+    case O_hw3_tls_ie:
+    case O_hw3:
+      ret = (signed short)(num >> 48);
+      break;
+
+    default:
+      abort ();
+      break;
+    }
+
+  if (check_shift >= 0 && ret != (num >> check_shift))
+    {
+      as_bad_value_out_of_range (_("operand"), num,
+                                 ~0ULL << (check_shift + 16 - 1),
+                                 ~0ULL >> (64 - (check_shift + 16 - 1)),
+                                 file, lineno);
+    }
+
+  return ret;
+}
+
+static tilegx_bundle_bits
+emit_tilegx_instruction (tilegx_bundle_bits bits,
+			 int num_operands,
+			 const unsigned char *operands,
+			 expressionS *operand_values,
+			 char *bundle_start)
+{
+  int i;
+
+  for (i = 0; i < num_operands; i++)
+    {
+      const struct tilegx_operand *operand =
+	&tilegx_operands[operands[i]];
+      expressionS *operand_exp = &operand_values[i];
+      int is_pc_relative = operand->is_pc_relative;
+
+      if (operand_exp->X_op == O_register
+	  || (operand_exp->X_op == O_constant && !is_pc_relative))
+	{
+	  /* We know what the bits are right now, so insert them.  */
+	  bits = insert_operand (bits, operand, operand_exp->X_add_number,
+				 NULL, 0);
+	}
+      else
+	{
+	  bfd_reloc_code_real_type reloc = operand->default_reloc;
+	  expressionS subexp;
+	  int die = 0, use_subexp = 0, require_symbol = 0;
+	  fixS *fixP;
+
+	  /* Take an expression like hw0(x) and turn it into x with
+	     a different reloc type.  */
+	  switch (operand_exp->X_op)
+	    {
+#define HANDLE_OP16(suffix)					\
+	      switch (reloc)					\
+		{                                               \
+		case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:        \
+		  reloc = BFD_RELOC_TILEGX_IMM16_X0_##suffix;   \
+		  break;                                        \
+		case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:        \
+		  reloc = BFD_RELOC_TILEGX_IMM16_X1_##suffix;   \
+		  break;                                        \
+		default:                                        \
+		  die = 1;                                      \
+		  break;                                        \
+		}                                               \
+	      use_subexp = 1
+
+	    case O_hw0:
+	      HANDLE_OP16 (HW0);
+	      break;
+
+	    case O_hw1:
+	      HANDLE_OP16 (HW1);
+	      break;
+
+	    case O_hw2:
+	      HANDLE_OP16 (HW2);
+	      break;
+
+	    case O_hw3:
+	      HANDLE_OP16 (HW3);
+	      break;
+
+	    case O_hw0_last:
+	      HANDLE_OP16 (HW0_LAST);
+	      break;
+
+	    case O_hw1_last:
+	      HANDLE_OP16 (HW1_LAST);
+	      break;
+
+	    case O_hw2_last:
+	      HANDLE_OP16 (HW2_LAST);
+	      break;
+
+	    case O_hw0_got:
+	      HANDLE_OP16 (HW0_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw1_got:
+	      HANDLE_OP16 (HW1_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw2_got:
+	      HANDLE_OP16 (HW2_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw3_got:
+	      HANDLE_OP16 (HW3_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw0_last_got:
+	      HANDLE_OP16 (HW0_LAST_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw1_last_got:
+	      HANDLE_OP16 (HW1_LAST_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw2_last_got:
+	      HANDLE_OP16 (HW2_LAST_GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw0_tls_gd:
+	      HANDLE_OP16 (HW0_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw1_tls_gd:
+	      HANDLE_OP16 (HW1_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw2_tls_gd:
+	      HANDLE_OP16 (HW2_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw3_tls_gd:
+	      HANDLE_OP16 (HW3_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw0_last_tls_gd:
+	      HANDLE_OP16 (HW0_LAST_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw1_last_tls_gd:
+	      HANDLE_OP16 (HW1_LAST_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw2_last_tls_gd:
+	      HANDLE_OP16 (HW2_LAST_TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw0_tls_ie:
+	      HANDLE_OP16 (HW0_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw1_tls_ie:
+	      HANDLE_OP16 (HW1_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw2_tls_ie:
+	      HANDLE_OP16 (HW2_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw3_tls_ie:
+	      HANDLE_OP16 (HW3_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw0_last_tls_ie:
+	      HANDLE_OP16 (HW0_LAST_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw1_last_tls_ie:
+	      HANDLE_OP16 (HW1_LAST_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_hw2_last_tls_ie:
+	      HANDLE_OP16 (HW2_LAST_TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+#undef HANDLE_OP16
+
+	    case O_plt:
+	      switch (reloc)
+		{
+		case BFD_RELOC_TILEGX_JUMPOFF_X1:
+		  reloc = BFD_RELOC_TILEGX_JUMPOFF_X1_PLT;
+		  break;
+		default:
+		  die = 1;
+		  break;
+		}
+	      use_subexp = 1;
+	      require_symbol = 1;
+	      break;
+
+	    default:
+	      /* Do nothing.  */
+	      break;
+	    }
+
+	  if (die)
+	    {
+	      as_bad (_("Invalid operator for operand."));
+	    }
+	  else if (use_subexp)
+	    {
+	      /* Now that we've changed the reloc, change ha16(x) into x,
+		 etc.  */
+
+	      if (operand_exp->X_add_symbol->sy_value.X_md)
+		{
+		  if (require_symbol)
+		    {
+		      as_bad (_("Operator may only be applied to symbols."));
+		    }
+
+		  /* HACK: We used X_md to mark this symbol as a fake wrapper
+		     around a real expression. To unwrap it, we just grab its
+		     value here.  */
+		  operand_exp = &operand_exp->X_add_symbol->sy_value;
+		}
+	      else
+		{
+		  /* The value of this expression is an actual symbol, so
+		     turn that into an expression.  */
+		  memset (&subexp, 0, sizeof subexp);
+		  subexp.X_op = O_symbol;
+		  subexp.X_add_symbol = operand_exp->X_add_symbol;
+		  operand_exp = &subexp;
+		}
+	    }
+
+	  /* Create a fixup to handle this later.  */
+	  fixP = fix_new_exp (frag_now,
+			      bundle_start - frag_now->fr_literal,
+			      (operand->num_bits + 7) >> 3,
+			      operand_exp,
+			      is_pc_relative,
+			      reloc);
+	  fixP->tc_fix_data = operand;
+
+	  /* Don't do overflow checking if we are applying a function like
+	     ha16.  */
+	  fixP->fx_no_overflow |= use_subexp;
+	}
+    }
+  return bits;
+}
+
+
+/* Detects and complains if two instructions in current_bundle write
+   to the same register, either implicitly or explicitly, or if a
+   read-only register is written.  */
+static void
+check_illegal_reg_writes (void)
+{
+  BFD_HOST_U_64_BIT all_regs_written = 0;
+  int j;
+
+  for (j = 0; j < current_bundle_index; j++)
+    {
+      const struct tilegx_instruction *instr = &current_bundle[j];
+      int k;
+      BFD_HOST_U_64_BIT regs =
+	((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
+      BFD_HOST_U_64_BIT conflict;
+
+      for (k = 0; k < instr->opcode->num_operands; k++)
+	{
+	  const struct tilegx_operand *operand =
+	    &tilegx_operands[instr->opcode->operands[instr->pipe][k]];
+
+	  if (operand->is_dest_reg)
+	    {
+	      int regno = instr->operand_values[k].X_add_number;
+	      BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
+
+	      if ((mask & (  (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
+			     | (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
+			     | (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
+			     | (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
+		  && !allow_suspicious_bundles)
+		{
+		  as_bad (_("Writes to register '%s' are not allowed."),
+			  tilegx_register_names[regno]);
+		}
+
+	      regs |= mask;
+	    }
+	}
+
+      /* Writing to the zero register doesn't count.  */
+      regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
+
+      conflict = all_regs_written & regs;
+      if (conflict != 0 && !allow_suspicious_bundles)
+	{
+	  /* Find which register caused the conflict.  */
+	  const char *conflicting_reg_name = "???";
+	  int i;
+
+	  for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
+	    {
+	      if (((conflict >> i) & 1) != 0)
+		{
+		  conflicting_reg_name = tilegx_register_names[i];
+		  break;
+		}
+	    }
+
+	  as_bad (_("Two instructions in the same bundle both write "
+		    "to register %s, which is not allowed."),
+		  conflicting_reg_name);
+	}
+
+      all_regs_written |= regs;
+    }
+}
+
+
+static void
+tilegx_flush_bundle (void)
+{
+  unsigned i;
+  int j;
+  addressT addr_mod;
+  unsigned compatible_pipes;
+  const struct bundle_template *match;
+  char *f;
+
+  inside_bundle = 0;
+
+  switch (current_bundle_index)
+    {
+    case 0:
+      /* No instructions.  */
+      return;
+    case 1:
+      if (current_bundle[0].opcode->can_bundle)
+	{
+	  /* Simplify later logic by adding an explicit fnop.  */
+	  prepend_nop_to_bundle (TILEGX_OPC_FNOP);
+	}
+      else
+	{
+	  /* This instruction cannot be bundled with anything else.
+	     Prepend an explicit 'nop', rather than an 'fnop', because
+	     fnops can be replaced by later binary-processing tools while
+	     nops cannot.  */
+	  prepend_nop_to_bundle (TILEGX_OPC_NOP);
+	}
+      break;
+    default:
+      if (!allow_suspicious_bundles)
+	{
+	  /* Make sure all instructions can be bundled with other
+	     instructions.  */
+	  const struct tilegx_opcode *cannot_bundle = NULL;
+	  bfd_boolean seen_non_nop = FALSE;
+
+	  for (j = 0; j < current_bundle_index; j++)
+	    {
+	      const struct tilegx_opcode *op = current_bundle[j].opcode;
+
+	      if (!op->can_bundle && cannot_bundle == NULL)
+		cannot_bundle = op;
+	      else if (op->mnemonic != TILEGX_OPC_NOP
+		       && op->mnemonic != TILEGX_OPC_INFO
+		       && op->mnemonic != TILEGX_OPC_INFOL)
+		seen_non_nop = TRUE;
+	    }
+
+	  if (cannot_bundle != NULL && seen_non_nop)
+	    {
+	      current_bundle_index = 0;
+	      as_bad (_("'%s' may not be bundled with other instructions."),
+		      cannot_bundle->name);
+	      return;
+	    }
+	}
+      break;
+    }
+
+  compatible_pipes =
+    BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
+                         current_bundle[1].opcode->pipes,
+                         (current_bundle_index == 3
+                          ? current_bundle[2].opcode->pipes
+                          : (1 << NO_PIPELINE)));
+
+  /* Find a template that works, if any.  */
+  match = NULL;
+  for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
+    {
+      const struct bundle_template *b = &bundle_templates[i];
+      if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
+	{
+	  match = b;
+	  break;
+	}
+    }
+
+  if (match == NULL)
+    {
+      current_bundle_index = 0;
+      as_bad (_("Invalid combination of instructions for bundle."));
+      return;
+    }
+
+  /* If the section seems to have no alignment set yet, go ahead and
+     make it large enough to hold code.  */
+  if (bfd_get_section_alignment (stdoutput, now_seg) == 0)
+    bfd_set_section_alignment (stdoutput, now_seg,
+                               TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
+
+  for (j = 0; j < current_bundle_index; j++)
+    current_bundle[j].pipe = match->pipe[j];
+
+  if (current_bundle_index == 2 && !tilegx_is_x_pipeline (match->pipe[0]))
+    {
+      /* We are in Y mode with only two instructions, so add an FNOP.  */
+      prepend_nop_to_bundle (TILEGX_OPC_FNOP);
+
+      /* Figure out what pipe the fnop must be in via arithmetic.
+       * p0 + p1 + p2 must sum to the sum of TILEGX_PIPELINE_Y[012].  */
+      current_bundle[0].pipe =
+	(tilegx_pipeline)((TILEGX_PIPELINE_Y0
+			   + TILEGX_PIPELINE_Y1
+			   + TILEGX_PIPELINE_Y2) -
+			  (current_bundle[1].pipe + current_bundle[2].pipe));
+    }
+
+  check_illegal_reg_writes ();
+
+  f = frag_more (TILEGX_BUNDLE_SIZE_IN_BYTES);
+
+  /* Check to see if this bundle is at an offset that is a multiple of 8-bytes
+     from the start of the frag.  */
+  addr_mod = frag_now_fix () & (TILEGX_BUNDLE_ALIGNMENT_IN_BYTES - 1);
+  if (frag_now->has_code && frag_now->insn_addr != addr_mod)
+    as_bad (_("instruction address is not a multiple of 8"));
+  frag_now->insn_addr = addr_mod;
+  frag_now->has_code = 1;
+
+  tilegx_bundle_bits bits = 0;
+  for (j = 0; j < current_bundle_index; j++)
+    {
+      struct tilegx_instruction *instr = &current_bundle[j];
+      tilegx_pipeline pipeline = instr->pipe;
+      const struct tilegx_opcode *opcode = instr->opcode;
+
+      bits |= emit_tilegx_instruction (opcode->fixed_bit_values[pipeline],
+				       opcode->num_operands,
+				       &opcode->operands[pipeline][0],
+				       instr->operand_values,
+				       f);
+    }
+
+  number_to_chars_littleendian (f, bits, 8);
+  current_bundle_index = 0;
+
+  /* Emit DWARF2 debugging information.  */
+  dwarf2_emit_insn (TILEGX_BUNDLE_SIZE_IN_BYTES);
+}
+
+
+/* Extend the expression parser to handle hw0(label), etc.
+   as well as SPR names when in the context of parsing an SPR.  */
+
+int
+tilegx_parse_name (char *name, expressionS *e, char *nextcharP)
+{
+  operatorT op = O_illegal;
+
+  if (parsing_spr)
+    {
+      void* val = hash_find (spr_hash, name);
+      if (val == NULL)
+	return 0;
+
+      memset (e, 0, sizeof *e);
+      e->X_op = O_constant;
+      e->X_add_number = ((const struct tilegx_spr *)val)->number;
+      return 1;
+    }
+
+  if (*nextcharP != '(')
+    {
+      /* hw0, etc. not followed by a paren is just a label with that name.  */
+      return 0;
+    }
+  else
+    {
+      /* Look up the operator in our table.  */
+      void* val = hash_find (special_operator_hash, name);
+      if (val == 0)
+	return 0;
+      op = (operatorT)(long)val;
+    }
+
+  /* Restore old '(' and skip it.  */
+  *input_line_pointer = '(';
+  ++input_line_pointer;
+
+  expression (e);
+
+  if (*input_line_pointer != ')')
+    {
+      as_bad (_("Missing ')'"));
+      *nextcharP = *input_line_pointer;
+      return 0;
+    }
+  /* Skip ')'.  */
+  ++input_line_pointer;
+
+  if (e->X_op == O_register || e->X_op == O_absent)
+    {
+      as_bad (_("Invalid expression."));
+      e->X_op = O_constant;
+      e->X_add_number = 0;
+    }
+  else
+    {
+      /* Wrap subexpression with a unary operator.  */
+      symbolS *sym = make_expr_symbol (e);
+
+      if (sym != e->X_add_symbol)
+	{
+	  /* HACK: mark this symbol as a temporary wrapper around a proper
+	     expression, so we can unwrap it later once we have communicated
+	     the relocation type.  */
+	  sym->sy_value.X_md = 1;
+	}
+
+      memset (e, 0, sizeof *e);
+      e->X_op = op;
+      e->X_add_symbol = sym;
+      e->X_add_number = 0;
+    }
+
+  *nextcharP = *input_line_pointer;
+  return 1;
+}
+
+
+/* Parses an expression which must be a register name.  */
+
+static void
+parse_reg_expression (expressionS* expression)
+{
+  /* Zero everything to make sure we don't miss any flags.  */
+  memset (expression, 0, sizeof *expression);
+
+  char* regname = input_line_pointer;
+  char terminating_char = get_symbol_end ();
+
+  void* pval = hash_find (main_reg_hash, regname);
+
+  if (pval == NULL)
+    {
+      as_bad (_("Expected register, got '%s'."), regname);
+    }
+
+  int regno_and_flags = (int)(size_t)pval;
+  int regno = EXTRACT_REGNO(regno_and_flags);
+
+  if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
+      && require_canonical_reg_names)
+    {
+      as_warn (_("Found use of non-canonical register name %s; "
+		 "use %s instead."),
+	       regname,
+	       tilegx_register_names[regno]);
+    }
+
+  /* Restore the old character following the register name.  */
+  *input_line_pointer = terminating_char;
+
+  /* Fill in the expression fields to indicate it's a register.  */
+  expression->X_op = O_register;
+  expression->X_add_number = regno;
+}
+
+
+/* Parses and type-checks comma-separated operands in input_line_pointer.  */
+
+static void
+parse_operands (const char *opcode_name,
+                const unsigned char *operands,
+                int num_operands,
+                expressionS *operand_values)
+{
+  int i;
+
+  memset (operand_values, 0, num_operands * sizeof operand_values[0]);
+
+  SKIP_WHITESPACE ();
+  for (i = 0; i < num_operands; i++)
+    {
+      tilegx_operand_type type = tilegx_operands[operands[i]].type;
+
+      SKIP_WHITESPACE ();
+
+      if (type == TILEGX_OP_TYPE_REGISTER)
+	{
+	  parse_reg_expression (&operand_values[i]);
+	}
+      else if (*input_line_pointer == '}')
+	{
+	  operand_values[i].X_op = O_absent;
+	}
+      else if (type == TILEGX_OP_TYPE_SPR)
+	{
+	  /* Modify the expression parser to add SPRs to the namespace.  */
+	  parsing_spr = 1;
+	  expression (&operand_values[i]);
+	  parsing_spr = 0;
+	}
+      else
+	{
+	  expression (&operand_values[i]);
+	}
+
+      SKIP_WHITESPACE ();
+
+      if (i + 1 < num_operands)
+	{
+	  int separator = (unsigned char)*input_line_pointer++;
+
+	  if (is_end_of_line[separator] || (separator == '}'))
+	    {
+	      as_bad (_("Too few operands to '%s'."), opcode_name);
+	      return;
+	    }
+	  else if (separator != ',')
+	    {
+	      as_bad (_("Unexpected character '%c' after operand %d to %s."),
+		      (char)separator, i + 1, opcode_name);
+	      return;
+	    }
+	}
+
+      /* Arbitrarily use the first valid pipe to get the operand type,
+	 since they are all the same.  */
+      switch (tilegx_operands[operands[i]].type)
+	{
+	case TILEGX_OP_TYPE_REGISTER:
+	  /* Handled in parse_reg_expression already.  */
+	  break;
+	case TILEGX_OP_TYPE_SPR:
+	  /* Fall through  */
+	case TILEGX_OP_TYPE_IMMEDIATE:
+	  /* Fall through  */
+	case TILEGX_OP_TYPE_ADDRESS:
+	  if (   operand_values[i].X_op == O_register
+		 || operand_values[i].X_op == O_illegal
+		 || operand_values[i].X_op == O_absent)
+	    as_bad (_("Expected immediate expression"));
+	  break;
+	default:
+	  abort();
+	}
+    }
+
+  if (!is_end_of_line[(unsigned char)*input_line_pointer])
+    {
+      switch (*input_line_pointer)
+	{
+	case '}':
+	  if (!inside_bundle)
+	    as_bad (_("Found '}' when not bundling."));
+	  ++input_line_pointer;
+	  inside_bundle = 0;
+	  demand_empty_rest_of_line ();
+	  break;
+
+	case ',':
+	  as_bad (_("Too many operands"));
+	  break;
+
+	default:
+	  /* Use default error for unrecognized garbage.  */
+	  demand_empty_rest_of_line ();
+	  break;
+	}
+    }
+}
+
+
+/* This is the guts of the machine-dependent assembler.  STR points to a
+   machine dependent instruction.  This function is supposed to emit the
+   frags/bytes it assembles to.  */
+
+void
+md_assemble (char *str)
+{
+  char old_char;
+  size_t opname_len;
+  char *old_input_line_pointer;
+  const struct tilegx_opcode *op;
+  int first_pipe;
+
+  /* Split off the opcode and look it up.  */
+  opname_len = strcspn (str, " {}");
+  old_char = str[opname_len];
+  str[opname_len] = '\0';
+
+  op = hash_find(op_hash, str);
+  str[opname_len] = old_char;
+  if (op == NULL)
+    {
+      as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
+      return;
+    }
+
+  /* Prepare to parse the operands.  */
+  old_input_line_pointer = input_line_pointer;
+  input_line_pointer = str + opname_len;
+  SKIP_WHITESPACE ();
+
+  if (current_bundle_index == TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE)
+    {
+      as_bad (_("Too many instructions for bundle."));
+      tilegx_flush_bundle ();
+    }
+
+  /* Make sure we have room for the upcoming bundle before we
+     create any fixups. Otherwise if we have to switch to a new
+     frag the fixup dot_value fields will be wrong.  */
+  frag_grow (TILEGX_BUNDLE_SIZE_IN_BYTES);
+
+  /* Find a valid pipe for this opcode.  */
+  for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
+    ;
+
+  /* Call the function that assembles this instruction.  */
+  current_bundle[current_bundle_index].opcode = op;
+  parse_operands (op->name,
+                  &op->operands[first_pipe][0],
+                  op->num_operands,
+                  current_bundle[current_bundle_index].operand_values);
+  ++current_bundle_index;
+
+  /* Restore the saved value of input_line_pointer.  */
+  input_line_pointer = old_input_line_pointer;
+
+  /* If we weren't inside curly braces, go ahead and emit
+     this lone instruction as a bundle right now.  */
+  if (!inside_bundle)
+    tilegx_flush_bundle ();
+}
+
+
+static void
+s_require_canonical_reg_names (int require)
+{
+  demand_empty_rest_of_line ();
+  require_canonical_reg_names = require;
+}
+
+static void
+s_allow_suspicious_bundles (int allow)
+{
+  demand_empty_rest_of_line ();
+  allow_suspicious_bundles = allow;
+}
+
+const pseudo_typeS md_pseudo_table[] =
+{
+  {"align", s_align_bytes, 0},	/* Defaulting is invalid (0).  */
+  {"word", cons, 4},
+  {"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
+  {"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
+  {"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
+  {"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
+  { NULL, 0, 0 }
+};
+
+/* Equal to MAX_PRECISION in atof-ieee.c  */
+#define MAX_LITTLENUMS 6
+
+/* Turn the string pointed to by litP into a floating point constant
+   of type TYPE, and emit the appropriate bytes.  The number of
+   LITTLENUMS emitted is stored in *SIZEP.  An error message is
+   returned, or NULL on OK.  */
+
+char *
+md_atof (int type, char *litP, int *sizeP)
+{
+  int prec;
+  LITTLENUM_TYPE words[MAX_LITTLENUMS];
+  LITTLENUM_TYPE *wordP;
+  char *t;
+
+  switch (type)
+    {
+    case 'f':
+    case 'F':
+      prec = 2;
+      break;
+
+    case 'd':
+    case 'D':
+      prec = 4;
+      break;
+
+    default:
+      *sizeP = 0;
+      return _("Bad call to md_atof ()");
+    }
+  t = atof_ieee (input_line_pointer, type, words);
+  if (t)
+    input_line_pointer = t;
+
+  *sizeP = prec * sizeof (LITTLENUM_TYPE);
+  /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
+     the bigendian 386.  */
+  for (wordP = words + prec - 1; prec--;)
+    {
+      md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
+      litP += sizeof (LITTLENUM_TYPE);
+    }
+  return 0;
+}
+
+
+/* We have no need to default values of symbols.  */
+
+symbolS *
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
+{
+  return NULL;
+}
+
+
+void
+tilegx_cons_fix_new (fragS *frag,
+		     int where,
+		     int nbytes,
+		     expressionS *exp)
+{
+  expressionS subexp;
+  bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
+  int no_overflow = 0;
+  fixS *fixP;
+
+  /* See if it's one of our special functions.  */
+  switch (exp->X_op)
+    {
+    case O_hw0:
+      reloc = BFD_RELOC_TILEGX_HW0;
+      no_overflow = 1;
+      break;
+    case O_hw1:
+      reloc = BFD_RELOC_TILEGX_HW1;
+      no_overflow = 1;
+      break;
+    case O_hw2:
+      reloc = BFD_RELOC_TILEGX_HW2;
+      no_overflow = 1;
+      break;
+    case O_hw3:
+      reloc = BFD_RELOC_TILEGX_HW3;
+      no_overflow = 1;
+      break;
+    case O_hw0_last:
+      reloc = BFD_RELOC_TILEGX_HW0_LAST;
+      break;
+    case O_hw1_last:
+      reloc = BFD_RELOC_TILEGX_HW1_LAST;
+      break;
+    case O_hw2_last:
+      reloc = BFD_RELOC_TILEGX_HW2_LAST;
+      break;
+
+    default:
+      /* Do nothing.  */
+      break;
+    }
+
+  if (reloc != BFD_RELOC_NONE)
+    {
+      if (nbytes != 2)
+	{
+	  as_bad (_("This operator only produces two byte values."));
+	  nbytes = 2;
+	}
+
+      memset (&subexp, 0, sizeof subexp);
+      subexp.X_op = O_symbol;
+      subexp.X_add_symbol = exp->X_add_symbol;
+      exp = &subexp;
+    }
+  else
+    {
+      switch (nbytes)
+	{
+	case 1:
+	  reloc = BFD_RELOC_8;
+	  break;
+	case 2:
+	  reloc = BFD_RELOC_16;
+	  break;
+	case 4:
+	  reloc = BFD_RELOC_32;
+	  break;
+	case 8:
+	  reloc = BFD_RELOC_64;
+	  break;
+	default:
+	  as_bad (_("unsupported BFD relocation size %d"), nbytes);
+	  reloc = BFD_RELOC_64;
+	  break;
+	}
+    }
+
+  fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
+  fixP->tc_fix_data = NULL;
+  fixP->fx_no_overflow |= no_overflow;
+}
+
+
+void
+md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
+{
+  const struct tilegx_operand *operand;
+  valueT value = *valP;
+  operatorT special;
+  char *p;
+
+  /* Leave these for the linker.  */
+  if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+      || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+    return;
+
+  if (fixP->fx_subsy != (symbolS *) NULL)
+    {
+      /* We can't actually support subtracting a symbol.  */
+      as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
+    }
+
+  /* Correct relocation types for pc-relativeness.  */
+  switch (fixP->fx_r_type)
+    {
+#define FIX_PCREL(rtype)                        \
+      case rtype:				\
+	if (fixP->fx_pcrel)			\
+	  fixP->fx_r_type = rtype##_PCREL;	\
+      break;					\
+                                                \
+    case rtype##_PCREL:				\
+      if (!fixP->fx_pcrel)			\
+	fixP->fx_r_type = rtype;		\
+      break
+
+      FIX_PCREL (BFD_RELOC_8);
+      FIX_PCREL (BFD_RELOC_16);
+      FIX_PCREL (BFD_RELOC_32);
+      FIX_PCREL (BFD_RELOC_64);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW3);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW3);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
+      FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
+
+#undef FIX_PCREL
+
+    default:
+      /* Do nothing  */
+      break;
+    }
+
+  if (fixP->fx_addsy != NULL)
+    {
+#ifdef OBJ_ELF
+      switch (fixP->fx_r_type)
+	{
+	case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD:
+	case BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE:
+	case BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE:
+	case BFD_RELOC_TILEGX_TLS_DTPMOD64:
+	case BFD_RELOC_TILEGX_TLS_DTPOFF64:
+	case BFD_RELOC_TILEGX_TLS_TPOFF64:
+	case BFD_RELOC_TILEGX_TLS_DTPMOD32:
+	case BFD_RELOC_TILEGX_TLS_DTPOFF32:
+	case BFD_RELOC_TILEGX_TLS_TPOFF32:
+	  S_SET_THREAD_LOCAL (fixP->fx_addsy);
+	  break;
+
+	default:
+	  /* Do nothing  */
+	  break;
+	}
+#endif
+      return;
+    }
+
+  /* Apply hw0, etc.  */
+  special = O_illegal;
+  switch (fixP->fx_r_type)
+    {
+    case BFD_RELOC_TILEGX_HW0:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
+      special = O_hw0;
+      break;
+
+    case BFD_RELOC_TILEGX_HW0_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
+      special = O_hw0_last;
+      break;
+
+    case BFD_RELOC_TILEGX_HW1:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE:
+      special = O_hw1;
+      break;
+
+    case BFD_RELOC_TILEGX_HW1_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
+      special = O_hw1_last;
+      break;
+
+    case BFD_RELOC_TILEGX_HW2:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE:
+      special = O_hw2;
+      break;
+
+    case BFD_RELOC_TILEGX_HW2_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE:
+      special = O_hw2_last;
+      break;
+
+    case BFD_RELOC_TILEGX_HW3:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW3:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW3:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD:
+    case BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE:
+    case BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE:
+      special = O_hw3;
+      break;
+
+    default:
+      /* Do nothing  */
+      break;
+    }
+
+  if (special != O_illegal)
+    {
+      *valP = value = apply_special_operator (special, value,
+					      fixP->fx_file, fixP->fx_line);
+    }
+
+  p = fixP->fx_frag->fr_literal + fixP->fx_where;
+
+  operand = fixP->tc_fix_data;
+  if (operand != NULL)
+    {
+      /* It's an instruction operand.  */
+      tilegx_bundle_bits bits =
+	insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
+
+      /* Note that we might either be writing out bits for a bundle
+	 or a static network instruction, which are different sizes, so it's
+	 important to stop touching memory once we run out of bits.
+	 ORing in values is OK since we know the existing bits for
+	 this operand are zero.  */
+      for (; bits != 0; bits >>= 8)
+	*p++ |= (char)bits;
+    }
+  else
+    {
+      /* Some other kind of relocation.  */
+      switch (fixP->fx_r_type)
+	{
+	case BFD_RELOC_8:
+	case BFD_RELOC_8_PCREL:
+	  md_number_to_chars (p, value, 1);
+	  break;
+
+	case BFD_RELOC_16:
+	case BFD_RELOC_16_PCREL:
+	  md_number_to_chars (p, value, 2);
+	  break;
+
+	case BFD_RELOC_32:
+	case BFD_RELOC_32_PCREL:
+	  md_number_to_chars (p, value, 4);
+	  break;
+
+	case BFD_RELOC_64:
+	case BFD_RELOC_64_PCREL:
+	  md_number_to_chars (p, value, 8);
+	  break;
+
+	default:
+	  /* Leave it for the linker.  */
+	  return;
+	}
+    }
+
+  fixP->fx_done = 1;
+}
+
+
+/* Generate the BFD reloc to be stuck in the object file from the
+   fixup used internally in the assembler.  */
+
+arelent *
+tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
+{
+  arelent *reloc;
+
+  reloc = (arelent *) xmalloc (sizeof (arelent));
+  reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+  *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+
+  /* Make sure none of our internal relocations make it this far.
+     They'd better have been fully resolved by this point.  */
+  gas_assert ((int) fixp->fx_r_type > 0);
+
+  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+  if (reloc->howto == NULL)
+    {
+      as_bad_where (fixp->fx_file, fixp->fx_line,
+		    _("cannot represent `%s' relocation in object file"),
+		    bfd_get_reloc_code_name (fixp->fx_r_type));
+      return NULL;
+    }
+
+  if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+    {
+      as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
+		bfd_get_reloc_code_name (fixp->fx_r_type),
+                fixp->fx_pcrel, reloc->howto->pc_relative);
+    }
+  gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+
+  reloc->addend = fixp->fx_offset;
+
+  return reloc;
+}
+
+
+/* The location from which a PC relative jump should be calculated,
+   given a PC relative reloc.  */
+
+long
+md_pcrel_from (fixS *fixP)
+{
+  return fixP->fx_frag->fr_address + fixP->fx_where;
+}
+
+
+/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
+   a section symbol plus some offset.  */
+int
+tilegx_fix_adjustable (fixS *fix)
+{
+  /* Prevent all adjustments to global symbols  */
+  if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
+    return 0;
+
+  return 1;
+}
+
+
+int
+tilegx_unrecognized_line (int ch)
+{
+  switch (ch)
+    {
+    case '{':
+      if (inside_bundle)
+	{
+	  as_bad (_("Found '{' when already bundling."));
+	}
+      else
+	{
+	  inside_bundle = 1;
+	  current_bundle_index = 0;
+	}
+      return 1;
+
+    case '}':
+      if (!inside_bundle)
+	{
+	  as_bad (_("Found '}' when not bundling."));
+	}
+      else
+	{
+	  tilegx_flush_bundle ();
+	}
+
+      /* Allow '{' to follow on the same line.  We also allow ";;", but that
+	 happens automatically because ';' is an end of line marker.  */
+      SKIP_WHITESPACE ();
+      if (input_line_pointer[0] == '{')
+	{
+	  input_line_pointer++;
+	  return tilegx_unrecognized_line ('{');
+	}
+
+      demand_empty_rest_of_line ();
+      return 1;
+
+    default:
+      break;
+    }
+
+  /* Not a valid line.  */
+  return 0;
+}
+
+
+/* This is called from HANDLE_ALIGN in write.c.  Fill in the contents
+   of an rs_align_code fragment.  */
+
+void
+tilegx_handle_align (fragS *fragp)
+{
+  addressT bytes, fix;
+  char *p;
+
+  if (fragp->fr_type != rs_align_code)
+    return;
+
+  bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+  p = fragp->fr_literal + fragp->fr_fix;
+  fix = 0;
+
+  /* Determine the bits for NOP.  */
+  const struct tilegx_opcode *nop_opcode =
+    &tilegx_opcodes[TILEGX_OPC_NOP];
+  tilegx_bundle_bits nop =
+    (  nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X0]
+     | nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X1]);
+
+  if ((bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
+    {
+      fix = bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1);
+      memset (p, 0, fix);
+      p += fix;
+      bytes -= fix;
+    }
+
+  number_to_chars_littleendian (p, nop, 8);
+  fragp->fr_fix += fix;
+  fragp->fr_var = TILEGX_BUNDLE_SIZE_IN_BYTES;
+}
+
+/* Standard calling conventions leave the CFA at SP on entry.  */
+void
+tilegx_cfi_frame_initial_instructions (void)
+{
+  cfi_add_CFA_def_cfa_register (54);
+}
+
+int
+tc_tilegx_regname_to_dw2regnum (char *regname)
+{
+  int i;
+  for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
+    {
+      if (!strcmp (regname, tilegx_register_names[i]))
+	return i;
+    }
+
+  return -1;
+}
diff --git a/gas/config/tc-tilegx.h b/gas/config/tc-tilegx.h
new file mode 100644
index 0000000..aad6313
--- /dev/null
+++ b/gas/config/tc-tilegx.h
@@ -0,0 +1,93 @@
+/* tc-tilegx.h - Macros and type defines for a TILE-Gx chip.
+   Copyright 2011 Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#ifndef TC_TILEGX
+
+#include "opcode/tilegx.h"
+
+#define TC_TILEGX
+
+#define TARGET_BYTES_BIG_ENDIAN 0
+
+#define WORKING_DOT_WORD
+
+#define TARGET_ARCH			bfd_arch_tilegx
+
+extern const char * tilegx_target_format (void);
+#define TARGET_FORMAT tilegx_target_format ()
+
+#define DWARF2_LINE_MIN_INSN_LENGTH	8
+
+#define md_number_to_chars		number_to_chars_littleendian
+
+#define DIFF_EXPR_OK   /* foo-. gets turned into PC relative relocs */
+
+#define HANDLE_ALIGN(fragp) tilegx_handle_align (fragp)
+extern void tilegx_handle_align (struct frag *);
+
+#define MAX_MEM_FOR_RS_ALIGN_CODE (7 + 8)
+
+struct tilegx_operand;
+#define TC_FIX_TYPE const struct tilegx_operand *
+
+/* Initialize the TC_FIX_TYPE field.  */
+#define TC_INIT_FIX_DATA(FIX) \
+  FIX->tc_fix_data = 0
+
+extern void tilegx_cons_fix_new (struct frag *, int,
+				 int, struct expressionS *);
+#define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP) \
+  tilegx_cons_fix_new (FRAG, WHERE, NBYTES, EXP)
+
+extern int tilegx_parse_name (char *, expressionS *, char *);
+#define md_parse_name(name, e, m, nextP) tilegx_parse_name (name, e, nextP)
+
+extern int tilegx_fix_adjustable (struct fix *);
+#define tc_fix_adjustable(FIX)   tilegx_fix_adjustable (FIX)
+
+extern int tilegx_unrecognized_line (int);
+#define tc_unrecognized_line(ch) tilegx_unrecognized_line (ch)
+
+/* Values passed to md_apply_fix3 don't include the symbol value.  */
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+#define md_convert_frag(b,s,f) \
+  as_fatal ("tilegx convert_frag called")
+#define md_estimate_size_before_relax(f,s) \
+  (as_fatal ("tilegx estimate_size_before_relax called"),1)
+#define md_operand(x)
+
+#define md_section_align(seg,size)	(size)
+
+/* We want .cfi_* pseudo-ops for generating unwind info.  */
+#define TARGET_USE_CFIPOP 1
+
+#define tc_cfi_frame_initial_instructions tilegx_cfi_frame_initial_instructions
+extern void tilegx_cfi_frame_initial_instructions (void);
+
+#define tc_regname_to_dw2regnum tc_tilegx_regname_to_dw2regnum
+extern int tc_tilegx_regname_to_dw2regnum (char *);
+
+extern int tilegx_cie_data_alignment;
+
+#define DWARF2_DEFAULT_RETURN_COLUMN 55
+#define DWARF2_CIE_DATA_ALIGNMENT tilegx_cie_data_alignment
+
+#endif /* TC_TILEGX */
diff --git a/gas/config/tc-tilepro.c b/gas/config/tc-tilepro.c
new file mode 100644
index 0000000..c198b2c
--- /dev/null
+++ b/gas/config/tc-tilepro.c
@@ -0,0 +1,1645 @@
+/* tc-tilepro.c -- Assemble for a TILEPro chip.
+   Copyright 2011 Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "as.h"
+#include "struc-symbol.h"
+#include "subsegs.h"
+
+#include "elf/tilepro.h"
+#include "opcode/tilepro.h"
+
+#include "dwarf2dbg.h"
+#include "dw2gencfi.h"
+
+#include "safe-ctype.h"
+
+
+/* Special registers. */
+#define TREG_IDN0     57
+#define TREG_IDN1     58
+#define TREG_UDN0     59
+#define TREG_UDN1     60
+#define TREG_UDN2     61
+#define TREG_UDN3     62
+#define TREG_ZERO     63
+
+
+/* Generic assembler global variables which must be defined by all
+   targets.  */
+
+/* Characters which always start a comment.  */
+const char comment_chars[] = "#";
+
+/* Characters which start a comment at the beginning of a line.  */
+const char line_comment_chars[] = "#";
+
+/* Characters which may be used to separate multiple commands on a
+   single line.  */
+const char line_separator_chars[] = ";";
+
+/* Characters which are used to indicate an exponent in a floating
+   point number.  */
+const char EXP_CHARS[] = "eE";
+
+/* Characters which mean that a number is a floating point constant,
+   as in 0d1.0.  */
+const char FLT_CHARS[] = "rRsSfFdDxXpP";
+
+const char *md_shortopts = "VQ:";
+
+struct option md_longopts[] =
+{
+  {NULL, no_argument, NULL, 0}
+};
+
+size_t md_longopts_size = sizeof (md_longopts);
+
+int
+md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
+{
+  switch (c)
+    {
+      /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
+	 should be emitted or not.  FIXME: Not implemented.  */
+    case 'Q':
+      break;
+
+      /* -V: SVR4 argument to print version ID.  */
+    case 'V':
+      print_version_id ();
+      break;
+
+    default:
+      return 0;
+    }
+
+  return 1;
+}
+
+void
+md_show_usage (FILE *stream)
+{
+  fprintf (stream, _("\
+  -Q                      ignored\n\
+  -V                      print assembler version number\n"));
+}
+
+/* Extra expression types.  */
+
+#define O_lo16	      O_md1
+#define O_hi16	      O_md2
+#define O_ha16	      O_md3
+#define O_got	      O_md4
+#define O_got_lo16    O_md5
+#define O_got_hi16    O_md6
+#define O_got_ha16    O_md7
+#define O_plt	      O_md8
+#define O_tls_gd      O_md9
+#define O_tls_gd_lo16 O_md10
+#define O_tls_gd_hi16 O_md11
+#define O_tls_gd_ha16 O_md12
+#define O_tls_ie      O_md13
+#define O_tls_ie_lo16 O_md14
+#define O_tls_ie_hi16 O_md15
+#define O_tls_ie_ha16 O_md16
+
+static struct hash_control *special_operator_hash;
+
+/* Hash tables for instruction mnemonic lookup.  */
+static struct hash_control *op_hash;
+
+/* Hash table for spr lookup.  */
+static struct hash_control *spr_hash;
+
+/* True temporarily while parsing an SPR expression. This changes the
+ * namespace to include SPR names.  */
+static int parsing_spr;
+
+/* Are we currently inside `{ ... }'?  */
+static int inside_bundle;
+
+struct tilepro_instruction
+{
+  const struct tilepro_opcode *opcode;
+  tilepro_pipeline pipe;
+  expressionS operand_values[TILEPRO_MAX_OPERANDS];
+};
+
+/* This keeps track of the current bundle being built up.  */
+static struct tilepro_instruction
+current_bundle[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE];
+
+/* Index in current_bundle for the next instruction to parse.  */
+static int current_bundle_index;
+
+/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
+   'zero' is not a real register, so using it accidentally would be a
+   nasty bug. For other registers, such as 'sp', code using multiple names
+   for the same physical register is excessively confusing.
+
+   The '.require_canonical_reg_names' pseudo-op turns this error on,
+   and the '.no_require_canonical_reg_names' pseudo-op turns this off.
+   By default the error is on.  */
+static int require_canonical_reg_names;
+
+/* Allow bundles that do undefined or suspicious things like write
+   two different values to the same register at the same time.
+
+   The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
+   and the '.allow_suspicious_bundles' pseudo-op turns this off.  */
+static int allow_suspicious_bundles;
+
+
+/* A hash table of main processor registers, mapping each register name
+   to its index.
+
+   Furthermore, if the register number is greater than the number
+   of registers for that processor, the user used an illegal alias
+   for that register (e.g. r63 instead of zero), so we should generate
+   a warning. The attempted register number can be found by clearing
+   NONCANONICAL_REG_NAME_FLAG.  */
+static struct hash_control *main_reg_hash;
+
+
+/* We cannot unambiguously store a 0 in a hash table and look it up,
+   so we OR in this flag to every canonical register.  */
+#define CANONICAL_REG_NAME_FLAG    0x1000
+
+/* By default we disallow register aliases like r63, but we record
+   them in the hash table in case the .no_require_canonical_reg_names
+   directive is used. Noncanonical names have this value added to them.  */
+#define NONCANONICAL_REG_NAME_FLAG 0x2000
+
+/* Discards flags for register hash table entries and returns the
+   reg number.  */
+#define EXTRACT_REGNO(p) ((p) & 63)
+
+/* This function is called once, at assembler startup time.  It should
+   set up all the tables, etc., that the MD part of the assembler will
+   need.  */
+void
+md_begin (void)
+{
+  const struct tilepro_opcode *op;
+  int i;
+
+  /* Guarantee text section is aligned.  */
+  bfd_set_section_alignment (stdoutput, text_section,
+                             TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
+
+  require_canonical_reg_names = 1;
+  allow_suspicious_bundles = 0;
+  current_bundle_index = 0;
+  inside_bundle = 0;
+
+  /* Initialize special operator hash table.  */
+  special_operator_hash = hash_new ();
+#define INSERT_SPECIAL_OP(name)					\
+  hash_insert (special_operator_hash, #name, (void *)O_##name)
+
+  INSERT_SPECIAL_OP(lo16);
+  INSERT_SPECIAL_OP(hi16);
+  INSERT_SPECIAL_OP(ha16);
+  INSERT_SPECIAL_OP(got);
+  INSERT_SPECIAL_OP(got_lo16);
+  INSERT_SPECIAL_OP(got_hi16);
+  INSERT_SPECIAL_OP(got_ha16);
+  INSERT_SPECIAL_OP(plt);
+  INSERT_SPECIAL_OP(tls_gd);
+  INSERT_SPECIAL_OP(tls_gd_lo16);
+  INSERT_SPECIAL_OP(tls_gd_hi16);
+  INSERT_SPECIAL_OP(tls_gd_ha16);
+  INSERT_SPECIAL_OP(tls_ie);
+  INSERT_SPECIAL_OP(tls_ie_lo16);
+  INSERT_SPECIAL_OP(tls_ie_hi16);
+  INSERT_SPECIAL_OP(tls_ie_ha16);
+#undef INSERT_SPECIAL_OP
+
+  /* Initialize op_hash hash table.  */
+  op_hash = hash_new ();
+  for (op = &tilepro_opcodes[0]; op->name != NULL; op++)
+    {
+      const char *hash_err = hash_insert (op_hash, op->name, (void *)op);
+      if (hash_err != NULL)
+	{
+	  as_fatal (_("Internal Error:  Can't hash %s: %s"),
+		    op->name, hash_err);
+	}
+    }
+
+  /* Initialize the spr hash table.  */
+  parsing_spr = 0;
+  spr_hash = hash_new ();
+  for (i = 0; i < tilepro_num_sprs; i++)
+    hash_insert (spr_hash, tilepro_sprs[i].name,
+                 (void *) &tilepro_sprs[i]);
+
+  /* Set up the main_reg_hash table. We use this instead of
+   * creating a symbol in the register section to avoid ambiguities
+   * with labels that have the same names as registers.  */
+  main_reg_hash = hash_new ();
+  for (i = 0; i < TILEPRO_NUM_REGISTERS; i++)
+    {
+      char buf[64];
+
+      hash_insert (main_reg_hash, tilepro_register_names[i],
+		   (void *) (long)(i | CANONICAL_REG_NAME_FLAG));
+
+      /* See if we should insert a noncanonical alias, like r63.  */
+      sprintf (buf, "r%d", i);
+      if (strcmp (buf, tilepro_register_names[i]) != 0)
+	hash_insert (main_reg_hash, xstrdup (buf),
+		     (void *) (long)(i | NONCANONICAL_REG_NAME_FLAG));
+    }
+
+  /* Insert obsolete backwards-compatibility register names.  */
+  hash_insert (main_reg_hash, "io0",
+               (void *) (long) (TREG_IDN0 | CANONICAL_REG_NAME_FLAG));
+  hash_insert (main_reg_hash, "io1",
+               (void *) (long) (TREG_IDN1 | CANONICAL_REG_NAME_FLAG));
+  hash_insert (main_reg_hash, "us0",
+               (void *) (long) (TREG_UDN0 | CANONICAL_REG_NAME_FLAG));
+  hash_insert (main_reg_hash, "us1",
+               (void *) (long) (TREG_UDN1 | CANONICAL_REG_NAME_FLAG));
+  hash_insert (main_reg_hash, "us2",
+               (void *) (long) (TREG_UDN2 | CANONICAL_REG_NAME_FLAG));
+  hash_insert (main_reg_hash, "us3",
+               (void *) (long) (TREG_UDN3 | CANONICAL_REG_NAME_FLAG));
+
+}
+
+
+#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
+  ((p0) | ((p1) << 8) | ((p2) << 16))
+#define BUNDLE_TEMPLATE(p0, p1, p2) \
+  { { (p0), (p1), (p2) }, \
+     BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
+  }
+
+#define NO_PIPELINE TILEPRO_NUM_PIPELINE_ENCODINGS
+
+struct bundle_template
+{
+  tilepro_pipeline pipe[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE];
+  unsigned int pipe_mask;
+};
+
+static const struct bundle_template bundle_templates[] =
+{
+  /* In Y format we must always have something in Y2, since it has
+   * no fnop, so this conveys that Y2 must always be used.  */
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y0, TILEPRO_PIPELINE_Y2, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y1, TILEPRO_PIPELINE_Y2, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y2, TILEPRO_PIPELINE_Y0, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y2, TILEPRO_PIPELINE_Y1, NO_PIPELINE),
+
+  /* Y format has three instructions.  */
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y0, TILEPRO_PIPELINE_Y1, TILEPRO_PIPELINE_Y2),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y0, TILEPRO_PIPELINE_Y2, TILEPRO_PIPELINE_Y1),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y1, TILEPRO_PIPELINE_Y0, TILEPRO_PIPELINE_Y2),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y1, TILEPRO_PIPELINE_Y2, TILEPRO_PIPELINE_Y0),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y2, TILEPRO_PIPELINE_Y0, TILEPRO_PIPELINE_Y1),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_Y2, TILEPRO_PIPELINE_Y1, TILEPRO_PIPELINE_Y0),
+
+  /* X format has only two instructions.  */
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_X0, TILEPRO_PIPELINE_X1, NO_PIPELINE),
+  BUNDLE_TEMPLATE(TILEPRO_PIPELINE_X1, TILEPRO_PIPELINE_X0, NO_PIPELINE)
+};
+
+
+static void
+prepend_nop_to_bundle (tilepro_mnemonic mnemonic)
+{
+  memmove (&current_bundle[1], &current_bundle[0],
+	   current_bundle_index * sizeof current_bundle[0]);
+  current_bundle[0].opcode = &tilepro_opcodes[mnemonic];
+  ++current_bundle_index;
+}
+
+
+static tilepro_bundle_bits
+insert_operand (tilepro_bundle_bits bits,
+                const struct tilepro_operand *operand,
+                int operand_value,
+                char *file,
+                unsigned lineno)
+{
+  /* Range-check the immediate.  */
+  int num_bits = operand->num_bits;
+
+  operand_value >>= operand->rightshift;
+
+  if (bfd_check_overflow (operand->is_signed
+                          ? complain_overflow_signed
+                          : complain_overflow_unsigned,
+                          num_bits,
+                          0,
+                          bfd_arch_bits_per_address (stdoutput),
+                          operand_value)
+      != bfd_reloc_ok)
+    {
+      offsetT min, max;
+      if (operand->is_signed)
+	{
+	  min = -(1 << (num_bits - 1));
+	  max = (1 << (num_bits - 1)) - 1;
+	}
+      else
+	{
+	  min = 0;
+	  max = (1 << num_bits) - 1;
+	}
+      as_bad_value_out_of_range (_("operand"), operand_value, min, max,
+				 file, lineno);
+    }
+
+  /* Write out the bits for the immediate.  */
+  return bits | operand->insert (operand_value);
+}
+
+
+static int
+apply_special_operator (operatorT op, int num)
+{
+  switch (op)
+    {
+    case O_lo16:
+    case O_got:
+    case O_got_lo16:
+    case O_tls_gd:
+    case O_tls_gd_lo16:
+    case O_tls_ie:
+    case O_tls_ie_lo16:
+      return (signed short)num;
+
+    case O_hi16:
+    case O_got_hi16:
+    case O_tls_gd_hi16:
+    case O_tls_ie_hi16:
+      return (signed short)(num >> 16);
+
+    case O_ha16:
+    case O_got_ha16:
+    case O_tls_gd_ha16:
+    case O_tls_ie_ha16:
+      return (signed short)((num + 0x8000) >> 16);
+
+    default:
+      abort ();
+    }
+}
+
+
+static tilepro_bundle_bits
+emit_tilepro_instruction (tilepro_bundle_bits bits,
+			  int num_operands,
+			  const unsigned char *operands,
+			  expressionS *operand_values,
+			  char *bundle_start)
+{
+  int i;
+
+  for (i = 0; i < num_operands; i++)
+    {
+      const struct tilepro_operand *operand =
+	&tilepro_operands[operands[i]];
+      expressionS *operand_exp = &operand_values[i];
+      int is_pc_relative = operand->is_pc_relative;
+
+      if (operand_exp->X_op == O_register
+	  || (operand_exp->X_op == O_constant && !is_pc_relative))
+	{
+	  /* We know what the bits are right now, so insert them.  */
+	  bits = insert_operand (bits, operand, operand_exp->X_add_number,
+				 NULL, 0);
+	}
+      else
+	{
+	  bfd_reloc_code_real_type reloc = operand->default_reloc;
+	  expressionS subexp;
+	  int die = 0, use_subexp = 0, require_symbol = 0;
+	  fixS *fixP;
+
+	  /* Take an expression like hi16(x) and turn it into x with
+	     a different reloc type.  */
+	  switch (operand_exp->X_op)
+	    {
+#define HANDLE_OP16(suffix)					\
+	      switch (reloc)					\
+		{                                               \
+		case BFD_RELOC_TILEPRO_IMM16_X0:                \
+		  reloc = BFD_RELOC_TILEPRO_IMM16_X0_##suffix;  \
+		  break;                                        \
+		case BFD_RELOC_TILEPRO_IMM16_X1:                \
+		  reloc = BFD_RELOC_TILEPRO_IMM16_X1_##suffix;  \
+		  break;                                        \
+		default:                                        \
+		  die = 1;                                      \
+		  break;                                        \
+		}                                               \
+	      use_subexp = 1
+
+	    case O_lo16:
+	      HANDLE_OP16 (LO);
+	      break;
+
+	    case O_hi16:
+	      HANDLE_OP16 (HI);
+	      break;
+
+	    case O_ha16:
+	      HANDLE_OP16 (HA);
+	      break;
+
+	    case O_got:
+	      HANDLE_OP16 (GOT);
+	      require_symbol = 1;
+	      break;
+
+	    case O_got_lo16:
+	      HANDLE_OP16 (GOT_LO);
+	      require_symbol = 1;
+	      break;
+
+	    case O_got_hi16:
+	      HANDLE_OP16 (GOT_HI);
+	      require_symbol = 1;
+	      break;
+
+	    case O_got_ha16:
+	      HANDLE_OP16 (GOT_HA);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_gd:
+	      HANDLE_OP16 (TLS_GD);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_gd_lo16:
+	      HANDLE_OP16 (TLS_GD_LO);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_gd_hi16:
+	      HANDLE_OP16 (TLS_GD_HI);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_gd_ha16:
+	      HANDLE_OP16 (TLS_GD_HA);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_ie:
+	      HANDLE_OP16 (TLS_IE);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_ie_lo16:
+	      HANDLE_OP16 (TLS_IE_LO);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_ie_hi16:
+	      HANDLE_OP16 (TLS_IE_HI);
+	      require_symbol = 1;
+	      break;
+
+	    case O_tls_ie_ha16:
+	      HANDLE_OP16 (TLS_IE_HA);
+	      require_symbol = 1;
+	      break;
+
+#undef HANDLE_OP16
+
+	    case O_plt:
+	      switch (reloc)
+		{
+		case BFD_RELOC_TILEPRO_JOFFLONG_X1:
+		  reloc = BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT;
+		  break;
+		default:
+		  die = 1;
+		  break;
+		}
+	      use_subexp = 1;
+	      require_symbol = 1;
+	      break;
+
+	    default:
+	      /* Do nothing.  */
+	      break;
+	    }
+
+	  if (die)
+	    {
+	      as_bad (_("Invalid operator for operand."));
+	    }
+	  else if (use_subexp)
+	    {
+	      /* Now that we've changed the reloc, change ha16(x) into x,
+		 etc.  */
+
+	      if (operand_exp->X_add_symbol->sy_value.X_md)
+		{
+		  if (require_symbol)
+		    {
+		      as_bad (_("Operator may only be applied to symbols."));
+		    }
+
+		  /* HACK: We used X_md to mark this symbol as a fake wrapper
+		     around a real expression. To unwrap it, we just grab its
+		     value here.  */
+		  operand_exp = &operand_exp->X_add_symbol->sy_value;
+		}
+	      else
+		{
+		  /* The value of this expression is an actual symbol, so
+		     turn that into an expression.  */
+		  memset (&subexp, 0, sizeof subexp);
+		  subexp.X_op = O_symbol;
+		  subexp.X_add_symbol = operand_exp->X_add_symbol;
+		  operand_exp = &subexp;
+		}
+	    }
+
+	  /* Create a fixup to handle this later. */
+	  fixP = fix_new_exp (frag_now,
+			      bundle_start - frag_now->fr_literal,
+			      (operand->num_bits + 7) >> 3,
+			      operand_exp,
+			      is_pc_relative,
+			      reloc);
+	  fixP->tc_fix_data = operand;
+
+	  /* Don't do overflow checking if we are applying a function like
+	     ha16.  */
+	  fixP->fx_no_overflow |= use_subexp;
+	}
+    }
+  return bits;
+}
+
+
+/* Detects and complains if two instructions in current_bundle write
+   to the same register, either implicitly or explicitly, or if a
+   read-only register is written.  */
+static void
+check_illegal_reg_writes (void)
+{
+  BFD_HOST_U_64_BIT all_regs_written = 0;
+  int j;
+
+  for (j = 0; j < current_bundle_index; j++)
+    {
+      const struct tilepro_instruction *instr = &current_bundle[j];
+      int k;
+      BFD_HOST_U_64_BIT regs =
+	((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
+      BFD_HOST_U_64_BIT conflict;
+
+      for (k = 0; k < instr->opcode->num_operands; k++)
+	{
+	  const struct tilepro_operand *operand =
+	    &tilepro_operands[instr->opcode->operands[instr->pipe][k]];
+
+	  if (operand->is_dest_reg)
+	    {
+	      int regno = instr->operand_values[k].X_add_number;
+	      BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
+
+	      if ((mask & (  (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
+			     | (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
+			     | (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
+			     | (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
+		  && !allow_suspicious_bundles)
+		{
+		  as_bad (_("Writes to register '%s' are not allowed."),
+			  tilepro_register_names[regno]);
+		}
+
+	      regs |= mask;
+	    }
+	}
+
+      /* Writing to the zero register doesn't count.  */
+      regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
+
+      conflict = all_regs_written & regs;
+      if (conflict != 0 && !allow_suspicious_bundles)
+	{
+	  /* Find which register caused the conflict.  */
+	  const char *conflicting_reg_name = "???";
+	  int i;
+
+	  for (i = 0; i < TILEPRO_NUM_REGISTERS; i++)
+	    {
+	      if (((conflict >> i) & 1) != 0)
+		{
+		  conflicting_reg_name = tilepro_register_names[i];
+		  break;
+		}
+	    }
+
+	  as_bad (_("Two instructions in the same bundle both write "
+		    "to register %s, which is not allowed."),
+		  conflicting_reg_name);
+	}
+
+      all_regs_written |= regs;
+    }
+}
+
+
+static void
+tilepro_flush_bundle (void)
+{
+  unsigned i;
+  int j, addr_mod;
+  unsigned compatible_pipes;
+  const struct bundle_template *match;
+  char *f;
+
+  inside_bundle = 0;
+
+  switch (current_bundle_index)
+    {
+    case 0:
+      /* No instructions.  */
+      return;
+    case 1:
+      if (current_bundle[0].opcode->can_bundle)
+	{
+	  /* Simplify later logic by adding an explicit fnop.  */
+	  prepend_nop_to_bundle (TILEPRO_OPC_FNOP);
+	}
+      else
+	{
+	  /* This instruction cannot be bundled with anything else.
+	     Prepend an explicit 'nop', rather than an 'fnop', because
+	     fnops can be replaced by later binary-processing tools
+	     while nops cannot.  */
+	  prepend_nop_to_bundle (TILEPRO_OPC_NOP);
+	}
+      break;
+    default:
+      if (!allow_suspicious_bundles)
+	{
+	  /* Make sure all instructions can be bundled with other
+	     instructions.  */
+	  const struct tilepro_opcode *cannot_bundle = NULL;
+	  bfd_boolean seen_non_nop = FALSE;
+
+	  for (j = 0; j < current_bundle_index; j++)
+	    {
+	      const struct tilepro_opcode *op = current_bundle[j].opcode;
+
+	      if (!op->can_bundle && cannot_bundle == NULL)
+		cannot_bundle = op;
+	      else if (op->mnemonic != TILEPRO_OPC_NOP
+		       && op->mnemonic != TILEPRO_OPC_INFO
+		       && op->mnemonic != TILEPRO_OPC_INFOL)
+		seen_non_nop = TRUE;
+	    }
+
+	  if (cannot_bundle != NULL && seen_non_nop)
+	    {
+	      current_bundle_index = 0;
+	      as_bad (_("'%s' may not be bundled with other instructions."),
+		      cannot_bundle->name);
+	      return;
+	    }
+	}
+      break;
+    }
+
+  compatible_pipes =
+    BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
+                         current_bundle[1].opcode->pipes,
+                         (current_bundle_index == 3
+                          ? current_bundle[2].opcode->pipes
+                          : (1 << NO_PIPELINE)));
+
+  /* Find a template that works, if any.  */
+  match = NULL;
+  for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
+    {
+      const struct bundle_template *b = &bundle_templates[i];
+      if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
+	{
+	  match = b;
+	  break;
+	}
+    }
+
+  if (match == NULL)
+    {
+      current_bundle_index = 0;
+      as_bad (_("Invalid combination of instructions for bundle."));
+      return;
+    }
+
+  /* If the section seems to have no alignment set yet, go ahead and
+     make it large enough to hold code.  */
+  if (bfd_get_section_alignment (stdoutput, now_seg) == 0)
+    bfd_set_section_alignment (stdoutput, now_seg,
+                               TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
+
+  for (j = 0; j < current_bundle_index; j++)
+    current_bundle[j].pipe = match->pipe[j];
+
+  if (current_bundle_index == 2 && !tilepro_is_x_pipeline(match->pipe[0]))
+    {
+      /* We are in Y mode with only two instructions, so add an FNOP.  */
+      prepend_nop_to_bundle (TILEPRO_OPC_FNOP);
+
+      /* Figure out what pipe the fnop must be in via arithmetic.
+       * p0 + p1 + p2 must sum to the sum of TILEPRO_PIPELINE_Y[012].  */
+      current_bundle[0].pipe =
+	(tilepro_pipeline)((TILEPRO_PIPELINE_Y0
+			    + TILEPRO_PIPELINE_Y1
+			    + TILEPRO_PIPELINE_Y2) -
+			   (current_bundle[1].pipe + current_bundle[2].pipe));
+    }
+
+  check_illegal_reg_writes ();
+
+  f = frag_more (TILEPRO_BUNDLE_SIZE_IN_BYTES);
+
+  /* Check to see if this bundle is at an offset that is a multiple of 8-bytes
+     from the start of the frag.  */
+  addr_mod = frag_now_fix () & (TILEPRO_BUNDLE_ALIGNMENT_IN_BYTES - 1);
+  if (frag_now->has_code && frag_now->insn_addr != addr_mod)
+    as_bad (_("instruction address is not a multiple of 8"));
+  frag_now->insn_addr = addr_mod;
+  frag_now->has_code = 1;
+
+  tilepro_bundle_bits bits = 0;
+  for (j = 0; j < current_bundle_index; j++)
+    {
+      struct tilepro_instruction *instr = &current_bundle[j];
+      tilepro_pipeline pipeline = instr->pipe;
+      const struct tilepro_opcode *opcode = instr->opcode;
+
+      bits |= emit_tilepro_instruction (opcode->fixed_bit_values[pipeline],
+					opcode->num_operands,
+					&opcode->operands[pipeline][0],
+					instr->operand_values,
+					f);
+    }
+
+  number_to_chars_littleendian (f, (unsigned int)bits, 4);
+  number_to_chars_littleendian (f + 4, (unsigned int)(bits >> 32), 4);
+  current_bundle_index = 0;
+
+  /* Emit DWARF2 debugging information.  */
+  dwarf2_emit_insn (TILEPRO_BUNDLE_SIZE_IN_BYTES);
+}
+
+
+/* Extend the expression parser to handle hi16(label), etc.
+   as well as SPR names when in the context of parsing an SPR.  */
+int
+tilepro_parse_name (char *name, expressionS *e, char *nextcharP)
+{
+  operatorT op = O_illegal;
+
+  if (parsing_spr)
+    {
+      void *val = hash_find (spr_hash, name);
+      if (val == NULL)
+	return 0;
+
+      memset (e, 0, sizeof *e);
+      e->X_op = O_constant;
+      e->X_add_number = ((const struct tilepro_spr *)val)->number;
+      return 1;
+    }
+
+  if (*nextcharP != '(')
+    {
+      /* hi16, etc. not followed by a paren is just a label with that
+	 name.  */
+      return 0;
+    }
+  else
+    {
+      /* Look up the operator in our table.  */
+      void *val = hash_find (special_operator_hash, name);
+      if (val == 0)
+	return 0;
+      op = (operatorT)(long)val;
+    }
+
+  /* Restore old '(' and skip it.  */
+  *input_line_pointer = '(';
+  ++input_line_pointer;
+
+  expression (e);
+
+  if (*input_line_pointer != ')')
+    {
+      as_bad (_("Missing ')'"));
+      *nextcharP = *input_line_pointer;
+      return 0;
+    }
+  /* Skip ')'.  */
+  ++input_line_pointer;
+
+  if (e->X_op == O_register || e->X_op == O_absent)
+    {
+      as_bad (_("Invalid expression."));
+      e->X_op = O_constant;
+      e->X_add_number = 0;
+    }
+  else
+    {
+      /* Wrap subexpression with a unary operator.  */
+      symbolS *sym = make_expr_symbol (e);
+
+      if (sym != e->X_add_symbol)
+	{
+	  /* HACK: mark this symbol as a temporary wrapper around a proper
+	     expression, so we can unwrap it later once we have communicated
+	     the relocation type.  */
+	  sym->sy_value.X_md = 1;
+	}
+
+      memset (e, 0, sizeof *e);
+      e->X_op = op;
+      e->X_add_symbol = sym;
+      e->X_add_number = 0;
+    }
+
+  *nextcharP = *input_line_pointer;
+  return 1;
+}
+
+
+/* Parses an expression which must be a register name.  */
+
+static void
+parse_reg_expression (expressionS* expression)
+{
+  /* Zero everything to make sure we don't miss any flags.  */
+  memset (expression, 0, sizeof *expression);
+
+  char* regname = input_line_pointer;
+  char terminating_char = get_symbol_end ();
+
+  void* pval = hash_find (main_reg_hash, regname);
+
+  if (pval == NULL)
+    as_bad (_("Expected register, got '%s'."), regname);
+
+  int regno_and_flags = (int)(size_t)pval;
+  int regno = EXTRACT_REGNO(regno_and_flags);
+
+  if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
+      && require_canonical_reg_names)
+    as_warn (_("Found use of non-canonical register name %s; "
+	       "use %s instead."),
+	       regname, tilepro_register_names[regno]);
+
+  /* Restore the old character following the register name.  */
+  *input_line_pointer = terminating_char;
+
+  /* Fill in the expression fields to indicate it's a register.  */
+  expression->X_op = O_register;
+  expression->X_add_number = regno;
+}
+
+
+/* Parses and type-checks comma-separated operands in input_line_pointer.  */
+static void
+parse_operands (const char *opcode_name,
+                const unsigned char *operands,
+                int num_operands,
+                expressionS *operand_values)
+{
+  int i;
+
+  memset (operand_values, 0, num_operands * sizeof operand_values[0]);
+
+  SKIP_WHITESPACE ();
+  for (i = 0; i < num_operands; i++)
+    {
+      tilepro_operand_type type = tilepro_operands[operands[i]].type;
+
+      SKIP_WHITESPACE ();
+
+      if (type == TILEPRO_OP_TYPE_REGISTER)
+	{
+	  parse_reg_expression (&operand_values[i]);
+	}
+      else if (*input_line_pointer == '}')
+	{
+	  operand_values[i].X_op = O_absent;
+	}
+      else if (type == TILEPRO_OP_TYPE_SPR)
+	{
+	  /* Modify the expression parser to add SPRs to the namespace.  */
+	  parsing_spr = 1;
+	  expression (&operand_values[i]);
+	  parsing_spr = 0;
+	}
+      else
+	{
+	  expression (&operand_values[i]);
+	}
+
+      SKIP_WHITESPACE ();
+
+      if (i + 1 < num_operands)
+	{
+	  int separator = (unsigned char)*input_line_pointer++;
+
+	  if (is_end_of_line[separator] || (separator == '}'))
+	    {
+	      as_bad (_("Too few operands to '%s'."), opcode_name);
+	      return;
+	    }
+	  else if (separator != ',')
+	    {
+	      as_bad (_("Unexpected character '%c' after operand %d to %s."),
+		      (char)separator, i + 1, opcode_name);
+	      return;
+	    }
+	}
+
+      /* Arbitrarily use the first valid pipe to get the operand type,
+	 since they are all the same.  */
+      switch (tilepro_operands[operands[i]].type)
+	{
+	case TILEPRO_OP_TYPE_REGISTER:
+	  /* Handled in parse_reg_expression already.  */
+	  break;
+	case TILEPRO_OP_TYPE_SPR:
+	  /* Fall through  */
+	case TILEPRO_OP_TYPE_IMMEDIATE:
+	  /* Fall through  */
+	case TILEPRO_OP_TYPE_ADDRESS:
+	  if (   operand_values[i].X_op == O_register
+	      || operand_values[i].X_op == O_illegal
+	      || operand_values[i].X_op == O_absent)
+	    as_bad (_("Expected immediate expression"));
+	  break;
+	default:
+	  abort ();
+	}
+    }
+
+  if (!is_end_of_line[(unsigned char)*input_line_pointer])
+    {
+      switch (*input_line_pointer)
+	{
+	case '}':
+	  if (!inside_bundle)
+	    as_bad (_("Found '}' when not bundling."));
+	  ++input_line_pointer;
+	  inside_bundle = 0;
+	  demand_empty_rest_of_line ();
+	  break;
+
+	case ',':
+	  as_bad (_("Too many operands"));
+	  break;
+
+	default:
+	  /* Use default error for unrecognized garbage.  */
+	  demand_empty_rest_of_line ();
+	  break;
+	}
+    }
+}
+
+
+/* This is the guts of the machine-dependent assembler.  STR points to a
+   machine dependent instruction.  This function is supposed to emit
+   the frags/bytes it assembles to.  */
+void
+md_assemble (char *str)
+{
+  char old_char;
+  size_t opname_len;
+  char *old_input_line_pointer;
+  const struct tilepro_opcode *op;
+  int first_pipe;
+
+  /* Split off the opcode and look it up.  */
+  opname_len = strcspn (str, " {}");
+  old_char = str[opname_len];
+  str[opname_len] = '\0';
+
+  op = hash_find(op_hash, str);
+  str[opname_len] = old_char;
+  if (op == NULL)
+    {
+      as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
+      return;
+    }
+
+  /* Prepare to parse the operands.  */
+  old_input_line_pointer = input_line_pointer;
+  input_line_pointer = str + opname_len;
+  SKIP_WHITESPACE ();
+
+  if (current_bundle_index == TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE)
+    {
+      as_bad (_("Too many instructions for bundle."));
+      tilepro_flush_bundle ();
+    }
+
+  /* Make sure we have room for the upcoming bundle before we
+     create any fixups. Otherwise if we have to switch to a new
+     frag the fixup dot_value fields will be wrong.  */
+  frag_grow (TILEPRO_BUNDLE_SIZE_IN_BYTES);
+
+  /* Find a valid pipe for this opcode. */
+  for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
+    ;
+
+  /* Call the function that assembles this instruction.  */
+  current_bundle[current_bundle_index].opcode = op;
+  parse_operands (op->name,
+                  &op->operands[first_pipe][0],
+                  op->num_operands,
+                  current_bundle[current_bundle_index].operand_values);
+  ++current_bundle_index;
+
+  /* Restore the saved value of input_line_pointer.  */
+  input_line_pointer = old_input_line_pointer;
+
+  /* If we weren't inside curly braces, go ahead and emit
+     this lone instruction as a bundle right now.  */
+  if (!inside_bundle)
+    tilepro_flush_bundle ();
+}
+
+static void
+s_require_canonical_reg_names (int require)
+{
+  demand_empty_rest_of_line ();
+  require_canonical_reg_names = require;
+}
+
+static void
+s_allow_suspicious_bundles (int allow)
+{
+  demand_empty_rest_of_line ();
+  allow_suspicious_bundles = allow;
+}
+
+const pseudo_typeS md_pseudo_table[] =
+{
+  {"align", s_align_bytes, 0},	/* Defaulting is invalid (0).  */
+  {"word", cons, 4},
+  {"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
+  {"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
+  {"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
+  {"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
+  { NULL, 0, 0 }
+};
+
+/* Equal to MAX_PRECISION in atof-ieee.c  */
+#define MAX_LITTLENUMS 6
+
+/* Turn the string pointed to by litP into a floating point constant
+   of type TYPE, and emit the appropriate bytes.  The number of
+   LITTLENUMS emitted is stored in *SIZEP.  An error message is
+   returned, or NULL on OK.  */
+
+char *
+md_atof (int type, char *litP, int *sizeP)
+{
+  int prec;
+  LITTLENUM_TYPE words[MAX_LITTLENUMS];
+  LITTLENUM_TYPE *wordP;
+  char *t;
+
+  switch (type)
+    {
+    case 'f':
+    case 'F':
+      prec = 2;
+      break;
+
+    case 'd':
+    case 'D':
+      prec = 4;
+      break;
+
+    default:
+      *sizeP = 0;
+      return _("Bad call to md_atof ()");
+    }
+  t = atof_ieee (input_line_pointer, type, words);
+  if (t)
+    input_line_pointer = t;
+
+  *sizeP = prec * sizeof (LITTLENUM_TYPE);
+  /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
+     the bigendian 386.  */
+  for (wordP = words + prec - 1; prec--;)
+    {
+      md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
+      litP += sizeof (LITTLENUM_TYPE);
+    }
+  return 0;
+}
+
+
+/* We have no need to default values of symbols.  */
+
+symbolS *
+md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
+{
+  return NULL;
+}
+
+
+void
+tilepro_cons_fix_new (fragS *frag,
+		      int where,
+		      int nbytes,
+		      expressionS *exp)
+{
+  expressionS subexp;
+  bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
+  int no_overflow = 0;
+  fixS *fixP;
+
+  /* See if it's one of our special functions.  */
+  switch (exp->X_op)
+    {
+    case O_lo16:
+      reloc = BFD_RELOC_LO16;
+      no_overflow = 1;
+      break;
+    case O_hi16:
+      reloc = BFD_RELOC_HI16;
+      no_overflow = 1;
+      break;
+    case O_ha16:
+      reloc = BFD_RELOC_HI16_S;
+      no_overflow = 1;
+      break;
+
+    default:
+      /* Do nothing.  */
+      break;
+    }
+
+  if (reloc != BFD_RELOC_NONE)
+    {
+      if (nbytes != 2)
+	{
+	  as_bad (_("This operator only produces two byte values."));
+	  nbytes = 2;
+	}
+
+      memset (&subexp, 0, sizeof subexp);
+      subexp.X_op = O_symbol;
+      subexp.X_add_symbol = exp->X_add_symbol;
+      exp = &subexp;
+    }
+  else
+    {
+      switch (nbytes)
+	{
+	case 1:
+	  reloc = BFD_RELOC_8;
+	  break;
+	case 2:
+	  reloc = BFD_RELOC_16;
+	  break;
+	case 4:
+	  reloc = BFD_RELOC_32;
+	  break;
+	case 8:
+	  reloc = BFD_RELOC_64;
+	  break;
+	default:
+	  as_bad (_("unsupported BFD relocation size %d"), nbytes);
+	  reloc = BFD_RELOC_32;
+	  break;
+	}
+    }
+
+  fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
+  fixP->tc_fix_data = NULL;
+  fixP->fx_no_overflow |= no_overflow;
+}
+
+
+void
+md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
+{
+  const struct tilepro_operand *operand;
+  valueT value = *valP;
+  char *p;
+
+  /* Leave these for the linker.  */
+  if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+      || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
+    return;
+
+  if (fixP->fx_subsy != (symbolS *) NULL)
+    {
+      /* We can't actually support subtracting a symbol.  */
+      as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
+    }
+
+  /* Correct relocation types for pc-relativeness.  */
+  switch (fixP->fx_r_type)
+    {
+#define FIX_PCREL(rtype)                        \
+      case rtype:				\
+	if (fixP->fx_pcrel)			\
+	  fixP->fx_r_type = rtype##_PCREL;	\
+      break;					\
+                                                \
+    case rtype##_PCREL:				\
+      if (!fixP->fx_pcrel)			\
+	fixP->fx_r_type = rtype;		\
+      break
+
+      FIX_PCREL (BFD_RELOC_8);
+      FIX_PCREL (BFD_RELOC_16);
+      FIX_PCREL (BFD_RELOC_32);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X0);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X1);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X0_LO);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X1_LO);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X0_HI);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X1_HI);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X0_HA);
+      FIX_PCREL (BFD_RELOC_TILEPRO_IMM16_X1_HA);
+
+#undef FIX_PCREL
+
+    default:
+      /* Do nothing */
+      break;
+    }
+
+  if (fixP->fx_addsy != NULL)
+    {
+#ifdef OBJ_ELF
+      switch (fixP->fx_r_type)
+	{
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA:
+	case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA:
+	case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA:
+	case BFD_RELOC_TILEPRO_TLS_DTPMOD32:
+	case BFD_RELOC_TILEPRO_TLS_DTPOFF32:
+	case BFD_RELOC_TILEPRO_TLS_TPOFF32:
+	  S_SET_THREAD_LOCAL (fixP->fx_addsy);
+	  break;
+
+	default:
+	  /* Do nothing */
+	  break;
+	}
+#endif
+      return;
+    }
+
+  /* Apply lo16, hi16, ha16, etc. munging. */
+  switch (fixP->fx_r_type)
+    {
+    case BFD_RELOC_TILEPRO_IMM16_X0_GOT:
+    case BFD_RELOC_TILEPRO_IMM16_X1_GOT:
+      *valP = value = apply_special_operator (O_got, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO:
+    case BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO:
+      *valP = value = apply_special_operator (O_got_lo16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI:
+    case BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI:
+      *valP = value = apply_special_operator (O_got_hi16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA:
+    case BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA:
+      *valP = value = apply_special_operator (O_got_ha16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD:
+      *valP = value = apply_special_operator (O_tls_gd, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE:
+      *valP = value = apply_special_operator (O_tls_ie, value);
+      break;
+
+    case BFD_RELOC_LO16:
+    case BFD_RELOC_TILEPRO_IMM16_X0_LO:
+    case BFD_RELOC_TILEPRO_IMM16_X1_LO:
+    case BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL:
+    case BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL:
+      *valP = value = apply_special_operator (O_lo16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO:
+      *valP = value = apply_special_operator (O_tls_gd_lo16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO:
+      *valP = value = apply_special_operator (O_tls_ie_lo16, value);
+      break;
+
+    case BFD_RELOC_HI16:
+    case BFD_RELOC_TILEPRO_IMM16_X0_HI:
+    case BFD_RELOC_TILEPRO_IMM16_X1_HI:
+    case BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL:
+    case BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL:
+      *valP = value = apply_special_operator (O_hi16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI:
+      *valP = value = apply_special_operator (O_tls_gd_hi16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI:
+      *valP = value = apply_special_operator (O_tls_ie_hi16, value);
+      break;
+
+    case BFD_RELOC_HI16_S:
+    case BFD_RELOC_TILEPRO_IMM16_X0_HA:
+    case BFD_RELOC_TILEPRO_IMM16_X1_HA:
+    case BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL:
+    case BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL:
+      *valP = value = apply_special_operator (O_ha16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA:
+      *valP = value = apply_special_operator (O_tls_gd_ha16, value);
+      break;
+
+    case BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA:
+    case BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA:
+      *valP = value = apply_special_operator (O_tls_ie_ha16, value);
+      break;
+
+    default:
+      /* Do nothing  */
+      break;
+    }
+
+  p = fixP->fx_frag->fr_literal + fixP->fx_where;
+
+  operand = fixP->tc_fix_data;
+  if (operand != NULL)
+    {
+      /* It's an instruction operand.  */
+      tilepro_bundle_bits bits =
+	insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
+
+      /* Note that we might either be writing out bits for a bundle or a
+	 static network instruction, which are different sizes, so it's
+	 important to stop touching memory once we run out of bits.  ORing in
+	 values is OK since we know the existing bits for this operand are
+	 zero.  */
+      for (; bits != 0; bits >>= 8)
+	*p++ |= (char)bits;
+    }
+  else
+    {
+      /* Some other kind of relocation.  */
+      switch (fixP->fx_r_type)
+	{
+	case BFD_RELOC_8:
+	case BFD_RELOC_8_PCREL:
+	  md_number_to_chars (p, value, 1);
+	  break;
+
+	case BFD_RELOC_16:
+	case BFD_RELOC_16_PCREL:
+	  md_number_to_chars (p, value, 2);
+	  break;
+
+	case BFD_RELOC_32:
+	case BFD_RELOC_32_PCREL:
+	  md_number_to_chars (p, value, 4);
+	  break;
+
+	default:
+	  /* Leave it for the linker.  */
+	  return;
+	}
+    }
+
+  fixP->fx_done = 1;
+}
+
+
+/* Generate the BFD reloc to be stuck in the object file from the
+   fixup used internally in the assembler.  */
+
+arelent *
+tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
+{
+  arelent *reloc;
+
+  reloc = (arelent *) xmalloc (sizeof (arelent));
+  reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
+  *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
+  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
+
+  /* Make sure none of our internal relocations make it this far.
+     They'd better have been fully resolved by this point.  */
+  gas_assert ((int) fixp->fx_r_type > 0);
+
+  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
+  if (reloc->howto == NULL)
+    {
+      as_bad_where (fixp->fx_file, fixp->fx_line,
+		    _("cannot represent `%s' relocation in object file"),
+		    bfd_get_reloc_code_name (fixp->fx_r_type));
+      return NULL;
+    }
+
+  if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
+    {
+      as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
+		bfd_get_reloc_code_name (fixp->fx_r_type),
+                fixp->fx_pcrel, reloc->howto->pc_relative);
+    }
+  gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
+
+  reloc->addend = fixp->fx_offset;
+
+  return reloc;
+}
+
+
+/* The location from which a PC relative jump should be calculated,
+   given a PC relative reloc.  */
+
+long
+md_pcrel_from (fixS *fixP)
+{
+  return fixP->fx_frag->fr_address + fixP->fx_where;
+}
+
+
+/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
+   a section symbol plus some offset.  */
+int
+tilepro_fix_adjustable (fixS *fix)
+{
+  /* Prevent all adjustments to global symbols  */
+  if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
+    return 0;
+
+  return 1;
+}
+
+
+int
+tilepro_unrecognized_line (int ch)
+{
+  switch (ch)
+    {
+    case '{':
+      if (inside_bundle)
+	{
+	  as_bad (_("Found '{' when already bundling."));
+	}
+      else
+	{
+	  inside_bundle = 1;
+	  current_bundle_index = 0;
+	}
+      return 1;
+
+    case '}':
+      if (!inside_bundle)
+	{
+	  as_bad (_("Found '}' when not bundling."));
+	}
+      else
+	{
+	  tilepro_flush_bundle ();
+	}
+
+      /* Allow '{' to follow on the same line.  We also allow ";;", but that
+	 happens automatically because ';' is an end of line marker.  */
+      SKIP_WHITESPACE ();
+      if (input_line_pointer[0] == '{')
+	{
+	  input_line_pointer++;
+	  return tilepro_unrecognized_line ('{');
+	}
+
+      demand_empty_rest_of_line ();
+      return 1;
+
+    default:
+      break;
+    }
+
+  /* Not a valid line.  */
+  return 0;
+}
+
+
+/* This is called from HANDLE_ALIGN in write.c.  Fill in the contents
+   of an rs_align_code fragment.  */
+
+void
+tilepro_handle_align (fragS *fragp)
+{
+  int bytes, fix;
+  char *p;
+
+  if (fragp->fr_type != rs_align_code)
+    return;
+
+  bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
+  p = fragp->fr_literal + fragp->fr_fix;
+  fix = 0;
+
+  /* Determine the bits for NOP.  */
+  const struct tilepro_opcode *nop_opcode =
+    &tilepro_opcodes[TILEPRO_OPC_NOP];
+  tilepro_bundle_bits nop =
+    (  nop_opcode->fixed_bit_values[TILEPRO_PIPELINE_X0]
+       | nop_opcode->fixed_bit_values[TILEPRO_PIPELINE_X1]);
+
+  if ((bytes & (TILEPRO_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
+    {
+      fix = bytes & (TILEPRO_BUNDLE_SIZE_IN_BYTES - 1);
+      memset (p, 0, fix);
+      p += fix;
+      bytes -= fix;
+    }
+
+  number_to_chars_littleendian (p, (unsigned int)nop, 4);
+  number_to_chars_littleendian (p + 4, (unsigned int)(nop >> 32), 4);
+  fragp->fr_fix += fix;
+  fragp->fr_var = TILEPRO_BUNDLE_SIZE_IN_BYTES;
+}
+
+/* Standard calling conventions leave the CFA at SP on entry.  */
+void
+tilepro_cfi_frame_initial_instructions (void)
+{
+  cfi_add_CFA_def_cfa_register (54);
+}
+
+int
+tc_tilepro_regname_to_dw2regnum (char *regname)
+{
+  int i;
+
+  for (i = 0; i < TILEPRO_NUM_REGISTERS; i++)
+    {
+      if (!strcmp (regname, tilepro_register_names[i]))
+	return i;
+    }
+
+  return -1;
+}
diff --git a/gas/config/tc-tilepro.h b/gas/config/tc-tilepro.h
new file mode 100644
index 0000000..5374d26
--- /dev/null
+++ b/gas/config/tc-tilepro.h
@@ -0,0 +1,93 @@
+/* tc-tile.h - Macros and type defines for a TILEPro chip.
+   Copyright 2011 Free Software Foundation, Inc.
+
+   This file is part of GAS, the GNU Assembler.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#ifndef TC_TILEPRO
+
+#include "opcode/tilepro.h"
+
+#define TC_TILEPRO
+
+#define TARGET_BYTES_BIG_ENDIAN 0
+
+#define WORKING_DOT_WORD
+
+#define TARGET_ARCH	bfd_arch_tilepro
+
+#define TARGET_FORMAT	"elf32-tilepro"
+
+
+#define DWARF2_LINE_MIN_INSN_LENGTH	8
+
+#define md_number_to_chars		number_to_chars_littleendian
+
+#define DIFF_EXPR_OK   /* foo-. gets turned into PC relative relocs */
+
+#define HANDLE_ALIGN(fragp) tilepro_handle_align (fragp)
+extern void tilepro_handle_align (struct frag *);
+
+#define MAX_MEM_FOR_RS_ALIGN_CODE (7 + 8)
+
+struct tilepro_operand;
+#define TC_FIX_TYPE const struct tilepro_operand *
+
+/* Initialize the TC_FIX_TYPE field.  */
+#define TC_INIT_FIX_DATA(FIX) \
+  FIX->tc_fix_data = 0
+
+extern void tilepro_cons_fix_new (struct frag *, int,
+				  int, struct expressionS *);
+
+#define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP)	\
+  tilepro_cons_fix_new (FRAG, WHERE, NBYTES, EXP)
+
+extern int tilepro_parse_name (char *, expressionS *, char *);
+#define md_parse_name(name, e, m, nextP) tilepro_parse_name (name, e, nextP)
+
+extern int tilepro_fix_adjustable (struct fix *);
+#define tc_fix_adjustable(FIX)   tilepro_fix_adjustable (FIX)
+
+extern int tilepro_unrecognized_line (int);
+#define tc_unrecognized_line(ch) tilepro_unrecognized_line (ch)
+
+/* Values passed to md_apply_fix3 don't include the symbol value.  */
+#define MD_APPLY_SYM_VALUE(FIX) 0
+
+#define md_convert_frag(b,s,f) \
+  as_fatal ("tilepro convert_frag called")
+#define md_estimate_size_before_relax(f,s) \
+  (as_fatal ("tilepro estimate_size_before_relax called"),1)
+#define md_operand(x)
+
+#define md_section_align(seg,size)	(size)
+
+/* We want .cfi_* pseudo-ops for generating unwind info.  */
+#define TARGET_USE_CFIPOP 1
+
+#define tc_cfi_frame_initial_instructions \
+  tilepro_cfi_frame_initial_instructions
+extern void tilepro_cfi_frame_initial_instructions (void);
+
+#define tc_regname_to_dw2regnum tc_tilepro_regname_to_dw2regnum
+extern int tc_tilepro_regname_to_dw2regnum (char *);
+
+#define DWARF2_DEFAULT_RETURN_COLUMN  55
+#define DWARF2_CIE_DATA_ALIGNMENT     (-4)
+
+#endif /* TC_TILEPRO */
diff --git a/gas/configure.tgt b/gas/configure.tgt
index d3b338c..a171a32 100644
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -399,6 +399,8 @@ case ${generic_target} in
   tic54x-*-* | c54x*-*-*)		fmt=coff bfd_gas=yes need_libm=yes;;
   tic6x-*-*)				fmt=elf ;;
 
+  tilepro-*-* | tilegx-*-*)		fmt=elf ;;
+
   v850*-*-*)				fmt=elf ;;
 
   vax-*-netbsdelf*)			fmt=elf em=nbsd ;;
diff --git a/gas/doc/Makefile.am b/gas/doc/Makefile.am
index a982a88..6af117f 100644
--- a/gas/doc/Makefile.am
+++ b/gas/doc/Makefile.am
@@ -66,6 +66,8 @@ CPU_DOCS = \
 	c-sparc.texi \
         c-tic54x.texi \
         c-tic6x.texi \
+	c-tilegx.texi \
+	c-tilepro.texi \
 	c-vax.texi \
 	c-v850.texi \
 	c-xtensa.texi \
diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in
index 8a7cea5..d6ecb02 100644
--- a/gas/doc/Makefile.in
+++ b/gas/doc/Makefile.in
@@ -306,6 +306,8 @@ CPU_DOCS = \
 	c-sparc.texi \
         c-tic54x.texi \
         c-tic6x.texi \
+	c-tilegx.texi \
+	c-tilepro.texi \
 	c-vax.texi \
 	c-v850.texi \
 	c-xtensa.texi \
diff --git a/gas/doc/all.texi b/gas/doc/all.texi
index d250b63..efea936 100644
--- a/gas/doc/all.texi
+++ b/gas/doc/all.texi
@@ -66,6 +66,8 @@
 @set SPARC
 @set TIC54X
 @set TIC6X
+@set TILEGX
+@set TILEPRO
 @set V850
 @set VAX
 @set XTENSA
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index bb7f063..7313b16 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -487,6 +487,14 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{-mdsbt}|@b{-mno-dsbt}] [@b{-mpid=no}|@b{-mpid=near}|@b{-mpid=far}]
    [@b{-mpic}|@b{-mno-pic}]
 @end ifset
+@ifset TILEGX
+
+@emph{Target TILE-Gx options:}
+   [@b{-m32}|@b{-m64}]
+@end ifset
+@ifset TILEPRO
+@c TILEPro has no machine-dependent assembler options
+@end ifset
 
 @ifset XTENSA
 
@@ -1364,6 +1372,25 @@ TMS320C6000 processor.
 
 @end ifset
 
+@ifset TILEGX
+
+@ifclear man
+@xref{TILE-Gx Options}, for the options available when @value{AS} is configured
+for a TILE-Gx processor.
+@end ifclear
+
+@ifset man
+@c man begin OPTIONS
+The following options are available when @value{AS} is configured for a TILE-Gx
+processor.
+@c man end
+@c man begin INCLUDE
+@include c-tilegx.texi
+@c ended inside the included file
+@end ifset
+
+@end ifset
+
 @ifset XTENSA
 
 @ifclear man
@@ -6881,6 +6908,12 @@ subject, see the hardware manufacturer's manual.
 @ifset TIC6X
 * TIC6X-Dependent ::            TI TMS320C6x Dependent Features
 @end ifset
+@ifset TILEGX
+* TILE-Gx-Dependent ::          Tilera TILE-Gx Dependent Features
+@end ifset
+@ifset TILEPRO
+* TILEPro-Dependent ::          Tilera TILEPro Dependent Features
+@end ifset
 @ifset V850
 * V850-Dependent::              V850 Dependent Features
 @end ifset
@@ -7076,6 +7109,14 @@ family.
 @include c-tic6x.texi
 @end ifset
 
+@ifset TILEGX
+@include c-tilegx.texi
+@end ifset
+
+@ifset TILEPRO
+@include c-tilepro.texi
+@end ifset
+
 @ifset Z80
 @include c-z80.texi
 @end ifset
diff --git a/gas/doc/c-tilegx.texi b/gas/doc/c-tilegx.texi
new file mode 100644
index 0000000..66dd5a3
--- /dev/null
+++ b/gas/doc/c-tilegx.texi
@@ -0,0 +1,369 @@
+@c Copyright 2011
+@c Free Software Foundation, Inc.
+@c This is part of the GAS manual.
+@c For copying conditions, see the file as.texinfo.
+@c man end
+
+@ifset GENERIC
+@page
+@node TILE-Gx-Dependent
+@chapter TILE-Gx Dependent Features
+@end ifset
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter TILE-Gx Dependent Features
+@end ifclear
+
+@cindex TILE-Gx support
+@menu
+* TILE-Gx Options::		TILE-Gx Options
+* TILE-Gx Syntax::		TILE-Gx Syntax
+* TILE-Gx Directives::		TILE-Gx Directives
+@end menu
+
+@node TILE-Gx Options
+@section Options
+
+The following table lists all available TILE-Gx specific options:
+
+@c man begin OPTIONS
+@table @gcctabopt
+@cindex @samp{-m32} option, TILE-Gx
+@cindex @samp{-m64} option, TILE-Gx
+@item -m32 | -m64
+Select the word size, either 32 bits or 64 bits.
+
+@end table
+@c man end
+
+@node TILE-Gx Syntax
+@section Syntax
+@cindex TILE-Gx syntax
+@cindex syntax, TILE-Gx
+
+Block comments are delimited by @samp{/*} and @samp{*/}.  End of line
+comments may be introduced by @samp{#}.
+
+Instructions consist of a leading opcode or macro name followed by
+whitespace and an optional comma-separated list of operands:
+
+@smallexample
+@var{opcode} [@var{operand}, @dots{}]
+@end smallexample
+
+Instructions must be separated by a newline or semicolon.
+
+There are two ways to write code: either write naked instructions,
+which the assembler is free to combine into VLIW bundles, or specify
+the VLIW bundles explicitly.
+
+Bundles are specified using curly braces:
+
+@smallexample
+@{ @var{add} r3,r4,r5 ; @var{add} r7,r8,r9 ; @var{lw} r10,r11 @}
+@end smallexample
+
+A bundle can span multiple lines. If you want to put multiple
+instructions on a line, whether in a bundle or not, you need to
+separate them with semicolons as in this example.
+
+A bundle may contain one or more instructions, up to the limit
+specified by the ISA (currently three). If fewer instructions are
+specified than the hardware supports in a bundle, the assembler
+inserts @code{fnop} instructions automatically.
+
+The assembler will prefer to preserve the ordering of instructions
+within the bundle, putting the first instruction in a lower-numbered
+pipeline than the next one, etc.  This fact, combined with the
+optional use of explicit @code{fnop} or @code{nop} instructions,
+allows precise control over which pipeline executes each instruction.
+
+If the instructions cannot be bundled in the listed order, the
+assembler will automatically try to find a valid pipeline
+assignment. If there is no way to bundle the instructions together,
+the assembler reports an error.
+
+The assembler does not yet auto-bundle (automatically combine multiple
+instructions into one bundle), but it reserves the right to do so in
+the future.  If you want to force an instruction to run by itself, put
+it in a bundle explicitly with curly braces and use @code{nop}
+instructions (not @code{fnop}) to fill the remaining pipeline slots in
+that bundle.
+
+@menu
+* TILE-Gx Opcodes::              Opcode Naming Conventions.
+* TILE-Gx Registers::            Register Naming.
+* TILE-Gx Modifiers::            Symbolic Operand Modifiers.
+@end menu
+
+@node TILE-Gx Opcodes
+@subsection Opcode Names
+@cindex TILE-Gx opcode names
+@cindex opcode names, TILE-Gx
+
+For a complete list of opcodes and descriptions of their semantics,
+see @cite{TILE-Gx Instruction Set Architecture}, available upon
+request at www.tilera.com.
+
+@node TILE-Gx Registers
+@subsection Register Names
+@cindex TILE-Gx register names
+@cindex register names, TILE-Gx
+
+General-purpose registers are represented by predefined symbols of the
+form @samp{r@var{N}}, where @var{N} represents a number between
+@code{0} and @code{63}.  However, the following registers have
+canonical names that must be used instead:
+
+@table @code
+@item r54
+sp
+
+@item r55
+lr
+
+@item r56
+sn
+
+@item r57
+idn0
+
+@item r58
+idn1
+
+@item r59
+udn0
+
+@item r60
+udn1
+
+@item r61
+udn2
+
+@item r62
+udn3
+
+@item r63
+zero
+
+@end table
+
+The assembler will emit a warning if a numeric name is used instead of
+the non-numeric name.  The @code{.no_require_canonical_reg_names}
+assembler pseudo-op turns off this
+warning. @code{.require_canonical_reg_names} turns it back on.
+
+@node TILE-Gx Modifiers
+@subsection Symbolic Operand Modifiers
+@cindex TILE-Gx modifiers
+@cindex symbol modifiers, TILE-Gx
+
+The assembler supports several modifiers when using symbol addresses
+in TILE-Gx instruction operands.  The general syntax is the following:
+
+@smallexample
+modifier(symbol)
+@end smallexample
+
+The following modifiers are supported:
+
+@table @code
+
+@item hw0
+
+This modifier is used to load bits 0-15 of the symbol's address.
+
+@item hw1
+
+This modifier is used to load bits 16-31 of the symbol's address.
+
+@item hw2
+
+This modifier is used to load bits 32-47 of the symbol's address.
+
+@item hw3
+
+This modifier is used to load bits 48-63 of the symbol's address.
+
+@item hw0_last
+
+This modifier yields the same value as @code{hw0}, but it also checks
+that the value does not overflow.
+
+@item hw1_last
+
+This modifier yields the same value as @code{hw1}, but it also checks
+that the value does not overflow.
+
+@item hw2_last
+
+This modifier yields the same value as @code{hw2}, but it also checks
+that the value does not overflow.
+
+A 48-bit symbolic value is constructed by using the following idiom:
+
+@smallexample
+moveli r0, hw2_last(sym)
+shl16insli r0, r0, hw1(sym)
+shl16insli r0, r0, hw0(sym)
+@end smallexample
+
+@item hw0_got
+
+This modifier is used to load bits 0-15 of the symbol's offset in the
+GOT entry corresponding to the symbol.
+
+@item hw1_got
+
+This modifier is used to load bits 16-31 of the symbol's offset in the
+GOT entry corresponding to the symbol.
+
+@item hw2_got
+
+This modifier is used to load bits 32-47 of the symbol's offset in the
+GOT entry corresponding to the symbol.
+
+@item hw3_got
+
+This modifier is used to load bits 48-63 of the symbol's offset in the
+GOT entry corresponding to the symbol.
+
+@item hw0_last_got
+
+This modifier yields the same value as @code{hw0_got}, but it also
+checks that the value does not overflow.
+
+@item hw1_last_got
+
+This modifier yields the same value as @code{hw1_got}, but it also
+checks that the value does not overflow.
+
+@item hw2_last_got
+
+This modifier yields the same value as @code{hw2_got}, but it also
+checks that the value does not overflow.
+
+@item plt
+
+This modifier is used for function symbols.  It causes a
+@emph{procedure linkage table}, an array of code stubs, to be created
+at the time the shared object is created or linked against, together
+with a global offset table entry.  The value is a pc-relative offset
+to the corresponding stub code in the procedure linkage table.  This
+arrangement causes the run-time symbol resolver to be called to look
+up and set the value of the symbol the first time the function is
+called (at latest; depending environment variables).  It is only safe
+to leave the symbol unresolved this way if all references are function
+calls.
+
+@item hw0_tls_gd
+
+This modifier is used to load bits 0-15 of the offset of the GOT entry
+of the symbol's TLS descriptor, to be used for general-dynamic TLS
+accesses.
+
+@item hw1_tls_gd
+
+This modifier is used to load bits 16-31 of the offset of the GOT
+entry of the symbol's TLS descriptor, to be used for general-dynamic
+TLS accesses.
+
+@item hw2_tls_gd
+
+This modifier is used to load bits 32-47 of the offset of the GOT
+entry of the symbol's TLS descriptor, to be used for general-dynamic
+TLS accesses.
+
+@item hw3_tls_gd
+
+This modifier is used to load bits 48-63 of the offset of the GOT
+entry of the symbol's TLS descriptor, to be used for general-dynamic
+TLS accesses.
+
+@item hw0_last_tls_gd
+
+This modifier yields the same value as @code{hw0_tls_gd}, but it also
+checks that the value does not overflow.
+
+@item hw1_last_tls_gd
+
+This modifier yields the same value as @code{hw1_tls_gd}, but it also
+checks that the value does not overflow.
+
+@item hw2_last_tls_gd
+
+This modifier yields the same value as @code{hw2_tls_gd}, but it also
+checks that the value does not overflow.
+
+@item hw0_tls_ie
+
+This modifier is used to load bits 0-15 of the offset of the GOT entry
+containing the offset of the symbol's address from the TCB, to be used
+for initial-exec TLS accesses.
+
+@item hw1_tls_ie
+
+This modifier is used to load bits 16-31 of the offset of the GOT
+entry containing the offset of the symbol's address from the TCB, to
+be used for initial-exec TLS accesses.
+
+@item hw2_tls_ie
+
+This modifier is used to load bits 32-47 of the offset of the GOT entry
+containing the offset of the symbol's address from the TCB, to be used
+for initial-exec TLS accesses.
+
+@item hw3_tls_ie
+
+This modifier is used to load bits 48-63 of the offset of the GOT
+entry containing the offset of the symbol's address from the TCB, to
+be used for initial-exec TLS accesses.
+
+@item hw0_last_tls_ie
+
+This modifier yields the same value as @code{hw0_tls_ie}, but it also
+checks that the value does not overflow.
+
+@item hw1_last_tls_ie
+
+This modifier yields the same value as @code{hw1_tls_ie}, but it also
+checks that the value does not overflow.
+
+@item hw2_last_tls_ie
+
+This modifier yields the same value as @code{hw2_tls_ie}, but it also
+checks that the value does not overflow.
+
+@end table
+
+@node TILE-Gx Directives
+@section TILE-Gx Directives
+@cindex machine directives, TILE-Gx
+@cindex TILE-Gx machine directives
+
+@table @code
+
+@cindex @code{.align} directive, TILE-Gx
+@item .align @var{expression} [, @var{expression}]
+This is the generic @var{.align} directive.  The first argument is the
+requested alignment in bytes.
+
+@cindex @code{.allow_suspicious_bundles} directive, TILE-Gx
+@item .allow_suspicious_bundles
+Turns on error checking for combinations of instructions in a bundle
+that probably indicate a programming error.  This is on by default.
+
+@item .no_allow_suspicious_bundles
+Turns off error checking for combinations of instructions in a bundle
+that probably indicate a programming error.
+
+@cindex @code{.require_canonical_reg_names} directive, TILE-Gx
+@item .require_canonical_reg_names
+Require that canonical register names be used, and emit a warning if
+the numeric names are used.  This is on by default.
+
+@item .no_require_canonical_reg_names
+Permit the use of numeric names for registers that have canonical
+names.
+
+@end table
diff --git a/gas/doc/c-tilepro.texi b/gas/doc/c-tilepro.texi
new file mode 100644
index 0000000..bbccdfb
--- /dev/null
+++ b/gas/doc/c-tilepro.texi
@@ -0,0 +1,297 @@
+@c Copyright 2011
+@c Free Software Foundation, Inc.
+@c This is part of the GAS manual.
+@c For copying conditions, see the file as.texinfo.
+@ifset GENERIC
+@page
+@node TILEPro-Dependent
+@chapter TILEPro Dependent Features
+@end ifset
+@ifclear GENERIC
+@node Machine Dependencies
+@chapter TILEPro Dependent Features
+@end ifclear
+
+@cindex TILEPro support
+@menu
+* TILEPro Options::		TILEPro Options
+* TILEPro Syntax::		TILEPro Syntax
+* TILEPro Directives::		TILEPro Directives
+@end menu
+
+@node TILEPro Options
+@section Options
+
+@code{@value{AS}} has no machine-dependent command-line options for
+TILEPro.
+
+@node TILEPro Syntax
+@section Syntax
+@cindex TILEPro syntax
+@cindex syntax, TILEPro
+
+Block comments are delimited by @samp{/*} and @samp{*/}.  End of line
+comments may be introduced by @samp{#}.
+
+Instructions consist of a leading opcode or macro name followed by
+whitespace and an optional comma-separated list of operands:
+
+@smallexample
+@var{opcode} [@var{operand}, @dots{}]
+@end smallexample
+
+Instructions must be separated by a newline or semicolon.
+
+There are two ways to write code: either write naked instructions,
+which the assembler is free to combine into VLIW bundles, or specify
+the VLIW bundles explicitly.
+
+Bundles are specified using curly braces:
+
+@smallexample
+@{ @var{add} r3,r4,r5 ; @var{add} r7,r8,r9 ; @var{lw} r10,r11 @}
+@end smallexample
+
+A bundle can span multiple lines. If you want to put multiple
+instructions on a line, whether in a bundle or not, you need to
+separate them with semicolons as in this example.
+
+A bundle may contain one or more instructions, up to the limit
+specified by the ISA (currently three). If fewer instructions are
+specified than the hardware supports in a bundle, the assembler
+inserts @code{fnop} instructions automatically.
+
+The assembler will prefer to preserve the ordering of instructions
+within the bundle, putting the first instruction in a lower-numbered
+pipeline than the next one, etc.  This fact, combined with the
+optional use of explicit @code{fnop} or @code{nop} instructions,
+allows precise control over which pipeline executes each instruction.
+
+If the instructions cannot be bundled in the listed order, the
+assembler will automatically try to find a valid pipeline
+assignment. If there is no way to bundle the instructions together,
+the assembler reports an error.
+
+The assembler does not yet auto-bundle (automatically combine multiple
+instructions into one bundle), but it reserves the right to do so in
+the future.  If you want to force an instruction to run by itself, put
+it in a bundle explicitly with curly braces and use @code{nop}
+instructions (not @code{fnop}) to fill the remaining pipeline slots in
+that bundle.
+
+@menu
+* TILEPro Opcodes::              Opcode Naming Conventions.
+* TILEPro Registers::            Register Naming.
+* TILEPro Modifiers::            Symbolic Operand Modifiers.
+@end menu
+
+@node TILEPro Opcodes
+@subsection Opcode Names
+@cindex TILEPro opcode names
+@cindex opcode names, TILEPro
+
+For a complete list of opcodes and descriptions of their semantics,
+see @cite{TILE Processor User Architecture Manual}, available upon
+request at www.tilera.com.
+
+@node TILEPro Registers
+@subsection Register Names
+@cindex TILEPro register names
+@cindex register names, TILEPro
+
+General-purpose registers are represented by predefined symbols of the
+form @samp{r@var{N}}, where @var{N} represents a number between
+@code{0} and @code{63}.  However, the following registers have
+canonical names that must be used instead:
+
+@table @code
+@item r54
+sp
+
+@item r55
+lr
+
+@item r56
+sn
+
+@item r57
+idn0
+
+@item r58
+idn1
+
+@item r59
+udn0
+
+@item r60
+udn1
+
+@item r61
+udn2
+
+@item r62
+udn3
+
+@item r63
+zero
+
+@end table
+
+The assembler will emit a warning if a numeric name is used instead of
+the canonical name.  The @code{.no_require_canonical_reg_names}
+assembler pseudo-op turns off this
+warning. @code{.require_canonical_reg_names} turns it back on.
+
+@node TILEPro Modifiers
+@subsection Symbolic Operand Modifiers
+@cindex TILEPro modifiers
+@cindex symbol modifiers, TILEPro
+
+The assembler supports several modifiers when using symbol addresses
+in TILEPro instruction operands.  The general syntax is the following:
+
+@smallexample
+modifier(symbol)
+@end smallexample
+
+The following modifiers are supported:
+
+@table @code
+
+@item lo16
+
+This modifier is used to load the low 16 bits of the symbol's address,
+sign-extended to a 32-bit value (sign-extension allows it to be
+range-checked against signed 16 bit immediate operands without
+complaint).
+
+@item hi16
+
+This modifier is used to load the high 16 bits of the symbol's
+address, also sign-extended to a 32-bit value.
+
+@item ha16
+
+@code{ha16(N)} is identical to @code{hi16(N)}, except if
+@code{lo16(N)} is negative it adds one to the @code{hi16(N)}
+value. This way @code{lo16} and @code{ha16} can be added to create any
+32-bit value using @code{auli}.  For example, here is how you move an
+arbitrary 32-bit address into r3:
+
+@smallexample
+moveli r3, lo16(sym)
+auli r3, r3, ha16(sym)
+@end smallexample
+
+@item got
+
+This modifier is used to load the offset of the GOT entry
+corresponding to the symbol.
+
+@item got_lo16
+
+This modifier is used to load the sign-extended low 16 bits of the
+offset of the GOT entry corresponding to the symbol.
+
+@item got_hi16
+
+This modifier is used to load the sign-extended high 16 bits of the
+offset of the GOT entry corresponding to the symbol.
+
+@item got_ha16
+
+This modifier is like @code{got_hi16}, but it adds one if
+@code{got_lo16} of the input value is negative.
+
+@item plt
+
+This modifier is used for function symbols.  It causes a
+@emph{procedure linkage table}, an array of code stubs, to be created
+at the time the shared object is created or linked against, together
+with a global offset table entry.  The value is a pc-relative offset
+to the corresponding stub code in the procedure linkage table.  This
+arrangement causes the run-time symbol resolver to be called to look
+up and set the value of the symbol the first time the function is
+called (at latest; depending environment variables).  It is only safe
+to leave the symbol unresolved this way if all references are function
+calls.
+
+@item tls_gd
+
+This modifier is used to load the offset of the GOT entry of the
+symbol's TLS descriptor, to be used for general-dynamic TLS accesses.
+
+@item tls_gd_lo16
+
+This modifier is used to load the sign-extended low 16 bits of the
+offset of the GOT entry of the symbol's TLS descriptor, to be used for
+general dynamic TLS accesses.
+
+@item tls_gd_hi16
+
+This modifier is used to load the sign-extended high 16 bits of the
+offset of the GOT entry of the symbol's TLS descriptor, to be used for
+general dynamic TLS accesses.
+
+@item tls_gd_ha16
+
+This modifier is like @code{tls_gd_hi16}, but it adds one to the value
+if @code{tls_gd_lo16} of the input value is negative.
+
+@item tls_ie
+
+This modifier is used to load the offset of the GOT entry containing
+the offset of the symbol's address from the TCB, to be used for
+initial-exec TLS accesses.
+
+@item tls_ie_lo16
+
+This modifier is used to load the low 16 bits of the offset of the GOT
+entry containing the offset of the symbol's address from the TCB, to
+be used for initial-exec TLS accesses.
+
+@item tls_ie_hi16
+
+This modifier is used to load the high 16 bits of the offset of the
+GOT entry containing the offset of the symbol's address from the TCB,
+to be used for initial-exec TLS accesses.
+
+@item tls_ie_ha16
+
+This modifier is like @code{tls_ie_hi16}, but it adds one to the value
+if @code{tls_ie_lo16} of the input value is negative.
+
+@end table
+
+@node TILEPro Directives
+@section TILEPro Directives
+@cindex machine directives, TILEPro
+@cindex TILEPro machine directives
+
+@table @code
+
+@cindex @code{.align} directive, TILEPro
+@item .align @var{expression} [, @var{expression}]
+This is the generic @var{.align} directive.  The first argument is the
+requested alignment in bytes.
+
+@cindex @code{.allow_suspicious_bundles} directive, TILEPro
+@item .allow_suspicious_bundles
+Turns on error checking for combinations of instructions in a bundle
+that probably indicate a programming error.  This is on by default.
+
+@item .no_allow_suspicious_bundles
+Turns off error checking for combinations of instructions in a bundle
+that probably indicate a programming error.
+
+@cindex @code{.require_canonical_reg_names} directive, TILEPro
+@item .require_canonical_reg_names
+Require that canonical register names be used, and emit a warning if
+the numeric names are used.  This is on by default.
+
+@item .no_require_canonical_reg_names
+Permit the use of numeric names for registers that have canonical
+names.
+
+@end table
+
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 8932f9a..6970e51 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2011-06-13  Walter Lee  <walt@tilera.com>
+
+	* gas/tilepro/t_constants.s: New file.
+	* gas/tilepro/t_constants.d: Likewise.
+	* gas/tilepro/t_insns.s: Likewise.
+	* gas/tilepro/tilepro.exp: Likewise.
+	* gas/tilepro/t_insns.d: Likewise.
+	* gas/tilegx/tilegx.exp: Likewise.
+	* gas/tilegx/t_insns.d: Likewise.
+	* gas/tilegx/t_insns.s: Likewise.
+
 2011-06-13  Nick Clifton  <nickc@redhat.com>
 
 	PR gas/12854
diff --git a/gas/testsuite/gas/tilegx/t_insns.d b/gas/testsuite/gas/tilegx/t_insns.d
new file mode 100644
index 0000000..4fe3279
--- /dev/null
+++ b/gas/testsuite/gas/tilegx/t_insns.d
@@ -0,0 +1,10405 @@
+#as:
+#objdump: -dr
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+
+0000000000000000 <target>:
+       0:	[0-9a-f]* 	{ nop }
+       8:	[0-9a-f]* 	{ nop }
+      10:	[0-9a-f]* 	{ nop }
+      18:	[0-9a-f]* 	{ nop }
+      20:	[0-9a-f]* 	{ nop }
+      28:	[0-9a-f]* 	{ nop }
+      30:	[0-9a-f]* 	{ nop }
+      38:	[0-9a-f]* 	{ nop }
+      40:	[0-9a-f]* 	{ nop }
+      48:	[0-9a-f]* 	{ nop }
+      50:	[0-9a-f]* 	{ nop }
+      58:	[0-9a-f]* 	{ nop }
+      60:	[0-9a-f]* 	{ nop }
+      68:	[0-9a-f]* 	{ nop }
+      70:	[0-9a-f]* 	{ nop }
+      78:	[0-9a-f]* 	{ nop }
+      80:	[0-9a-f]* 	{ nop }
+      88:	[0-9a-f]* 	{ nop }
+      90:	[0-9a-f]* 	{ nop }
+      98:	[0-9a-f]* 	{ nop }
+      a0:	[0-9a-f]* 	{ nop }
+      a8:	[0-9a-f]* 	{ nop }
+      b0:	[0-9a-f]* 	{ nop }
+      b8:	[0-9a-f]* 	{ nop }
+      c0:	[0-9a-f]* 	{ nop }
+      c8:	[0-9a-f]* 	{ nop }
+      d0:	[0-9a-f]* 	{ nop }
+      d8:	[0-9a-f]* 	{ nop }
+      e0:	[0-9a-f]* 	{ nop }
+      e8:	[0-9a-f]* 	{ nop }
+      f0:	[0-9a-f]* 	{ nop }
+      f8:	[0-9a-f]* 	{ nop }
+     100:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; bnezt r15, 0 <target> }
+     108:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; bnez r15, 0 <target> }
+     110:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; bnez r15, 0 <target> }
+     118:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; bnez r15, 0 <target> }
+     120:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; bnez r15, 0 <target> }
+     128:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; blez r15, 0 <target> }
+     130:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; bgtzt r15, 0 <target> }
+     138:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; bgtzt r15, 0 <target> }
+     140:	[0-9a-f]* 	{ addli r5, r6, 4660 ; bgtzt r15, 0 <target> }
+     148:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; beqzt r15, 0 <target> }
+     150:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; beqzt r15, 0 <target> }
+     158:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; beqzt r15, 0 <target> }
+     160:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; beqz r15, 0 <target> }
+     168:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; beqz r15, 0 <target> }
+     170:	[0-9a-f]* 	{ addli r5, r6, 4660 ; beqz r15, 0 <target> }
+     178:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; beqz r15, 0 <target> }
+     180:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; blbs r15, 0 <target> }
+     188:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; blbs r15, 0 <target> }
+     190:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; blbst r15, 0 <target> }
+     198:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; blbst r15, 0 <target> }
+     1a0:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; blbst r15, 0 <target> }
+     1a8:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; blbs r15, 0 <target> }
+     1b0:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; blbst r15, 0 <target> }
+     1b8:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; blbst r15, 0 <target> }
+     1c0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; blbst r15, 0 <target> }
+     1c8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; bgtz r15, 0 <target> }
+     1d0:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; bgtzt r15, 0 <target> }
+     1d8:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; bgtz r15, 0 <target> }
+     1e0:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; bgtzt r15, 0 <target> }
+     1e8:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; bgtz r15, 0 <target> }
+     1f0:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; bgtzt r15, 0 <target> }
+     1f8:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; bgtzt r15, 0 <target> }
+     200:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; bgtz r15, 0 <target> }
+     208:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; bgtzt r15, 0 <target> }
+     210:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; bgtz r15, 0 <target> }
+     218:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; bgtzt r15, 0 <target> }
+     220:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; bgtzt r15, 0 <target> }
+     228:	[0-9a-f]* 	{ cmples r5, r6, r7 ; bgtzt r15, 0 <target> }
+     230:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; bgtzt r15, 0 <target> }
+     238:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; j 0 <target> }
+     240:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; bltzt r15, 0 <target> }
+     248:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; bltz r15, 0 <target> }
+     250:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; bltz r15, 0 <target> }
+     258:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; bltz r15, 0 <target> }
+     260:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; bltzt r15, 0 <target> }
+     268:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; bltz r15, 0 <target> }
+     270:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; bltzt r15, 0 <target> }
+     278:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; bltzt r15, 0 <target> }
+     280:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; bltz r15, 0 <target> }
+     288:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; bltzt r15, 0 <target> }
+     290:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; bltzt r15, 0 <target> }
+     298:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; bltz r15, 0 <target> }
+     2a0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; bltzt r15, 0 <target> }
+     2a8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; bltz r15, 0 <target> }
+     2b0:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; bltz r15, 0 <target> }
+     2b8:	[0-9a-f]* 	{ moveli r5, 4660 ; bgez r15, 0 <target> }
+     2c0:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; bnez r15, 0 <target> }
+     2c8:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; bnez r15, 0 <target> }
+     2d0:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; bnez r15, 0 <target> }
+     2d8:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; bnez r15, 0 <target> }
+     2e0:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; bnezt r15, 0 <target> }
+     2e8:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; bnez r15, 0 <target> }
+     2f0:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; bnez r15, 0 <target> }
+     2f8:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; bnez r15, 0 <target> }
+     300:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; bnez r15, 0 <target> }
+     308:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; bnez r15, 0 <target> }
+     310:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; bnez r15, 0 <target> }
+     318:	[0-9a-f]* 	{ revbytes r5, r6 ; blbst r15, 0 <target> }
+     320:	[0-9a-f]* 	{ shrs r5, r6, r7 ; blbst r15, 0 <target> }
+     328:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; blbs r15, 0 <target> }
+     330:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; blbst r15, 0 <target> }
+     338:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; blbs r15, 0 <target> }
+     340:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; blbs r15, 0 <target> }
+     348:	[0-9a-f]* 	{ v4add r5, r6, r7 ; blbs r15, 0 <target> }
+     350:	[0-9a-f]* 	{ addx r5, r6, r7 ; blbs r15, 0 <target> }
+     358:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; j 0 <target> }
+     360:	[0-9a-f]* 	{ nor r5, r6, r7 ; blezt r15, 0 <target> }
+     368:	[0-9a-f]* 	{ shl r5, r6, r7 ; blezt r15, 0 <target> }
+     370:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; blez r15, 0 <target> }
+     378:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; blbs r15, 0 <target> }
+     380:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; blbc r15, 0 <target> }
+     388:	[0-9a-f]* 	{ and r5, r6, r7 ; bgtz r15, 0 <target> }
+     390:	[0-9a-f]* 	{ mz r5, r6, r7 ; blbst r15, 0 <target> }
+     398:	[0-9a-f]* 	{ shl r5, r6, r7 ; blbs r15, 0 <target> }
+     3a0:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; jal 0 <target> }
+     3a8:	[0-9a-f]* 	{ ori r5, r6, 5 ; bgtz r15, 0 <target> }
+     3b0:	[0-9a-f]* 	{ infol 4660 ; bgez r15, 0 <target> }
+     3b8:	[0-9a-f]* 	{ pcnt r5, r6 ; bnezt r15, 0 <target> }
+     3c0:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; j 0 <target> }
+     3c8:	[0-9a-f]* 	{ movei r5, 5 ; blbs r15, 0 <target> }
+     3d0:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; jal 0 <target> }
+     3d8:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; jal 0 <target> }
+     3e0:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; j 0 <target> }
+     3e8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jal 0 <target> }
+     3f0:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; j 0 <target> }
+     3f8:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; j 0 <target> }
+     400:	[0-9a-f]* 	{ and r5, r6, r7 ; j 0 <target> }
+     408:	[0-9a-f]* 	{ nop ; blbst r15, 0 <target> }
+     410:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; beqzt r15, 0 <target> }
+     418:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; beqzt r15, 0 <target> }
+     420:	[0-9a-f]* 	{ shli r5, r6, 5 ; beqzt r15, 0 <target> }
+     428:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; beqzt r15, 0 <target> }
+     430:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; beqzt r15, 0 <target> }
+     438:	[0-9a-f]* 	{ addli r5, r6, 4660 ; bgezt r15, 0 <target> }
+     440:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; bgezt r15, 0 <target> }
+     448:	[0-9a-f]* 	{ mulx r5, r6, r7 ; bgezt r15, 0 <target> }
+     450:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; bgezt r15, 0 <target> }
+     458:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; bgezt r15, 0 <target> }
+     460:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; bgezt r15, 0 <target> }
+     468:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; bgtzt r15, 0 <target> }
+     470:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; bgtzt r15, 0 <target> }
+     478:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; bgtzt r15, 0 <target> }
+     480:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; bgtzt r15, 0 <target> }
+     488:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; bgtzt r15, 0 <target> }
+     490:	[0-9a-f]* 	{ addxi r5, r6, 5 ; blbct r15, 0 <target> }
+     498:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; blbct r15, 0 <target> }
+     4a0:	[0-9a-f]* 	{ nop ; blbct r15, 0 <target> }
+     4a8:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; blbct r15, 0 <target> }
+     4b0:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; blbct r15, 0 <target> }
+     4b8:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; blbct r15, 0 <target> }
+     4c0:	[0-9a-f]* 	{ cmula r5, r6, r7 ; blbst r15, 0 <target> }
+     4c8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; blbst r15, 0 <target> }
+     4d0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; blbst r15, 0 <target> }
+     4d8:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; blbst r15, 0 <target> }
+     4e0:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; blbst r15, 0 <target> }
+     4e8:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; blezt r15, 0 <target> }
+     4f0:	[0-9a-f]* 	{ blezt r15, 0 <target> }
+     4f8:	[0-9a-f]* 	{ or r5, r6, r7 ; blezt r15, 0 <target> }
+     500:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; blezt r15, 0 <target> }
+     508:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; blezt r15, 0 <target> }
+     510:	[0-9a-f]* 	{ v4add r5, r6, r7 ; blezt r15, 0 <target> }
+     518:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; bltzt r15, 0 <target> }
+     520:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; bltzt r15, 0 <target> }
+     528:	[0-9a-f]* 	{ shrui r5, r6, 5 ; bltzt r15, 0 <target> }
+     530:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; bltzt r15, 0 <target> }
+     538:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; bltzt r15, 0 <target> }
+     540:	[0-9a-f]* 	{ andi r5, r6, 5 ; bnezt r15, 0 <target> }
+     548:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; bnezt r15, 0 <target> }
+     550:	[0-9a-f]* 	{ pcnt r5, r6 ; bnezt r15, 0 <target> }
+     558:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; bnezt r15, 0 <target> }
+     560:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; bnezt r15, 0 <target> }
+     568:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; bnezt r15, 0 <target> }
+     570:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; beqz r15, 0 <target> }
+     578:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; beqz r15, 0 <target> }
+     580:	[0-9a-f]* 	{ shrux r5, r6, r7 ; beqz r15, 0 <target> }
+     588:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; beqz r15, 0 <target> }
+     590:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; beqz r15, 0 <target> }
+     598:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; bgez r15, 0 <target> }
+     5a0:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; bgez r15, 0 <target> }
+     5a8:	[0-9a-f]* 	{ revbits r5, r6 ; bgez r15, 0 <target> }
+     5b0:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; bgez r15, 0 <target> }
+     5b8:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; bgez r15, 0 <target> }
+     5c0:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; bgez r15, 0 <target> }
+     5c8:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; bgtz r15, 0 <target> }
+     5d0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; bgtz r15, 0 <target> }
+     5d8:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; bgtz r15, 0 <target> }
+     5e0:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; bgtz r15, 0 <target> }
+     5e8:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; bgtz r15, 0 <target> }
+     5f0:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; blbc r15, 0 <target> }
+     5f8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; blbc r15, 0 <target> }
+     600:	[0-9a-f]* 	{ rotl r5, r6, r7 ; blbc r15, 0 <target> }
+     608:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; blbc r15, 0 <target> }
+     610:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; blbc r15, 0 <target> }
+     618:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; blbc r15, 0 <target> }
+     620:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; blbs r15, 0 <target> }
+     628:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; blbs r15, 0 <target> }
+     630:	[0-9a-f]* 	{ subx r5, r6, r7 ; blbs r15, 0 <target> }
+     638:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; blbs r15, 0 <target> }
+     640:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; blbs r15, 0 <target> }
+     648:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; blez r15, 0 <target> }
+     650:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; blez r15, 0 <target> }
+     658:	[0-9a-f]* 	{ shl r5, r6, r7 ; blez r15, 0 <target> }
+     660:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; blez r15, 0 <target> }
+     668:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; blez r15, 0 <target> }
+     670:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; blez r15, 0 <target> }
+     678:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; bltz r15, 0 <target> }
+     680:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; bltz r15, 0 <target> }
+     688:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; bltz r15, 0 <target> }
+     690:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; bltz r15, 0 <target> }
+     698:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; bltz r15, 0 <target> }
+     6a0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; bnez r15, 0 <target> }
+     6a8:	[0-9a-f]* 	{ infol 4660 ; bnez r15, 0 <target> }
+     6b0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; bnez r15, 0 <target> }
+     6b8:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; bnez r15, 0 <target> }
+     6c0:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; bnez r15, 0 <target> }
+     6c8:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; bnez r15, 0 <target> }
+     6d0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jal 0 <target> }
+     6d8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jal 0 <target> }
+     6e0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jal 0 <target> }
+     6e8:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; jal 0 <target> }
+     6f0:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; jal 0 <target> }
+     6f8:	[0-9a-f]* 	{ xor r5, r6, r7 ; jal 0 <target> }
+     700:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; j 0 <target> }
+     708:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; j 0 <target> }
+     710:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; j 0 <target> }
+     718:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; j 0 <target> }
+     720:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; j 0 <target> }
+     728:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 }
+     730:	[0-9a-f]* 	{ fetchand r5, r6, r7 }
+     738:	[0-9a-f]* 	{ ldna_add r5, r6, 5 }
+     740:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 }
+     748:	[0-9a-f]* 	{ shlx r5, r6, r7 }
+     750:	[0-9a-f]* 	{ v1avgu r5, r6, r7 }
+     758:	[0-9a-f]* 	{ v1subuc r5, r6, r7 }
+     760:	[0-9a-f]* 	{ v2shru r5, r6, r7 }
+     768:	[0-9a-f]* 	{ add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+     770:	[0-9a-f]* 	{ add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+     778:	[0-9a-f]* 	{ add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 }
+     780:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+     788:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
+     790:	[0-9a-f]* 	{ add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 }
+     798:	[0-9a-f]* 	{ add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
+     7a0:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
+     7a8:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
+     7b0:	[0-9a-f]* 	{ add r15, r16, r17 ; prefetch_l3 r25 }
+     7b8:	[0-9a-f]* 	{ add r15, r16, r17 ; info 19 ; prefetch r25 }
+     7c0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+     7c8:	[0-9a-f]* 	{ add r15, r16, r17 ; andi r5, r6, 5 ; ld1s r25, r26 }
+     7d0:	[0-9a-f]* 	{ add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
+     7d8:	[0-9a-f]* 	{ add r15, r16, r17 ; move r5, r6 ; ld1u r25, r26 }
+     7e0:	[0-9a-f]* 	{ add r15, r16, r17 ; ld1u r25, r26 }
+     7e8:	[0-9a-f]* 	{ revbits r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
+     7f0:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+     7f8:	[0-9a-f]* 	{ add r15, r16, r17 ; subx r5, r6, r7 ; ld2u r25, r26 }
+     800:	[0-9a-f]* 	{ mulx r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+     808:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+     810:	[0-9a-f]* 	{ add r15, r16, r17 ; shli r5, r6, 5 ; ld4u r25, r26 }
+     818:	[0-9a-f]* 	{ add r15, r16, r17 ; move r5, r6 ; prefetch r25 }
+     820:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+     828:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+     830:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+     838:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+     840:	[0-9a-f]* 	{ mulax r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+     848:	[0-9a-f]* 	{ add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 }
+     850:	[0-9a-f]* 	{ add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
+     858:	[0-9a-f]* 	{ pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+     860:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+     868:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+     870:	[0-9a-f]* 	{ add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+     878:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+     880:	[0-9a-f]* 	{ add r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 }
+     888:	[0-9a-f]* 	{ add r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2 r25 }
+     890:	[0-9a-f]* 	{ add r15, r16, r17 ; prefetch_l2_fault r25 }
+     898:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
+     8a0:	[0-9a-f]* 	{ add r15, r16, r17 ; nop ; prefetch_l3 r25 }
+     8a8:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 }
+     8b0:	[0-9a-f]* 	{ add r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
+     8b8:	[0-9a-f]* 	{ revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 }
+     8c0:	[0-9a-f]* 	{ add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
+     8c8:	[0-9a-f]* 	{ add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
+     8d0:	[0-9a-f]* 	{ add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 }
+     8d8:	[0-9a-f]* 	{ add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+     8e0:	[0-9a-f]* 	{ add r15, r16, r17 ; shlx r5, r6, r7 }
+     8e8:	[0-9a-f]* 	{ add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 }
+     8f0:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; add r15, r16, r17 }
+     8f8:	[0-9a-f]* 	{ revbits r5, r6 ; add r15, r16, r17 ; st r25, r26 }
+     900:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpne r5, r6, r7 ; st1 r25, r26 }
+     908:	[0-9a-f]* 	{ add r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 }
+     910:	[0-9a-f]* 	{ mulx r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
+     918:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpeqi r5, r6, 5 ; st4 r25, r26 }
+     920:	[0-9a-f]* 	{ add r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
+     928:	[0-9a-f]* 	{ add r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
+     930:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+     938:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
+     940:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; add r15, r16, r17 }
+     948:	[0-9a-f]* 	{ add r15, r16, r17 ; v2packh r5, r6, r7 }
+     950:	[0-9a-f]* 	{ add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+     958:	[0-9a-f]* 	{ add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
+     960:	[0-9a-f]* 	{ add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 }
+     968:	[0-9a-f]* 	{ add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+     970:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+     978:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+     980:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+     988:	[0-9a-f]* 	{ add r5, r6, r7 ; dblalign4 r15, r16, r17 }
+     990:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; ld2u r25, r26 }
+     998:	[0-9a-f]* 	{ add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+     9a0:	[0-9a-f]* 	{ add r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
+     9a8:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+     9b0:	[0-9a-f]* 	{ add r5, r6, r7 ; ld r25, r26 }
+     9b8:	[0-9a-f]* 	{ add r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 }
+     9c0:	[0-9a-f]* 	{ add r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 }
+     9c8:	[0-9a-f]* 	{ add r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
+     9d0:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
+     9d8:	[0-9a-f]* 	{ add r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+     9e0:	[0-9a-f]* 	{ add r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
+     9e8:	[0-9a-f]* 	{ add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+     9f0:	[0-9a-f]* 	{ add r5, r6, r7 ; lnk r15 ; prefetch r25 }
+     9f8:	[0-9a-f]* 	{ add r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+     a00:	[0-9a-f]* 	{ add r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+     a08:	[0-9a-f]* 	{ add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+     a10:	[0-9a-f]* 	{ add r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+     a18:	[0-9a-f]* 	{ add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+     a20:	[0-9a-f]* 	{ add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+     a28:	[0-9a-f]* 	{ add r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+     a30:	[0-9a-f]* 	{ add r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 }
+     a38:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+     a40:	[0-9a-f]* 	{ add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
+     a48:	[0-9a-f]* 	{ add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+     a50:	[0-9a-f]* 	{ add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+     a58:	[0-9a-f]* 	{ add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+     a60:	[0-9a-f]* 	{ add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+     a68:	[0-9a-f]* 	{ add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
+     a70:	[0-9a-f]* 	{ add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 }
+     a78:	[0-9a-f]* 	{ add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
+     a80:	[0-9a-f]* 	{ add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+     a88:	[0-9a-f]* 	{ add r5, r6, r7 ; shrui r15, r16, 5 }
+     a90:	[0-9a-f]* 	{ add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 }
+     a98:	[0-9a-f]* 	{ add r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 }
+     aa0:	[0-9a-f]* 	{ add r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+     aa8:	[0-9a-f]* 	{ add r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+     ab0:	[0-9a-f]* 	{ add r5, r6, r7 ; stnt1 r15, r16 }
+     ab8:	[0-9a-f]* 	{ add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 }
+     ac0:	[0-9a-f]* 	{ add r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+     ac8:	[0-9a-f]* 	{ add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+     ad0:	[0-9a-f]* 	{ addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 }
+     ad8:	[0-9a-f]* 	{ addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+     ae0:	[0-9a-f]* 	{ addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 }
+     ae8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
+     af0:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
+     af8:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 }
+     b00:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
+     b08:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
+     b10:	[0-9a-f]* 	{ ctz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
+     b18:	[0-9a-f]* 	{ addi r15, r16, 5 ; prefetch_l3 r25 }
+     b20:	[0-9a-f]* 	{ addi r15, r16, 5 ; info 19 ; prefetch r25 }
+     b28:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
+     b30:	[0-9a-f]* 	{ addi r15, r16, 5 ; andi r5, r6, 5 ; ld1s r25, r26 }
+     b38:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
+     b40:	[0-9a-f]* 	{ addi r15, r16, 5 ; move r5, r6 ; ld1u r25, r26 }
+     b48:	[0-9a-f]* 	{ addi r15, r16, 5 ; ld1u r25, r26 }
+     b50:	[0-9a-f]* 	{ revbits r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
+     b58:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+     b60:	[0-9a-f]* 	{ addi r15, r16, 5 ; subx r5, r6, r7 ; ld2u r25, r26 }
+     b68:	[0-9a-f]* 	{ mulx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
+     b70:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+     b78:	[0-9a-f]* 	{ addi r15, r16, 5 ; shli r5, r6, 5 ; ld4u r25, r26 }
+     b80:	[0-9a-f]* 	{ addi r15, r16, 5 ; move r5, r6 ; prefetch r25 }
+     b88:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+     b90:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
+     b98:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 }
+     ba0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
+     ba8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 }
+     bb0:	[0-9a-f]* 	{ addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 }
+     bb8:	[0-9a-f]* 	{ addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch r25 }
+     bc0:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+     bc8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+     bd0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+     bd8:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 }
+     be0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+     be8:	[0-9a-f]* 	{ addi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 }
+     bf0:	[0-9a-f]* 	{ addi r15, r16, 5 ; rotl r5, r6, r7 ; prefetch_l2 r25 }
+     bf8:	[0-9a-f]* 	{ addi r15, r16, 5 ; prefetch_l2_fault r25 }
+     c00:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
+     c08:	[0-9a-f]* 	{ addi r15, r16, 5 ; nop ; prefetch_l3 r25 }
+     c10:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 }
+     c18:	[0-9a-f]* 	{ addi r15, r16, 5 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
+     c20:	[0-9a-f]* 	{ revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l2 r25 }
+     c28:	[0-9a-f]* 	{ addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
+     c30:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
+     c38:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 }
+     c40:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+     c48:	[0-9a-f]* 	{ addi r15, r16, 5 ; shlx r5, r6, r7 }
+     c50:	[0-9a-f]* 	{ addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 }
+     c58:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; addi r15, r16, 5 }
+     c60:	[0-9a-f]* 	{ revbits r5, r6 ; addi r15, r16, 5 ; st r25, r26 }
+     c68:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpne r5, r6, r7 ; st1 r25, r26 }
+     c70:	[0-9a-f]* 	{ addi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 }
+     c78:	[0-9a-f]* 	{ mulx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+     c80:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; st4 r25, r26 }
+     c88:	[0-9a-f]* 	{ addi r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 }
+     c90:	[0-9a-f]* 	{ addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 }
+     c98:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+     ca0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
+     ca8:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; addi r15, r16, 5 }
+     cb0:	[0-9a-f]* 	{ addi r15, r16, 5 ; v2packh r5, r6, r7 }
+     cb8:	[0-9a-f]* 	{ addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+     cc0:	[0-9a-f]* 	{ addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 }
+     cc8:	[0-9a-f]* 	{ addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 }
+     cd0:	[0-9a-f]* 	{ addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 }
+     cd8:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+     ce0:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+     ce8:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+     cf0:	[0-9a-f]* 	{ addi r5, r6, 5 ; dblalign4 r15, r16, r17 }
+     cf8:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; ld2u r25, r26 }
+     d00:	[0-9a-f]* 	{ addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 }
+     d08:	[0-9a-f]* 	{ addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
+     d10:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+     d18:	[0-9a-f]* 	{ addi r5, r6, 5 ; ld r25, r26 }
+     d20:	[0-9a-f]* 	{ addi r5, r6, 5 ; shli r15, r16, 5 ; ld1s r25, r26 }
+     d28:	[0-9a-f]* 	{ addi r5, r6, 5 ; rotl r15, r16, r17 ; ld1u r25, r26 }
+     d30:	[0-9a-f]* 	{ addi r5, r6, 5 ; jrp r15 ; ld2s r25, r26 }
+     d38:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
+     d40:	[0-9a-f]* 	{ addi r5, r6, 5 ; addx r15, r16, r17 ; ld4s r25, r26 }
+     d48:	[0-9a-f]* 	{ addi r5, r6, 5 ; shrui r15, r16, 5 ; ld4s r25, r26 }
+     d50:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+     d58:	[0-9a-f]* 	{ addi r5, r6, 5 ; lnk r15 ; prefetch r25 }
+     d60:	[0-9a-f]* 	{ addi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
+     d68:	[0-9a-f]* 	{ addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 }
+     d70:	[0-9a-f]* 	{ addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+     d78:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
+     d80:	[0-9a-f]* 	{ addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 }
+     d88:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 }
+     d90:	[0-9a-f]* 	{ addi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+     d98:	[0-9a-f]* 	{ addi r5, r6, 5 ; jrp r15 ; prefetch_l2 r25 }
+     da0:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+     da8:	[0-9a-f]* 	{ addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l3 r25 }
+     db0:	[0-9a-f]* 	{ addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+     db8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+     dc0:	[0-9a-f]* 	{ addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+     dc8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+     dd0:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
+     dd8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
+     de0:	[0-9a-f]* 	{ addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 }
+     de8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+     df0:	[0-9a-f]* 	{ addi r5, r6, 5 ; shrui r15, r16, 5 }
+     df8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
+     e00:	[0-9a-f]* 	{ addi r5, r6, 5 ; or r15, r16, r17 ; st1 r25, r26 }
+     e08:	[0-9a-f]* 	{ addi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
+     e10:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+     e18:	[0-9a-f]* 	{ addi r5, r6, 5 ; stnt1 r15, r16 }
+     e20:	[0-9a-f]* 	{ addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 }
+     e28:	[0-9a-f]* 	{ addi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
+     e30:	[0-9a-f]* 	{ addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 }
+     e38:	[0-9a-f]* 	{ addli r15, r16, 4660 ; cmpltui r5, r6, 5 }
+     e40:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; addli r15, r16, 4660 }
+     e48:	[0-9a-f]* 	{ addli r15, r16, 4660 ; shlx r5, r6, r7 }
+     e50:	[0-9a-f]* 	{ addli r15, r16, 4660 ; v1int_h r5, r6, r7 }
+     e58:	[0-9a-f]* 	{ addli r15, r16, 4660 ; v2maxsi r5, r6, 5 }
+     e60:	[0-9a-f]* 	{ addli r5, r6, 4660 ; addx r15, r16, r17 }
+     e68:	[0-9a-f]* 	{ addli r5, r6, 4660 ; iret }
+     e70:	[0-9a-f]* 	{ addli r5, r6, 4660 ; movei r15, 5 }
+     e78:	[0-9a-f]* 	{ addli r5, r6, 4660 ; shruxi r15, r16, 5 }
+     e80:	[0-9a-f]* 	{ addli r5, r6, 4660 ; v1shl r15, r16, r17 }
+     e88:	[0-9a-f]* 	{ addli r5, r6, 4660 ; v4add r15, r16, r17 }
+     e90:	[0-9a-f]* 	{ addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
+     e98:	[0-9a-f]* 	{ addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
+     ea0:	[0-9a-f]* 	{ addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+     ea8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+     eb0:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
+     eb8:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
+     ec0:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
+     ec8:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
+     ed0:	[0-9a-f]* 	{ ctz r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
+     ed8:	[0-9a-f]* 	{ addx r15, r16, r17 ; st2 r25, r26 }
+     ee0:	[0-9a-f]* 	{ addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 }
+     ee8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 }
+     ef0:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1s r25, r26 }
+     ef8:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1s r25, r26 }
+     f00:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
+     f08:	[0-9a-f]* 	{ addx r15, r16, r17 ; addxi r5, r6, 5 ; ld2s r25, r26 }
+     f10:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
+     f18:	[0-9a-f]* 	{ addx r15, r16, r17 ; info 19 ; ld2u r25, r26 }
+     f20:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 }
+     f28:	[0-9a-f]* 	{ addx r15, r16, r17 ; or r5, r6, r7 ; ld4s r25, r26 }
+     f30:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
+     f38:	[0-9a-f]* 	{ addx r15, r16, r17 ; shrui r5, r6, 5 ; ld4u r25, r26 }
+     f40:	[0-9a-f]* 	{ addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 }
+     f48:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+     f50:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+     f58:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 }
+     f60:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+     f68:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+     f70:	[0-9a-f]* 	{ addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 }
+     f78:	[0-9a-f]* 	{ addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 }
+     f80:	[0-9a-f]* 	{ pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
+     f88:	[0-9a-f]* 	{ addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+     f90:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 }
+     f98:	[0-9a-f]* 	{ addx r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+     fa0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+     fa8:	[0-9a-f]* 	{ addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2 r25 }
+     fb0:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 }
+     fb8:	[0-9a-f]* 	{ addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 }
+     fc0:	[0-9a-f]* 	{ addx r15, r16, r17 ; prefetch_l2_fault r25 }
+     fc8:	[0-9a-f]* 	{ revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+     fd0:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
+     fd8:	[0-9a-f]* 	{ addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
+     fe0:	[0-9a-f]* 	{ revbytes r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
+     fe8:	[0-9a-f]* 	{ addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
+     ff0:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 }
+     ff8:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 }
+    1000:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+    1008:	[0-9a-f]* 	{ addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 }
+    1010:	[0-9a-f]* 	{ addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
+    1018:	[0-9a-f]* 	{ addx r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+    1020:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 }
+    1028:	[0-9a-f]* 	{ addx r15, r16, r17 ; info 19 ; st1 r25, r26 }
+    1030:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 }
+    1038:	[0-9a-f]* 	{ addx r15, r16, r17 ; or r5, r6, r7 ; st2 r25, r26 }
+    1040:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; st4 r25, r26 }
+    1048:	[0-9a-f]* 	{ addx r15, r16, r17 ; shrui r5, r6, 5 ; st4 r25, r26 }
+    1050:	[0-9a-f]* 	{ addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 }
+    1058:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    1060:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 }
+    1068:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; addx r15, r16, r17 }
+    1070:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; addx r15, r16, r17 }
+    1078:	[0-9a-f]* 	{ addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 }
+    1080:	[0-9a-f]* 	{ addx r5, r6, r7 ; addi r15, r16, 5 }
+    1088:	[0-9a-f]* 	{ addx r5, r6, r7 ; addxli r15, r16, 4660 }
+    1090:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+    1098:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    10a0:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    10a8:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
+    10b0:	[0-9a-f]* 	{ addx r5, r6, r7 ; exch4 r15, r16, r17 }
+    10b8:	[0-9a-f]* 	{ addx r5, r6, r7 ; ill ; prefetch r25 }
+    10c0:	[0-9a-f]* 	{ addx r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    10c8:	[0-9a-f]* 	{ addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
+    10d0:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    10d8:	[0-9a-f]* 	{ addx r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    10e0:	[0-9a-f]* 	{ addx r5, r6, r7 ; shrui r15, r16, 5 ; ld1s r25, r26 }
+    10e8:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    10f0:	[0-9a-f]* 	{ addx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 }
+    10f8:	[0-9a-f]* 	{ addx r5, r6, r7 ; ill ; ld2u r25, r26 }
+    1100:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    1108:	[0-9a-f]* 	{ addx r5, r6, r7 ; ld4s r25, r26 }
+    1110:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    1118:	[0-9a-f]* 	{ addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
+    1120:	[0-9a-f]* 	{ addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
+    1128:	[0-9a-f]* 	{ addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    1130:	[0-9a-f]* 	{ addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 }
+    1138:	[0-9a-f]* 	{ addx r5, r6, r7 ; prefetch r25 }
+    1140:	[0-9a-f]* 	{ addx r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+    1148:	[0-9a-f]* 	{ addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 }
+    1150:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    1158:	[0-9a-f]* 	{ addx r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 }
+    1160:	[0-9a-f]* 	{ addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
+    1168:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    1170:	[0-9a-f]* 	{ addx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+    1178:	[0-9a-f]* 	{ addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    1180:	[0-9a-f]* 	{ addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
+    1188:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 }
+    1190:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 }
+    1198:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl3add r15, r16, r17 }
+    11a0:	[0-9a-f]* 	{ addx r5, r6, r7 ; shlxi r15, r16, 5 }
+    11a8:	[0-9a-f]* 	{ addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 }
+    11b0:	[0-9a-f]* 	{ addx r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
+    11b8:	[0-9a-f]* 	{ addx r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+    11c0:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 }
+    11c8:	[0-9a-f]* 	{ addx r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+    11d0:	[0-9a-f]* 	{ addx r5, r6, r7 ; st4 r25, r26 }
+    11d8:	[0-9a-f]* 	{ addx r5, r6, r7 ; stnt4 r15, r16 }
+    11e0:	[0-9a-f]* 	{ addx r5, r6, r7 ; subx r15, r16, r17 }
+    11e8:	[0-9a-f]* 	{ addx r5, r6, r7 ; v2cmpltui r15, r16, 5 }
+    11f0:	[0-9a-f]* 	{ addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    11f8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
+    1200:	[0-9a-f]* 	{ addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch r25 }
+    1208:	[0-9a-f]* 	{ addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    1210:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    1218:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
+    1220:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
+    1228:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
+    1230:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
+    1238:	[0-9a-f]* 	{ ctz r5, r6 ; addxi r15, r16, 5 ; prefetch r25 }
+    1240:	[0-9a-f]* 	{ addxi r15, r16, 5 ; st2 r25, r26 }
+    1248:	[0-9a-f]* 	{ addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 }
+    1250:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
+    1258:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld1s r25, r26 }
+    1260:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1s r25, r26 }
+    1268:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 }
+    1270:	[0-9a-f]* 	{ addxi r15, r16, 5 ; addxi r5, r6, 5 ; ld2s r25, r26 }
+    1278:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
+    1280:	[0-9a-f]* 	{ addxi r15, r16, 5 ; info 19 ; ld2u r25, r26 }
+    1288:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 }
+    1290:	[0-9a-f]* 	{ addxi r15, r16, 5 ; or r5, r6, r7 ; ld4s r25, r26 }
+    1298:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
+    12a0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld4u r25, r26 }
+    12a8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 }
+    12b0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 }
+    12b8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+    12c0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+    12c8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    12d0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    12d8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 }
+    12e0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 }
+    12e8:	[0-9a-f]* 	{ pcnt r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    12f0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
+    12f8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 }
+    1300:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
+    1308:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+    1310:	[0-9a-f]* 	{ addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2 r25 }
+    1318:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 }
+    1320:	[0-9a-f]* 	{ addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 }
+    1328:	[0-9a-f]* 	{ addxi r15, r16, 5 ; prefetch_l2_fault r25 }
+    1330:	[0-9a-f]* 	{ revbits r5, r6 ; addxi r15, r16, 5 ; prefetch_l3 r25 }
+    1338:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
+    1340:	[0-9a-f]* 	{ addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
+    1348:	[0-9a-f]* 	{ revbytes r5, r6 ; addxi r15, r16, 5 ; st r25, r26 }
+    1350:	[0-9a-f]* 	{ addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
+    1358:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 }
+    1360:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
+    1368:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+    1370:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 }
+    1378:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 }
+    1380:	[0-9a-f]* 	{ addxi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
+    1388:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl r5, r6, r7 ; st r25, r26 }
+    1390:	[0-9a-f]* 	{ addxi r15, r16, 5 ; info 19 ; st1 r25, r26 }
+    1398:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 }
+    13a0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 }
+    13a8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st4 r25, r26 }
+    13b0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrui r5, r6, 5 ; st4 r25, r26 }
+    13b8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 }
+    13c0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    13c8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 }
+    13d0:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; addxi r15, r16, 5 }
+    13d8:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; addxi r15, r16, 5 }
+    13e0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 }
+    13e8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; addi r15, r16, 5 }
+    13f0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; addxli r15, r16, 4660 }
+    13f8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+    1400:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 }
+    1408:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    1410:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
+    1418:	[0-9a-f]* 	{ addxi r5, r6, 5 ; exch4 r15, r16, r17 }
+    1420:	[0-9a-f]* 	{ addxi r5, r6, 5 ; ill ; prefetch r25 }
+    1428:	[0-9a-f]* 	{ addxi r5, r6, 5 ; jalr r15 ; prefetch r25 }
+    1430:	[0-9a-f]* 	{ addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 }
+    1438:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    1440:	[0-9a-f]* 	{ addxi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    1448:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shrui r15, r16, 5 ; ld1s r25, r26 }
+    1450:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    1458:	[0-9a-f]* 	{ addxi r5, r6, 5 ; movei r15, 5 ; ld2s r25, r26 }
+    1460:	[0-9a-f]* 	{ addxi r5, r6, 5 ; ill ; ld2u r25, r26 }
+    1468:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    1470:	[0-9a-f]* 	{ addxi r5, r6, 5 ; ld4s r25, r26 }
+    1478:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    1480:	[0-9a-f]* 	{ addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 }
+    1488:	[0-9a-f]* 	{ addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 }
+    1490:	[0-9a-f]* 	{ addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    1498:	[0-9a-f]* 	{ addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 }
+    14a0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; prefetch r25 }
+    14a8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch r25 }
+    14b0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch r25 }
+    14b8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    14c0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 }
+    14c8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; info 19 ; prefetch_l2_fault r25 }
+    14d0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    14d8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+    14e0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    14e8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
+    14f0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 }
+    14f8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 }
+    1500:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl3add r15, r16, r17 }
+    1508:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shlxi r15, r16, 5 }
+    1510:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 }
+    1518:	[0-9a-f]* 	{ addxi r5, r6, 5 ; add r15, r16, r17 ; st r25, r26 }
+    1520:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 }
+    1528:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 }
+    1530:	[0-9a-f]* 	{ addxi r5, r6, 5 ; move r15, r16 ; st2 r25, r26 }
+    1538:	[0-9a-f]* 	{ addxi r5, r6, 5 ; st4 r25, r26 }
+    1540:	[0-9a-f]* 	{ addxi r5, r6, 5 ; stnt4 r15, r16 }
+    1548:	[0-9a-f]* 	{ addxi r5, r6, 5 ; subx r15, r16, r17 }
+    1550:	[0-9a-f]* 	{ addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
+    1558:	[0-9a-f]* 	{ addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    1560:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; addxli r15, r16, 4660 }
+    1568:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; addxli r15, r16, 4660 }
+    1570:	[0-9a-f]* 	{ addxli r15, r16, 4660 ; shru r5, r6, r7 }
+    1578:	[0-9a-f]* 	{ addxli r15, r16, 4660 ; v1minu r5, r6, r7 }
+    1580:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; addxli r15, r16, 4660 }
+    1588:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; and r15, r16, r17 }
+    1590:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; jrp r15 }
+    1598:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; nop }
+    15a0:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; st2 r15, r16 }
+    15a8:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; v1shru r15, r16, r17 }
+    15b0:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; v4packsc r15, r16, r17 }
+    15b8:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; addxsc r15, r16, r17 }
+    15c0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; addxsc r15, r16, r17 }
+    15c8:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; addxsc r15, r16, r17 }
+    15d0:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; addxsc r15, r16, r17 }
+    15d8:	[0-9a-f]* 	{ addxsc r15, r16, r17 ; v2packh r5, r6, r7 }
+    15e0:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; cmpexch r15, r16, r17 }
+    15e8:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; ld1u r15, r16 }
+    15f0:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; prefetch r15 }
+    15f8:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; st_add r15, r16, 5 }
+    1600:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; v2add r15, r16, r17 }
+    1608:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; v4shru r15, r16, r17 }
+    1610:	[0-9a-f]* 	{ and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 }
+    1618:	[0-9a-f]* 	{ and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
+    1620:	[0-9a-f]* 	{ and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+    1628:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
+    1630:	[0-9a-f]* 	{ and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
+    1638:	[0-9a-f]* 	{ and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 }
+    1640:	[0-9a-f]* 	{ and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+    1648:	[0-9a-f]* 	{ and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+    1650:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; st1 r25, r26 }
+    1658:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+    1660:	[0-9a-f]* 	{ and r15, r16, r17 ; add r5, r6, r7 ; ld r25, r26 }
+    1668:	[0-9a-f]* 	{ revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+    1670:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+    1678:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+    1680:	[0-9a-f]* 	{ and r15, r16, r17 ; mz r5, r6, r7 ; ld1u r25, r26 }
+    1688:	[0-9a-f]* 	{ and r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
+    1690:	[0-9a-f]* 	{ and r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
+    1698:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+    16a0:	[0-9a-f]* 	{ and r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
+    16a8:	[0-9a-f]* 	{ and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+    16b0:	[0-9a-f]* 	{ and r15, r16, r17 ; move r5, r6 ; ld4u r25, r26 }
+    16b8:	[0-9a-f]* 	{ and r15, r16, r17 ; ld4u r25, r26 }
+    16c0:	[0-9a-f]* 	{ and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 }
+    16c8:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; and r15, r16, r17 }
+    16d0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+    16d8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 }
+    16e0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
+    16e8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
+    16f0:	[0-9a-f]* 	{ and r15, r16, r17 ; mz r5, r6, r7 }
+    16f8:	[0-9a-f]* 	{ and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
+    1700:	[0-9a-f]* 	{ and r15, r16, r17 ; addx r5, r6, r7 ; prefetch r25 }
+    1708:	[0-9a-f]* 	{ and r15, r16, r17 ; rotli r5, r6, 5 ; prefetch r25 }
+    1710:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+    1718:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+    1720:	[0-9a-f]* 	{ and r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
+    1728:	[0-9a-f]* 	{ and r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
+    1730:	[0-9a-f]* 	{ and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    1738:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    1740:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
+    1748:	[0-9a-f]* 	{ and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 }
+    1750:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
+    1758:	[0-9a-f]* 	{ revbits r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+    1760:	[0-9a-f]* 	{ and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    1768:	[0-9a-f]* 	{ and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
+    1770:	[0-9a-f]* 	{ and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
+    1778:	[0-9a-f]* 	{ and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    1780:	[0-9a-f]* 	{ and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
+    1788:	[0-9a-f]* 	{ and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+    1790:	[0-9a-f]* 	{ and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 }
+    1798:	[0-9a-f]* 	{ and r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 }
+    17a0:	[0-9a-f]* 	{ and r15, r16, r17 ; shrs r5, r6, r7 ; st r25, r26 }
+    17a8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
+    17b0:	[0-9a-f]* 	{ and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+    17b8:	[0-9a-f]* 	{ and r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
+    17c0:	[0-9a-f]* 	{ and r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
+    17c8:	[0-9a-f]* 	{ and r15, r16, r17 ; st4 r25, r26 }
+    17d0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+    17d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 }
+    17e0:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; and r15, r16, r17 }
+    17e8:	[0-9a-f]* 	{ and r15, r16, r17 ; v1subuc r5, r6, r7 }
+    17f0:	[0-9a-f]* 	{ and r15, r16, r17 ; v2shru r5, r6, r7 }
+    17f8:	[0-9a-f]* 	{ and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+    1800:	[0-9a-f]* 	{ and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    1808:	[0-9a-f]* 	{ and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    1810:	[0-9a-f]* 	{ and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    1818:	[0-9a-f]* 	{ and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    1820:	[0-9a-f]* 	{ and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+    1828:	[0-9a-f]* 	{ and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    1830:	[0-9a-f]* 	{ and r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    1838:	[0-9a-f]* 	{ and r5, r6, r7 ; ill ; st2 r25, r26 }
+    1840:	[0-9a-f]* 	{ and r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+    1848:	[0-9a-f]* 	{ and r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    1850:	[0-9a-f]* 	{ and r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
+    1858:	[0-9a-f]* 	{ and r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    1860:	[0-9a-f]* 	{ and r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 }
+    1868:	[0-9a-f]* 	{ and r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 }
+    1870:	[0-9a-f]* 	{ and r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+    1878:	[0-9a-f]* 	{ and r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
+    1880:	[0-9a-f]* 	{ and r5, r6, r7 ; ld4s r25, r26 }
+    1888:	[0-9a-f]* 	{ and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    1890:	[0-9a-f]* 	{ and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    1898:	[0-9a-f]* 	{ and r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    18a0:	[0-9a-f]* 	{ and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    18a8:	[0-9a-f]* 	{ and r5, r6, r7 ; nop ; ld1s r25, r26 }
+    18b0:	[0-9a-f]* 	{ and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    18b8:	[0-9a-f]* 	{ and r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    18c0:	[0-9a-f]* 	{ and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    18c8:	[0-9a-f]* 	{ and r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    18d0:	[0-9a-f]* 	{ and r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    18d8:	[0-9a-f]* 	{ and r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+    18e0:	[0-9a-f]* 	{ and r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    18e8:	[0-9a-f]* 	{ and r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
+    18f0:	[0-9a-f]* 	{ and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    18f8:	[0-9a-f]* 	{ and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
+    1900:	[0-9a-f]* 	{ and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    1908:	[0-9a-f]* 	{ and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    1910:	[0-9a-f]* 	{ and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    1918:	[0-9a-f]* 	{ and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    1920:	[0-9a-f]* 	{ and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    1928:	[0-9a-f]* 	{ and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    1930:	[0-9a-f]* 	{ and r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+    1938:	[0-9a-f]* 	{ and r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+    1940:	[0-9a-f]* 	{ and r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+    1948:	[0-9a-f]* 	{ and r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+    1950:	[0-9a-f]* 	{ and r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
+    1958:	[0-9a-f]* 	{ and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    1960:	[0-9a-f]* 	{ and r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+    1968:	[0-9a-f]* 	{ and r5, r6, r7 ; v2mnz r15, r16, r17 }
+    1970:	[0-9a-f]* 	{ and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+    1978:	[0-9a-f]* 	{ andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 }
+    1980:	[0-9a-f]* 	{ andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
+    1988:	[0-9a-f]* 	{ andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 }
+    1990:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+    1998:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
+    19a0:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 }
+    19a8:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+    19b0:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+    19b8:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 }
+    19c0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    19c8:	[0-9a-f]* 	{ andi r15, r16, 5 ; add r5, r6, r7 ; ld r25, r26 }
+    19d0:	[0-9a-f]* 	{ revbytes r5, r6 ; andi r15, r16, 5 ; ld r25, r26 }
+    19d8:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    19e0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    19e8:	[0-9a-f]* 	{ andi r15, r16, 5 ; mz r5, r6, r7 ; ld1u r25, r26 }
+    19f0:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmples r5, r6, r7 ; ld2s r25, r26 }
+    19f8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shrs r5, r6, r7 ; ld2s r25, r26 }
+    1a00:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 }
+    1a08:	[0-9a-f]* 	{ andi r15, r16, 5 ; andi r5, r6, 5 ; ld4s r25, r26 }
+    1a10:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+    1a18:	[0-9a-f]* 	{ andi r15, r16, 5 ; move r5, r6 ; ld4u r25, r26 }
+    1a20:	[0-9a-f]* 	{ andi r15, r16, 5 ; ld4u r25, r26 }
+    1a28:	[0-9a-f]* 	{ andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 }
+    1a30:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; andi r15, r16, 5 }
+    1a38:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    1a40:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 }
+    1a48:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+    1a50:	[0-9a-f]* 	{ mulax r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 }
+    1a58:	[0-9a-f]* 	{ andi r15, r16, 5 ; mz r5, r6, r7 }
+    1a60:	[0-9a-f]* 	{ andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 }
+    1a68:	[0-9a-f]* 	{ andi r15, r16, 5 ; addx r5, r6, r7 ; prefetch r25 }
+    1a70:	[0-9a-f]* 	{ andi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch r25 }
+    1a78:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    1a80:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    1a88:	[0-9a-f]* 	{ andi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
+    1a90:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
+    1a98:	[0-9a-f]* 	{ andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    1aa0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
+    1aa8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 }
+    1ab0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 }
+    1ab8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    1ac0:	[0-9a-f]* 	{ revbits r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    1ac8:	[0-9a-f]* 	{ andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    1ad0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
+    1ad8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
+    1ae0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    1ae8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
+    1af0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+    1af8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 }
+    1b00:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 }
+    1b08:	[0-9a-f]* 	{ andi r15, r16, 5 ; shrs r5, r6, r7 ; st r25, r26 }
+    1b10:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+    1b18:	[0-9a-f]* 	{ andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 }
+    1b20:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
+    1b28:	[0-9a-f]* 	{ andi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
+    1b30:	[0-9a-f]* 	{ andi r15, r16, 5 ; st4 r25, r26 }
+    1b38:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld r25, r26 }
+    1b40:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    1b48:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; andi r15, r16, 5 }
+    1b50:	[0-9a-f]* 	{ andi r15, r16, 5 ; v1subuc r5, r6, r7 }
+    1b58:	[0-9a-f]* 	{ andi r15, r16, 5 ; v2shru r5, r6, r7 }
+    1b60:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 }
+    1b68:	[0-9a-f]* 	{ andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    1b70:	[0-9a-f]* 	{ andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 }
+    1b78:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    1b80:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 }
+    1b88:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+    1b90:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    1b98:	[0-9a-f]* 	{ andi r5, r6, 5 ; fetchor4 r15, r16, r17 }
+    1ba0:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; st2 r25, r26 }
+    1ba8:	[0-9a-f]* 	{ andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 }
+    1bb0:	[0-9a-f]* 	{ andi r5, r6, 5 ; jr r15 ; st4 r25, r26 }
+    1bb8:	[0-9a-f]* 	{ andi r5, r6, 5 ; jalrp r15 ; ld r25, r26 }
+    1bc0:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    1bc8:	[0-9a-f]* 	{ andi r5, r6, 5 ; addi r15, r16, 5 ; ld1u r25, r26 }
+    1bd0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shru r15, r16, r17 ; ld1u r25, r26 }
+    1bd8:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+    1be0:	[0-9a-f]* 	{ andi r5, r6, 5 ; move r15, r16 ; ld2u r25, r26 }
+    1be8:	[0-9a-f]* 	{ andi r5, r6, 5 ; ld4s r25, r26 }
+    1bf0:	[0-9a-f]* 	{ andi r5, r6, 5 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    1bf8:	[0-9a-f]* 	{ andi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    1c00:	[0-9a-f]* 	{ andi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    1c08:	[0-9a-f]* 	{ andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 }
+    1c10:	[0-9a-f]* 	{ andi r5, r6, 5 ; nop ; ld1s r25, r26 }
+    1c18:	[0-9a-f]* 	{ andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 }
+    1c20:	[0-9a-f]* 	{ andi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+    1c28:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 }
+    1c30:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    1c38:	[0-9a-f]* 	{ andi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    1c40:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+    1c48:	[0-9a-f]* 	{ andi r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    1c50:	[0-9a-f]* 	{ andi r5, r6, 5 ; info 19 ; prefetch_l3 r25 }
+    1c58:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    1c60:	[0-9a-f]* 	{ andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 }
+    1c68:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    1c70:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    1c78:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    1c80:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    1c88:	[0-9a-f]* 	{ andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 }
+    1c90:	[0-9a-f]* 	{ andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    1c98:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmples r15, r16, r17 ; st r25, r26 }
+    1ca0:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; st1 r25, r26 }
+    1ca8:	[0-9a-f]* 	{ andi r5, r6, 5 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+    1cb0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl r15, r16, r17 ; st2 r25, r26 }
+    1cb8:	[0-9a-f]* 	{ andi r5, r6, 5 ; mnz r15, r16, r17 ; st4 r25, r26 }
+    1cc0:	[0-9a-f]* 	{ andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    1cc8:	[0-9a-f]* 	{ andi r5, r6, 5 ; v1cmpleu r15, r16, r17 }
+    1cd0:	[0-9a-f]* 	{ andi r5, r6, 5 ; v2mnz r15, r16, r17 }
+    1cd8:	[0-9a-f]* 	{ andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 }
+    1ce0:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; finv r15 }
+    1ce8:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 }
+    1cf0:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 }
+    1cf8:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 }
+    1d00:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 }
+    1d08:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 }
+    1d10:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; ld4s r15, r16 }
+    1d18:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 }
+    1d20:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; stnt4 r15, r16 }
+    1d28:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 }
+    1d30:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; add r15, r16, r17 }
+    1d38:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; info 19 }
+    1d40:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    1d48:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; shru r15, r16, r17 }
+    1d50:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 }
+    1d58:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 }
+    1d60:	[0-9a-f]* 	{ clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
+    1d68:	[0-9a-f]* 	{ clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 }
+    1d70:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 }
+    1d78:	[0-9a-f]* 	{ clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
+    1d80:	[0-9a-f]* 	{ clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
+    1d88:	[0-9a-f]* 	{ clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    1d90:	[0-9a-f]* 	{ clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
+    1d98:	[0-9a-f]* 	{ clz r5, r6 ; prefetch_l3_fault r25 }
+    1da0:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; st r25, r26 }
+    1da8:	[0-9a-f]* 	{ clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 }
+    1db0:	[0-9a-f]* 	{ clz r5, r6 ; jrp r15 ; st1 r25, r26 }
+    1db8:	[0-9a-f]* 	{ clz r5, r6 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    1dc0:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 }
+    1dc8:	[0-9a-f]* 	{ clz r5, r6 ; jalrp r15 ; ld1u r25, r26 }
+    1dd0:	[0-9a-f]* 	{ clz r5, r6 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
+    1dd8:	[0-9a-f]* 	{ clz r5, r6 ; add r15, r16, r17 ; ld2u r25, r26 }
+    1de0:	[0-9a-f]* 	{ clz r5, r6 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
+    1de8:	[0-9a-f]* 	{ clz r5, r6 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    1df0:	[0-9a-f]* 	{ clz r5, r6 ; mnz r15, r16, r17 ; ld4u r25, r26 }
+    1df8:	[0-9a-f]* 	{ clz r5, r6 ; ldnt4u r15, r16 }
+    1e00:	[0-9a-f]* 	{ clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 }
+    1e08:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 }
+    1e10:	[0-9a-f]* 	{ clz r5, r6 ; nop }
+    1e18:	[0-9a-f]* 	{ clz r5, r6 ; prefetch r15 }
+    1e20:	[0-9a-f]* 	{ clz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+    1e28:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    1e30:	[0-9a-f]* 	{ clz r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
+    1e38:	[0-9a-f]* 	{ clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
+    1e40:	[0-9a-f]* 	{ clz r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
+    1e48:	[0-9a-f]* 	{ clz r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 }
+    1e50:	[0-9a-f]* 	{ clz r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
+    1e58:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 }
+    1e60:	[0-9a-f]* 	{ clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 }
+    1e68:	[0-9a-f]* 	{ clz r5, r6 ; shl16insli r15, r16, 4660 }
+    1e70:	[0-9a-f]* 	{ clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+    1e78:	[0-9a-f]* 	{ clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 }
+    1e80:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 }
+    1e88:	[0-9a-f]* 	{ clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
+    1e90:	[0-9a-f]* 	{ clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+    1e98:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+    1ea0:	[0-9a-f]* 	{ clz r5, r6 ; jalr r15 ; st1 r25, r26 }
+    1ea8:	[0-9a-f]* 	{ clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
+    1eb0:	[0-9a-f]* 	{ clz r5, r6 ; st4 r15, r16 }
+    1eb8:	[0-9a-f]* 	{ clz r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 }
+    1ec0:	[0-9a-f]* 	{ clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
+    1ec8:	[0-9a-f]* 	{ clz r5, r6 ; v1shrsi r15, r16, 5 }
+    1ed0:	[0-9a-f]* 	{ clz r5, r6 ; v4int_l r15, r16, r17 }
+    1ed8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
+    1ee0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    1ee8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
+    1ef0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
+    1ef8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+    1f00:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
+    1f08:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 }
+    1f10:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; ld1u r25, r26 }
+    1f18:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 }
+    1f20:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 }
+    1f28:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    1f30:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
+    1f38:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; info 19 ; ld1s r25, r26 }
+    1f40:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
+    1f48:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 }
+    1f50:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
+    1f58:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 }
+    1f60:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+    1f68:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
+    1f70:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; ldnt r15, r16 }
+    1f78:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    1f80:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    1f88:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; nop ; prefetch r25 }
+    1f90:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+    1f98:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    1fa0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; prefetch r25 }
+    1fa8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+    1fb0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 }
+    1fb8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
+    1fc0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    1fc8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3 r25 }
+    1fd0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
+    1fd8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
+    1fe0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    1fe8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    1ff0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    1ff8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    2000:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    2008:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+    2010:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; st r25, r26 }
+    2018:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
+    2020:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; st1 r25, r26 }
+    2028:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
+    2030:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
+    2038:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
+    2040:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 }
+    2048:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 }
+    2050:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+    2058:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    2060:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
+    2068:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+    2070:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    2078:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+    2080:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    2088:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    2090:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+    2098:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+    20a0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    20a8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    20b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    20b8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    20c0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    20c8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    20d0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    20d8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
+    20e0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    20e8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    20f0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    20f8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+    2100:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+    2108:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+    2110:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    2118:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    2120:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    2128:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    2130:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+    2138:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
+    2140:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    2148:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2150:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    2158:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    2160:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+    2168:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    2170:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    2178:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    2180:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    2188:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 }
+    2190:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
+    2198:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+    21a0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nop ; st2 r25, r26 }
+    21a8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
+    21b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    21b8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; v1addi r15, r16, 5 }
+    21c0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 }
+    21c8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+    21d0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 }
+    21d8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
+    21e0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
+    21e8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
+    21f0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+    21f8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 }
+    2200:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+    2208:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 }
+    2210:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
+    2218:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; cmpeq r15, r16, r17 }
+    2220:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 }
+    2228:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; nop ; ld r25, r26 }
+    2230:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+    2238:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shrsi r5, r6, 5 ; ld1s r25, r26 }
+    2240:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+    2248:	[0-9a-f]* 	{ clz r5, r6 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+    2250:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; ld2s r25, r26 }
+    2258:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 }
+    2260:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; add r5, r6, r7 ; ld4s r25, r26 }
+    2268:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    2270:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    2278:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    2280:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; move r5, r6 ; st r25, r26 }
+    2288:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
+    2290:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    2298:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    22a0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
+    22a8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    22b0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
+    22b8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 }
+    22c0:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+    22c8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
+    22d0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    22d8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
+    22e0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+    22e8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
+    22f0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
+    22f8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    2300:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; addx r5, r6, r7 ; prefetch_l3 r25 }
+    2308:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
+    2310:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    2318:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    2320:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+    2328:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl r5, r6, r7 ; ld r25, r26 }
+    2330:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
+    2338:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
+    2340:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
+    2348:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shrs r5, r6, r7 ; ld4s r25, r26 }
+    2350:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shru r5, r6, r7 ; prefetch r25 }
+    2358:	[0-9a-f]* 	{ clz r5, r6 ; cmpeq r15, r16, r17 ; st r25, r26 }
+    2360:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; st r25, r26 }
+    2368:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
+    2370:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; add r5, r6, r7 ; st2 r25, r26 }
+    2378:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+    2380:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+    2388:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+    2390:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 }
+    2398:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+    23a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpeq r15, r16, r17 }
+    23a8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; v1shrs r5, r6, r7 }
+    23b0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; v2shl r5, r6, r7 }
+    23b8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+    23c0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    23c8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
+    23d0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+    23d8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    23e0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+    23e8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    23f0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    23f8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+    2400:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+    2408:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    2410:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    2418:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    2420:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    2428:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    2430:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    2438:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    2440:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
+    2448:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    2450:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    2458:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    2460:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+    2468:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+    2470:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+    2478:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    2480:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    2488:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    2490:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    2498:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+    24a0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
+    24a8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    24b0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    24b8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    24c0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    24c8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+    24d0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    24d8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    24e0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    24e8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    24f0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 }
+    24f8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
+    2500:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+    2508:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; nop ; st2 r25, r26 }
+    2510:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
+    2518:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    2520:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; v1addi r15, r16, 5 }
+    2528:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; v2int_l r15, r16, r17 }
+    2530:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+    2538:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 }
+    2540:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
+    2548:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
+    2550:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    2558:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+    2560:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 }
+    2568:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+    2570:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmpltu r5, r6, r7 }
+    2578:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    2580:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; cmpeqi r15, r16, 5 }
+    2588:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; info 19 ; st1 r25, r26 }
+    2590:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; nop ; ld r25, r26 }
+    2598:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+    25a0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shrsi r5, r6, 5 ; ld1s r25, r26 }
+    25a8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
+    25b0:	[0-9a-f]* 	{ clz r5, r6 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    25b8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; ld2s r25, r26 }
+    25c0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; movei r5, 5 ; ld2u r25, r26 }
+    25c8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; add r5, r6, r7 ; ld4s r25, r26 }
+    25d0:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeqi r15, r16, 5 ; ld4s r25, r26 }
+    25d8:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
+    25e0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
+    25e8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; move r5, r6 ; st r25, r26 }
+    25f0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+    25f8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
+    2600:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2608:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    2610:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+    2618:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
+    2620:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st1 r25, r26 }
+    2628:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
+    2630:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
+    2638:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    2640:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shrui r5, r6, 5 ; prefetch r25 }
+    2648:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
+    2650:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    2658:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
+    2660:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+    2668:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; addx r5, r6, r7 ; prefetch_l3 r25 }
+    2670:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
+    2678:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2680:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2688:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+    2690:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl r5, r6, r7 ; ld r25, r26 }
+    2698:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
+    26a0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
+    26a8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
+    26b0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shrs r5, r6, r7 ; ld4s r25, r26 }
+    26b8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; prefetch r25 }
+    26c0:	[0-9a-f]* 	{ clz r5, r6 ; cmpeqi r15, r16, 5 ; st r25, r26 }
+    26c8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; st r25, r26 }
+    26d0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; movei r5, 5 ; st1 r25, r26 }
+    26d8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; add r5, r6, r7 ; st2 r25, r26 }
+    26e0:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
+    26e8:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+    26f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+    26f8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 }
+    2700:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
+    2708:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpeqi r15, r16, 5 }
+    2710:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; v1shrs r5, r6, r7 }
+    2718:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; v2shl r5, r6, r7 }
+    2720:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld r25, r26 }
+    2728:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    2730:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
+    2738:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+    2740:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    2748:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+    2750:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    2758:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; fetchaddgez r15, r16, r17 }
+    2760:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; ill ; prefetch_l2_fault r25 }
+    2768:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jalr r15 ; prefetch_l2 r25 }
+    2770:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l3 r25 }
+    2778:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    2780:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    2788:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    2790:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    2798:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    27a0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jalrp r15 ; ld2u r25, r26 }
+    27a8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
+    27b0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld4u r25, r26 }
+    27b8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    27c0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; lnk r15 ; st1 r25, r26 }
+    27c8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; move r15, r16 ; st1 r25, r26 }
+    27d0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; mz r15, r16, r17 ; st1 r25, r26 }
+    27d8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; st4 r25, r26 }
+    27e0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jalr r15 ; prefetch r25 }
+    27e8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch r25 }
+    27f0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 }
+    27f8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    2800:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+    2808:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l2_fault r25 }
+    2810:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    2818:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2820:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    2828:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    2830:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+    2838:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    2840:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    2848:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    2850:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    2858:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; st r25, r26 }
+    2860:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; st r25, r26 }
+    2868:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+    2870:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; nop ; st2 r25, r26 }
+    2878:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jalr r15 ; st4 r25, r26 }
+    2880:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; ld r25, r26 }
+    2888:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; v1addi r15, r16, 5 }
+    2890:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; v2int_l r15, r16, r17 }
+    2898:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+    28a0:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; cmpexch r15, r16, r17 }
+    28a8:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; cmpexch r15, r16, r17 }
+    28b0:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; cmpexch r15, r16, r17 }
+    28b8:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; cmpexch r15, r16, r17 }
+    28c0:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; cmpexch r15, r16, r17 }
+    28c8:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; cmpexch4 r15, r16, r17 }
+    28d0:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+    28d8:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpexch4 r15, r16, r17 }
+    28e0:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 }
+    28e8:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+    28f0:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+    28f8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+    2900:	[0-9a-f]* 	{ cmples r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+    2908:	[0-9a-f]* 	{ cmples r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+    2910:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    2918:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    2920:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+    2928:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmplts r5, r6, r7 }
+    2930:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    2938:	[0-9a-f]* 	{ ctz r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    2940:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; cmples r15, r16, r17 }
+    2948:	[0-9a-f]* 	{ cmples r15, r16, r17 ; info 19 ; st4 r25, r26 }
+    2950:	[0-9a-f]* 	{ cmples r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    2958:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+    2960:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    2968:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+    2970:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    2978:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
+    2980:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 }
+    2988:	[0-9a-f]* 	{ cmples r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
+    2990:	[0-9a-f]* 	{ cmples r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
+    2998:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    29a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    29a8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+    29b0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    29b8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+    29c0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    29c8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    29d0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    29d8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+    29e0:	[0-9a-f]* 	{ cmples r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+    29e8:	[0-9a-f]* 	{ pcnt r5, r6 ; cmples r15, r16, r17 }
+    29f0:	[0-9a-f]* 	{ revbits r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
+    29f8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+    2a00:	[0-9a-f]* 	{ cmples r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
+    2a08:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    2a10:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
+    2a18:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
+    2a20:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l2_fault r25 }
+    2a28:	[0-9a-f]* 	{ cmples r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
+    2a30:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    2a38:	[0-9a-f]* 	{ cmples r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    2a40:	[0-9a-f]* 	{ cmples r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    2a48:	[0-9a-f]* 	{ cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    2a50:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+    2a58:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+    2a60:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+    2a68:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    2a70:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+    2a78:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+    2a80:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+    2a88:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
+    2a90:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    2a98:	[0-9a-f]* 	{ cmples r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
+    2aa0:	[0-9a-f]* 	{ cmples r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
+    2aa8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    2ab0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    2ab8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+    2ac0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmples r15, r16, r17 }
+    2ac8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; v1addi r5, r6, 5 }
+    2ad0:	[0-9a-f]* 	{ cmples r15, r16, r17 ; v1shru r5, r6, r7 }
+    2ad8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; v2shlsc r5, r6, r7 }
+    2ae0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+    2ae8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    2af0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+    2af8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    2b00:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    2b08:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    2b10:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    2b18:	[0-9a-f]* 	{ cmples r5, r6, r7 ; fetchand r15, r16, r17 }
+    2b20:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    2b28:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    2b30:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jr r15 ; st r25, r26 }
+    2b38:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ill ; ld r25, r26 }
+    2b40:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    2b48:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    2b50:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    2b58:	[0-9a-f]* 	{ cmples r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    2b60:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    2b68:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    2b70:	[0-9a-f]* 	{ cmples r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    2b78:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    2b80:	[0-9a-f]* 	{ cmples r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    2b88:	[0-9a-f]* 	{ cmples r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    2b90:	[0-9a-f]* 	{ cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+    2b98:	[0-9a-f]* 	{ cmples r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+    2ba0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jr r15 ; prefetch r25 }
+    2ba8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    2bb0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    2bb8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    2bc0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    2bc8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    2bd0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    2bd8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2be0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    2be8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; rotli r15, r16, 5 }
+    2bf0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    2bf8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    2c00:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    2c08:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    2c10:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    2c18:	[0-9a-f]* 	{ cmples r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
+    2c20:	[0-9a-f]* 	{ cmples r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+    2c28:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    2c30:	[0-9a-f]* 	{ cmples r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
+    2c38:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    2c40:	[0-9a-f]* 	{ cmples r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    2c48:	[0-9a-f]* 	{ cmples r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+    2c50:	[0-9a-f]* 	{ cmples r5, r6, r7 ; v2maxsi r15, r16, 5 }
+    2c58:	[0-9a-f]* 	{ cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    2c60:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+    2c68:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+    2c70:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+    2c78:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+    2c80:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    2c88:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+    2c90:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmplts r5, r6, r7 }
+    2c98:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    2ca0:	[0-9a-f]* 	{ ctz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+    2ca8:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; cmpleu r15, r16, r17 }
+    2cb0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; info 19 ; st4 r25, r26 }
+    2cb8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    2cc0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+    2cc8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    2cd0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
+    2cd8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
+    2ce0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
+    2ce8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    2cf0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
+    2cf8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
+    2d00:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
+    2d08:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
+    2d10:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+    2d18:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+    2d20:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+    2d28:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    2d30:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+    2d38:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+    2d40:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+    2d48:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+    2d50:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpleu r15, r16, r17 }
+    2d58:	[0-9a-f]* 	{ revbits r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    2d60:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+    2d68:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
+    2d70:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
+    2d78:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
+    2d80:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
+    2d88:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
+    2d90:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
+    2d98:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    2da0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    2da8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    2db0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    2db8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+    2dc0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+    2dc8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+    2dd0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    2dd8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+    2de0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+    2de8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+    2df0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
+    2df8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    2e00:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
+    2e08:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
+    2e10:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+    2e18:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+    2e20:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+    2e28:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpleu r15, r16, r17 }
+    2e30:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; v1addi r5, r6, 5 }
+    2e38:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; v1shru r5, r6, r7 }
+    2e40:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; v2shlsc r5, r6, r7 }
+    2e48:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+    2e50:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    2e58:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+    2e60:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    2e68:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    2e70:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    2e78:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    2e80:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; fetchand r15, r16, r17 }
+    2e88:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    2e90:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    2e98:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jr r15 ; st r25, r26 }
+    2ea0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; ill ; ld r25, r26 }
+    2ea8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    2eb0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    2eb8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    2ec0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    2ec8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    2ed0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    2ed8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    2ee0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    2ee8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    2ef0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    2ef8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+    2f00:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+    2f08:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jr r15 ; prefetch r25 }
+    2f10:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    2f18:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    2f20:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    2f28:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    2f30:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    2f38:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    2f40:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    2f48:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    2f50:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; rotli r15, r16, 5 }
+    2f58:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    2f60:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    2f68:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    2f70:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    2f78:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    2f80:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
+    2f88:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+    2f90:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    2f98:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
+    2fa0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    2fa8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    2fb0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+    2fb8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; v2maxsi r15, r16, 5 }
+    2fc0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    2fc8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+    2fd0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+    2fd8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+    2fe0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
+    2fe8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    2ff0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+    2ff8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmplts r5, r6, r7 }
+    3000:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    3008:	[0-9a-f]* 	{ ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
+    3010:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; cmplts r15, r16, r17 }
+    3018:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; info 19 ; st4 r25, r26 }
+    3020:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    3028:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+    3030:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    3038:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    3040:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld2s r25, r26 }
+    3048:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
+    3050:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+    3058:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
+    3060:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
+    3068:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+    3070:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+    3078:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+    3080:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+    3088:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
+    3090:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+    3098:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
+    30a0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l3_fault r25 }
+    30a8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+    30b0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+    30b8:	[0-9a-f]* 	{ pcnt r5, r6 ; cmplts r15, r16, r17 }
+    30c0:	[0-9a-f]* 	{ revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
+    30c8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+    30d0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
+    30d8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
+    30e0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
+    30e8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
+    30f0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    30f8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
+    3100:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    3108:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    3110:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    3118:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    3120:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+    3128:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+    3130:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+    3138:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    3140:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+    3148:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+    3150:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
+    3158:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
+    3160:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+    3168:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
+    3170:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
+    3178:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+    3180:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+    3188:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+    3190:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmplts r15, r16, r17 }
+    3198:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; v1addi r5, r6, 5 }
+    31a0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; v1shru r5, r6, r7 }
+    31a8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; v2shlsc r5, r6, r7 }
+    31b0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+    31b8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    31c0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+    31c8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    31d0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    31d8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    31e0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    31e8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; fetchand r15, r16, r17 }
+    31f0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    31f8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    3200:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jr r15 ; st r25, r26 }
+    3208:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; ill ; ld r25, r26 }
+    3210:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    3218:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    3220:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    3228:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    3230:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    3238:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    3240:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    3248:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    3250:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    3258:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    3260:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+    3268:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+    3270:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jr r15 ; prefetch r25 }
+    3278:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    3280:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    3288:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    3290:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    3298:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    32a0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    32a8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    32b0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    32b8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; rotli r15, r16, 5 }
+    32c0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    32c8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    32d0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    32d8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    32e0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    32e8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
+    32f0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+    32f8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    3300:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
+    3308:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    3310:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    3318:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+    3320:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; v2maxsi r15, r16, 5 }
+    3328:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    3330:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+    3338:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+    3340:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+    3348:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    3350:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    3358:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmples r5, r6, r7 ; st2 r25, r26 }
+    3360:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 }
+    3368:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    3370:	[0-9a-f]* 	{ ctz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    3378:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; cmpltsi r15, r16, 5 }
+    3380:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; info 19 ; st4 r25, r26 }
+    3388:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; or r5, r6, r7 ; ld r25, r26 }
+    3390:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+    3398:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    33a0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
+    33a8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
+    33b0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
+    33b8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
+    33c0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; addx r5, r6, r7 ; ld4s r25, r26 }
+    33c8:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; rotli r5, r6, 5 ; ld4s r25, r26 }
+    33d0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
+    33d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
+    33e0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; move r5, r6 ; st2 r25, r26 }
+    33e8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    33f0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 }
+    33f8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
+    3400:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    3408:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    3410:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
+    3418:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st4 r25, r26 }
+    3420:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpltsi r15, r16, 5 }
+    3428:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    3430:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch r25 }
+    3438:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 }
+    3440:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    3448:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
+    3450:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l2 r25 }
+    3458:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
+    3460:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; and r5, r6, r7 ; prefetch_l3 r25 }
+    3468:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    3470:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    3478:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    3480:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; rotl r5, r6, r7 ; ld r25, r26 }
+    3488:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl r5, r6, r7 ; ld1u r25, r26 }
+    3490:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+    3498:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+    34a0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    34a8:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
+    34b0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+    34b8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 }
+    34c0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl3add r5, r6, r7 ; st r25, r26 }
+    34c8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
+    34d0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; addx r5, r6, r7 ; st2 r25, r26 }
+    34d8:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
+    34e0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    34e8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    34f0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; st4 r25, r26 }
+    34f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 }
+    3500:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; v1addi r5, r6, 5 }
+    3508:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; v1shru r5, r6, r7 }
+    3510:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; v2shlsc r5, r6, r7 }
+    3518:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; add r15, r16, r17 ; ld1u r25, r26 }
+    3520:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    3528:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld2s r25, r26 }
+    3530:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    3538:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    3540:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
+    3548:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    3550:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; fetchand r15, r16, r17 }
+    3558:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ill ; prefetch_l3_fault r25 }
+    3560:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l3 r25 }
+    3568:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jr r15 ; st r25, r26 }
+    3570:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ill ; ld r25, r26 }
+    3578:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    3580:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ld1s_add r15, r16, 5 }
+    3588:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    3590:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    3598:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jrp r15 ; ld2u r25, r26 }
+    35a0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    35a8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    35b0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    35b8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; lnk r15 ; st4 r25, r26 }
+    35c0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; move r15, r16 ; st4 r25, r26 }
+    35c8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; mz r15, r16, r17 ; st4 r25, r26 }
+    35d0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; or r15, r16, r17 ; ld r25, r26 }
+    35d8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jr r15 ; prefetch r25 }
+    35e0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch r25 }
+    35e8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 }
+    35f0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    35f8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    3600:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; lnk r15 ; prefetch_l2_fault r25 }
+    3608:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    3610:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    3618:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    3620:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; rotli r15, r16, 5 }
+    3628:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    3630:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    3638:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    3640:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    3648:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    3650:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; st r25, r26 }
+    3658:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 }
+    3660:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    3668:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; or r15, r16, r17 ; st2 r25, r26 }
+    3670:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jr r15 ; st4 r25, r26 }
+    3678:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    3680:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; v1cmpeq r15, r16, r17 }
+    3688:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; v2maxsi r15, r16, 5 }
+    3690:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    3698:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+    36a0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+    36a8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+    36b0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    36b8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    36c0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+    36c8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmplts r5, r6, r7 }
+    36d0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    36d8:	[0-9a-f]* 	{ ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    36e0:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; cmpltu r15, r16, r17 }
+    36e8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; info 19 ; st4 r25, r26 }
+    36f0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    36f8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+    3700:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    3708:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    3710:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2s r25, r26 }
+    3718:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; ld2s r25, r26 }
+    3720:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
+    3728:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; addx r5, r6, r7 ; ld4s r25, r26 }
+    3730:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; rotli r5, r6, 5 ; ld4s r25, r26 }
+    3738:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+    3740:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+    3748:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+    3750:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    3758:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; st r25, r26 }
+    3760:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
+    3768:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    3770:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+    3778:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+    3780:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+    3788:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpltu r15, r16, r17 }
+    3790:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    3798:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+    37a0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
+    37a8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    37b0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
+    37b8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l2 r25 }
+    37c0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+    37c8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; and r5, r6, r7 ; prefetch_l3 r25 }
+    37d0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    37d8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    37e0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    37e8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    37f0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+    37f8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+    3800:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+    3808:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    3810:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+    3818:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+    3820:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; st r25, r26 }
+    3828:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; st r25, r26 }
+    3830:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
+    3838:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; addx r5, r6, r7 ; st2 r25, r26 }
+    3840:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
+    3848:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    3850:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    3858:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+    3860:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpltu r15, r16, r17 }
+    3868:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; v1addi r5, r6, 5 }
+    3870:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; v1shru r5, r6, r7 }
+    3878:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; v2shlsc r5, r6, r7 }
+    3880:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+    3888:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    3890:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+    3898:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    38a0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    38a8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    38b0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    38b8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; fetchand r15, r16, r17 }
+    38c0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    38c8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    38d0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jr r15 ; st r25, r26 }
+    38d8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ill ; ld r25, r26 }
+    38e0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    38e8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    38f0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    38f8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    3900:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    3908:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    3910:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    3918:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    3920:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    3928:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    3930:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+    3938:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+    3940:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jr r15 ; prefetch r25 }
+    3948:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    3950:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    3958:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    3960:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    3968:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    3970:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    3978:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    3980:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    3988:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; rotli r15, r16, 5 }
+    3990:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    3998:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    39a0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    39a8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    39b0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    39b8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; andi r15, r16, 5 ; st r25, r26 }
+    39c0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+    39c8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    39d0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
+    39d8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    39e0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    39e8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+    39f0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; v2maxsi r15, r16, 5 }
+    39f8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    3a00:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; cmpltui r15, r16, 5 }
+    3a08:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltui r15, r16, 5 }
+    3a10:	[0-9a-f]* 	{ cmpltui r15, r16, 5 ; sub r5, r6, r7 }
+    3a18:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; cmpltui r15, r16, 5 }
+    3a20:	[0-9a-f]* 	{ cmpltui r15, r16, 5 ; v2packl r5, r6, r7 }
+    3a28:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 }
+    3a30:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; ld1u_add r15, r16, 5 }
+    3a38:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; prefetch_add_l1 r15, 5 }
+    3a40:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; stnt r15, r16 }
+    3a48:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; v2addi r15, r16, 5 }
+    3a50:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; v4sub r15, r16, r17 }
+    3a58:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
+    3a60:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
+    3a68:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
+    3a70:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+    3a78:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpeq r5, r6, r7 }
+    3a80:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+    3a88:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
+    3a90:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+    3a98:	[0-9a-f]* 	{ ctz r5, r6 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+    3aa0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
+    3aa8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 }
+    3ab0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    3ab8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; ld1s r25, r26 }
+    3ac0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    3ac8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; nop ; ld1u r25, r26 }
+    3ad0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+    3ad8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
+    3ae0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    3ae8:	[0-9a-f]* 	{ clz r5, r6 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
+    3af0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
+    3af8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
+    3b00:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; cmpne r15, r16, r17 }
+    3b08:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
+    3b10:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; cmpne r15, r16, r17 }
+    3b18:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 }
+    3b20:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; cmpne r15, r16, r17 }
+    3b28:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+    3b30:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpne r15, r16, r17 ; st4 r25, r26 }
+    3b38:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; nop ; ld r25, r26 }
+    3b40:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
+    3b48:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
+    3b50:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+    3b58:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; info 19 ; prefetch r25 }
+    3b60:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 }
+    3b68:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    3b70:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+    3b78:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
+    3b80:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 }
+    3b88:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    3b90:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    3b98:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+    3ba0:	[0-9a-f]* 	{ revbits r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
+    3ba8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
+    3bb0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
+    3bb8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    3bc0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    3bc8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    3bd0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
+    3bd8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+    3be0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
+    3be8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
+    3bf0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; st1 r25, r26 }
+    3bf8:	[0-9a-f]* 	{ clz r5, r6 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+    3c00:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+    3c08:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 }
+    3c10:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    3c18:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    3c20:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2s r25, r26 }
+    3c28:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+    3c30:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; v2add r5, r6, r7 }
+    3c38:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; v2shrui r5, r6, 5 }
+    3c40:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    3c48:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    3c50:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    3c58:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+    3c60:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    3c68:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    3c70:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+    3c78:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; finv r15 }
+    3c80:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ill ; st4 r25, r26 }
+    3c88:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    3c90:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jr r15 }
+    3c98:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    3ca0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+    3ca8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
+    3cb0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+    3cb8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    3cc0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
+    3cc8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ill ; ld4s r25, r26 }
+    3cd0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    3cd8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ld4u r25, r26 }
+    3ce0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    3ce8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+    3cf0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; nop ; ld1u r25, r26 }
+    3cf8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+    3d00:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    3d08:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    3d10:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+    3d18:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    3d20:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    3d28:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    3d30:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    3d38:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+    3d40:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    3d48:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    3d50:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    3d58:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    3d60:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    3d68:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    3d70:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+    3d78:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+    3d80:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
+    3d88:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+    3d90:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+    3d98:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    3da0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    3da8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; v1cmplts r15, r16, r17 }
+    3db0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; v2mz r15, r16, r17 }
+    3db8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+    3dc0:	[0-9a-f]* 	{ cmul r5, r6, r7 ; flush r15 }
+    3dc8:	[0-9a-f]* 	{ cmul r5, r6, r7 ; ldnt4u r15, r16 }
+    3dd0:	[0-9a-f]* 	{ cmul r5, r6, r7 ; shli r15, r16, 5 }
+    3dd8:	[0-9a-f]* 	{ cmul r5, r6, r7 ; v1int_h r15, r16, r17 }
+    3de0:	[0-9a-f]* 	{ cmul r5, r6, r7 ; v2shli r15, r16, 5 }
+    3de8:	[0-9a-f]* 	{ cmula r5, r6, r7 ; cmpltui r15, r16, 5 }
+    3df0:	[0-9a-f]* 	{ cmula r5, r6, r7 ; ld4s_add r15, r16, 5 }
+    3df8:	[0-9a-f]* 	{ cmula r5, r6, r7 ; prefetch r15 }
+    3e00:	[0-9a-f]* 	{ cmula r5, r6, r7 ; stnt4_add r15, r16, 5 }
+    3e08:	[0-9a-f]* 	{ cmula r5, r6, r7 ; v2cmplts r15, r16, r17 }
+    3e10:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; addi r15, r16, 5 }
+    3e18:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; infol 4660 }
+    3e20:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; mnz r15, r16, r17 }
+    3e28:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; shrui r15, r16, 5 }
+    3e30:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; v1mnz r15, r16, r17 }
+    3e38:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; v2sub r15, r16, r17 }
+    3e40:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; exch r15, r16, r17 }
+    3e48:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; ldnt r15, r16 }
+    3e50:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; raise }
+    3e58:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; v1addi r15, r16, 5 }
+    3e60:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; v2int_l r15, r16, r17 }
+    3e68:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; and r15, r16, r17 }
+    3e70:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; jrp r15 }
+    3e78:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; nop }
+    3e80:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; st2 r15, r16 }
+    3e88:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; v1shru r15, r16, r17 }
+    3e90:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; v4packsc r15, r16, r17 }
+    3e98:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; fetchand r15, r16, r17 }
+    3ea0:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+    3ea8:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; shl1addx r15, r16, r17 }
+    3eb0:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 }
+    3eb8:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; v2mz r15, r16, r17 }
+    3ec0:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; cmples r15, r16, r17 }
+    3ec8:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; ld2s r15, r16 }
+    3ed0:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    3ed8:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; stnt1 r15, r16 }
+    3ee0:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; v2addsc r15, r16, r17 }
+    3ee8:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; v4subsc r15, r16, r17 }
+    3ef0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; flushwb }
+    3ef8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+    3f00:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; shlx r15, r16, r17 }
+    3f08:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; v1int_l r15, r16, r17 }
+    3f10:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; v2shlsc r15, r16, r17 }
+    3f18:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; cmpne r15, r16, r17 }
+    3f20:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; ld4u r15, r16 }
+    3f28:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; prefetch_l1_fault r15 }
+    3f30:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; stnt_add r15, r16, 5 }
+    3f38:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    3f40:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
+    3f48:	[0-9a-f]* 	{ ctz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    3f50:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
+    3f58:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    3f60:	[0-9a-f]* 	{ ctz r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    3f68:	[0-9a-f]* 	{ ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
+    3f70:	[0-9a-f]* 	{ ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    3f78:	[0-9a-f]* 	{ ctz r5, r6 ; fetchand r15, r16, r17 }
+    3f80:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; prefetch_l3_fault r25 }
+    3f88:	[0-9a-f]* 	{ ctz r5, r6 ; jalr r15 ; prefetch_l3 r25 }
+    3f90:	[0-9a-f]* 	{ ctz r5, r6 ; jr r15 ; st r25, r26 }
+    3f98:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; ld r25, r26 }
+    3fa0:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    3fa8:	[0-9a-f]* 	{ ctz r5, r6 ; ld1s_add r15, r16, 5 }
+    3fb0:	[0-9a-f]* 	{ ctz r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    3fb8:	[0-9a-f]* 	{ ctz r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    3fc0:	[0-9a-f]* 	{ ctz r5, r6 ; jrp r15 ; ld2u r25, r26 }
+    3fc8:	[0-9a-f]* 	{ ctz r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    3fd0:	[0-9a-f]* 	{ ctz r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    3fd8:	[0-9a-f]* 	{ ctz r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    3fe0:	[0-9a-f]* 	{ ctz r5, r6 ; lnk r15 ; st4 r25, r26 }
+    3fe8:	[0-9a-f]* 	{ ctz r5, r6 ; move r15, r16 ; st4 r25, r26 }
+    3ff0:	[0-9a-f]* 	{ ctz r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 }
+    3ff8:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; ld r25, r26 }
+    4000:	[0-9a-f]* 	{ ctz r5, r6 ; jr r15 ; prefetch r25 }
+    4008:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    4010:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    4018:	[0-9a-f]* 	{ ctz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    4020:	[0-9a-f]* 	{ ctz r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    4028:	[0-9a-f]* 	{ ctz r5, r6 ; lnk r15 ; prefetch_l2_fault r25 }
+    4030:	[0-9a-f]* 	{ ctz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    4038:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    4040:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    4048:	[0-9a-f]* 	{ ctz r5, r6 ; rotli r15, r16, 5 }
+    4050:	[0-9a-f]* 	{ ctz r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    4058:	[0-9a-f]* 	{ ctz r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    4060:	[0-9a-f]* 	{ ctz r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    4068:	[0-9a-f]* 	{ ctz r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    4070:	[0-9a-f]* 	{ ctz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    4078:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; st r25, r26 }
+    4080:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
+    4088:	[0-9a-f]* 	{ ctz r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    4090:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
+    4098:	[0-9a-f]* 	{ ctz r5, r6 ; jr r15 ; st4 r25, r26 }
+    40a0:	[0-9a-f]* 	{ ctz r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    40a8:	[0-9a-f]* 	{ ctz r5, r6 ; v1cmpeq r15, r16, r17 }
+    40b0:	[0-9a-f]* 	{ ctz r5, r6 ; v2maxsi r15, r16, 5 }
+    40b8:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    40c0:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    40c8:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; ldnt2u r15, r16 }
+    40d0:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; shl2add r15, r16, r17 }
+    40d8:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+    40e0:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; v2packh r15, r16, r17 }
+    40e8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; dblalign2 r15, r16, r17 }
+    40f0:	[0-9a-f]* 	{ dblalign2 r15, r16, r17 ; info 19 }
+    40f8:	[0-9a-f]* 	{ dblalign2 r15, r16, r17 ; shl16insli r5, r6, 4660 }
+    4100:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; dblalign2 r15, r16, r17 }
+    4108:	[0-9a-f]* 	{ dblalign2 r15, r16, r17 ; v2cmpltu r5, r6, r7 }
+    4110:	[0-9a-f]* 	{ dblalign2 r15, r16, r17 ; v4shru r5, r6, r7 }
+    4118:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; flush r15 }
+    4120:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; ldnt4u r15, r16 }
+    4128:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; shli r15, r16, 5 }
+    4130:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; v1int_h r15, r16, r17 }
+    4138:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; v2shli r15, r16, 5 }
+    4140:	[0-9a-f]* 	{ dblalign4 r15, r16, r17 ; cmpleu r5, r6, r7 }
+    4148:	[0-9a-f]* 	{ dblalign4 r15, r16, r17 ; move r5, r6 }
+    4150:	[0-9a-f]* 	{ dblalign4 r15, r16, r17 ; shl2addx r5, r6, r7 }
+    4158:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; dblalign4 r15, r16, r17 }
+    4160:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; dblalign4 r15, r16, r17 }
+    4168:	[0-9a-f]* 	{ dblalign4 r15, r16, r17 ; xori r5, r6, 5 }
+    4170:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; ill }
+    4178:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; mf }
+    4180:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; shrsi r15, r16, 5 }
+    4188:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; v1minu r15, r16, r17 }
+    4190:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; v2shru r15, r16, r17 }
+    4198:	[0-9a-f]* 	{ dblalign6 r15, r16, r17 ; cmpltui r5, r6, 5 }
+    41a0:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; dblalign6 r15, r16, r17 }
+    41a8:	[0-9a-f]* 	{ dblalign6 r15, r16, r17 ; shlx r5, r6, r7 }
+    41b0:	[0-9a-f]* 	{ dblalign6 r15, r16, r17 ; v1int_h r5, r6, r7 }
+    41b8:	[0-9a-f]* 	{ dblalign6 r15, r16, r17 ; v2maxsi r5, r6, 5 }
+    41c0:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; addx r15, r16, r17 }
+    41c8:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; iret }
+    41d0:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; movei r15, 5 }
+    41d8:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; shruxi r15, r16, 5 }
+    41e0:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; v1shl r15, r16, r17 }
+    41e8:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; v4add r15, r16, r17 }
+    41f0:	[0-9a-f]* 	{ cmula r5, r6, r7 ; dtlbpr r15 }
+    41f8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; dtlbpr r15 }
+    4200:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; dtlbpr r15 }
+    4208:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; dtlbpr r15 }
+    4210:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; dtlbpr r15 }
+    4218:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; exch r15, r16, r17 }
+    4220:	[0-9a-f]* 	{ exch r15, r16, r17 }
+    4228:	[0-9a-f]* 	{ or r5, r6, r7 ; exch r15, r16, r17 }
+    4230:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; exch r15, r16, r17 }
+    4238:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; exch r15, r16, r17 }
+    4240:	[0-9a-f]* 	{ v4add r5, r6, r7 ; exch r15, r16, r17 }
+    4248:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; exch4 r15, r16, r17 }
+    4250:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; exch4 r15, r16, r17 }
+    4258:	[0-9a-f]* 	{ shrui r5, r6, 5 ; exch4 r15, r16, r17 }
+    4260:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; exch4 r15, r16, r17 }
+    4268:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; exch4 r15, r16, r17 }
+    4270:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; andi r15, r16, 5 }
+    4278:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; ld r15, r16 }
+    4280:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; nor r15, r16, r17 }
+    4288:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; st2_add r15, r16, 5 }
+    4290:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; v1shrui r15, r16, 5 }
+    4298:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; v4shl r15, r16, r17 }
+    42a0:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    42a8:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; ldnt2u r15, r16 }
+    42b0:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; shl2add r15, r16, r17 }
+    42b8:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+    42c0:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; v2packh r15, r16, r17 }
+    42c8:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; cmpleu r15, r16, r17 }
+    42d0:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; ld2s_add r15, r16, 5 }
+    42d8:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+    42e0:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; stnt1_add r15, r16, 5 }
+    42e8:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; v2cmpeq r15, r16, r17 }
+    42f0:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; wh64 r15 }
+    42f8:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 }
+    4300:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; ldnt_add r15, r16, 5 }
+    4308:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; shlxi r15, r16, 5 }
+    4310:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; v1maxu r15, r16, r17 }
+    4318:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; v2shrs r15, r16, r17 }
+    4320:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; dblalign2 r15, r16, r17 }
+    4328:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; ld4u_add r15, r16, 5 }
+    4330:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; prefetch_l2 r15 }
+    4338:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; sub r15, r16, r17 }
+    4340:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+    4348:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; addx r15, r16, r17 }
+    4350:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; iret }
+    4358:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; movei r15, 5 }
+    4360:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; shruxi r15, r16, 5 }
+    4368:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; v1shl r15, r16, r17 }
+    4370:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; v4add r15, r16, r17 }
+    4378:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; fetchadd r15, r16, r17 }
+    4380:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+    4388:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; rotli r15, r16, 5 }
+    4390:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+    4398:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; v2maxsi r15, r16, 5 }
+    43a0:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; cmpeq r15, r16, r17 }
+    43a8:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; ld1s r15, r16 }
+    43b0:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; or r15, r16, r17 }
+    43b8:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; st4 r15, r16 }
+    43c0:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; v1sub r15, r16, r17 }
+    43c8:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; v4shlsc r15, r16, r17 }
+    43d0:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; fetchadd r15, r16, r17 }
+    43d8:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; fetchadd r15, r16, r17 }
+    43e0:	[0-9a-f]* 	{ subx r5, r6, r7 ; fetchadd r15, r16, r17 }
+    43e8:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; fetchadd r15, r16, r17 }
+    43f0:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; fetchadd r15, r16, r17 }
+    43f8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+    4400:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+    4408:	[0-9a-f]* 	{ shl r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+    4410:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+    4418:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; fetchadd4 r15, r16, r17 }
+    4420:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+    4428:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    4430:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    4438:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; fetchaddgez r15, r16, r17 }
+    4440:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    4448:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    4450:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+    4458:	[0-9a-f]* 	{ infol 4660 ; fetchaddgez4 r15, r16, r17 }
+    4460:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+    4468:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+    4470:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; fetchaddgez4 r15, r16, r17 }
+    4478:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+    4480:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; fetchand r15, r16, r17 }
+    4488:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; fetchand r15, r16, r17 }
+    4490:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; fetchand r15, r16, r17 }
+    4498:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; fetchand r15, r16, r17 }
+    44a0:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; fetchand r15, r16, r17 }
+    44a8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    44b0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    44b8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    44c0:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    44c8:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    44d0:	[0-9a-f]* 	{ xor r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    44d8:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; fetchor r15, r16, r17 }
+    44e0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; fetchor r15, r16, r17 }
+    44e8:	[0-9a-f]* 	{ v1add r5, r6, r7 ; fetchor r15, r16, r17 }
+    44f0:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; fetchor r15, r16, r17 }
+    44f8:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; fetchor r15, r16, r17 }
+    4500:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    4508:	[0-9a-f]* 	{ movei r5, 5 ; fetchor4 r15, r16, r17 }
+    4510:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    4518:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    4520:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    4528:	[0-9a-f]* 	{ add r5, r6, r7 ; finv r15 }
+    4530:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; finv r15 }
+    4538:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; finv r15 }
+    4540:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; finv r15 }
+    4548:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; finv r15 }
+    4550:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; finv r15 }
+    4558:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; flush r15 }
+    4560:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; flush r15 }
+    4568:	[0-9a-f]* 	{ shli r5, r6, 5 ; flush r15 }
+    4570:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; flush r15 }
+    4578:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; flush r15 }
+    4580:	[0-9a-f]* 	{ addli r5, r6, 4660 ; flushwb }
+    4588:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; flushwb }
+    4590:	[0-9a-f]* 	{ mulx r5, r6, r7 ; flushwb }
+    4598:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; flushwb }
+    45a0:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; flushwb }
+    45a8:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; flushwb }
+    45b0:	[0-9a-f]* 	{ add r5, r6, r7 ; ld2u r25, r26 }
+    45b8:	[0-9a-f]* 	{ addi r5, r6, 5 ; ld4u r25, r26 }
+    45c0:	[0-9a-f]* 	{ addx r5, r6, r7 ; ld4u r25, r26 }
+    45c8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; prefetch r25 }
+    45d0:	[0-9a-f]* 	{ and r5, r6, r7 ; ld4u r25, r26 }
+    45d8:	[0-9a-f]* 	{ andi r5, r6, 5 ; prefetch r25 }
+    45e0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; prefetch r25 }
+    45e8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+    45f0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+    45f8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; prefetch_l2_fault r25 }
+    4600:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+    4608:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; st1 r25, r26 }
+    4610:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    4618:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ld r25, r26 }
+    4620:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ld r25, r26 }
+    4628:	[0-9a-f]* 	{ ctz r5, r6 ; prefetch_l3 r25 }
+    4630:	[0-9a-f]* 	{ ld2u r25, r26 }
+    4638:	[0-9a-f]* 	{ icoh r15 }
+    4640:	[0-9a-f]* 	{ inv r15 }
+    4648:	[0-9a-f]* 	{ jr r15 ; ld r25, r26 }
+    4650:	[0-9a-f]* 	{ add r5, r6, r7 ; ld r25, r26 }
+    4658:	[0-9a-f]* 	{ mnz r15, r16, r17 ; ld r25, r26 }
+    4660:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; ld r25, r26 }
+    4668:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; ld1s r25, r26 }
+    4670:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; ld1s r25, r26 }
+    4678:	[0-9a-f]* 	{ shrui r5, r6, 5 ; ld1s r25, r26 }
+    4680:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+    4688:	[0-9a-f]* 	{ revbytes r5, r6 ; ld1u r25, r26 }
+    4690:	[0-9a-f]* 	{ ld1u_add r15, r16, 5 }
+    4698:	[0-9a-f]* 	{ jr r15 ; ld2s r25, r26 }
+    46a0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; ld2s r25, r26 }
+    46a8:	[0-9a-f]* 	{ andi r15, r16, 5 ; ld2u r25, r26 }
+    46b0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ld2u r25, r26 }
+    46b8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; ld2u r25, r26 }
+    46c0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; ld4s r25, r26 }
+    46c8:	[0-9a-f]* 	{ or r15, r16, r17 ; ld4s r25, r26 }
+    46d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ld4s r25, r26 }
+    46d8:	[0-9a-f]* 	{ ill ; ld4u r25, r26 }
+    46e0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; ld4u r25, r26 }
+    46e8:	[0-9a-f]* 	{ ldnt1u_add r15, r16, 5 }
+    46f0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; prefetch r25 }
+    46f8:	[0-9a-f]* 	{ move r15, r16 ; prefetch_l2 r25 }
+    4700:	[0-9a-f]* 	{ movei r15, 5 ; prefetch_l3 r25 }
+    4708:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
+    4710:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; prefetch r25 }
+    4718:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 }
+    4720:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; ld4u r25, r26 }
+    4728:	[0-9a-f]* 	{ mulax r5, r6, r7 ; prefetch r25 }
+    4730:	[0-9a-f]* 	{ mz r15, r16, r17 ; prefetch_l1_fault r25 }
+    4738:	[0-9a-f]* 	{ nop ; prefetch_l2_fault r25 }
+    4740:	[0-9a-f]* 	{ nor r5, r6, r7 ; prefetch_l3_fault r25 }
+    4748:	[0-9a-f]* 	{ or r5, r6, r7 ; st1 r25, r26 }
+    4750:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; prefetch r25 }
+    4758:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; prefetch r25 }
+    4760:	[0-9a-f]* 	{ shrui r5, r6, 5 ; prefetch r25 }
+    4768:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; prefetch r25 }
+    4770:	[0-9a-f]* 	{ nor r5, r6, r7 ; prefetch r25 }
+    4778:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; prefetch r25 }
+    4780:	[0-9a-f]* 	{ ill ; prefetch_l1_fault r25 }
+    4788:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
+    4790:	[0-9a-f]* 	{ addxi r5, r6, 5 ; prefetch_l2 r25 }
+    4798:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+    47a0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; prefetch_l2 r25 }
+    47a8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; prefetch_l2_fault r25 }
+    47b0:	[0-9a-f]* 	{ nor r15, r16, r17 ; prefetch_l2_fault r25 }
+    47b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+    47c0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; prefetch_l3 r25 }
+    47c8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    47d0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    47d8:	[0-9a-f]* 	{ movei r5, 5 ; prefetch_l3_fault r25 }
+    47e0:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    47e8:	[0-9a-f]* 	{ revbytes r5, r6 ; ld r25, r26 }
+    47f0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; ld1u r25, r26 }
+    47f8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; ld2u r25, r26 }
+    4800:	[0-9a-f]* 	{ shl r5, r6, r7 ; ld4u r25, r26 }
+    4808:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; ld4u r25, r26 }
+    4810:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; prefetch r25 }
+    4818:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; prefetch_l2 r25 }
+    4820:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; prefetch_l3 r25 }
+    4828:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; st r25, r26 }
+    4830:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; st2 r25, r26 }
+    4838:	[0-9a-f]* 	{ shli r5, r6, 5 }
+    4840:	[0-9a-f]* 	{ shrs r5, r6, r7 ; st2 r25, r26 }
+    4848:	[0-9a-f]* 	{ shrsi r5, r6, 5 }
+    4850:	[0-9a-f]* 	{ shrui r15, r16, 5 ; ld1s r25, r26 }
+    4858:	[0-9a-f]* 	{ shruxi r5, r6, 5 }
+    4860:	[0-9a-f]* 	{ jalrp r15 ; st r25, r26 }
+    4868:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; st r25, r26 }
+    4870:	[0-9a-f]* 	{ andi r15, r16, 5 ; st1 r25, r26 }
+    4878:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; st1 r25, r26 }
+    4880:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; st1 r25, r26 }
+    4888:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; st2 r25, r26 }
+    4890:	[0-9a-f]* 	{ or r15, r16, r17 ; st2 r25, r26 }
+    4898:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; st2 r25, r26 }
+    48a0:	[0-9a-f]* 	{ ill ; st4 r25, r26 }
+    48a8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; st4 r25, r26 }
+    48b0:	[0-9a-f]* 	{ stnt4_add r15, r16, 5 }
+    48b8:	[0-9a-f]* 	{ subx r15, r16, r17 ; ld r25, r26 }
+    48c0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ld r25, r26 }
+    48c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ld1u r25, r26 }
+    48d0:	[0-9a-f]* 	{ v1adduc r15, r16, r17 }
+    48d8:	[0-9a-f]* 	{ v1minu r15, r16, r17 }
+    48e0:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 }
+    48e8:	[0-9a-f]* 	{ v2packuc r15, r16, r17 }
+    48f0:	[0-9a-f]* 	{ v4shru r15, r16, r17 }
+    48f8:	[0-9a-f]* 	{ xor r5, r6, r7 ; st r25, r26 }
+    4900:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    4908:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; ldnt4s r15, r16 }
+    4910:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; shl3add r15, r16, r17 }
+    4918:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+    4920:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; v2packuc r15, r16, r17 }
+    4928:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; cmpltsi r15, r16, 5 }
+    4930:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; ld2u_add r15, r16, 5 }
+    4938:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    4940:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; stnt2_add r15, r16, 5 }
+    4948:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; v2cmples r15, r16, r17 }
+    4950:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; xori r15, r16, 5 }
+    4958:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; ill }
+    4960:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; mf }
+    4968:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; shrsi r15, r16, 5 }
+    4970:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; v1minu r15, r16, r17 }
+    4978:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; v2shru r15, r16, r17 }
+    4980:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; dblalign6 r15, r16, r17 }
+    4988:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; ldna r15, r16 }
+    4990:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; prefetch_l3 r15 }
+    4998:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; subxsc r15, r16, r17 }
+    49a0:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; v2cmpne r15, r16, r17 }
+    49a8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 }
+    49b0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    49b8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld4u r25, r26 }
+    49c0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    49c8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
+    49d0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+    49d8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    49e0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; fetchor4 r15, r16, r17 }
+    49e8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; ill ; st2 r25, r26 }
+    49f0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jalr r15 ; st1 r25, r26 }
+    49f8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jr r15 ; st4 r25, r26 }
+    4a00:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jalrp r15 ; ld r25, r26 }
+    4a08:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    4a10:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; addi r15, r16, 5 ; ld1u r25, r26 }
+    4a18:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; ld1u r25, r26 }
+    4a20:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+    4a28:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; move r15, r16 ; ld2u r25, r26 }
+    4a30:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; ld4s r25, r26 }
+    4a38:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    4a40:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    4a48:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    4a50:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 }
+    4a58:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nop ; ld1s r25, r26 }
+    4a60:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
+    4a68:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
+    4a70:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
+    4a78:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    4a80:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    4a88:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+    4a90:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    4a98:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; info 19 ; prefetch_l3 r25 }
+    4aa0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    4aa8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 }
+    4ab0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    4ab8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    4ac0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    4ac8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    4ad0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+    4ad8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    4ae0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; st r25, r26 }
+    4ae8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; add r15, r16, r17 ; st1 r25, r26 }
+    4af0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+    4af8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; st2 r25, r26 }
+    4b00:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; st4 r25, r26 }
+    4b08:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    4b10:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; v1cmpleu r15, r16, r17 }
+    4b18:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; v2mnz r15, r16, r17 }
+    4b20:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
+    4b28:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; finv r15 }
+    4b30:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    4b38:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; shl3addx r15, r16, r17 }
+    4b40:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; v1cmpne r15, r16, r17 }
+    4b48:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; v2shl r15, r16, r17 }
+    4b50:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; cmpltu r15, r16, r17 }
+    4b58:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; ld4s r15, r16 }
+    4b60:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    4b68:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; stnt4 r15, r16 }
+    4b70:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+    4b78:	[0-9a-f]* 	{ add r5, r6, r7 ; icoh r15 }
+    4b80:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; icoh r15 }
+    4b88:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; icoh r15 }
+    4b90:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; icoh r15 }
+    4b98:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; icoh r15 }
+    4ba0:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; icoh r15 }
+    4ba8:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; ld1u r25, r26 }
+    4bb0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; ill ; ld2s r25, r26 }
+    4bb8:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; ld2s r25, r26 }
+    4bc0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; ill ; ld1u r25, r26 }
+    4bc8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; ill ; ld2u r25, r26 }
+    4bd0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ill ; ld4u r25, r26 }
+    4bd8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; ill ; prefetch r25 }
+    4be0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ill ; prefetch_l2 r25 }
+    4be8:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; ld1u r25, r26 }
+    4bf0:	[0-9a-f]* 	{ ill ; prefetch_l2_fault r25 }
+    4bf8:	[0-9a-f]* 	{ info 19 ; ill ; prefetch r25 }
+    4c00:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ill ; ld r25, r26 }
+    4c08:	[0-9a-f]* 	{ and r5, r6, r7 ; ill ; ld1s r25, r26 }
+    4c10:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; ill ; ld1s r25, r26 }
+    4c18:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ill ; ld1u r25, r26 }
+    4c20:	[0-9a-f]* 	{ xor r5, r6, r7 ; ill ; ld1u r25, r26 }
+    4c28:	[0-9a-f]* 	{ pcnt r5, r6 ; ill ; ld2s r25, r26 }
+    4c30:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ill ; ld2u r25, r26 }
+    4c38:	[0-9a-f]* 	{ sub r5, r6, r7 ; ill ; ld2u r25, r26 }
+    4c40:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ill ; ld4s r25, r26 }
+    4c48:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; ill ; ld4u r25, r26 }
+    4c50:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+    4c58:	[0-9a-f]* 	{ move r5, r6 ; ill ; ld4u r25, r26 }
+    4c60:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; ill ; prefetch r25 }
+    4c68:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; ill ; ld2u r25, r26 }
+    4c70:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; ill ; ld4s r25, r26 }
+    4c78:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; ill ; ld1u r25, r26 }
+    4c80:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ill ; ld2s r25, r26 }
+    4c88:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; ld4s r25, r26 }
+    4c90:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; prefetch r25 }
+    4c98:	[0-9a-f]* 	{ pcnt r5, r6 ; ill ; prefetch r25 }
+    4ca0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ill ; prefetch r25 }
+    4ca8:	[0-9a-f]* 	{ clz r5, r6 ; ill ; prefetch r25 }
+    4cb0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; ill ; prefetch r25 }
+    4cb8:	[0-9a-f]* 	{ movei r5, 5 ; ill ; prefetch_l1_fault r25 }
+    4cc0:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; prefetch_l2 r25 }
+    4cc8:	[0-9a-f]* 	{ revbytes r5, r6 ; ill ; prefetch_l2 r25 }
+    4cd0:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; prefetch_l2_fault r25 }
+    4cd8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ill ; prefetch_l2_fault r25 }
+    4ce0:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    4ce8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    4cf0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    4cf8:	[0-9a-f]* 	{ revbytes r5, r6 ; ill ; prefetch_l1_fault r25 }
+    4d00:	[0-9a-f]* 	{ rotli r5, r6, 5 ; ill ; prefetch_l2_fault r25 }
+    4d08:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    4d10:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; ill ; st r25, r26 }
+    4d18:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; ill ; st2 r25, r26 }
+    4d20:	[0-9a-f]* 	{ shli r5, r6, 5 ; ill }
+    4d28:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; ill }
+    4d30:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; ill }
+    4d38:	[0-9a-f]* 	{ pcnt r5, r6 ; ill ; st r25, r26 }
+    4d40:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ill ; st1 r25, r26 }
+    4d48:	[0-9a-f]* 	{ sub r5, r6, r7 ; ill ; st1 r25, r26 }
+    4d50:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ill ; st2 r25, r26 }
+    4d58:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; ill ; st4 r25, r26 }
+    4d60:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; ill ; st4 r25, r26 }
+    4d68:	[0-9a-f]* 	{ subx r5, r6, r7 ; ill ; prefetch r25 }
+    4d70:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ill ; prefetch r25 }
+    4d78:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; prefetch_l2 r25 }
+    4d80:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; ill }
+    4d88:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; ill }
+    4d90:	[0-9a-f]* 	{ xor r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    4d98:	[0-9a-f]* 	{ info 19 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+    4da0:	[0-9a-f]* 	{ info 19 ; addi r5, r6, 5 ; st1 r25, r26 }
+    4da8:	[0-9a-f]* 	{ info 19 ; addx r5, r6, r7 ; st1 r25, r26 }
+    4db0:	[0-9a-f]* 	{ info 19 ; addxi r5, r6, 5 ; st4 r25, r26 }
+    4db8:	[0-9a-f]* 	{ info 19 ; and r5, r6, r7 ; st1 r25, r26 }
+    4dc0:	[0-9a-f]* 	{ info 19 ; andi r5, r6, 5 ; st4 r25, r26 }
+    4dc8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; info 19 ; st2 r25, r26 }
+    4dd0:	[0-9a-f]* 	{ info 19 ; cmpeq r15, r16, r17 }
+    4dd8:	[0-9a-f]* 	{ info 19 ; cmpeqi r5, r6, 5 ; ld1s r25, r26 }
+    4de0:	[0-9a-f]* 	{ info 19 ; cmples r5, r6, r7 ; ld1s r25, r26 }
+    4de8:	[0-9a-f]* 	{ info 19 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+    4df0:	[0-9a-f]* 	{ info 19 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
+    4df8:	[0-9a-f]* 	{ info 19 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    4e00:	[0-9a-f]* 	{ info 19 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    4e08:	[0-9a-f]* 	{ info 19 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
+    4e10:	[0-9a-f]* 	{ info 19 ; dblalign2 r5, r6, r7 }
+    4e18:	[0-9a-f]* 	{ info 19 ; prefetch_l3_fault r25 }
+    4e20:	[0-9a-f]* 	{ info 19 ; ill ; prefetch r25 }
+    4e28:	[0-9a-f]* 	{ info 19 ; jalr r15 ; prefetch r25 }
+    4e30:	[0-9a-f]* 	{ info 19 ; jr r15 ; prefetch_l1_fault r25 }
+    4e38:	[0-9a-f]* 	{ info 19 ; andi r15, r16, 5 ; ld r25, r26 }
+    4e40:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; info 19 ; ld r25, r26 }
+    4e48:	[0-9a-f]* 	{ info 19 ; shrsi r5, r6, 5 ; ld r25, r26 }
+    4e50:	[0-9a-f]* 	{ info 19 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    4e58:	[0-9a-f]* 	{ info 19 ; or r5, r6, r7 ; ld1s r25, r26 }
+    4e60:	[0-9a-f]* 	{ info 19 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    4e68:	[0-9a-f]* 	{ info 19 ; info 19 ; ld1u r25, r26 }
+    4e70:	[0-9a-f]* 	{ info 19 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    4e78:	[0-9a-f]* 	{ info 19 ; addxi r5, r6, 5 ; ld2s r25, r26 }
+    4e80:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; info 19 ; ld2s r25, r26 }
+    4e88:	[0-9a-f]* 	{ info 19 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+    4e90:	[0-9a-f]* 	{ info 19 ; cmples r15, r16, r17 ; ld2u r25, r26 }
+    4e98:	[0-9a-f]* 	{ info 19 ; nop ; ld2u r25, r26 }
+    4ea0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; ld2u r25, r26 }
+    4ea8:	[0-9a-f]* 	{ ctz r5, r6 ; info 19 ; ld4s r25, r26 }
+    4eb0:	[0-9a-f]* 	{ info 19 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    4eb8:	[0-9a-f]* 	{ info 19 ; addi r5, r6, 5 ; ld4u r25, r26 }
+    4ec0:	[0-9a-f]* 	{ info 19 ; move r15, r16 ; ld4u r25, r26 }
+    4ec8:	[0-9a-f]* 	{ info 19 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    4ed0:	[0-9a-f]* 	{ info 19 ; ldnt_add r15, r16, 5 }
+    4ed8:	[0-9a-f]* 	{ info 19 ; mnz r15, r16, r17 ; st4 r25, r26 }
+    4ee0:	[0-9a-f]* 	{ info 19 ; move r5, r6 ; ld r25, r26 }
+    4ee8:	[0-9a-f]* 	{ info 19 ; movei r5, 5 ; ld1u r25, r26 }
+    4ef0:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; info 19 }
+    4ef8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; info 19 ; st4 r25, r26 }
+    4f00:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; info 19 }
+    4f08:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; info 19 ; st1 r25, r26 }
+    4f10:	[0-9a-f]* 	{ mulax r5, r6, r7 ; info 19 ; st2 r25, r26 }
+    4f18:	[0-9a-f]* 	{ info 19 ; mz r15, r16, r17 }
+    4f20:	[0-9a-f]* 	{ info 19 ; nor r15, r16, r17 ; ld1s r25, r26 }
+    4f28:	[0-9a-f]* 	{ info 19 ; or r15, r16, r17 ; ld2s r25, r26 }
+    4f30:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; ld2s r25, r26 }
+    4f38:	[0-9a-f]* 	{ info 19 ; cmplts r15, r16, r17 ; prefetch r25 }
+    4f40:	[0-9a-f]* 	{ info 19 ; or r5, r6, r7 ; prefetch r25 }
+    4f48:	[0-9a-f]* 	{ info 19 ; xor r15, r16, r17 ; prefetch r25 }
+    4f50:	[0-9a-f]* 	{ info 19 ; cmpne r5, r6, r7 ; prefetch r25 }
+    4f58:	[0-9a-f]* 	{ info 19 ; rotli r5, r6, 5 ; prefetch r25 }
+    4f60:	[0-9a-f]* 	{ info 19 ; addi r5, r6, 5 ; prefetch_l1_fault r25 }
+    4f68:	[0-9a-f]* 	{ info 19 ; move r15, r16 ; prefetch_l1_fault r25 }
+    4f70:	[0-9a-f]* 	{ info 19 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    4f78:	[0-9a-f]* 	{ info 19 ; cmpeq r5, r6, r7 ; prefetch_l2 r25 }
+    4f80:	[0-9a-f]* 	{ mulx r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
+    4f88:	[0-9a-f]* 	{ info 19 ; sub r5, r6, r7 ; prefetch_l2 r25 }
+    4f90:	[0-9a-f]* 	{ info 19 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 }
+    4f98:	[0-9a-f]* 	{ info 19 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    4fa0:	[0-9a-f]* 	{ info 19 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+    4fa8:	[0-9a-f]* 	{ info 19 ; mnz r5, r6, r7 ; prefetch_l3 r25 }
+    4fb0:	[0-9a-f]* 	{ info 19 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    4fb8:	[0-9a-f]* 	{ info 19 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    4fc0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
+    4fc8:	[0-9a-f]* 	{ info 19 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    4fd0:	[0-9a-f]* 	{ revbytes r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+    4fd8:	[0-9a-f]* 	{ info 19 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+    4fe0:	[0-9a-f]* 	{ info 19 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 }
+    4fe8:	[0-9a-f]* 	{ info 19 ; shl r5, r6, r7 ; st1 r25, r26 }
+    4ff0:	[0-9a-f]* 	{ info 19 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    4ff8:	[0-9a-f]* 	{ info 19 ; shl1addx r5, r6, r7 ; st4 r25, r26 }
+    5000:	[0-9a-f]* 	{ info 19 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    5008:	[0-9a-f]* 	{ info 19 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    5010:	[0-9a-f]* 	{ info 19 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    5018:	[0-9a-f]* 	{ info 19 ; shli r15, r16, 5 ; ld4u r25, r26 }
+    5020:	[0-9a-f]* 	{ info 19 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    5028:	[0-9a-f]* 	{ info 19 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    5030:	[0-9a-f]* 	{ info 19 ; shru r15, r16, r17 ; prefetch r25 }
+    5038:	[0-9a-f]* 	{ info 19 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+    5040:	[0-9a-f]* 	{ info 19 ; addxi r15, r16, 5 ; st r25, r26 }
+    5048:	[0-9a-f]* 	{ info 19 ; movei r5, 5 ; st r25, r26 }
+    5050:	[0-9a-f]* 	{ info 19 ; shli r5, r6, 5 ; st r25, r26 }
+    5058:	[0-9a-f]* 	{ info 19 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    5060:	[0-9a-f]* 	{ info 19 ; nop ; st1 r25, r26 }
+    5068:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; st1 r25, r26 }
+    5070:	[0-9a-f]* 	{ ctz r5, r6 ; info 19 ; st2 r25, r26 }
+    5078:	[0-9a-f]* 	{ info 19 ; shl r15, r16, r17 ; st2 r25, r26 }
+    5080:	[0-9a-f]* 	{ info 19 ; addi r5, r6, 5 ; st4 r25, r26 }
+    5088:	[0-9a-f]* 	{ info 19 ; move r15, r16 ; st4 r25, r26 }
+    5090:	[0-9a-f]* 	{ info 19 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
+    5098:	[0-9a-f]* 	{ info 19 ; sub r15, r16, r17 ; prefetch r25 }
+    50a0:	[0-9a-f]* 	{ info 19 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+    50a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+    50b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; info 19 ; prefetch_l2_fault r25 }
+    50b8:	[0-9a-f]* 	{ info 19 ; v1cmples r5, r6, r7 }
+    50c0:	[0-9a-f]* 	{ info 19 ; v1mz r15, r16, r17 }
+    50c8:	[0-9a-f]* 	{ info 19 ; v2cmpltu r15, r16, r17 }
+    50d0:	[0-9a-f]* 	{ info 19 ; v2shli r5, r6, 5 }
+    50d8:	[0-9a-f]* 	{ info 19 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    50e0:	[0-9a-f]* 	{ infol 4660 ; addi r15, r16, 5 }
+    50e8:	[0-9a-f]* 	{ infol 4660 ; cmpne r15, r16, r17 }
+    50f0:	[0-9a-f]* 	{ infol 4660 ; flushwb }
+    50f8:	[0-9a-f]* 	{ infol 4660 ; ldnt2s r15, r16 }
+    5100:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; infol 4660 }
+    5108:	[0-9a-f]* 	{ infol 4660 ; shl1addx r15, r16, r17 }
+    5110:	[0-9a-f]* 	{ infol 4660 ; stnt2 r15, r16 }
+    5118:	[0-9a-f]* 	{ infol 4660 ; v1cmpne r5, r6, r7 }
+    5120:	[0-9a-f]* 	{ infol 4660 ; v1shru r15, r16, r17 }
+    5128:	[0-9a-f]* 	{ infol 4660 ; v2maxs r15, r16, r17 }
+    5130:	[0-9a-f]* 	{ infol 4660 ; v2sub r5, r6, r7 }
+    5138:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; inv r15 }
+    5140:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; inv r15 }
+    5148:	[0-9a-f]* 	{ revbytes r5, r6 ; inv r15 }
+    5150:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; inv r15 }
+    5158:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; inv r15 }
+    5160:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; inv r15 }
+    5168:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; iret }
+    5170:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; iret }
+    5178:	[0-9a-f]* 	{ sub r5, r6, r7 ; iret }
+    5180:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; iret }
+    5188:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; iret }
+    5190:	[0-9a-f]* 	{ add r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    5198:	[0-9a-f]* 	{ addx r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    51a0:	[0-9a-f]* 	{ and r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    51a8:	[0-9a-f]* 	{ clz r5, r6 ; jalr r15 ; prefetch_l3 r25 }
+    51b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalr r15 ; st r25, r26 }
+    51b8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jalr r15 ; st2 r25, r26 }
+    51c0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jalr r15 }
+    51c8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+    51d0:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; jalr r15 }
+    51d8:	[0-9a-f]* 	{ jalr r15 ; ld1u r25, r26 }
+    51e0:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; jalr r15 }
+    51e8:	[0-9a-f]* 	{ jalr r15 ; ld r25, r26 }
+    51f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jalr r15 ; ld r25, r26 }
+    51f8:	[0-9a-f]* 	{ nop ; jalr r15 ; ld1s r25, r26 }
+    5200:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jalr r15 ; ld1u r25, r26 }
+    5208:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
+    5210:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    5218:	[0-9a-f]* 	{ clz r5, r6 ; jalr r15 ; ld2u r25, r26 }
+    5220:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jalr r15 ; ld2u r25, r26 }
+    5228:	[0-9a-f]* 	{ movei r5, 5 ; jalr r15 ; ld4s r25, r26 }
+    5230:	[0-9a-f]* 	{ add r5, r6, r7 ; jalr r15 ; ld4u r25, r26 }
+    5238:	[0-9a-f]* 	{ revbytes r5, r6 ; jalr r15 ; ld4u r25, r26 }
+    5240:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    5248:	[0-9a-f]* 	{ movei r5, 5 ; jalr r15 }
+    5250:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    5258:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+    5260:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalr r15 ; st r25, r26 }
+    5268:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    5270:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+    5278:	[0-9a-f]* 	{ nop ; jalr r15 ; st4 r25, r26 }
+    5280:	[0-9a-f]* 	{ ori r5, r6, 5 ; jalr r15 }
+    5288:	[0-9a-f]* 	{ info 19 ; jalr r15 ; prefetch r25 }
+    5290:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalr r15 ; prefetch r25 }
+    5298:	[0-9a-f]* 	{ or r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    52a0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
+    52a8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
+    52b0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+    52b8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
+    52c0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
+    52c8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    52d0:	[0-9a-f]* 	{ addx r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    52d8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
+    52e0:	[0-9a-f]* 	{ revbytes r5, r6 ; jalr r15 ; ld r25, r26 }
+    52e8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
+    52f0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    52f8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    5300:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    5308:	[0-9a-f]* 	{ shli r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
+    5310:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jalr r15 ; prefetch_l1_fault r25 }
+    5318:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jalr r15 ; prefetch_l2_fault r25 }
+    5320:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalr r15 ; st r25, r26 }
+    5328:	[0-9a-f]* 	{ clz r5, r6 ; jalr r15 ; st1 r25, r26 }
+    5330:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+    5338:	[0-9a-f]* 	{ movei r5, 5 ; jalr r15 ; st2 r25, r26 }
+    5340:	[0-9a-f]* 	{ add r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
+    5348:	[0-9a-f]* 	{ revbytes r5, r6 ; jalr r15 ; st4 r25, r26 }
+    5350:	[0-9a-f]* 	{ sub r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
+    5358:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalr r15 }
+    5360:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalr r15 ; ld1s r25, r26 }
+    5368:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; jalr r15 }
+    5370:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; jalr r15 }
+    5378:	[0-9a-f]* 	{ xor r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    5380:	[0-9a-f]* 	{ addi r5, r6, 5 ; jalrp r15 ; ld2u r25, r26 }
+    5388:	[0-9a-f]* 	{ addxi r5, r6, 5 ; jalrp r15 ; ld4s r25, r26 }
+    5390:	[0-9a-f]* 	{ andi r5, r6, 5 ; jalrp r15 ; ld4s r25, r26 }
+    5398:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    53a0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+    53a8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    53b0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+    53b8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
+    53c0:	[0-9a-f]* 	{ ctz r5, r6 ; jalrp r15 ; ld2u r25, r26 }
+    53c8:	[0-9a-f]* 	{ jalrp r15 ; prefetch_l3_fault r25 }
+    53d0:	[0-9a-f]* 	{ info 19 ; jalrp r15 ; prefetch_l1_fault r25 }
+    53d8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
+    53e0:	[0-9a-f]* 	{ clz r5, r6 ; jalrp r15 ; ld1s r25, r26 }
+    53e8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+    53f0:	[0-9a-f]* 	{ movei r5, 5 ; jalrp r15 ; ld1u r25, r26 }
+    53f8:	[0-9a-f]* 	{ add r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    5400:	[0-9a-f]* 	{ revbytes r5, r6 ; jalrp r15 ; ld2s r25, r26 }
+    5408:	[0-9a-f]* 	{ ctz r5, r6 ; jalrp r15 ; ld2u r25, r26 }
+    5410:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalrp r15 ; ld2u r25, r26 }
+    5418:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
+    5420:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+    5428:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+    5430:	[0-9a-f]* 	{ move r5, r6 ; jalrp r15 ; prefetch r25 }
+    5438:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
+    5440:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+    5448:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    5450:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    5458:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
+    5460:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    5468:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
+    5470:	[0-9a-f]* 	{ pcnt r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
+    5478:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    5480:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    5488:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    5490:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
+    5498:	[0-9a-f]* 	{ addx r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+    54a0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 }
+    54a8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+    54b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+    54b8:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
+    54c0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
+    54c8:	[0-9a-f]* 	{ shru r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
+    54d0:	[0-9a-f]* 	{ revbytes r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+    54d8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalrp r15 ; prefetch_l3_fault r25 }
+    54e0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; jalrp r15 ; st r25, r26 }
+    54e8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jalrp r15 ; st2 r25, r26 }
+    54f0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jalrp r15 }
+    54f8:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; jalrp r15 }
+    5500:	[0-9a-f]* 	{ shru r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+    5508:	[0-9a-f]* 	{ add r5, r6, r7 ; jalrp r15 ; st r25, r26 }
+    5510:	[0-9a-f]* 	{ revbytes r5, r6 ; jalrp r15 ; st r25, r26 }
+    5518:	[0-9a-f]* 	{ ctz r5, r6 ; jalrp r15 ; st1 r25, r26 }
+    5520:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalrp r15 ; st1 r25, r26 }
+    5528:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalrp r15 ; st2 r25, r26 }
+    5530:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
+    5538:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
+    5540:	[0-9a-f]* 	{ subx r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
+    5548:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
+    5550:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalrp r15 ; prefetch_l3 r25 }
+    5558:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; jalrp r15 }
+    5560:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; jalrp r15 }
+    5568:	[0-9a-f]* 	{ xor r5, r6, r7 ; jalrp r15 ; st r25, r26 }
+    5570:	[0-9a-f]* 	{ addi r5, r6, 5 ; jr r15 ; st1 r25, r26 }
+    5578:	[0-9a-f]* 	{ addxi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
+    5580:	[0-9a-f]* 	{ andi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
+    5588:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+    5590:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    5598:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    55a0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jr r15 ; ld1u r25, r26 }
+    55a8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    55b0:	[0-9a-f]* 	{ ctz r5, r6 ; jr r15 ; st1 r25, r26 }
+    55b8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jr r15 ; ld1s r25, r26 }
+    55c0:	[0-9a-f]* 	{ add r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    55c8:	[0-9a-f]* 	{ revbytes r5, r6 ; jr r15 ; ld r25, r26 }
+    55d0:	[0-9a-f]* 	{ ctz r5, r6 ; jr r15 ; ld1s r25, r26 }
+    55d8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jr r15 ; ld1s r25, r26 }
+    55e0:	[0-9a-f]* 	{ mz r5, r6, r7 ; jr r15 ; ld1u r25, r26 }
+    55e8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    55f0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    55f8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    5600:	[0-9a-f]* 	{ andi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
+    5608:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
+    5610:	[0-9a-f]* 	{ move r5, r6 ; jr r15 ; ld4u r25, r26 }
+    5618:	[0-9a-f]* 	{ jr r15 ; ld4u r25, r26 }
+    5620:	[0-9a-f]* 	{ movei r5, 5 ; jr r15 ; ld r25, r26 }
+    5628:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; jr r15 }
+    5630:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    5638:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 }
+    5640:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+    5648:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+    5650:	[0-9a-f]* 	{ mz r5, r6, r7 ; jr r15 }
+    5658:	[0-9a-f]* 	{ or r5, r6, r7 ; jr r15 ; ld1s r25, r26 }
+    5660:	[0-9a-f]* 	{ addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+    5668:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jr r15 ; prefetch r25 }
+    5670:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jr r15 ; prefetch r25 }
+    5678:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jr r15 ; prefetch r25 }
+    5680:	[0-9a-f]* 	{ nor r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
+    5688:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
+    5690:	[0-9a-f]* 	{ shru r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
+    5698:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
+    56a0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    56a8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    56b0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
+    56b8:	[0-9a-f]* 	{ revbits r5, r6 ; jr r15 ; ld1s r25, r26 }
+    56c0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    56c8:	[0-9a-f]* 	{ shl r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
+    56d0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jr r15 ; ld4u r25, r26 }
+    56d8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+    56e0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
+    56e8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jr r15 ; prefetch_l2 r25 }
+    56f0:	[0-9a-f]* 	{ shru r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    56f8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jr r15 ; st r25, r26 }
+    5700:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jr r15 ; st r25, r26 }
+    5708:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+    5710:	[0-9a-f]* 	{ andi r5, r6, 5 ; jr r15 ; st2 r25, r26 }
+    5718:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+    5720:	[0-9a-f]* 	{ move r5, r6 ; jr r15 ; st4 r25, r26 }
+    5728:	[0-9a-f]* 	{ jr r15 ; st4 r25, r26 }
+    5730:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jr r15 ; ld r25, r26 }
+    5738:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jr r15 ; ld1u r25, r26 }
+    5740:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; jr r15 }
+    5748:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; jr r15 }
+    5750:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; jr r15 }
+    5758:	[0-9a-f]* 	{ add r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+    5760:	[0-9a-f]* 	{ addx r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+    5768:	[0-9a-f]* 	{ and r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+    5770:	[0-9a-f]* 	{ clz r5, r6 ; jrp r15 ; ld4s r25, r26 }
+    5778:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5780:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jrp r15 ; prefetch_l1_fault r25 }
+    5788:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 }
+    5790:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jrp r15 ; prefetch_l3_fault r25 }
+    5798:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jrp r15 ; st r25, r26 }
+    57a0:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; jrp r15 }
+    57a8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jrp r15 ; prefetch_l3 r25 }
+    57b0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jrp r15 ; ld r25, r26 }
+    57b8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jrp r15 ; ld r25, r26 }
+    57c0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jrp r15 ; ld1s r25, r26 }
+    57c8:	[0-9a-f]* 	{ andi r5, r6, 5 ; jrp r15 ; ld1u r25, r26 }
+    57d0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jrp r15 ; ld1u r25, r26 }
+    57d8:	[0-9a-f]* 	{ move r5, r6 ; jrp r15 ; ld2s r25, r26 }
+    57e0:	[0-9a-f]* 	{ jrp r15 ; ld2s r25, r26 }
+    57e8:	[0-9a-f]* 	{ revbits r5, r6 ; jrp r15 ; ld2u r25, r26 }
+    57f0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+    57f8:	[0-9a-f]* 	{ subx r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+    5800:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+    5808:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
+    5810:	[0-9a-f]* 	{ movei r5, 5 ; jrp r15 ; prefetch_l2_fault r25 }
+    5818:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
+    5820:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5828:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5830:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+    5838:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5840:	[0-9a-f]* 	{ nop ; jrp r15 ; prefetch_l2 r25 }
+    5848:	[0-9a-f]* 	{ or r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
+    5850:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5858:	[0-9a-f]* 	{ shru r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5860:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    5868:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
+    5870:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jrp r15 ; prefetch_l1_fault r25 }
+    5878:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 }
+    5880:	[0-9a-f]* 	{ addi r5, r6, 5 ; jrp r15 ; prefetch_l2_fault r25 }
+    5888:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 }
+    5890:	[0-9a-f]* 	{ jrp r15 ; prefetch_l3 r25 }
+    5898:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jrp r15 ; prefetch_l3 r25 }
+    58a0:	[0-9a-f]* 	{ nop ; jrp r15 ; prefetch_l3_fault r25 }
+    58a8:	[0-9a-f]* 	{ revbits r5, r6 ; jrp r15 ; prefetch_l3 r25 }
+    58b0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jrp r15 ; st r25, r26 }
+    58b8:	[0-9a-f]* 	{ shl r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
+    58c0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
+    58c8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jrp r15 ; ld r25, r26 }
+    58d0:	[0-9a-f]* 	{ shli r5, r6, 5 ; jrp r15 ; ld1u r25, r26 }
+    58d8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jrp r15 ; ld1u r25, r26 }
+    58e0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jrp r15 ; ld2u r25, r26 }
+    58e8:	[0-9a-f]* 	{ move r5, r6 ; jrp r15 ; st r25, r26 }
+    58f0:	[0-9a-f]* 	{ jrp r15 ; st r25, r26 }
+    58f8:	[0-9a-f]* 	{ revbits r5, r6 ; jrp r15 ; st1 r25, r26 }
+    5900:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
+    5908:	[0-9a-f]* 	{ subx r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
+    5910:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
+    5918:	[0-9a-f]* 	{ sub r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 }
+    5920:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jrp r15 ; prefetch_l2_fault r25 }
+    5928:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
+    5930:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; jrp r15 }
+    5938:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; jrp r15 }
+    5940:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; jrp r15 }
+    5948:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; ld r15, r16 }
+    5950:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; ld r15, r16 }
+    5958:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; ld r15, r16 }
+    5960:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; ld r15, r16 }
+    5968:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; ld r15, r16 }
+    5970:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; ld r15, r16 }
+    5978:	[0-9a-f]* 	{ add r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    5980:	[0-9a-f]* 	{ add r5, r6, r7 ; ld r25, r26 }
+    5988:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
+    5990:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
+    5998:	[0-9a-f]* 	{ addi r5, r6, 5 ; movei r15, 5 ; ld r25, r26 }
+    59a0:	[0-9a-f]* 	{ ctz r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
+    59a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
+    59b0:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
+    59b8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
+    59c0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; and r15, r16, r17 ; ld r25, r26 }
+    59c8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; subx r15, r16, r17 ; ld r25, r26 }
+    59d0:	[0-9a-f]* 	{ and r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    59d8:	[0-9a-f]* 	{ and r5, r6, r7 ; ld r25, r26 }
+    59e0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; ld r25, r26 }
+    59e8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
+    59f0:	[0-9a-f]* 	{ andi r5, r6, 5 ; movei r15, 5 ; ld r25, r26 }
+    59f8:	[0-9a-f]* 	{ clz r5, r6 ; jalr r15 ; ld r25, r26 }
+    5a00:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    5a08:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
+    5a10:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    5a18:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; nor r5, r6, r7 ; ld r25, r26 }
+    5a20:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    5a28:	[0-9a-f]* 	{ clz r5, r6 ; cmpeqi r15, r16, 5 ; ld r25, r26 }
+    5a30:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 ; ld r25, r26 }
+    5a38:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; move r15, r16 ; ld r25, r26 }
+    5a40:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    5a48:	[0-9a-f]* 	{ cmples r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 }
+    5a50:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    5a58:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 }
+    5a60:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
+    5a68:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    5a70:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; nor r5, r6, r7 ; ld r25, r26 }
+    5a78:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    5a80:	[0-9a-f]* 	{ clz r5, r6 ; cmpltsi r15, r16, 5 ; ld r25, r26 }
+    5a88:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl2add r5, r6, r7 ; ld r25, r26 }
+    5a90:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; move r15, r16 ; ld r25, r26 }
+    5a98:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    5aa0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 }
+    5aa8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    5ab0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    5ab8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
+    5ac0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    5ac8:	[0-9a-f]* 	{ ctz r5, r6 ; shl3add r15, r16, r17 ; ld r25, r26 }
+    5ad0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; ld r25, r26 }
+    5ad8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; ld r25, r26 }
+    5ae0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; addxi r15, r16, 5 ; ld r25, r26 }
+    5ae8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld r25, r26 }
+    5af0:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; ld r25, r26 }
+    5af8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; info 19 ; ld r25, r26 }
+    5b00:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; info 19 ; ld r25, r26 }
+    5b08:	[0-9a-f]* 	{ info 19 ; shrui r15, r16, 5 ; ld r25, r26 }
+    5b10:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jalr r15 ; ld r25, r26 }
+    5b18:	[0-9a-f]* 	{ and r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
+    5b20:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
+    5b28:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    5b30:	[0-9a-f]* 	{ xor r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    5b38:	[0-9a-f]* 	{ pcnt r5, r6 ; jrp r15 ; ld r25, r26 }
+    5b40:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; lnk r15 ; ld r25, r26 }
+    5b48:	[0-9a-f]* 	{ sub r5, r6, r7 ; lnk r15 ; ld r25, r26 }
+    5b50:	[0-9a-f]* 	{ mulax r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5b58:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 }
+    5b60:	[0-9a-f]* 	{ move r15, r16 ; addx r5, r6, r7 ; ld r25, r26 }
+    5b68:	[0-9a-f]* 	{ move r15, r16 ; rotli r5, r6, 5 ; ld r25, r26 }
+    5b70:	[0-9a-f]* 	{ move r5, r6 ; jr r15 ; ld r25, r26 }
+    5b78:	[0-9a-f]* 	{ movei r15, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 }
+    5b80:	[0-9a-f]* 	{ movei r15, 5 ; shrsi r5, r6, 5 ; ld r25, r26 }
+    5b88:	[0-9a-f]* 	{ movei r5, 5 ; rotl r15, r16, r17 ; ld r25, r26 }
+    5b90:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5b98:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; ill ; ld r25, r26 }
+    5ba0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    5ba8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
+    5bb0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; ld r25, r26 }
+    5bb8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
+    5bc0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; ld r25, r26 }
+    5bc8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jrp r15 ; ld r25, r26 }
+    5bd0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    5bd8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+    5be0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ld r25, r26 }
+    5be8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld r25, r26 }
+    5bf0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; mz r15, r16, r17 ; ld r25, r26 }
+    5bf8:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld r25, r26 }
+    5c00:	[0-9a-f]* 	{ nop ; addi r15, r16, 5 ; ld r25, r26 }
+    5c08:	[0-9a-f]* 	{ nop ; mnz r5, r6, r7 ; ld r25, r26 }
+    5c10:	[0-9a-f]* 	{ nop ; shl3add r5, r6, r7 ; ld r25, r26 }
+    5c18:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+    5c20:	[0-9a-f]* 	{ nor r15, r16, r17 ; subx r5, r6, r7 ; ld r25, r26 }
+    5c28:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    5c30:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+    5c38:	[0-9a-f]* 	{ or r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 }
+    5c40:	[0-9a-f]* 	{ or r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    5c48:	[0-9a-f]* 	{ pcnt r5, r6 ; shl3add r15, r16, r17 ; ld r25, r26 }
+    5c50:	[0-9a-f]* 	{ revbits r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 }
+    5c58:	[0-9a-f]* 	{ revbytes r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5c60:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
+    5c68:	[0-9a-f]* 	{ rotl r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    5c70:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
+    5c78:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; ld r25, r26 }
+    5c80:	[0-9a-f]* 	{ rotli r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 }
+    5c88:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 }
+    5c90:	[0-9a-f]* 	{ shl r15, r16, r17 ; nop ; ld r25, r26 }
+    5c98:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+    5ca0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
+    5ca8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
+    5cb0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5cb8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
+    5cc0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    5cc8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
+    5cd0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
+    5cd8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 }
+    5ce0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
+    5ce8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; nop ; ld r25, r26 }
+    5cf0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+    5cf8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
+    5d00:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
+    5d08:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5d10:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
+    5d18:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    5d20:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
+    5d28:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld r25, r26 }
+    5d30:	[0-9a-f]* 	{ shli r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 }
+    5d38:	[0-9a-f]* 	{ shli r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 }
+    5d40:	[0-9a-f]* 	{ shrs r15, r16, r17 ; nop ; ld r25, r26 }
+    5d48:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+    5d50:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; andi r5, r6, 5 ; ld r25, r26 }
+    5d58:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld r25, r26 }
+    5d60:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5d68:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpltu r5, r6, r7 ; ld r25, r26 }
+    5d70:	[0-9a-f]* 	{ shru r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    5d78:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
+    5d80:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
+    5d88:	[0-9a-f]* 	{ shrui r5, r6, 5 ; addx r15, r16, r17 ; ld r25, r26 }
+    5d90:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shrui r15, r16, 5 ; ld r25, r26 }
+    5d98:	[0-9a-f]* 	{ sub r15, r16, r17 ; nop ; ld r25, r26 }
+    5da0:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+    5da8:	[0-9a-f]* 	{ subx r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
+    5db0:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
+    5db8:	[0-9a-f]* 	{ subx r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    5dc0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ill ; ld r25, r26 }
+    5dc8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmples r15, r16, r17 ; ld r25, r26 }
+    5dd0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addi r15, r16, 5 ; ld r25, r26 }
+    5dd8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
+    5de0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; ld r25, r26 }
+    5de8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
+    5df0:	[0-9a-f]* 	{ xor r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 }
+    5df8:	[0-9a-f]* 	{ xor r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
+    5e00:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; ld1s r15, r16 }
+    5e08:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; ld1s r15, r16 }
+    5e10:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ld1s r15, r16 }
+    5e18:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; ld1s r15, r16 }
+    5e20:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; ld1s r15, r16 }
+    5e28:	[0-9a-f]* 	{ add r15, r16, r17 ; ld1s r25, r26 }
+    5e30:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; ld1s r25, r26 }
+    5e38:	[0-9a-f]* 	{ add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
+    5e40:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld1s r25, r26 }
+    5e48:	[0-9a-f]* 	{ addi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    5e50:	[0-9a-f]* 	{ addi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    5e58:	[0-9a-f]* 	{ pcnt r5, r6 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    5e60:	[0-9a-f]* 	{ addx r5, r6, r7 ; ill ; ld1s r25, r26 }
+    5e68:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    5e70:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl3add r5, r6, r7 ; ld1s r25, r26 }
+    5e78:	[0-9a-f]* 	{ addxi r5, r6, 5 ; mz r15, r16, r17 ; ld1s r25, r26 }
+    5e80:	[0-9a-f]* 	{ and r15, r16, r17 ; ld1s r25, r26 }
+    5e88:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+    5e90:	[0-9a-f]* 	{ and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
+    5e98:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    5ea0:	[0-9a-f]* 	{ andi r5, r6, 5 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    5ea8:	[0-9a-f]* 	{ andi r5, r6, 5 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    5eb0:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; ld1s r25, r26 }
+    5eb8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    5ec0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    5ec8:	[0-9a-f]* 	{ ctz r5, r6 ; cmpeq r15, r16, r17 ; ld1s r25, r26 }
+    5ed0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1s r25, r26 }
+    5ed8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+    5ee0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    5ee8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
+    5ef0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; subx r15, r16, r17 ; ld1s r25, r26 }
+    5ef8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
+    5f00:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ld1s r25, r26 }
+    5f08:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
+    5f10:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    5f18:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    5f20:	[0-9a-f]* 	{ ctz r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    5f28:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    5f30:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+    5f38:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+    5f40:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
+    5f48:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; subx r15, r16, r17 ; ld1s r25, r26 }
+    5f50:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
+    5f58:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ld1s r25, r26 }
+    5f60:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    5f68:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    5f70:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    5f78:	[0-9a-f]* 	{ ctz r5, r6 ; jalr r15 ; ld1s r25, r26 }
+    5f80:	[0-9a-f]* 	{ andi r15, r16, 5 ; ld1s r25, r26 }
+    5f88:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ld1s r25, r26 }
+    5f90:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; ld1s r25, r26 }
+    5f98:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 }
+    5fa0:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; ld1s r25, r26 }
+    5fa8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ill ; ld1s r25, r26 }
+    5fb0:	[0-9a-f]* 	{ info 19 ; ill ; ld1s r25, r26 }
+    5fb8:	[0-9a-f]* 	{ info 19 ; shl1add r5, r6, r7 ; ld1s r25, r26 }
+    5fc0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+    5fc8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+    5fd0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+    5fd8:	[0-9a-f]* 	{ addx r5, r6, r7 ; jr r15 ; ld1s r25, r26 }
+    5fe0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jr r15 ; ld1s r25, r26 }
+    5fe8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jrp r15 ; ld1s r25, r26 }
+    5ff0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jrp r15 ; ld1s r25, r26 }
+    5ff8:	[0-9a-f]* 	{ nor r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
+    6000:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmplts r5, r6, r7 ; ld1s r25, r26 }
+    6008:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shru r5, r6, r7 ; ld1s r25, r26 }
+    6010:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
+    6018:	[0-9a-f]* 	{ move r15, r16 ; movei r5, 5 ; ld1s r25, r26 }
+    6020:	[0-9a-f]* 	{ move r5, r6 ; add r15, r16, r17 ; ld1s r25, r26 }
+    6028:	[0-9a-f]* 	{ move r5, r6 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    6030:	[0-9a-f]* 	{ mulx r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    6038:	[0-9a-f]* 	{ movei r5, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    6040:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    6048:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    6050:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    6058:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    6060:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld1s r25, r26 }
+    6068:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; ill ; ld1s r25, r26 }
+    6070:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 }
+    6078:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld1s r25, r26 }
+    6080:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 }
+    6088:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+    6090:	[0-9a-f]* 	{ mulax r5, r6, r7 ; nor r15, r16, r17 ; ld1s r25, r26 }
+    6098:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jrp r15 ; ld1s r25, r26 }
+    60a0:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmplts r5, r6, r7 ; ld1s r25, r26 }
+    60a8:	[0-9a-f]* 	{ mz r15, r16, r17 ; shru r5, r6, r7 ; ld1s r25, r26 }
+    60b0:	[0-9a-f]* 	{ mz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
+    60b8:	[0-9a-f]* 	{ nop ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    60c0:	[0-9a-f]* 	{ nop ; or r5, r6, r7 ; ld1s r25, r26 }
+    60c8:	[0-9a-f]* 	{ nop ; xor r15, r16, r17 ; ld1s r25, r26 }
+    60d0:	[0-9a-f]* 	{ nor r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
+    60d8:	[0-9a-f]* 	{ nor r5, r6, r7 ; ld1s r25, r26 }
+    60e0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
+    60e8:	[0-9a-f]* 	{ or r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    60f0:	[0-9a-f]* 	{ or r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    60f8:	[0-9a-f]* 	{ pcnt r5, r6 ; jalr r15 ; ld1s r25, r26 }
+    6100:	[0-9a-f]* 	{ revbits r5, r6 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    6108:	[0-9a-f]* 	{ revbytes r5, r6 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    6110:	[0-9a-f]* 	{ revbytes r5, r6 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    6118:	[0-9a-f]* 	{ rotl r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
+    6120:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    6128:	[0-9a-f]* 	{ clz r5, r6 ; rotli r15, r16, 5 ; ld1s r25, r26 }
+    6130:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
+    6138:	[0-9a-f]* 	{ rotli r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 }
+    6140:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    6148:	[0-9a-f]* 	{ shl r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
+    6150:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    6158:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 }
+    6160:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    6168:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    6170:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
+    6178:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    6180:	[0-9a-f]* 	{ clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+    6188:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
+    6190:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
+    6198:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    61a0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
+    61a8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    61b0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    61b8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    61c0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    61c8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
+    61d0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    61d8:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; ld1s r25, r26 }
+    61e0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
+    61e8:	[0-9a-f]* 	{ shli r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 }
+    61f0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    61f8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
+    6200:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    6208:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    6210:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    6218:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    6220:	[0-9a-f]* 	{ shru r15, r16, r17 ; nor r5, r6, r7 ; ld1s r25, r26 }
+    6228:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    6230:	[0-9a-f]* 	{ clz r5, r6 ; shrui r15, r16, 5 ; ld1s r25, r26 }
+    6238:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl2add r5, r6, r7 ; ld1s r25, r26 }
+    6240:	[0-9a-f]* 	{ shrui r5, r6, 5 ; move r15, r16 ; ld1s r25, r26 }
+    6248:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    6250:	[0-9a-f]* 	{ sub r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
+    6258:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    6260:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 }
+    6268:	[0-9a-f]* 	{ subx r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    6270:	[0-9a-f]* 	{ subx r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    6278:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    6280:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    6288:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld1s r25, r26 }
+    6290:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; ld1s r25, r26 }
+    6298:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    62a0:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl3add r5, r6, r7 ; ld1s r25, r26 }
+    62a8:	[0-9a-f]* 	{ xor r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 }
+    62b0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    62b8:	[0-9a-f]* 	{ move r5, r6 ; ld1s_add r15, r16, 5 }
+    62c0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    62c8:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    62d0:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; ld1s_add r15, r16, 5 }
+    62d8:	[0-9a-f]* 	{ xori r5, r6, 5 ; ld1s_add r15, r16, 5 }
+    62e0:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; ld1u r15, r16 }
+    62e8:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; ld1u r15, r16 }
+    62f0:	[0-9a-f]* 	{ v1addi r5, r6, 5 ; ld1u r15, r16 }
+    62f8:	[0-9a-f]* 	{ v1shru r5, r6, r7 ; ld1u r15, r16 }
+    6300:	[0-9a-f]* 	{ v2shlsc r5, r6, r7 ; ld1u r15, r16 }
+    6308:	[0-9a-f]* 	{ add r15, r16, r17 ; info 19 ; ld1u r25, r26 }
+    6310:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
+    6318:	[0-9a-f]* 	{ add r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    6320:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 }
+    6328:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
+    6330:	[0-9a-f]* 	{ addx r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 }
+    6338:	[0-9a-f]* 	{ revbytes r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 }
+    6340:	[0-9a-f]* 	{ addx r5, r6, r7 ; jalr r15 ; ld1u r25, r26 }
+    6348:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld1u r25, r26 }
+    6350:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shli r5, r6, 5 ; ld1u r25, r26 }
+    6358:	[0-9a-f]* 	{ addxi r5, r6, 5 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    6360:	[0-9a-f]* 	{ and r15, r16, r17 ; info 19 ; ld1u r25, r26 }
+    6368:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 }
+    6370:	[0-9a-f]* 	{ and r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    6378:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    6380:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
+    6388:	[0-9a-f]* 	{ clz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
+    6390:	[0-9a-f]* 	{ clz r5, r6 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+    6398:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    63a0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nop ; ld1u r25, r26 }
+    63a8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+    63b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+    63b8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    63c0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 }
+    63c8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+    63d0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; ld1u r25, r26 }
+    63d8:	[0-9a-f]* 	{ revbits r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+    63e0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+    63e8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 }
+    63f0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+    63f8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; nop ; ld1u r25, r26 }
+    6400:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    6408:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    6410:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    6418:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
+    6420:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+    6428:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+    6430:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    6438:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+    6440:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 }
+    6448:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+    6450:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; nop ; ld1u r25, r26 }
+    6458:	[0-9a-f]* 	{ ctz r5, r6 ; jr r15 ; ld1u r25, r26 }
+    6460:	[0-9a-f]* 	{ clz r5, r6 ; ld1u r25, r26 }
+    6468:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ld1u r25, r26 }
+    6470:	[0-9a-f]* 	{ shru r5, r6, r7 ; ld1u r25, r26 }
+    6478:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nop ; ld1u r25, r26 }
+    6480:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; ill ; ld1u r25, r26 }
+    6488:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ill ; ld1u r25, r26 }
+    6490:	[0-9a-f]* 	{ info 19 ; jalr r15 ; ld1u r25, r26 }
+    6498:	[0-9a-f]* 	{ info 19 ; shl1addx r5, r6, r7 ; ld1u r25, r26 }
+    64a0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
+    64a8:	[0-9a-f]* 	{ shli r5, r6, 5 ; jalr r15 ; ld1u r25, r26 }
+    64b0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 }
+    64b8:	[0-9a-f]* 	{ and r5, r6, r7 ; jr r15 ; ld1u r25, r26 }
+    64c0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; jr r15 ; ld1u r25, r26 }
+    64c8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jrp r15 ; ld1u r25, r26 }
+    64d0:	[0-9a-f]* 	{ xor r5, r6, r7 ; jrp r15 ; ld1u r25, r26 }
+    64d8:	[0-9a-f]* 	{ pcnt r5, r6 ; lnk r15 ; ld1u r25, r26 }
+    64e0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1u r25, r26 }
+    64e8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sub r5, r6, r7 ; ld1u r25, r26 }
+    64f0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
+    64f8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
+    6500:	[0-9a-f]* 	{ move r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 }
+    6508:	[0-9a-f]* 	{ move r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+    6510:	[0-9a-f]* 	{ movei r15, 5 ; nop ; ld1u r25, r26 }
+    6518:	[0-9a-f]* 	{ movei r5, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    6520:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    6528:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    6530:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    6538:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    6540:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+    6548:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalr r15 ; ld1u r25, r26 }
+    6550:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    6558:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 }
+    6560:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    6568:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    6570:	[0-9a-f]* 	{ mulax r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 }
+    6578:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld1u r25, r26 }
+    6580:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1u r25, r26 }
+    6588:	[0-9a-f]* 	{ mz r15, r16, r17 ; sub r5, r6, r7 ; ld1u r25, r26 }
+    6590:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
+    6598:	[0-9a-f]* 	{ nop ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
+    65a0:	[0-9a-f]* 	{ revbits r5, r6 ; nop ; ld1u r25, r26 }
+    65a8:	[0-9a-f]* 	{ nop ; ld1u r25, r26 }
+    65b0:	[0-9a-f]* 	{ revbits r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    65b8:	[0-9a-f]* 	{ nor r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+    65c0:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1u r25, r26 }
+    65c8:	[0-9a-f]* 	{ or r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+    65d0:	[0-9a-f]* 	{ or r5, r6, r7 ; nop ; ld1u r25, r26 }
+    65d8:	[0-9a-f]* 	{ pcnt r5, r6 ; jr r15 ; ld1u r25, r26 }
+    65e0:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    65e8:	[0-9a-f]* 	{ revbytes r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    65f0:	[0-9a-f]* 	{ revbytes r5, r6 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    65f8:	[0-9a-f]* 	{ pcnt r5, r6 ; rotl r15, r16, r17 ; ld1u r25, r26 }
+    6600:	[0-9a-f]* 	{ rotl r5, r6, r7 ; ill ; ld1u r25, r26 }
+    6608:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
+    6610:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
+    6618:	[0-9a-f]* 	{ rotli r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 }
+    6620:	[0-9a-f]* 	{ shl r15, r16, r17 ; ld1u r25, r26 }
+    6628:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    6630:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    6638:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
+    6640:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    6648:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    6650:	[0-9a-f]* 	{ pcnt r5, r6 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    6658:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; ill ; ld1u r25, r26 }
+    6660:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl2add r15, r16, r17 ; ld1u r25, r26 }
+    6668:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
+    6670:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
+    6678:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    6680:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    6688:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    6690:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    6698:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    66a0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    66a8:	[0-9a-f]* 	{ pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    66b0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; ill ; ld1u r25, r26 }
+    66b8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    66c0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
+    66c8:	[0-9a-f]* 	{ shli r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 }
+    66d0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; ld1u r25, r26 }
+    66d8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    66e0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    66e8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+    66f0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    66f8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    6700:	[0-9a-f]* 	{ pcnt r5, r6 ; shru r15, r16, r17 ; ld1u r25, r26 }
+    6708:	[0-9a-f]* 	{ shru r5, r6, r7 ; ill ; ld1u r25, r26 }
+    6710:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+    6718:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl3add r5, r6, r7 ; ld1u r25, r26 }
+    6720:	[0-9a-f]* 	{ shrui r5, r6, 5 ; mz r15, r16, r17 ; ld1u r25, r26 }
+    6728:	[0-9a-f]* 	{ sub r15, r16, r17 ; ld1u r25, r26 }
+    6730:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    6738:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    6740:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 }
+    6748:	[0-9a-f]* 	{ subx r5, r6, r7 ; andi r15, r16, 5 ; ld1u r25, r26 }
+    6750:	[0-9a-f]* 	{ subx r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+    6758:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    6760:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    6768:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
+    6770:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalr r15 ; ld1u r25, r26 }
+    6778:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld1u r25, r26 }
+    6780:	[0-9a-f]* 	{ xor r15, r16, r17 ; shli r5, r6, 5 ; ld1u r25, r26 }
+    6788:	[0-9a-f]* 	{ xor r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    6790:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ld1u_add r15, r16, 5 }
+    6798:	[0-9a-f]* 	{ moveli r5, 4660 ; ld1u_add r15, r16, 5 }
+    67a0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; ld1u_add r15, r16, 5 }
+    67a8:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; ld1u_add r15, r16, 5 }
+    67b0:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; ld1u_add r15, r16, 5 }
+    67b8:	[0-9a-f]* 	{ addi r5, r6, 5 ; ld2s r15, r16 }
+    67c0:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; ld2s r15, r16 }
+    67c8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ld2s r15, r16 }
+    67d0:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; ld2s r15, r16 }
+    67d8:	[0-9a-f]* 	{ v1sub r5, r6, r7 ; ld2s r15, r16 }
+    67e0:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; ld2s r15, r16 }
+    67e8:	[0-9a-f]* 	{ add r15, r16, r17 ; move r5, r6 ; ld2s r25, r26 }
+    67f0:	[0-9a-f]* 	{ add r15, r16, r17 ; ld2s r25, r26 }
+    67f8:	[0-9a-f]* 	{ add r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+    6800:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
+    6808:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
+    6810:	[0-9a-f]* 	{ addx r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 }
+    6818:	[0-9a-f]* 	{ addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2s r25, r26 }
+    6820:	[0-9a-f]* 	{ addx r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    6828:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+    6830:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
+    6838:	[0-9a-f]* 	{ addxi r5, r6, 5 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    6840:	[0-9a-f]* 	{ and r15, r16, r17 ; move r5, r6 ; ld2s r25, r26 }
+    6848:	[0-9a-f]* 	{ and r15, r16, r17 ; ld2s r25, r26 }
+    6850:	[0-9a-f]* 	{ and r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+    6858:	[0-9a-f]* 	{ mulax r5, r6, r7 ; andi r15, r16, 5 ; ld2s r25, r26 }
+    6860:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
+    6868:	[0-9a-f]* 	{ clz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    6870:	[0-9a-f]* 	{ clz r5, r6 ; shrui r15, r16, 5 ; ld2s r25, r26 }
+    6878:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+    6880:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    6888:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
+    6890:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; xor r5, r6, r7 ; ld2s r25, r26 }
+    6898:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
+    68a0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    68a8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    68b0:	[0-9a-f]* 	{ cmples r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    68b8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    68c0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    68c8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
+    68d0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
+    68d8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    68e0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
+    68e8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; xor r5, r6, r7 ; ld2s r25, r26 }
+    68f0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
+    68f8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
+    6900:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    6908:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    6910:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    6918:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    6920:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
+    6928:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
+    6930:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    6938:	[0-9a-f]* 	{ ctz r5, r6 ; lnk r15 ; ld2s r25, r26 }
+    6940:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; ld2s r25, r26 }
+    6948:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; ld2s r25, r26 }
+    6950:	[0-9a-f]* 	{ shrui r5, r6, 5 ; ld2s r25, r26 }
+    6958:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
+    6960:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ill ; ld2s r25, r26 }
+    6968:	[0-9a-f]* 	{ xor r5, r6, r7 ; ill ; ld2s r25, r26 }
+    6970:	[0-9a-f]* 	{ info 19 ; jr r15 ; ld2s r25, r26 }
+    6978:	[0-9a-f]* 	{ info 19 ; shl2add r5, r6, r7 ; ld2s r25, r26 }
+    6980:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    6988:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 }
+    6990:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    6998:	[0-9a-f]* 	{ clz r5, r6 ; jr r15 ; ld2s r25, r26 }
+    69a0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    69a8:	[0-9a-f]* 	{ movei r5, 5 ; jrp r15 ; ld2s r25, r26 }
+    69b0:	[0-9a-f]* 	{ add r5, r6, r7 ; lnk r15 ; ld2s r25, r26 }
+    69b8:	[0-9a-f]* 	{ revbytes r5, r6 ; lnk r15 ; ld2s r25, r26 }
+    69c0:	[0-9a-f]* 	{ ctz r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    69c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    69d0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl2add r15, r16, r17 ; ld2s r25, r26 }
+    69d8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; move r15, r16 ; ld2s r25, r26 }
+    69e0:	[0-9a-f]* 	{ move r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
+    69e8:	[0-9a-f]* 	{ move r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
+    69f0:	[0-9a-f]* 	{ movei r15, 5 ; or r5, r6, r7 ; ld2s r25, r26 }
+    69f8:	[0-9a-f]* 	{ movei r5, 5 ; ld2s r25, r26 }
+    6a00:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    6a08:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+    6a10:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    6a18:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    6a20:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; nop ; ld2s r25, r26 }
+    6a28:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    6a30:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2s r25, r26 }
+    6a38:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld2s r25, r26 }
+    6a40:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld2s r25, r26 }
+    6a48:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 }
+    6a50:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    6a58:	[0-9a-f]* 	{ mulx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 }
+    6a60:	[0-9a-f]* 	{ ctz r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
+    6a68:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
+    6a70:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl2add r15, r16, r17 ; ld2s r25, r26 }
+    6a78:	[0-9a-f]* 	{ nop ; cmpltu r15, r16, r17 ; ld2s r25, r26 }
+    6a80:	[0-9a-f]* 	{ nop ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    6a88:	[0-9a-f]* 	{ nor r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    6a90:	[0-9a-f]* 	{ nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    6a98:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    6aa0:	[0-9a-f]* 	{ or r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 }
+    6aa8:	[0-9a-f]* 	{ or r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 }
+    6ab0:	[0-9a-f]* 	{ or r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    6ab8:	[0-9a-f]* 	{ pcnt r5, r6 ; lnk r15 ; ld2s r25, r26 }
+    6ac0:	[0-9a-f]* 	{ revbits r5, r6 ; ld2s r25, r26 }
+    6ac8:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    6ad0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
+    6ad8:	[0-9a-f]* 	{ revbytes r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    6ae0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    6ae8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+    6af0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 }
+    6af8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    6b00:	[0-9a-f]* 	{ shl r15, r16, r17 ; info 19 ; ld2s r25, r26 }
+    6b08:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    6b10:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+    6b18:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+    6b20:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    6b28:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
+    6b30:	[0-9a-f]* 	{ revbytes r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    6b38:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    6b40:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+    6b48:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shli r5, r6, 5 ; ld2s r25, r26 }
+    6b50:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    6b58:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; info 19 ; ld2s r25, r26 }
+    6b60:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+    6b68:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+    6b70:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld2s r25, r26 }
+    6b78:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    6b80:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
+    6b88:	[0-9a-f]* 	{ revbytes r5, r6 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+    6b90:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    6b98:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+    6ba0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 }
+    6ba8:	[0-9a-f]* 	{ shli r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    6bb0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; info 19 ; ld2s r25, r26 }
+    6bb8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+    6bc0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+    6bc8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    6bd0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    6bd8:	[0-9a-f]* 	{ shru r15, r16, r17 ; add r5, r6, r7 ; ld2s r25, r26 }
+    6be0:	[0-9a-f]* 	{ revbytes r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
+    6be8:	[0-9a-f]* 	{ shru r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+    6bf0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+    6bf8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shli r5, r6, 5 ; ld2s r25, r26 }
+    6c00:	[0-9a-f]* 	{ shrui r5, r6, 5 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    6c08:	[0-9a-f]* 	{ sub r15, r16, r17 ; info 19 ; ld2s r25, r26 }
+    6c10:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld2s r25, r26 }
+    6c18:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+    6c20:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; ld2s r25, r26 }
+    6c28:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    6c30:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
+    6c38:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    6c40:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    6c48:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop ; ld2s r25, r26 }
+    6c50:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jr r15 ; ld2s r25, r26 }
+    6c58:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+    6c60:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
+    6c68:	[0-9a-f]* 	{ xor r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    6c70:	[0-9a-f]* 	{ cmpltui r5, r6, 5 ; ld2s_add r15, r16, 5 }
+    6c78:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; ld2s_add r15, r16, 5 }
+    6c80:	[0-9a-f]* 	{ shlx r5, r6, r7 ; ld2s_add r15, r16, 5 }
+    6c88:	[0-9a-f]* 	{ v1int_h r5, r6, r7 ; ld2s_add r15, r16, 5 }
+    6c90:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; ld2s_add r15, r16, 5 }
+    6c98:	[0-9a-f]* 	{ addx r5, r6, r7 ; ld2u r15, r16 }
+    6ca0:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; ld2u r15, r16 }
+    6ca8:	[0-9a-f]* 	{ mz r5, r6, r7 ; ld2u r15, r16 }
+    6cb0:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; ld2u r15, r16 }
+    6cb8:	[0-9a-f]* 	{ v2add r5, r6, r7 ; ld2u r15, r16 }
+    6cc0:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; ld2u r15, r16 }
+    6cc8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+    6cd0:	[0-9a-f]* 	{ add r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 }
+    6cd8:	[0-9a-f]* 	{ add r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    6ce0:	[0-9a-f]* 	{ addi r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
+    6ce8:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
+    6cf0:	[0-9a-f]* 	{ addx r15, r16, r17 ; and r5, r6, r7 ; ld2u r25, r26 }
+    6cf8:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld2u r25, r26 }
+    6d00:	[0-9a-f]* 	{ addx r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
+    6d08:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
+    6d10:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld2u r25, r26 }
+    6d18:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl r15, r16, r17 ; ld2u r25, r26 }
+    6d20:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+    6d28:	[0-9a-f]* 	{ and r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 }
+    6d30:	[0-9a-f]* 	{ and r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    6d38:	[0-9a-f]* 	{ andi r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
+    6d40:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
+    6d48:	[0-9a-f]* 	{ clz r5, r6 ; and r15, r16, r17 ; ld2u r25, r26 }
+    6d50:	[0-9a-f]* 	{ clz r5, r6 ; subx r15, r16, r17 ; ld2u r25, r26 }
+    6d58:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    6d60:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    6d68:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 }
+    6d70:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+    6d78:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
+    6d80:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2u r25, r26 }
+    6d88:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+    6d90:	[0-9a-f]* 	{ cmples r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+    6d98:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
+    6da0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    6da8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 }
+    6db0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
+    6db8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    6dc0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 }
+    6dc8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+    6dd0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
+    6dd8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 }
+    6de0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+    6de8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+    6df0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
+    6df8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    6e00:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 }
+    6e08:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
+    6e10:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    6e18:	[0-9a-f]* 	{ ctz r5, r6 ; move r15, r16 ; ld2u r25, r26 }
+    6e20:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; ld2u r25, r26 }
+    6e28:	[0-9a-f]* 	{ mulx r5, r6, r7 ; ld2u r25, r26 }
+    6e30:	[0-9a-f]* 	{ sub r5, r6, r7 ; ld2u r25, r26 }
+    6e38:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    6e40:	[0-9a-f]* 	{ movei r5, 5 ; ill ; ld2u r25, r26 }
+    6e48:	[0-9a-f]* 	{ info 19 ; add r15, r16, r17 ; ld2u r25, r26 }
+    6e50:	[0-9a-f]* 	{ info 19 ; lnk r15 ; ld2u r25, r26 }
+    6e58:	[0-9a-f]* 	{ info 19 ; shl2addx r5, r6, r7 ; ld2u r25, r26 }
+    6e60:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; jalr r15 ; ld2u r25, r26 }
+    6e68:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jalr r15 ; ld2u r25, r26 }
+    6e70:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    6e78:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    6e80:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    6e88:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    6e90:	[0-9a-f]* 	{ addx r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
+    6e98:	[0-9a-f]* 	{ rotli r5, r6, 5 ; lnk r15 ; ld2u r25, r26 }
+    6ea0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+    6ea8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+    6eb0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
+    6eb8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
+    6ec0:	[0-9a-f]* 	{ move r5, r6 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
+    6ec8:	[0-9a-f]* 	{ move r5, r6 ; ld2u r25, r26 }
+    6ed0:	[0-9a-f]* 	{ revbits r5, r6 ; movei r15, 5 ; ld2u r25, r26 }
+    6ed8:	[0-9a-f]* 	{ movei r5, 5 ; info 19 ; ld2u r25, r26 }
+    6ee0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    6ee8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
+    6ef0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
+    6ef8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    6f00:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+    6f08:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
+    6f10:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ld2u r25, r26 }
+    6f18:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2u r25, r26 }
+    6f20:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+    6f28:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
+    6f30:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    6f38:	[0-9a-f]* 	{ mulx r5, r6, r7 ; nop ; ld2u r25, r26 }
+    6f40:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; ld2u r25, r26 }
+    6f48:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; ld2u r25, r26 }
+    6f50:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
+    6f58:	[0-9a-f]* 	{ nop ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    6f60:	[0-9a-f]* 	{ nop ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    6f68:	[0-9a-f]* 	{ nor r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+    6f70:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
+    6f78:	[0-9a-f]* 	{ nor r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+    6f80:	[0-9a-f]* 	{ or r15, r16, r17 ; cmplts r5, r6, r7 ; ld2u r25, r26 }
+    6f88:	[0-9a-f]* 	{ or r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
+    6f90:	[0-9a-f]* 	{ or r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    6f98:	[0-9a-f]* 	{ pcnt r5, r6 ; move r15, r16 ; ld2u r25, r26 }
+    6fa0:	[0-9a-f]* 	{ revbits r5, r6 ; info 19 ; ld2u r25, r26 }
+    6fa8:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    6fb0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
+    6fb8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
+    6fc0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    6fc8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
+    6fd0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
+    6fd8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 }
+    6fe0:	[0-9a-f]* 	{ shl r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
+    6fe8:	[0-9a-f]* 	{ shl r15, r16, r17 ; ld2u r25, r26 }
+    6ff0:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    6ff8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
+    7000:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    7008:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
+    7010:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
+    7018:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    7020:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
+    7028:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
+    7030:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 }
+    7038:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
+    7040:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    7048:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    7050:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
+    7058:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    7060:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
+    7068:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
+    7070:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    7078:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
+    7080:	[0-9a-f]* 	{ shli r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
+    7088:	[0-9a-f]* 	{ shli r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 }
+    7090:	[0-9a-f]* 	{ shrs r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
+    7098:	[0-9a-f]* 	{ shrs r15, r16, r17 ; ld2u r25, r26 }
+    70a0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    70a8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
+    70b0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    70b8:	[0-9a-f]* 	{ shru r15, r16, r17 ; addx r5, r6, r7 ; ld2u r25, r26 }
+    70c0:	[0-9a-f]* 	{ shru r15, r16, r17 ; rotli r5, r6, 5 ; ld2u r25, r26 }
+    70c8:	[0-9a-f]* 	{ shru r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    70d0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpleu r5, r6, r7 ; ld2u r25, r26 }
+    70d8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shrsi r5, r6, 5 ; ld2u r25, r26 }
+    70e0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; rotl r15, r16, r17 ; ld2u r25, r26 }
+    70e8:	[0-9a-f]* 	{ sub r15, r16, r17 ; move r5, r6 ; ld2u r25, r26 }
+    70f0:	[0-9a-f]* 	{ sub r15, r16, r17 ; ld2u r25, r26 }
+    70f8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    7100:	[0-9a-f]* 	{ mulax r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 }
+    7108:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    7110:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 }
+    7118:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrui r15, r16, 5 ; ld2u r25, r26 }
+    7120:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    7128:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 }
+    7130:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; lnk r15 ; ld2u r25, r26 }
+    7138:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
+    7140:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 }
+    7148:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 }
+    7150:	[0-9a-f]* 	{ cmul r5, r6, r7 ; ld2u_add r15, r16, 5 }
+    7158:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; ld2u_add r15, r16, 5 }
+    7160:	[0-9a-f]* 	{ shrs r5, r6, r7 ; ld2u_add r15, r16, 5 }
+    7168:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; ld2u_add r15, r16, 5 }
+    7170:	[0-9a-f]* 	{ v2minsi r5, r6, 5 ; ld2u_add r15, r16, 5 }
+    7178:	[0-9a-f]* 	{ addxli r5, r6, 4660 ; ld4s r15, r16 }
+    7180:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; ld4s r15, r16 }
+    7188:	[0-9a-f]* 	{ nor r5, r6, r7 ; ld4s r15, r16 }
+    7190:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; ld4s r15, r16 }
+    7198:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; ld4s r15, r16 }
+    71a0:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; ld4s r15, r16 }
+    71a8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+    71b0:	[0-9a-f]* 	{ add r5, r6, r7 ; addxi r15, r16, 5 ; ld4s r25, r26 }
+    71b8:	[0-9a-f]* 	{ add r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    71c0:	[0-9a-f]* 	{ addi r15, r16, 5 ; nor r5, r6, r7 ; ld4s r25, r26 }
+    71c8:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
+    71d0:	[0-9a-f]* 	{ clz r5, r6 ; addx r15, r16, r17 ; ld4s r25, r26 }
+    71d8:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
+    71e0:	[0-9a-f]* 	{ addx r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
+    71e8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpne r5, r6, r7 ; ld4s r25, r26 }
+    71f0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; subx r5, r6, r7 ; ld4s r25, r26 }
+    71f8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
+    7200:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    7208:	[0-9a-f]* 	{ and r5, r6, r7 ; addxi r15, r16, 5 ; ld4s r25, r26 }
+    7210:	[0-9a-f]* 	{ and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    7218:	[0-9a-f]* 	{ andi r15, r16, 5 ; nor r5, r6, r7 ; ld4s r25, r26 }
+    7220:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
+    7228:	[0-9a-f]* 	{ clz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    7230:	[0-9a-f]* 	{ clz r5, r6 ; ld4s r25, r26 }
+    7238:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+    7240:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    7248:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    7250:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+    7258:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
+    7260:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; nop ; ld4s r25, r26 }
+    7268:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
+    7270:	[0-9a-f]* 	{ cmples r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
+    7278:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+    7280:	[0-9a-f]* 	{ cmples r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    7288:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 }
+    7290:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 }
+    7298:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    72a0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+    72a8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+    72b0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
+    72b8:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; nop ; ld4s r25, r26 }
+    72c0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
+    72c8:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
+    72d0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+    72d8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    72e0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 }
+    72e8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 }
+    72f0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    72f8:	[0-9a-f]* 	{ ctz r5, r6 ; mz r15, r16, r17 ; ld4s r25, r26 }
+    7300:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; ld4s r25, r26 }
+    7308:	[0-9a-f]* 	{ mz r5, r6, r7 ; ld4s r25, r26 }
+    7310:	[0-9a-f]* 	{ subx r5, r6, r7 ; ld4s r25, r26 }
+    7318:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    7320:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; ill ; ld4s r25, r26 }
+    7328:	[0-9a-f]* 	{ info 19 ; addi r15, r16, 5 ; ld4s r25, r26 }
+    7330:	[0-9a-f]* 	{ info 19 ; mnz r5, r6, r7 ; ld4s r25, r26 }
+    7338:	[0-9a-f]* 	{ info 19 ; shl3add r5, r6, r7 ; ld4s r25, r26 }
+    7340:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    7348:	[0-9a-f]* 	{ subx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    7350:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
+    7358:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
+    7360:	[0-9a-f]* 	{ shli r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
+    7368:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+    7370:	[0-9a-f]* 	{ and r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    7378:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    7380:	[0-9a-f]* 	{ mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4s r25, r26 }
+    7388:	[0-9a-f]* 	{ mnz r15, r16, r17 ; xor r5, r6, r7 ; ld4s r25, r26 }
+    7390:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
+    7398:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
+    73a0:	[0-9a-f]* 	{ move r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    73a8:	[0-9a-f]* 	{ movei r15, 5 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    73b0:	[0-9a-f]* 	{ movei r15, 5 ; rotl r5, r6, r7 ; ld4s r25, r26 }
+    73b8:	[0-9a-f]* 	{ movei r5, 5 ; jalrp r15 ; ld4s r25, r26 }
+    73c0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    73c8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    73d0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    73d8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    73e0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld4s r25, r26 }
+    73e8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
+    73f0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; info 19 ; ld4s r25, r26 }
+    73f8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
+    7400:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+    7408:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 }
+    7410:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    7418:	[0-9a-f]* 	{ mulx r5, r6, r7 ; or r15, r16, r17 ; ld4s r25, r26 }
+    7420:	[0-9a-f]* 	{ mz r15, r16, r17 ; mnz r5, r6, r7 ; ld4s r25, r26 }
+    7428:	[0-9a-f]* 	{ mz r15, r16, r17 ; xor r5, r6, r7 ; ld4s r25, r26 }
+    7430:	[0-9a-f]* 	{ mz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
+    7438:	[0-9a-f]* 	{ ctz r5, r6 ; nop ; ld4s r25, r26 }
+    7440:	[0-9a-f]* 	{ nop ; shl r15, r16, r17 ; ld4s r25, r26 }
+    7448:	[0-9a-f]* 	{ nor r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 }
+    7450:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+    7458:	[0-9a-f]* 	{ nor r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    7460:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpltu r5, r6, r7 ; ld4s r25, r26 }
+    7468:	[0-9a-f]* 	{ or r15, r16, r17 ; sub r5, r6, r7 ; ld4s r25, r26 }
+    7470:	[0-9a-f]* 	{ or r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    7478:	[0-9a-f]* 	{ pcnt r5, r6 ; mz r15, r16, r17 ; ld4s r25, r26 }
+    7480:	[0-9a-f]* 	{ revbits r5, r6 ; jalrp r15 ; ld4s r25, r26 }
+    7488:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    7490:	[0-9a-f]* 	{ rotl r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
+    7498:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
+    74a0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    74a8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
+    74b0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 }
+    74b8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    74c0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    74c8:	[0-9a-f]* 	{ shl r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
+    74d0:	[0-9a-f]* 	{ shl r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
+    74d8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 }
+    74e0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    74e8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
+    74f0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
+    74f8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    7500:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
+    7508:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shrui r5, r6, 5 ; ld4s r25, r26 }
+    7510:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    7518:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    7520:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
+    7528:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
+    7530:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 }
+    7538:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    7540:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
+    7548:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
+    7550:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    7558:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
+    7560:	[0-9a-f]* 	{ shli r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 }
+    7568:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    7570:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+    7578:	[0-9a-f]* 	{ shrs r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
+    7580:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
+    7588:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; mz r5, r6, r7 ; ld4s r25, r26 }
+    7590:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    7598:	[0-9a-f]* 	{ shru r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
+    75a0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
+    75a8:	[0-9a-f]* 	{ shru r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    75b0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4s r25, r26 }
+    75b8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shrui r5, r6, 5 ; ld4s r25, r26 }
+    75c0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    75c8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    75d0:	[0-9a-f]* 	{ sub r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 }
+    75d8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
+    75e0:	[0-9a-f]* 	{ subx r15, r16, r17 ; mz r5, r6, r7 ; ld4s r25, r26 }
+    75e8:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    75f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; ld4s r25, r26 }
+    75f8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    7600:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    7608:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rotli r15, r16, 5 ; ld4s r25, r26 }
+    7610:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; move r15, r16 ; ld4s r25, r26 }
+    7618:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpne r5, r6, r7 ; ld4s r25, r26 }
+    7620:	[0-9a-f]* 	{ xor r15, r16, r17 ; subx r5, r6, r7 ; ld4s r25, r26 }
+    7628:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
+    7630:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; ld4s_add r15, r16, 5 }
+    7638:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; ld4s_add r15, r16, 5 }
+    7640:	[0-9a-f]* 	{ shru r5, r6, r7 ; ld4s_add r15, r16, 5 }
+    7648:	[0-9a-f]* 	{ v1minu r5, r6, r7 ; ld4s_add r15, r16, 5 }
+    7650:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; ld4s_add r15, r16, 5 }
+    7658:	[0-9a-f]* 	{ and r5, r6, r7 ; ld4u r15, r16 }
+    7660:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; ld4u r15, r16 }
+    7668:	[0-9a-f]* 	{ ori r5, r6, 5 ; ld4u r15, r16 }
+    7670:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; ld4u r15, r16 }
+    7678:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; ld4u r15, r16 }
+    7680:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; ld4u r15, r16 }
+    7688:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    7690:	[0-9a-f]* 	{ add r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    7698:	[0-9a-f]* 	{ add r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    76a0:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; ld4u r25, r26 }
+    76a8:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; ld4u r25, r26 }
+    76b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    76b8:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
+    76c0:	[0-9a-f]* 	{ addx r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    76c8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; ld4u r25, r26 }
+    76d0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    76d8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    76e0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    76e8:	[0-9a-f]* 	{ and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    76f0:	[0-9a-f]* 	{ and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    76f8:	[0-9a-f]* 	{ pcnt r5, r6 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    7700:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; ld4u r25, r26 }
+    7708:	[0-9a-f]* 	{ clz r5, r6 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    7710:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 }
+    7718:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    7720:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    7728:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    7730:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    7738:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
+    7740:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; or r5, r6, r7 ; ld4u r25, r26 }
+    7748:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+    7750:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    7758:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    7760:	[0-9a-f]* 	{ cmples r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+    7768:	[0-9a-f]* 	{ ctz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
+    7770:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
+    7778:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    7780:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+    7788:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    7790:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
+    7798:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; or r5, r6, r7 ; ld4u r25, r26 }
+    77a0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ld4u r25, r26 }
+    77a8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+    77b0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    77b8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+    77c0:	[0-9a-f]* 	{ ctz r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    77c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    77d0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    77d8:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 ; ld4u r25, r26 }
+    77e0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ld4u r25, r26 }
+    77e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; ld4u r25, r26 }
+    77f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ld4u r25, r26 }
+    77f8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    7800:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ill ; ld4u r25, r26 }
+    7808:	[0-9a-f]* 	{ info 19 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    7810:	[0-9a-f]* 	{ info 19 ; move r5, r6 ; ld4u r25, r26 }
+    7818:	[0-9a-f]* 	{ info 19 ; shl3addx r5, r6, r7 ; ld4u r25, r26 }
+    7820:	[0-9a-f]* 	{ jalr r15 ; ld4u r25, r26 }
+    7828:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jalr r15 ; ld4u r25, r26 }
+    7830:	[0-9a-f]* 	{ nop ; jalrp r15 ; ld4u r25, r26 }
+    7838:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; jr r15 ; ld4u r25, r26 }
+    7840:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jr r15 ; ld4u r25, r26 }
+    7848:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+    7850:	[0-9a-f]* 	{ clz r5, r6 ; lnk r15 ; ld4u r25, r26 }
+    7858:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+    7860:	[0-9a-f]* 	{ mnz r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
+    7868:	[0-9a-f]* 	{ mnz r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    7870:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    7878:	[0-9a-f]* 	{ mulx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    7880:	[0-9a-f]* 	{ move r5, r6 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+    7888:	[0-9a-f]* 	{ movei r15, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    7890:	[0-9a-f]* 	{ movei r15, 5 ; shl r5, r6, r7 ; ld4u r25, r26 }
+    7898:	[0-9a-f]* 	{ movei r5, 5 ; jrp r15 ; ld4u r25, r26 }
+    78a0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    78a8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    78b0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; ld4u r25, r26 }
+    78b8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    78c0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld4u r25, r26 }
+    78c8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    78d0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+    78d8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 }
+    78e0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    78e8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
+    78f0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    78f8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 }
+    7900:	[0-9a-f]* 	{ mz r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
+    7908:	[0-9a-f]* 	{ mz r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    7910:	[0-9a-f]* 	{ mz r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    7918:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nop ; ld4u r25, r26 }
+    7920:	[0-9a-f]* 	{ nop ; shl1add r15, r16, r17 ; ld4u r25, r26 }
+    7928:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; nor r15, r16, r17 ; ld4u r25, r26 }
+    7930:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    7938:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+    7940:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 }
+    7948:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 }
+    7950:	[0-9a-f]* 	{ or r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    7958:	[0-9a-f]* 	{ pcnt r5, r6 ; nor r15, r16, r17 ; ld4u r25, r26 }
+    7960:	[0-9a-f]* 	{ revbits r5, r6 ; jrp r15 ; ld4u r25, r26 }
+    7968:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    7970:	[0-9a-f]* 	{ clz r5, r6 ; rotl r15, r16, r17 ; ld4u r25, r26 }
+    7978:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
+    7980:	[0-9a-f]* 	{ rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    7988:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
+    7990:	[0-9a-f]* 	{ rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    7998:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+    79a0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    79a8:	[0-9a-f]* 	{ shl r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    79b0:	[0-9a-f]* 	{ shl r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    79b8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    79c0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    79c8:	[0-9a-f]* 	{ clz r5, r6 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+    79d0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
+    79d8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    79e0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
+    79e8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    79f0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+    79f8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    7a00:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    7a08:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    7a10:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    7a18:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    7a20:	[0-9a-f]* 	{ clz r5, r6 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    7a28:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
+    7a30:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    7a38:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
+    7a40:	[0-9a-f]* 	{ shli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    7a48:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+    7a50:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    7a58:	[0-9a-f]* 	{ shrs r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    7a60:	[0-9a-f]* 	{ shrs r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    7a68:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    7a70:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    7a78:	[0-9a-f]* 	{ clz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    7a80:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl2add r5, r6, r7 ; ld4u r25, r26 }
+    7a88:	[0-9a-f]* 	{ shru r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    7a90:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld4u r25, r26 }
+    7a98:	[0-9a-f]* 	{ shrui r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    7aa0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+    7aa8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    7ab0:	[0-9a-f]* 	{ sub r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    7ab8:	[0-9a-f]* 	{ sub r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    7ac0:	[0-9a-f]* 	{ subx r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    7ac8:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    7ad0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    7ad8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ld4u r25, r26 }
+    7ae0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    7ae8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl1add r15, r16, r17 ; ld4u r25, r26 }
+    7af0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    7af8:	[0-9a-f]* 	{ xor r15, r16, r17 ; ld4u r25, r26 }
+    7b00:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    7b08:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    7b10:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; ld4u_add r15, r16, 5 }
+    7b18:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; ld4u_add r15, r16, 5 }
+    7b20:	[0-9a-f]* 	{ shrux r5, r6, r7 ; ld4u_add r15, r16, 5 }
+    7b28:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; ld4u_add r15, r16, 5 }
+    7b30:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; ld4u_add r15, r16, 5 }
+    7b38:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; ld_add r15, r16, 5 }
+    7b40:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; ld_add r15, r16, 5 }
+    7b48:	[0-9a-f]* 	{ revbits r5, r6 ; ld_add r15, r16, 5 }
+    7b50:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; ld_add r15, r16, 5 }
+    7b58:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 }
+    7b60:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; ld_add r15, r16, 5 }
+    7b68:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; ldna r15, r16 }
+    7b70:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ldna r15, r16 }
+    7b78:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; ldna r15, r16 }
+    7b80:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; ldna r15, r16 }
+    7b88:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; ldna r15, r16 }
+    7b90:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; ldna_add r15, r16, 5 }
+    7b98:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; ldna_add r15, r16, 5 }
+    7ba0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; ldna_add r15, r16, 5 }
+    7ba8:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; ldna_add r15, r16, 5 }
+    7bb0:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; ldna_add r15, r16, 5 }
+    7bb8:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; ldna_add r15, r16, 5 }
+    7bc0:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; ldnt r15, r16 }
+    7bc8:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; ldnt r15, r16 }
+    7bd0:	[0-9a-f]* 	{ subx r5, r6, r7 ; ldnt r15, r16 }
+    7bd8:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; ldnt r15, r16 }
+    7be0:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; ldnt r15, r16 }
+    7be8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; ldnt1s r15, r16 }
+    7bf0:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; ldnt1s r15, r16 }
+    7bf8:	[0-9a-f]* 	{ shl r5, r6, r7 ; ldnt1s r15, r16 }
+    7c00:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; ldnt1s r15, r16 }
+    7c08:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; ldnt1s r15, r16 }
+    7c10:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; ldnt1s r15, r16 }
+    7c18:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+    7c20:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+    7c28:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ldnt1s_add r15, r16, 5 }
+    7c30:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+    7c38:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+    7c40:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; ldnt1u r15, r16 }
+    7c48:	[0-9a-f]* 	{ infol 4660 ; ldnt1u r15, r16 }
+    7c50:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; ldnt1u r15, r16 }
+    7c58:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; ldnt1u r15, r16 }
+    7c60:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; ldnt1u r15, r16 }
+    7c68:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; ldnt1u r15, r16 }
+    7c70:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+    7c78:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+    7c80:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ldnt1u_add r15, r16, 5 }
+    7c88:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 }
+    7c90:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+    7c98:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ldnt2s r15, r16 }
+    7ca0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ldnt2s r15, r16 }
+    7ca8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; ldnt2s r15, r16 }
+    7cb0:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; ldnt2s r15, r16 }
+    7cb8:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; ldnt2s r15, r16 }
+    7cc0:	[0-9a-f]* 	{ xor r5, r6, r7 ; ldnt2s r15, r16 }
+    7cc8:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+    7cd0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+    7cd8:	[0-9a-f]* 	{ v1add r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+    7ce0:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; ldnt2s_add r15, r16, 5 }
+    7ce8:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; ldnt2s_add r15, r16, 5 }
+    7cf0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; ldnt2u r15, r16 }
+    7cf8:	[0-9a-f]* 	{ movei r5, 5 ; ldnt2u r15, r16 }
+    7d00:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; ldnt2u r15, r16 }
+    7d08:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; ldnt2u r15, r16 }
+    7d10:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; ldnt2u r15, r16 }
+    7d18:	[0-9a-f]* 	{ add r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+    7d20:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+    7d28:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+    7d30:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+    7d38:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; ldnt2u_add r15, r16, 5 }
+    7d40:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+    7d48:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ldnt4s r15, r16 }
+    7d50:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; ldnt4s r15, r16 }
+    7d58:	[0-9a-f]* 	{ shli r5, r6, 5 ; ldnt4s r15, r16 }
+    7d60:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; ldnt4s r15, r16 }
+    7d68:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; ldnt4s r15, r16 }
+    7d70:	[0-9a-f]* 	{ addli r5, r6, 4660 ; ldnt4s_add r15, r16, 5 }
+    7d78:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    7d80:	[0-9a-f]* 	{ mulx r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    7d88:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    7d90:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    7d98:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    7da0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ldnt4u r15, r16 }
+    7da8:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; ldnt4u r15, r16 }
+    7db0:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; ldnt4u r15, r16 }
+    7db8:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; ldnt4u r15, r16 }
+    7dc0:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; ldnt4u r15, r16 }
+    7dc8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; ldnt4u_add r15, r16, 5 }
+    7dd0:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+    7dd8:	[0-9a-f]* 	{ nop ; ldnt4u_add r15, r16, 5 }
+    7de0:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; ldnt4u_add r15, r16, 5 }
+    7de8:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; ldnt4u_add r15, r16, 5 }
+    7df0:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+    7df8:	[0-9a-f]* 	{ cmula r5, r6, r7 ; ldnt_add r15, r16, 5 }
+    7e00:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; ldnt_add r15, r16, 5 }
+    7e08:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; ldnt_add r15, r16, 5 }
+    7e10:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; ldnt_add r15, r16, 5 }
+    7e18:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; ldnt_add r15, r16, 5 }
+    7e20:	[0-9a-f]* 	{ add r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+    7e28:	[0-9a-f]* 	{ addx r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    7e30:	[0-9a-f]* 	{ and r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    7e38:	[0-9a-f]* 	{ clz r5, r6 ; lnk r15 ; ld4u r25, r26 }
+    7e40:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    7e48:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 }
+    7e50:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
+    7e58:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; lnk r15 ; st r25, r26 }
+    7e60:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    7e68:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; lnk r15 }
+    7e70:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; lnk r15 ; prefetch_l3_fault r25 }
+    7e78:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; lnk r15 ; ld r25, r26 }
+    7e80:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; lnk r15 ; ld r25, r26 }
+    7e88:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
+    7e90:	[0-9a-f]* 	{ clz r5, r6 ; lnk r15 ; ld1u r25, r26 }
+    7e98:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; lnk r15 ; ld1u r25, r26 }
+    7ea0:	[0-9a-f]* 	{ movei r5, 5 ; lnk r15 ; ld2s r25, r26 }
+    7ea8:	[0-9a-f]* 	{ add r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
+    7eb0:	[0-9a-f]* 	{ revbytes r5, r6 ; lnk r15 ; ld2u r25, r26 }
+    7eb8:	[0-9a-f]* 	{ ctz r5, r6 ; lnk r15 ; ld4s r25, r26 }
+    7ec0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lnk r15 ; ld4s r25, r26 }
+    7ec8:	[0-9a-f]* 	{ mz r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+    7ed0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    7ed8:	[0-9a-f]* 	{ movei r5, 5 ; lnk r15 ; prefetch_l3 r25 }
+    7ee0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    7ee8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
+    7ef0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    7ef8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    7f00:	[0-9a-f]* 	{ mulx r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
+    7f08:	[0-9a-f]* 	{ nop ; lnk r15 ; prefetch_l2_fault r25 }
+    7f10:	[0-9a-f]* 	{ or r5, r6, r7 ; lnk r15 ; prefetch_l3_fault r25 }
+    7f18:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; lnk r15 ; prefetch r25 }
+    7f20:	[0-9a-f]* 	{ shrui r5, r6, 5 ; lnk r15 ; prefetch r25 }
+    7f28:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    7f30:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
+    7f38:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
+    7f40:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    7f48:	[0-9a-f]* 	{ addx r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    7f50:	[0-9a-f]* 	{ rotli r5, r6, 5 ; lnk r15 ; prefetch_l2_fault r25 }
+    7f58:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
+    7f60:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
+    7f68:	[0-9a-f]* 	{ nor r5, r6, r7 ; lnk r15 ; prefetch_l3_fault r25 }
+    7f70:	[0-9a-f]* 	{ revbits r5, r6 ; lnk r15 ; prefetch_l3_fault r25 }
+    7f78:	[0-9a-f]* 	{ rotl r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    7f80:	[0-9a-f]* 	{ shl r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    7f88:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; lnk r15 }
+    7f90:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
+    7f98:	[0-9a-f]* 	{ shli r5, r6, 5 ; lnk r15 ; ld2s r25, r26 }
+    7fa0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; lnk r15 ; ld2s r25, r26 }
+    7fa8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; lnk r15 ; ld4s r25, r26 }
+    7fb0:	[0-9a-f]* 	{ movei r5, 5 ; lnk r15 ; st r25, r26 }
+    7fb8:	[0-9a-f]* 	{ add r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    7fc0:	[0-9a-f]* 	{ revbytes r5, r6 ; lnk r15 ; st1 r25, r26 }
+    7fc8:	[0-9a-f]* 	{ ctz r5, r6 ; lnk r15 ; st2 r25, r26 }
+    7fd0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lnk r15 ; st2 r25, r26 }
+    7fd8:	[0-9a-f]* 	{ mz r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    7fe0:	[0-9a-f]* 	{ sub r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    7fe8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
+    7ff0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; lnk r15 ; st r25, r26 }
+    7ff8:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; lnk r15 }
+    8000:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; lnk r15 }
+    8008:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; lnk r15 }
+    8010:	[0-9a-f]* 	{ cmples r5, r6, r7 ; mf }
+    8018:	[0-9a-f]* 	{ mnz r5, r6, r7 ; mf }
+    8020:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; mf }
+    8028:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; mf }
+    8030:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; mf }
+    8038:	[0-9a-f]* 	{ xor r5, r6, r7 ; mf }
+    8040:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    8048:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    8050:	[0-9a-f]* 	{ v1add r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    8058:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    8060:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    8068:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; cmpne r15, r16, r17 }
+    8070:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; ld4u r15, r16 }
+    8078:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; prefetch_l1_fault r15 }
+    8080:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; stnt_add r15, r16, 5 }
+    8088:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 }
+    8090:	[0-9a-f]* 	{ mnz r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 }
+    8098:	[0-9a-f]* 	{ mnz r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 }
+    80a0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; and r5, r6, r7 ; ld2s r25, r26 }
+    80a8:	[0-9a-f]* 	{ clz r5, r6 ; mnz r15, r16, r17 ; ld1u r25, r26 }
+    80b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+    80b8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+    80c0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch r25 }
+    80c8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+    80d0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+    80d8:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; mnz r15, r16, r17 }
+    80e0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    80e8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    80f0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl3add r5, r6, r7 ; ld r25, r26 }
+    80f8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld1s r25, r26 }
+    8100:	[0-9a-f]* 	{ mnz r15, r16, r17 ; addx r5, r6, r7 ; ld1u r25, r26 }
+    8108:	[0-9a-f]* 	{ mnz r15, r16, r17 ; rotli r5, r6, 5 ; ld1u r25, r26 }
+    8110:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    8118:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    8120:	[0-9a-f]* 	{ mnz r15, r16, r17 ; nor r5, r6, r7 ; ld2u r25, r26 }
+    8128:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
+    8130:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shru r5, r6, r7 ; ld4s r25, r26 }
+    8138:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
+    8140:	[0-9a-f]* 	{ mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+    8148:	[0-9a-f]* 	{ mnz r15, r16, r17 ; movei r5, 5 ; prefetch r25 }
+    8150:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
+    8158:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    8160:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+    8168:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    8170:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    8178:	[0-9a-f]* 	{ mnz r15, r16, r17 ; nop ; prefetch r25 }
+    8180:	[0-9a-f]* 	{ mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    8188:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch r25 }
+    8190:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    8198:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    81a0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; and r5, r6, r7 ; prefetch_l1_fault r25 }
+    81a8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
+    81b0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
+    81b8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2 r25 }
+    81c0:	[0-9a-f]* 	{ pcnt r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+    81c8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
+    81d0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l3 r25 }
+    81d8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
+    81e0:	[0-9a-f]* 	{ revbits r5, r6 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    81e8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+    81f0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
+    81f8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl1addx r5, r6, r7 ; st r25, r26 }
+    8200:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+    8208:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl3addx r5, r6, r7 }
+    8210:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shrs r5, r6, r7 }
+    8218:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    8220:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
+    8228:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
+    8230:	[0-9a-f]* 	{ mnz r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 }
+    8238:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+    8240:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shru r5, r6, r7 ; st2 r25, r26 }
+    8248:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
+    8250:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+    8258:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
+    8260:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    8268:	[0-9a-f]* 	{ mnz r15, r16, r17 ; v1cmpltui r5, r6, 5 }
+    8270:	[0-9a-f]* 	{ mnz r15, r16, r17 ; v2cmples r5, r6, r7 }
+    8278:	[0-9a-f]* 	{ mnz r15, r16, r17 ; v4packsc r5, r6, r7 }
+    8280:	[0-9a-f]* 	{ mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+    8288:	[0-9a-f]* 	{ mnz r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 }
+    8290:	[0-9a-f]* 	{ mnz r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 }
+    8298:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+    82a0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmples r15, r16, r17 ; st2 r25, r26 }
+    82a8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmplts r15, r16, r17 }
+    82b0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    82b8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ld2u r25, r26 }
+    82c0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; ld4s r25, r26 }
+    82c8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    82d0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+    82d8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; nop ; ld r25, r26 }
+    82e0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+    82e8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
+    82f0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+    82f8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    8300:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 }
+    8308:	[0-9a-f]* 	{ mnz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    8310:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    8318:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+    8320:	[0-9a-f]* 	{ mnz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    8328:	[0-9a-f]* 	{ mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    8330:	[0-9a-f]* 	{ mnz r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
+    8338:	[0-9a-f]* 	{ mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+    8340:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+    8348:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; prefetch r25 }
+    8350:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    8358:	[0-9a-f]* 	{ mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
+    8360:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+    8368:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    8370:	[0-9a-f]* 	{ mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l3 r25 }
+    8378:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
+    8380:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+    8388:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+    8390:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    8398:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    83a0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    83a8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    83b0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
+    83b8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; st r25, r26 }
+    83c0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    83c8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; st2 r15, r16 }
+    83d0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+    83d8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
+    83e0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    83e8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; v1maxu r15, r16, r17 }
+    83f0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; v2shrs r15, r16, r17 }
+    83f8:	[0-9a-f]* 	{ move r15, r16 ; add r5, r6, r7 ; ld1u r25, r26 }
+    8400:	[0-9a-f]* 	{ move r15, r16 ; addx r5, r6, r7 ; ld2s r25, r26 }
+    8408:	[0-9a-f]* 	{ move r15, r16 ; and r5, r6, r7 ; ld2s r25, r26 }
+    8410:	[0-9a-f]* 	{ clz r5, r6 ; move r15, r16 ; ld1u r25, r26 }
+    8418:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
+    8420:	[0-9a-f]* 	{ move r15, r16 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+    8428:	[0-9a-f]* 	{ move r15, r16 ; cmpleu r5, r6, r7 ; prefetch r25 }
+    8430:	[0-9a-f]* 	{ move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+    8438:	[0-9a-f]* 	{ move r15, r16 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+    8440:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; move r15, r16 }
+    8448:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
+    8450:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; move r15, r16 ; ld r25, r26 }
+    8458:	[0-9a-f]* 	{ move r15, r16 ; shl3add r5, r6, r7 ; ld r25, r26 }
+    8460:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
+    8468:	[0-9a-f]* 	{ move r15, r16 ; addx r5, r6, r7 ; ld1u r25, r26 }
+    8470:	[0-9a-f]* 	{ move r15, r16 ; rotli r5, r6, 5 ; ld1u r25, r26 }
+    8478:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
+    8480:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
+    8488:	[0-9a-f]* 	{ move r15, r16 ; nor r5, r6, r7 ; ld2u r25, r26 }
+    8490:	[0-9a-f]* 	{ move r15, r16 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
+    8498:	[0-9a-f]* 	{ move r15, r16 ; shru r5, r6, r7 ; ld4s r25, r26 }
+    84a0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    84a8:	[0-9a-f]* 	{ move r15, r16 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+    84b0:	[0-9a-f]* 	{ move r15, r16 ; movei r5, 5 ; prefetch r25 }
+    84b8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    84c0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
+    84c8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
+    84d0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld2s r25, r26 }
+    84d8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
+    84e0:	[0-9a-f]* 	{ move r15, r16 ; nop ; prefetch r25 }
+    84e8:	[0-9a-f]* 	{ move r15, r16 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    84f0:	[0-9a-f]* 	{ move r15, r16 ; cmpeqi r5, r6, 5 ; prefetch r25 }
+    84f8:	[0-9a-f]* 	{ move r15, r16 ; shli r5, r6, 5 ; prefetch r25 }
+    8500:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    8508:	[0-9a-f]* 	{ move r15, r16 ; and r5, r6, r7 ; prefetch_l1_fault r25 }
+    8510:	[0-9a-f]* 	{ move r15, r16 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
+    8518:	[0-9a-f]* 	{ move r15, r16 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
+    8520:	[0-9a-f]* 	{ move r15, r16 ; xor r5, r6, r7 ; prefetch_l2 r25 }
+    8528:	[0-9a-f]* 	{ pcnt r5, r6 ; move r15, r16 ; prefetch_l2_fault r25 }
+    8530:	[0-9a-f]* 	{ move r15, r16 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
+    8538:	[0-9a-f]* 	{ move r15, r16 ; sub r5, r6, r7 ; prefetch_l3 r25 }
+    8540:	[0-9a-f]* 	{ mulax r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 }
+    8548:	[0-9a-f]* 	{ revbits r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
+    8550:	[0-9a-f]* 	{ move r15, r16 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+    8558:	[0-9a-f]* 	{ move r15, r16 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
+    8560:	[0-9a-f]* 	{ move r15, r16 ; shl1addx r5, r6, r7 ; st r25, r26 }
+    8568:	[0-9a-f]* 	{ move r15, r16 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+    8570:	[0-9a-f]* 	{ move r15, r16 ; shl3addx r5, r6, r7 }
+    8578:	[0-9a-f]* 	{ move r15, r16 ; shrs r5, r6, r7 }
+    8580:	[0-9a-f]* 	{ move r15, r16 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    8588:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; move r15, r16 ; st r25, r26 }
+    8590:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; st r25, r26 }
+    8598:	[0-9a-f]* 	{ move r15, r16 ; nor r5, r6, r7 ; st1 r25, r26 }
+    85a0:	[0-9a-f]* 	{ move r15, r16 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+    85a8:	[0-9a-f]* 	{ move r15, r16 ; shru r5, r6, r7 ; st2 r25, r26 }
+    85b0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    85b8:	[0-9a-f]* 	{ move r15, r16 ; sub r5, r6, r7 ; prefetch r25 }
+    85c0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 }
+    85c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; prefetch_l2 r25 }
+    85d0:	[0-9a-f]* 	{ move r15, r16 ; v1cmpltui r5, r6, 5 }
+    85d8:	[0-9a-f]* 	{ move r15, r16 ; v2cmples r5, r6, r7 }
+    85e0:	[0-9a-f]* 	{ move r15, r16 ; v4packsc r5, r6, r7 }
+    85e8:	[0-9a-f]* 	{ move r5, r6 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+    85f0:	[0-9a-f]* 	{ move r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
+    85f8:	[0-9a-f]* 	{ move r5, r6 ; and r15, r16, r17 ; st r25, r26 }
+    8600:	[0-9a-f]* 	{ move r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+    8608:	[0-9a-f]* 	{ move r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
+    8610:	[0-9a-f]* 	{ move r5, r6 ; cmplts r15, r16, r17 }
+    8618:	[0-9a-f]* 	{ move r5, r6 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    8620:	[0-9a-f]* 	{ move r5, r6 ; ld2u r25, r26 }
+    8628:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; ld4s r25, r26 }
+    8630:	[0-9a-f]* 	{ move r5, r6 ; jalrp r15 ; ld2u r25, r26 }
+    8638:	[0-9a-f]* 	{ move r5, r6 ; jrp r15 ; ld4u r25, r26 }
+    8640:	[0-9a-f]* 	{ move r5, r6 ; nop ; ld r25, r26 }
+    8648:	[0-9a-f]* 	{ move r5, r6 ; jalrp r15 ; ld1s r25, r26 }
+    8650:	[0-9a-f]* 	{ move r5, r6 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
+    8658:	[0-9a-f]* 	{ move r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 }
+    8660:	[0-9a-f]* 	{ move r5, r6 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    8668:	[0-9a-f]* 	{ move r5, r6 ; shl r15, r16, r17 ; ld2u r25, r26 }
+    8670:	[0-9a-f]* 	{ move r5, r6 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    8678:	[0-9a-f]* 	{ move r5, r6 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    8680:	[0-9a-f]* 	{ move r5, r6 ; ldnt1s_add r15, r16, 5 }
+    8688:	[0-9a-f]* 	{ move r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
+    8690:	[0-9a-f]* 	{ move r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    8698:	[0-9a-f]* 	{ move r5, r6 ; nop ; prefetch_l1_fault r25 }
+    86a0:	[0-9a-f]* 	{ move r5, r6 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+    86a8:	[0-9a-f]* 	{ move r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
+    86b0:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; prefetch r25 }
+    86b8:	[0-9a-f]* 	{ move r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    86c0:	[0-9a-f]* 	{ move r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 }
+    86c8:	[0-9a-f]* 	{ move r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+    86d0:	[0-9a-f]* 	{ move r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    86d8:	[0-9a-f]* 	{ move r5, r6 ; movei r15, 5 ; prefetch_l3 r25 }
+    86e0:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; prefetch_l3_fault r25 }
+    86e8:	[0-9a-f]* 	{ move r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
+    86f0:	[0-9a-f]* 	{ move r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+    86f8:	[0-9a-f]* 	{ move r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    8700:	[0-9a-f]* 	{ move r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    8708:	[0-9a-f]* 	{ move r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    8710:	[0-9a-f]* 	{ move r5, r6 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    8718:	[0-9a-f]* 	{ move r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 }
+    8720:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; st r25, r26 }
+    8728:	[0-9a-f]* 	{ move r5, r6 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    8730:	[0-9a-f]* 	{ move r5, r6 ; st2 r15, r16 }
+    8738:	[0-9a-f]* 	{ move r5, r6 ; shrs r15, r16, r17 ; st2 r25, r26 }
+    8740:	[0-9a-f]* 	{ move r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 }
+    8748:	[0-9a-f]* 	{ move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    8750:	[0-9a-f]* 	{ move r5, r6 ; v1maxu r15, r16, r17 }
+    8758:	[0-9a-f]* 	{ move r5, r6 ; v2shrs r15, r16, r17 }
+    8760:	[0-9a-f]* 	{ movei r15, 5 ; add r5, r6, r7 ; ld1u r25, r26 }
+    8768:	[0-9a-f]* 	{ movei r15, 5 ; addx r5, r6, r7 ; ld2s r25, r26 }
+    8770:	[0-9a-f]* 	{ movei r15, 5 ; and r5, r6, r7 ; ld2s r25, r26 }
+    8778:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
+    8780:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
+    8788:	[0-9a-f]* 	{ movei r15, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+    8790:	[0-9a-f]* 	{ movei r15, 5 ; cmpleu r5, r6, r7 ; prefetch r25 }
+    8798:	[0-9a-f]* 	{ movei r15, 5 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+    87a0:	[0-9a-f]* 	{ movei r15, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+    87a8:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; movei r15, 5 }
+    87b0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    87b8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
+    87c0:	[0-9a-f]* 	{ movei r15, 5 ; shl3add r5, r6, r7 ; ld r25, r26 }
+    87c8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    87d0:	[0-9a-f]* 	{ movei r15, 5 ; addx r5, r6, r7 ; ld1u r25, r26 }
+    87d8:	[0-9a-f]* 	{ movei r15, 5 ; rotli r5, r6, 5 ; ld1u r25, r26 }
+    87e0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; ld2s r25, r26 }
+    87e8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; ld2s r25, r26 }
+    87f0:	[0-9a-f]* 	{ movei r15, 5 ; nor r5, r6, r7 ; ld2u r25, r26 }
+    87f8:	[0-9a-f]* 	{ movei r15, 5 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
+    8800:	[0-9a-f]* 	{ movei r15, 5 ; shru r5, r6, r7 ; ld4s r25, r26 }
+    8808:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+    8810:	[0-9a-f]* 	{ movei r15, 5 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+    8818:	[0-9a-f]* 	{ movei r15, 5 ; movei r5, 5 ; prefetch r25 }
+    8820:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+    8828:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 }
+    8830:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
+    8838:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 }
+    8840:	[0-9a-f]* 	{ mulx r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 }
+    8848:	[0-9a-f]* 	{ movei r15, 5 ; nop ; prefetch r25 }
+    8850:	[0-9a-f]* 	{ movei r15, 5 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    8858:	[0-9a-f]* 	{ movei r15, 5 ; cmpeqi r5, r6, 5 ; prefetch r25 }
+    8860:	[0-9a-f]* 	{ movei r15, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    8868:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    8870:	[0-9a-f]* 	{ movei r15, 5 ; and r5, r6, r7 ; prefetch_l1_fault r25 }
+    8878:	[0-9a-f]* 	{ movei r15, 5 ; shl1add r5, r6, r7 ; prefetch_l1_fault r25 }
+    8880:	[0-9a-f]* 	{ movei r15, 5 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
+    8888:	[0-9a-f]* 	{ movei r15, 5 ; xor r5, r6, r7 ; prefetch_l2 r25 }
+    8890:	[0-9a-f]* 	{ pcnt r5, r6 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    8898:	[0-9a-f]* 	{ movei r15, 5 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
+    88a0:	[0-9a-f]* 	{ movei r15, 5 ; sub r5, r6, r7 ; prefetch_l3 r25 }
+    88a8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l3_fault r25 }
+    88b0:	[0-9a-f]* 	{ revbits r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    88b8:	[0-9a-f]* 	{ movei r15, 5 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+    88c0:	[0-9a-f]* 	{ movei r15, 5 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
+    88c8:	[0-9a-f]* 	{ movei r15, 5 ; shl1addx r5, r6, r7 ; st r25, r26 }
+    88d0:	[0-9a-f]* 	{ movei r15, 5 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+    88d8:	[0-9a-f]* 	{ movei r15, 5 ; shl3addx r5, r6, r7 }
+    88e0:	[0-9a-f]* 	{ movei r15, 5 ; shrs r5, r6, r7 }
+    88e8:	[0-9a-f]* 	{ movei r15, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+    88f0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; st r25, r26 }
+    88f8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; st r25, r26 }
+    8900:	[0-9a-f]* 	{ movei r15, 5 ; nor r5, r6, r7 ; st1 r25, r26 }
+    8908:	[0-9a-f]* 	{ movei r15, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+    8910:	[0-9a-f]* 	{ movei r15, 5 ; shru r5, r6, r7 ; st2 r25, r26 }
+    8918:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
+    8920:	[0-9a-f]* 	{ movei r15, 5 ; sub r5, r6, r7 ; prefetch r25 }
+    8928:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; movei r15, 5 ; prefetch r25 }
+    8930:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l2 r25 }
+    8938:	[0-9a-f]* 	{ movei r15, 5 ; v1cmpltui r5, r6, 5 }
+    8940:	[0-9a-f]* 	{ movei r15, 5 ; v2cmples r5, r6, r7 }
+    8948:	[0-9a-f]* 	{ movei r15, 5 ; v4packsc r5, r6, r7 }
+    8950:	[0-9a-f]* 	{ movei r5, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+    8958:	[0-9a-f]* 	{ movei r5, 5 ; addx r15, r16, r17 ; st r25, r26 }
+    8960:	[0-9a-f]* 	{ movei r5, 5 ; and r15, r16, r17 ; st r25, r26 }
+    8968:	[0-9a-f]* 	{ movei r5, 5 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+    8970:	[0-9a-f]* 	{ movei r5, 5 ; cmples r15, r16, r17 ; st2 r25, r26 }
+    8978:	[0-9a-f]* 	{ movei r5, 5 ; cmplts r15, r16, r17 }
+    8980:	[0-9a-f]* 	{ movei r5, 5 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    8988:	[0-9a-f]* 	{ movei r5, 5 ; ld2u r25, r26 }
+    8990:	[0-9a-f]* 	{ movei r5, 5 ; info 19 ; ld4s r25, r26 }
+    8998:	[0-9a-f]* 	{ movei r5, 5 ; jalrp r15 ; ld2u r25, r26 }
+    89a0:	[0-9a-f]* 	{ movei r5, 5 ; jrp r15 ; ld4u r25, r26 }
+    89a8:	[0-9a-f]* 	{ movei r5, 5 ; nop ; ld r25, r26 }
+    89b0:	[0-9a-f]* 	{ movei r5, 5 ; jalrp r15 ; ld1s r25, r26 }
+    89b8:	[0-9a-f]* 	{ movei r5, 5 ; cmpleu r15, r16, r17 ; ld1u r25, r26 }
+    89c0:	[0-9a-f]* 	{ movei r5, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
+    89c8:	[0-9a-f]* 	{ movei r5, 5 ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    89d0:	[0-9a-f]* 	{ movei r5, 5 ; shl r15, r16, r17 ; ld2u r25, r26 }
+    89d8:	[0-9a-f]* 	{ movei r5, 5 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+    89e0:	[0-9a-f]* 	{ movei r5, 5 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    89e8:	[0-9a-f]* 	{ movei r5, 5 ; ldnt1s_add r15, r16, 5 }
+    89f0:	[0-9a-f]* 	{ movei r5, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+    89f8:	[0-9a-f]* 	{ movei r5, 5 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    8a00:	[0-9a-f]* 	{ movei r5, 5 ; nop ; prefetch_l1_fault r25 }
+    8a08:	[0-9a-f]* 	{ movei r5, 5 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+    8a10:	[0-9a-f]* 	{ movei r5, 5 ; rotli r15, r16, 5 ; prefetch r25 }
+    8a18:	[0-9a-f]* 	{ movei r5, 5 ; info 19 ; prefetch r25 }
+    8a20:	[0-9a-f]* 	{ movei r5, 5 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    8a28:	[0-9a-f]* 	{ movei r5, 5 ; add r15, r16, r17 ; prefetch_l2 r25 }
+    8a30:	[0-9a-f]* 	{ movei r5, 5 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+    8a38:	[0-9a-f]* 	{ movei r5, 5 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    8a40:	[0-9a-f]* 	{ movei r5, 5 ; movei r15, 5 ; prefetch_l3 r25 }
+    8a48:	[0-9a-f]* 	{ movei r5, 5 ; info 19 ; prefetch_l3_fault r25 }
+    8a50:	[0-9a-f]* 	{ movei r5, 5 ; rotl r15, r16, r17 ; prefetch r25 }
+    8a58:	[0-9a-f]* 	{ movei r5, 5 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+    8a60:	[0-9a-f]* 	{ movei r5, 5 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    8a68:	[0-9a-f]* 	{ movei r5, 5 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    8a70:	[0-9a-f]* 	{ movei r5, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    8a78:	[0-9a-f]* 	{ movei r5, 5 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    8a80:	[0-9a-f]* 	{ movei r5, 5 ; shru r15, r16, r17 ; st4 r25, r26 }
+    8a88:	[0-9a-f]* 	{ movei r5, 5 ; info 19 ; st r25, r26 }
+    8a90:	[0-9a-f]* 	{ movei r5, 5 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    8a98:	[0-9a-f]* 	{ movei r5, 5 ; st2 r15, r16 }
+    8aa0:	[0-9a-f]* 	{ movei r5, 5 ; shrs r15, r16, r17 ; st2 r25, r26 }
+    8aa8:	[0-9a-f]* 	{ movei r5, 5 ; rotli r15, r16, 5 ; st4 r25, r26 }
+    8ab0:	[0-9a-f]* 	{ movei r5, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    8ab8:	[0-9a-f]* 	{ movei r5, 5 ; v1maxu r15, r16, r17 }
+    8ac0:	[0-9a-f]* 	{ movei r5, 5 ; v2shrs r15, r16, r17 }
+    8ac8:	[0-9a-f]* 	{ moveli r15, 4660 ; addli r5, r6, 4660 }
+    8ad0:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; moveli r15, 4660 }
+    8ad8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; moveli r15, 4660 }
+    8ae0:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; moveli r15, 4660 }
+    8ae8:	[0-9a-f]* 	{ moveli r15, 4660 ; v1subuc r5, r6, r7 }
+    8af0:	[0-9a-f]* 	{ moveli r15, 4660 ; v2shru r5, r6, r7 }
+    8af8:	[0-9a-f]* 	{ moveli r5, 4660 ; dtlbpr r15 }
+    8b00:	[0-9a-f]* 	{ moveli r5, 4660 ; ldna_add r15, r16, 5 }
+    8b08:	[0-9a-f]* 	{ moveli r5, 4660 ; prefetch_l3_fault r15 }
+    8b10:	[0-9a-f]* 	{ moveli r5, 4660 ; v1add r15, r16, r17 }
+    8b18:	[0-9a-f]* 	{ moveli r5, 4660 ; v2int_h r15, r16, r17 }
+    8b20:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    8b28:	[0-9a-f]* 	{ mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    8b30:	[0-9a-f]* 	{ or r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    8b38:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    8b40:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    8b48:	[0-9a-f]* 	{ v4add r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    8b50:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    8b58:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+    8b60:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
+    8b68:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+    8b70:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
+    8b78:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    8b80:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
+    8b88:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 }
+    8b90:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; infol 4660 }
+    8b98:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; jalrp r15 }
+    8ba0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+    8ba8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; ld r25, r26 }
+    8bb0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 }
+    8bb8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
+    8bc0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; ld2s r25, r26 }
+    8bc8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 }
+    8bd0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    8bd8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
+    8be0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld4u r25, r26 }
+    8be8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; lnk r15 ; ld1u r25, r26 }
+    8bf0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
+    8bf8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
+    8c00:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 }
+    8c08:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    8c10:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    8c18:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+    8c20:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    8c28:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+    8c30:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    8c38:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
+    8c40:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3 r25 }
+    8c48:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
+    8c50:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+    8c58:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
+    8c60:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    8c68:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+    8c70:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
+    8c78:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+    8c80:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    8c88:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st r25, r26 }
+    8c90:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 }
+    8c98:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+    8ca0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+    8ca8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
+    8cb0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    8cb8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; v2add r15, r16, r17 }
+    8cc0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 }
+    8cc8:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; cmpltsi r15, r16, 5 }
+    8cd0:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; ld2u_add r15, r16, 5 }
+    8cd8:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    8ce0:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; stnt2_add r15, r16, 5 }
+    8ce8:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; v2cmples r15, r16, r17 }
+    8cf0:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; xori r15, r16, 5 }
+    8cf8:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; ill }
+    8d00:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; mf }
+    8d08:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; shrsi r15, r16, 5 }
+    8d10:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; v1minu r15, r16, r17 }
+    8d18:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 }
+    8d20:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; dblalign6 r15, r16, r17 }
+    8d28:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; ldna r15, r16 }
+    8d30:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; prefetch_l3 r15 }
+    8d38:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; subxsc r15, r16, r17 }
+    8d40:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; v2cmpne r15, r16, r17 }
+    8d48:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+    8d50:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    8d58:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    8d60:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    8d68:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    8d70:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+    8d78:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    8d80:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; fetchor4 r15, r16, r17 }
+    8d88:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; ill ; st2 r25, r26 }
+    8d90:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+    8d98:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+    8da0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalrp r15 ; ld r25, r26 }
+    8da8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 }
+    8db0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 }
+    8db8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 }
+    8dc0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+    8dc8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 }
+    8dd0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; ld4s r25, r26 }
+    8dd8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 }
+    8de0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+    8de8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+    8df0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    8df8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; nop ; ld1s r25, r26 }
+    8e00:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    8e08:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    8e10:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    8e18:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    8e20:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    8e28:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+    8e30:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    8e38:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
+    8e40:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    8e48:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
+    8e50:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    8e58:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    8e60:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    8e68:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    8e70:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    8e78:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    8e80:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+    8e88:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+    8e90:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+    8e98:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+    8ea0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
+    8ea8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+    8eb0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+    8eb8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; v2mnz r15, r16, r17 }
+    8ec0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+    8ec8:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; finv r15 }
+    8ed0:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+    8ed8:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; shl3addx r15, r16, r17 }
+    8ee0:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; v1cmpne r15, r16, r17 }
+    8ee8:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; v2shl r15, r16, r17 }
+    8ef0:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; cmpltu r15, r16, r17 }
+    8ef8:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; ld4s r15, r16 }
+    8f00:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    8f08:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; stnt4 r15, r16 }
+    8f10:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+    8f18:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+    8f20:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+    8f28:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
+    8f30:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+    8f38:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+    8f40:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+    8f48:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    8f50:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+    8f58:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+    8f60:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+    8f68:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    8f70:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+    8f78:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    8f80:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
+    8f88:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    8f90:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    8f98:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+    8fa0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 }
+    8fa8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    8fb0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    8fb8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    8fc0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+    8fc8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+    8fd0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+    8fd8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    8fe0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    8fe8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    8ff0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    8ff8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+    9000:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
+    9008:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    9010:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    9018:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    9020:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    9028:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+    9030:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    9038:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    9040:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    9048:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    9050:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 }
+    9058:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
+    9060:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+    9068:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nop ; st2 r25, r26 }
+    9070:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalr r15 ; st4 r25, r26 }
+    9078:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+    9080:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; v1addi r15, r16, 5 }
+    9088:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; v2int_l r15, r16, r17 }
+    9090:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+    9098:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+    90a0:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; ldnt2s r15, r16 }
+    90a8:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; shl1add r15, r16, r17 }
+    90b0:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+    90b8:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; v2mnz r15, r16, r17 }
+    90c0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3 r25 }
+    90c8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    90d0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
+    90d8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
+    90e0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
+    90e8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+    90f0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpltui r15, r16, 5 }
+    90f8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ld2s r25, r26 }
+    9100:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; info 19 ; ld2u r25, r26 }
+    9108:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    9110:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+    9118:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld r25, r26 }
+    9120:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+    9128:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+    9130:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ld2s r15, r16 }
+    9138:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+    9140:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    9148:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; lnk r15 ; ld4s r25, r26 }
+    9150:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+    9158:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ldnt1s r15, r16 }
+    9160:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
+    9168:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    9170:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; nop ; prefetch r25 }
+    9178:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
+    9180:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+    9188:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ill ; prefetch r25 }
+    9190:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
+    9198:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; prefetch_l2 r15 }
+    91a0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l2 r25 }
+    91a8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+    91b0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
+    91b8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+    91c0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+    91c8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1_fault r25 }
+    91d0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    91d8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    91e0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; st r25, r26 }
+    91e8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+    91f0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
+    91f8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; ill ; st r25, r26 }
+    9200:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+    9208:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; st1_add r15, r16, 5 }
+    9210:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
+    9218:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 }
+    9220:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3 r25 }
+    9228:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; v1int_l r15, r16, r17 }
+    9230:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; v2shlsc r15, r16, r17 }
+    9238:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    9240:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
+    9248:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld1u r25, r26 }
+    9250:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
+    9258:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 }
+    9260:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+    9268:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    9270:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+    9278:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    9280:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
+    9288:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
+    9290:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; ld r25, r26 }
+    9298:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1s r25, r26 }
+    92a0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; ld1s r25, r26 }
+    92a8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    92b0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+    92b8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 ; ld2u r25, r26 }
+    92c0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+    92c8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 }
+    92d0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    92d8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    92e0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+    92e8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 }
+    92f0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 }
+    92f8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    9300:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    9308:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    9310:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
+    9318:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
+    9320:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jrp r15 ; prefetch_l2_fault r25 }
+    9328:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    9330:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
+    9338:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
+    9340:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
+    9348:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 }
+    9350:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
+    9358:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+    9360:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+    9368:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
+    9370:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 }
+    9378:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 }
+    9380:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 }
+    9388:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 }
+    9390:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
+    9398:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+    93a0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; v1adduc r15, r16, r17 }
+    93a8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; v2maxs r15, r16, r17 }
+    93b0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
+    93b8:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; fetchand r15, r16, r17 }
+    93c0:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+    93c8:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; shl1addx r15, r16, r17 }
+    93d0:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; v1cmplts r15, r16, r17 }
+    93d8:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; v2mz r15, r16, r17 }
+    93e0:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; cmples r15, r16, r17 }
+    93e8:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; ld2s r15, r16 }
+    93f0:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    93f8:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; stnt1 r15, r16 }
+    9400:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; v2addsc r15, r16, r17 }
+    9408:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; v4subsc r15, r16, r17 }
+    9410:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; flushwb }
+    9418:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+    9420:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; shlx r15, r16, r17 }
+    9428:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; v1int_l r15, r16, r17 }
+    9430:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; v2shlsc r15, r16, r17 }
+    9438:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
+    9440:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+    9448:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
+    9450:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+    9458:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
+    9460:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    9468:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+    9470:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 }
+    9478:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
+    9480:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+    9488:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
+    9490:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
+    9498:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+    94a0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ill ; ld1u r25, r26 }
+    94a8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+    94b0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ld2s r25, r26 }
+    94b8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    94c0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld4s r25, r26 }
+    94c8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jr r15 ; ld4u r25, r26 }
+    94d0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+    94d8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
+    94e0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; movei r15, 5 ; st1 r25, r26 }
+    94e8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; nop ; st1 r25, r26 }
+    94f0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
+    94f8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+    9500:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    9508:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 }
+    9510:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 }
+    9518:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 }
+    9520:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+    9528:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
+    9530:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
+    9538:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+    9540:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+    9548:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
+    9550:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 }
+    9558:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    9560:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+    9568:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
+    9570:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st r25, r26 }
+    9578:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; st1 r25, r26 }
+    9580:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 }
+    9588:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st2 r25, r26 }
+    9590:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; st4 r25, r26 }
+    9598:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
+    95a0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; v1shl r15, r16, r17 }
+    95a8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; v4add r15, r16, r17 }
+    95b0:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; andi r15, r16, 5 }
+    95b8:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; ld r15, r16 }
+    95c0:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; nor r15, r16, r17 }
+    95c8:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; st2_add r15, r16, 5 }
+    95d0:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; v1shrui r15, r16, 5 }
+    95d8:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; v4shl r15, r16, r17 }
+    95e0:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    95e8:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; ldnt2u r15, r16 }
+    95f0:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; shl2add r15, r16, r17 }
+    95f8:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+    9600:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; v2packh r15, r16, r17 }
+    9608:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
+    9610:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
+    9618:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
+    9620:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+    9628:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    9630:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld r25, r26 }
+    9638:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+    9640:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+    9648:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; info 19 ; ld4u r25, r26 }
+    9650:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
+    9658:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    9660:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; ld r25, r26 }
+    9668:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jr r15 ; ld1s r25, r26 }
+    9670:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+    9678:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 }
+    9680:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2s r25, r26 }
+    9688:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
+    9690:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; move r15, r16 ; ld4s r25, r26 }
+    9698:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; ld4u r25, r26 }
+    96a0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; ldnt1u r15, r16 }
+    96a8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    96b0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 }
+    96b8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 }
+    96c0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
+    96c8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    96d0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    96d8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
+    96e0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2 r25 }
+    96e8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+    96f0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    96f8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    9700:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    9708:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+    9710:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+    9718:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
+    9720:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st r25, r26 }
+    9728:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
+    9730:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+    9738:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 }
+    9740:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jalr r15 ; st r25, r26 }
+    9748:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    9750:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
+    9758:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+    9760:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
+    9768:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
+    9770:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; v1maxui r15, r16, 5 }
+    9778:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; v2shrsi r15, r16, 5 }
+    9780:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; addx r15, r16, r17 }
+    9788:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; iret }
+    9790:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; movei r15, 5 }
+    9798:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; shruxi r15, r16, 5 }
+    97a0:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; v1shl r15, r16, r17 }
+    97a8:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 }
+    97b0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    97b8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    97c0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    97c8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    97d0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
+    97d8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    97e0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+    97e8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; st4 r25, r26 }
+    97f0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; info 19 }
+    97f8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
+    9800:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; ld r15, r16 }
+    9808:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; ld r25, r26 }
+    9810:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    9818:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld1u r25, r26 }
+    9820:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; ld2s r25, r26 }
+    9828:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+    9830:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 }
+    9838:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    9840:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; nop ; ld4u r25, r26 }
+    9848:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
+    9850:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
+    9858:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 }
+    9860:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    9868:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    9870:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    9878:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+    9880:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
+    9888:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
+    9890:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
+    9898:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    98a0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    98a8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l3_fault r25 }
+    98b0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
+    98b8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+    98c0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
+    98c8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+    98d0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+    98d8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    98e0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
+    98e8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+    98f0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+    98f8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+    9900:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    9908:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 }
+    9910:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    9918:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; v1subuc r15, r16, r17 }
+    9920:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; v4shrs r15, r16, r17 }
+    9928:	[0-9a-f]* 	{ mulax r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+    9930:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+    9938:	[0-9a-f]* 	{ mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
+    9940:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpeq r15, r16, r17 }
+    9948:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmples r15, r16, r17 }
+    9950:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+    9958:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
+    9960:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ld4u r25, r26 }
+    9968:	[0-9a-f]* 	{ mulax r5, r6, r7 ; info 19 ; prefetch r25 }
+    9970:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+    9978:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    9980:	[0-9a-f]* 	{ mulax r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+    9988:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jrp r15 ; ld1s r25, r26 }
+    9990:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1u r25, r26 }
+    9998:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    99a0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld2s r25, r26 }
+    99a8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    99b0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; movei r15, 5 ; ld4s r25, r26 }
+    99b8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ill ; ld4u r25, r26 }
+    99c0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+    99c8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    99d0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    99d8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; nop ; prefetch_l2_fault r25 }
+    99e0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
+    99e8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    99f0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    99f8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
+    9a00:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 }
+    9a08:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+    9a10:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    9a18:	[0-9a-f]* 	{ mulax r5, r6, r7 ; nop ; prefetch_l3 r25 }
+    9a20:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
+    9a28:	[0-9a-f]* 	{ mulax r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    9a30:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 }
+    9a38:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    9a40:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+    9a48:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
+    9a50:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 }
+    9a58:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
+    9a60:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; st r25, r26 }
+    9a68:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+    9a70:	[0-9a-f]* 	{ mulax r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    9a78:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
+    9a80:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+    9a88:	[0-9a-f]* 	{ mulax r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
+    9a90:	[0-9a-f]* 	{ mulax r5, r6, r7 ; v1minu r15, r16, r17 }
+    9a98:	[0-9a-f]* 	{ mulax r5, r6, r7 ; v2shru r15, r16, r17 }
+    9aa0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+    9aa8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+    9ab0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    9ab8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    9ac0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    9ac8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
+    9ad0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+    9ad8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; fetchor r15, r16, r17 }
+    9ae0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; ill ; st1 r25, r26 }
+    9ae8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jalr r15 ; st r25, r26 }
+    9af0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+    9af8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jalr r15 ; ld r25, r26 }
+    9b00:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
+    9b08:	[0-9a-f]* 	{ mulx r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+    9b10:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+    9b18:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    9b20:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+    9b28:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
+    9b30:	[0-9a-f]* 	{ mulx r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    9b38:	[0-9a-f]* 	{ mulx r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
+    9b40:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mf }
+    9b48:	[0-9a-f]* 	{ mulx r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
+    9b50:	[0-9a-f]* 	{ mulx r5, r6, r7 ; nop ; ld r25, r26 }
+    9b58:	[0-9a-f]* 	{ mulx r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 }
+    9b60:	[0-9a-f]* 	{ mulx r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    9b68:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 }
+    9b70:	[0-9a-f]* 	{ mulx r5, r6, r7 ; prefetch_l1_fault r15 }
+    9b78:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 }
+    9b80:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+    9b88:	[0-9a-f]* 	{ mulx r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
+    9b90:	[0-9a-f]* 	{ mulx r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    9b98:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    9ba0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; raise }
+    9ba8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    9bb0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    9bb8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    9bc0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    9bc8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    9bd0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+    9bd8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpeqi r15, r16, 5 ; st r25, r26 }
+    9be0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; st1 r15, r16 }
+    9be8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    9bf0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    9bf8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    9c00:	[0-9a-f]* 	{ mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
+    9c08:	[0-9a-f]* 	{ mulx r5, r6, r7 ; v1cmples r15, r16, r17 }
+    9c10:	[0-9a-f]* 	{ mulx r5, r6, r7 ; v2minsi r15, r16, 5 }
+    9c18:	[0-9a-f]* 	{ mulx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    9c20:	[0-9a-f]* 	{ mz r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    9c28:	[0-9a-f]* 	{ mz r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
+    9c30:	[0-9a-f]* 	{ mz r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 }
+    9c38:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; mz r15, r16, r17 ; st r25, r26 }
+    9c40:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpeq r5, r6, r7 ; st2 r25, r26 }
+    9c48:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmples r5, r6, r7 }
+    9c50:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+    9c58:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1u r25, r26 }
+    9c60:	[0-9a-f]* 	{ ctz r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+    9c68:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; ld r25, r26 }
+    9c70:	[0-9a-f]* 	{ mz r15, r16, r17 ; infol 4660 }
+    9c78:	[0-9a-f]* 	{ revbits r5, r6 ; mz r15, r16, r17 ; ld r25, r26 }
+    9c80:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    9c88:	[0-9a-f]* 	{ mz r15, r16, r17 ; subx r5, r6, r7 ; ld1s r25, r26 }
+    9c90:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
+    9c98:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+    9ca0:	[0-9a-f]* 	{ mz r15, r16, r17 ; shli r5, r6, 5 ; ld2s r25, r26 }
+    9ca8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld2u r25, r26 }
+    9cb0:	[0-9a-f]* 	{ mz r15, r16, r17 ; and r5, r6, r7 ; ld4s r25, r26 }
+    9cb8:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl1add r5, r6, r7 ; ld4s r25, r26 }
+    9cc0:	[0-9a-f]* 	{ mz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+    9cc8:	[0-9a-f]* 	{ mz r15, r16, r17 ; xor r5, r6, r7 ; ld4u r25, r26 }
+    9cd0:	[0-9a-f]* 	{ mz r15, r16, r17 ; move r5, r6 }
+    9cd8:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; mz r15, r16, r17 }
+    9ce0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 }
+    9ce8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+    9cf0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st r25, r26 }
+    9cf8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+    9d00:	[0-9a-f]* 	{ mz r15, r16, r17 ; mz r5, r6, r7 ; st4 r25, r26 }
+    9d08:	[0-9a-f]* 	{ mz r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+    9d10:	[0-9a-f]* 	{ mz r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
+    9d18:	[0-9a-f]* 	{ mz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 }
+    9d20:	[0-9a-f]* 	{ mz r15, r16, r17 ; prefetch r25 }
+    9d28:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    9d30:	[0-9a-f]* 	{ mz r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
+    9d38:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l2 r25 }
+    9d40:	[0-9a-f]* 	{ mz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l2 r25 }
+    9d48:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    9d50:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    9d58:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3 r25 }
+    9d60:	[0-9a-f]* 	{ mz r15, r16, r17 ; movei r5, 5 ; prefetch_l3_fault r25 }
+    9d68:	[0-9a-f]* 	{ revbits r5, r6 ; mz r15, r16, r17 ; ld r25, r26 }
+    9d70:	[0-9a-f]* 	{ mz r15, r16, r17 ; rotl r5, r6, r7 ; ld1u r25, r26 }
+    9d78:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
+    9d80:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+    9d88:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    9d90:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    9d98:	[0-9a-f]* 	{ mz r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1_fault r25 }
+    9da0:	[0-9a-f]* 	{ mz r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2_fault r25 }
+    9da8:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpeqi r5, r6, 5 ; st r25, r26 }
+    9db0:	[0-9a-f]* 	{ mz r15, r16, r17 ; shli r5, r6, 5 ; st r25, r26 }
+    9db8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+    9dc0:	[0-9a-f]* 	{ mz r15, r16, r17 ; and r5, r6, r7 ; st2 r25, r26 }
+    9dc8:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl1add r5, r6, r7 ; st2 r25, r26 }
+    9dd0:	[0-9a-f]* 	{ mz r15, r16, r17 ; mnz r5, r6, r7 ; st4 r25, r26 }
+    9dd8:	[0-9a-f]* 	{ mz r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 }
+    9de0:	[0-9a-f]* 	{ mz r15, r16, r17 ; subxsc r5, r6, r7 }
+    9de8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; ld1s r25, r26 }
+    9df0:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; mz r15, r16, r17 }
+    9df8:	[0-9a-f]* 	{ mz r15, r16, r17 ; v1sub r5, r6, r7 }
+    9e00:	[0-9a-f]* 	{ mz r15, r16, r17 ; v2shrsi r5, r6, 5 }
+    9e08:	[0-9a-f]* 	{ mz r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+    9e10:	[0-9a-f]* 	{ mz r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+    9e18:	[0-9a-f]* 	{ mz r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    9e20:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    9e28:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    9e30:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
+    9e38:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+    9e40:	[0-9a-f]* 	{ mz r5, r6, r7 ; fetchor r15, r16, r17 }
+    9e48:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; st1 r25, r26 }
+    9e50:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalr r15 ; st r25, r26 }
+    9e58:	[0-9a-f]* 	{ mz r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+    9e60:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalr r15 ; ld r25, r26 }
+    9e68:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
+    9e70:	[0-9a-f]* 	{ mz r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+    9e78:	[0-9a-f]* 	{ mz r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+    9e80:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    9e88:	[0-9a-f]* 	{ mz r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+    9e90:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpne r15, r16, r17 ; ld4s r25, r26 }
+    9e98:	[0-9a-f]* 	{ mz r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+    9ea0:	[0-9a-f]* 	{ mz r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
+    9ea8:	[0-9a-f]* 	{ mz r5, r6, r7 ; mf }
+    9eb0:	[0-9a-f]* 	{ mz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
+    9eb8:	[0-9a-f]* 	{ mz r5, r6, r7 ; nop ; ld r25, r26 }
+    9ec0:	[0-9a-f]* 	{ mz r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 }
+    9ec8:	[0-9a-f]* 	{ mz r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    9ed0:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 }
+    9ed8:	[0-9a-f]* 	{ mz r5, r6, r7 ; prefetch_l1_fault r15 }
+    9ee0:	[0-9a-f]* 	{ mz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 }
+    9ee8:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+    9ef0:	[0-9a-f]* 	{ mz r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
+    9ef8:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    9f00:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    9f08:	[0-9a-f]* 	{ mz r5, r6, r7 ; raise }
+    9f10:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    9f18:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    9f20:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    9f28:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    9f30:	[0-9a-f]* 	{ mz r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    9f38:	[0-9a-f]* 	{ mz r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+    9f40:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpeqi r15, r16, 5 ; st r25, r26 }
+    9f48:	[0-9a-f]* 	{ mz r5, r6, r7 ; st1 r15, r16 }
+    9f50:	[0-9a-f]* 	{ mz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    9f58:	[0-9a-f]* 	{ mz r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    9f60:	[0-9a-f]* 	{ mz r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+    9f68:	[0-9a-f]* 	{ mz r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
+    9f70:	[0-9a-f]* 	{ mz r5, r6, r7 ; v1cmples r15, r16, r17 }
+    9f78:	[0-9a-f]* 	{ mz r5, r6, r7 ; v2minsi r15, r16, 5 }
+    9f80:	[0-9a-f]* 	{ mz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    9f88:	[0-9a-f]* 	{ nop ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+    9f90:	[0-9a-f]* 	{ nop ; addi r5, r6, 5 ; st1 r25, r26 }
+    9f98:	[0-9a-f]* 	{ nop ; addx r5, r6, r7 ; st1 r25, r26 }
+    9fa0:	[0-9a-f]* 	{ nop ; addxi r5, r6, 5 ; st4 r25, r26 }
+    9fa8:	[0-9a-f]* 	{ nop ; and r5, r6, r7 ; st1 r25, r26 }
+    9fb0:	[0-9a-f]* 	{ nop ; andi r5, r6, 5 ; st4 r25, r26 }
+    9fb8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; nop ; st1 r25, r26 }
+    9fc0:	[0-9a-f]* 	{ nop ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+    9fc8:	[0-9a-f]* 	{ nop ; cmpeqi r5, r6, 5 ; ld r25, r26 }
+    9fd0:	[0-9a-f]* 	{ nop ; cmples r5, r6, r7 ; ld r25, r26 }
+    9fd8:	[0-9a-f]* 	{ nop ; cmpleu r5, r6, r7 ; ld1u r25, r26 }
+    9fe0:	[0-9a-f]* 	{ nop ; cmplts r5, r6, r7 ; ld2u r25, r26 }
+    9fe8:	[0-9a-f]* 	{ nop ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
+    9ff0:	[0-9a-f]* 	{ nop ; cmpltu r5, r6, r7 ; prefetch r25 }
+    9ff8:	[0-9a-f]* 	{ nop ; cmpne r5, r6, r7 ; prefetch r25 }
+    a000:	[0-9a-f]* 	{ nop ; dblalign2 r15, r16, r17 }
+    a008:	[0-9a-f]* 	{ nop ; prefetch_l2_fault r25 }
+    a010:	[0-9a-f]* 	{ nop ; ill ; ld4u r25, r26 }
+    a018:	[0-9a-f]* 	{ nop ; jalr r15 ; ld4s r25, r26 }
+    a020:	[0-9a-f]* 	{ nop ; jr r15 ; prefetch r25 }
+    a028:	[0-9a-f]* 	{ nop ; and r15, r16, r17 ; ld r25, r26 }
+    a030:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; nop ; ld r25, r26 }
+    a038:	[0-9a-f]* 	{ nop ; shrs r5, r6, r7 ; ld r25, r26 }
+    a040:	[0-9a-f]* 	{ nop ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
+    a048:	[0-9a-f]* 	{ nop ; nor r5, r6, r7 ; ld1s r25, r26 }
+    a050:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop ; ld1s r25, r26 }
+    a058:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nop ; ld1u r25, r26 }
+    a060:	[0-9a-f]* 	{ nop ; shl1add r15, r16, r17 ; ld1u r25, r26 }
+    a068:	[0-9a-f]* 	{ nop ; addx r5, r6, r7 ; ld2s r25, r26 }
+    a070:	[0-9a-f]* 	{ nop ; movei r15, 5 ; ld2s r25, r26 }
+    a078:	[0-9a-f]* 	{ nop ; shli r15, r16, 5 ; ld2s r25, r26 }
+    a080:	[0-9a-f]* 	{ nop ; cmpeqi r15, r16, 5 ; ld2u r25, r26 }
+    a088:	[0-9a-f]* 	{ nop ; mz r15, r16, r17 ; ld2u r25, r26 }
+    a090:	[0-9a-f]* 	{ nop ; subx r15, r16, r17 ; ld2u r25, r26 }
+    a098:	[0-9a-f]* 	{ nop ; cmpne r15, r16, r17 ; ld4s r25, r26 }
+    a0a0:	[0-9a-f]* 	{ nop ; rotli r15, r16, 5 ; ld4s r25, r26 }
+    a0a8:	[0-9a-f]* 	{ nop ; add r5, r6, r7 ; ld4u r25, r26 }
+    a0b0:	[0-9a-f]* 	{ nop ; mnz r15, r16, r17 ; ld4u r25, r26 }
+    a0b8:	[0-9a-f]* 	{ nop ; shl3add r15, r16, r17 ; ld4u r25, r26 }
+    a0c0:	[0-9a-f]* 	{ nop ; ldnt4u r15, r16 }
+    a0c8:	[0-9a-f]* 	{ nop ; mnz r15, r16, r17 ; st1 r25, r26 }
+    a0d0:	[0-9a-f]* 	{ nop ; move r15, r16 ; st4 r25, r26 }
+    a0d8:	[0-9a-f]* 	{ nop ; movei r5, 5 ; ld r25, r26 }
+    a0e0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; nop }
+    a0e8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nop ; st1 r25, r26 }
+    a0f0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; nop ; st2 r25, r26 }
+    a0f8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; nop ; prefetch_l3_fault r25 }
+    a100:	[0-9a-f]* 	{ mulax r5, r6, r7 ; nop ; st r25, r26 }
+    a108:	[0-9a-f]* 	{ nop ; mz r15, r16, r17 ; st2 r25, r26 }
+    a110:	[0-9a-f]* 	{ nop ; nop ; st4 r25, r26 }
+    a118:	[0-9a-f]* 	{ nop ; or r15, r16, r17 ; ld r25, r26 }
+    a120:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; ld r25, r26 }
+    a128:	[0-9a-f]* 	{ nop ; cmples r5, r6, r7 ; prefetch r25 }
+    a130:	[0-9a-f]* 	{ nop ; nor r15, r16, r17 ; prefetch r25 }
+    a138:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nop ; prefetch r25 }
+    a140:	[0-9a-f]* 	{ nop ; cmpltu r15, r16, r17 ; prefetch r25 }
+    a148:	[0-9a-f]* 	{ nop ; rotl r15, r16, r17 ; prefetch r25 }
+    a150:	[0-9a-f]* 	{ nop ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    a158:	[0-9a-f]* 	{ nop ; lnk r15 ; prefetch_l1_fault r25 }
+    a160:	[0-9a-f]* 	{ nop ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    a168:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; nop ; prefetch_l2 r25 }
+    a170:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 }
+    a178:	[0-9a-f]* 	{ nop ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+    a180:	[0-9a-f]* 	{ nop ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 }
+    a188:	[0-9a-f]* 	{ revbytes r5, r6 ; nop ; prefetch_l2_fault r25 }
+    a190:	[0-9a-f]* 	{ nop ; prefetch_l3 r15 }
+    a198:	[0-9a-f]* 	{ nop ; jrp r15 ; prefetch_l3 r25 }
+    a1a0:	[0-9a-f]* 	{ nop ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    a1a8:	[0-9a-f]* 	{ clz r5, r6 ; nop ; prefetch_l3_fault r25 }
+    a1b0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; nop ; prefetch_l3_fault r25 }
+    a1b8:	[0-9a-f]* 	{ nop ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+    a1c0:	[0-9a-f]* 	{ revbytes r5, r6 ; nop ; ld4u r25, r26 }
+    a1c8:	[0-9a-f]* 	{ nop ; rotl r5, r6, r7 ; prefetch r25 }
+    a1d0:	[0-9a-f]* 	{ nop ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+    a1d8:	[0-9a-f]* 	{ nop ; shl r5, r6, r7 ; prefetch_l3 r25 }
+    a1e0:	[0-9a-f]* 	{ nop ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    a1e8:	[0-9a-f]* 	{ nop ; shl1addx r5, r6, r7 ; st r25, r26 }
+    a1f0:	[0-9a-f]* 	{ nop ; shl2add r5, r6, r7 ; st2 r25, r26 }
+    a1f8:	[0-9a-f]* 	{ nop ; shl2addx r5, r6, r7 }
+    a200:	[0-9a-f]* 	{ nop ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+    a208:	[0-9a-f]* 	{ nop ; shli r15, r16, 5 ; ld2s r25, r26 }
+    a210:	[0-9a-f]* 	{ nop ; shrs r15, r16, r17 ; ld1s r25, r26 }
+    a218:	[0-9a-f]* 	{ nop ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+    a220:	[0-9a-f]* 	{ nop ; shru r15, r16, r17 ; ld4s r25, r26 }
+    a228:	[0-9a-f]* 	{ nop ; shrui r15, r16, 5 ; prefetch r25 }
+    a230:	[0-9a-f]* 	{ nop ; addi r5, r6, 5 ; st r25, r26 }
+    a238:	[0-9a-f]* 	{ nop ; move r15, r16 ; st r25, r26 }
+    a240:	[0-9a-f]* 	{ nop ; shl3addx r15, r16, r17 ; st r25, r26 }
+    a248:	[0-9a-f]* 	{ nop ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+    a250:	[0-9a-f]* 	{ mulx r5, r6, r7 ; nop ; st1 r25, r26 }
+    a258:	[0-9a-f]* 	{ nop ; sub r5, r6, r7 ; st1 r25, r26 }
+    a260:	[0-9a-f]* 	{ nop ; cmpltu r5, r6, r7 ; st2 r25, r26 }
+    a268:	[0-9a-f]* 	{ nop ; rotl r5, r6, r7 ; st2 r25, r26 }
+    a270:	[0-9a-f]* 	{ nop ; add r15, r16, r17 ; st4 r25, r26 }
+    a278:	[0-9a-f]* 	{ nop ; lnk r15 ; st4 r25, r26 }
+    a280:	[0-9a-f]* 	{ nop ; shl2addx r5, r6, r7 ; st4 r25, r26 }
+    a288:	[0-9a-f]* 	{ nop ; sub r15, r16, r17 ; ld2u r25, r26 }
+    a290:	[0-9a-f]* 	{ nop ; subx r15, r16, r17 ; ld4u r25, r26 }
+    a298:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nop ; ld1u r25, r26 }
+    a2a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop ; ld2u r25, r26 }
+    a2a8:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; nop }
+    a2b0:	[0-9a-f]* 	{ nop ; v1minui r15, r16, 5 }
+    a2b8:	[0-9a-f]* 	{ nop ; v2cmples r5, r6, r7 }
+    a2c0:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; nop }
+    a2c8:	[0-9a-f]* 	{ nop ; v4sub r15, r16, r17 }
+    a2d0:	[0-9a-f]* 	{ nop ; xor r5, r6, r7 ; st2 r25, r26 }
+    a2d8:	[0-9a-f]* 	{ nor r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
+    a2e0:	[0-9a-f]* 	{ nor r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
+    a2e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
+    a2f0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 }
+    a2f8:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpeq r5, r6, r7 }
+    a300:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+    a308:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
+    a310:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+    a318:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+    a320:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    a328:	[0-9a-f]* 	{ nor r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 }
+    a330:	[0-9a-f]* 	{ nor r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    a338:	[0-9a-f]* 	{ nor r15, r16, r17 ; ld1s r25, r26 }
+    a340:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 }
+    a348:	[0-9a-f]* 	{ nor r15, r16, r17 ; nop ; ld1u r25, r26 }
+    a350:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+    a358:	[0-9a-f]* 	{ nor r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
+    a360:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 }
+    a368:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 }
+    a370:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
+    a378:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
+    a380:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; nor r15, r16, r17 }
+    a388:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
+    a390:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; nor r15, r16, r17 }
+    a398:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 }
+    a3a0:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; nor r15, r16, r17 }
+    a3a8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st2 r25, r26 }
+    a3b0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+    a3b8:	[0-9a-f]* 	{ nor r15, r16, r17 ; nop ; ld r25, r26 }
+    a3c0:	[0-9a-f]* 	{ nor r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
+    a3c8:	[0-9a-f]* 	{ nor r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
+    a3d0:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+    a3d8:	[0-9a-f]* 	{ nor r15, r16, r17 ; info 19 ; prefetch r25 }
+    a3e0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    a3e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    a3f0:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+    a3f8:	[0-9a-f]* 	{ nor r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
+    a400:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2_fault r25 }
+    a408:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    a410:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    a418:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    a420:	[0-9a-f]* 	{ revbits r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    a428:	[0-9a-f]* 	{ nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
+    a430:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
+    a438:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    a440:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    a448:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    a450:	[0-9a-f]* 	{ nor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
+    a458:	[0-9a-f]* 	{ nor r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+    a460:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
+    a468:	[0-9a-f]* 	{ nor r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
+    a470:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; st1 r25, r26 }
+    a478:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+    a480:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+    a488:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 }
+    a490:	[0-9a-f]* 	{ nor r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    a498:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 }
+    a4a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; ld2s r25, r26 }
+    a4a8:	[0-9a-f]* 	{ nor r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+    a4b0:	[0-9a-f]* 	{ nor r15, r16, r17 ; v2add r5, r6, r7 }
+    a4b8:	[0-9a-f]* 	{ nor r15, r16, r17 ; v2shrui r5, r6, 5 }
+    a4c0:	[0-9a-f]* 	{ nor r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    a4c8:	[0-9a-f]* 	{ nor r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    a4d0:	[0-9a-f]* 	{ nor r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    a4d8:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+    a4e0:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    a4e8:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    a4f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+    a4f8:	[0-9a-f]* 	{ nor r5, r6, r7 ; finv r15 }
+    a500:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; st4 r25, r26 }
+    a508:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    a510:	[0-9a-f]* 	{ nor r5, r6, r7 ; jr r15 }
+    a518:	[0-9a-f]* 	{ nor r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    a520:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+    a528:	[0-9a-f]* 	{ nor r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
+    a530:	[0-9a-f]* 	{ nor r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+    a538:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    a540:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
+    a548:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; ld4s r25, r26 }
+    a550:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    a558:	[0-9a-f]* 	{ nor r5, r6, r7 ; ld4u r25, r26 }
+    a560:	[0-9a-f]* 	{ nor r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    a568:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+    a570:	[0-9a-f]* 	{ nor r5, r6, r7 ; nop ; ld1u r25, r26 }
+    a578:	[0-9a-f]* 	{ nor r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+    a580:	[0-9a-f]* 	{ nor r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    a588:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    a590:	[0-9a-f]* 	{ nor r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+    a598:	[0-9a-f]* 	{ nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    a5a0:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    a5a8:	[0-9a-f]* 	{ nor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    a5b0:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    a5b8:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+    a5c0:	[0-9a-f]* 	{ nor r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    a5c8:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    a5d0:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    a5d8:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    a5e0:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    a5e8:	[0-9a-f]* 	{ nor r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    a5f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+    a5f8:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+    a600:	[0-9a-f]* 	{ nor r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
+    a608:	[0-9a-f]* 	{ nor r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+    a610:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+    a618:	[0-9a-f]* 	{ nor r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    a620:	[0-9a-f]* 	{ nor r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    a628:	[0-9a-f]* 	{ nor r5, r6, r7 ; v1cmplts r15, r16, r17 }
+    a630:	[0-9a-f]* 	{ nor r5, r6, r7 ; v2mz r15, r16, r17 }
+    a638:	[0-9a-f]* 	{ nor r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+    a640:	[0-9a-f]* 	{ or r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
+    a648:	[0-9a-f]* 	{ or r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
+    a650:	[0-9a-f]* 	{ or r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
+    a658:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
+    a660:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpeq r5, r6, r7 }
+    a668:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+    a670:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
+    a678:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+    a680:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
+    a688:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld1u r25, r26 }
+    a690:	[0-9a-f]* 	{ or r15, r16, r17 ; addi r5, r6, 5 ; ld r25, r26 }
+    a698:	[0-9a-f]* 	{ or r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+    a6a0:	[0-9a-f]* 	{ or r15, r16, r17 ; ld1s r25, r26 }
+    a6a8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; or r15, r16, r17 ; ld1s r25, r26 }
+    a6b0:	[0-9a-f]* 	{ or r15, r16, r17 ; nop ; ld1u r25, r26 }
+    a6b8:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+    a6c0:	[0-9a-f]* 	{ or r15, r16, r17 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
+    a6c8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+    a6d0:	[0-9a-f]* 	{ clz r5, r6 ; or r15, r16, r17 ; ld4s r25, r26 }
+    a6d8:	[0-9a-f]* 	{ or r15, r16, r17 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
+    a6e0:	[0-9a-f]* 	{ or r15, r16, r17 ; movei r5, 5 ; ld4u r25, r26 }
+    a6e8:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; or r15, r16, r17 }
+    a6f0:	[0-9a-f]* 	{ or r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
+    a6f8:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; or r15, r16, r17 }
+    a700:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; or r15, r16, r17 }
+    a708:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; or r15, r16, r17 }
+    a710:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; st2 r25, r26 }
+    a718:	[0-9a-f]* 	{ mulax r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
+    a720:	[0-9a-f]* 	{ or r15, r16, r17 ; nop ; ld r25, r26 }
+    a728:	[0-9a-f]* 	{ or r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
+    a730:	[0-9a-f]* 	{ or r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 }
+    a738:	[0-9a-f]* 	{ or r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+    a740:	[0-9a-f]* 	{ or r15, r16, r17 ; info 19 ; prefetch r25 }
+    a748:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; or r15, r16, r17 ; prefetch r25 }
+    a750:	[0-9a-f]* 	{ or r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    a758:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+    a760:	[0-9a-f]* 	{ or r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
+    a768:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+    a770:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
+    a778:	[0-9a-f]* 	{ or r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    a780:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
+    a788:	[0-9a-f]* 	{ revbits r5, r6 ; or r15, r16, r17 ; ld1u r25, r26 }
+    a790:	[0-9a-f]* 	{ or r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
+    a798:	[0-9a-f]* 	{ or r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
+    a7a0:	[0-9a-f]* 	{ or r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    a7a8:	[0-9a-f]* 	{ or r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    a7b0:	[0-9a-f]* 	{ or r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    a7b8:	[0-9a-f]* 	{ or r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
+    a7c0:	[0-9a-f]* 	{ or r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+    a7c8:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
+    a7d0:	[0-9a-f]* 	{ or r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
+    a7d8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 }
+    a7e0:	[0-9a-f]* 	{ clz r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
+    a7e8:	[0-9a-f]* 	{ or r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+    a7f0:	[0-9a-f]* 	{ or r15, r16, r17 ; movei r5, 5 ; st4 r25, r26 }
+    a7f8:	[0-9a-f]* 	{ or r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+    a800:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; or r15, r16, r17 ; ld1s r25, r26 }
+    a808:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
+    a810:	[0-9a-f]* 	{ or r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+    a818:	[0-9a-f]* 	{ or r15, r16, r17 ; v2add r5, r6, r7 }
+    a820:	[0-9a-f]* 	{ or r15, r16, r17 ; v2shrui r5, r6, 5 }
+    a828:	[0-9a-f]* 	{ or r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+    a830:	[0-9a-f]* 	{ or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    a838:	[0-9a-f]* 	{ or r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    a840:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+    a848:	[0-9a-f]* 	{ or r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+    a850:	[0-9a-f]* 	{ or r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    a858:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+    a860:	[0-9a-f]* 	{ or r5, r6, r7 ; finv r15 }
+    a868:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; st4 r25, r26 }
+    a870:	[0-9a-f]* 	{ or r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    a878:	[0-9a-f]* 	{ or r5, r6, r7 ; jr r15 }
+    a880:	[0-9a-f]* 	{ or r5, r6, r7 ; jr r15 ; ld r25, r26 }
+    a888:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+    a890:	[0-9a-f]* 	{ or r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
+    a898:	[0-9a-f]* 	{ or r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+    a8a0:	[0-9a-f]* 	{ or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+    a8a8:	[0-9a-f]* 	{ or r5, r6, r7 ; movei r15, 5 ; ld2u r25, r26 }
+    a8b0:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; ld4s r25, r26 }
+    a8b8:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    a8c0:	[0-9a-f]* 	{ or r5, r6, r7 ; ld4u r25, r26 }
+    a8c8:	[0-9a-f]* 	{ or r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+    a8d0:	[0-9a-f]* 	{ or r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+    a8d8:	[0-9a-f]* 	{ or r5, r6, r7 ; nop ; ld1u r25, r26 }
+    a8e0:	[0-9a-f]* 	{ or r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+    a8e8:	[0-9a-f]* 	{ or r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    a8f0:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    a8f8:	[0-9a-f]* 	{ or r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+    a900:	[0-9a-f]* 	{ or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+    a908:	[0-9a-f]* 	{ or r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    a910:	[0-9a-f]* 	{ or r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    a918:	[0-9a-f]* 	{ or r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    a920:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+    a928:	[0-9a-f]* 	{ or r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    a930:	[0-9a-f]* 	{ or r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    a938:	[0-9a-f]* 	{ or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    a940:	[0-9a-f]* 	{ or r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    a948:	[0-9a-f]* 	{ or r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    a950:	[0-9a-f]* 	{ or r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    a958:	[0-9a-f]* 	{ or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+    a960:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+    a968:	[0-9a-f]* 	{ or r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
+    a970:	[0-9a-f]* 	{ or r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+    a978:	[0-9a-f]* 	{ or r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+    a980:	[0-9a-f]* 	{ or r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+    a988:	[0-9a-f]* 	{ or r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    a990:	[0-9a-f]* 	{ or r5, r6, r7 ; v1cmplts r15, r16, r17 }
+    a998:	[0-9a-f]* 	{ or r5, r6, r7 ; v2mz r15, r16, r17 }
+    a9a0:	[0-9a-f]* 	{ or r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+    a9a8:	[0-9a-f]* 	{ ori r15, r16, 5 ; dblalign2 r5, r6, r7 }
+    a9b0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ori r15, r16, 5 }
+    a9b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ori r15, r16, 5 }
+    a9c0:	[0-9a-f]* 	{ ori r15, r16, 5 ; v1shl r5, r6, r7 }
+    a9c8:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; ori r15, r16, 5 }
+    a9d0:	[0-9a-f]* 	{ ori r5, r6, 5 ; cmpltsi r15, r16, 5 }
+    a9d8:	[0-9a-f]* 	{ ori r5, r6, 5 ; ld2u_add r15, r16, 5 }
+    a9e0:	[0-9a-f]* 	{ ori r5, r6, 5 ; prefetch_add_l3 r15, 5 }
+    a9e8:	[0-9a-f]* 	{ ori r5, r6, 5 ; stnt2_add r15, r16, 5 }
+    a9f0:	[0-9a-f]* 	{ ori r5, r6, 5 ; v2cmples r15, r16, r17 }
+    a9f8:	[0-9a-f]* 	{ ori r5, r6, 5 ; xori r15, r16, 5 }
+    aa00:	[0-9a-f]* 	{ pcnt r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
+    aa08:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+    aa10:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+    aa18:	[0-9a-f]* 	{ pcnt r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+    aa20:	[0-9a-f]* 	{ pcnt r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+    aa28:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+    aa30:	[0-9a-f]* 	{ pcnt r5, r6 ; fetchadd4 r15, r16, r17 }
+    aa38:	[0-9a-f]* 	{ pcnt r5, r6 ; ill ; prefetch_l2 r25 }
+    aa40:	[0-9a-f]* 	{ pcnt r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
+    aa48:	[0-9a-f]* 	{ pcnt r5, r6 ; jr r15 ; prefetch_l2_fault r25 }
+    aa50:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+    aa58:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+    aa60:	[0-9a-f]* 	{ pcnt r5, r6 ; subx r15, r16, r17 ; ld1s r25, r26 }
+    aa68:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    aa70:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; ld2s r25, r26 }
+    aa78:	[0-9a-f]* 	{ pcnt r5, r6 ; jalr r15 ; ld2u r25, r26 }
+    aa80:	[0-9a-f]* 	{ pcnt r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    aa88:	[0-9a-f]* 	{ pcnt r5, r6 ; ld4u r15, r16 }
+    aa90:	[0-9a-f]* 	{ pcnt r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    aa98:	[0-9a-f]* 	{ pcnt r5, r6 ; lnk r15 ; st r25, r26 }
+    aaa0:	[0-9a-f]* 	{ pcnt r5, r6 ; move r15, r16 ; st r25, r26 }
+    aaa8:	[0-9a-f]* 	{ pcnt r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+    aab0:	[0-9a-f]* 	{ pcnt r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+    aab8:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; prefetch r25 }
+    aac0:	[0-9a-f]* 	{ pcnt r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
+    aac8:	[0-9a-f]* 	{ pcnt r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+    aad0:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
+    aad8:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; prefetch_l2 r25 }
+    aae0:	[0-9a-f]* 	{ pcnt r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+    aae8:	[0-9a-f]* 	{ pcnt r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
+    aaf0:	[0-9a-f]* 	{ pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    aaf8:	[0-9a-f]* 	{ pcnt r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+    ab00:	[0-9a-f]* 	{ pcnt r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    ab08:	[0-9a-f]* 	{ pcnt r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+    ab10:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2add r15, r16, r17 }
+    ab18:	[0-9a-f]* 	{ pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+    ab20:	[0-9a-f]* 	{ pcnt r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 }
+    ab28:	[0-9a-f]* 	{ pcnt r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
+    ab30:	[0-9a-f]* 	{ pcnt r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
+    ab38:	[0-9a-f]* 	{ pcnt r5, r6 ; shrui r15, r16, 5 ; st r25, r26 }
+    ab40:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 }
+    ab48:	[0-9a-f]* 	{ pcnt r5, r6 ; mz r15, r16, r17 ; st2 r25, r26 }
+    ab50:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; st4 r25, r26 }
+    ab58:	[0-9a-f]* 	{ pcnt r5, r6 ; stnt_add r15, r16, 5 }
+    ab60:	[0-9a-f]* 	{ pcnt r5, r6 ; v1add r15, r16, r17 }
+    ab68:	[0-9a-f]* 	{ pcnt r5, r6 ; v2int_h r15, r16, r17 }
+    ab70:	[0-9a-f]* 	{ pcnt r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    ab78:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; prefetch r15 }
+    ab80:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; prefetch r15 }
+    ab88:	[0-9a-f]* 	{ shrux r5, r6, r7 ; prefetch r15 }
+    ab90:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; prefetch r15 }
+    ab98:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; prefetch r15 }
+    aba0:	[0-9a-f]* 	{ add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    aba8:	[0-9a-f]* 	{ add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    abb0:	[0-9a-f]* 	{ add r5, r6, r7 ; nop ; prefetch r25 }
+    abb8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    abc0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    abc8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 }
+    abd0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    abd8:	[0-9a-f]* 	{ addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    abe0:	[0-9a-f]* 	{ addx r5, r6, r7 ; prefetch r25 }
+    abe8:	[0-9a-f]* 	{ revbits r5, r6 ; addxi r15, r16, 5 ; prefetch r25 }
+    abf0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; info 19 ; prefetch r25 }
+    abf8:	[0-9a-f]* 	{ and r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    ac00:	[0-9a-f]* 	{ and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    ac08:	[0-9a-f]* 	{ and r5, r6, r7 ; nop ; prefetch r25 }
+    ac10:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    ac18:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    ac20:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 }
+    ac28:	[0-9a-f]* 	{ clz r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
+    ac30:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    ac38:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; ill ; prefetch r25 }
+    ac40:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    ac48:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch r25 }
+    ac50:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    ac58:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; prefetch r25 }
+    ac60:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch r25 }
+    ac68:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    ac70:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    ac78:	[0-9a-f]* 	{ cmples r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    ac80:	[0-9a-f]* 	{ cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    ac88:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    ac90:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; ill ; prefetch r25 }
+    ac98:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    aca0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch r25 }
+    aca8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    acb0:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; prefetch r25 }
+    acb8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    acc0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    acc8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    acd0:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    acd8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    ace0:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 }
+    ace8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ill ; prefetch r25 }
+    acf0:	[0-9a-f]* 	{ ctz r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
+    acf8:	[0-9a-f]* 	{ add r5, r6, r7 ; prefetch r25 }
+    ad00:	[0-9a-f]* 	{ mnz r15, r16, r17 ; prefetch r25 }
+    ad08:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; prefetch r25 }
+    ad10:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; ill ; prefetch r25 }
+    ad18:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; ill ; prefetch r25 }
+    ad20:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; ill ; prefetch r25 }
+    ad28:	[0-9a-f]* 	{ info 19 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    ad30:	[0-9a-f]* 	{ revbits r5, r6 ; info 19 ; prefetch r25 }
+    ad38:	[0-9a-f]* 	{ info 19 ; prefetch r25 }
+    ad40:	[0-9a-f]* 	{ revbits r5, r6 ; jalr r15 ; prefetch r25 }
+    ad48:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    ad50:	[0-9a-f]* 	{ subx r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    ad58:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jr r15 ; prefetch r25 }
+    ad60:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; jrp r15 ; prefetch r25 }
+    ad68:	[0-9a-f]* 	{ shli r5, r6, 5 ; jrp r15 ; prefetch r25 }
+    ad70:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    ad78:	[0-9a-f]* 	{ mnz r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+    ad80:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
+    ad88:	[0-9a-f]* 	{ mnz r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    ad90:	[0-9a-f]* 	{ move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    ad98:	[0-9a-f]* 	{ move r15, r16 ; shrui r5, r6, 5 ; prefetch r25 }
+    ada0:	[0-9a-f]* 	{ move r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+    ada8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    adb0:	[0-9a-f]* 	{ movei r5, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    adb8:	[0-9a-f]* 	{ movei r5, 5 ; shru r15, r16, r17 ; prefetch r25 }
+    adc0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    adc8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    add0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    add8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
+    ade0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    ade8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; prefetch r25 }
+    adf0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    adf8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    ae00:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    ae08:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    ae10:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    ae18:	[0-9a-f]* 	{ mz r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+    ae20:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
+    ae28:	[0-9a-f]* 	{ mz r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    ae30:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nop ; prefetch r25 }
+    ae38:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; nop ; prefetch r25 }
+    ae40:	[0-9a-f]* 	{ nop ; shrui r5, r6, 5 ; prefetch r25 }
+    ae48:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    ae50:	[0-9a-f]* 	{ nor r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    ae58:	[0-9a-f]* 	{ nor r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    ae60:	[0-9a-f]* 	{ pcnt r5, r6 ; or r15, r16, r17 ; prefetch r25 }
+    ae68:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; prefetch r25 }
+    ae70:	[0-9a-f]* 	{ pcnt r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
+    ae78:	[0-9a-f]* 	{ revbits r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    ae80:	[0-9a-f]* 	{ revbits r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
+    ae88:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
+    ae90:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+    ae98:	[0-9a-f]* 	{ rotl r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    aea0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    aea8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
+    aeb0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; prefetch r25 }
+    aeb8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    aec0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    aec8:	[0-9a-f]* 	{ shl r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    aed0:	[0-9a-f]* 	{ ctz r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 }
+    aed8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 }
+    aee0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    aee8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    aef0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    aef8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    af00:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
+    af08:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; prefetch r25 }
+    af10:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    af18:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    af20:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    af28:	[0-9a-f]* 	{ ctz r5, r6 ; shl3add r15, r16, r17 ; prefetch r25 }
+    af30:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl3add r15, r16, r17 ; prefetch r25 }
+    af38:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    af40:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    af48:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    af50:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    af58:	[0-9a-f]* 	{ shli r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
+    af60:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch r25 }
+    af68:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+    af70:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    af78:	[0-9a-f]* 	{ shrs r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    af80:	[0-9a-f]* 	{ ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
+    af88:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
+    af90:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch r25 }
+    af98:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+    afa0:	[0-9a-f]* 	{ shru r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    afa8:	[0-9a-f]* 	{ shru r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+    afb0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; or r5, r6, r7 ; prefetch r25 }
+    afb8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; prefetch r25 }
+    afc0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    afc8:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+    afd0:	[0-9a-f]* 	{ sub r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    afd8:	[0-9a-f]* 	{ ctz r5, r6 ; subx r15, r16, r17 ; prefetch r25 }
+    afe0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; subx r15, r16, r17 ; prefetch r25 }
+    afe8:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    aff0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    aff8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jrp r15 ; prefetch r25 }
+    b000:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; prefetch r25 }
+    b008:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    b010:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; prefetch r25 }
+    b018:	[0-9a-f]* 	{ revbits r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    b020:	[0-9a-f]* 	{ xor r5, r6, r7 ; info 19 ; prefetch r25 }
+    b028:	[0-9a-f]* 	{ bfexts r5, r6, 5, 7 ; prefetch_add_l1 r15, 5 }
+    b030:	[0-9a-f]* 	{ fsingle_mul1 r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+    b038:	[0-9a-f]* 	{ revbits r5, r6 ; prefetch_add_l1 r15, 5 }
+    b040:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+    b048:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; prefetch_add_l1 r15, 5 }
+    b050:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+    b058:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    b060:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    b068:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    b070:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    b078:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    b080:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; prefetch_add_l2 r15, 5 }
+    b088:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; prefetch_add_l2 r15, 5 }
+    b090:	[0-9a-f]* 	{ rotl r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+    b098:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+    b0a0:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+    b0a8:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+    b0b0:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+    b0b8:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+    b0c0:	[0-9a-f]* 	{ subx r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+    b0c8:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+    b0d0:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+    b0d8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    b0e0:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    b0e8:	[0-9a-f]* 	{ shl r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    b0f0:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    b0f8:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; prefetch_add_l3 r15, 5 }
+    b100:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+    b108:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    b110:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    b118:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; prefetch_add_l3_fault r15, 5 }
+    b120:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    b128:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    b130:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; prefetch r15 }
+    b138:	[0-9a-f]* 	{ infol 4660 ; prefetch r15 }
+    b140:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; prefetch r15 }
+    b148:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; prefetch r15 }
+    b150:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; prefetch r15 }
+    b158:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; prefetch r15 }
+    b160:	[0-9a-f]* 	{ add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
+    b168:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
+    b170:	[0-9a-f]* 	{ clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    b178:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch r25 }
+    b180:	[0-9a-f]* 	{ addi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
+    b188:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+    b190:	[0-9a-f]* 	{ addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 }
+    b198:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    b1a0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    b1a8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch r25 }
+    b1b0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 }
+    b1b8:	[0-9a-f]* 	{ and r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
+    b1c0:	[0-9a-f]* 	{ and r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
+    b1c8:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    b1d0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch r25 }
+    b1d8:	[0-9a-f]* 	{ andi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
+    b1e0:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; prefetch r25 }
+    b1e8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    b1f0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    b1f8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
+    b200:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; nop ; prefetch r25 }
+    b208:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    b210:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    b218:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    b220:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+    b228:	[0-9a-f]* 	{ cmples r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 }
+    b230:	[0-9a-f]* 	{ cmples r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+    b238:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    b240:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch r25 }
+    b248:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    b250:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
+    b258:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; nop ; prefetch r25 }
+    b260:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    b268:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    b270:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    b278:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+    b280:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 }
+    b288:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+    b290:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    b298:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
+    b2a0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    b2a8:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
+    b2b0:	[0-9a-f]* 	{ ctz r5, r6 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    b2b8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; prefetch r25 }
+    b2c0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; prefetch r25 }
+    b2c8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
+    b2d0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+    b2d8:	[0-9a-f]* 	{ nop ; ill ; prefetch r25 }
+    b2e0:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; prefetch r25 }
+    b2e8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; info 19 ; prefetch r25 }
+    b2f0:	[0-9a-f]* 	{ info 19 ; shru r5, r6, r7 ; prefetch r25 }
+    b2f8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch r25 }
+    b300:	[0-9a-f]* 	{ addxi r5, r6, 5 ; jalrp r15 ; prefetch r25 }
+    b308:	[0-9a-f]* 	{ shl r5, r6, r7 ; jalrp r15 ; prefetch r25 }
+    b310:	[0-9a-f]* 	{ info 19 ; jr r15 ; prefetch r25 }
+    b318:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jr r15 ; prefetch r25 }
+    b320:	[0-9a-f]* 	{ or r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    b328:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; lnk r15 ; prefetch r25 }
+    b330:	[0-9a-f]* 	{ shrui r5, r6, 5 ; lnk r15 ; prefetch r25 }
+    b338:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    b340:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    b348:	[0-9a-f]* 	{ move r15, r16 ; addi r5, r6, 5 ; prefetch r25 }
+    b350:	[0-9a-f]* 	{ move r15, r16 ; rotl r5, r6, r7 ; prefetch r25 }
+    b358:	[0-9a-f]* 	{ move r5, r6 ; jalrp r15 ; prefetch r25 }
+    b360:	[0-9a-f]* 	{ movei r15, 5 ; cmples r5, r6, r7 ; prefetch r25 }
+    b368:	[0-9a-f]* 	{ movei r15, 5 ; shrs r5, r6, r7 ; prefetch r25 }
+    b370:	[0-9a-f]* 	{ movei r5, 5 ; or r15, r16, r17 ; prefetch r25 }
+    b378:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    b380:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; prefetch r25 }
+    b388:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch r25 }
+    b390:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+    b398:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 }
+    b3a0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    b3a8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; nop ; prefetch r25 }
+    b3b0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jr r15 ; prefetch r25 }
+    b3b8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    b3c0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    b3c8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    b3d0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    b3d8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    b3e0:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    b3e8:	[0-9a-f]* 	{ nop ; add r5, r6, r7 ; prefetch r25 }
+    b3f0:	[0-9a-f]* 	{ nop ; mnz r15, r16, r17 ; prefetch r25 }
+    b3f8:	[0-9a-f]* 	{ nop ; shl3add r15, r16, r17 ; prefetch r25 }
+    b400:	[0-9a-f]* 	{ nor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch r25 }
+    b408:	[0-9a-f]* 	{ nor r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+    b410:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    b418:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    b420:	[0-9a-f]* 	{ or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+    b428:	[0-9a-f]* 	{ or r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
+    b430:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    b438:	[0-9a-f]* 	{ revbits r5, r6 ; or r15, r16, r17 ; prefetch r25 }
+    b440:	[0-9a-f]* 	{ revbytes r5, r6 ; lnk r15 ; prefetch r25 }
+    b448:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    b450:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
+    b458:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    b460:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+    b468:	[0-9a-f]* 	{ rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    b470:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+    b478:	[0-9a-f]* 	{ shl r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    b480:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    b488:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+    b490:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
+    b498:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    b4a0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    b4a8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
+    b4b0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    b4b8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    b4c0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    b4c8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+    b4d0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    b4d8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    b4e0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+    b4e8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
+    b4f0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    b4f8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    b500:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
+    b508:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    b510:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    b518:	[0-9a-f]* 	{ shli r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    b520:	[0-9a-f]* 	{ shli r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+    b528:	[0-9a-f]* 	{ shrs r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    b530:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    b538:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; and r5, r6, r7 ; prefetch r25 }
+    b540:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch r25 }
+    b548:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; lnk r15 ; prefetch r25 }
+    b550:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+    b558:	[0-9a-f]* 	{ shru r15, r16, r17 ; shrui r5, r6, 5 ; prefetch r25 }
+    b560:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    b568:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch r25 }
+    b570:	[0-9a-f]* 	{ shrui r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    b578:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+    b580:	[0-9a-f]* 	{ sub r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    b588:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch r25 }
+    b590:	[0-9a-f]* 	{ subx r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+    b598:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch r25 }
+    b5a0:	[0-9a-f]* 	{ subx r5, r6, r7 ; lnk r15 ; prefetch r25 }
+    b5a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; prefetch r25 }
+    b5b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch r25 }
+    b5b8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; add r15, r16, r17 ; prefetch r25 }
+    b5c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
+    b5c8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    b5d0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    b5d8:	[0-9a-f]* 	{ xor r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 }
+    b5e0:	[0-9a-f]* 	{ xor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    b5e8:	[0-9a-f]* 	{ dblalign4 r5, r6, r7 ; prefetch_l1_fault r15 }
+    b5f0:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; prefetch_l1_fault r15 }
+    b5f8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; prefetch_l1_fault r15 }
+    b600:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; prefetch_l1_fault r15 }
+    b608:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; prefetch_l1_fault r15 }
+    b610:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b618:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b620:	[0-9a-f]* 	{ add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b628:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b630:	[0-9a-f]* 	{ addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
+    b638:	[0-9a-f]* 	{ addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b640:	[0-9a-f]* 	{ addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+    b648:	[0-9a-f]* 	{ addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b650:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b658:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b660:	[0-9a-f]* 	{ addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    b668:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
+    b670:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
+    b678:	[0-9a-f]* 	{ and r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b680:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b688:	[0-9a-f]* 	{ andi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l1_fault r25 }
+    b690:	[0-9a-f]* 	{ andi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b698:	[0-9a-f]* 	{ clz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b6a0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    b6a8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
+    b6b0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
+    b6b8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b6c0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b6c8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b6d0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b6d8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l1_fault r25 }
+    b6e0:	[0-9a-f]* 	{ cmples r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
+    b6e8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
+    b6f0:	[0-9a-f]* 	{ clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
+    b6f8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 }
+    b700:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
+    b708:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
+    b710:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b718:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b720:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b728:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b730:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l1_fault r25 }
+    b738:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
+    b740:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
+    b748:	[0-9a-f]* 	{ clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
+    b750:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 }
+    b758:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
+    b760:	[0-9a-f]* 	{ ctz r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+    b768:	[0-9a-f]* 	{ and r5, r6, r7 ; prefetch_l1_fault r25 }
+    b770:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 }
+    b778:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b780:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
+    b788:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; ill ; prefetch_l1_fault r25 }
+    b790:	[0-9a-f]* 	{ subx r5, r6, r7 ; ill ; prefetch_l1_fault r25 }
+    b798:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+    b7a0:	[0-9a-f]* 	{ info 19 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b7a8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jalr r15 ; prefetch_l1_fault r25 }
+    b7b0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jalr r15 ; prefetch_l1_fault r25 }
+    b7b8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l1_fault r25 }
+    b7c0:	[0-9a-f]* 	{ addi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 }
+    b7c8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
+    b7d0:	[0-9a-f]* 	{ jrp r15 ; prefetch_l1_fault r25 }
+    b7d8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jrp r15 ; prefetch_l1_fault r25 }
+    b7e0:	[0-9a-f]* 	{ nop ; lnk r15 ; prefetch_l1_fault r25 }
+    b7e8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 }
+    b7f0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 }
+    b7f8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+    b800:	[0-9a-f]* 	{ move r15, r16 ; move r5, r6 ; prefetch_l1_fault r25 }
+    b808:	[0-9a-f]* 	{ move r15, r16 ; prefetch_l1_fault r25 }
+    b810:	[0-9a-f]* 	{ move r5, r6 ; shrs r15, r16, r17 ; prefetch_l1_fault r25 }
+    b818:	[0-9a-f]* 	{ mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    b820:	[0-9a-f]* 	{ movei r5, 5 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
+    b828:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b830:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
+    b838:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b840:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+    b848:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; lnk r15 ; prefetch_l1_fault r25 }
+    b850:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 }
+    b858:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b860:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b868:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b870:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b878:	[0-9a-f]* 	{ mulax r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
+    b880:	[0-9a-f]* 	{ mulx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
+    b888:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 }
+    b890:	[0-9a-f]* 	{ mz r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 }
+    b898:	[0-9a-f]* 	{ mz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+    b8a0:	[0-9a-f]* 	{ nop ; cmpleu r5, r6, r7 ; prefetch_l1_fault r25 }
+    b8a8:	[0-9a-f]* 	{ nop ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+    b8b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; nop ; prefetch_l1_fault r25 }
+    b8b8:	[0-9a-f]* 	{ nor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
+    b8c0:	[0-9a-f]* 	{ nor r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
+    b8c8:	[0-9a-f]* 	{ clz r5, r6 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+    b8d0:	[0-9a-f]* 	{ or r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l1_fault r25 }
+    b8d8:	[0-9a-f]* 	{ or r5, r6, r7 ; move r15, r16 ; prefetch_l1_fault r25 }
+    b8e0:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+    b8e8:	[0-9a-f]* 	{ revbits r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l1_fault r25 }
+    b8f0:	[0-9a-f]* 	{ revbytes r5, r6 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b8f8:	[0-9a-f]* 	{ revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
+    b900:	[0-9a-f]* 	{ rotl r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
+    b908:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    b910:	[0-9a-f]* 	{ rotli r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
+    b918:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b920:	[0-9a-f]* 	{ rotli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    b928:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    b930:	[0-9a-f]* 	{ shl r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
+    b938:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b940:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b948:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b950:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
+    b958:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
+    b960:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    b968:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
+    b970:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b978:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    b980:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    b988:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
+    b990:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b998:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b9a0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    b9a8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
+    b9b0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
+    b9b8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    b9c0:	[0-9a-f]* 	{ shli r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
+    b9c8:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    b9d0:	[0-9a-f]* 	{ shli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    b9d8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    b9e0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
+    b9e8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    b9f0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+    b9f8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba00:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
+    ba08:	[0-9a-f]* 	{ shru r15, r16, r17 ; nop ; prefetch_l1_fault r25 }
+    ba10:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba18:	[0-9a-f]* 	{ shrui r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1_fault r25 }
+    ba20:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    ba28:	[0-9a-f]* 	{ shrui r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba30:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    ba38:	[0-9a-f]* 	{ sub r15, r16, r17 ; sub r5, r6, r7 ; prefetch_l1_fault r25 }
+    ba40:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba48:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba50:	[0-9a-f]* 	{ subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba58:	[0-9a-f]* 	{ subx r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l1_fault r25 }
+    ba60:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba68:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba70:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; lnk r15 ; prefetch_l1_fault r25 }
+    ba78:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; prefetch_l1_fault r25 }
+    ba80:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+    ba88:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+    ba90:	[0-9a-f]* 	{ xor r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
+    ba98:	[0-9a-f]* 	{ cmples r5, r6, r7 ; prefetch_l2 r15 }
+    baa0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; prefetch_l2 r15 }
+    baa8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; prefetch_l2 r15 }
+    bab0:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; prefetch_l2 r15 }
+    bab8:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; prefetch_l2 r15 }
+    bac0:	[0-9a-f]* 	{ xor r5, r6, r7 ; prefetch_l2 r15 }
+    bac8:	[0-9a-f]* 	{ pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 }
+    bad0:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; prefetch_l2 r25 }
+    bad8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2 r25 }
+    bae0:	[0-9a-f]* 	{ addi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
+    bae8:	[0-9a-f]* 	{ addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    baf0:	[0-9a-f]* 	{ addx r15, r16, r17 ; prefetch_l2 r25 }
+    baf8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l2 r25 }
+    bb00:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+    bb08:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+    bb10:	[0-9a-f]* 	{ addxi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2 r25 }
+    bb18:	[0-9a-f]* 	{ addxi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2 r25 }
+    bb20:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 }
+    bb28:	[0-9a-f]* 	{ and r5, r6, r7 ; ill ; prefetch_l2 r25 }
+    bb30:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2 r25 }
+    bb38:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l2 r25 }
+    bb40:	[0-9a-f]* 	{ andi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    bb48:	[0-9a-f]* 	{ clz r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
+    bb50:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2 r25 }
+    bb58:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
+    bb60:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+    bb68:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2 r25 }
+    bb70:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; prefetch_l2 r25 }
+    bb78:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    bb80:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2 r25 }
+    bb88:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 }
+    bb90:	[0-9a-f]* 	{ ctz r5, r6 ; cmples r15, r16, r17 ; prefetch_l2 r25 }
+    bb98:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmples r15, r16, r17 ; prefetch_l2 r25 }
+    bba0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    bba8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
+    bbb0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
+    bbb8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+    bbc0:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2 r25 }
+    bbc8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; prefetch_l2 r25 }
+    bbd0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2 r25 }
+    bbd8:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2 r25 }
+    bbe0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 }
+    bbe8:	[0-9a-f]* 	{ ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+    bbf0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+    bbf8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    bc00:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
+    bc08:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
+    bc10:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+    bc18:	[0-9a-f]* 	{ ctz r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
+    bc20:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; prefetch_l2 r25 }
+    bc28:	[0-9a-f]* 	{ rotli r5, r6, 5 ; prefetch_l2 r25 }
+    bc30:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 }
+    bc38:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+    bc40:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; prefetch_l2 r25 }
+    bc48:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
+    bc50:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
+    bc58:	[0-9a-f]* 	{ info 19 ; shrui r5, r6, 5 ; prefetch_l2 r25 }
+    bc60:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+    bc68:	[0-9a-f]* 	{ andi r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 }
+    bc70:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+    bc78:	[0-9a-f]* 	{ move r5, r6 ; jr r15 ; prefetch_l2 r25 }
+    bc80:	[0-9a-f]* 	{ jr r15 ; prefetch_l2 r25 }
+    bc88:	[0-9a-f]* 	{ revbits r5, r6 ; jrp r15 ; prefetch_l2 r25 }
+    bc90:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    bc98:	[0-9a-f]* 	{ subx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    bca0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    bca8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+    bcb0:	[0-9a-f]* 	{ move r15, r16 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    bcb8:	[0-9a-f]* 	{ move r15, r16 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    bcc0:	[0-9a-f]* 	{ move r5, r6 ; jrp r15 ; prefetch_l2 r25 }
+    bcc8:	[0-9a-f]* 	{ movei r15, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
+    bcd0:	[0-9a-f]* 	{ movei r15, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    bcd8:	[0-9a-f]* 	{ movei r5, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    bce0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    bce8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2 r25 }
+    bcf0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
+    bcf8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 }
+    bd00:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+    bd08:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+    bd10:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
+    bd18:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    bd20:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; prefetch_l2 r25 }
+    bd28:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+    bd30:	[0-9a-f]* 	{ mulx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
+    bd38:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+    bd40:	[0-9a-f]* 	{ mulx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    bd48:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+    bd50:	[0-9a-f]* 	{ nop ; addi r5, r6, 5 ; prefetch_l2 r25 }
+    bd58:	[0-9a-f]* 	{ nop ; move r15, r16 ; prefetch_l2 r25 }
+    bd60:	[0-9a-f]* 	{ nop ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
+    bd68:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+    bd70:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+    bd78:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    bd80:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
+    bd88:	[0-9a-f]* 	{ or r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2 r25 }
+    bd90:	[0-9a-f]* 	{ or r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+    bd98:	[0-9a-f]* 	{ pcnt r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
+    bda0:	[0-9a-f]* 	{ revbits r5, r6 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    bda8:	[0-9a-f]* 	{ revbytes r5, r6 ; move r15, r16 ; prefetch_l2 r25 }
+    bdb0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
+    bdb8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    bdc0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    bdc8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    bdd0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+    bdd8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+    bde0:	[0-9a-f]* 	{ shl r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    bde8:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
+    bdf0:	[0-9a-f]* 	{ clz r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+    bdf8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
+    be00:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    be08:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
+    be10:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    be18:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    be20:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    be28:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+    be30:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+    be38:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    be40:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
+    be48:	[0-9a-f]* 	{ clz r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2 r25 }
+    be50:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
+    be58:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    be60:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
+    be68:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    be70:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    be78:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
+    be80:	[0-9a-f]* 	{ shli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+    be88:	[0-9a-f]* 	{ shli r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+    be90:	[0-9a-f]* 	{ shrs r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    be98:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
+    bea0:	[0-9a-f]* 	{ clz r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+    bea8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
+    beb0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 }
+    beb8:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2 r25 }
+    bec0:	[0-9a-f]* 	{ shru r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    bec8:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    bed0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+    bed8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+    bee0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+    bee8:	[0-9a-f]* 	{ sub r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    bef0:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2 r25 }
+    bef8:	[0-9a-f]* 	{ clz r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+    bf00:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
+    bf08:	[0-9a-f]* 	{ subx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    bf10:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; prefetch_l2 r25 }
+    bf18:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
+    bf20:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addx r15, r16, r17 ; prefetch_l2 r25 }
+    bf28:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+    bf30:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+    bf38:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
+    bf40:	[0-9a-f]* 	{ xor r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2 r25 }
+    bf48:	[0-9a-f]* 	{ xor r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
+    bf50:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; prefetch_l2_fault r15 }
+    bf58:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; prefetch_l2_fault r15 }
+    bf60:	[0-9a-f]* 	{ v1add r5, r6, r7 ; prefetch_l2_fault r15 }
+    bf68:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; prefetch_l2_fault r15 }
+    bf70:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; prefetch_l2_fault r15 }
+    bf78:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
+    bf80:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
+    bf88:	[0-9a-f]* 	{ add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+    bf90:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
+    bf98:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    bfa0:	[0-9a-f]* 	{ addi r5, r6, 5 ; prefetch_l2_fault r25 }
+    bfa8:	[0-9a-f]* 	{ revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    bfb0:	[0-9a-f]* 	{ addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
+    bfb8:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l2_fault r25 }
+    bfc0:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    bfc8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; nop ; prefetch_l2_fault r25 }
+    bfd0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    bfd8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    bfe0:	[0-9a-f]* 	{ and r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+    bfe8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
+    bff0:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    bff8:	[0-9a-f]* 	{ andi r5, r6, 5 ; prefetch_l2_fault r25 }
+    c000:	[0-9a-f]* 	{ clz r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
+    c008:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c010:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    c018:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    c020:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2_fault r25 }
+    c028:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c030:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c038:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c040:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    c048:	[0-9a-f]* 	{ pcnt r5, r6 ; cmples r15, r16, r17 ; prefetch_l2_fault r25 }
+    c050:	[0-9a-f]* 	{ cmples r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+    c058:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
+    c060:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
+    c068:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    c070:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    c078:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    c080:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c088:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c090:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c098:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    c0a0:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+    c0a8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+    c0b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l2_fault r25 }
+    c0b8:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
+    c0c0:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    c0c8:	[0-9a-f]* 	{ ctz r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+    c0d0:	[0-9a-f]* 	{ andi r5, r6, 5 ; prefetch_l2_fault r25 }
+    c0d8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
+    c0e0:	[0-9a-f]* 	{ shru r15, r16, r17 ; prefetch_l2_fault r25 }
+    c0e8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    c0f0:	[0-9a-f]* 	{ ill ; prefetch_l2_fault r25 }
+    c0f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ill ; prefetch_l2_fault r25 }
+    c100:	[0-9a-f]* 	{ info 19 ; info 19 ; prefetch_l2_fault r25 }
+    c108:	[0-9a-f]* 	{ info 19 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c110:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
+    c118:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
+    c120:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jalrp r15 ; prefetch_l2_fault r25 }
+    c128:	[0-9a-f]* 	{ addxi r5, r6, 5 ; jr r15 ; prefetch_l2_fault r25 }
+    c130:	[0-9a-f]* 	{ shl r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 }
+    c138:	[0-9a-f]* 	{ info 19 ; jrp r15 ; prefetch_l2_fault r25 }
+    c140:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jrp r15 ; prefetch_l2_fault r25 }
+    c148:	[0-9a-f]* 	{ or r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    c150:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 }
+    c158:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 }
+    c160:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+    c168:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
+    c170:	[0-9a-f]* 	{ move r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c178:	[0-9a-f]* 	{ move r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 }
+    c180:	[0-9a-f]* 	{ movei r15, 5 ; mz r5, r6, r7 ; prefetch_l2_fault r25 }
+    c188:	[0-9a-f]* 	{ movei r5, 5 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c190:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    c198:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c1a0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c1a8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    c1b0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; move r15, r16 ; prefetch_l2_fault r25 }
+    c1b8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
+    c1c0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
+    c1c8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c1d0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
+    c1d8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c1e0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+    c1e8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; lnk r15 ; prefetch_l2_fault r25 }
+    c1f0:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 }
+    c1f8:	[0-9a-f]* 	{ mz r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 }
+    c200:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+    c208:	[0-9a-f]* 	{ nop ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    c210:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; prefetch_l2_fault r25 }
+    c218:	[0-9a-f]* 	{ nop ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+    c220:	[0-9a-f]* 	{ pcnt r5, r6 ; nor r15, r16, r17 ; prefetch_l2_fault r25 }
+    c228:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+    c230:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+    c238:	[0-9a-f]* 	{ or r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
+    c240:	[0-9a-f]* 	{ or r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+    c248:	[0-9a-f]* 	{ pcnt r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+    c250:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c258:	[0-9a-f]* 	{ revbytes r5, r6 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    c260:	[0-9a-f]* 	{ revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c268:	[0-9a-f]* 	{ rotl r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
+    c270:	[0-9a-f]* 	{ rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+    c278:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    c280:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c288:	[0-9a-f]* 	{ rotli r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    c290:	[0-9a-f]* 	{ ctz r5, r6 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+    c298:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2a0:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2a8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2b0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2b8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2c0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
+    c2c8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c2d0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2d8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c2e0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    c2e8:	[0-9a-f]* 	{ ctz r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c2f8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c300:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c308:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    c310:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c318:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
+    c320:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c328:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+    c330:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c338:	[0-9a-f]* 	{ shli r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    c340:	[0-9a-f]* 	{ ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
+    c348:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
+    c350:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c358:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
+    c360:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    c368:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c370:	[0-9a-f]* 	{ shru r15, r16, r17 ; or r5, r6, r7 ; prefetch_l2_fault r25 }
+    c378:	[0-9a-f]* 	{ shru r5, r6, r7 ; prefetch_l2_fault r25 }
+    c380:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
+    c388:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c390:	[0-9a-f]* 	{ shrui r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 }
+    c398:	[0-9a-f]* 	{ ctz r5, r6 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3a0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3a8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3b0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3b8:	[0-9a-f]* 	{ subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3c0:	[0-9a-f]* 	{ subx r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    c3d0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    c3d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; prefetch_l2_fault r25 }
+    c3e0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; info 19 ; prefetch_l2_fault r25 }
+    c3e8:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l2_fault r25 }
+    c3f0:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    c3f8:	[0-9a-f]* 	{ xor r5, r6, r7 ; nop ; prefetch_l2_fault r25 }
+    c400:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; prefetch_l3 r15 }
+    c408:	[0-9a-f]* 	{ movei r5, 5 ; prefetch_l3 r15 }
+    c410:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; prefetch_l3 r15 }
+    c418:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; prefetch_l3 r15 }
+    c420:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; prefetch_l3 r15 }
+    c428:	[0-9a-f]* 	{ add r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3 r25 }
+    c430:	[0-9a-f]* 	{ revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l3 r25 }
+    c438:	[0-9a-f]* 	{ add r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    c440:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3 r25 }
+    c448:	[0-9a-f]* 	{ addi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3 r25 }
+    c450:	[0-9a-f]* 	{ addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    c458:	[0-9a-f]* 	{ addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 }
+    c460:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    c468:	[0-9a-f]* 	{ addx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    c470:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 }
+    c478:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
+    c480:	[0-9a-f]* 	{ and r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3 r25 }
+    c488:	[0-9a-f]* 	{ revbytes r5, r6 ; and r15, r16, r17 ; prefetch_l3 r25 }
+    c490:	[0-9a-f]* 	{ and r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    c498:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3 r25 }
+    c4a0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3 r25 }
+    c4a8:	[0-9a-f]* 	{ andi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    c4b0:	[0-9a-f]* 	{ clz r5, r6 ; jrp r15 ; prefetch_l3 r25 }
+    c4b8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    c4c0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    c4c8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; prefetch_l3 r25 }
+    c4d0:	[0-9a-f]* 	{ revbits r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    c4d8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
+    c4e0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+    c4e8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3 r25 }
+    c4f0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; nop ; prefetch_l3 r25 }
+    c4f8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    c500:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmples r15, r16, r17 ; prefetch_l3 r25 }
+    c508:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    c510:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+    c518:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    c520:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; prefetch_l3 r25 }
+    c528:	[0-9a-f]* 	{ revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
+    c530:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
+    c538:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+    c540:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3 r25 }
+    c548:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; nop ; prefetch_l3 r25 }
+    c550:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    c558:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    c560:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    c568:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    c570:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    c578:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; prefetch_l3 r25 }
+    c580:	[0-9a-f]* 	{ ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+    c588:	[0-9a-f]* 	{ prefetch_l3 r25 }
+    c590:	[0-9a-f]* 	{ shl r5, r6, r7 ; prefetch_l3 r25 }
+    c598:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    c5a0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; prefetch_l3 r25 }
+    c5a8:	[0-9a-f]* 	{ revbits r5, r6 ; ill ; prefetch_l3 r25 }
+    c5b0:	[0-9a-f]* 	{ info 19 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+    c5b8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
+    c5c0:	[0-9a-f]* 	{ info 19 ; sub r5, r6, r7 ; prefetch_l3 r25 }
+    c5c8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+    c5d0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
+    c5d8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
+    c5e0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+    c5e8:	[0-9a-f]* 	{ addi r5, r6, 5 ; jrp r15 ; prefetch_l3 r25 }
+    c5f0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
+    c5f8:	[0-9a-f]* 	{ lnk r15 ; prefetch_l3 r25 }
+    c600:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; lnk r15 ; prefetch_l3 r25 }
+    c608:	[0-9a-f]* 	{ mnz r15, r16, r17 ; nop ; prefetch_l3 r25 }
+    c610:	[0-9a-f]* 	{ mnz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    c618:	[0-9a-f]* 	{ move r15, r16 ; andi r5, r6, 5 ; prefetch_l3 r25 }
+    c620:	[0-9a-f]* 	{ move r15, r16 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+    c628:	[0-9a-f]* 	{ move r5, r6 ; mnz r15, r16, r17 ; prefetch_l3 r25 }
+    c630:	[0-9a-f]* 	{ movei r15, 5 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
+    c638:	[0-9a-f]* 	{ movei r15, 5 ; sub r5, r6, r7 ; prefetch_l3 r25 }
+    c640:	[0-9a-f]* 	{ movei r5, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    c648:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    c650:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l3 r25 }
+    c658:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    c660:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
+    c668:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    c670:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    c678:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
+    c680:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
+    c688:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; info 19 ; prefetch_l3 r25 }
+    c690:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+    c698:	[0-9a-f]* 	{ mulx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    c6a0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    c6a8:	[0-9a-f]* 	{ mz r15, r16, r17 ; nop ; prefetch_l3 r25 }
+    c6b0:	[0-9a-f]* 	{ mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+    c6b8:	[0-9a-f]* 	{ nop ; addx r5, r6, r7 ; prefetch_l3 r25 }
+    c6c0:	[0-9a-f]* 	{ nop ; movei r15, 5 ; prefetch_l3 r25 }
+    c6c8:	[0-9a-f]* 	{ nop ; shli r15, r16, 5 ; prefetch_l3 r25 }
+    c6d0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    c6d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    c6e0:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    c6e8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
+    c6f0:	[0-9a-f]* 	{ or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    c6f8:	[0-9a-f]* 	{ or r5, r6, r7 ; prefetch_l3 r25 }
+    c700:	[0-9a-f]* 	{ pcnt r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+    c708:	[0-9a-f]* 	{ revbits r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    c710:	[0-9a-f]* 	{ revbytes r5, r6 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    c718:	[0-9a-f]* 	{ rotl r15, r16, r17 ; prefetch_l3 r25 }
+    c720:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
+    c728:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    c730:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
+    c738:	[0-9a-f]* 	{ rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 }
+    c740:	[0-9a-f]* 	{ rotli r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    c748:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; prefetch_l3 r25 }
+    c750:	[0-9a-f]* 	{ shl r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    c758:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    c760:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    c768:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    c770:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; prefetch_l3 r25 }
+    c778:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
+    c780:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    c788:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
+    c790:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 }
+    c798:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    c7a0:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    c7a8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    c7b0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    c7b8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    c7c0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    c7c8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    c7d0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    c7d8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    c7e0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3 r25 }
+    c7e8:	[0-9a-f]* 	{ shli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 }
+    c7f0:	[0-9a-f]* 	{ shli r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    c7f8:	[0-9a-f]* 	{ pcnt r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+    c800:	[0-9a-f]* 	{ shrs r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    c808:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3 r25 }
+    c810:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    c818:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    c820:	[0-9a-f]* 	{ shru r15, r16, r17 ; prefetch_l3 r25 }
+    c828:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shru r15, r16, r17 ; prefetch_l3 r25 }
+    c830:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    c838:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    c840:	[0-9a-f]* 	{ shrui r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3 r25 }
+    c848:	[0-9a-f]* 	{ shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    c850:	[0-9a-f]* 	{ pcnt r5, r6 ; sub r15, r16, r17 ; prefetch_l3 r25 }
+    c858:	[0-9a-f]* 	{ sub r5, r6, r7 ; ill ; prefetch_l3 r25 }
+    c860:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    c868:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    c870:	[0-9a-f]* 	{ subx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+    c878:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalrp r15 ; prefetch_l3 r25 }
+    c880:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+    c888:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l3 r25 }
+    c890:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    c898:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    c8a0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    c8a8:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
+    c8b0:	[0-9a-f]* 	{ add r5, r6, r7 ; prefetch_l3_fault r15 }
+    c8b8:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; prefetch_l3_fault r15 }
+    c8c0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r15 }
+    c8c8:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; prefetch_l3_fault r15 }
+    c8d0:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; prefetch_l3_fault r15 }
+    c8d8:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; prefetch_l3_fault r15 }
+    c8e0:	[0-9a-f]* 	{ add r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    c8e8:	[0-9a-f]* 	{ add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    c8f0:	[0-9a-f]* 	{ add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    c8f8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3_fault r25 }
+    c900:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    c908:	[0-9a-f]* 	{ addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+    c910:	[0-9a-f]* 	{ addx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l3_fault r25 }
+    c918:	[0-9a-f]* 	{ addx r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
+    c920:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l3_fault r25 }
+    c928:	[0-9a-f]* 	{ addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l3_fault r25 }
+    c930:	[0-9a-f]* 	{ addxi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
+    c938:	[0-9a-f]* 	{ and r15, r16, r17 ; mnz r5, r6, r7 ; prefetch_l3_fault r25 }
+    c940:	[0-9a-f]* 	{ and r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+    c948:	[0-9a-f]* 	{ and r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    c950:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    c958:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    c960:	[0-9a-f]* 	{ clz r5, r6 ; addi r15, r16, 5 ; prefetch_l3_fault r25 }
+    c968:	[0-9a-f]* 	{ clz r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
+    c970:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    c978:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    c980:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; info 19 ; prefetch_l3_fault r25 }
+    c988:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    c990:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    c998:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    c9a0:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    c9a8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+    c9b0:	[0-9a-f]* 	{ revbytes r5, r6 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+    c9b8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    c9c0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
+    c9c8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    c9d0:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    c9d8:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; info 19 ; prefetch_l3_fault r25 }
+    c9e0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3_fault r25 }
+    c9e8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    c9f0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    c9f8:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 }
+    ca00:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+    ca08:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+    ca10:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    ca18:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
+    ca20:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    ca28:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    ca30:	[0-9a-f]* 	{ ctz r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
+    ca38:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
+    ca40:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
+    ca48:	[0-9a-f]* 	{ shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+    ca50:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    ca58:	[0-9a-f]* 	{ info 19 ; ill ; prefetch_l3_fault r25 }
+    ca60:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; prefetch_l3_fault r25 }
+    ca68:	[0-9a-f]* 	{ info 19 ; jalrp r15 ; prefetch_l3_fault r25 }
+    ca70:	[0-9a-f]* 	{ info 19 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    ca78:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    ca80:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    ca88:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
+    ca90:	[0-9a-f]* 	{ andi r5, r6, 5 ; jr r15 ; prefetch_l3_fault r25 }
+    ca98:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
+    caa0:	[0-9a-f]* 	{ move r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
+    caa8:	[0-9a-f]* 	{ jrp r15 ; prefetch_l3_fault r25 }
+    cab0:	[0-9a-f]* 	{ revbits r5, r6 ; lnk r15 ; prefetch_l3_fault r25 }
+    cab8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
+    cac0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
+    cac8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cad0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 }
+    cad8:	[0-9a-f]* 	{ move r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    cae0:	[0-9a-f]* 	{ move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    cae8:	[0-9a-f]* 	{ movei r15, 5 ; nor r5, r6, r7 ; prefetch_l3_fault r25 }
+    caf0:	[0-9a-f]* 	{ movei r5, 5 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+    caf8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb00:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 }
+    cb08:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb10:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb18:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb20:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jalrp r15 ; prefetch_l3_fault r25 }
+    cb28:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    cb30:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb38:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb40:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb48:	[0-9a-f]* 	{ mulax r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
+    cb50:	[0-9a-f]* 	{ mulx r5, r6, r7 ; move r15, r16 ; prefetch_l3_fault r25 }
+    cb58:	[0-9a-f]* 	{ mz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 }
+    cb60:	[0-9a-f]* 	{ mz r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 }
+    cb68:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb70:	[0-9a-f]* 	{ nop ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    cb78:	[0-9a-f]* 	{ revbytes r5, r6 ; nop ; prefetch_l3_fault r25 }
+    cb80:	[0-9a-f]* 	{ nor r15, r16, r17 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+    cb88:	[0-9a-f]* 	{ revbytes r5, r6 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    cb90:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    cb98:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
+    cba0:	[0-9a-f]* 	{ or r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    cba8:	[0-9a-f]* 	{ or r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3_fault r25 }
+    cbb0:	[0-9a-f]* 	{ pcnt r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
+    cbb8:	[0-9a-f]* 	{ revbits r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+    cbc0:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    cbc8:	[0-9a-f]* 	{ revbytes r5, r6 ; prefetch_l3_fault r25 }
+    cbd0:	[0-9a-f]* 	{ revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l3_fault r25 }
+    cbd8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
+    cbe0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
+    cbe8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
+    cbf0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; nop ; prefetch_l3_fault r25 }
+    cbf8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc00:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc08:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc10:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc18:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc20:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
+    cc28:	[0-9a-f]* 	{ revbits r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc30:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
+    cc38:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
+    cc40:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
+    cc48:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; nop ; prefetch_l3_fault r25 }
+    cc50:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc58:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc60:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc68:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc70:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc78:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; prefetch_l3_fault r25 }
+    cc80:	[0-9a-f]* 	{ revbits r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cc88:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
+    cc90:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
+    cc98:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
+    cca0:	[0-9a-f]* 	{ shli r5, r6, 5 ; nop ; prefetch_l3_fault r25 }
+    cca8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    ccb0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    ccb8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+    ccc0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    ccc8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    ccd0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    ccd8:	[0-9a-f]* 	{ revbits r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
+    cce0:	[0-9a-f]* 	{ shru r5, r6, r7 ; info 19 ; prefetch_l3_fault r25 }
+    cce8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3_fault r25 }
+    ccf0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l3_fault r25 }
+    ccf8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; nop ; prefetch_l3_fault r25 }
+    cd00:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd08:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd10:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd18:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd20:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd28:	[0-9a-f]* 	{ subx r5, r6, r7 ; prefetch_l3_fault r25 }
+    cd30:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd38:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd40:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd48:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 }
+    cd50:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l3_fault r25 }
+    cd58:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l3_fault r25 }
+    cd60:	[0-9a-f]* 	{ xor r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
+    cd68:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; raise }
+    cd70:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; raise }
+    cd78:	[0-9a-f]* 	{ shli r5, r6, 5 ; raise }
+    cd80:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; raise }
+    cd88:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; raise }
+    cd90:	[0-9a-f]* 	{ revbits r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
+    cd98:	[0-9a-f]* 	{ revbits r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
+    cda0:	[0-9a-f]* 	{ revbits r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
+    cda8:	[0-9a-f]* 	{ revbits r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+    cdb0:	[0-9a-f]* 	{ revbits r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+    cdb8:	[0-9a-f]* 	{ revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
+    cdc0:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+    cdc8:	[0-9a-f]* 	{ revbits r5, r6 ; fetchand r15, r16, r17 }
+    cdd0:	[0-9a-f]* 	{ revbits r5, r6 ; ill ; prefetch_l3_fault r25 }
+    cdd8:	[0-9a-f]* 	{ revbits r5, r6 ; jalr r15 ; prefetch_l3 r25 }
+    cde0:	[0-9a-f]* 	{ revbits r5, r6 ; jr r15 ; st r25, r26 }
+    cde8:	[0-9a-f]* 	{ revbits r5, r6 ; ill ; ld r25, r26 }
+    cdf0:	[0-9a-f]* 	{ revbits r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+    cdf8:	[0-9a-f]* 	{ revbits r5, r6 ; ld1s_add r15, r16, 5 }
+    ce00:	[0-9a-f]* 	{ revbits r5, r6 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    ce08:	[0-9a-f]* 	{ revbits r5, r6 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    ce10:	[0-9a-f]* 	{ revbits r5, r6 ; jrp r15 ; ld2u r25, r26 }
+    ce18:	[0-9a-f]* 	{ revbits r5, r6 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+    ce20:	[0-9a-f]* 	{ revbits r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
+    ce28:	[0-9a-f]* 	{ revbits r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    ce30:	[0-9a-f]* 	{ revbits r5, r6 ; lnk r15 ; st4 r25, r26 }
+    ce38:	[0-9a-f]* 	{ revbits r5, r6 ; move r15, r16 ; st4 r25, r26 }
+    ce40:	[0-9a-f]* 	{ revbits r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 }
+    ce48:	[0-9a-f]* 	{ revbits r5, r6 ; or r15, r16, r17 ; ld r25, r26 }
+    ce50:	[0-9a-f]* 	{ revbits r5, r6 ; jr r15 ; prefetch r25 }
+    ce58:	[0-9a-f]* 	{ revbits r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    ce60:	[0-9a-f]* 	{ revbits r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    ce68:	[0-9a-f]* 	{ revbits r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    ce70:	[0-9a-f]* 	{ revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    ce78:	[0-9a-f]* 	{ revbits r5, r6 ; lnk r15 ; prefetch_l2_fault r25 }
+    ce80:	[0-9a-f]* 	{ revbits r5, r6 ; cmpne r15, r16, r17 ; prefetch_l3 r25 }
+    ce88:	[0-9a-f]* 	{ revbits r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    ce90:	[0-9a-f]* 	{ revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+    ce98:	[0-9a-f]* 	{ revbits r5, r6 ; rotli r15, r16, 5 }
+    cea0:	[0-9a-f]* 	{ revbits r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    cea8:	[0-9a-f]* 	{ revbits r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    ceb0:	[0-9a-f]* 	{ revbits r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    ceb8:	[0-9a-f]* 	{ revbits r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    cec0:	[0-9a-f]* 	{ revbits r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    cec8:	[0-9a-f]* 	{ revbits r5, r6 ; andi r15, r16, 5 ; st r25, r26 }
+    ced0:	[0-9a-f]* 	{ revbits r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
+    ced8:	[0-9a-f]* 	{ revbits r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    cee0:	[0-9a-f]* 	{ revbits r5, r6 ; or r15, r16, r17 ; st2 r25, r26 }
+    cee8:	[0-9a-f]* 	{ revbits r5, r6 ; jr r15 ; st4 r25, r26 }
+    cef0:	[0-9a-f]* 	{ revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
+    cef8:	[0-9a-f]* 	{ revbits r5, r6 ; v1cmpeq r15, r16, r17 }
+    cf00:	[0-9a-f]* 	{ revbits r5, r6 ; v2maxsi r15, r16, 5 }
+    cf08:	[0-9a-f]* 	{ revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+    cf10:	[0-9a-f]* 	{ revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+    cf18:	[0-9a-f]* 	{ revbytes r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    cf20:	[0-9a-f]* 	{ revbytes r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    cf28:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+    cf30:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    cf38:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    cf40:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpne r15, r16, r17 }
+    cf48:	[0-9a-f]* 	{ revbytes r5, r6 ; ill ; ld1u r25, r26 }
+    cf50:	[0-9a-f]* 	{ revbytes r5, r6 ; jalr r15 ; ld1s r25, r26 }
+    cf58:	[0-9a-f]* 	{ revbytes r5, r6 ; jr r15 ; ld2s r25, r26 }
+    cf60:	[0-9a-f]* 	{ revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+    cf68:	[0-9a-f]* 	{ revbytes r5, r6 ; subx r15, r16, r17 ; ld r25, r26 }
+    cf70:	[0-9a-f]* 	{ revbytes r5, r6 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    cf78:	[0-9a-f]* 	{ revbytes r5, r6 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    cf80:	[0-9a-f]* 	{ revbytes r5, r6 ; jalrp r15 ; ld2s r25, r26 }
+    cf88:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    cf90:	[0-9a-f]* 	{ revbytes r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 }
+    cf98:	[0-9a-f]* 	{ revbytes r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
+    cfa0:	[0-9a-f]* 	{ revbytes r5, r6 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    cfa8:	[0-9a-f]* 	{ revbytes r5, r6 ; lnk r15 ; ld4u r25, r26 }
+    cfb0:	[0-9a-f]* 	{ revbytes r5, r6 ; move r15, r16 ; ld4u r25, r26 }
+    cfb8:	[0-9a-f]* 	{ revbytes r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    cfc0:	[0-9a-f]* 	{ revbytes r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    cfc8:	[0-9a-f]* 	{ revbytes r5, r6 ; cmples r15, r16, r17 ; prefetch r25 }
+    cfd0:	[0-9a-f]* 	{ revbytes r5, r6 ; prefetch_add_l1_fault r15, 5 }
+    cfd8:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
+    cfe0:	[0-9a-f]* 	{ revbytes r5, r6 ; nop ; prefetch_l1_fault r25 }
+    cfe8:	[0-9a-f]* 	{ revbytes r5, r6 ; jalrp r15 ; prefetch_l2 r25 }
+    cff0:	[0-9a-f]* 	{ revbytes r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    cff8:	[0-9a-f]* 	{ revbytes r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    d000:	[0-9a-f]* 	{ revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    d008:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    d010:	[0-9a-f]* 	{ revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
+    d018:	[0-9a-f]* 	{ revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch r25 }
+    d020:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    d028:	[0-9a-f]* 	{ revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    d030:	[0-9a-f]* 	{ revbytes r5, r6 ; shli r15, r16, 5 ; st r25, r26 }
+    d038:	[0-9a-f]* 	{ revbytes r5, r6 ; shrsi r15, r16, 5 ; st r25, r26 }
+    d040:	[0-9a-f]* 	{ revbytes r5, r6 ; shrui r15, r16, 5 ; st2 r25, r26 }
+    d048:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; st r25, r26 }
+    d050:	[0-9a-f]* 	{ revbytes r5, r6 ; nop ; st1 r25, r26 }
+    d058:	[0-9a-f]* 	{ revbytes r5, r6 ; jalr r15 ; st2 r25, r26 }
+    d060:	[0-9a-f]* 	{ revbytes r5, r6 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    d068:	[0-9a-f]* 	{ revbytes r5, r6 ; st_add r15, r16, 5 }
+    d070:	[0-9a-f]* 	{ revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    d078:	[0-9a-f]* 	{ revbytes r5, r6 ; v2cmpeqi r15, r16, 5 }
+    d080:	[0-9a-f]* 	{ revbytes r5, r6 ; xor r15, r16, r17 ; ld r25, r26 }
+    d088:	[0-9a-f]* 	{ rotl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 }
+    d090:	[0-9a-f]* 	{ rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 }
+    d098:	[0-9a-f]* 	{ rotl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 }
+    d0a0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    d0a8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    d0b0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 }
+    d0b8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 }
+    d0c0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    d0c8:	[0-9a-f]* 	{ ctz r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    d0d0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; prefetch_l2 r25 }
+    d0d8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; info 19 ; ld4u r25, r26 }
+    d0e0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
+    d0e8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1s r25, r26 }
+    d0f0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl r5, r6, r7 ; ld1s r25, r26 }
+    d0f8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; info 19 ; ld1u r25, r26 }
+    d100:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1u r25, r26 }
+    d108:	[0-9a-f]* 	{ rotl r15, r16, r17 ; or r5, r6, r7 ; ld2s r25, r26 }
+    d110:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
+    d118:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 }
+    d120:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
+    d128:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
+    d130:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
+    d138:	[0-9a-f]* 	{ rotl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 }
+    d140:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
+    d148:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld2s r25, r26 }
+    d150:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 }
+    d158:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+    d160:	[0-9a-f]* 	{ mulax r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 }
+    d168:	[0-9a-f]* 	{ rotl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 }
+    d170:	[0-9a-f]* 	{ rotl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    d178:	[0-9a-f]* 	{ pcnt r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
+    d180:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+    d188:	[0-9a-f]* 	{ rotl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+    d190:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    d198:	[0-9a-f]* 	{ rotl r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    d1a0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+    d1a8:	[0-9a-f]* 	{ revbits r5, r6 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+    d1b0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+    d1b8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2_fault r25 }
+    d1c0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
+    d1c8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
+    d1d0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    d1d8:	[0-9a-f]* 	{ revbytes r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
+    d1e0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+    d1e8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+    d1f0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
+    d1f8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 }
+    d200:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
+    d208:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    d210:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shrux r5, r6, r7 }
+    d218:	[0-9a-f]* 	{ rotl r15, r16, r17 ; or r5, r6, r7 ; st r25, r26 }
+    d220:	[0-9a-f]* 	{ rotl r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
+    d228:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
+    d230:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
+    d238:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 }
+    d240:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+    d248:	[0-9a-f]* 	{ rotl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    d250:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rotl r15, r16, r17 ; prefetch r25 }
+    d258:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+    d260:	[0-9a-f]* 	{ rotl r15, r16, r17 ; v1mnz r5, r6, r7 }
+    d268:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; rotl r15, r16, r17 }
+    d270:	[0-9a-f]* 	{ rotl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+    d278:	[0-9a-f]* 	{ rotl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+    d280:	[0-9a-f]* 	{ rotl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    d288:	[0-9a-f]* 	{ rotl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    d290:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+    d298:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    d2a0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    d2a8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpne r15, r16, r17 }
+    d2b0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; ill ; ld1u r25, r26 }
+    d2b8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+    d2c0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    d2c8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 }
+    d2d0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
+    d2d8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    d2e0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    d2e8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    d2f0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    d2f8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+    d300:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
+    d308:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    d310:	[0-9a-f]* 	{ rotl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+    d318:	[0-9a-f]* 	{ rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    d320:	[0-9a-f]* 	{ rotl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    d328:	[0-9a-f]* 	{ rotl r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    d330:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    d338:	[0-9a-f]* 	{ rotl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    d340:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    d348:	[0-9a-f]* 	{ rotl r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
+    d350:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+    d358:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    d360:	[0-9a-f]* 	{ rotl r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    d368:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    d370:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    d378:	[0-9a-f]* 	{ rotl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+    d380:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    d388:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    d390:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    d398:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    d3a0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+    d3a8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+    d3b0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    d3b8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; nop ; st1 r25, r26 }
+    d3c0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    d3c8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    d3d0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; st_add r15, r16, 5 }
+    d3d8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    d3e0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+    d3e8:	[0-9a-f]* 	{ rotl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
+    d3f0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; addi r5, r6, 5 ; ld1s r25, r26 }
+    d3f8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1u r25, r26 }
+    d400:	[0-9a-f]* 	{ rotli r15, r16, 5 ; andi r5, r6, 5 ; ld1u r25, r26 }
+    d408:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
+    d410:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    d418:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmples r5, r6, r7 ; ld4s r25, r26 }
+    d420:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch r25 }
+    d428:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    d430:	[0-9a-f]* 	{ ctz r5, r6 ; rotli r15, r16, 5 ; ld1s r25, r26 }
+    d438:	[0-9a-f]* 	{ rotli r15, r16, 5 ; prefetch_l2 r25 }
+    d440:	[0-9a-f]* 	{ rotli r15, r16, 5 ; info 19 ; ld4u r25, r26 }
+    d448:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld r25, r26 }
+    d450:	[0-9a-f]* 	{ rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1s r25, r26 }
+    d458:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl r5, r6, r7 ; ld1s r25, r26 }
+    d460:	[0-9a-f]* 	{ rotli r15, r16, 5 ; info 19 ; ld1u r25, r26 }
+    d468:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rotli r15, r16, 5 ; ld1u r25, r26 }
+    d470:	[0-9a-f]* 	{ rotli r15, r16, 5 ; or r5, r6, r7 ; ld2s r25, r26 }
+    d478:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
+    d480:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shrui r5, r6, 5 ; ld2u r25, r26 }
+    d488:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld4s r25, r26 }
+    d490:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 }
+    d498:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
+    d4a0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; move r5, r6 ; ld4s r25, r26 }
+    d4a8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld4u r25, r26 }
+    d4b0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+    d4b8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+    d4c0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; ld1s r25, r26 }
+    d4c8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
+    d4d0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
+    d4d8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    d4e0:	[0-9a-f]* 	{ pcnt r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
+    d4e8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+    d4f0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    d4f8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    d500:	[0-9a-f]* 	{ rotli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 }
+    d508:	[0-9a-f]* 	{ rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    d510:	[0-9a-f]* 	{ revbits r5, r6 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    d518:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+    d520:	[0-9a-f]* 	{ rotli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2_fault r25 }
+    d528:	[0-9a-f]* 	{ mulx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3 r25 }
+    d530:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
+    d538:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    d540:	[0-9a-f]* 	{ revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
+    d548:	[0-9a-f]* 	{ rotli r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+    d550:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+    d558:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
+    d560:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st1 r25, r26 }
+    d568:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 }
+    d570:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    d578:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shrux r5, r6, r7 }
+    d580:	[0-9a-f]* 	{ rotli r15, r16, 5 ; or r5, r6, r7 ; st r25, r26 }
+    d588:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
+    d590:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shrui r5, r6, 5 ; st1 r25, r26 }
+    d598:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+    d5a0:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
+    d5a8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+    d5b0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    d5b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
+    d5c0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    d5c8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; v1mnz r5, r6, r7 }
+    d5d0:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; rotli r15, r16, 5 }
+    d5d8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+    d5e0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+    d5e8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    d5f0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    d5f8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+    d600:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    d608:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    d610:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmpne r15, r16, r17 }
+    d618:	[0-9a-f]* 	{ rotli r5, r6, 5 ; ill ; ld1u r25, r26 }
+    d620:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalr r15 ; ld1s r25, r26 }
+    d628:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jr r15 ; ld2s r25, r26 }
+    d630:	[0-9a-f]* 	{ rotli r5, r6, 5 ; and r15, r16, r17 ; ld r25, r26 }
+    d638:	[0-9a-f]* 	{ rotli r5, r6, 5 ; subx r15, r16, r17 ; ld r25, r26 }
+    d640:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    d648:	[0-9a-f]* 	{ rotli r5, r6, 5 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    d650:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalrp r15 ; ld2s r25, r26 }
+    d658:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    d660:	[0-9a-f]* 	{ rotli r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 }
+    d668:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
+    d670:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    d678:	[0-9a-f]* 	{ rotli r5, r6, 5 ; lnk r15 ; ld4u r25, r26 }
+    d680:	[0-9a-f]* 	{ rotli r5, r6, 5 ; move r15, r16 ; ld4u r25, r26 }
+    d688:	[0-9a-f]* 	{ rotli r5, r6, 5 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    d690:	[0-9a-f]* 	{ rotli r5, r6, 5 ; nor r15, r16, r17 ; prefetch r25 }
+    d698:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 }
+    d6a0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; prefetch_add_l1_fault r15, 5 }
+    d6a8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch r25 }
+    d6b0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; nop ; prefetch_l1_fault r25 }
+    d6b8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalrp r15 ; prefetch_l2 r25 }
+    d6c0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    d6c8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    d6d0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    d6d8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    d6e0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch r25 }
+    d6e8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch r25 }
+    d6f0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    d6f8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    d700:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 }
+    d708:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 }
+    d710:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shrui r15, r16, 5 ; st2 r25, r26 }
+    d718:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 }
+    d720:	[0-9a-f]* 	{ rotli r5, r6, 5 ; nop ; st1 r25, r26 }
+    d728:	[0-9a-f]* 	{ rotli r5, r6, 5 ; jalr r15 ; st2 r25, r26 }
+    d730:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    d738:	[0-9a-f]* 	{ rotli r5, r6, 5 ; st_add r15, r16, 5 }
+    d740:	[0-9a-f]* 	{ rotli r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    d748:	[0-9a-f]* 	{ rotli r5, r6, 5 ; v2cmpeqi r15, r16, 5 }
+    d750:	[0-9a-f]* 	{ rotli r5, r6, 5 ; xor r15, r16, r17 ; ld r25, r26 }
+    d758:	[0-9a-f]* 	{ shl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 }
+    d760:	[0-9a-f]* 	{ shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 }
+    d768:	[0-9a-f]* 	{ shl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 }
+    d770:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    d778:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    d780:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 }
+    d788:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 }
+    d790:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+    d798:	[0-9a-f]* 	{ ctz r5, r6 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    d7a0:	[0-9a-f]* 	{ shl r15, r16, r17 ; prefetch_l2 r25 }
+    d7a8:	[0-9a-f]* 	{ shl r15, r16, r17 ; info 19 ; ld4u r25, r26 }
+    d7b0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
+    d7b8:	[0-9a-f]* 	{ shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1s r25, r26 }
+    d7c0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl r5, r6, r7 ; ld1s r25, r26 }
+    d7c8:	[0-9a-f]* 	{ shl r15, r16, r17 ; info 19 ; ld1u r25, r26 }
+    d7d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    d7d8:	[0-9a-f]* 	{ shl r15, r16, r17 ; or r5, r6, r7 ; ld2s r25, r26 }
+    d7e0:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2u r25, r26 }
+    d7e8:	[0-9a-f]* 	{ shl r15, r16, r17 ; shrui r5, r6, 5 ; ld2u r25, r26 }
+    d7f0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; ld4s r25, r26 }
+    d7f8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    d800:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl3add r5, r6, r7 ; ld4u r25, r26 }
+    d808:	[0-9a-f]* 	{ shl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 }
+    d810:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    d818:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+    d820:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; ld2u r25, r26 }
+    d828:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+    d830:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    d838:	[0-9a-f]* 	{ shl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 }
+    d840:	[0-9a-f]* 	{ shl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+    d848:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+    d850:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    d858:	[0-9a-f]* 	{ shl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+    d860:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+    d868:	[0-9a-f]* 	{ shl r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    d870:	[0-9a-f]* 	{ shl r15, r16, r17 ; prefetch_l1_fault r25 }
+    d878:	[0-9a-f]* 	{ revbits r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+    d880:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+    d888:	[0-9a-f]* 	{ shl r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2_fault r25 }
+    d890:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 }
+    d898:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 }
+    d8a0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch_l3_fault r25 }
+    d8a8:	[0-9a-f]* 	{ revbytes r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+    d8b0:	[0-9a-f]* 	{ shl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+    d8b8:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+    d8c0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
+    d8c8:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 }
+    d8d0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
+    d8d8:	[0-9a-f]* 	{ shl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    d8e0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shrux r5, r6, r7 }
+    d8e8:	[0-9a-f]* 	{ shl r15, r16, r17 ; or r5, r6, r7 ; st r25, r26 }
+    d8f0:	[0-9a-f]* 	{ shl r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
+    d8f8:	[0-9a-f]* 	{ shl r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
+    d900:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+    d908:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
+    d910:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+    d918:	[0-9a-f]* 	{ shl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
+    d920:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+    d928:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; prefetch_l1_fault r25 }
+    d930:	[0-9a-f]* 	{ shl r15, r16, r17 ; v1mnz r5, r6, r7 }
+    d938:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; shl r15, r16, r17 }
+    d940:	[0-9a-f]* 	{ shl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+    d948:	[0-9a-f]* 	{ shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+    d950:	[0-9a-f]* 	{ shl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+    d958:	[0-9a-f]* 	{ shl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+    d960:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+    d968:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+    d970:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+    d978:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpne r15, r16, r17 }
+    d980:	[0-9a-f]* 	{ shl r5, r6, r7 ; ill ; ld1u r25, r26 }
+    d988:	[0-9a-f]* 	{ shl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+    d990:	[0-9a-f]* 	{ shl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+    d998:	[0-9a-f]* 	{ shl r5, r6, r7 ; and r15, r16, r17 ; ld r25, r26 }
+    d9a0:	[0-9a-f]* 	{ shl r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
+    d9a8:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    d9b0:	[0-9a-f]* 	{ shl r5, r6, r7 ; nor r15, r16, r17 ; ld1u r25, r26 }
+    d9b8:	[0-9a-f]* 	{ shl r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+    d9c0:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2u r25, r26 }
+    d9c8:	[0-9a-f]* 	{ shl r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+    d9d0:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
+    d9d8:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl r15, r16, r17 ; ld4u r25, r26 }
+    d9e0:	[0-9a-f]* 	{ shl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+    d9e8:	[0-9a-f]* 	{ shl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+    d9f0:	[0-9a-f]* 	{ shl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
+    d9f8:	[0-9a-f]* 	{ shl r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    da00:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+    da08:	[0-9a-f]* 	{ shl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+    da10:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    da18:	[0-9a-f]* 	{ shl r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
+    da20:	[0-9a-f]* 	{ shl r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+    da28:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+    da30:	[0-9a-f]* 	{ shl r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+    da38:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+    da40:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    da48:	[0-9a-f]* 	{ shl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+    da50:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    da58:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    da60:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    da68:	[0-9a-f]* 	{ shl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    da70:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+    da78:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+    da80:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    da88:	[0-9a-f]* 	{ shl r5, r6, r7 ; nop ; st1 r25, r26 }
+    da90:	[0-9a-f]* 	{ shl r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+    da98:	[0-9a-f]* 	{ shl r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
+    daa0:	[0-9a-f]* 	{ shl r5, r6, r7 ; st_add r15, r16, 5 }
+    daa8:	[0-9a-f]* 	{ shl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+    dab0:	[0-9a-f]* 	{ shl r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+    dab8:	[0-9a-f]* 	{ shl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
+    dac0:	[0-9a-f]* 	{ shl16insli r15, r16, 4660 ; cmpltsi r5, r6, 5 }
+    dac8:	[0-9a-f]* 	{ shl16insli r15, r16, 4660 ; moveli r5, 4660 }
+    dad0:	[0-9a-f]* 	{ shl16insli r15, r16, 4660 ; shl3addx r5, r6, r7 }
+    dad8:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; shl16insli r15, r16, 4660 }
+    dae0:	[0-9a-f]* 	{ shl16insli r15, r16, 4660 ; v2int_l r5, r6, r7 }
+    dae8:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; addi r15, r16, 5 }
+    daf0:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; infol 4660 }
+    daf8:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; mnz r15, r16, r17 }
+    db00:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; shrui r15, r16, 5 }
+    db08:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; v1mnz r15, r16, r17 }
+    db10:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; v2sub r15, r16, r17 }
+    db18:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    db20:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    db28:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    db30:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    db38:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    db40:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    db48:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    db50:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    db58:	[0-9a-f]* 	{ ctz r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    db60:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; st r25, r26 }
+    db68:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+    db70:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld r25, r26 }
+    db78:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 ; ld1s r25, r26 }
+    db80:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    db88:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld1u r25, r26 }
+    db90:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    db98:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    dba0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; ld2u r25, r26 }
+    dba8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
+    dbb0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; nop ; ld4s r25, r26 }
+    dbb8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    dbc0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    dbc8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    dbd0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+    dbd8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    dbe0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    dbe8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+    dbf0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1add r15, r16, r17 ; ld4u r25, r26 }
+    dbf8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    dc00:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    dc08:	[0-9a-f]* 	{ pcnt r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    dc10:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch r25 }
+    dc18:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    dc20:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    dc28:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 }
+    dc30:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    dc38:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    dc40:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+    dc48:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    dc50:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    dc58:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    dc60:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    dc68:	[0-9a-f]* 	{ revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    dc70:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+    dc78:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    dc80:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    dc88:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    dc90:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+    dc98:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    dca0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    dca8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+    dcb0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; st1 r25, r26 }
+    dcb8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; st1 r25, r26 }
+    dcc0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; nop ; st2 r25, r26 }
+    dcc8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    dcd0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    dcd8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    dce0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l2_fault r25 }
+    dce8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; prefetch_l3_fault r25 }
+    dcf0:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; v1mz r5, r6, r7 }
+    dcf8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; v2packuc r5, r6, r7 }
+    dd00:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+    dd08:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    dd10:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    dd18:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    dd20:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpexch r15, r16, r17 }
+    dd28:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    dd30:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    dd38:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; dtlbpr r15 }
+    dd40:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; ill ; ld4u r25, r26 }
+    dd48:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    dd50:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; jr r15 ; prefetch r25 }
+    dd58:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    dd60:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    dd68:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    dd70:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    dd78:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    dd80:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    dd88:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    dd90:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    dd98:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    dda0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    dda8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    ddb0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    ddb8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    ddc0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    ddc8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    ddd0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    ddd8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    dde0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    dde8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+    ddf0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    ddf8:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; prefetch_l3 r25 }
+    de00:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    de08:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    de10:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    de18:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    de20:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    de28:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shli r15, r16, 5 }
+    de30:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shrsi r15, r16, 5 }
+    de38:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shruxi r15, r16, 5 }
+    de40:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    de48:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    de50:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    de58:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    de60:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; stnt2 r15, r16 }
+    de68:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+    de70:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    de78:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    de80:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    de88:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    de90:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    de98:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
+    dea0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    dea8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    deb0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    deb8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    dec0:	[0-9a-f]* 	{ ctz r5, r6 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
+    dec8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; st r25, r26 }
+    ded0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+    ded8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+    dee0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    dee8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    def0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+    def8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    df00:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    df08:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    df10:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+    df18:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; nop ; ld4s r25, r26 }
+    df20:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    df28:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    df30:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    df38:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+    df40:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    df48:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    df50:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4s r25, r26 }
+    df58:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 }
+    df60:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    df68:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    df70:	[0-9a-f]* 	{ pcnt r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    df78:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+    df80:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    df88:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    df90:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    df98:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    dfa0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    dfa8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+    dfb0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    dfb8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    dfc0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    dfc8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    dfd0:	[0-9a-f]* 	{ revbytes r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
+    dfd8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+    dfe0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    dfe8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    dff0:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    dff8:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+    e000:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    e008:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    e010:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+    e018:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; st1 r25, r26 }
+    e020:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 }
+    e028:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; nop ; st2 r25, r26 }
+    e030:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    e038:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    e040:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    e048:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    e050:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    e058:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; v1mz r5, r6, r7 }
+    e060:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; v2packuc r5, r6, r7 }
+    e068:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+    e070:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    e078:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    e080:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    e088:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpexch r15, r16, r17 }
+    e090:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    e098:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    e0a0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; dtlbpr r15 }
+    e0a8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+    e0b0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    e0b8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+    e0c0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    e0c8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    e0d0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    e0d8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    e0e0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    e0e8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    e0f0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    e0f8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    e100:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    e108:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    e110:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    e118:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    e120:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    e128:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    e130:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    e138:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    e140:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    e148:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    e150:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    e158:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    e160:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+    e168:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    e170:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    e178:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    e180:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    e188:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    e190:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shli r15, r16, 5 }
+    e198:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shrsi r15, r16, 5 }
+    e1a0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shruxi r15, r16, 5 }
+    e1a8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    e1b0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    e1b8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    e1c0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    e1c8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; stnt2 r15, r16 }
+    e1d0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+    e1d8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    e1e0:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    e1e8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    e1f0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    e1f8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    e200:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
+    e208:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    e210:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    e218:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    e220:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    e228:	[0-9a-f]* 	{ ctz r5, r6 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
+    e230:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; st r25, r26 }
+    e238:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+    e240:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; ld r25, r26 }
+    e248:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+    e250:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    e258:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld1u r25, r26 }
+    e260:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    e268:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    e270:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; ld2u r25, r26 }
+    e278:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; ld2u r25, r26 }
+    e280:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; nop ; ld4s r25, r26 }
+    e288:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    e290:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    e298:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    e2a0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+    e2a8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    e2b0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    e2b8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
+    e2c0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+    e2c8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    e2d0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    e2d8:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    e2e0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch r25 }
+    e2e8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    e2f0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    e2f8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
+    e300:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    e308:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    e310:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+    e318:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    e320:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    e328:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    e330:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    e338:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
+    e340:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+    e348:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    e350:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    e358:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    e360:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+    e368:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    e370:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    e378:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+    e380:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; st1 r25, r26 }
+    e388:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 }
+    e390:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; nop ; st2 r25, r26 }
+    e398:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    e3a0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    e3a8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    e3b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2_fault r25 }
+    e3b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l3_fault r25 }
+    e3c0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; v1mz r5, r6, r7 }
+    e3c8:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; v2packuc r5, r6, r7 }
+    e3d0:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+    e3d8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    e3e0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    e3e8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    e3f0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpexch r15, r16, r17 }
+    e3f8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    e400:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    e408:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; dtlbpr r15 }
+    e410:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; ill ; ld4u r25, r26 }
+    e418:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    e420:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; jr r15 ; prefetch r25 }
+    e428:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    e430:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    e438:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    e440:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    e448:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    e450:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    e458:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    e460:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    e468:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    e470:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    e478:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    e480:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    e488:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    e490:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    e498:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    e4a0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    e4a8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    e4b0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    e4b8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; prefetch_l2_fault r25 }
+    e4c0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    e4c8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; prefetch_l3 r25 }
+    e4d0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    e4d8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    e4e0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    e4e8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    e4f0:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    e4f8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shli r15, r16, 5 }
+    e500:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shrsi r15, r16, 5 }
+    e508:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shruxi r15, r16, 5 }
+    e510:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    e518:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    e520:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    e528:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    e530:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; stnt2 r15, r16 }
+    e538:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+    e540:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    e548:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    e550:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    e558:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    e560:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    e568:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    e570:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    e578:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    e580:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    e588:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    e590:	[0-9a-f]* 	{ ctz r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    e598:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; st r25, r26 }
+    e5a0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+    e5a8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+    e5b0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
+    e5b8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    e5c0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+    e5c8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    e5d0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    e5d8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    e5e0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+    e5e8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; nop ; ld4s r25, r26 }
+    e5f0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    e5f8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    e600:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    e608:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+    e610:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    e618:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    e620:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+    e628:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    e630:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    e638:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    e640:	[0-9a-f]* 	{ pcnt r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    e648:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch r25 }
+    e650:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    e658:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    e660:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    e668:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    e670:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    e678:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+    e680:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    e688:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    e690:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    e698:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    e6a0:	[0-9a-f]* 	{ revbytes r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+    e6a8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+    e6b0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    e6b8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    e6c0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    e6c8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+    e6d0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    e6d8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    e6e0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+    e6e8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; st1 r25, r26 }
+    e6f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+    e6f8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; nop ; st2 r25, r26 }
+    e700:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    e708:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    e710:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    e718:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    e720:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    e728:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; v1mz r5, r6, r7 }
+    e730:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; v2packuc r5, r6, r7 }
+    e738:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+    e740:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    e748:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    e750:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    e758:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpexch r15, r16, r17 }
+    e760:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    e768:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    e770:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; dtlbpr r15 }
+    e778:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+    e780:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    e788:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+    e790:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    e798:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    e7a0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    e7a8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    e7b0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    e7b8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    e7c0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    e7c8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    e7d0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    e7d8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    e7e0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    e7e8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    e7f0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    e7f8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    e800:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    e808:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    e810:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    e818:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    e820:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    e828:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    e830:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; prefetch_l3 r25 }
+    e838:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    e840:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    e848:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    e850:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    e858:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    e860:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shli r15, r16, 5 }
+    e868:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shrsi r15, r16, 5 }
+    e870:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shruxi r15, r16, 5 }
+    e878:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    e880:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    e888:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    e890:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    e898:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; stnt2 r15, r16 }
+    e8a0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+    e8a8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    e8b0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    e8b8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    e8c0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    e8c8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    e8d0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
+    e8d8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    e8e0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    e8e8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    e8f0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    e8f8:	[0-9a-f]* 	{ ctz r5, r6 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
+    e900:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; st r25, r26 }
+    e908:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+    e910:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 }
+    e918:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3add r15, r16, r17 ; ld1s r25, r26 }
+    e920:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    e928:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+    e930:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    e938:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    e940:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; ld2u r25, r26 }
+    e948:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; ld2u r25, r26 }
+    e950:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; nop ; ld4s r25, r26 }
+    e958:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    e960:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    e968:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    e970:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l2 r25 }
+    e978:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+    e980:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+    e988:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; ld4s r25, r26 }
+    e990:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3add r15, r16, r17 ; ld4u r25, r26 }
+    e998:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    e9a0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    e9a8:	[0-9a-f]* 	{ pcnt r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+    e9b0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+    e9b8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    e9c0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    e9c8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
+    e9d0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    e9d8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    e9e0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+    e9e8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+    e9f0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    e9f8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    ea00:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    ea08:	[0-9a-f]* 	{ revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+    ea10:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+    ea18:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    ea20:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    ea28:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    ea30:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+    ea38:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    ea40:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    ea48:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+    ea50:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; st1 r25, r26 }
+    ea58:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; st1 r25, r26 }
+    ea60:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; nop ; st2 r25, r26 }
+    ea68:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    ea70:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    ea78:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    ea80:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+    ea88:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 }
+    ea90:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; v1mz r5, r6, r7 }
+    ea98:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; v2packuc r5, r6, r7 }
+    eaa0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+    eaa8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    eab0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    eab8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    eac0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpexch r15, r16, r17 }
+    eac8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    ead0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    ead8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; dtlbpr r15 }
+    eae0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; ill ; ld4u r25, r26 }
+    eae8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    eaf0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; jr r15 ; prefetch r25 }
+    eaf8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    eb00:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    eb08:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    eb10:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    eb18:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    eb20:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    eb28:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    eb30:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    eb38:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    eb40:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    eb48:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    eb50:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    eb58:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    eb60:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    eb68:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    eb70:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    eb78:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    eb80:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    eb88:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; prefetch_l2_fault r25 }
+    eb90:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    eb98:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; prefetch_l3 r25 }
+    eba0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    eba8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    ebb0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    ebb8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    ebc0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    ebc8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shli r15, r16, 5 }
+    ebd0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shrsi r15, r16, 5 }
+    ebd8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shruxi r15, r16, 5 }
+    ebe0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    ebe8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    ebf0:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    ebf8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    ec00:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; stnt2 r15, r16 }
+    ec08:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+    ec10:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    ec18:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    ec20:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    ec28:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    ec30:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    ec38:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    ec40:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    ec48:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    ec50:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    ec58:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    ec60:	[0-9a-f]* 	{ ctz r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    ec68:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; st r25, r26 }
+    ec70:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+    ec78:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld r25, r26 }
+    ec80:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+    ec88:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    ec90:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+    ec98:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    eca0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    eca8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    ecb0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+    ecb8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; nop ; ld4s r25, r26 }
+    ecc0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    ecc8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    ecd0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+    ecd8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
+    ece0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    ece8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    ecf0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    ecf8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+    ed00:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    ed08:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    ed10:	[0-9a-f]* 	{ pcnt r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    ed18:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+    ed20:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    ed28:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    ed30:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1_fault r25 }
+    ed38:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    ed40:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    ed48:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+    ed50:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    ed58:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    ed60:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    ed68:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    ed70:	[0-9a-f]* 	{ revbytes r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+    ed78:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+    ed80:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    ed88:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    ed90:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    ed98:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+    eda0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    eda8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+    edb0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+    edb8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; st1 r25, r26 }
+    edc0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+    edc8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; nop ; st2 r25, r26 }
+    edd0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    edd8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    ede0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    ede8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l2_fault r25 }
+    edf0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+    edf8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; v1mz r5, r6, r7 }
+    ee00:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; v2packuc r5, r6, r7 }
+    ee08:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+    ee10:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+    ee18:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    ee20:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+    ee28:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpexch r15, r16, r17 }
+    ee30:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    ee38:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    ee40:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; dtlbpr r15 }
+    ee48:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+    ee50:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+    ee58:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+    ee60:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+    ee68:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+    ee70:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    ee78:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    ee80:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    ee88:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    ee90:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+    ee98:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    eea0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    eea8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+    eeb0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+    eeb8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    eec0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    eec8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    eed0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+    eed8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    eee0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    eee8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    eef0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+    eef8:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    ef00:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; prefetch_l3 r25 }
+    ef08:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    ef10:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    ef18:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    ef20:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+    ef28:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    ef30:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shli r15, r16, 5 }
+    ef38:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shrsi r15, r16, 5 }
+    ef40:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shruxi r15, r16, 5 }
+    ef48:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+    ef50:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    ef58:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+    ef60:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    ef68:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; stnt2 r15, r16 }
+    ef70:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+    ef78:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+    ef80:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    ef88:	[0-9a-f]* 	{ shli r15, r16, 5 ; addi r5, r6, 5 ; ld4s r25, r26 }
+    ef90:	[0-9a-f]* 	{ shli r15, r16, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+    ef98:	[0-9a-f]* 	{ shli r15, r16, 5 ; andi r5, r6, 5 ; ld4u r25, r26 }
+    efa0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
+    efa8:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    efb0:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+    efb8:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+    efc0:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+    efc8:	[0-9a-f]* 	{ ctz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 }
+    efd0:	[0-9a-f]* 	{ shli r15, r16, 5 ; st r25, r26 }
+    efd8:	[0-9a-f]* 	{ shli r15, r16, 5 ; info 19 ; prefetch_l2 r25 }
+    efe0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; ld r25, r26 }
+    efe8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 }
+    eff0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+    eff8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+    f000:	[0-9a-f]* 	{ shli r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 }
+    f008:	[0-9a-f]* 	{ shli r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+    f010:	[0-9a-f]* 	{ shli r15, r16, 5 ; ld2u r25, r26 }
+    f018:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; ld2u r25, r26 }
+    f020:	[0-9a-f]* 	{ shli r15, r16, 5 ; nop ; ld4s r25, r26 }
+    f028:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+    f030:	[0-9a-f]* 	{ shli r15, r16, 5 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+    f038:	[0-9a-f]* 	{ shli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 }
+    f040:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
+    f048:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    f050:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    f058:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; ld4s r25, r26 }
+    f060:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shli r15, r16, 5 ; ld4u r25, r26 }
+    f068:	[0-9a-f]* 	{ shli r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
+    f070:	[0-9a-f]* 	{ shli r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+    f078:	[0-9a-f]* 	{ pcnt r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+    f080:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    f088:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 }
+    f090:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    f098:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+    f0a0:	[0-9a-f]* 	{ shli r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+    f0a8:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+    f0b0:	[0-9a-f]* 	{ shli r15, r16, 5 ; info 19 ; prefetch_l2_fault r25 }
+    f0b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+    f0c0:	[0-9a-f]* 	{ shli r15, r16, 5 ; or r5, r6, r7 ; prefetch_l3 r25 }
+    f0c8:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    f0d0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+    f0d8:	[0-9a-f]* 	{ revbytes r5, r6 ; shli r15, r16, 5 ; prefetch_l3 r25 }
+    f0e0:	[0-9a-f]* 	{ shli r15, r16, 5 ; rotli r5, r6, 5 ; st r25, r26 }
+    f0e8:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+    f0f0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+    f0f8:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+    f100:	[0-9a-f]* 	{ shli r15, r16, 5 ; shrs r5, r6, r7 ; ld r25, r26 }
+    f108:	[0-9a-f]* 	{ shli r15, r16, 5 ; shru r5, r6, r7 ; ld1u r25, r26 }
+    f110:	[0-9a-f]* 	{ shli r15, r16, 5 ; addi r5, r6, 5 ; st r25, r26 }
+    f118:	[0-9a-f]* 	{ shli r15, r16, 5 ; rotl r5, r6, r7 ; st r25, r26 }
+    f120:	[0-9a-f]* 	{ shli r15, r16, 5 ; st1 r25, r26 }
+    f128:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; st1 r25, r26 }
+    f130:	[0-9a-f]* 	{ shli r15, r16, 5 ; nop ; st2 r25, r26 }
+    f138:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+    f140:	[0-9a-f]* 	{ shli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+    f148:	[0-9a-f]* 	{ shli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+    f150:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+    f158:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    f160:	[0-9a-f]* 	{ shli r15, r16, 5 ; v1mz r5, r6, r7 }
+    f168:	[0-9a-f]* 	{ shli r15, r16, 5 ; v2packuc r5, r6, r7 }
+    f170:	[0-9a-f]* 	{ shli r15, r16, 5 ; xor r5, r6, r7 ; st1 r25, r26 }
+    f178:	[0-9a-f]* 	{ shli r5, r6, 5 ; addi r15, r16, 5 ; st2 r25, r26 }
+    f180:	[0-9a-f]* 	{ shli r5, r6, 5 ; addxi r15, r16, 5 ; st4 r25, r26 }
+    f188:	[0-9a-f]* 	{ shli r5, r6, 5 ; andi r15, r16, 5 ; st4 r25, r26 }
+    f190:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpexch r15, r16, r17 }
+    f198:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 }
+    f1a0:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+    f1a8:	[0-9a-f]* 	{ shli r5, r6, 5 ; dtlbpr r15 }
+    f1b0:	[0-9a-f]* 	{ shli r5, r6, 5 ; ill ; ld4u r25, r26 }
+    f1b8:	[0-9a-f]* 	{ shli r5, r6, 5 ; jalr r15 ; ld4s r25, r26 }
+    f1c0:	[0-9a-f]* 	{ shli r5, r6, 5 ; jr r15 ; prefetch r25 }
+    f1c8:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 }
+    f1d0:	[0-9a-f]* 	{ shli r5, r6, 5 ; add r15, r16, r17 ; ld1s r25, r26 }
+    f1d8:	[0-9a-f]* 	{ shli r5, r6, 5 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+    f1e0:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 }
+    f1e8:	[0-9a-f]* 	{ shli r5, r6, 5 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+    f1f0:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+    f1f8:	[0-9a-f]* 	{ shli r5, r6, 5 ; and r15, r16, r17 ; ld4s r25, r26 }
+    f200:	[0-9a-f]* 	{ shli r5, r6, 5 ; subx r15, r16, r17 ; ld4s r25, r26 }
+    f208:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+    f210:	[0-9a-f]* 	{ shli r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 }
+    f218:	[0-9a-f]* 	{ shli r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 }
+    f220:	[0-9a-f]* 	{ shli r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+    f228:	[0-9a-f]* 	{ shli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+    f230:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 }
+    f238:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch_add_l3_fault r15, 5 }
+    f240:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 ; prefetch r25 }
+    f248:	[0-9a-f]* 	{ shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+    f250:	[0-9a-f]* 	{ shli r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+    f258:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch_l2_fault r25 }
+    f260:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+    f268:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch_l3 r25 }
+    f270:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+    f278:	[0-9a-f]* 	{ shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+    f280:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+    f288:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 }
+    f290:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+    f298:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 }
+    f2a0:	[0-9a-f]* 	{ shli r5, r6, 5 ; shrsi r15, r16, 5 }
+    f2a8:	[0-9a-f]* 	{ shli r5, r6, 5 ; shruxi r15, r16, 5 }
+    f2b0:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 }
+    f2b8:	[0-9a-f]* 	{ shli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
+    f2c0:	[0-9a-f]* 	{ shli r5, r6, 5 ; lnk r15 ; st2 r25, r26 }
+    f2c8:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+    f2d0:	[0-9a-f]* 	{ shli r5, r6, 5 ; stnt2 r15, r16 }
+    f2d8:	[0-9a-f]* 	{ shli r5, r6, 5 ; subx r15, r16, r17 ; st2 r25, r26 }
+    f2e0:	[0-9a-f]* 	{ shli r5, r6, 5 ; v2cmpltsi r15, r16, 5 }
+    f2e8:	[0-9a-f]* 	{ shli r5, r6, 5 ; xor r15, r16, r17 ; ld2u r25, r26 }
+    f2f0:	[0-9a-f]* 	{ cmul r5, r6, r7 ; shlx r15, r16, r17 }
+    f2f8:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; shlx r15, r16, r17 }
+    f300:	[0-9a-f]* 	{ shlx r15, r16, r17 ; shrs r5, r6, r7 }
+    f308:	[0-9a-f]* 	{ shlx r15, r16, r17 ; v1maxu r5, r6, r7 }
+    f310:	[0-9a-f]* 	{ shlx r15, r16, r17 ; v2minsi r5, r6, 5 }
+    f318:	[0-9a-f]* 	{ shlx r5, r6, r7 ; addxli r15, r16, 4660 }
+    f320:	[0-9a-f]* 	{ shlx r5, r6, r7 ; jalrp r15 }
+    f328:	[0-9a-f]* 	{ shlx r5, r6, r7 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+    f330:	[0-9a-f]* 	{ shlx r5, r6, r7 ; st1 r15, r16 }
+    f338:	[0-9a-f]* 	{ shlx r5, r6, r7 ; v1shrs r15, r16, r17 }
+    f340:	[0-9a-f]* 	{ shlx r5, r6, r7 ; v4int_h r15, r16, r17 }
+    f348:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; shlxi r15, r16, 5 }
+    f350:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shlxi r15, r16, 5 }
+    f358:	[0-9a-f]* 	{ shlxi r15, r16, 5 ; shrux r5, r6, r7 }
+    f360:	[0-9a-f]* 	{ shlxi r15, r16, 5 ; v1mnz r5, r6, r7 }
+    f368:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; shlxi r15, r16, 5 }
+    f370:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; cmpeq r15, r16, r17 }
+    f378:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; ld1s r15, r16 }
+    f380:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; or r15, r16, r17 }
+    f388:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; st4 r15, r16 }
+    f390:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; v1sub r15, r16, r17 }
+    f398:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; v4shlsc r15, r16, r17 }
+    f3a0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+    f3a8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+    f3b0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 }
+    f3b8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    f3c0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+    f3c8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 }
+    f3d0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+    f3d8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    f3e0:	[0-9a-f]* 	{ ctz r5, r6 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    f3e8:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; shrs r15, r16, r17 }
+    f3f0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; info 19 }
+    f3f8:	[0-9a-f]* 	{ pcnt r5, r6 ; shrs r15, r16, r17 ; ld r25, r26 }
+    f400:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
+    f408:	[0-9a-f]* 	{ shrs r15, r16, r17 ; sub r5, r6, r7 ; ld1s r25, r26 }
+    f410:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    f418:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    f420:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
+    f428:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+    f430:	[0-9a-f]* 	{ shrs r15, r16, r17 ; addxi r5, r6, 5 ; ld4s r25, r26 }
+    f438:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
+    f440:	[0-9a-f]* 	{ shrs r15, r16, r17 ; info 19 ; ld4u r25, r26 }
+    f448:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+    f450:	[0-9a-f]* 	{ shrs r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
+    f458:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrs r15, r16, r17 }
+    f460:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    f468:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+    f470:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    f478:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+    f480:	[0-9a-f]* 	{ shrs r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 }
+    f488:	[0-9a-f]* 	{ shrs r15, r16, r17 ; nor r5, r6, r7 }
+    f490:	[0-9a-f]* 	{ shrs r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
+    f498:	[0-9a-f]* 	{ revbytes r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+    f4a0:	[0-9a-f]* 	{ ctz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+    f4a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+    f4b0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
+    f4b8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
+    f4c0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+    f4c8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l2_fault r25 }
+    f4d0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3 r25 }
+    f4d8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+    f4e0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; move r5, r6 ; prefetch_l3_fault r25 }
+    f4e8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+    f4f0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+    f4f8:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
+    f500:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+    f508:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    f510:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    f518:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+    f520:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    f528:	[0-9a-f]* 	{ shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    f530:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; st r25, r26 }
+    f538:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
+    f540:	[0-9a-f]* 	{ shrs r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
+    f548:	[0-9a-f]* 	{ shrs r15, r16, r17 ; shl r5, r6, r7 ; st2 r25, r26 }
+    f550:	[0-9a-f]* 	{ shrs r15, r16, r17 ; info 19 ; st4 r25, r26 }
+    f558:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 }
+    f560:	[0-9a-f]* 	{ shrs r15, r16, r17 ; subx r5, r6, r7 }
+    f568:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrs r15, r16, r17 ; ld r25, r26 }
+    f570:	[0-9a-f]* 	{ shrs r15, r16, r17 ; v1adduc r5, r6, r7 }
+    f578:	[0-9a-f]* 	{ shrs r15, r16, r17 ; v1shrui r5, r6, 5 }
+    f580:	[0-9a-f]* 	{ shrs r15, r16, r17 ; v2shrs r5, r6, r7 }
+    f588:	[0-9a-f]* 	{ shrs r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+    f590:	[0-9a-f]* 	{ shrs r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
+    f598:	[0-9a-f]* 	{ shrs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+    f5a0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    f5a8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    f5b0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    f5b8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+    f5c0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    f5c8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; ill ; st r25, r26 }
+    f5d0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    f5d8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+    f5e0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; info 19 ; ld r25, r26 }
+    f5e8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 }
+    f5f0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; ld1u r15, r16 }
+    f5f8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    f600:	[0-9a-f]* 	{ shrs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+    f608:	[0-9a-f]* 	{ shrs r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
+    f610:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
+    f618:	[0-9a-f]* 	{ shrs r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    f620:	[0-9a-f]* 	{ shrs r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    f628:	[0-9a-f]* 	{ shrs r5, r6, r7 ; lnk r15 }
+    f630:	[0-9a-f]* 	{ shrs r5, r6, r7 ; move r15, r16 }
+    f638:	[0-9a-f]* 	{ shrs r5, r6, r7 ; mz r15, r16, r17 }
+    f640:	[0-9a-f]* 	{ shrs r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
+    f648:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    f650:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    f658:	[0-9a-f]* 	{ shrs r5, r6, r7 ; prefetch r25 }
+    f660:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+    f668:	[0-9a-f]* 	{ shrs r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    f670:	[0-9a-f]* 	{ shrs r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+    f678:	[0-9a-f]* 	{ shrs r5, r6, r7 ; prefetch_l3 r25 }
+    f680:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    f688:	[0-9a-f]* 	{ shrs r5, r6, r7 ; prefetch_l3_fault r25 }
+    f690:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
+    f698:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    f6a0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+    f6a8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    f6b0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+    f6b8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+    f6c0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
+    f6c8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; st r25, r26 }
+    f6d0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 }
+    f6d8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
+    f6e0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
+    f6e8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
+    f6f0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+    f6f8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; v2mins r15, r16, r17 }
+    f700:	[0-9a-f]* 	{ shrs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    f708:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+    f710:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
+    f718:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 }
+    f720:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    f728:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+    f730:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 }
+    f738:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+    f740:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    f748:	[0-9a-f]* 	{ ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    f750:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; shrsi r15, r16, 5 }
+    f758:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; info 19 }
+    f760:	[0-9a-f]* 	{ pcnt r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
+    f768:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
+    f770:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; sub r5, r6, r7 ; ld1s r25, r26 }
+    f778:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+    f780:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    f788:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
+    f790:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; ld2u r25, r26 }
+    f798:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; addxi r5, r6, 5 ; ld4s r25, r26 }
+    f7a0:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
+    f7a8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; info 19 ; ld4u r25, r26 }
+    f7b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+    f7b8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
+    f7c0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 }
+    f7c8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+    f7d0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+    f7d8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    f7e0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+    f7e8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 }
+    f7f0:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; nor r5, r6, r7 }
+    f7f8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 }
+    f800:	[0-9a-f]* 	{ revbytes r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
+    f808:	[0-9a-f]* 	{ ctz r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
+    f810:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrsi r15, r16, 5 ; prefetch r25 }
+    f818:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
+    f820:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
+    f828:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+    f830:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
+    f838:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3 r25 }
+    f840:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+    f848:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; move r5, r6 ; prefetch_l3_fault r25 }
+    f850:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+    f858:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+    f860:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
+    f868:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+    f870:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    f878:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    f880:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
+    f888:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    f890:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    f898:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; st r25, r26 }
+    f8a0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+    f8a8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
+    f8b0:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shl r5, r6, r7 ; st2 r25, r26 }
+    f8b8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; info 19 ; st4 r25, r26 }
+    f8c0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrsi r15, r16, 5 ; st4 r25, r26 }
+    f8c8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; subx r5, r6, r7 }
+    f8d0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
+    f8d8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; v1adduc r5, r6, r7 }
+    f8e0:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; v1shrui r5, r6, 5 }
+    f8e8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; v2shrs r5, r6, r7 }
+    f8f0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
+    f8f8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 }
+    f900:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 }
+    f908:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    f910:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    f918:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
+    f920:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+    f928:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; fetchand4 r15, r16, r17 }
+    f930:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; ill ; st r25, r26 }
+    f938:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
+    f940:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jr r15 ; st1 r25, r26 }
+    f948:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; info 19 ; ld r25, r26 }
+    f950:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld1s r25, r26 }
+    f958:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; ld1u r15, r16 }
+    f960:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    f968:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+    f970:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; lnk r15 ; ld2u r25, r26 }
+    f978:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
+    f980:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    f988:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    f990:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; lnk r15 }
+    f998:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; move r15, r16 }
+    f9a0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; mz r15, r16, r17 }
+    f9a8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 }
+    f9b0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jrp r15 ; prefetch r25 }
+    f9b8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    f9c0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; prefetch r25 }
+    f9c8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+    f9d0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    f9d8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+    f9e0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; prefetch_l3 r25 }
+    f9e8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    f9f0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
+    f9f8:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 }
+    fa00:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    fa08:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+    fa10:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    fa18:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+    fa20:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+    fa28:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; st r25, r26 }
+    fa30:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; st r25, r26 }
+    fa38:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; shli r15, r16, 5 ; st1 r25, r26 }
+    fa40:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; rotl r15, r16, r17 ; st2 r25, r26 }
+    fa48:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; jrp r15 ; st4 r25, r26 }
+    fa50:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 }
+    fa58:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
+    fa60:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; v2mins r15, r16, r17 }
+    fa68:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    fa70:	[0-9a-f]* 	{ shru r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+    fa78:	[0-9a-f]* 	{ shru r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+    fa80:	[0-9a-f]* 	{ shru r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 }
+    fa88:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
+    fa90:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+    fa98:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 }
+    faa0:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+    faa8:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    fab0:	[0-9a-f]* 	{ ctz r5, r6 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
+    fab8:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; shru r15, r16, r17 }
+    fac0:	[0-9a-f]* 	{ shru r15, r16, r17 ; info 19 }
+    fac8:	[0-9a-f]* 	{ pcnt r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
+    fad0:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
+    fad8:	[0-9a-f]* 	{ shru r15, r16, r17 ; sub r5, r6, r7 ; ld1s r25, r26 }
+    fae0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 }
+    fae8:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    faf0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
+    faf8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+    fb00:	[0-9a-f]* 	{ shru r15, r16, r17 ; addxi r5, r6, 5 ; ld4s r25, r26 }
+    fb08:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
+    fb10:	[0-9a-f]* 	{ shru r15, r16, r17 ; info 19 ; ld4u r25, r26 }
+    fb18:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
+    fb20:	[0-9a-f]* 	{ shru r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
+    fb28:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shru r15, r16, r17 }
+    fb30:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+    fb38:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
+    fb40:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l3_fault r25 }
+    fb48:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+    fb50:	[0-9a-f]* 	{ shru r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 }
+    fb58:	[0-9a-f]* 	{ shru r15, r16, r17 ; nor r5, r6, r7 }
+    fb60:	[0-9a-f]* 	{ shru r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
+    fb68:	[0-9a-f]* 	{ revbytes r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
+    fb70:	[0-9a-f]* 	{ ctz r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
+    fb78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shru r15, r16, r17 ; prefetch r25 }
+    fb80:	[0-9a-f]* 	{ shru r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
+    fb88:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
+    fb90:	[0-9a-f]* 	{ shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+    fb98:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2_fault r25 }
+    fba0:	[0-9a-f]* 	{ shru r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3 r25 }
+    fba8:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+    fbb0:	[0-9a-f]* 	{ shru r15, r16, r17 ; move r5, r6 ; prefetch_l3_fault r25 }
+    fbb8:	[0-9a-f]* 	{ shru r15, r16, r17 ; prefetch_l3_fault r25 }
+    fbc0:	[0-9a-f]* 	{ shru r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+    fbc8:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
+    fbd0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+    fbd8:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    fbe0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    fbe8:	[0-9a-f]* 	{ shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+    fbf0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    fbf8:	[0-9a-f]* 	{ shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    fc00:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl3addx r5, r6, r7 ; st r25, r26 }
+    fc08:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+    fc10:	[0-9a-f]* 	{ shru r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
+    fc18:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl r5, r6, r7 ; st2 r25, r26 }
+    fc20:	[0-9a-f]* 	{ shru r15, r16, r17 ; info 19 ; st4 r25, r26 }
+    fc28:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 }
+    fc30:	[0-9a-f]* 	{ shru r15, r16, r17 ; subx r5, r6, r7 }
+    fc38:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
+    fc40:	[0-9a-f]* 	{ shru r15, r16, r17 ; v1adduc r5, r6, r7 }
+    fc48:	[0-9a-f]* 	{ shru r15, r16, r17 ; v1shrui r5, r6, 5 }
+    fc50:	[0-9a-f]* 	{ shru r15, r16, r17 ; v2shrs r5, r6, r7 }
+    fc58:	[0-9a-f]* 	{ shru r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+    fc60:	[0-9a-f]* 	{ shru r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
+    fc68:	[0-9a-f]* 	{ shru r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+    fc70:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    fc78:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    fc80:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+    fc88:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+    fc90:	[0-9a-f]* 	{ shru r5, r6, r7 ; fetchand4 r15, r16, r17 }
+    fc98:	[0-9a-f]* 	{ shru r5, r6, r7 ; ill ; st r25, r26 }
+    fca0:	[0-9a-f]* 	{ shru r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+    fca8:	[0-9a-f]* 	{ shru r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+    fcb0:	[0-9a-f]* 	{ shru r5, r6, r7 ; info 19 ; ld r25, r26 }
+    fcb8:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmples r15, r16, r17 ; ld1s r25, r26 }
+    fcc0:	[0-9a-f]* 	{ shru r5, r6, r7 ; ld1u r15, r16 }
+    fcc8:	[0-9a-f]* 	{ shru r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+    fcd0:	[0-9a-f]* 	{ shru r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+    fcd8:	[0-9a-f]* 	{ shru r5, r6, r7 ; lnk r15 ; ld2u r25, r26 }
+    fce0:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
+    fce8:	[0-9a-f]* 	{ shru r5, r6, r7 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+    fcf0:	[0-9a-f]* 	{ shru r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+    fcf8:	[0-9a-f]* 	{ shru r5, r6, r7 ; lnk r15 }
+    fd00:	[0-9a-f]* 	{ shru r5, r6, r7 ; move r15, r16 }
+    fd08:	[0-9a-f]* 	{ shru r5, r6, r7 ; mz r15, r16, r17 }
+    fd10:	[0-9a-f]* 	{ shru r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
+    fd18:	[0-9a-f]* 	{ shru r5, r6, r7 ; jrp r15 ; prefetch r25 }
+    fd20:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+    fd28:	[0-9a-f]* 	{ shru r5, r6, r7 ; prefetch r25 }
+    fd30:	[0-9a-f]* 	{ shru r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+    fd38:	[0-9a-f]* 	{ shru r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+    fd40:	[0-9a-f]* 	{ shru r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+    fd48:	[0-9a-f]* 	{ shru r5, r6, r7 ; prefetch_l3 r25 }
+    fd50:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+    fd58:	[0-9a-f]* 	{ shru r5, r6, r7 ; prefetch_l3_fault r25 }
+    fd60:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
+    fd68:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+    fd70:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+    fd78:	[0-9a-f]* 	{ shru r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+    fd80:	[0-9a-f]* 	{ shru r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+    fd88:	[0-9a-f]* 	{ shru r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+    fd90:	[0-9a-f]* 	{ shru r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
+    fd98:	[0-9a-f]* 	{ shru r5, r6, r7 ; st r25, r26 }
+    fda0:	[0-9a-f]* 	{ shru r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 }
+    fda8:	[0-9a-f]* 	{ shru r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
+    fdb0:	[0-9a-f]* 	{ shru r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
+    fdb8:	[0-9a-f]* 	{ shru r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
+    fdc0:	[0-9a-f]* 	{ shru r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+    fdc8:	[0-9a-f]* 	{ shru r5, r6, r7 ; v2mins r15, r16, r17 }
+    fdd0:	[0-9a-f]* 	{ shru r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+    fdd8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+    fde0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
+    fde8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 }
+    fdf0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+    fdf8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+    fe00:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 }
+    fe08:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+    fe10:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+    fe18:	[0-9a-f]* 	{ ctz r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+    fe20:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; shrui r15, r16, 5 }
+    fe28:	[0-9a-f]* 	{ shrui r15, r16, 5 ; info 19 }
+    fe30:	[0-9a-f]* 	{ pcnt r5, r6 ; shrui r15, r16, 5 ; ld r25, r26 }
+    fe38:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
+    fe40:	[0-9a-f]* 	{ shrui r15, r16, 5 ; sub r5, r6, r7 ; ld1s r25, r26 }
+    fe48:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+    fe50:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+    fe58:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; ld2s r25, r26 }
+    fe60:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
+    fe68:	[0-9a-f]* 	{ shrui r15, r16, 5 ; addxi r5, r6, 5 ; ld4s r25, r26 }
+    fe70:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
+    fe78:	[0-9a-f]* 	{ shrui r15, r16, 5 ; info 19 ; ld4u r25, r26 }
+    fe80:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrui r15, r16, 5 ; ld4u r25, r26 }
+    fe88:	[0-9a-f]* 	{ shrui r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
+    fe90:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 }
+    fe98:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
+    fea0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+    fea8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+    feb0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; st r25, r26 }
+    feb8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 }
+    fec0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; nor r5, r6, r7 }
+    fec8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 }
+    fed0:	[0-9a-f]* 	{ revbytes r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+    fed8:	[0-9a-f]* 	{ ctz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+    fee0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+    fee8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1_fault r25 }
+    fef0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2 r25 }
+    fef8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+    ff00:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
+    ff08:	[0-9a-f]* 	{ shrui r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3 r25 }
+    ff10:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+    ff18:	[0-9a-f]* 	{ shrui r15, r16, 5 ; move r5, r6 ; prefetch_l3_fault r25 }
+    ff20:	[0-9a-f]* 	{ shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+    ff28:	[0-9a-f]* 	{ shrui r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+    ff30:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
+    ff38:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+    ff40:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+    ff48:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
+    ff50:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
+    ff58:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+    ff60:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
+    ff68:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; st r25, r26 }
+    ff70:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
+    ff78:	[0-9a-f]* 	{ shrui r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
+    ff80:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shl r5, r6, r7 ; st2 r25, r26 }
+    ff88:	[0-9a-f]* 	{ shrui r15, r16, 5 ; info 19 ; st4 r25, r26 }
+    ff90:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 }
+    ff98:	[0-9a-f]* 	{ shrui r15, r16, 5 ; subx r5, r6, r7 }
+    ffa0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld r25, r26 }
+    ffa8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; v1adduc r5, r6, r7 }
+    ffb0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; v1shrui r5, r6, 5 }
+    ffb8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; v2shrs r5, r6, r7 }
+    ffc0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
+    ffc8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 }
+    ffd0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 }
+    ffd8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+    ffe0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+    ffe8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
+    fff0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+    fff8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; fetchand4 r15, r16, r17 }
+   10000:	[0-9a-f]* 	{ shrui r5, r6, 5 ; ill ; st r25, r26 }
+   10008:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
+   10010:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jr r15 ; st1 r25, r26 }
+   10018:	[0-9a-f]* 	{ shrui r5, r6, 5 ; info 19 ; ld r25, r26 }
+   10020:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld1s r25, r26 }
+   10028:	[0-9a-f]* 	{ shrui r5, r6, 5 ; ld1u r15, r16 }
+   10030:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+   10038:	[0-9a-f]* 	{ shrui r5, r6, 5 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+   10040:	[0-9a-f]* 	{ shrui r5, r6, 5 ; lnk r15 ; ld2u r25, r26 }
+   10048:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; ld4s r25, r26 }
+   10050:	[0-9a-f]* 	{ shrui r5, r6, 5 ; addxi r15, r16, 5 ; ld4u r25, r26 }
+   10058:	[0-9a-f]* 	{ shrui r5, r6, 5 ; sub r15, r16, r17 ; ld4u r25, r26 }
+   10060:	[0-9a-f]* 	{ shrui r5, r6, 5 ; lnk r15 }
+   10068:	[0-9a-f]* 	{ shrui r5, r6, 5 ; move r15, r16 }
+   10070:	[0-9a-f]* 	{ shrui r5, r6, 5 ; mz r15, r16, r17 }
+   10078:	[0-9a-f]* 	{ shrui r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 }
+   10080:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jrp r15 ; prefetch r25 }
+   10088:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 }
+   10090:	[0-9a-f]* 	{ shrui r5, r6, 5 ; prefetch r25 }
+   10098:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+   100a0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2 r25 }
+   100a8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+   100b0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; prefetch_l3 r25 }
+   100b8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+   100c0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+   100c8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 }
+   100d0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+   100d8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+   100e0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+   100e8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+   100f0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+   100f8:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; st r25, r26 }
+   10100:	[0-9a-f]* 	{ shrui r5, r6, 5 ; st r25, r26 }
+   10108:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shli r15, r16, 5 ; st1 r25, r26 }
+   10110:	[0-9a-f]* 	{ shrui r5, r6, 5 ; rotl r15, r16, r17 ; st2 r25, r26 }
+   10118:	[0-9a-f]* 	{ shrui r5, r6, 5 ; jrp r15 ; st4 r25, r26 }
+   10120:	[0-9a-f]* 	{ shrui r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 }
+   10128:	[0-9a-f]* 	{ shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
+   10130:	[0-9a-f]* 	{ shrui r5, r6, 5 ; v2mins r15, r16, r17 }
+   10138:	[0-9a-f]* 	{ shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+   10140:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; shrux r15, r16, r17 }
+   10148:	[0-9a-f]* 	{ mula_hs_hu r5, r6, r7 ; shrux r15, r16, r17 }
+   10150:	[0-9a-f]* 	{ shrux r15, r16, r17 ; subx r5, r6, r7 }
+   10158:	[0-9a-f]* 	{ shrux r15, r16, r17 ; v1mz r5, r6, r7 }
+   10160:	[0-9a-f]* 	{ shrux r15, r16, r17 ; v2packuc r5, r6, r7 }
+   10168:	[0-9a-f]* 	{ shrux r5, r6, r7 ; cmples r15, r16, r17 }
+   10170:	[0-9a-f]* 	{ shrux r5, r6, r7 ; ld2s r15, r16 }
+   10178:	[0-9a-f]* 	{ shrux r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+   10180:	[0-9a-f]* 	{ shrux r5, r6, r7 ; stnt1 r15, r16 }
+   10188:	[0-9a-f]* 	{ shrux r5, r6, r7 ; v2addsc r15, r16, r17 }
+   10190:	[0-9a-f]* 	{ shrux r5, r6, r7 ; v4subsc r15, r16, r17 }
+   10198:	[0-9a-f]* 	{ shruxi r15, r16, 5 ; dblalign4 r5, r6, r7 }
+   101a0:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; shruxi r15, r16, 5 }
+   101a8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shruxi r15, r16, 5 }
+   101b0:	[0-9a-f]* 	{ shruxi r15, r16, 5 ; v1shli r5, r6, 5 }
+   101b8:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; shruxi r15, r16, 5 }
+   101c0:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; cmpltu r15, r16, r17 }
+   101c8:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; ld4s r15, r16 }
+   101d0:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; prefetch_add_l3_fault r15, 5 }
+   101d8:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; stnt4 r15, r16 }
+   101e0:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
+   101e8:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; add r15, r16, r17 }
+   101f0:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; info 19 }
+   101f8:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+   10200:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; shru r15, r16, r17 }
+   10208:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; v1minui r15, r16, 5 }
+   10210:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; v2shrui r15, r16, 5 }
+   10218:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; st r15, r16 }
+   10220:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; st r15, r16 }
+   10228:	[0-9a-f]* 	{ shlxi r5, r6, 5 ; st r15, r16 }
+   10230:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; st r15, r16 }
+   10238:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; st r15, r16 }
+   10240:	[0-9a-f]* 	{ add r15, r16, r17 ; and r5, r6, r7 ; st r25, r26 }
+   10248:	[0-9a-f]* 	{ add r15, r16, r17 ; shl1add r5, r6, r7 ; st r25, r26 }
+   10250:	[0-9a-f]* 	{ add r5, r6, r7 ; lnk r15 ; st r25, r26 }
+   10258:	[0-9a-f]* 	{ addi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st r25, r26 }
+   10260:	[0-9a-f]* 	{ addi r15, r16, 5 ; shrui r5, r6, 5 ; st r25, r26 }
+   10268:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl r15, r16, r17 ; st r25, r26 }
+   10270:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 }
+   10278:	[0-9a-f]* 	{ addx r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
+   10280:	[0-9a-f]* 	{ addx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+   10288:	[0-9a-f]* 	{ addxi r15, r16, 5 ; mz r5, r6, r7 ; st r25, r26 }
+   10290:	[0-9a-f]* 	{ addxi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st r25, r26 }
+   10298:	[0-9a-f]* 	{ and r15, r16, r17 ; and r5, r6, r7 ; st r25, r26 }
+   102a0:	[0-9a-f]* 	{ and r15, r16, r17 ; shl1add r5, r6, r7 ; st r25, r26 }
+   102a8:	[0-9a-f]* 	{ and r5, r6, r7 ; lnk r15 ; st r25, r26 }
+   102b0:	[0-9a-f]* 	{ andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st r25, r26 }
+   102b8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shrui r5, r6, 5 ; st r25, r26 }
+   102c0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl r15, r16, r17 ; st r25, r26 }
+   102c8:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 ; st r25, r26 }
+   102d0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; jalr r15 ; st r25, r26 }
+   102d8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
+   102e0:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+   102e8:	[0-9a-f]* 	{ cmpeq r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 }
+   102f0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jrp r15 ; st r25, r26 }
+   102f8:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st r25, r26 }
+   10300:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; st r25, r26 }
+   10308:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st r25, r26 }
+   10310:	[0-9a-f]* 	{ cmples r15, r16, r17 ; movei r5, 5 ; st r25, r26 }
+   10318:	[0-9a-f]* 	{ cmples r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
+   10320:	[0-9a-f]* 	{ cmples r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+   10328:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+   10330:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
+   10338:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+   10340:	[0-9a-f]* 	{ cmplts r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 }
+   10348:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jrp r15 ; st r25, r26 }
+   10350:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 ; st r25, r26 }
+   10358:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; st r25, r26 }
+   10360:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; rotli r15, r16, 5 ; st r25, r26 }
+   10368:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; movei r5, 5 ; st r25, r26 }
+   10370:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
+   10378:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+   10380:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
+   10388:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
+   10390:	[0-9a-f]* 	{ ctz r5, r6 ; addxi r15, r16, 5 ; st r25, r26 }
+   10398:	[0-9a-f]* 	{ ctz r5, r6 ; sub r15, r16, r17 ; st r25, r26 }
+   103a0:	[0-9a-f]* 	{ jalr r15 ; st r25, r26 }
+   103a8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; st r25, r26 }
+   103b0:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; st r25, r26 }
+   103b8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; ill ; st r25, r26 }
+   103c0:	[0-9a-f]* 	{ shl r5, r6, r7 ; ill ; st r25, r26 }
+   103c8:	[0-9a-f]* 	{ info 19 ; cmples r5, r6, r7 ; st r25, r26 }
+   103d0:	[0-9a-f]* 	{ info 19 ; nor r15, r16, r17 ; st r25, r26 }
+   103d8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; st r25, r26 }
+   103e0:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalr r15 ; st r25, r26 }
+   103e8:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jalrp r15 ; st r25, r26 }
+   103f0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jalrp r15 ; st r25, r26 }
+   103f8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jr r15 ; st r25, r26 }
+   10400:	[0-9a-f]* 	{ andi r5, r6, 5 ; jrp r15 ; st r25, r26 }
+   10408:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jrp r15 ; st r25, r26 }
+   10410:	[0-9a-f]* 	{ move r5, r6 ; lnk r15 ; st r25, r26 }
+   10418:	[0-9a-f]* 	{ lnk r15 ; st r25, r26 }
+   10420:	[0-9a-f]* 	{ revbits r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
+   10428:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; st r25, r26 }
+   10430:	[0-9a-f]* 	{ move r15, r16 ; cmpeq r5, r6, r7 ; st r25, r26 }
+   10438:	[0-9a-f]* 	{ move r15, r16 ; shl3addx r5, r6, r7 ; st r25, r26 }
+   10440:	[0-9a-f]* 	{ move r5, r6 ; nop ; st r25, r26 }
+   10448:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; st r25, r26 }
+   10450:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; st r25, r26 }
+   10458:	[0-9a-f]* 	{ movei r5, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
+   10460:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+   10468:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; st r25, r26 }
+   10470:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; ill ; st r25, r26 }
+   10478:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+   10480:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
+   10488:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+   10490:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+   10498:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 }
+   104a0:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; jrp r15 ; st r25, r26 }
+   104a8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
+   104b0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
+   104b8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; st r25, r26 }
+   104c0:	[0-9a-f]* 	{ revbits r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+   104c8:	[0-9a-f]* 	{ mz r5, r6, r7 ; info 19 ; st r25, r26 }
+   104d0:	[0-9a-f]* 	{ nop ; and r5, r6, r7 ; st r25, r26 }
+   104d8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; nop ; st r25, r26 }
+   104e0:	[0-9a-f]* 	{ nop ; shrsi r15, r16, 5 ; st r25, r26 }
+   104e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; st r25, r26 }
+   104f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
+   104f8:	[0-9a-f]* 	{ nor r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+   10500:	[0-9a-f]* 	{ mulx r5, r6, r7 ; or r15, r16, r17 ; st r25, r26 }
+   10508:	[0-9a-f]* 	{ or r5, r6, r7 ; cmplts r15, r16, r17 ; st r25, r26 }
+   10510:	[0-9a-f]* 	{ pcnt r5, r6 ; addxi r15, r16, 5 ; st r25, r26 }
+   10518:	[0-9a-f]* 	{ pcnt r5, r6 ; sub r15, r16, r17 ; st r25, r26 }
+   10520:	[0-9a-f]* 	{ revbits r5, r6 ; shl3add r15, r16, r17 ; st r25, r26 }
+   10528:	[0-9a-f]* 	{ revbytes r5, r6 ; rotl r15, r16, r17 ; st r25, r26 }
+   10530:	[0-9a-f]* 	{ rotl r15, r16, r17 ; move r5, r6 ; st r25, r26 }
+   10538:	[0-9a-f]* 	{ rotl r15, r16, r17 ; st r25, r26 }
+   10540:	[0-9a-f]* 	{ rotl r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+   10548:	[0-9a-f]* 	{ mulax r5, r6, r7 ; rotli r15, r16, 5 ; st r25, r26 }
+   10550:	[0-9a-f]* 	{ rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 }
+   10558:	[0-9a-f]* 	{ shl r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
+   10560:	[0-9a-f]* 	{ shl r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+   10568:	[0-9a-f]* 	{ shl r5, r6, r7 ; jr r15 ; st r25, r26 }
+   10570:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
+   10578:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
+   10580:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+   10588:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; move r5, r6 ; st r25, r26 }
+   10590:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; st r25, r26 }
+   10598:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+   105a0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+   105a8:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; cmpleu r15, r16, r17 ; st r25, r26 }
+   105b0:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
+   105b8:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+   105c0:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; jr r15 ; st r25, r26 }
+   105c8:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
+   105d0:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
+   105d8:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+   105e0:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; move r5, r6 ; st r25, r26 }
+   105e8:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; st r25, r26 }
+   105f0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+   105f8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+   10600:	[0-9a-f]* 	{ shli r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 }
+   10608:	[0-9a-f]* 	{ shrs r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
+   10610:	[0-9a-f]* 	{ shrs r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+   10618:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jr r15 ; st r25, r26 }
+   10620:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; cmpleu r5, r6, r7 ; st r25, r26 }
+   10628:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; shrsi r5, r6, 5 ; st r25, r26 }
+   10630:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; rotl r15, r16, r17 ; st r25, r26 }
+   10638:	[0-9a-f]* 	{ shru r15, r16, r17 ; move r5, r6 ; st r25, r26 }
+   10640:	[0-9a-f]* 	{ shru r15, r16, r17 ; st r25, r26 }
+   10648:	[0-9a-f]* 	{ shru r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+   10650:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; st r25, r26 }
+   10658:	[0-9a-f]* 	{ shrui r5, r6, 5 ; cmpleu r15, r16, r17 ; st r25, r26 }
+   10660:	[0-9a-f]* 	{ sub r15, r16, r17 ; addx r5, r6, r7 ; st r25, r26 }
+   10668:	[0-9a-f]* 	{ sub r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+   10670:	[0-9a-f]* 	{ sub r5, r6, r7 ; jr r15 ; st r25, r26 }
+   10678:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpleu r5, r6, r7 ; st r25, r26 }
+   10680:	[0-9a-f]* 	{ subx r15, r16, r17 ; shrsi r5, r6, 5 ; st r25, r26 }
+   10688:	[0-9a-f]* 	{ subx r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+   10690:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; st r25, r26 }
+   10698:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ill ; st r25, r26 }
+   106a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmples r15, r16, r17 ; st r25, r26 }
+   106a8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addi r15, r16, 5 ; st r25, r26 }
+   106b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; st r25, r26 }
+   106b8:	[0-9a-f]* 	{ xor r15, r16, r17 ; mz r5, r6, r7 ; st r25, r26 }
+   106c0:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpltsi r15, r16, 5 ; st r25, r26 }
+   106c8:	[0-9a-f]* 	{ addxi r5, r6, 5 ; st1 r15, r16 }
+   106d0:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; st1 r15, r16 }
+   106d8:	[0-9a-f]* 	{ nop ; st1 r15, r16 }
+   106e0:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; st1 r15, r16 }
+   106e8:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; st1 r15, r16 }
+   106f0:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; st1 r15, r16 }
+   106f8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+   10700:	[0-9a-f]* 	{ add r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
+   10708:	[0-9a-f]* 	{ add r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
+   10710:	[0-9a-f]* 	{ addi r15, r16, 5 ; nop ; st1 r25, r26 }
+   10718:	[0-9a-f]* 	{ addi r5, r6, 5 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
+   10720:	[0-9a-f]* 	{ addx r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 }
+   10728:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st1 r25, r26 }
+   10730:	[0-9a-f]* 	{ addx r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 }
+   10738:	[0-9a-f]* 	{ addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
+   10740:	[0-9a-f]* 	{ addxi r15, r16, 5 ; sub r5, r6, r7 ; st1 r25, r26 }
+   10748:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 }
+   10750:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
+   10758:	[0-9a-f]* 	{ and r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
+   10760:	[0-9a-f]* 	{ and r5, r6, r7 ; shrui r15, r16, 5 ; st1 r25, r26 }
+   10768:	[0-9a-f]* 	{ andi r15, r16, 5 ; nop ; st1 r25, r26 }
+   10770:	[0-9a-f]* 	{ andi r5, r6, 5 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
+   10778:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 }
+   10780:	[0-9a-f]* 	{ clz r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
+   10788:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; st1 r25, r26 }
+   10790:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
+   10798:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
+   107a0:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
+   107a8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+   107b0:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
+   107b8:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
+   107c0:	[0-9a-f]* 	{ cmples r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 }
+   107c8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+   107d0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+   107d8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
+   107e0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
+   107e8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
+   107f0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   107f8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
+   10800:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+   10808:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
+   10810:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 ; st1 r25, r26 }
+   10818:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 }
+   10820:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+   10828:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+   10830:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
+   10838:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
+   10840:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
+   10848:	[0-9a-f]* 	{ ctz r5, r6 ; movei r15, 5 ; st1 r25, r26 }
+   10850:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; st1 r25, r26 }
+   10858:	[0-9a-f]* 	{ mz r15, r16, r17 ; st1 r25, r26 }
+   10860:	[0-9a-f]* 	{ subx r15, r16, r17 ; st1 r25, r26 }
+   10868:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; st1 r25, r26 }
+   10870:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; ill ; st1 r25, r26 }
+   10878:	[0-9a-f]* 	{ info 19 ; add r5, r6, r7 ; st1 r25, r26 }
+   10880:	[0-9a-f]* 	{ info 19 ; mnz r15, r16, r17 ; st1 r25, r26 }
+   10888:	[0-9a-f]* 	{ info 19 ; shl3add r15, r16, r17 ; st1 r25, r26 }
+   10890:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+   10898:	[0-9a-f]* 	{ sub r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+   108a0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; jalrp r15 ; st1 r25, r26 }
+   108a8:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+   108b0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+   108b8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
+   108c0:	[0-9a-f]* 	{ addxi r5, r6, 5 ; lnk r15 ; st1 r25, r26 }
+   108c8:	[0-9a-f]* 	{ shl r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+   108d0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; info 19 ; st1 r25, r26 }
+   108d8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; st1 r25, r26 }
+   108e0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+   108e8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+   108f0:	[0-9a-f]* 	{ move r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+   108f8:	[0-9a-f]* 	{ movei r15, 5 ; add r5, r6, r7 ; st1 r25, r26 }
+   10900:	[0-9a-f]* 	{ revbytes r5, r6 ; movei r15, 5 ; st1 r25, r26 }
+   10908:	[0-9a-f]* 	{ movei r5, 5 ; jalr r15 ; st1 r25, r26 }
+   10910:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   10918:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 }
+   10920:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
+   10928:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 }
+   10930:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; st1 r25, r26 }
+   10938:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st1 r25, r26 }
+   10940:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; ill ; st1 r25, r26 }
+   10948:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
+   10950:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; st1 r25, r26 }
+   10958:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+   10960:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl2add r15, r16, r17 ; st1 r25, r26 }
+   10968:	[0-9a-f]* 	{ mulx r5, r6, r7 ; nor r15, r16, r17 ; st1 r25, r26 }
+   10970:	[0-9a-f]* 	{ mz r15, r16, r17 ; info 19 ; st1 r25, r26 }
+   10978:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; st1 r25, r26 }
+   10980:	[0-9a-f]* 	{ mz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+   10988:	[0-9a-f]* 	{ nop ; cmpne r5, r6, r7 ; st1 r25, r26 }
+   10990:	[0-9a-f]* 	{ nop ; rotli r5, r6, 5 ; st1 r25, r26 }
+   10998:	[0-9a-f]* 	{ nor r15, r16, r17 ; and r5, r6, r7 ; st1 r25, r26 }
+   109a0:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+   109a8:	[0-9a-f]* 	{ nor r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+   109b0:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpltsi r5, r6, 5 ; st1 r25, r26 }
+   109b8:	[0-9a-f]* 	{ or r15, r16, r17 ; shrui r5, r6, 5 ; st1 r25, r26 }
+   109c0:	[0-9a-f]* 	{ or r5, r6, r7 ; shl r15, r16, r17 ; st1 r25, r26 }
+   109c8:	[0-9a-f]* 	{ pcnt r5, r6 ; movei r15, 5 ; st1 r25, r26 }
+   109d0:	[0-9a-f]* 	{ revbits r5, r6 ; jalr r15 ; st1 r25, r26 }
+   109d8:	[0-9a-f]* 	{ revbytes r5, r6 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   109e0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
+   109e8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
+   109f0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
+   109f8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 }
+   10a00:	[0-9a-f]* 	{ rotli r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 }
+   10a08:	[0-9a-f]* 	{ rotli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
+   10a10:	[0-9a-f]* 	{ shl r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
+   10a18:	[0-9a-f]* 	{ shl r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+   10a20:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+   10a28:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 }
+   10a30:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   10a38:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
+   10a40:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
+   10a48:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
+   10a50:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; st1 r25, r26 }
+   10a58:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; shru r5, r6, r7 ; st1 r25, r26 }
+   10a60:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+   10a68:	[0-9a-f]* 	{ shl2addx r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
+   10a70:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+   10a78:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+   10a80:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl3add r15, r16, r17 ; st1 r25, r26 }
+   10a88:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   10a90:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
+   10a98:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
+   10aa0:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
+   10aa8:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 }
+   10ab0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 }
+   10ab8:	[0-9a-f]* 	{ shli r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
+   10ac0:	[0-9a-f]* 	{ shrs r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
+   10ac8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+   10ad0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+   10ad8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+   10ae0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   10ae8:	[0-9a-f]* 	{ shru r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
+   10af0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl r5, r6, r7 ; st1 r25, r26 }
+   10af8:	[0-9a-f]* 	{ shru r5, r6, r7 ; jrp r15 ; st1 r25, r26 }
+   10b00:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmplts r5, r6, r7 ; st1 r25, r26 }
+   10b08:	[0-9a-f]* 	{ shrui r15, r16, 5 ; shru r5, r6, r7 ; st1 r25, r26 }
+   10b10:	[0-9a-f]* 	{ shrui r5, r6, 5 ; rotli r15, r16, 5 ; st1 r25, r26 }
+   10b18:	[0-9a-f]* 	{ sub r15, r16, r17 ; movei r5, 5 ; st1 r25, r26 }
+   10b20:	[0-9a-f]* 	{ sub r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+   10b28:	[0-9a-f]* 	{ sub r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 }
+   10b30:	[0-9a-f]* 	{ mulx r5, r6, r7 ; subx r15, r16, r17 ; st1 r25, r26 }
+   10b38:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   10b40:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 }
+   10b48:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sub r15, r16, r17 ; st1 r25, r26 }
+   10b50:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; st1 r25, r26 }
+   10b58:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rotl r15, r16, r17 ; st1 r25, r26 }
+   10b60:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; st1 r25, r26 }
+   10b68:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
+   10b70:	[0-9a-f]* 	{ xor r15, r16, r17 ; sub r5, r6, r7 ; st1 r25, r26 }
+   10b78:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 }
+   10b80:	[0-9a-f]* 	{ cmula r5, r6, r7 ; st1_add r15, r16, 5 }
+   10b88:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; st1_add r15, r16, 5 }
+   10b90:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; st1_add r15, r16, 5 }
+   10b98:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; st1_add r15, r16, 5 }
+   10ba0:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; st1_add r15, r16, 5 }
+   10ba8:	[0-9a-f]* 	{ addxsc r5, r6, r7 ; st2 r15, r16 }
+   10bb0:	[0-9a-f]* 	{ st2 r15, r16 }
+   10bb8:	[0-9a-f]* 	{ or r5, r6, r7 ; st2 r15, r16 }
+   10bc0:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; st2 r15, r16 }
+   10bc8:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; st2 r15, r16 }
+   10bd0:	[0-9a-f]* 	{ v4add r5, r6, r7 ; st2 r15, r16 }
+   10bd8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
+   10be0:	[0-9a-f]* 	{ add r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
+   10be8:	[0-9a-f]* 	{ add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+   10bf0:	[0-9a-f]* 	{ addi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 }
+   10bf8:	[0-9a-f]* 	{ addi r5, r6, 5 ; st2 r25, r26 }
+   10c00:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+   10c08:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+   10c10:	[0-9a-f]* 	{ addx r5, r6, r7 ; movei r15, 5 ; st2 r25, r26 }
+   10c18:	[0-9a-f]* 	{ ctz r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 }
+   10c20:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 }
+   10c28:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 }
+   10c30:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
+   10c38:	[0-9a-f]* 	{ and r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
+   10c40:	[0-9a-f]* 	{ and r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+   10c48:	[0-9a-f]* 	{ andi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 }
+   10c50:	[0-9a-f]* 	{ andi r5, r6, 5 ; st2 r25, r26 }
+   10c58:	[0-9a-f]* 	{ clz r5, r6 ; cmpeqi r15, r16, 5 ; st2 r25, r26 }
+   10c60:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 }
+   10c68:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+   10c70:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
+   10c78:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+   10c80:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 }
+   10c88:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
+   10c90:	[0-9a-f]* 	{ cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st2 r25, r26 }
+   10c98:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+   10ca0:	[0-9a-f]* 	{ clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
+   10ca8:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+   10cb0:	[0-9a-f]* 	{ cmples r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+   10cb8:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 }
+   10cc0:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 }
+   10cc8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
+   10cd0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
+   10cd8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 }
+   10ce0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
+   10ce8:	[0-9a-f]* 	{ cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st2 r25, r26 }
+   10cf0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 ; st2 r25, r26 }
+   10cf8:	[0-9a-f]* 	{ clz r5, r6 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   10d00:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+   10d08:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+   10d10:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 }
+   10d18:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 }
+   10d20:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
+   10d28:	[0-9a-f]* 	{ ctz r5, r6 ; nop ; st2 r25, r26 }
+   10d30:	[0-9a-f]* 	{ cmples r15, r16, r17 ; st2 r25, r26 }
+   10d38:	[0-9a-f]* 	{ nop ; st2 r25, r26 }
+   10d40:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; st2 r25, r26 }
+   10d48:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
+   10d50:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; ill ; st2 r25, r26 }
+   10d58:	[0-9a-f]* 	{ info 19 ; addi r5, r6, 5 ; st2 r25, r26 }
+   10d60:	[0-9a-f]* 	{ info 19 ; move r15, r16 ; st2 r25, r26 }
+   10d68:	[0-9a-f]* 	{ info 19 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
+   10d70:	[0-9a-f]* 	{ ctz r5, r6 ; jalr r15 ; st2 r25, r26 }
+   10d78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalr r15 ; st2 r25, r26 }
+   10d80:	[0-9a-f]* 	{ mz r5, r6, r7 ; jalrp r15 ; st2 r25, r26 }
+   10d88:	[0-9a-f]* 	{ cmples r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+   10d90:	[0-9a-f]* 	{ shrs r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+   10d98:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; jrp r15 ; st2 r25, r26 }
+   10da0:	[0-9a-f]* 	{ andi r5, r6, 5 ; lnk r15 ; st2 r25, r26 }
+   10da8:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+   10db0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+   10db8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; st2 r25, r26 }
+   10dc0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+   10dc8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+   10dd0:	[0-9a-f]* 	{ move r5, r6 ; cmpleu r15, r16, r17 ; st2 r25, r26 }
+   10dd8:	[0-9a-f]* 	{ movei r15, 5 ; addx r5, r6, r7 ; st2 r25, r26 }
+   10de0:	[0-9a-f]* 	{ movei r15, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
+   10de8:	[0-9a-f]* 	{ movei r5, 5 ; jr r15 ; st2 r25, r26 }
+   10df0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   10df8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 }
+   10e00:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st2 r25, r26 }
+   10e08:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
+   10e10:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+   10e18:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; movei r15, 5 ; st2 r25, r26 }
+   10e20:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+   10e28:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
+   10e30:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; st2 r25, r26 }
+   10e38:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
+   10e40:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+   10e48:	[0-9a-f]* 	{ mulx r5, r6, r7 ; rotl r15, r16, r17 ; st2 r25, r26 }
+   10e50:	[0-9a-f]* 	{ mz r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+   10e58:	[0-9a-f]* 	{ mz r15, r16, r17 ; st2 r25, r26 }
+   10e60:	[0-9a-f]* 	{ mz r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+   10e68:	[0-9a-f]* 	{ nop ; st2 r25, r26 }
+   10e70:	[0-9a-f]* 	{ nop ; shl r5, r6, r7 ; st2 r25, r26 }
+   10e78:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+   10e80:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+   10e88:	[0-9a-f]* 	{ nor r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+   10e90:	[0-9a-f]* 	{ or r15, r16, r17 ; cmpne r5, r6, r7 ; st2 r25, r26 }
+   10e98:	[0-9a-f]* 	{ or r15, r16, r17 ; subx r5, r6, r7 ; st2 r25, r26 }
+   10ea0:	[0-9a-f]* 	{ or r5, r6, r7 ; shl1addx r15, r16, r17 ; st2 r25, r26 }
+   10ea8:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; st2 r25, r26 }
+   10eb0:	[0-9a-f]* 	{ revbits r5, r6 ; jr r15 ; st2 r25, r26 }
+   10eb8:	[0-9a-f]* 	{ revbytes r5, r6 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   10ec0:	[0-9a-f]* 	{ rotl r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+   10ec8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
+   10ed0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
+   10ed8:	[0-9a-f]* 	{ rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
+   10ee0:	[0-9a-f]* 	{ rotli r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 }
+   10ee8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+   10ef0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+   10ef8:	[0-9a-f]* 	{ shl r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+   10f00:	[0-9a-f]* 	{ shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+   10f08:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; nop ; st2 r25, r26 }
+   10f10:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   10f18:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+   10f20:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
+   10f28:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
+   10f30:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
+   10f38:	[0-9a-f]* 	{ shl2add r15, r16, r17 ; sub r5, r6, r7 ; st2 r25, r26 }
+   10f40:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+   10f48:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; st2 r25, r26 }
+   10f50:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+   10f58:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+   10f60:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; nop ; st2 r25, r26 }
+   10f68:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   10f70:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+   10f78:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
+   10f80:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
+   10f88:	[0-9a-f]* 	{ shli r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
+   10f90:	[0-9a-f]* 	{ shli r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 }
+   10f98:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+   10fa0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+   10fa8:	[0-9a-f]* 	{ shrs r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+   10fb0:	[0-9a-f]* 	{ shrs r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+   10fb8:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; nop ; st2 r25, r26 }
+   10fc0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   10fc8:	[0-9a-f]* 	{ shru r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+   10fd0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 }
+   10fd8:	[0-9a-f]* 	{ shru r5, r6, r7 ; mnz r15, r16, r17 ; st2 r25, r26 }
+   10fe0:	[0-9a-f]* 	{ shrui r15, r16, 5 ; cmpltu r5, r6, r7 ; st2 r25, r26 }
+   10fe8:	[0-9a-f]* 	{ shrui r15, r16, 5 ; sub r5, r6, r7 ; st2 r25, r26 }
+   10ff0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+   10ff8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; st2 r25, r26 }
+   11000:	[0-9a-f]* 	{ sub r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+   11008:	[0-9a-f]* 	{ sub r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+   11010:	[0-9a-f]* 	{ subx r15, r16, r17 ; nop ; st2 r25, r26 }
+   11018:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st2 r25, r26 }
+   11020:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; andi r15, r16, 5 ; st2 r25, r26 }
+   11028:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 }
+   11030:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; st2 r25, r26 }
+   11038:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl r15, r16, r17 ; st2 r25, r26 }
+   11040:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; movei r15, 5 ; st2 r25, r26 }
+   11048:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 }
+   11050:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; xor r15, r16, r17 ; st2 r25, r26 }
+   11058:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 }
+   11060:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; st2_add r15, r16, 5 }
+   11068:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; st2_add r15, r16, 5 }
+   11070:	[0-9a-f]* 	{ shrui r5, r6, 5 ; st2_add r15, r16, 5 }
+   11078:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; st2_add r15, r16, 5 }
+   11080:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; st2_add r15, r16, 5 }
+   11088:	[0-9a-f]* 	{ andi r5, r6, 5 ; st4 r15, r16 }
+   11090:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; st4 r15, r16 }
+   11098:	[0-9a-f]* 	{ pcnt r5, r6 ; st4 r15, r16 }
+   110a0:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; st4 r15, r16 }
+   110a8:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; st4 r15, r16 }
+   110b0:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; st4 r15, r16 }
+   110b8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; add r15, r16, r17 ; st4 r25, r26 }
+   110c0:	[0-9a-f]* 	{ add r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+   110c8:	[0-9a-f]* 	{ add r5, r6, r7 ; st4 r25, r26 }
+   110d0:	[0-9a-f]* 	{ revbits r5, r6 ; addi r15, r16, 5 ; st4 r25, r26 }
+   110d8:	[0-9a-f]* 	{ addi r5, r6, 5 ; info 19 ; st4 r25, r26 }
+   110e0:	[0-9a-f]* 	{ addx r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
+   110e8:	[0-9a-f]* 	{ addx r15, r16, r17 ; shl3addx r5, r6, r7 ; st4 r25, r26 }
+   110f0:	[0-9a-f]* 	{ addx r5, r6, r7 ; nop ; st4 r25, r26 }
+   110f8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; addxi r15, r16, 5 ; st4 r25, r26 }
+   11100:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addxi r15, r16, 5 ; st4 r25, r26 }
+   11108:	[0-9a-f]* 	{ addxi r5, r6, 5 ; shl3add r15, r16, r17 ; st4 r25, r26 }
+   11110:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+   11118:	[0-9a-f]* 	{ and r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+   11120:	[0-9a-f]* 	{ and r5, r6, r7 ; st4 r25, r26 }
+   11128:	[0-9a-f]* 	{ revbits r5, r6 ; andi r15, r16, 5 ; st4 r25, r26 }
+   11130:	[0-9a-f]* 	{ andi r5, r6, 5 ; info 19 ; st4 r25, r26 }
+   11138:	[0-9a-f]* 	{ clz r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+   11140:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; st4 r25, r26 }
+   11148:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shrui r15, r16, 5 ; st4 r25, r26 }
+   11150:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   11158:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+   11160:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+   11168:	[0-9a-f]* 	{ cmpeq r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 }
+   11170:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+   11178:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; ill ; st4 r25, r26 }
+   11180:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
+   11188:	[0-9a-f]* 	{ cmples r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+   11190:	[0-9a-f]* 	{ cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+   11198:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; st4 r25, r26 }
+   111a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+   111a8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   111b0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+   111b8:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+   111c0:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 }
+   111c8:	[0-9a-f]* 	{ pcnt r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+   111d0:	[0-9a-f]* 	{ cmpltsi r5, r6, 5 ; ill ; st4 r25, r26 }
+   111d8:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+   111e0:	[0-9a-f]* 	{ cmpltu r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+   111e8:	[0-9a-f]* 	{ cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+   111f0:	[0-9a-f]* 	{ cmpne r15, r16, r17 ; st4 r25, r26 }
+   111f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st4 r25, r26 }
+   11200:	[0-9a-f]* 	{ cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   11208:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; st4 r25, r26 }
+   11210:	[0-9a-f]* 	{ cmpleu r15, r16, r17 ; st4 r25, r26 }
+   11218:	[0-9a-f]* 	{ nor r5, r6, r7 ; st4 r25, r26 }
+   11220:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; st4 r25, r26 }
+   11228:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   11230:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; ill ; st4 r25, r26 }
+   11238:	[0-9a-f]* 	{ info 19 ; addx r5, r6, r7 ; st4 r25, r26 }
+   11240:	[0-9a-f]* 	{ info 19 ; movei r15, 5 ; st4 r25, r26 }
+   11248:	[0-9a-f]* 	{ info 19 ; shli r15, r16, 5 ; st4 r25, r26 }
+   11250:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; jalr r15 ; st4 r25, r26 }
+   11258:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jalr r15 ; st4 r25, r26 }
+   11260:	[0-9a-f]* 	{ nor r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
+   11268:	[0-9a-f]* 	{ cmplts r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+   11270:	[0-9a-f]* 	{ shru r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+   11278:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; jrp r15 ; st4 r25, r26 }
+   11280:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+   11288:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+   11290:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 }
+   11298:	[0-9a-f]* 	{ mnz r5, r6, r7 ; addi r15, r16, 5 ; st4 r25, r26 }
+   112a0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
+   112a8:	[0-9a-f]* 	{ move r15, r16 ; mz r5, r6, r7 ; st4 r25, r26 }
+   112b0:	[0-9a-f]* 	{ move r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+   112b8:	[0-9a-f]* 	{ movei r15, 5 ; and r5, r6, r7 ; st4 r25, r26 }
+   112c0:	[0-9a-f]* 	{ movei r15, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 }
+   112c8:	[0-9a-f]* 	{ movei r5, 5 ; lnk r15 ; st4 r25, r26 }
+   112d0:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
+   112d8:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+   112e0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st4 r25, r26 }
+   112e8:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 ; st4 r25, r26 }
+   112f0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
+   112f8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; nop ; st4 r25, r26 }
+   11300:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+   11308:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+   11310:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+   11318:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 ; st4 r25, r26 }
+   11320:	[0-9a-f]* 	{ mulax r5, r6, r7 ; shli r15, r16, 5 ; st4 r25, r26 }
+   11328:	[0-9a-f]* 	{ mulx r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
+   11330:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+   11338:	[0-9a-f]* 	{ mz r5, r6, r7 ; addi r15, r16, 5 ; st4 r25, r26 }
+   11340:	[0-9a-f]* 	{ mz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
+   11348:	[0-9a-f]* 	{ nop ; ill ; st4 r25, r26 }
+   11350:	[0-9a-f]* 	{ nop ; shl1add r5, r6, r7 ; st4 r25, r26 }
+   11358:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+   11360:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+   11368:	[0-9a-f]* 	{ nor r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+   11370:	[0-9a-f]* 	{ or r15, r16, r17 ; st4 r25, r26 }
+   11378:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; or r15, r16, r17 ; st4 r25, r26 }
+   11380:	[0-9a-f]* 	{ or r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   11388:	[0-9a-f]* 	{ pcnt r5, r6 ; or r15, r16, r17 ; st4 r25, r26 }
+   11390:	[0-9a-f]* 	{ revbits r5, r6 ; lnk r15 ; st4 r25, r26 }
+   11398:	[0-9a-f]* 	{ revbytes r5, r6 ; st4 r25, r26 }
+   113a0:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; st4 r25, r26 }
+   113a8:	[0-9a-f]* 	{ rotl r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
+   113b0:	[0-9a-f]* 	{ rotl r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
+   113b8:	[0-9a-f]* 	{ ctz r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 }
+   113c0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st4 r25, r26 }
+   113c8:	[0-9a-f]* 	{ rotli r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   113d0:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; st4 r25, r26 }
+   113d8:	[0-9a-f]* 	{ shl r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+   113e0:	[0-9a-f]* 	{ shl r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
+   113e8:	[0-9a-f]* 	{ shl1add r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 }
+   113f0:	[0-9a-f]* 	{ shl1add r5, r6, r7 ; st4 r25, r26 }
+   113f8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
+   11400:	[0-9a-f]* 	{ shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
+   11408:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
+   11410:	[0-9a-f]* 	{ ctz r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   11418:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   11420:	[0-9a-f]* 	{ shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   11428:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   11430:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+   11438:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
+   11440:	[0-9a-f]* 	{ shl3add r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 }
+   11448:	[0-9a-f]* 	{ shl3add r5, r6, r7 ; st4 r25, r26 }
+   11450:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
+   11458:	[0-9a-f]* 	{ shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
+   11460:	[0-9a-f]* 	{ shl3addx r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
+   11468:	[0-9a-f]* 	{ ctz r5, r6 ; shli r15, r16, 5 ; st4 r25, r26 }
+   11470:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shli r15, r16, 5 ; st4 r25, r26 }
+   11478:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   11480:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 }
+   11488:	[0-9a-f]* 	{ shrs r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+   11490:	[0-9a-f]* 	{ shrs r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
+   11498:	[0-9a-f]* 	{ shrsi r15, r16, 5 ; or r5, r6, r7 ; st4 r25, r26 }
+   114a0:	[0-9a-f]* 	{ shrsi r5, r6, 5 ; st4 r25, r26 }
+   114a8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
+   114b0:	[0-9a-f]* 	{ shru r15, r16, r17 ; shl2addx r5, r6, r7 ; st4 r25, r26 }
+   114b8:	[0-9a-f]* 	{ shru r5, r6, r7 ; movei r15, 5 ; st4 r25, r26 }
+   114c0:	[0-9a-f]* 	{ ctz r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 }
+   114c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrui r15, r16, 5 ; st4 r25, r26 }
+   114d0:	[0-9a-f]* 	{ shrui r5, r6, 5 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   114d8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 }
+   114e0:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 }
+   114e8:	[0-9a-f]* 	{ sub r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
+   114f0:	[0-9a-f]* 	{ subx r15, r16, r17 ; or r5, r6, r7 ; st4 r25, r26 }
+   114f8:	[0-9a-f]* 	{ subx r5, r6, r7 ; st4 r25, r26 }
+   11500:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+   11508:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 }
+   11510:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; st4 r25, r26 }
+   11518:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
+   11520:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; nop ; st4 r25, r26 }
+   11528:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 }
+   11530:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 }
+   11538:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl3add r15, r16, r17 ; st4 r25, r26 }
+   11540:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; st4_add r15, r16, 5 }
+   11548:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; st4_add r15, r16, 5 }
+   11550:	[0-9a-f]* 	{ shruxi r5, r6, 5 ; st4_add r15, r16, 5 }
+   11558:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; st4_add r15, r16, 5 }
+   11560:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; st4_add r15, r16, 5 }
+   11568:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; st_add r15, r16, 5 }
+   11570:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; st_add r15, r16, 5 }
+   11578:	[0-9a-f]* 	{ revbytes r5, r6 ; st_add r15, r16, 5 }
+   11580:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; st_add r15, r16, 5 }
+   11588:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; st_add r15, r16, 5 }
+   11590:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; st_add r15, r16, 5 }
+   11598:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; stnt r15, r16 }
+   115a0:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; stnt r15, r16 }
+   115a8:	[0-9a-f]* 	{ sub r5, r6, r7 ; stnt r15, r16 }
+   115b0:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; stnt r15, r16 }
+   115b8:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; stnt r15, r16 }
+   115c0:	[0-9a-f]* 	{ clz r5, r6 ; stnt1 r15, r16 }
+   115c8:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; stnt1 r15, r16 }
+   115d0:	[0-9a-f]* 	{ rotli r5, r6, 5 ; stnt1 r15, r16 }
+   115d8:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; stnt1 r15, r16 }
+   115e0:	[0-9a-f]* 	{ v2cmplts r5, r6, r7 ; stnt1 r15, r16 }
+   115e8:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; stnt1 r15, r16 }
+   115f0:	[0-9a-f]* 	{ ctz r5, r6 ; stnt1_add r15, r16, 5 }
+   115f8:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; stnt1_add r15, r16, 5 }
+   11600:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; stnt1_add r15, r16, 5 }
+   11608:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; stnt1_add r15, r16, 5 }
+   11610:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; stnt1_add r15, r16, 5 }
+   11618:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; stnt2 r15, r16 }
+   11620:	[0-9a-f]* 	{ info 19 ; stnt2 r15, r16 }
+   11628:	[0-9a-f]* 	{ shl16insli r5, r6, 4660 ; stnt2 r15, r16 }
+   11630:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; stnt2 r15, r16 }
+   11638:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; stnt2 r15, r16 }
+   11640:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; stnt2 r15, r16 }
+   11648:	[0-9a-f]* 	{ dblalign2 r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   11650:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   11658:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; stnt2_add r15, r16, 5 }
+   11660:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   11668:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   11670:	[0-9a-f]* 	{ cmpeqi r5, r6, 5 ; stnt4 r15, r16 }
+   11678:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; stnt4 r15, r16 }
+   11680:	[0-9a-f]* 	{ shl1addx r5, r6, r7 ; stnt4 r15, r16 }
+   11688:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; stnt4 r15, r16 }
+   11690:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; stnt4 r15, r16 }
+   11698:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; stnt4 r15, r16 }
+   116a0:	[0-9a-f]* 	{ dblalign6 r5, r6, r7 ; stnt4_add r15, r16, 5 }
+   116a8:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; stnt4_add r15, r16, 5 }
+   116b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; stnt4_add r15, r16, 5 }
+   116b8:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; stnt4_add r15, r16, 5 }
+   116c0:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; stnt4_add r15, r16, 5 }
+   116c8:	[0-9a-f]* 	{ cmpleu r5, r6, r7 ; stnt_add r15, r16, 5 }
+   116d0:	[0-9a-f]* 	{ move r5, r6 ; stnt_add r15, r16, 5 }
+   116d8:	[0-9a-f]* 	{ shl2addx r5, r6, r7 ; stnt_add r15, r16, 5 }
+   116e0:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; stnt_add r15, r16, 5 }
+   116e8:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; stnt_add r15, r16, 5 }
+   116f0:	[0-9a-f]* 	{ xori r5, r6, 5 ; stnt_add r15, r16, 5 }
+   116f8:	[0-9a-f]* 	{ sub r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 }
+   11700:	[0-9a-f]* 	{ sub r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 }
+   11708:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; sub r15, r16, r17 }
+   11710:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+   11718:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+   11720:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 }
+   11728:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+   11730:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+   11738:	[0-9a-f]* 	{ sub r15, r16, r17 ; dblalign2 r5, r6, r7 }
+   11740:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
+   11748:	[0-9a-f]* 	{ sub r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
+   11750:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
+   11758:	[0-9a-f]* 	{ sub r15, r16, r17 ; move r5, r6 ; ld1s r25, r26 }
+   11760:	[0-9a-f]* 	{ sub r15, r16, r17 ; ld1s r25, r26 }
+   11768:	[0-9a-f]* 	{ revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
+   11770:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+   11778:	[0-9a-f]* 	{ sub r15, r16, r17 ; subx r5, r6, r7 ; ld2s r25, r26 }
+   11780:	[0-9a-f]* 	{ mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
+   11788:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4s r25, r26 }
+   11790:	[0-9a-f]* 	{ sub r15, r16, r17 ; shli r5, r6, 5 ; ld4s r25, r26 }
+   11798:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+   117a0:	[0-9a-f]* 	{ sub r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
+   117a8:	[0-9a-f]* 	{ sub r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 }
+   117b0:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
+   117b8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+   117c0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+   117c8:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+   117d0:	[0-9a-f]* 	{ mulx r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+   117d8:	[0-9a-f]* 	{ sub r15, r16, r17 ; nop ; ld2u r25, r26 }
+   117e0:	[0-9a-f]* 	{ sub r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 }
+   117e8:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+   117f0:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+   117f8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+   11800:	[0-9a-f]* 	{ sub r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l1_fault r25 }
+   11808:	[0-9a-f]* 	{ sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1_fault r25 }
+   11810:	[0-9a-f]* 	{ sub r15, r16, r17 ; prefetch_l2 r25 }
+   11818:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+   11820:	[0-9a-f]* 	{ sub r15, r16, r17 ; nop ; prefetch_l2_fault r25 }
+   11828:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 }
+   11830:	[0-9a-f]* 	{ sub r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3 r25 }
+   11838:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+   11840:	[0-9a-f]* 	{ revbits r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
+   11848:	[0-9a-f]* 	{ sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 }
+   11850:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+   11858:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
+   11860:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 }
+   11868:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 }
+   11870:	[0-9a-f]* 	{ sub r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 }
+   11878:	[0-9a-f]* 	{ sub r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 }
+   11880:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpne r5, r6, r7 ; st r25, r26 }
+   11888:	[0-9a-f]* 	{ sub r15, r16, r17 ; subx r5, r6, r7 ; st r25, r26 }
+   11890:	[0-9a-f]* 	{ mulx r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
+   11898:	[0-9a-f]* 	{ sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; st2 r25, r26 }
+   118a0:	[0-9a-f]* 	{ sub r15, r16, r17 ; shli r5, r6, 5 ; st2 r25, r26 }
+   118a8:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; st4 r25, r26 }
+   118b0:	[0-9a-f]* 	{ sub r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 }
+   118b8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 }
+   118c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sub r15, r16, r17 ; prefetch r25 }
+   118c8:	[0-9a-f]* 	{ sub r15, r16, r17 ; v1cmplts r5, r6, r7 }
+   118d0:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; sub r15, r16, r17 }
+   118d8:	[0-9a-f]* 	{ sub r15, r16, r17 ; v4addsc r5, r6, r7 }
+   118e0:	[0-9a-f]* 	{ sub r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
+   118e8:	[0-9a-f]* 	{ sub r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
+   118f0:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+   118f8:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+   11900:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+   11908:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   11910:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+   11918:	[0-9a-f]* 	{ sub r5, r6, r7 ; ld1s r25, r26 }
+   11920:	[0-9a-f]* 	{ sub r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+   11928:	[0-9a-f]* 	{ sub r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+   11930:	[0-9a-f]* 	{ sub r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
+   11938:	[0-9a-f]* 	{ sub r5, r6, r7 ; move r15, r16 ; ld r25, r26 }
+   11940:	[0-9a-f]* 	{ sub r5, r6, r7 ; ill ; ld1s r25, r26 }
+   11948:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+   11950:	[0-9a-f]* 	{ sub r5, r6, r7 ; ld1u r25, r26 }
+   11958:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+   11960:	[0-9a-f]* 	{ sub r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+   11968:	[0-9a-f]* 	{ sub r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
+   11970:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+   11978:	[0-9a-f]* 	{ sub r5, r6, r7 ; ldna_add r15, r16, 5 }
+   11980:	[0-9a-f]* 	{ sub r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+   11988:	[0-9a-f]* 	{ sub r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+   11990:	[0-9a-f]* 	{ sub r5, r6, r7 ; nop ; ld4u r25, r26 }
+   11998:	[0-9a-f]* 	{ sub r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+   119a0:	[0-9a-f]* 	{ sub r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+   119a8:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
+   119b0:	[0-9a-f]* 	{ sub r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
+   119b8:	[0-9a-f]* 	{ sub r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+   119c0:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
+   119c8:	[0-9a-f]* 	{ sub r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2_fault r25 }
+   119d0:	[0-9a-f]* 	{ sub r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
+   119d8:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+   119e0:	[0-9a-f]* 	{ sub r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
+   119e8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+   119f0:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+   119f8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+   11a00:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+   11a08:	[0-9a-f]* 	{ sub r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+   11a10:	[0-9a-f]* 	{ sub r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+   11a18:	[0-9a-f]* 	{ sub r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
+   11a20:	[0-9a-f]* 	{ sub r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+   11a28:	[0-9a-f]* 	{ sub r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+   11a30:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+   11a38:	[0-9a-f]* 	{ sub r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+   11a40:	[0-9a-f]* 	{ sub r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+   11a48:	[0-9a-f]* 	{ sub r5, r6, r7 ; v1cmpne r15, r16, r17 }
+   11a50:	[0-9a-f]* 	{ sub r5, r6, r7 ; v2shl r15, r16, r17 }
+   11a58:	[0-9a-f]* 	{ sub r5, r6, r7 ; xori r15, r16, 5 }
+   11a60:	[0-9a-f]* 	{ subx r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 }
+   11a68:	[0-9a-f]* 	{ subx r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 }
+   11a70:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; subx r15, r16, r17 }
+   11a78:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 }
+   11a80:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+   11a88:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 }
+   11a90:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+   11a98:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch r25 }
+   11aa0:	[0-9a-f]* 	{ subx r15, r16, r17 ; dblalign2 r5, r6, r7 }
+   11aa8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; subx r15, r16, r17 ; ld4u r25, r26 }
+   11ab0:	[0-9a-f]* 	{ subx r15, r16, r17 ; andi r5, r6, 5 ; ld r25, r26 }
+   11ab8:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl1addx r5, r6, r7 ; ld r25, r26 }
+   11ac0:	[0-9a-f]* 	{ subx r15, r16, r17 ; move r5, r6 ; ld1s r25, r26 }
+   11ac8:	[0-9a-f]* 	{ subx r15, r16, r17 ; ld1s r25, r26 }
+   11ad0:	[0-9a-f]* 	{ revbits r5, r6 ; subx r15, r16, r17 ; ld1u r25, r26 }
+   11ad8:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+   11ae0:	[0-9a-f]* 	{ subx r15, r16, r17 ; subx r5, r6, r7 ; ld2s r25, r26 }
+   11ae8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; subx r15, r16, r17 ; ld2u r25, r26 }
+   11af0:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4s r25, r26 }
+   11af8:	[0-9a-f]* 	{ subx r15, r16, r17 ; shli r5, r6, 5 ; ld4s r25, r26 }
+   11b00:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld4u r25, r26 }
+   11b08:	[0-9a-f]* 	{ subx r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
+   11b10:	[0-9a-f]* 	{ subx r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 }
+   11b18:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld2s r25, r26 }
+   11b20:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 }
+   11b28:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld1s r25, r26 }
+   11b30:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
+   11b38:	[0-9a-f]* 	{ mulx r5, r6, r7 ; subx r15, r16, r17 ; ld1u r25, r26 }
+   11b40:	[0-9a-f]* 	{ subx r15, r16, r17 ; nop ; ld2u r25, r26 }
+   11b48:	[0-9a-f]* 	{ subx r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 }
+   11b50:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+   11b58:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+   11b60:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+   11b68:	[0-9a-f]* 	{ subx r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l1_fault r25 }
+   11b70:	[0-9a-f]* 	{ subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1_fault r25 }
+   11b78:	[0-9a-f]* 	{ subx r15, r16, r17 ; prefetch_l2 r25 }
+   11b80:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+   11b88:	[0-9a-f]* 	{ subx r15, r16, r17 ; nop ; prefetch_l2_fault r25 }
+   11b90:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 }
+   11b98:	[0-9a-f]* 	{ subx r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3 r25 }
+   11ba0:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3_fault r25 }
+   11ba8:	[0-9a-f]* 	{ revbits r5, r6 ; subx r15, r16, r17 ; ld4u r25, r26 }
+   11bb0:	[0-9a-f]* 	{ subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch r25 }
+   11bb8:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+   11bc0:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
+   11bc8:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 }
+   11bd0:	[0-9a-f]* 	{ subx r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 }
+   11bd8:	[0-9a-f]* 	{ subx r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 }
+   11be0:	[0-9a-f]* 	{ subx r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 }
+   11be8:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpne r5, r6, r7 ; st r25, r26 }
+   11bf0:	[0-9a-f]* 	{ subx r15, r16, r17 ; subx r5, r6, r7 ; st r25, r26 }
+   11bf8:	[0-9a-f]* 	{ mulx r5, r6, r7 ; subx r15, r16, r17 ; st1 r25, r26 }
+   11c00:	[0-9a-f]* 	{ subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; st2 r25, r26 }
+   11c08:	[0-9a-f]* 	{ subx r15, r16, r17 ; shli r5, r6, 5 ; st2 r25, r26 }
+   11c10:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; st4 r25, r26 }
+   11c18:	[0-9a-f]* 	{ subx r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 }
+   11c20:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld4s r25, r26 }
+   11c28:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch r25 }
+   11c30:	[0-9a-f]* 	{ subx r15, r16, r17 ; v1cmplts r5, r6, r7 }
+   11c38:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; subx r15, r16, r17 }
+   11c40:	[0-9a-f]* 	{ subx r15, r16, r17 ; v4addsc r5, r6, r7 }
+   11c48:	[0-9a-f]* 	{ subx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
+   11c50:	[0-9a-f]* 	{ subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
+   11c58:	[0-9a-f]* 	{ subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+   11c60:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+   11c68:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+   11c70:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+   11c78:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+   11c80:	[0-9a-f]* 	{ subx r5, r6, r7 ; ld1s r25, r26 }
+   11c88:	[0-9a-f]* 	{ subx r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+   11c90:	[0-9a-f]* 	{ subx r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+   11c98:	[0-9a-f]* 	{ subx r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
+   11ca0:	[0-9a-f]* 	{ subx r5, r6, r7 ; move r15, r16 ; ld r25, r26 }
+   11ca8:	[0-9a-f]* 	{ subx r5, r6, r7 ; ill ; ld1s r25, r26 }
+   11cb0:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+   11cb8:	[0-9a-f]* 	{ subx r5, r6, r7 ; ld1u r25, r26 }
+   11cc0:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+   11cc8:	[0-9a-f]* 	{ subx r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+   11cd0:	[0-9a-f]* 	{ subx r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
+   11cd8:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+   11ce0:	[0-9a-f]* 	{ subx r5, r6, r7 ; ldna_add r15, r16, 5 }
+   11ce8:	[0-9a-f]* 	{ subx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+   11cf0:	[0-9a-f]* 	{ subx r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+   11cf8:	[0-9a-f]* 	{ subx r5, r6, r7 ; nop ; ld4u r25, r26 }
+   11d00:	[0-9a-f]* 	{ subx r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+   11d08:	[0-9a-f]* 	{ subx r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+   11d10:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch r25 }
+   11d18:	[0-9a-f]* 	{ subx r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
+   11d20:	[0-9a-f]* 	{ subx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+   11d28:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l2 r25 }
+   11d30:	[0-9a-f]* 	{ subx r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2_fault r25 }
+   11d38:	[0-9a-f]* 	{ subx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
+   11d40:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+   11d48:	[0-9a-f]* 	{ subx r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
+   11d50:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+   11d58:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch r25 }
+   11d60:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+   11d68:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+   11d70:	[0-9a-f]* 	{ subx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+   11d78:	[0-9a-f]* 	{ subx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+   11d80:	[0-9a-f]* 	{ subx r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
+   11d88:	[0-9a-f]* 	{ subx r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+   11d90:	[0-9a-f]* 	{ subx r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+   11d98:	[0-9a-f]* 	{ subx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+   11da0:	[0-9a-f]* 	{ subx r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+   11da8:	[0-9a-f]* 	{ subx r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+   11db0:	[0-9a-f]* 	{ subx r5, r6, r7 ; v1cmpne r15, r16, r17 }
+   11db8:	[0-9a-f]* 	{ subx r5, r6, r7 ; v2shl r15, r16, r17 }
+   11dc0:	[0-9a-f]* 	{ subx r5, r6, r7 ; xori r15, r16, 5 }
+   11dc8:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; subxsc r15, r16, r17 }
+   11dd0:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; subxsc r15, r16, r17 }
+   11dd8:	[0-9a-f]* 	{ subxsc r15, r16, r17 ; v1addi r5, r6, 5 }
+   11de0:	[0-9a-f]* 	{ subxsc r15, r16, r17 ; v1shru r5, r6, r7 }
+   11de8:	[0-9a-f]* 	{ subxsc r15, r16, r17 ; v2shlsc r5, r6, r7 }
+   11df0:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; dblalign2 r15, r16, r17 }
+   11df8:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; ld4u_add r15, r16, 5 }
+   11e00:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; prefetch_l2 r15 }
+   11e08:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; sub r15, r16, r17 }
+   11e10:	[0-9a-f]* 	{ subxsc r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   11e18:	[0-9a-f]* 	{ swint3 }
+   11e20:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
+   11e28:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+   11e30:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+   11e38:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+   11e40:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+   11e48:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+   11e50:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; fetchadd4 r15, r16, r17 }
+   11e58:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ill ; prefetch_l2 r25 }
+   11e60:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
+   11e68:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jr r15 ; prefetch_l2_fault r25 }
+   11e70:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+   11e78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 }
+   11e80:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; subx r15, r16, r17 ; ld1s r25, r26 }
+   11e88:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+   11e90:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nop ; ld2s r25, r26 }
+   11e98:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalr r15 ; ld2u r25, r26 }
+   11ea0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+   11ea8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ld4u r15, r16 }
+   11eb0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+   11eb8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lnk r15 ; st r25, r26 }
+   11ec0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; st r25, r26 }
+   11ec8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+   11ed0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+   11ed8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; prefetch r25 }
+   11ee0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
+   11ee8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+   11ef0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; prefetch_l1_fault r25 }
+   11ef8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nop ; prefetch_l2 r25 }
+   11f00:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalrp r15 ; prefetch_l2_fault r25 }
+   11f08:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l3 r25 }
+   11f10:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
+   11f18:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+   11f20:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 }
+   11f28:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+   11f30:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2add r15, r16, r17 }
+   11f38:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+   11f40:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 }
+   11f48:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
+   11f50:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
+   11f58:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shrui r15, r16, 5 ; st r25, r26 }
+   11f60:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl2add r15, r16, r17 ; st1 r25, r26 }
+   11f68:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; st2 r25, r26 }
+   11f70:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; st4 r25, r26 }
+   11f78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; stnt_add r15, r16, 5 }
+   11f80:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; v1add r15, r16, r17 }
+   11f88:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; v2int_h r15, r16, r17 }
+   11f90:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+   11f98:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+   11fa0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+   11fa8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch_l2 r25 }
+   11fb0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
+   11fb8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+   11fc0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; st r25, r26 }
+   11fc8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st1 r25, r26 }
+   11fd0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; icoh r15 }
+   11fd8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; inv r15 }
+   11fe0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jr r15 ; ld r25, r26 }
+   11fe8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; ld r25, r26 }
+   11ff0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shru r15, r16, r17 ; ld r25, r26 }
+   11ff8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+   12000:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
+   12008:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ill ; ld2s r25, r26 }
+   12010:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
+   12018:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ld2u r25, r26 }
+   12020:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+   12028:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; or r15, r16, r17 ; ld4u r25, r26 }
+   12030:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; lnk r15 ; ld2s r25, r26 }
+   12038:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
+   12040:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
+   12048:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 }
+   12050:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+   12058:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+   12060:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+   12068:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; prefetch_l1_fault r25 }
+   12070:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ill ; prefetch_l2 r25 }
+   12078:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+   12080:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; prefetch_l3 r15 }
+   12088:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+   12090:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; prefetch_l3_fault r25 }
+   12098:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+   120a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+   120a8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
+   120b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
+   120b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+   120c0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
+   120c8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+   120d0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; st r25, r26 }
+   120d8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; st1 r25, r26 }
+   120e0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; st2 r25, r26 }
+   120e8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; st4 r25, r26 }
+   120f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; st4 r25, r26 }
+   120f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+   12100:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; v2addi r15, r16, 5 }
+   12108:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; v4sub r15, r16, r17 }
+   12110:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 }
+   12118:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addx r15, r16, r17 }
+   12120:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 }
+   12128:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+   12130:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
+   12138:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
+   12140:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+   12148:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; prefetch r25 }
+   12150:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+   12158:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jalrp r15 ; prefetch r25 }
+   12160:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jrp r15 ; prefetch_l2 r25 }
+   12168:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rotli r15, r16, 5 ; ld r25, r26 }
+   12170:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; ld1s r25, r26 }
+   12178:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
+   12180:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
+   12188:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
+   12190:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+   12198:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop ; ld4s r25, r26 }
+   121a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jalr r15 ; ld4u r25, r26 }
+   121a8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ldnt2s_add r15, r16, 5 }
+   121b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+   121b8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l3_fault r25 }
+   121c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop ; prefetch_l3_fault r25 }
+   121c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; st1 r25, r26 }
+   121d0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
+   121d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jrp r15 ; prefetch r25 }
+   121e0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+   121e8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch_l2 r25 }
+   121f0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; subx r15, r16, r17 ; prefetch_l2 r25 }
+   121f8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l2_fault r25 }
+   12200:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; prefetch_l3 r25 }
+   12208:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jrp r15 ; prefetch_l3_fault r25 }
+   12210:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
+   12218:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl r15, r16, r17 ; st r25, r26 }
+   12220:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 }
+   12228:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+   12230:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shli r15, r16, 5 ; ld r25, r26 }
+   12238:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
+   12240:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+   12248:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; jrp r15 ; st r25, r26 }
+   12250:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; cmpltu r15, r16, r17 ; st1 r25, r26 }
+   12258:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addxi r15, r16, 5 ; st2 r25, r26 }
+   12260:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sub r15, r16, r17 ; st2 r25, r26 }
+   12268:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl2add r15, r16, r17 ; st4 r25, r26 }
+   12270:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sub r15, r16, r17 ; st4 r25, r26 }
+   12278:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; v1mnz r15, r16, r17 }
+   12280:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; v2sub r15, r16, r17 }
+   12288:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; ld4u r25, r26 }
+   12290:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
+   12298:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+   122a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+   122a8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+   122b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+   122b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+   122c0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; finv r15 }
+   122c8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; st4 r25, r26 }
+   122d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalr r15 ; st2 r25, r26 }
+   122d8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jr r15 }
+   122e0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jr r15 ; ld r25, r26 }
+   122e8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+   122f0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld1u r25, r26 }
+   122f8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+   12300:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+   12308:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; movei r15, 5 ; ld2u r25, r26 }
+   12310:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; ld4s r25, r26 }
+   12318:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+   12320:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ld4u r25, r26 }
+   12328:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 }
+   12330:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
+   12338:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; nop ; ld1u r25, r26 }
+   12340:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 }
+   12348:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; move r15, r16 ; prefetch r25 }
+   12350:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; prefetch r25 }
+   12358:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+   12360:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+   12368:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+   12370:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch_l2_fault r25 }
+   12378:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalr r15 ; prefetch_l3 r25 }
+   12380:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+   12388:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+   12390:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 }
+   12398:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+   123a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+   123a8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 }
+   123b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+   123b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+   123c0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; cmpleu r15, r16, r17 ; st r25, r26 }
+   123c8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addi r15, r16, 5 ; st1 r25, r26 }
+   123d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; st1 r25, r26 }
+   123d8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+   123e0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; move r15, r16 ; st4 r25, r26 }
+   123e8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
+   123f0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; v1cmplts r15, r16, r17 }
+   123f8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; v2mz r15, r16, r17 }
+   12400:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
+   12408:	[0-9a-f]* 	{ v1add r15, r16, r17 ; dblalign2 r5, r6, r7 }
+   12410:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; v1add r15, r16, r17 }
+   12418:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; v1add r15, r16, r17 }
+   12420:	[0-9a-f]* 	{ v1add r15, r16, r17 ; v1shl r5, r6, r7 }
+   12428:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; v1add r15, r16, r17 }
+   12430:	[0-9a-f]* 	{ v1add r5, r6, r7 ; cmpltsi r15, r16, 5 }
+   12438:	[0-9a-f]* 	{ v1add r5, r6, r7 ; ld2u_add r15, r16, 5 }
+   12440:	[0-9a-f]* 	{ v1add r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+   12448:	[0-9a-f]* 	{ v1add r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   12450:	[0-9a-f]* 	{ v1add r5, r6, r7 ; v2cmples r15, r16, r17 }
+   12458:	[0-9a-f]* 	{ v1add r5, r6, r7 ; xori r15, r16, 5 }
+   12460:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; v1addi r15, r16, 5 }
+   12468:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; v1addi r15, r16, 5 }
+   12470:	[0-9a-f]* 	{ v1addi r15, r16, 5 ; v1addi r5, r6, 5 }
+   12478:	[0-9a-f]* 	{ v1addi r15, r16, 5 ; v1shru r5, r6, r7 }
+   12480:	[0-9a-f]* 	{ v1addi r15, r16, 5 ; v2shlsc r5, r6, r7 }
+   12488:	[0-9a-f]* 	{ v1addi r5, r6, 5 ; dblalign2 r15, r16, r17 }
+   12490:	[0-9a-f]* 	{ v1addi r5, r6, 5 ; ld4u_add r15, r16, 5 }
+   12498:	[0-9a-f]* 	{ v1addi r5, r6, 5 ; prefetch_l2 r15 }
+   124a0:	[0-9a-f]* 	{ v1addi r5, r6, 5 ; sub r15, r16, r17 }
+   124a8:	[0-9a-f]* 	{ v1addi r5, r6, 5 ; v2cmpltu r15, r16, r17 }
+   124b0:	[0-9a-f]* 	{ v1adduc r15, r16, r17 ; addx r5, r6, r7 }
+   124b8:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; v1adduc r15, r16, r17 }
+   124c0:	[0-9a-f]* 	{ v1adduc r15, r16, r17 ; mz r5, r6, r7 }
+   124c8:	[0-9a-f]* 	{ v1adduc r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+   124d0:	[0-9a-f]* 	{ v1adduc r15, r16, r17 ; v2add r5, r6, r7 }
+   124d8:	[0-9a-f]* 	{ v1adduc r15, r16, r17 ; v2shrui r5, r6, 5 }
+   124e0:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; exch r15, r16, r17 }
+   124e8:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; ldnt r15, r16 }
+   124f0:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; raise }
+   124f8:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; v1addi r15, r16, 5 }
+   12500:	[0-9a-f]* 	{ v1adduc r5, r6, r7 ; v2int_l r15, r16, r17 }
+   12508:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; and r15, r16, r17 }
+   12510:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; jrp r15 }
+   12518:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; nop }
+   12520:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; st2 r15, r16 }
+   12528:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; v1shru r15, r16, r17 }
+   12530:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; v4packsc r15, r16, r17 }
+   12538:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; fetchand r15, r16, r17 }
+   12540:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+   12548:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; shl1addx r15, r16, r17 }
+   12550:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; v1cmplts r15, r16, r17 }
+   12558:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; v2mz r15, r16, r17 }
+   12560:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+   12568:	[0-9a-f]* 	{ fsingle_sub1 r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+   12570:	[0-9a-f]* 	{ v1cmpeq r15, r16, r17 ; shl r5, r6, r7 }
+   12578:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+   12580:	[0-9a-f]* 	{ v1cmpeq r15, r16, r17 ; v2cmpltsi r5, r6, 5 }
+   12588:	[0-9a-f]* 	{ v1cmpeq r15, r16, r17 ; v4shrs r5, r6, r7 }
+   12590:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; finv r15 }
+   12598:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+   125a0:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 }
+   125a8:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; v1cmpne r15, r16, r17 }
+   125b0:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; v2shl r15, r16, r17 }
+   125b8:	[0-9a-f]* 	{ v1cmpeqi r15, r16, 5 ; cmples r5, r6, r7 }
+   125c0:	[0-9a-f]* 	{ v1cmpeqi r15, r16, 5 ; mnz r5, r6, r7 }
+   125c8:	[0-9a-f]* 	{ v1cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 }
+   125d0:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+   125d8:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+   125e0:	[0-9a-f]* 	{ v1cmpeqi r15, r16, 5 ; xor r5, r6, r7 }
+   125e8:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; icoh r15 }
+   125f0:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; lnk r15 }
+   125f8:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; shrs r15, r16, r17 }
+   12600:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; v1maxui r15, r16, 5 }
+   12608:	[0-9a-f]* 	{ v1cmpeqi r5, r6, 5 ; v2shrsi r15, r16, 5 }
+   12610:	[0-9a-f]* 	{ v1cmples r15, r16, r17 ; cmpltu r5, r6, r7 }
+   12618:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; v1cmples r15, r16, r17 }
+   12620:	[0-9a-f]* 	{ v1cmples r15, r16, r17 ; shli r5, r6, 5 }
+   12628:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; v1cmples r15, r16, r17 }
+   12630:	[0-9a-f]* 	{ v1cmples r15, r16, r17 ; v2maxs r5, r6, r7 }
+   12638:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; addli r15, r16, 4660 }
+   12640:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; inv r15 }
+   12648:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; move r15, r16 }
+   12650:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; shrux r15, r16, r17 }
+   12658:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; v1mz r15, r16, r17 }
+   12660:	[0-9a-f]* 	{ v1cmples r5, r6, r7 ; v2subsc r15, r16, r17 }
+   12668:	[0-9a-f]* 	{ cmula r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+   12670:	[0-9a-f]* 	{ mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+   12678:	[0-9a-f]* 	{ v1cmpleu r15, r16, r17 ; shrsi r5, r6, 5 }
+   12680:	[0-9a-f]* 	{ v1cmpleu r15, r16, r17 ; v1maxui r5, r6, 5 }
+   12688:	[0-9a-f]* 	{ v1cmpleu r15, r16, r17 ; v2mnz r5, r6, r7 }
+   12690:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; addxsc r15, r16, r17 }
+   12698:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; jr r15 }
+   126a0:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; mz r15, r16, r17 }
+   126a8:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; st1_add r15, r16, 5 }
+   126b0:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; v1shrsi r15, r16, 5 }
+   126b8:	[0-9a-f]* 	{ v1cmpleu r5, r6, r7 ; v4int_l r15, r16, r17 }
+   126c0:	[0-9a-f]* 	{ cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 }
+   126c8:	[0-9a-f]* 	{ mul_ls_lu r5, r6, r7 ; v1cmplts r15, r16, r17 }
+   126d0:	[0-9a-f]* 	{ v1cmplts r15, r16, r17 ; shruxi r5, r6, 5 }
+   126d8:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; v1cmplts r15, r16, r17 }
+   126e0:	[0-9a-f]* 	{ v1cmplts r15, r16, r17 ; v2mz r5, r6, r7 }
+   126e8:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 }
+   126f0:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
+   126f8:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; ori r15, r16, 5 }
+   12700:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; st4_add r15, r16, 5 }
+   12708:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; v1subuc r15, r16, r17 }
+   12710:	[0-9a-f]* 	{ v1cmplts r5, r6, r7 ; v4shrs r15, r16, r17 }
+   12718:	[0-9a-f]* 	{ ctz r5, r6 ; v1cmpltsi r15, r16, 5 }
+   12720:	[0-9a-f]* 	{ mula_hs_ls r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+   12728:	[0-9a-f]* 	{ v1cmpltsi r15, r16, 5 ; subxsc r5, r6, r7 }
+   12730:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+   12738:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+   12740:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; cmpleu r15, r16, r17 }
+   12748:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; ld2s_add r15, r16, 5 }
+   12750:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; prefetch_add_l2 r15, 5 }
+   12758:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; stnt1_add r15, r16, 5 }
+   12760:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; v2cmpeq r15, r16, r17 }
+   12768:	[0-9a-f]* 	{ v1cmpltsi r5, r6, 5 ; wh64 r15 }
+   12770:	[0-9a-f]* 	{ v1cmpltu r15, r16, r17 ; dblalign6 r5, r6, r7 }
+   12778:	[0-9a-f]* 	{ mula_hu_lu r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+   12780:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; v1cmpltu r15, r16, r17 }
+   12788:	[0-9a-f]* 	{ v1cmpltu r15, r16, r17 ; v1shrs r5, r6, r7 }
+   12790:	[0-9a-f]* 	{ v1cmpltu r15, r16, r17 ; v2shl r5, r6, r7 }
+   12798:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; cmpltui r15, r16, 5 }
+   127a0:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; ld4s_add r15, r16, 5 }
+   127a8:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; prefetch r15 }
+   127b0:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; stnt4_add r15, r16, 5 }
+   127b8:	[0-9a-f]* 	{ v1cmpltu r5, r6, r7 ; v2cmplts r15, r16, r17 }
+   127c0:	[0-9a-f]* 	{ v1cmpltui r15, r16, 5 ; addi r5, r6, 5 }
+   127c8:	[0-9a-f]* 	{ fdouble_pack1 r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+   127d0:	[0-9a-f]* 	{ mulax r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+   127d8:	[0-9a-f]* 	{ v1adiffu r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+   127e0:	[0-9a-f]* 	{ v1cmpltui r15, r16, 5 ; v1sub r5, r6, r7 }
+   127e8:	[0-9a-f]* 	{ v1cmpltui r15, r16, 5 ; v2shrsi r5, r6, 5 }
+   127f0:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; dblalign6 r15, r16, r17 }
+   127f8:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; ldna r15, r16 }
+   12800:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; prefetch_l3 r15 }
+   12808:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; subxsc r15, r16, r17 }
+   12810:	[0-9a-f]* 	{ v1cmpltui r5, r6, 5 ; v2cmpne r15, r16, r17 }
+   12818:	[0-9a-f]* 	{ v1cmpne r15, r16, r17 ; addxli r5, r6, 4660 }
+   12820:	[0-9a-f]* 	{ fdouble_unpack_min r5, r6, r7 ; v1cmpne r15, r16, r17 }
+   12828:	[0-9a-f]* 	{ v1cmpne r15, r16, r17 ; nor r5, r6, r7 }
+   12830:	[0-9a-f]* 	{ v1cmpne r15, r16, r17 ; v1cmples r5, r6, r7 }
+   12838:	[0-9a-f]* 	{ v1cmpne r15, r16, r17 ; v2addsc r5, r6, r7 }
+   12840:	[0-9a-f]* 	{ v1cmpne r15, r16, r17 ; v2subsc r5, r6, r7 }
+   12848:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; fetchadd r15, r16, r17 }
+   12850:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+   12858:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; rotli r15, r16, 5 }
+   12860:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+   12868:	[0-9a-f]* 	{ v1cmpne r5, r6, r7 ; v2maxsi r15, r16, 5 }
+   12870:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; cmpeq r15, r16, r17 }
+   12878:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; ld1s r15, r16 }
+   12880:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; or r15, r16, r17 }
+   12888:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; st4 r15, r16 }
+   12890:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; v1sub r15, r16, r17 }
+   12898:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; v4shlsc r15, r16, r17 }
+   128a0:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; fetchor r15, r16, r17 }
+   128a8:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+   128b0:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; shl2addx r15, r16, r17 }
+   128b8:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+   128c0:	[0-9a-f]* 	{ v1ddotpua r5, r6, r7 ; v2packl r15, r16, r17 }
+   128c8:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; cmplts r15, r16, r17 }
+   128d0:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; ld2u r15, r16 }
+   128d8:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+   128e0:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; stnt2 r15, r16 }
+   128e8:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+   128f0:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; xor r15, r16, r17 }
+   128f8:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; icoh r15 }
+   12900:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; lnk r15 }
+   12908:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; shrs r15, r16, r17 }
+   12910:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; v1maxui r15, r16, 5 }
+   12918:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; v2shrsi r15, r16, 5 }
+   12920:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; dblalign4 r15, r16, r17 }
+   12928:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; ld_add r15, r16, 5 }
+   12930:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; prefetch_l2_fault r15 }
+   12938:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; subx r15, r16, r17 }
+   12940:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; v2cmpltui r15, r16, 5 }
+   12948:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; addxi r15, r16, 5 }
+   12950:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; jalr r15 }
+   12958:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; moveli r15, 4660 }
+   12960:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; st r15, r16 }
+   12968:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; v1shli r15, r16, 5 }
+   12970:	[0-9a-f]* 	{ v1dotpa r5, r6, r7 ; v4addsc r15, r16, r17 }
+   12978:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+   12980:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; ldnt1u r15, r16 }
+   12988:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; shl r15, r16, r17 }
+   12990:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+   12998:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; v2mins r15, r16, r17 }
+   129a0:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; cmpeqi r15, r16, 5 }
+   129a8:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; ld1s_add r15, r16, 5 }
+   129b0:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; ori r15, r16, 5 }
+   129b8:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; st4_add r15, r16, 5 }
+   129c0:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; v1subuc r15, r16, r17 }
+   129c8:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; v4shrs r15, r16, r17 }
+   129d0:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; fetchor4 r15, r16, r17 }
+   129d8:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; ldnt4s r15, r16 }
+   129e0:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; shl3add r15, r16, r17 }
+   129e8:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+   129f0:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; v2packuc r15, r16, r17 }
+   129f8:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; cmpltsi r15, r16, 5 }
+   12a00:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; ld2u_add r15, r16, 5 }
+   12a08:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+   12a10:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   12a18:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; v2cmples r15, r16, r17 }
+   12a20:	[0-9a-f]* 	{ v1dotpusa r5, r6, r7 ; xori r15, r16, 5 }
+   12a28:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; v1int_h r15, r16, r17 }
+   12a30:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; v1int_h r15, r16, r17 }
+   12a38:	[0-9a-f]* 	{ v1int_h r15, r16, r17 ; v1addi r5, r6, 5 }
+   12a40:	[0-9a-f]* 	{ v1int_h r15, r16, r17 ; v1shru r5, r6, r7 }
+   12a48:	[0-9a-f]* 	{ v1int_h r15, r16, r17 ; v2shlsc r5, r6, r7 }
+   12a50:	[0-9a-f]* 	{ v1int_h r5, r6, r7 ; dblalign2 r15, r16, r17 }
+   12a58:	[0-9a-f]* 	{ v1int_h r5, r6, r7 ; ld4u_add r15, r16, 5 }
+   12a60:	[0-9a-f]* 	{ v1int_h r5, r6, r7 ; prefetch_l2 r15 }
+   12a68:	[0-9a-f]* 	{ v1int_h r5, r6, r7 ; sub r15, r16, r17 }
+   12a70:	[0-9a-f]* 	{ v1int_h r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   12a78:	[0-9a-f]* 	{ v1int_l r15, r16, r17 ; addx r5, r6, r7 }
+   12a80:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; v1int_l r15, r16, r17 }
+   12a88:	[0-9a-f]* 	{ v1int_l r15, r16, r17 ; mz r5, r6, r7 }
+   12a90:	[0-9a-f]* 	{ v1int_l r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+   12a98:	[0-9a-f]* 	{ v1int_l r15, r16, r17 ; v2add r5, r6, r7 }
+   12aa0:	[0-9a-f]* 	{ v1int_l r15, r16, r17 ; v2shrui r5, r6, 5 }
+   12aa8:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; exch r15, r16, r17 }
+   12ab0:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; ldnt r15, r16 }
+   12ab8:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; raise }
+   12ac0:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; v1addi r15, r16, 5 }
+   12ac8:	[0-9a-f]* 	{ v1int_l r5, r6, r7 ; v2int_l r15, r16, r17 }
+   12ad0:	[0-9a-f]* 	{ v1maxu r15, r16, r17 ; and r5, r6, r7 }
+   12ad8:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; v1maxu r15, r16, r17 }
+   12ae0:	[0-9a-f]* 	{ v1maxu r15, r16, r17 ; ori r5, r6, 5 }
+   12ae8:	[0-9a-f]* 	{ v1maxu r15, r16, r17 ; v1cmplts r5, r6, r7 }
+   12af0:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; v1maxu r15, r16, r17 }
+   12af8:	[0-9a-f]* 	{ v1maxu r15, r16, r17 ; v4addsc r5, r6, r7 }
+   12b00:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+   12b08:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+   12b10:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; shl16insli r15, r16, 4660 }
+   12b18:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; v1cmples r15, r16, r17 }
+   12b20:	[0-9a-f]* 	{ v1maxu r5, r6, r7 ; v2minsi r15, r16, 5 }
+   12b28:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; v1maxui r15, r16, 5 }
+   12b30:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; v1maxui r15, r16, 5 }
+   12b38:	[0-9a-f]* 	{ v1maxui r15, r16, 5 ; rotl r5, r6, r7 }
+   12b40:	[0-9a-f]* 	{ v1maxui r15, r16, 5 ; v1cmpne r5, r6, r7 }
+   12b48:	[0-9a-f]* 	{ v1maxui r15, r16, 5 ; v2cmpleu r5, r6, r7 }
+   12b50:	[0-9a-f]* 	{ v1maxui r15, r16, 5 ; v4shl r5, r6, r7 }
+   12b58:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; fetchor r15, r16, r17 }
+   12b60:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; ldnt2u_add r15, r16, 5 }
+   12b68:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; shl2addx r15, r16, r17 }
+   12b70:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; v1cmpltu r15, r16, r17 }
+   12b78:	[0-9a-f]* 	{ v1maxui r5, r6, 5 ; v2packl r15, r16, r17 }
+   12b80:	[0-9a-f]* 	{ v1minu r15, r16, r17 ; cmpeq r5, r6, r7 }
+   12b88:	[0-9a-f]* 	{ v1minu r15, r16, r17 ; infol 4660 }
+   12b90:	[0-9a-f]* 	{ v1minu r15, r16, r17 ; shl1add r5, r6, r7 }
+   12b98:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; v1minu r15, r16, r17 }
+   12ba0:	[0-9a-f]* 	{ v1minu r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+   12ba8:	[0-9a-f]* 	{ v1minu r15, r16, r17 ; v4sub r5, r6, r7 }
+   12bb0:	[0-9a-f]* 	{ v1minu r5, r6, r7 ; flushwb }
+   12bb8:	[0-9a-f]* 	{ v1minu r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+   12bc0:	[0-9a-f]* 	{ v1minu r5, r6, r7 ; shlx r15, r16, r17 }
+   12bc8:	[0-9a-f]* 	{ v1minu r5, r6, r7 ; v1int_l r15, r16, r17 }
+   12bd0:	[0-9a-f]* 	{ v1minu r5, r6, r7 ; v2shlsc r15, r16, r17 }
+   12bd8:	[0-9a-f]* 	{ v1minui r15, r16, 5 ; cmplts r5, r6, r7 }
+   12be0:	[0-9a-f]* 	{ v1minui r15, r16, 5 ; movei r5, 5 }
+   12be8:	[0-9a-f]* 	{ v1minui r15, r16, 5 ; shl3add r5, r6, r7 }
+   12bf0:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; v1minui r15, r16, 5 }
+   12bf8:	[0-9a-f]* 	{ v1minui r15, r16, 5 ; v2int_h r5, r6, r7 }
+   12c00:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; add r15, r16, r17 }
+   12c08:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; info 19 }
+   12c10:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+   12c18:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; shru r15, r16, r17 }
+   12c20:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; v1minui r15, r16, 5 }
+   12c28:	[0-9a-f]* 	{ v1minui r5, r6, 5 ; v2shrui r15, r16, 5 }
+   12c30:	[0-9a-f]* 	{ v1mnz r15, r16, r17 ; cmpne r5, r6, r7 }
+   12c38:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; v1mnz r15, r16, r17 }
+   12c40:	[0-9a-f]* 	{ v1mnz r15, r16, r17 ; shlxi r5, r6, 5 }
+   12c48:	[0-9a-f]* 	{ v1mnz r15, r16, r17 ; v1int_l r5, r6, r7 }
+   12c50:	[0-9a-f]* 	{ v1mnz r15, r16, r17 ; v2mins r5, r6, r7 }
+   12c58:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; addxi r15, r16, 5 }
+   12c60:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; jalr r15 }
+   12c68:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; moveli r15, 4660 }
+   12c70:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; st r15, r16 }
+   12c78:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; v1shli r15, r16, 5 }
+   12c80:	[0-9a-f]* 	{ v1mnz r5, r6, r7 ; v4addsc r15, r16, r17 }
+   12c88:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+   12c90:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; ldnt1u r15, r16 }
+   12c98:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; shl r15, r16, r17 }
+   12ca0:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+   12ca8:	[0-9a-f]* 	{ v1multu r5, r6, r7 ; v2mins r15, r16, r17 }
+   12cb0:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; cmpeqi r15, r16, 5 }
+   12cb8:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+   12cc0:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; ori r15, r16, 5 }
+   12cc8:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; st4_add r15, r16, 5 }
+   12cd0:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; v1subuc r15, r16, r17 }
+   12cd8:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; v4shrs r15, r16, r17 }
+   12ce0:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; fetchor4 r15, r16, r17 }
+   12ce8:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; ldnt4s r15, r16 }
+   12cf0:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; shl3add r15, r16, r17 }
+   12cf8:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+   12d00:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; v2packuc r15, r16, r17 }
+   12d08:	[0-9a-f]* 	{ v1mz r15, r16, r17 ; cmpeqi r5, r6, 5 }
+   12d10:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; v1mz r15, r16, r17 }
+   12d18:	[0-9a-f]* 	{ v1mz r15, r16, r17 ; shl1addx r5, r6, r7 }
+   12d20:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; v1mz r15, r16, r17 }
+   12d28:	[0-9a-f]* 	{ v1mz r15, r16, r17 ; v2cmpne r5, r6, r7 }
+   12d30:	[0-9a-f]* 	{ v1mz r15, r16, r17 ; v4subsc r5, r6, r7 }
+   12d38:	[0-9a-f]* 	{ v1mz r5, r6, r7 }
+   12d40:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; ldnt_add r15, r16, 5 }
+   12d48:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; shlxi r15, r16, 5 }
+   12d50:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; v1maxu r15, r16, r17 }
+   12d58:	[0-9a-f]* 	{ v1mz r5, r6, r7 ; v2shrs r15, r16, r17 }
+   12d60:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; dblalign2 r15, r16, r17 }
+   12d68:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; ld4u_add r15, r16, 5 }
+   12d70:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; prefetch_l2 r15 }
+   12d78:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; sub r15, r16, r17 }
+   12d80:	[0-9a-f]* 	{ v1sadau r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   12d88:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; addx r15, r16, r17 }
+   12d90:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; iret }
+   12d98:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; movei r15, 5 }
+   12da0:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; shruxi r15, r16, 5 }
+   12da8:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; v1shl r15, r16, r17 }
+   12db0:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; v4add r15, r16, r17 }
+   12db8:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; v1shl r15, r16, r17 }
+   12dc0:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; v1shl r15, r16, r17 }
+   12dc8:	[0-9a-f]* 	{ v1shl r15, r16, r17 ; shru r5, r6, r7 }
+   12dd0:	[0-9a-f]* 	{ v1shl r15, r16, r17 ; v1minu r5, r6, r7 }
+   12dd8:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; v1shl r15, r16, r17 }
+   12de0:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; and r15, r16, r17 }
+   12de8:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; jrp r15 }
+   12df0:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; nop }
+   12df8:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; st2 r15, r16 }
+   12e00:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; v1shru r15, r16, r17 }
+   12e08:	[0-9a-f]* 	{ v1shl r5, r6, r7 ; v4packsc r15, r16, r17 }
+   12e10:	[0-9a-f]* 	{ cmulhr r5, r6, r7 ; v1shli r15, r16, 5 }
+   12e18:	[0-9a-f]* 	{ mul_lu_lu r5, r6, r7 ; v1shli r15, r16, 5 }
+   12e20:	[0-9a-f]* 	{ shufflebytes r5, r6, r7 ; v1shli r15, r16, 5 }
+   12e28:	[0-9a-f]* 	{ v1mulu r5, r6, r7 ; v1shli r15, r16, 5 }
+   12e30:	[0-9a-f]* 	{ v1shli r15, r16, 5 ; v2packh r5, r6, r7 }
+   12e38:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; cmpexch r15, r16, r17 }
+   12e40:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; ld1u r15, r16 }
+   12e48:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; prefetch r15 }
+   12e50:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; st_add r15, r16, 5 }
+   12e58:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; v2add r15, r16, r17 }
+   12e60:	[0-9a-f]* 	{ v1shli r5, r6, 5 ; v4shru r15, r16, r17 }
+   12e68:	[0-9a-f]* 	{ dblalign r5, r6, r7 ; v1shrs r15, r16, r17 }
+   12e70:	[0-9a-f]* 	{ mula_hs_lu r5, r6, r7 ; v1shrs r15, r16, r17 }
+   12e78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; v1shrs r15, r16, r17 }
+   12e80:	[0-9a-f]* 	{ v1sadu r5, r6, r7 ; v1shrs r15, r16, r17 }
+   12e88:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; v1shrs r15, r16, r17 }
+   12e90:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; cmplts r15, r16, r17 }
+   12e98:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; ld2u r15, r16 }
+   12ea0:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+   12ea8:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; stnt2 r15, r16 }
+   12eb0:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+   12eb8:	[0-9a-f]* 	{ v1shrs r5, r6, r7 ; xor r15, r16, r17 }
+   12ec0:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; v1shrsi r15, r16, 5 }
+   12ec8:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; v1shrsi r15, r16, 5 }
+   12ed0:	[0-9a-f]* 	{ v1shrsi r15, r16, 5 ; v1add r5, r6, r7 }
+   12ed8:	[0-9a-f]* 	{ v1shrsi r15, r16, 5 ; v1shrsi r5, r6, 5 }
+   12ee0:	[0-9a-f]* 	{ v1shrsi r15, r16, 5 ; v2shli r5, r6, 5 }
+   12ee8:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; cmpne r15, r16, r17 }
+   12ef0:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; ld4u r15, r16 }
+   12ef8:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; prefetch_l1_fault r15 }
+   12f00:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; stnt_add r15, r16, 5 }
+   12f08:	[0-9a-f]* 	{ v1shrsi r5, r6, 5 ; v2cmpltsi r15, r16, 5 }
+   12f10:	[0-9a-f]* 	{ v1shru r15, r16, r17 ; addli r5, r6, 4660 }
+   12f18:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; v1shru r15, r16, r17 }
+   12f20:	[0-9a-f]* 	{ mulx r5, r6, r7 ; v1shru r15, r16, r17 }
+   12f28:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; v1shru r15, r16, r17 }
+   12f30:	[0-9a-f]* 	{ v1shru r15, r16, r17 ; v1subuc r5, r6, r7 }
+   12f38:	[0-9a-f]* 	{ v1shru r15, r16, r17 ; v2shru r5, r6, r7 }
+   12f40:	[0-9a-f]* 	{ v1shru r5, r6, r7 ; dtlbpr r15 }
+   12f48:	[0-9a-f]* 	{ v1shru r5, r6, r7 ; ldna_add r15, r16, 5 }
+   12f50:	[0-9a-f]* 	{ v1shru r5, r6, r7 ; prefetch_l3_fault r15 }
+   12f58:	[0-9a-f]* 	{ v1shru r5, r6, r7 ; v1add r15, r16, r17 }
+   12f60:	[0-9a-f]* 	{ v1shru r5, r6, r7 ; v2int_h r15, r16, r17 }
+   12f68:	[0-9a-f]* 	{ v1shrui r15, r16, 5 ; addxsc r5, r6, r7 }
+   12f70:	[0-9a-f]* 	{ v1shrui r15, r16, 5 }
+   12f78:	[0-9a-f]* 	{ v1shrui r15, r16, 5 ; or r5, r6, r7 }
+   12f80:	[0-9a-f]* 	{ v1shrui r15, r16, 5 ; v1cmpleu r5, r6, r7 }
+   12f88:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; v1shrui r15, r16, 5 }
+   12f90:	[0-9a-f]* 	{ v1shrui r15, r16, 5 ; v4add r5, r6, r7 }
+   12f98:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; fetchadd4 r15, r16, r17 }
+   12fa0:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; ldnt1u r15, r16 }
+   12fa8:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; shl r15, r16, r17 }
+   12fb0:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
+   12fb8:	[0-9a-f]* 	{ v1shrui r5, r6, 5 ; v2mins r15, r16, r17 }
+   12fc0:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; v1sub r15, r16, r17 }
+   12fc8:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; v1sub r15, r16, r17 }
+   12fd0:	[0-9a-f]* 	{ revbytes r5, r6 ; v1sub r15, r16, r17 }
+   12fd8:	[0-9a-f]* 	{ v1sub r15, r16, r17 ; v1cmpltui r5, r6, 5 }
+   12fe0:	[0-9a-f]* 	{ v1sub r15, r16, r17 ; v2cmples r5, r6, r7 }
+   12fe8:	[0-9a-f]* 	{ v1sub r15, r16, r17 ; v4packsc r5, r6, r7 }
+   12ff0:	[0-9a-f]* 	{ v1sub r5, r6, r7 ; fetchand4 r15, r16, r17 }
+   12ff8:	[0-9a-f]* 	{ v1sub r5, r6, r7 ; ldnt2u r15, r16 }
+   13000:	[0-9a-f]* 	{ v1sub r5, r6, r7 ; shl2add r15, r16, r17 }
+   13008:	[0-9a-f]* 	{ v1sub r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+   13010:	[0-9a-f]* 	{ v1sub r5, r6, r7 ; v2packh r15, r16, r17 }
+   13018:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; v1subuc r15, r16, r17 }
+   13020:	[0-9a-f]* 	{ v1subuc r15, r16, r17 ; info 19 }
+   13028:	[0-9a-f]* 	{ v1subuc r15, r16, r17 ; shl16insli r5, r6, 4660 }
+   13030:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; v1subuc r15, r16, r17 }
+   13038:	[0-9a-f]* 	{ v1subuc r15, r16, r17 ; v2cmpltu r5, r6, r7 }
+   13040:	[0-9a-f]* 	{ v1subuc r15, r16, r17 ; v4shru r5, r6, r7 }
+   13048:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; flush r15 }
+   13050:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; ldnt4u r15, r16 }
+   13058:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; shli r15, r16, 5 }
+   13060:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; v1int_h r15, r16, r17 }
+   13068:	[0-9a-f]* 	{ v1subuc r5, r6, r7 ; v2shli r15, r16, 5 }
+   13070:	[0-9a-f]* 	{ v2add r15, r16, r17 ; cmpleu r5, r6, r7 }
+   13078:	[0-9a-f]* 	{ v2add r15, r16, r17 ; move r5, r6 }
+   13080:	[0-9a-f]* 	{ v2add r15, r16, r17 ; shl2addx r5, r6, r7 }
+   13088:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; v2add r15, r16, r17 }
+   13090:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; v2add r15, r16, r17 }
+   13098:	[0-9a-f]* 	{ v2add r15, r16, r17 ; xori r5, r6, 5 }
+   130a0:	[0-9a-f]* 	{ v2add r5, r6, r7 ; ill }
+   130a8:	[0-9a-f]* 	{ v2add r5, r6, r7 ; mf }
+   130b0:	[0-9a-f]* 	{ v2add r5, r6, r7 ; shrsi r15, r16, 5 }
+   130b8:	[0-9a-f]* 	{ v2add r5, r6, r7 ; v1minu r15, r16, r17 }
+   130c0:	[0-9a-f]* 	{ v2add r5, r6, r7 ; v2shru r15, r16, r17 }
+   130c8:	[0-9a-f]* 	{ v2addi r15, r16, 5 ; cmpltui r5, r6, 5 }
+   130d0:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; v2addi r15, r16, 5 }
+   130d8:	[0-9a-f]* 	{ v2addi r15, r16, 5 ; shlx r5, r6, r7 }
+   130e0:	[0-9a-f]* 	{ v2addi r15, r16, 5 ; v1int_h r5, r6, r7 }
+   130e8:	[0-9a-f]* 	{ v2addi r15, r16, 5 ; v2maxsi r5, r6, 5 }
+   130f0:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; addx r15, r16, r17 }
+   130f8:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; iret }
+   13100:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; movei r15, 5 }
+   13108:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; shruxi r15, r16, 5 }
+   13110:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; v1shl r15, r16, r17 }
+   13118:	[0-9a-f]* 	{ v2addi r5, r6, 5 ; v4add r15, r16, r17 }
+   13120:	[0-9a-f]* 	{ cmulaf r5, r6, r7 ; v2addsc r15, r16, r17 }
+   13128:	[0-9a-f]* 	{ mul_hu_ls r5, r6, r7 ; v2addsc r15, r16, r17 }
+   13130:	[0-9a-f]* 	{ v2addsc r15, r16, r17 ; shru r5, r6, r7 }
+   13138:	[0-9a-f]* 	{ v2addsc r15, r16, r17 ; v1minu r5, r6, r7 }
+   13140:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; v2addsc r15, r16, r17 }
+   13148:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; and r15, r16, r17 }
+   13150:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; jrp r15 }
+   13158:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; nop }
+   13160:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; st2 r15, r16 }
+   13168:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; v1shru r15, r16, r17 }
+   13170:	[0-9a-f]* 	{ v2addsc r5, r6, r7 ; v4packsc r15, r16, r17 }
+   13178:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; fetchand r15, r16, r17 }
+   13180:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+   13188:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; shl1addx r15, r16, r17 }
+   13190:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; v1cmplts r15, r16, r17 }
+   13198:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; v2mz r15, r16, r17 }
+   131a0:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; cmples r15, r16, r17 }
+   131a8:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; ld2s r15, r16 }
+   131b0:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+   131b8:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; stnt1 r15, r16 }
+   131c0:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; v2addsc r15, r16, r17 }
+   131c8:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; v4subsc r15, r16, r17 }
+   131d0:	[0-9a-f]* 	{ v2cmpeq r15, r16, r17 ; dblalign4 r5, r6, r7 }
+   131d8:	[0-9a-f]* 	{ mula_hu_ls r5, r6, r7 ; v2cmpeq r15, r16, r17 }
+   131e0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; v2cmpeq r15, r16, r17 }
+   131e8:	[0-9a-f]* 	{ v2cmpeq r15, r16, r17 ; v1shli r5, r6, 5 }
+   131f0:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; v2cmpeq r15, r16, r17 }
+   131f8:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 }
+   13200:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; ld4s r15, r16 }
+   13208:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+   13210:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; stnt4 r15, r16 }
+   13218:	[0-9a-f]* 	{ v2cmpeq r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+   13220:	[0-9a-f]* 	{ v2cmpeqi r15, r16, 5 ; add r5, r6, r7 }
+   13228:	[0-9a-f]* 	{ fdouble_mul_flags r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+   13230:	[0-9a-f]* 	{ mula_lu_lu r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+   13238:	[0-9a-f]* 	{ v2cmpeqi r15, r16, 5 ; v1adduc r5, r6, r7 }
+   13240:	[0-9a-f]* 	{ v2cmpeqi r15, r16, 5 ; v1shrui r5, r6, 5 }
+   13248:	[0-9a-f]* 	{ v2cmpeqi r15, r16, 5 ; v2shrs r5, r6, r7 }
+   13250:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; dblalign4 r15, r16, r17 }
+   13258:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 }
+   13260:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; prefetch_l2_fault r15 }
+   13268:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; subx r15, r16, r17 }
+   13270:	[0-9a-f]* 	{ v2cmpeqi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
+   13278:	[0-9a-f]* 	{ v2cmples r15, r16, r17 ; addxi r5, r6, 5 }
+   13280:	[0-9a-f]* 	{ fdouble_unpack_max r5, r6, r7 ; v2cmples r15, r16, r17 }
+   13288:	[0-9a-f]* 	{ v2cmples r15, r16, r17 ; nop }
+   13290:	[0-9a-f]* 	{ v2cmples r15, r16, r17 ; v1cmpeqi r5, r6, 5 }
+   13298:	[0-9a-f]* 	{ v2cmples r15, r16, r17 ; v2addi r5, r6, 5 }
+   132a0:	[0-9a-f]* 	{ v2cmples r15, r16, r17 ; v2sub r5, r6, r7 }
+   132a8:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; exch4 r15, r16, r17 }
+   132b0:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; ldnt1s r15, r16 }
+   132b8:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; rotl r15, r16, r17 }
+   132c0:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; v1adduc r15, r16, r17 }
+   132c8:	[0-9a-f]* 	{ v2cmples r5, r6, r7 ; v2maxs r15, r16, r17 }
+   132d0:	[0-9a-f]* 	{ v2cmpleu r15, r16, r17 ; andi r5, r6, 5 }
+   132d8:	[0-9a-f]* 	{ fsingle_addsub2 r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+   132e0:	[0-9a-f]* 	{ pcnt r5, r6 ; v2cmpleu r15, r16, r17 }
+   132e8:	[0-9a-f]* 	{ v2cmpleu r15, r16, r17 ; v1cmpltsi r5, r6, 5 }
+   132f0:	[0-9a-f]* 	{ v2cmpleu r15, r16, r17 ; v2cmpeq r5, r6, r7 }
+   132f8:	[0-9a-f]* 	{ v2cmpleu r15, r16, r17 ; v4int_h r5, r6, r7 }
+   13300:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+   13308:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; ldnt2s r15, r16 }
+   13310:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; shl1add r15, r16, r17 }
+   13318:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+   13320:	[0-9a-f]* 	{ v2cmpleu r5, r6, r7 ; v2mnz r15, r16, r17 }
+   13328:	[0-9a-f]* 	{ clz r5, r6 ; v2cmplts r15, r16, r17 }
+   13330:	[0-9a-f]* 	{ fsingle_pack2 r5, r6, r7 ; v2cmplts r15, r16, r17 }
+   13338:	[0-9a-f]* 	{ v2cmplts r15, r16, r17 ; rotli r5, r6, 5 }
+   13340:	[0-9a-f]* 	{ v1ddotpu r5, r6, r7 ; v2cmplts r15, r16, r17 }
+   13348:	[0-9a-f]* 	{ v2cmplts r15, r16, r17 ; v2cmplts r5, r6, r7 }
+   13350:	[0-9a-f]* 	{ v2cmplts r15, r16, r17 ; v4shlsc r5, r6, r7 }
+   13358:	[0-9a-f]* 	{ v2cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 }
+   13360:	[0-9a-f]* 	{ v2cmplts r5, r6, r7 ; ldnt4s r15, r16 }
+   13368:	[0-9a-f]* 	{ v2cmplts r5, r6, r7 ; shl3add r15, r16, r17 }
+   13370:	[0-9a-f]* 	{ v2cmplts r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+   13378:	[0-9a-f]* 	{ v2cmplts r5, r6, r7 ; v2packuc r15, r16, r17 }
+   13380:	[0-9a-f]* 	{ v2cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 }
+   13388:	[0-9a-f]* 	{ mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 }
+   13390:	[0-9a-f]* 	{ v2cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 }
+   13398:	[0-9a-f]* 	{ v1dotp r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+   133a0:	[0-9a-f]* 	{ v2cmpltsi r15, r16, 5 ; v2cmpne r5, r6, r7 }
+   133a8:	[0-9a-f]* 	{ v2cmpltsi r15, r16, 5 ; v4subsc r5, r6, r7 }
+   133b0:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 }
+   133b8:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; ldnt_add r15, r16, 5 }
+   133c0:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; shlxi r15, r16, 5 }
+   133c8:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; v1maxu r15, r16, r17 }
+   133d0:	[0-9a-f]* 	{ v2cmpltsi r5, r6, 5 ; v2shrs r15, r16, r17 }
+   133d8:	[0-9a-f]* 	{ v2cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 }
+   133e0:	[0-9a-f]* 	{ v2cmpltu r15, r16, r17 ; moveli r5, 4660 }
+   133e8:	[0-9a-f]* 	{ v2cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 }
+   133f0:	[0-9a-f]* 	{ v1dotpus r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   133f8:	[0-9a-f]* 	{ v2cmpltu r15, r16, r17 ; v2int_l r5, r6, r7 }
+   13400:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; addi r15, r16, 5 }
+   13408:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; infol 4660 }
+   13410:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; mnz r15, r16, r17 }
+   13418:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; shrui r15, r16, 5 }
+   13420:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; v1mnz r15, r16, r17 }
+   13428:	[0-9a-f]* 	{ v2cmpltu r5, r6, r7 ; v2sub r15, r16, r17 }
+   13430:	[0-9a-f]* 	{ cmul r5, r6, r7 ; v2cmpltui r15, r16, 5 }
+   13438:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; v2cmpltui r15, r16, 5 }
+   13440:	[0-9a-f]* 	{ v2cmpltui r15, r16, 5 ; shrs r5, r6, r7 }
+   13448:	[0-9a-f]* 	{ v2cmpltui r15, r16, 5 ; v1maxu r5, r6, r7 }
+   13450:	[0-9a-f]* 	{ v2cmpltui r15, r16, 5 ; v2minsi r5, r6, 5 }
+   13458:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; addxli r15, r16, 4660 }
+   13460:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; jalrp r15 }
+   13468:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+   13470:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; st1 r15, r16 }
+   13478:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; v1shrs r15, r16, r17 }
+   13480:	[0-9a-f]* 	{ v2cmpltui r5, r6, 5 ; v4int_h r15, r16, r17 }
+   13488:	[0-9a-f]* 	{ cmulfr r5, r6, r7 ; v2cmpne r15, r16, r17 }
+   13490:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; v2cmpne r15, r16, r17 }
+   13498:	[0-9a-f]* 	{ v2cmpne r15, r16, r17 ; shrux r5, r6, r7 }
+   134a0:	[0-9a-f]* 	{ v2cmpne r15, r16, r17 ; v1mnz r5, r6, r7 }
+   134a8:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; v2cmpne r15, r16, r17 }
+   134b0:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; cmpeq r15, r16, r17 }
+   134b8:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; ld1s r15, r16 }
+   134c0:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; or r15, r16, r17 }
+   134c8:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; st4 r15, r16 }
+   134d0:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; v1sub r15, r16, r17 }
+   134d8:	[0-9a-f]* 	{ v2cmpne r5, r6, r7 ; v4shlsc r15, r16, r17 }
+   134e0:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; fetchor r15, r16, r17 }
+   134e8:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+   134f0:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; shl2addx r15, r16, r17 }
+   134f8:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+   13500:	[0-9a-f]* 	{ v2dotp r5, r6, r7 ; v2packl r15, r16, r17 }
+   13508:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; cmplts r15, r16, r17 }
+   13510:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; ld2u r15, r16 }
+   13518:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+   13520:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; stnt2 r15, r16 }
+   13528:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+   13530:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; xor r15, r16, r17 }
+   13538:	[0-9a-f]* 	{ fdouble_add_flags r5, r6, r7 ; v2int_h r15, r16, r17 }
+   13540:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; v2int_h r15, r16, r17 }
+   13548:	[0-9a-f]* 	{ v2int_h r15, r16, r17 ; v1add r5, r6, r7 }
+   13550:	[0-9a-f]* 	{ v2int_h r15, r16, r17 ; v1shrsi r5, r6, 5 }
+   13558:	[0-9a-f]* 	{ v2int_h r15, r16, r17 ; v2shli r5, r6, 5 }
+   13560:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; cmpne r15, r16, r17 }
+   13568:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; ld4u r15, r16 }
+   13570:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; prefetch_l1_fault r15 }
+   13578:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; stnt_add r15, r16, 5 }
+   13580:	[0-9a-f]* 	{ v2int_h r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+   13588:	[0-9a-f]* 	{ v2int_l r15, r16, r17 ; addli r5, r6, 4660 }
+   13590:	[0-9a-f]* 	{ fdouble_pack2 r5, r6, r7 ; v2int_l r15, r16, r17 }
+   13598:	[0-9a-f]* 	{ mulx r5, r6, r7 ; v2int_l r15, r16, r17 }
+   135a0:	[0-9a-f]* 	{ v1avgu r5, r6, r7 ; v2int_l r15, r16, r17 }
+   135a8:	[0-9a-f]* 	{ v2int_l r15, r16, r17 ; v1subuc r5, r6, r7 }
+   135b0:	[0-9a-f]* 	{ v2int_l r15, r16, r17 ; v2shru r5, r6, r7 }
+   135b8:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; dtlbpr r15 }
+   135c0:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; ldna_add r15, r16, 5 }
+   135c8:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; prefetch_l3_fault r15 }
+   135d0:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; v1add r15, r16, r17 }
+   135d8:	[0-9a-f]* 	{ v2int_l r5, r6, r7 ; v2int_h r15, r16, r17 }
+   135e0:	[0-9a-f]* 	{ v2maxs r15, r16, r17 ; addxsc r5, r6, r7 }
+   135e8:	[0-9a-f]* 	{ v2maxs r15, r16, r17 }
+   135f0:	[0-9a-f]* 	{ v2maxs r15, r16, r17 ; or r5, r6, r7 }
+   135f8:	[0-9a-f]* 	{ v2maxs r15, r16, r17 ; v1cmpleu r5, r6, r7 }
+   13600:	[0-9a-f]* 	{ v2adiffs r5, r6, r7 ; v2maxs r15, r16, r17 }
+   13608:	[0-9a-f]* 	{ v2maxs r15, r16, r17 ; v4add r5, r6, r7 }
+   13610:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+   13618:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; ldnt1u r15, r16 }
+   13620:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; shl r15, r16, r17 }
+   13628:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+   13630:	[0-9a-f]* 	{ v2maxs r5, r6, r7 ; v2mins r15, r16, r17 }
+   13638:	[0-9a-f]* 	{ bfextu r5, r6, 5, 7 ; v2maxsi r15, r16, 5 }
+   13640:	[0-9a-f]* 	{ fsingle_mul2 r5, r6, r7 ; v2maxsi r15, r16, 5 }
+   13648:	[0-9a-f]* 	{ revbytes r5, r6 ; v2maxsi r15, r16, 5 }
+   13650:	[0-9a-f]* 	{ v2maxsi r15, r16, 5 ; v1cmpltui r5, r6, 5 }
+   13658:	[0-9a-f]* 	{ v2maxsi r15, r16, 5 ; v2cmples r5, r6, r7 }
+   13660:	[0-9a-f]* 	{ v2maxsi r15, r16, 5 ; v4packsc r5, r6, r7 }
+   13668:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; fetchand4 r15, r16, r17 }
+   13670:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; ldnt2u r15, r16 }
+   13678:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; shl2add r15, r16, r17 }
+   13680:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; v1cmpltsi r15, r16, 5 }
+   13688:	[0-9a-f]* 	{ v2maxsi r5, r6, 5 ; v2packh r15, r16, r17 }
+   13690:	[0-9a-f]* 	{ cmovnez r5, r6, r7 ; v2mins r15, r16, r17 }
+   13698:	[0-9a-f]* 	{ v2mins r15, r16, r17 ; info 19 }
+   136a0:	[0-9a-f]* 	{ v2mins r15, r16, r17 ; shl16insli r5, r6, 4660 }
+   136a8:	[0-9a-f]* 	{ v1ddotpus r5, r6, r7 ; v2mins r15, r16, r17 }
+   136b0:	[0-9a-f]* 	{ v2mins r15, r16, r17 ; v2cmpltu r5, r6, r7 }
+   136b8:	[0-9a-f]* 	{ v2mins r15, r16, r17 ; v4shru r5, r6, r7 }
+   136c0:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; flush r15 }
+   136c8:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; ldnt4u r15, r16 }
+   136d0:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; shli r15, r16, 5 }
+   136d8:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; v1int_h r15, r16, r17 }
+   136e0:	[0-9a-f]* 	{ v2mins r5, r6, r7 ; v2shli r15, r16, 5 }
+   136e8:	[0-9a-f]* 	{ v2minsi r15, r16, 5 ; cmpleu r5, r6, r7 }
+   136f0:	[0-9a-f]* 	{ v2minsi r15, r16, 5 ; move r5, r6 }
+   136f8:	[0-9a-f]* 	{ v2minsi r15, r16, 5 ; shl2addx r5, r6, r7 }
+   13700:	[0-9a-f]* 	{ v1dotpu r5, r6, r7 ; v2minsi r15, r16, 5 }
+   13708:	[0-9a-f]* 	{ v2dotpa r5, r6, r7 ; v2minsi r15, r16, 5 }
+   13710:	[0-9a-f]* 	{ v2minsi r15, r16, 5 ; xori r5, r6, 5 }
+   13718:	[0-9a-f]* 	{ v2minsi r5, r6, 5 ; ill }
+   13720:	[0-9a-f]* 	{ v2minsi r5, r6, 5 ; mf }
+   13728:	[0-9a-f]* 	{ v2minsi r5, r6, 5 ; shrsi r15, r16, 5 }
+   13730:	[0-9a-f]* 	{ v2minsi r5, r6, 5 ; v1minu r15, r16, r17 }
+   13738:	[0-9a-f]* 	{ v2minsi r5, r6, 5 ; v2shru r15, r16, r17 }
+   13740:	[0-9a-f]* 	{ v2mnz r15, r16, r17 ; cmpltui r5, r6, 5 }
+   13748:	[0-9a-f]* 	{ mul_hs_hu r5, r6, r7 ; v2mnz r15, r16, r17 }
+   13750:	[0-9a-f]* 	{ v2mnz r15, r16, r17 ; shlx r5, r6, r7 }
+   13758:	[0-9a-f]* 	{ v2mnz r15, r16, r17 ; v1int_h r5, r6, r7 }
+   13760:	[0-9a-f]* 	{ v2mnz r15, r16, r17 ; v2maxsi r5, r6, 5 }
+   13768:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; addx r15, r16, r17 }
+   13770:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; iret }
+   13778:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; movei r15, 5 }
+   13780:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; shruxi r15, r16, 5 }
+   13788:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; v1shl r15, r16, r17 }
+   13790:	[0-9a-f]* 	{ v2mnz r5, r6, r7 ; v4add r15, r16, r17 }
+   13798:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; fetchadd r15, r16, r17 }
+   137a0:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+   137a8:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; rotli r15, r16, 5 }
+   137b0:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+   137b8:	[0-9a-f]* 	{ v2mulfsc r5, r6, r7 ; v2maxsi r15, r16, 5 }
+   137c0:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; cmpeq r15, r16, r17 }
+   137c8:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; ld1s r15, r16 }
+   137d0:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; or r15, r16, r17 }
+   137d8:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; st4 r15, r16 }
+   137e0:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; v1sub r15, r16, r17 }
+   137e8:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; v4shlsc r15, r16, r17 }
+   137f0:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; fetchor r15, r16, r17 }
+   137f8:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+   13800:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; shl2addx r15, r16, r17 }
+   13808:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+   13810:	[0-9a-f]* 	{ v2mults r5, r6, r7 ; v2packl r15, r16, r17 }
+   13818:	[0-9a-f]* 	{ v2mz r15, r16, r17 ; cmpeq r5, r6, r7 }
+   13820:	[0-9a-f]* 	{ v2mz r15, r16, r17 ; infol 4660 }
+   13828:	[0-9a-f]* 	{ v2mz r15, r16, r17 ; shl1add r5, r6, r7 }
+   13830:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; v2mz r15, r16, r17 }
+   13838:	[0-9a-f]* 	{ v2mz r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+   13840:	[0-9a-f]* 	{ v2mz r15, r16, r17 ; v4sub r5, r6, r7 }
+   13848:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; flushwb }
+   13850:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+   13858:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; shlx r15, r16, r17 }
+   13860:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; v1int_l r15, r16, r17 }
+   13868:	[0-9a-f]* 	{ v2mz r5, r6, r7 ; v2shlsc r15, r16, r17 }
+   13870:	[0-9a-f]* 	{ v2packh r15, r16, r17 ; cmplts r5, r6, r7 }
+   13878:	[0-9a-f]* 	{ v2packh r15, r16, r17 ; movei r5, 5 }
+   13880:	[0-9a-f]* 	{ v2packh r15, r16, r17 ; shl3add r5, r6, r7 }
+   13888:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; v2packh r15, r16, r17 }
+   13890:	[0-9a-f]* 	{ v2packh r15, r16, r17 ; v2int_h r5, r6, r7 }
+   13898:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; add r15, r16, r17 }
+   138a0:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; info 19 }
+   138a8:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+   138b0:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; shru r15, r16, r17 }
+   138b8:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; v1minui r15, r16, 5 }
+   138c0:	[0-9a-f]* 	{ v2packh r5, r6, r7 ; v2shrui r15, r16, 5 }
+   138c8:	[0-9a-f]* 	{ v2packl r15, r16, r17 ; cmpne r5, r6, r7 }
+   138d0:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; v2packl r15, r16, r17 }
+   138d8:	[0-9a-f]* 	{ v2packl r15, r16, r17 ; shlxi r5, r6, 5 }
+   138e0:	[0-9a-f]* 	{ v2packl r15, r16, r17 ; v1int_l r5, r6, r7 }
+   138e8:	[0-9a-f]* 	{ v2packl r15, r16, r17 ; v2mins r5, r6, r7 }
+   138f0:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; addxi r15, r16, 5 }
+   138f8:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; jalr r15 }
+   13900:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; moveli r15, 4660 }
+   13908:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; st r15, r16 }
+   13910:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; v1shli r15, r16, 5 }
+   13918:	[0-9a-f]* 	{ v2packl r5, r6, r7 ; v4addsc r15, r16, r17 }
+   13920:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; v2packuc r15, r16, r17 }
+   13928:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; v2packuc r15, r16, r17 }
+   13930:	[0-9a-f]* 	{ v2packuc r15, r16, r17 ; shrui r5, r6, 5 }
+   13938:	[0-9a-f]* 	{ v2packuc r15, r16, r17 ; v1minui r5, r6, 5 }
+   13940:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; v2packuc r15, r16, r17 }
+   13948:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; andi r15, r16, 5 }
+   13950:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; ld r15, r16 }
+   13958:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; nor r15, r16, r17 }
+   13960:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; st2_add r15, r16, 5 }
+   13968:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; v1shrui r15, r16, 5 }
+   13970:	[0-9a-f]* 	{ v2packuc r5, r6, r7 ; v4shl r15, r16, r17 }
+   13978:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; fetchand4 r15, r16, r17 }
+   13980:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; ldnt2u r15, r16 }
+   13988:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; shl2add r15, r16, r17 }
+   13990:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+   13998:	[0-9a-f]* 	{ v2sadas r5, r6, r7 ; v2packh r15, r16, r17 }
+   139a0:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; cmpleu r15, r16, r17 }
+   139a8:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; ld2s_add r15, r16, 5 }
+   139b0:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+   139b8:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; stnt1_add r15, r16, 5 }
+   139c0:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; v2cmpeq r15, r16, r17 }
+   139c8:	[0-9a-f]* 	{ v2sadau r5, r6, r7 ; wh64 r15 }
+   139d0:	[0-9a-f]* 	{ v2sads r5, r6, r7 }
+   139d8:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; ldnt_add r15, r16, 5 }
+   139e0:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; shlxi r15, r16, 5 }
+   139e8:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; v1maxu r15, r16, r17 }
+   139f0:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; v2shrs r15, r16, r17 }
+   139f8:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; dblalign2 r15, r16, r17 }
+   13a00:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; ld4u_add r15, r16, 5 }
+   13a08:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; prefetch_l2 r15 }
+   13a10:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; sub r15, r16, r17 }
+   13a18:	[0-9a-f]* 	{ v2sadu r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   13a20:	[0-9a-f]* 	{ v2shl r15, r16, r17 ; addx r5, r6, r7 }
+   13a28:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; v2shl r15, r16, r17 }
+   13a30:	[0-9a-f]* 	{ v2shl r15, r16, r17 ; mz r5, r6, r7 }
+   13a38:	[0-9a-f]* 	{ v2shl r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+   13a40:	[0-9a-f]* 	{ v2shl r15, r16, r17 ; v2add r5, r6, r7 }
+   13a48:	[0-9a-f]* 	{ v2shl r15, r16, r17 ; v2shrui r5, r6, 5 }
+   13a50:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; exch r15, r16, r17 }
+   13a58:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; ldnt r15, r16 }
+   13a60:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; raise }
+   13a68:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; v1addi r15, r16, 5 }
+   13a70:	[0-9a-f]* 	{ v2shl r5, r6, r7 ; v2int_l r15, r16, r17 }
+   13a78:	[0-9a-f]* 	{ v2shli r15, r16, 5 ; and r5, r6, r7 }
+   13a80:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; v2shli r15, r16, 5 }
+   13a88:	[0-9a-f]* 	{ v2shli r15, r16, 5 ; ori r5, r6, 5 }
+   13a90:	[0-9a-f]* 	{ v2shli r15, r16, 5 ; v1cmplts r5, r6, r7 }
+   13a98:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; v2shli r15, r16, 5 }
+   13aa0:	[0-9a-f]* 	{ v2shli r15, r16, 5 ; v4addsc r5, r6, r7 }
+   13aa8:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; fetchaddgez r15, r16, r17 }
+   13ab0:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 }
+   13ab8:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; shl16insli r15, r16, 4660 }
+   13ac0:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; v1cmples r15, r16, r17 }
+   13ac8:	[0-9a-f]* 	{ v2shli r5, r6, 5 ; v2minsi r15, r16, 5 }
+   13ad0:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; v2shlsc r15, r16, r17 }
+   13ad8:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; v2shlsc r15, r16, r17 }
+   13ae0:	[0-9a-f]* 	{ v2shlsc r15, r16, r17 ; rotl r5, r6, r7 }
+   13ae8:	[0-9a-f]* 	{ v2shlsc r15, r16, r17 ; v1cmpne r5, r6, r7 }
+   13af0:	[0-9a-f]* 	{ v2shlsc r15, r16, r17 ; v2cmpleu r5, r6, r7 }
+   13af8:	[0-9a-f]* 	{ v2shlsc r15, r16, r17 ; v4shl r5, r6, r7 }
+   13b00:	[0-9a-f]* 	{ v2shlsc r5, r6, r7 ; fetchor r15, r16, r17 }
+   13b08:	[0-9a-f]* 	{ v2shlsc r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+   13b10:	[0-9a-f]* 	{ v2shlsc r5, r6, r7 ; shl2addx r15, r16, r17 }
+   13b18:	[0-9a-f]* 	{ v2shlsc r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+   13b20:	[0-9a-f]* 	{ v2shlsc r5, r6, r7 ; v2packl r15, r16, r17 }
+   13b28:	[0-9a-f]* 	{ v2shrs r15, r16, r17 ; cmpeq r5, r6, r7 }
+   13b30:	[0-9a-f]* 	{ v2shrs r15, r16, r17 ; infol 4660 }
+   13b38:	[0-9a-f]* 	{ v2shrs r15, r16, r17 ; shl1add r5, r6, r7 }
+   13b40:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; v2shrs r15, r16, r17 }
+   13b48:	[0-9a-f]* 	{ v2shrs r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+   13b50:	[0-9a-f]* 	{ v2shrs r15, r16, r17 ; v4sub r5, r6, r7 }
+   13b58:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; flushwb }
+   13b60:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+   13b68:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; shlx r15, r16, r17 }
+   13b70:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; v1int_l r15, r16, r17 }
+   13b78:	[0-9a-f]* 	{ v2shrs r5, r6, r7 ; v2shlsc r15, r16, r17 }
+   13b80:	[0-9a-f]* 	{ v2shrsi r15, r16, 5 ; cmplts r5, r6, r7 }
+   13b88:	[0-9a-f]* 	{ v2shrsi r15, r16, 5 ; movei r5, 5 }
+   13b90:	[0-9a-f]* 	{ v2shrsi r15, r16, 5 ; shl3add r5, r6, r7 }
+   13b98:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; v2shrsi r15, r16, 5 }
+   13ba0:	[0-9a-f]* 	{ v2shrsi r15, r16, 5 ; v2int_h r5, r6, r7 }
+   13ba8:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; add r15, r16, r17 }
+   13bb0:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; info 19 }
+   13bb8:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+   13bc0:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; shru r15, r16, r17 }
+   13bc8:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; v1minui r15, r16, 5 }
+   13bd0:	[0-9a-f]* 	{ v2shrsi r5, r6, 5 ; v2shrui r15, r16, 5 }
+   13bd8:	[0-9a-f]* 	{ v2shru r15, r16, r17 ; cmpne r5, r6, r7 }
+   13be0:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 }
+   13be8:	[0-9a-f]* 	{ v2shru r15, r16, r17 ; shlxi r5, r6, 5 }
+   13bf0:	[0-9a-f]* 	{ v2shru r15, r16, r17 ; v1int_l r5, r6, r7 }
+   13bf8:	[0-9a-f]* 	{ v2shru r15, r16, r17 ; v2mins r5, r6, r7 }
+   13c00:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; addxi r15, r16, 5 }
+   13c08:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; jalr r15 }
+   13c10:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; moveli r15, 4660 }
+   13c18:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; st r15, r16 }
+   13c20:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; v1shli r15, r16, 5 }
+   13c28:	[0-9a-f]* 	{ v2shru r5, r6, r7 ; v4addsc r15, r16, r17 }
+   13c30:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; v2shrui r15, r16, 5 }
+   13c38:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; v2shrui r15, r16, 5 }
+   13c40:	[0-9a-f]* 	{ v2shrui r15, r16, 5 ; shrui r5, r6, 5 }
+   13c48:	[0-9a-f]* 	{ v2shrui r15, r16, 5 ; v1minui r5, r6, 5 }
+   13c50:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; v2shrui r15, r16, 5 }
+   13c58:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; andi r15, r16, 5 }
+   13c60:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; ld r15, r16 }
+   13c68:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; nor r15, r16, r17 }
+   13c70:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; st2_add r15, r16, 5 }
+   13c78:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; v1shrui r15, r16, 5 }
+   13c80:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; v4shl r15, r16, r17 }
+   13c88:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; v2sub r15, r16, r17 }
+   13c90:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; v2sub r15, r16, r17 }
+   13c98:	[0-9a-f]* 	{ v2sub r15, r16, r17 ; sub r5, r6, r7 }
+   13ca0:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; v2sub r15, r16, r17 }
+   13ca8:	[0-9a-f]* 	{ v2sub r15, r16, r17 ; v2packl r5, r6, r7 }
+   13cb0:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+   13cb8:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; ld1u_add r15, r16, 5 }
+   13cc0:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+   13cc8:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; stnt r15, r16 }
+   13cd0:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; v2addi r15, r16, 5 }
+   13cd8:	[0-9a-f]* 	{ v2sub r5, r6, r7 ; v4sub r15, r16, r17 }
+   13ce0:	[0-9a-f]* 	{ v2subsc r15, r16, r17 ; dblalign2 r5, r6, r7 }
+   13ce8:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; v2subsc r15, r16, r17 }
+   13cf0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; v2subsc r15, r16, r17 }
+   13cf8:	[0-9a-f]* 	{ v2subsc r15, r16, r17 ; v1shl r5, r6, r7 }
+   13d00:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; v2subsc r15, r16, r17 }
+   13d08:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; cmpltsi r15, r16, 5 }
+   13d10:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; ld2u_add r15, r16, 5 }
+   13d18:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+   13d20:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   13d28:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; v2cmples r15, r16, r17 }
+   13d30:	[0-9a-f]* 	{ v2subsc r5, r6, r7 ; xori r15, r16, 5 }
+   13d38:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; v4add r15, r16, r17 }
+   13d40:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 }
+   13d48:	[0-9a-f]* 	{ v4add r15, r16, r17 ; v1addi r5, r6, 5 }
+   13d50:	[0-9a-f]* 	{ v4add r15, r16, r17 ; v1shru r5, r6, r7 }
+   13d58:	[0-9a-f]* 	{ v4add r15, r16, r17 ; v2shlsc r5, r6, r7 }
+   13d60:	[0-9a-f]* 	{ v4add r5, r6, r7 ; dblalign2 r15, r16, r17 }
+   13d68:	[0-9a-f]* 	{ v4add r5, r6, r7 ; ld4u_add r15, r16, 5 }
+   13d70:	[0-9a-f]* 	{ v4add r5, r6, r7 ; prefetch_l2 r15 }
+   13d78:	[0-9a-f]* 	{ v4add r5, r6, r7 ; sub r15, r16, r17 }
+   13d80:	[0-9a-f]* 	{ v4add r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   13d88:	[0-9a-f]* 	{ v4addsc r15, r16, r17 ; addx r5, r6, r7 }
+   13d90:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; v4addsc r15, r16, r17 }
+   13d98:	[0-9a-f]* 	{ v4addsc r15, r16, r17 ; mz r5, r6, r7 }
+   13da0:	[0-9a-f]* 	{ v4addsc r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+   13da8:	[0-9a-f]* 	{ v4addsc r15, r16, r17 ; v2add r5, r6, r7 }
+   13db0:	[0-9a-f]* 	{ v4addsc r15, r16, r17 ; v2shrui r5, r6, 5 }
+   13db8:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; exch r15, r16, r17 }
+   13dc0:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; ldnt r15, r16 }
+   13dc8:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; raise }
+   13dd0:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; v1addi r15, r16, 5 }
+   13dd8:	[0-9a-f]* 	{ v4addsc r5, r6, r7 ; v2int_l r15, r16, r17 }
+   13de0:	[0-9a-f]* 	{ v4int_h r15, r16, r17 ; and r5, r6, r7 }
+   13de8:	[0-9a-f]* 	{ fsingle_add1 r5, r6, r7 ; v4int_h r15, r16, r17 }
+   13df0:	[0-9a-f]* 	{ v4int_h r15, r16, r17 ; ori r5, r6, 5 }
+   13df8:	[0-9a-f]* 	{ v4int_h r15, r16, r17 ; v1cmplts r5, r6, r7 }
+   13e00:	[0-9a-f]* 	{ v2avgs r5, r6, r7 ; v4int_h r15, r16, r17 }
+   13e08:	[0-9a-f]* 	{ v4int_h r15, r16, r17 ; v4addsc r5, r6, r7 }
+   13e10:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+   13e18:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+   13e20:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; shl16insli r15, r16, 4660 }
+   13e28:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; v1cmples r15, r16, r17 }
+   13e30:	[0-9a-f]* 	{ v4int_h r5, r6, r7 ; v2minsi r15, r16, 5 }
+   13e38:	[0-9a-f]* 	{ bfins r5, r6, 5, 7 ; v4int_l r15, r16, r17 }
+   13e40:	[0-9a-f]* 	{ fsingle_pack1 r5, r6 ; v4int_l r15, r16, r17 }
+   13e48:	[0-9a-f]* 	{ v4int_l r15, r16, r17 ; rotl r5, r6, r7 }
+   13e50:	[0-9a-f]* 	{ v4int_l r15, r16, r17 ; v1cmpne r5, r6, r7 }
+   13e58:	[0-9a-f]* 	{ v4int_l r15, r16, r17 ; v2cmpleu r5, r6, r7 }
+   13e60:	[0-9a-f]* 	{ v4int_l r15, r16, r17 ; v4shl r5, r6, r7 }
+   13e68:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; fetchor r15, r16, r17 }
+   13e70:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+   13e78:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; shl2addx r15, r16, r17 }
+   13e80:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+   13e88:	[0-9a-f]* 	{ v4int_l r5, r6, r7 ; v2packl r15, r16, r17 }
+   13e90:	[0-9a-f]* 	{ v4packsc r15, r16, r17 ; cmpeq r5, r6, r7 }
+   13e98:	[0-9a-f]* 	{ v4packsc r15, r16, r17 ; infol 4660 }
+   13ea0:	[0-9a-f]* 	{ v4packsc r15, r16, r17 ; shl1add r5, r6, r7 }
+   13ea8:	[0-9a-f]* 	{ v1ddotpusa r5, r6, r7 ; v4packsc r15, r16, r17 }
+   13eb0:	[0-9a-f]* 	{ v4packsc r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+   13eb8:	[0-9a-f]* 	{ v4packsc r15, r16, r17 ; v4sub r5, r6, r7 }
+   13ec0:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; flushwb }
+   13ec8:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+   13ed0:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; shlx r15, r16, r17 }
+   13ed8:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; v1int_l r15, r16, r17 }
+   13ee0:	[0-9a-f]* 	{ v4packsc r5, r6, r7 ; v2shlsc r15, r16, r17 }
+   13ee8:	[0-9a-f]* 	{ v4shl r15, r16, r17 ; cmplts r5, r6, r7 }
+   13ef0:	[0-9a-f]* 	{ v4shl r15, r16, r17 ; movei r5, 5 }
+   13ef8:	[0-9a-f]* 	{ v4shl r15, r16, r17 ; shl3add r5, r6, r7 }
+   13f00:	[0-9a-f]* 	{ v1dotpua r5, r6, r7 ; v4shl r15, r16, r17 }
+   13f08:	[0-9a-f]* 	{ v4shl r15, r16, r17 ; v2int_h r5, r6, r7 }
+   13f10:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; add r15, r16, r17 }
+   13f18:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; info 19 }
+   13f20:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR }
+   13f28:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; shru r15, r16, r17 }
+   13f30:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; v1minui r15, r16, 5 }
+   13f38:	[0-9a-f]* 	{ v4shl r5, r6, r7 ; v2shrui r15, r16, 5 }
+   13f40:	[0-9a-f]* 	{ v4shlsc r15, r16, r17 ; cmpne r5, r6, r7 }
+   13f48:	[0-9a-f]* 	{ mul_hs_ls r5, r6, r7 ; v4shlsc r15, r16, r17 }
+   13f50:	[0-9a-f]* 	{ v4shlsc r15, r16, r17 ; shlxi r5, r6, 5 }
+   13f58:	[0-9a-f]* 	{ v4shlsc r15, r16, r17 ; v1int_l r5, r6, r7 }
+   13f60:	[0-9a-f]* 	{ v4shlsc r15, r16, r17 ; v2mins r5, r6, r7 }
+   13f68:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; addxi r15, r16, 5 }
+   13f70:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; jalr r15 }
+   13f78:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; moveli r15, 4660 }
+   13f80:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; st r15, r16 }
+   13f88:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; v1shli r15, r16, 5 }
+   13f90:	[0-9a-f]* 	{ v4shlsc r5, r6, r7 ; v4addsc r15, r16, r17 }
+   13f98:	[0-9a-f]* 	{ cmulf r5, r6, r7 ; v4shrs r15, r16, r17 }
+   13fa0:	[0-9a-f]* 	{ mul_hu_lu r5, r6, r7 ; v4shrs r15, r16, r17 }
+   13fa8:	[0-9a-f]* 	{ v4shrs r15, r16, r17 ; shrui r5, r6, 5 }
+   13fb0:	[0-9a-f]* 	{ v4shrs r15, r16, r17 ; v1minui r5, r6, 5 }
+   13fb8:	[0-9a-f]* 	{ v2muls r5, r6, r7 ; v4shrs r15, r16, r17 }
+   13fc0:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; andi r15, r16, 5 }
+   13fc8:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; ld r15, r16 }
+   13fd0:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; nor r15, r16, r17 }
+   13fd8:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; st2_add r15, r16, 5 }
+   13fe0:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; v1shrui r15, r16, 5 }
+   13fe8:	[0-9a-f]* 	{ v4shrs r5, r6, r7 ; v4shl r15, r16, r17 }
+   13ff0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; v4shru r15, r16, r17 }
+   13ff8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 }
+   14000:	[0-9a-f]* 	{ v4shru r15, r16, r17 ; sub r5, r6, r7 }
+   14008:	[0-9a-f]* 	{ v1mulus r5, r6, r7 ; v4shru r15, r16, r17 }
+   14010:	[0-9a-f]* 	{ v4shru r15, r16, r17 ; v2packl r5, r6, r7 }
+   14018:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+   14020:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; ld1u_add r15, r16, 5 }
+   14028:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+   14030:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; stnt r15, r16 }
+   14038:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; v2addi r15, r16, 5 }
+   14040:	[0-9a-f]* 	{ v4shru r5, r6, r7 ; v4sub r15, r16, r17 }
+   14048:	[0-9a-f]* 	{ v4sub r15, r16, r17 ; dblalign2 r5, r6, r7 }
+   14050:	[0-9a-f]* 	{ mula_hu_hu r5, r6, r7 ; v4sub r15, r16, r17 }
+   14058:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; v4sub r15, r16, r17 }
+   14060:	[0-9a-f]* 	{ v4sub r15, r16, r17 ; v1shl r5, r6, r7 }
+   14068:	[0-9a-f]* 	{ v2sads r5, r6, r7 ; v4sub r15, r16, r17 }
+   14070:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; cmpltsi r15, r16, 5 }
+   14078:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; ld2u_add r15, r16, 5 }
+   14080:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+   14088:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; stnt2_add r15, r16, 5 }
+   14090:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; v2cmples r15, r16, r17 }
+   14098:	[0-9a-f]* 	{ v4sub r5, r6, r7 ; xori r15, r16, 5 }
+   140a0:	[0-9a-f]* 	{ fdouble_addsub r5, r6, r7 ; v4subsc r15, r16, r17 }
+   140a8:	[0-9a-f]* 	{ mula_ls_lu r5, r6, r7 ; v4subsc r15, r16, r17 }
+   140b0:	[0-9a-f]* 	{ v4subsc r15, r16, r17 ; v1addi r5, r6, 5 }
+   140b8:	[0-9a-f]* 	{ v4subsc r15, r16, r17 ; v1shru r5, r6, r7 }
+   140c0:	[0-9a-f]* 	{ v4subsc r15, r16, r17 ; v2shlsc r5, r6, r7 }
+   140c8:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; dblalign2 r15, r16, r17 }
+   140d0:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; ld4u_add r15, r16, 5 }
+   140d8:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; prefetch_l2 r15 }
+   140e0:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; sub r15, r16, r17 }
+   140e8:	[0-9a-f]* 	{ v4subsc r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+   140f0:	[0-9a-f]* 	{ addx r5, r6, r7 ; wh64 r15 }
+   140f8:	[0-9a-f]* 	{ fdouble_sub_flags r5, r6, r7 ; wh64 r15 }
+   14100:	[0-9a-f]* 	{ mz r5, r6, r7 ; wh64 r15 }
+   14108:	[0-9a-f]* 	{ v1cmpeq r5, r6, r7 ; wh64 r15 }
+   14110:	[0-9a-f]* 	{ v2add r5, r6, r7 ; wh64 r15 }
+   14118:	[0-9a-f]* 	{ v2shrui r5, r6, 5 ; wh64 r15 }
+   14120:	[0-9a-f]* 	{ xor r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+   14128:	[0-9a-f]* 	{ xor r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+   14130:	[0-9a-f]* 	{ xor r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+   14138:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; ld4s r25, r26 }
+   14140:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+   14148:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+   14150:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+   14158:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+   14160:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; ld4s r25, r26 }
+   14168:	[0-9a-f]* 	{ xor r15, r16, r17 ; st r25, r26 }
+   14170:	[0-9a-f]* 	{ xor r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+   14178:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
+   14180:	[0-9a-f]* 	{ cmoveqz r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 }
+   14188:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl2addx r5, r6, r7 ; ld1s r25, r26 }
+   14190:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+   14198:	[0-9a-f]* 	{ xor r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+   141a0:	[0-9a-f]* 	{ xor r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+   141a8:	[0-9a-f]* 	{ xor r15, r16, r17 ; ld2u r25, r26 }
+   141b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; ld2u r25, r26 }
+   141b8:	[0-9a-f]* 	{ xor r15, r16, r17 ; nop ; ld4s r25, r26 }
+   141c0:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4u r25, r26 }
+   141c8:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrsi r5, r6, 5 ; ld4u r25, r26 }
+   141d0:	[0-9a-f]* 	{ xor r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+   141d8:	[0-9a-f]* 	{ mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
+   141e0:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+   141e8:	[0-9a-f]* 	{ mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+   141f0:	[0-9a-f]* 	{ mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; ld4s r25, r26 }
+   141f8:	[0-9a-f]* 	{ mulax r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+   14200:	[0-9a-f]* 	{ xor r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+   14208:	[0-9a-f]* 	{ xor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+   14210:	[0-9a-f]* 	{ pcnt r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+   14218:	[0-9a-f]* 	{ mulax r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+   14220:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+   14228:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+   14230:	[0-9a-f]* 	{ mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+   14238:	[0-9a-f]* 	{ xor r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2 r25 }
+   14240:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+   14248:	[0-9a-f]* 	{ xor r15, r16, r17 ; info 19 ; prefetch_l2_fault r25 }
+   14250:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+   14258:	[0-9a-f]* 	{ xor r15, r16, r17 ; or r5, r6, r7 ; prefetch_l3 r25 }
+   14260:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+   14268:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+   14270:	[0-9a-f]* 	{ revbytes r5, r6 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+   14278:	[0-9a-f]* 	{ xor r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+   14280:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+   14288:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+   14290:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+   14298:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+   142a0:	[0-9a-f]* 	{ xor r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+   142a8:	[0-9a-f]* 	{ xor r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+   142b0:	[0-9a-f]* 	{ xor r15, r16, r17 ; rotl r5, r6, r7 ; st r25, r26 }
+   142b8:	[0-9a-f]* 	{ xor r15, r16, r17 ; st1 r25, r26 }
+   142c0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
+   142c8:	[0-9a-f]* 	{ xor r15, r16, r17 ; nop ; st2 r25, r26 }
+   142d0:	[0-9a-f]* 	{ xor r15, r16, r17 ; cmpleu r5, r6, r7 ; st4 r25, r26 }
+   142d8:	[0-9a-f]* 	{ xor r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+   142e0:	[0-9a-f]* 	{ xor r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+   142e8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+   142f0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+   142f8:	[0-9a-f]* 	{ xor r15, r16, r17 ; v1mz r5, r6, r7 }
+   14300:	[0-9a-f]* 	{ xor r15, r16, r17 ; v2packuc r5, r6, r7 }
+   14308:	[0-9a-f]* 	{ xor r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+   14310:	[0-9a-f]* 	{ xor r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+   14318:	[0-9a-f]* 	{ xor r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+   14320:	[0-9a-f]* 	{ xor r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+   14328:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpexch r15, r16, r17 }
+   14330:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+   14338:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+   14340:	[0-9a-f]* 	{ xor r5, r6, r7 ; dtlbpr r15 }
+   14348:	[0-9a-f]* 	{ xor r5, r6, r7 ; ill ; ld4u r25, r26 }
+   14350:	[0-9a-f]* 	{ xor r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+   14358:	[0-9a-f]* 	{ xor r5, r6, r7 ; jr r15 ; prefetch r25 }
+   14360:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+   14368:	[0-9a-f]* 	{ xor r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+   14370:	[0-9a-f]* 	{ xor r5, r6, r7 ; shrsi r15, r16, 5 ; ld1s r25, r26 }
+   14378:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+   14380:	[0-9a-f]* 	{ xor r5, r6, r7 ; mnz r15, r16, r17 ; ld2s r25, r26 }
+   14388:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+   14390:	[0-9a-f]* 	{ xor r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+   14398:	[0-9a-f]* 	{ xor r5, r6, r7 ; subx r15, r16, r17 ; ld4s r25, r26 }
+   143a0:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+   143a8:	[0-9a-f]* 	{ xor r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+   143b0:	[0-9a-f]* 	{ xor r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+   143b8:	[0-9a-f]* 	{ xor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+   143c0:	[0-9a-f]* 	{ xor r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+   143c8:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+   143d0:	[0-9a-f]* 	{ xor r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+   143d8:	[0-9a-f]* 	{ xor r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+   143e0:	[0-9a-f]* 	{ xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+   143e8:	[0-9a-f]* 	{ xor r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l2 r25 }
+   143f0:	[0-9a-f]* 	{ xor r5, r6, r7 ; prefetch_l2_fault r25 }
+   143f8:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3 r25 }
+   14400:	[0-9a-f]* 	{ xor r5, r6, r7 ; prefetch_l3 r25 }
+   14408:	[0-9a-f]* 	{ xor r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l3_fault r25 }
+   14410:	[0-9a-f]* 	{ xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+   14418:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+   14420:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+   14428:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+   14430:	[0-9a-f]* 	{ xor r5, r6, r7 ; shli r15, r16, 5 }
+   14438:	[0-9a-f]* 	{ xor r5, r6, r7 ; shrsi r15, r16, 5 }
+   14440:	[0-9a-f]* 	{ xor r5, r6, r7 ; shruxi r15, r16, 5 }
+   14448:	[0-9a-f]* 	{ xor r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+   14450:	[0-9a-f]* 	{ xor r5, r6, r7 ; rotli r15, r16, 5 ; st1 r25, r26 }
+   14458:	[0-9a-f]* 	{ xor r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+   14460:	[0-9a-f]* 	{ xor r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+   14468:	[0-9a-f]* 	{ xor r5, r6, r7 ; stnt2 r15, r16 }
+   14470:	[0-9a-f]* 	{ xor r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+   14478:	[0-9a-f]* 	{ xor r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+   14480:	[0-9a-f]* 	{ xor r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+   14488:	[0-9a-f]* 	{ cmul r5, r6, r7 ; xori r15, r16, 5 }
+   14490:	[0-9a-f]* 	{ mul_hs_lu r5, r6, r7 ; xori r15, r16, 5 }
+   14498:	[0-9a-f]* 	{ xori r15, r16, 5 ; shrs r5, r6, r7 }
+   144a0:	[0-9a-f]* 	{ xori r15, r16, 5 ; v1maxu r5, r6, r7 }
+   144a8:	[0-9a-f]* 	{ xori r15, r16, 5 ; v2minsi r5, r6, 5 }
+   144b0:	[0-9a-f]* 	{ xori r5, r6, 5 ; addxli r15, r16, 4660 }
+   144b8:	[0-9a-f]* 	{ xori r5, r6, 5 ; jalrp r15 }
+   144c0:	[0-9a-f]* 	{ xori r5, r6, 5 ; mtspr MEM_ERROR_CBOX_ADDR, r16 }
+   144c8:	[0-9a-f]* 	{ xori r5, r6, 5 ; st1 r15, r16 }
+   144d0:	[0-9a-f]* 	{ xori r5, r6, 5 ; v1shrs r15, r16, r17 }
+   144d8:	[0-9a-f]* 	{ xori r5, r6, 5 ; v4int_h r15, r16, r17 }
diff --git a/gas/testsuite/gas/tilegx/t_insns.s b/gas/testsuite/gas/tilegx/t_insns.s
new file mode 100644
index 0000000..c756049
--- /dev/null
+++ b/gas/testsuite/gas/tilegx/t_insns.s
@@ -0,0 +1,10430 @@
+target:
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	{ fdouble_sub_flags r5, r6, r7 ; bnezt r15, target }
+	{ fdouble_sub_flags r5, r6, r7 ; bnez r15, target }
+	{ fdouble_addsub r5, r6, r7 ; bnez r15, target }
+	{ fdouble_pack1 r5, r6, r7 ; bnez r15, target }
+	{ fsingle_pack2 r5, r6, r7 ; bnez r15, target }
+	{ fsingle_mul2 r5, r6, r7 ; blez r15, target }
+	{ mula_hs_hu r5, r6, r7 ; bgtzt r15, target }
+	{ mula_hu_lu r5, r6, r7 ; bgtzt r15, target }
+	{ addli r5, r6, 0x1234 ; bgtzt r15, target }
+	{ fsingle_pack1 r5, r6 ; beqzt r15, target }
+	{ mul_hu_hu r5, r6, r7 ; beqzt r15, target }
+	{ mul_lu_lu r5, r6, r7 ; beqzt r15, target }
+	{ mula_hu_hu r5, r6, r7 ; beqz r15, target }
+	{ mula_lu_lu r5, r6, r7 ; beqz r15, target }
+	{ addli r5, r6, 0x1234 ; beqz r15, target }
+	{ dblalign2 r5, r6, r7 ; beqz r15, target }
+	{ mul_hs_hs r5, r6, r7 ; blbs r15, target }
+	{ mul_hu_ls r5, r6, r7 ; blbs r15, target }
+	{ shl1addx r5, r6, r7 ; blbst r15, target }
+	{ v1cmpleu r5, r6, r7 ; blbst r15, target }
+	{ v1ddotpu r5, r6, r7 ; blbst r15, target }
+	{ v1dotpusa r5, r6, r7 ; blbs r15, target }
+	{ v2cmpltsi r5, r6, 5 ; blbst r15, target }
+	{ v4packsc r5, r6, r7 ; blbst r15, target }
+	{ cmovnez r5, r6, r7 ; blbst r15, target }
+	{ shl1addx r5, r6, r7 ; bgtz r15, target }
+	{ v1adduc r5, r6, r7 ; bgtzt r15, target }
+	{ v1cmpleu r5, r6, r7 ; bgtz r15, target }
+	{ v1cmpne r5, r6, r7 ; bgtzt r15, target }
+	{ v1dotpus r5, r6, r7 ; bgtz r15, target }
+	{ v1sadau r5, r6, r7 ; bgtzt r15, target }
+	{ v2cmpeqi r5, r6, 5 ; bgtzt r15, target }
+	{ v2cmpltu r5, r6, r7 ; bgtz r15, target }
+	{ v2int_l r5, r6, r7 ; bgtzt r15, target }
+	{ v2packuc r5, r6, r7 ; bgtz r15, target }
+	{ v4addsc r5, r6, r7 ; bgtzt r15, target }
+	{ v4subsc r5, r6, r7 ; bgtzt r15, target }
+	{ cmples r5, r6, r7 ; bgtzt r15, target }
+	{ cmpltui r5, r6, 5 ; bgtzt r15, target }
+	{ fsingle_addsub2 r5, r6, r7 ; j target }
+	{ subxsc r5, r6, r7 ; bltzt r15, target }
+	{ v1cmpne r5, r6, r7 ; bltz r15, target }
+	{ v1int_l r5, r6, r7 ; bltz r15, target }
+	{ v1multu r5, r6, r7 ; bltz r15, target }
+	{ v1shrs r5, r6, r7 ; bltzt r15, target }
+	{ v2addsc r5, r6, r7 ; bltz r15, target }
+	{ v2dotp r5, r6, r7 ; bltzt r15, target }
+	{ v2maxsi r5, r6, 5 ; bltzt r15, target }
+	{ v2packh r5, r6, r7 ; bltz r15, target }
+	{ v2sadu r5, r6, r7 ; bltzt r15, target }
+	{ v2shrui r5, r6, 5 ; bltzt r15, target }
+	{ v4shlsc r5, r6, r7 ; bltz r15, target }
+	{ cmpeq r5, r6, r7 ; bltzt r15, target }
+	{ cmpltsi r5, r6, 5 ; bltz r15, target }
+	{ cmulaf r5, r6, r7 ; bltz r15, target }
+	{ moveli r5, 0x1234 ; bgez r15, target }
+	{ subxsc r5, r6, r7 ; bnez r15, target }
+	{ v1maxu r5, r6, r7 ; bnez r15, target }
+	{ v1mulu r5, r6, r7 ; bnez r15, target }
+	{ v1shrsi r5, r6, 5 ; bnez r15, target }
+	{ v2addi r5, r6, 5 ; bnezt r15, target }
+	{ v2mins r5, r6, r7 ; bnez r15, target }
+	{ v2sadu r5, r6, r7 ; bnez r15, target }
+	{ v2shru r5, r6, r7 ; bnez r15, target }
+	{ v4shrs r5, r6, r7 ; bnez r15, target }
+	{ cmpeq r5, r6, r7 ; bnez r15, target }
+	{ cmulf r5, r6, r7 ; bnez r15, target }
+	{ revbytes r5, r6 ; blbst r15, target }
+	{ shrs r5, r6, r7 ; blbst r15, target }
+	{ shruxi r5, r6, 5 ; blbs r15, target }
+	{ tblidxb3 r5, r6 ; blbst r15, target }
+	{ v1shl r5, r6, r7 ; blbs r15, target }
+	{ v2mnz r5, r6, r7 ; blbs r15, target }
+	{ v4add r5, r6, r7 ; blbs r15, target }
+	{ addx r5, r6, r7 ; blbs r15, target }
+	{ fsingle_sub1 r5, r6, r7 ; j target }
+	{ nor r5, r6, r7 ; blezt r15, target }
+	{ shl r5, r6, r7 ; blezt r15, target }
+	{ shrsi r5, r6, 5 ; blez r15, target }
+	{ tblidxb0 r5, r6 ; blbs r15, target }
+	{ v2mz r5, r6, r7 ; blbc r15, target }
+	{ and r5, r6, r7 ; bgtz r15, target }
+	{ mz r5, r6, r7 ; blbst r15, target }
+	{ shl r5, r6, r7 ; blbs r15, target }
+	{ bfexts r5, r6, 5, 7 ; jal target }
+	{ ori r5, r6, 5 ; bgtz r15, target }
+	{ infol 0x1234 ; bgez r15, target }
+	{ pcnt r5, r6 ; bnezt r15, target }
+	{ bfextu r5, r6, 5, 7 ; j target }
+	{ movei r5, 5 ; blbs r15, target }
+	{ v2avgs r5, r6, r7 ; jal target }
+	{ cmulh r5, r6, r7 ; jal target }
+	{ v2dotpa r5, r6, r7 ; j target }
+	{ rotli r5, r6, 5 ; jal target }
+	{ v4shrs r5, r6, r7 ; j target }
+	{ v2sub r5, r6, r7 ; j target }
+	{ and r5, r6, r7 ; j target }
+	{ nop ; blbst r15, target }
+	{ beqzt r15, target ; cmpltu r5, r6, r7 }
+	{ beqzt r15, target ; mul_hs_hs r5, r6, r7 }
+	{ beqzt r15, target ; shli r5, r6, 5 }
+	{ beqzt r15, target ; v1dotpusa r5, r6, r7 }
+	{ beqzt r15, target ; v2maxs r5, r6, r7 }
+	{ bgezt r15, target ; addli r5, r6, 0x1234 }
+	{ bgezt r15, target ; fdouble_pack2 r5, r6, r7 }
+	{ bgezt r15, target ; mulx r5, r6, r7 }
+	{ bgezt r15, target ; v1avgu r5, r6, r7 }
+	{ bgezt r15, target ; v1subuc r5, r6, r7 }
+	{ bgezt r15, target ; v2shru r5, r6, r7 }
+	{ bgtzt r15, target ; cmpne r5, r6, r7 }
+	{ bgtzt r15, target ; mul_hs_ls r5, r6, r7 }
+	{ bgtzt r15, target ; shlxi r5, r6, 5 }
+	{ bgtzt r15, target ; v1int_l r5, r6, r7 }
+	{ bgtzt r15, target ; v2mins r5, r6, r7 }
+	{ blbct r15, target ; addxi r5, r6, 5 }
+	{ blbct r15, target ; fdouble_unpack_max r5, r6, r7 }
+	{ blbct r15, target ; nop }
+	{ blbct r15, target ; v1cmpeqi r5, r6, 5 }
+	{ blbct r15, target ; v2addi r5, r6, 5 }
+	{ blbct r15, target ; v2sub r5, r6, r7 }
+	{ blbst r15, target ; cmula r5, r6, r7 }
+	{ blbst r15, target ; mul_hu_hu r5, r6, r7 }
+	{ blbst r15, target ; shrsi r5, r6, 5 }
+	{ blbst r15, target ; v1maxui r5, r6, 5 }
+	{ blbst r15, target ; v2mnz r5, r6, r7 }
+	{ blezt r15, target ; addxsc r5, r6, r7 }
+	{ blezt r15, target ; fnop }
+	{ blezt r15, target ; or r5, r6, r7 }
+	{ blezt r15, target ; v1cmpleu r5, r6, r7 }
+	{ blezt r15, target ; v2adiffs r5, r6, r7 }
+	{ blezt r15, target ; v4add r5, r6, r7 }
+	{ bltzt r15, target ; cmulf r5, r6, r7 }
+	{ bltzt r15, target ; mul_hu_lu r5, r6, r7 }
+	{ bltzt r15, target ; shrui r5, r6, 5 }
+	{ bltzt r15, target ; v1minui r5, r6, 5 }
+	{ bltzt r15, target ; v2muls r5, r6, r7 }
+	{ bnezt r15, target ; andi r5, r6, 5 }
+	{ bnezt r15, target ; fsingle_addsub2 r5, r6, r7 }
+	{ bnezt r15, target ; pcnt r5, r6 }
+	{ bnezt r15, target ; v1cmpltsi r5, r6, 5 }
+	{ bnezt r15, target ; v2cmpeq r5, r6, r7 }
+	{ bnezt r15, target ; v4int_h r5, r6, r7 }
+	{ beqz r15, target ; cmulfr r5, r6, r7 }
+	{ beqz r15, target ; mul_ls_ls r5, r6, r7 }
+	{ beqz r15, target ; shrux r5, r6, r7 }
+	{ beqz r15, target ; v1mnz r5, r6, r7 }
+	{ beqz r15, target ; v2mults r5, r6, r7 }
+	{ bgez r15, target ; bfexts r5, r6, 5, 7 }
+	{ bgez r15, target ; fsingle_mul1 r5, r6, r7 }
+	{ bgez r15, target ; revbits r5, r6 }
+	{ bgez r15, target ; v1cmpltu r5, r6, r7 }
+	{ bgez r15, target ; v2cmpeqi r5, r6, 5 }
+	{ bgez r15, target ; v4int_l r5, r6, r7 }
+	{ bgtz r15, target ; cmulhr r5, r6, r7 }
+	{ bgtz r15, target ; mul_lu_lu r5, r6, r7 }
+	{ bgtz r15, target ; shufflebytes r5, r6, r7 }
+	{ bgtz r15, target ; v1mulu r5, r6, r7 }
+	{ bgtz r15, target ; v2packh r5, r6, r7 }
+	{ blbc r15, target ; bfins r5, r6, 5, 7 }
+	{ blbc r15, target ; fsingle_pack1 r5, r6 }
+	{ blbc r15, target ; rotl r5, r6, r7 }
+	{ blbc r15, target ; v1cmpne r5, r6, r7 }
+	{ blbc r15, target ; v2cmpleu r5, r6, r7 }
+	{ blbc r15, target ; v4shl r5, r6, r7 }
+	{ blbs r15, target ; crc32_8 r5, r6, r7 }
+	{ blbs r15, target ; mula_hs_hu r5, r6, r7 }
+	{ blbs r15, target ; subx r5, r6, r7 }
+	{ blbs r15, target ; v1mz r5, r6, r7 }
+	{ blbs r15, target ; v2packuc r5, r6, r7 }
+	{ blez r15, target ; cmoveqz r5, r6, r7 }
+	{ blez r15, target ; fsingle_sub1 r5, r6, r7 }
+	{ blez r15, target ; shl r5, r6, r7 }
+	{ blez r15, target ; v1ddotpua r5, r6, r7 }
+	{ blez r15, target ; v2cmpltsi r5, r6, 5 }
+	{ blez r15, target ; v4shrs r5, r6, r7 }
+	{ bltz r15, target ; dblalign r5, r6, r7 }
+	{ bltz r15, target ; mula_hs_lu r5, r6, r7 }
+	{ bltz r15, target ; tblidxb0 r5, r6 }
+	{ bltz r15, target ; v1sadu r5, r6, r7 }
+	{ bltz r15, target ; v2sadau r5, r6, r7 }
+	{ bnez r15, target ; cmpeq r5, r6, r7 }
+	{ bnez r15, target ; infol 0x1234 }
+	{ bnez r15, target ; shl1add r5, r6, r7 }
+	{ bnez r15, target ; v1ddotpusa r5, r6, r7 }
+	{ bnez r15, target ; v2cmpltui r5, r6, 5 }
+	{ bnez r15, target ; v4sub r5, r6, r7 }
+	{ jal target ; cmples r5, r6, r7 }
+	{ jal target ; mnz r5, r6, r7 }
+	{ jal target ; shl2add r5, r6, r7 }
+	{ jal target ; v1dotpa r5, r6, r7 }
+	{ jal target ; v2dotp r5, r6, r7 }
+	{ jal target ; xor r5, r6, r7 }
+	{ j target ; dblalign6 r5, r6, r7 }
+	{ j target ; mula_hu_lu r5, r6, r7 }
+	{ j target ; tblidxb3 r5, r6 }
+	{ j target ; v1shrs r5, r6, r7 }
+	{ j target ; v2shl r5, r6, r7 }
+	cmpeqi r5, r6, 5
+	fetchand r5, r6, r7
+	ldna_add r5, r6, 5
+	mula_hu_lu r5, r6, r7
+	shlx r5, r6, r7
+	v1avgu r5, r6, r7
+	v1subuc r5, r6, r7
+	v2shru r5, r6, r7
+	{ add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
+	{ add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+	{ add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 }
+	{ add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld2s r25, r26 }
+	{ add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
+	{ add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ add r15, r16, r17 ; ctz r5, r6 ; ld2s r25, r26 }
+	{ add r15, r16, r17 ; fnop ; prefetch_l3 r25 }
+	{ add r15, r16, r17 ; info 19 ; prefetch_l1 r25 }
+	{ add r15, r16, r17 ; ld r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ add r15, r16, r17 ; ld1s r25, r26 ; andi r5, r6, 5 }
+	{ add r15, r16, r17 ; ld1s r25, r26 ; shl1addx r5, r6, r7 }
+	{ add r15, r16, r17 ; ld1u r25, r26 ; move r5, r6 }
+	{ add r15, r16, r17 ; ld1u r25, r26 }
+	{ add r15, r16, r17 ; ld2s r25, r26 ; revbits r5, r6 }
+	{ add r15, r16, r17 ; ld2u r25, r26 ; cmpne r5, r6, r7 }
+	{ add r15, r16, r17 ; ld2u r25, r26 ; subx r5, r6, r7 }
+	{ add r15, r16, r17 ; ld4s r25, r26 ; mulx r5, r6, r7 }
+	{ add r15, r16, r17 ; ld4u r25, r26 ; cmpeqi r5, r6, 5 }
+	{ add r15, r16, r17 ; ld4u r25, r26 ; shli r5, r6, 5 }
+	{ add r15, r16, r17 ; move r5, r6 ; prefetch r25 }
+	{ add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld4u r25, r26 }
+	{ add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld2s r25, r26 }
+	{ add r15, r16, r17 ; mulax r5, r6, r7 ; ld2u r25, r26 }
+	{ add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 }
+	{ add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1 r25 }
+	{ add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l1_fault r25 }
+	{ add r15, r16, r17 ; prefetch r25 ; mula_ls_ls r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch_l1 r25 ; cmoveqz r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch_l1 r25 ; shl2addx r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch_l2 r25 ; addi r5, r6, 5 }
+	{ add r15, r16, r17 ; prefetch_l2 r25 ; rotl r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch_l2_fault r25 ; fnop }
+	{ add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 }
+	{ add r15, r16, r17 ; prefetch_l3 r25 ; nop }
+	{ add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpleu r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch_l3_fault r25 ; shrsi r5, r6, 5 }
+	{ add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l2 r25 }
+	{ add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
+	{ add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 }
+	{ add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+	{ add r15, r16, r17 ; shlx r5, r6, r7 }
+	{ add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 }
+	{ add r15, r16, r17 ; shufflebytes r5, r6, r7 }
+	{ add r15, r16, r17 ; st r25, r26 ; revbits r5, r6 }
+	{ add r15, r16, r17 ; st1 r25, r26 ; cmpne r5, r6, r7 }
+	{ add r15, r16, r17 ; st1 r25, r26 ; subx r5, r6, r7 }
+	{ add r15, r16, r17 ; st2 r25, r26 ; mulx r5, r6, r7 }
+	{ add r15, r16, r17 ; st4 r25, r26 ; cmpeqi r5, r6, 5 }
+	{ add r15, r16, r17 ; st4 r25, r26 ; shli r5, r6, 5 }
+	{ add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1 r25 }
+	{ add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l1_fault r25 }
+	{ add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l2_fault r25 }
+	{ add r15, r16, r17 ; v1mulu r5, r6, r7 }
+	{ add r15, r16, r17 ; v2packh r5, r6, r7 }
+	{ add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
+	{ add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 }
+	{ add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
+	{ add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+	{ add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+	{ add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+	{ add r5, r6, r7 ; dblalign4 r15, r16, r17 }
+	{ add r5, r6, r7 ; ill ; ld2u r25, r26 }
+	{ add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
+	{ add r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
+	{ add r5, r6, r7 ; ld r25, r26 ; cmpeq r15, r16, r17 }
+	{ add r5, r6, r7 ; ld r25, r26 }
+	{ add r5, r6, r7 ; ld1s r25, r26 ; shli r15, r16, 5 }
+	{ add r5, r6, r7 ; ld1u r25, r26 ; rotl r15, r16, r17 }
+	{ add r5, r6, r7 ; ld2s r25, r26 ; jrp r15 }
+	{ add r5, r6, r7 ; ld2u r25, r26 ; cmpltsi r15, r16, 5 }
+	{ add r5, r6, r7 ; ld4s r25, r26 ; addx r15, r16, r17 }
+	{ add r5, r6, r7 ; ld4s r25, r26 ; shrui r15, r16, 5 }
+	{ add r5, r6, r7 ; ld4u r25, r26 ; shl1addx r15, r16, r17 }
+	{ add r5, r6, r7 ; lnk r15 ; prefetch_l1 r25 }
+	{ add r5, r6, r7 ; move r15, r16 ; prefetch_l1 r25 }
+	{ add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l1 r25 }
+	{ add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+	{ add r5, r6, r7 ; prefetch r25 ; cmplts r15, r16, r17 }
+	{ add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+	{ add r5, r6, r7 ; prefetch_l1 r25 ; shl3add r15, r16, r17 }
+	{ add r5, r6, r7 ; prefetch_l1_fault r25 ; or r15, r16, r17 }
+	{ add r5, r6, r7 ; prefetch_l2 r25 ; jrp r15 }
+	{ add r5, r6, r7 ; prefetch_l2_fault r25 ; cmpltu r15, r16, r17 }
+	{ add r5, r6, r7 ; prefetch_l3 r25 ; and r15, r16, r17 }
+	{ add r5, r6, r7 ; prefetch_l3 r25 ; subx r15, r16, r17 }
+	{ add r5, r6, r7 ; prefetch_l3_fault r25 ; shl3add r15, r16, r17 }
+	{ add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+	{ add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
+	{ add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 }
+	{ add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
+	{ add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+	{ add r5, r6, r7 ; shrui r15, r16, 5 }
+	{ add r5, r6, r7 ; st r25, r26 ; shl3add r15, r16, r17 }
+	{ add r5, r6, r7 ; st1 r25, r26 ; or r15, r16, r17 }
+	{ add r5, r6, r7 ; st2 r25, r26 ; jr r15 }
+	{ add r5, r6, r7 ; st4 r25, r26 ; cmplts r15, r16, r17 }
+	{ add r5, r6, r7 ; stnt1 r15, r16 }
+	{ add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 }
+	{ add r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+	{ add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
+	{ addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 }
+	{ addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 }
+	{ addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 }
+	{ addi r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld2s r25, r26 }
+	{ addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
+	{ addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 }
+	{ addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ addi r15, r16, 5 ; ctz r5, r6 ; ld2s r25, r26 }
+	{ addi r15, r16, 5 ; fnop ; prefetch_l3 r25 }
+	{ addi r15, r16, 5 ; info 19 ; prefetch_l1 r25 }
+	{ addi r15, r16, 5 ; ld r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ addi r15, r16, 5 ; ld1s r25, r26 ; andi r5, r6, 5 }
+	{ addi r15, r16, 5 ; ld1s r25, r26 ; shl1addx r5, r6, r7 }
+	{ addi r15, r16, 5 ; ld1u r25, r26 ; move r5, r6 }
+	{ addi r15, r16, 5 ; ld1u r25, r26 }
+	{ addi r15, r16, 5 ; ld2s r25, r26 ; revbits r5, r6 }
+	{ addi r15, r16, 5 ; ld2u r25, r26 ; cmpne r5, r6, r7 }
+	{ addi r15, r16, 5 ; ld2u r25, r26 ; subx r5, r6, r7 }
+	{ addi r15, r16, 5 ; ld4s r25, r26 ; mulx r5, r6, r7 }
+	{ addi r15, r16, 5 ; ld4u r25, r26 ; cmpeqi r5, r6, 5 }
+	{ addi r15, r16, 5 ; ld4u r25, r26 ; shli r5, r6, 5 }
+	{ addi r15, r16, 5 ; move r5, r6 ; prefetch r25 }
+	{ addi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ addi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ addi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; ld4u r25, r26 }
+	{ addi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld2s r25, r26 }
+	{ addi r15, r16, 5 ; mulax r5, r6, r7 ; ld2u r25, r26 }
+	{ addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 }
+	{ addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1 r25 }
+	{ addi r15, r16, 5 ; pcnt r5, r6 ; prefetch_l1_fault r25 }
+	{ addi r15, r16, 5 ; prefetch r25 ; mula_ls_ls r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch_l1 r25 ; cmoveqz r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch_l1 r25 ; shl2addx r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch_l2 r25 ; addi r5, r6, 5 }
+	{ addi r15, r16, 5 ; prefetch_l2 r25 ; rotl r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch_l2_fault r25 ; fnop }
+	{ addi r15, r16, 5 ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 }
+	{ addi r15, r16, 5 ; prefetch_l3 r25 ; nop }
+	{ addi r15, r16, 5 ; prefetch_l3_fault r25 ; cmpleu r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch_l3_fault r25 ; shrsi r5, r6, 5 }
+	{ addi r15, r16, 5 ; revbytes r5, r6 ; prefetch_l2 r25 }
+	{ addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
+	{ addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 }
+	{ addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 }
+	{ addi r15, r16, 5 ; shlx r5, r6, r7 }
+	{ addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 }
+	{ addi r15, r16, 5 ; shufflebytes r5, r6, r7 }
+	{ addi r15, r16, 5 ; st r25, r26 ; revbits r5, r6 }
+	{ addi r15, r16, 5 ; st1 r25, r26 ; cmpne r5, r6, r7 }
+	{ addi r15, r16, 5 ; st1 r25, r26 ; subx r5, r6, r7 }
+	{ addi r15, r16, 5 ; st2 r25, r26 ; mulx r5, r6, r7 }
+	{ addi r15, r16, 5 ; st4 r25, r26 ; cmpeqi r5, r6, 5 }
+	{ addi r15, r16, 5 ; st4 r25, r26 ; shli r5, r6, 5 }
+	{ addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l1 r25 }
+	{ addi r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l1_fault r25 }
+	{ addi r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l2_fault r25 }
+	{ addi r15, r16, 5 ; v1mulu r5, r6, r7 }
+	{ addi r15, r16, 5 ; v2packh r5, r6, r7 }
+	{ addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 }
+	{ addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 }
+	{ addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 }
+	{ addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
+	{ addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
+	{ addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 }
+	{ addi r5, r6, 5 ; dblalign4 r15, r16, r17 }
+	{ addi r5, r6, 5 ; ill ; ld2u r25, r26 }
+	{ addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 }
+	{ addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
+	{ addi r5, r6, 5 ; ld r25, r26 ; cmpeq r15, r16, r17 }
+	{ addi r5, r6, 5 ; ld r25, r26 }
+	{ addi r5, r6, 5 ; ld1s r25, r26 ; shli r15, r16, 5 }
+	{ addi r5, r6, 5 ; ld1u r25, r26 ; rotl r15, r16, r17 }
+	{ addi r5, r6, 5 ; ld2s r25, r26 ; jrp r15 }
+	{ addi r5, r6, 5 ; ld2u r25, r26 ; cmpltsi r15, r16, 5 }
+	{ addi r5, r6, 5 ; ld4s r25, r26 ; addx r15, r16, r17 }
+	{ addi r5, r6, 5 ; ld4s r25, r26 ; shrui r15, r16, 5 }
+	{ addi r5, r6, 5 ; ld4u r25, r26 ; shl1addx r15, r16, r17 }
+	{ addi r5, r6, 5 ; lnk r15 ; prefetch_l1 r25 }
+	{ addi r5, r6, 5 ; move r15, r16 ; prefetch_l1 r25 }
+	{ addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l1 r25 }
+	{ addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 }
+	{ addi r5, r6, 5 ; prefetch r25 ; cmplts r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 }
+	{ addi r5, r6, 5 ; prefetch_l1 r25 ; shl3add r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch_l1_fault r25 ; or r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch_l2 r25 ; jrp r15 }
+	{ addi r5, r6, 5 ; prefetch_l2_fault r25 ; cmpltu r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch_l3 r25 ; and r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch_l3 r25 ; subx r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch_l3_fault r25 ; shl3add r15, r16, r17 }
+	{ addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
+	{ addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
+	{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
+	{ addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 }
+	{ addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 }
+	{ addi r5, r6, 5 ; shrui r15, r16, 5 }
+	{ addi r5, r6, 5 ; st r25, r26 ; shl3add r15, r16, r17 }
+	{ addi r5, r6, 5 ; st1 r25, r26 ; or r15, r16, r17 }
+	{ addi r5, r6, 5 ; st2 r25, r26 ; jr r15 }
+	{ addi r5, r6, 5 ; st4 r25, r26 ; cmplts r15, r16, r17 }
+	{ addi r5, r6, 5 ; stnt1 r15, r16 }
+	{ addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 }
+	{ addi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
+	{ addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 }
+	{ addli r15, r16, 0x1234 ; cmpltui r5, r6, 5 }
+	{ addli r15, r16, 0x1234 ; mul_hs_hu r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; shlx r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; v1int_h r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; v2maxsi r5, r6, 5 }
+	{ addli r5, r6, 0x1234 ; addx r15, r16, r17 }
+	{ addli r5, r6, 0x1234 ; iret }
+	{ addli r5, r6, 0x1234 ; movei r15, 5 }
+	{ addli r5, r6, 0x1234 ; shruxi r15, r16, 5 }
+	{ addli r5, r6, 0x1234 ; v1shl r15, r16, r17 }
+	{ addli r5, r6, 0x1234 ; v4add r15, r16, r17 }
+	{ addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
+	{ addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l1 r25 }
+	{ addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l1 r25 }
+	{ addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch r25 }
+	{ addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
+	{ addx r15, r16, r17 ; ctz r5, r6 ; prefetch r25 }
+	{ addx r15, r16, r17 ; fnop ; st2 r25, r26 }
+	{ addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 }
+	{ addx r15, r16, r17 ; ld r25, r26 ; mulax r5, r6, r7 }
+	{ addx r15, r16, r17 ; ld1s r25, r26 ; cmpeq r5, r6, r7 }
+	{ addx r15, r16, r17 ; ld1s r25, r26 ; shl3addx r5, r6, r7 }
+	{ addx r15, r16, r17 ; ld1u r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ addx r15, r16, r17 ; ld2s r25, r26 ; addxi r5, r6, 5 }
+	{ addx r15, r16, r17 ; ld2s r25, r26 ; shl r5, r6, r7 }
+	{ addx r15, r16, r17 ; ld2u r25, r26 ; info 19 }
+	{ addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb3 r5, r6 }
+	{ addx r15, r16, r17 ; ld4s r25, r26 ; or r5, r6, r7 }
+	{ addx r15, r16, r17 ; ld4u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ addx r15, r16, r17 ; ld4u r25, r26 ; shrui r5, r6, 5 }
+	{ addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 }
+	{ addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 }
+	{ addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ addx r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l1 r25 }
+	{ addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 }
+	{ addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 }
+	{ addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l3_fault r25 }
+	{ addx r15, r16, r17 ; prefetch r25 ; mz r5, r6, r7 }
+	{ addx r15, r16, r17 ; prefetch_l1 r25 ; cmples r5, r6, r7 }
+	{ addx r15, r16, r17 ; prefetch_l1 r25 ; shrs r5, r6, r7 }
+	{ addx r15, r16, r17 ; prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 }
+	{ addx r15, r16, r17 ; prefetch_l2 r25 ; andi r5, r6, 5 }
+	{ addx r15, r16, r17 ; prefetch_l2 r25 ; shl1addx r5, r6, r7 }
+	{ addx r15, r16, r17 ; prefetch_l2_fault r25 ; move r5, r6 }
+	{ addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ addx r15, r16, r17 ; prefetch_l3 r25 ; revbits r5, r6 }
+	{ addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpne r5, r6, r7 }
+	{ addx r15, r16, r17 ; prefetch_l3_fault r25 ; subx r5, r6, r7 }
+	{ addx r15, r16, r17 ; revbytes r5, r6 ; st r25, r26 }
+	{ addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
+	{ addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 }
+	{ addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 }
+	{ addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+	{ addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 }
+	{ addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
+	{ addx r15, r16, r17 ; st r25, r26 ; addxi r5, r6, 5 }
+	{ addx r15, r16, r17 ; st r25, r26 ; shl r5, r6, r7 }
+	{ addx r15, r16, r17 ; st1 r25, r26 ; info 19 }
+	{ addx r15, r16, r17 ; st1 r25, r26 ; tblidxb3 r5, r6 }
+	{ addx r15, r16, r17 ; st2 r25, r26 ; or r5, r6, r7 }
+	{ addx r15, r16, r17 ; st4 r25, r26 ; cmpltsi r5, r6, 5 }
+	{ addx r15, r16, r17 ; st4 r25, r26 ; shrui r5, r6, 5 }
+	{ addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 }
+	{ addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l3_fault r25 }
+	{ addx r15, r16, r17 ; tblidxb3 r5, r6 ; st1 r25, r26 }
+	{ addx r15, r16, r17 ; v1sadu r5, r6, r7 }
+	{ addx r15, r16, r17 ; v2sadau r5, r6, r7 }
+	{ addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 }
+	{ addx r5, r6, r7 ; addi r15, r16, 5 }
+	{ addx r5, r6, r7 ; addxli r15, r16, 0x1234 }
+	{ addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+	{ addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
+	{ addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+	{ addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
+	{ addx r5, r6, r7 ; exch4 r15, r16, r17 }
+	{ addx r5, r6, r7 ; ill ; prefetch_l1 r25 }
+	{ addx r5, r6, r7 ; jalr r15 ; prefetch r25 }
+	{ addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
+	{ addx r5, r6, r7 ; ld r25, r26 ; cmplts r15, r16, r17 }
+	{ addx r5, r6, r7 ; ld1s r25, r26 ; addx r15, r16, r17 }
+	{ addx r5, r6, r7 ; ld1s r25, r26 ; shrui r15, r16, 5 }
+	{ addx r5, r6, r7 ; ld1u r25, r26 ; shl1addx r15, r16, r17 }
+	{ addx r5, r6, r7 ; ld2s r25, r26 ; movei r15, 5 }
+	{ addx r5, r6, r7 ; ld2u r25, r26 ; ill }
+	{ addx r5, r6, r7 ; ld4s r25, r26 ; cmpeq r15, r16, r17 }
+	{ addx r5, r6, r7 ; ld4s r25, r26 }
+	{ addx r5, r6, r7 ; ld4u r25, r26 ; shl3addx r15, r16, r17 }
+	{ addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
+	{ addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
+	{ addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+	{ addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 }
+	{ addx r5, r6, r7 ; prefetch r25 ; fnop }
+	{ addx r5, r6, r7 ; prefetch_l1 r25 ; add r15, r16, r17 }
+	{ addx r5, r6, r7 ; prefetch_l1 r25 ; shrsi r15, r16, 5 }
+	{ addx r5, r6, r7 ; prefetch_l1_fault r25 ; shl1add r15, r16, r17 }
+	{ addx r5, r6, r7 ; prefetch_l2 r25 ; movei r15, 5 }
+	{ addx r5, r6, r7 ; prefetch_l2_fault r25 ; info 19 }
+	{ addx r5, r6, r7 ; prefetch_l3 r25 ; cmples r15, r16, r17 }
+	{ addx r5, r6, r7 ; prefetch_l3_fault r25 ; add r15, r16, r17 }
+	{ addx r5, r6, r7 ; prefetch_l3_fault r25 ; shrsi r15, r16, 5 }
+	{ addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 }
+	{ addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 }
+	{ addx r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ addx r5, r6, r7 ; shlxi r15, r16, 5 }
+	{ addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 }
+	{ addx r5, r6, r7 ; st r25, r26 ; add r15, r16, r17 }
+	{ addx r5, r6, r7 ; st r25, r26 ; shrsi r15, r16, 5 }
+	{ addx r5, r6, r7 ; st1 r25, r26 ; shl1add r15, r16, r17 }
+	{ addx r5, r6, r7 ; st2 r25, r26 ; move r15, r16 }
+	{ addx r5, r6, r7 ; st4 r25, r26 ; fnop }
+	{ addx r5, r6, r7 ; stnt4 r15, r16 }
+	{ addx r5, r6, r7 ; subx r15, r16, r17 }
+	{ addx r5, r6, r7 ; v2cmpltui r15, r16, 5 }
+	{ addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
+	{ addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
+	{ addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l1 r25 }
+	{ addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1 r25 }
+	{ addxi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch r25 }
+	{ addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
+	{ addxi r15, r16, 5 ; ctz r5, r6 ; prefetch r25 }
+	{ addxi r15, r16, 5 ; fnop ; st2 r25, r26 }
+	{ addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 }
+	{ addxi r15, r16, 5 ; ld r25, r26 ; mulax r5, r6, r7 }
+	{ addxi r15, r16, 5 ; ld1s r25, r26 ; cmpeq r5, r6, r7 }
+	{ addxi r15, r16, 5 ; ld1s r25, r26 ; shl3addx r5, r6, r7 }
+	{ addxi r15, r16, 5 ; ld1u r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ addxi r15, r16, 5 ; ld2s r25, r26 ; addxi r5, r6, 5 }
+	{ addxi r15, r16, 5 ; ld2s r25, r26 ; shl r5, r6, r7 }
+	{ addxi r15, r16, 5 ; ld2u r25, r26 ; info 19 }
+	{ addxi r15, r16, 5 ; ld2u r25, r26 ; tblidxb3 r5, r6 }
+	{ addxi r15, r16, 5 ; ld4s r25, r26 ; or r5, r6, r7 }
+	{ addxi r15, r16, 5 ; ld4u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ addxi r15, r16, 5 ; ld4u r25, r26 ; shrui r5, r6, 5 }
+	{ addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 }
+	{ addxi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 }
+	{ addxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ addxi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ addxi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ addxi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l1 r25 }
+	{ addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 }
+	{ addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 }
+	{ addxi r15, r16, 5 ; pcnt r5, r6 ; prefetch_l3_fault r25 }
+	{ addxi r15, r16, 5 ; prefetch r25 ; mz r5, r6, r7 }
+	{ addxi r15, r16, 5 ; prefetch_l1 r25 ; cmples r5, r6, r7 }
+	{ addxi r15, r16, 5 ; prefetch_l1 r25 ; shrs r5, r6, r7 }
+	{ addxi r15, r16, 5 ; prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 }
+	{ addxi r15, r16, 5 ; prefetch_l2 r25 ; andi r5, r6, 5 }
+	{ addxi r15, r16, 5 ; prefetch_l2 r25 ; shl1addx r5, r6, r7 }
+	{ addxi r15, r16, 5 ; prefetch_l2_fault r25 ; move r5, r6 }
+	{ addxi r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ addxi r15, r16, 5 ; prefetch_l3 r25 ; revbits r5, r6 }
+	{ addxi r15, r16, 5 ; prefetch_l3_fault r25 ; cmpne r5, r6, r7 }
+	{ addxi r15, r16, 5 ; prefetch_l3_fault r25 ; subx r5, r6, r7 }
+	{ addxi r15, r16, 5 ; revbytes r5, r6 ; st r25, r26 }
+	{ addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
+	{ addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 }
+	{ addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
+	{ addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
+	{ addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 }
+	{ addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 }
+	{ addxi r15, r16, 5 ; st r25, r26 ; addxi r5, r6, 5 }
+	{ addxi r15, r16, 5 ; st r25, r26 ; shl r5, r6, r7 }
+	{ addxi r15, r16, 5 ; st1 r25, r26 ; info 19 }
+	{ addxi r15, r16, 5 ; st1 r25, r26 ; tblidxb3 r5, r6 }
+	{ addxi r15, r16, 5 ; st2 r25, r26 ; or r5, r6, r7 }
+	{ addxi r15, r16, 5 ; st4 r25, r26 ; cmpltsi r5, r6, 5 }
+	{ addxi r15, r16, 5 ; st4 r25, r26 ; shrui r5, r6, 5 }
+	{ addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 }
+	{ addxi r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l3_fault r25 }
+	{ addxi r15, r16, 5 ; tblidxb3 r5, r6 ; st1 r25, r26 }
+	{ addxi r15, r16, 5 ; v1sadu r5, r6, r7 }
+	{ addxi r15, r16, 5 ; v2sadau r5, r6, r7 }
+	{ addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 }
+	{ addxi r5, r6, 5 ; addi r15, r16, 5 }
+	{ addxi r5, r6, 5 ; addxli r15, r16, 0x1234 }
+	{ addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 }
+	{ addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 }
+	{ addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
+	{ addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
+	{ addxi r5, r6, 5 ; exch4 r15, r16, r17 }
+	{ addxi r5, r6, 5 ; ill ; prefetch_l1 r25 }
+	{ addxi r5, r6, 5 ; jalr r15 ; prefetch r25 }
+	{ addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 }
+	{ addxi r5, r6, 5 ; ld r25, r26 ; cmplts r15, r16, r17 }
+	{ addxi r5, r6, 5 ; ld1s r25, r26 ; addx r15, r16, r17 }
+	{ addxi r5, r6, 5 ; ld1s r25, r26 ; shrui r15, r16, 5 }
+	{ addxi r5, r6, 5 ; ld1u r25, r26 ; shl1addx r15, r16, r17 }
+	{ addxi r5, r6, 5 ; ld2s r25, r26 ; movei r15, 5 }
+	{ addxi r5, r6, 5 ; ld2u r25, r26 ; ill }
+	{ addxi r5, r6, 5 ; ld4s r25, r26 ; cmpeq r15, r16, r17 }
+	{ addxi r5, r6, 5 ; ld4s r25, r26 }
+	{ addxi r5, r6, 5 ; ld4u r25, r26 ; shl3addx r15, r16, r17 }
+	{ addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 }
+	{ addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 }
+	{ addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 }
+	{ addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 }
+	{ addxi r5, r6, 5 ; prefetch r25 ; fnop }
+	{ addxi r5, r6, 5 ; prefetch_l1 r25 ; add r15, r16, r17 }
+	{ addxi r5, r6, 5 ; prefetch_l1 r25 ; shrsi r15, r16, 5 }
+	{ addxi r5, r6, 5 ; prefetch_l1_fault r25 ; shl1add r15, r16, r17 }
+	{ addxi r5, r6, 5 ; prefetch_l2 r25 ; movei r15, 5 }
+	{ addxi r5, r6, 5 ; prefetch_l2_fault r25 ; info 19 }
+	{ addxi r5, r6, 5 ; prefetch_l3 r25 ; cmples r15, r16, r17 }
+	{ addxi r5, r6, 5 ; prefetch_l3_fault r25 ; add r15, r16, r17 }
+	{ addxi r5, r6, 5 ; prefetch_l3_fault r25 ; shrsi r15, r16, 5 }
+	{ addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 }
+	{ addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 }
+	{ addxi r5, r6, 5 ; shl3add r15, r16, r17 }
+	{ addxi r5, r6, 5 ; shlxi r15, r16, 5 }
+	{ addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 }
+	{ addxi r5, r6, 5 ; st r25, r26 ; add r15, r16, r17 }
+	{ addxi r5, r6, 5 ; st r25, r26 ; shrsi r15, r16, 5 }
+	{ addxi r5, r6, 5 ; st1 r25, r26 ; shl1add r15, r16, r17 }
+	{ addxi r5, r6, 5 ; st2 r25, r26 ; move r15, r16 }
+	{ addxi r5, r6, 5 ; st4 r25, r26 ; fnop }
+	{ addxi r5, r6, 5 ; stnt4 r15, r16 }
+	{ addxi r5, r6, 5 ; subx r15, r16, r17 }
+	{ addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
+	{ addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 }
+	{ addxli r15, r16, 0x1234 ; cmulaf r5, r6, r7 }
+	{ addxli r15, r16, 0x1234 ; mul_hu_ls r5, r6, r7 }
+	{ addxli r15, r16, 0x1234 ; shru r5, r6, r7 }
+	{ addxli r15, r16, 0x1234 ; v1minu r5, r6, r7 }
+	{ addxli r15, r16, 0x1234 ; v2mulfsc r5, r6, r7 }
+	{ addxli r5, r6, 0x1234 ; and r15, r16, r17 }
+	{ addxli r5, r6, 0x1234 ; jrp r15 }
+	{ addxli r5, r6, 0x1234 ; nop }
+	{ addxli r5, r6, 0x1234 ; st2 r15, r16 }
+	{ addxli r5, r6, 0x1234 ; v1shru r15, r16, r17 }
+	{ addxli r5, r6, 0x1234 ; v4packsc r15, r16, r17 }
+	{ addxsc r15, r16, r17 ; cmulhr r5, r6, r7 }
+	{ addxsc r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ addxsc r15, r16, r17 ; shufflebytes r5, r6, r7 }
+	{ addxsc r15, r16, r17 ; v1mulu r5, r6, r7 }
+	{ addxsc r15, r16, r17 ; v2packh r5, r6, r7 }
+	{ addxsc r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ addxsc r5, r6, r7 ; ld1u r15, r16 }
+	{ addxsc r5, r6, r7 ; prefetch r15 }
+	{ addxsc r5, r6, r7 ; st_add r15, r16, 5 }
+	{ addxsc r5, r6, r7 ; v2add r15, r16, r17 }
+	{ addxsc r5, r6, r7 ; v4shru r15, r16, r17 }
+	{ and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 }
+	{ and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
+	{ and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
+	{ and r15, r16, r17 ; cmoveqz r5, r6, r7 ; st1 r25, r26 }
+	{ and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
+	{ and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 }
+	{ and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+	{ and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+	{ and r15, r16, r17 ; ctz r5, r6 ; st1 r25, r26 }
+	{ and r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 }
+	{ and r15, r16, r17 ; ld r25, r26 ; add r5, r6, r7 }
+	{ and r15, r16, r17 ; ld r25, r26 ; revbytes r5, r6 }
+	{ and r15, r16, r17 ; ld1s r25, r26 ; ctz r5, r6 }
+	{ and r15, r16, r17 ; ld1s r25, r26 ; tblidxb0 r5, r6 }
+	{ and r15, r16, r17 ; ld1u r25, r26 ; mz r5, r6, r7 }
+	{ and r15, r16, r17 ; ld2s r25, r26 ; cmples r5, r6, r7 }
+	{ and r15, r16, r17 ; ld2s r25, r26 ; shrs r5, r6, r7 }
+	{ and r15, r16, r17 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ and r15, r16, r17 ; ld4s r25, r26 ; andi r5, r6, 5 }
+	{ and r15, r16, r17 ; ld4s r25, r26 ; shl1addx r5, r6, r7 }
+	{ and r15, r16, r17 ; ld4u r25, r26 ; move r5, r6 }
+	{ and r15, r16, r17 ; ld4u r25, r26 }
+	{ and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 }
+	{ and r15, r16, r17 ; mul_hs_ls r5, r6, r7 }
+	{ and r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 }
+	{ and r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ and r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ and r15, r16, r17 ; mulax r5, r6, r7 ; st2 r25, r26 }
+	{ and r15, r16, r17 ; mz r5, r6, r7 }
+	{ and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
+	{ and r15, r16, r17 ; prefetch r25 ; addx r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch r25 ; rotli r5, r6, 5 }
+	{ and r15, r16, r17 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 }
+	{ and r15, r16, r17 ; prefetch_l1 r25 ; tblidxb2 r5, r6 }
+	{ and r15, r16, r17 ; prefetch_l1_fault r25 ; nor r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch_l2 r25 ; cmplts r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch_l2 r25 ; shru r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 }
+	{ and r15, r16, r17 ; revbits r5, r6 ; ld1s r25, r26 }
+	{ and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+	{ and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
+	{ and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
+	{ and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
+	{ and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+	{ and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 }
+	{ and r15, r16, r17 ; st r25, r26 ; cmples r5, r6, r7 }
+	{ and r15, r16, r17 ; st r25, r26 ; shrs r5, r6, r7 }
+	{ and r15, r16, r17 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ and r15, r16, r17 ; st2 r25, r26 ; andi r5, r6, 5 }
+	{ and r15, r16, r17 ; st2 r25, r26 ; shl1addx r5, r6, r7 }
+	{ and r15, r16, r17 ; st4 r25, r26 ; move r5, r6 }
+	{ and r15, r16, r17 ; st4 r25, r26 }
+	{ and r15, r16, r17 ; tblidxb0 r5, r6 ; ld r25, r26 }
+	{ and r15, r16, r17 ; tblidxb2 r5, r6 ; ld1u r25, r26 }
+	{ and r15, r16, r17 ; v1avgu r5, r6, r7 }
+	{ and r15, r16, r17 ; v1subuc r5, r6, r7 }
+	{ and r15, r16, r17 ; v2shru r5, r6, r7 }
+	{ and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+	{ and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+	{ and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+	{ and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 }
+	{ and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1 r25 }
+	{ and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+	{ and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+	{ and r5, r6, r7 ; fetchor4 r15, r16, r17 }
+	{ and r5, r6, r7 ; ill ; st2 r25, r26 }
+	{ and r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+	{ and r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+	{ and r5, r6, r7 ; ld r25, r26 ; jalrp r15 }
+	{ and r5, r6, r7 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
+	{ and r5, r6, r7 ; ld1u r25, r26 ; addi r15, r16, 5 }
+	{ and r5, r6, r7 ; ld1u r25, r26 ; shru r15, r16, r17 }
+	{ and r5, r6, r7 ; ld2s r25, r26 ; shl1add r15, r16, r17 }
+	{ and r5, r6, r7 ; ld2u r25, r26 ; move r15, r16 }
+	{ and r5, r6, r7 ; ld4s r25, r26 ; fnop }
+	{ and r5, r6, r7 ; ld4u r25, r26 ; andi r15, r16, 5 }
+	{ and r5, r6, r7 ; ld4u r25, r26 ; xor r15, r16, r17 }
+	{ and r5, r6, r7 ; mfspr r16, 0x5 }
+	{ and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+	{ and r5, r6, r7 ; nop ; ld1s r25, r26 }
+	{ and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+	{ and r5, r6, r7 ; prefetch r25 ; mnz r15, r16, r17 }
+	{ and r5, r6, r7 ; prefetch_l1 r25 ; cmples r15, r16, r17 }
+	{ and r5, r6, r7 ; prefetch_l1_fault r25 ; add r15, r16, r17 }
+	{ and r5, r6, r7 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 }
+	{ and r5, r6, r7 ; prefetch_l2 r25 ; shl1add r15, r16, r17 }
+	{ and r5, r6, r7 ; prefetch_l2_fault r25 ; movei r15, 5 }
+	{ and r5, r6, r7 ; prefetch_l3 r25 ; info 19 }
+	{ and r5, r6, r7 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 }
+	{ and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
+	{ and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+	{ and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+	{ and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+	{ and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+	{ and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+	{ and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ and r5, r6, r7 ; st r25, r26 ; cmples r15, r16, r17 }
+	{ and r5, r6, r7 ; st1 r25, r26 ; add r15, r16, r17 }
+	{ and r5, r6, r7 ; st1 r25, r26 ; shrsi r15, r16, 5 }
+	{ and r5, r6, r7 ; st2 r25, r26 ; shl r15, r16, r17 }
+	{ and r5, r6, r7 ; st4 r25, r26 ; mnz r15, r16, r17 }
+	{ and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+	{ and r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+	{ and r5, r6, r7 ; v2mnz r15, r16, r17 }
+	{ and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+	{ andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 }
+	{ andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
+	{ andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 }
+	{ andi r15, r16, 5 ; cmoveqz r5, r6, r7 ; st1 r25, r26 }
+	{ andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
+	{ andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 }
+	{ andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+	{ andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+	{ andi r15, r16, 5 ; ctz r5, r6 ; st1 r25, r26 }
+	{ andi r15, r16, 5 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 }
+	{ andi r15, r16, 5 ; ld r25, r26 ; add r5, r6, r7 }
+	{ andi r15, r16, 5 ; ld r25, r26 ; revbytes r5, r6 }
+	{ andi r15, r16, 5 ; ld1s r25, r26 ; ctz r5, r6 }
+	{ andi r15, r16, 5 ; ld1s r25, r26 ; tblidxb0 r5, r6 }
+	{ andi r15, r16, 5 ; ld1u r25, r26 ; mz r5, r6, r7 }
+	{ andi r15, r16, 5 ; ld2s r25, r26 ; cmples r5, r6, r7 }
+	{ andi r15, r16, 5 ; ld2s r25, r26 ; shrs r5, r6, r7 }
+	{ andi r15, r16, 5 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ andi r15, r16, 5 ; ld4s r25, r26 ; andi r5, r6, 5 }
+	{ andi r15, r16, 5 ; ld4s r25, r26 ; shl1addx r5, r6, r7 }
+	{ andi r15, r16, 5 ; ld4u r25, r26 ; move r5, r6 }
+	{ andi r15, r16, 5 ; ld4u r25, r26 }
+	{ andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 }
+	{ andi r15, r16, 5 ; mul_hs_ls r5, r6, r7 }
+	{ andi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 }
+	{ andi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ andi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ andi r15, r16, 5 ; mulax r5, r6, r7 ; st2 r25, r26 }
+	{ andi r15, r16, 5 ; mz r5, r6, r7 }
+	{ andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 }
+	{ andi r15, r16, 5 ; prefetch r25 ; addx r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch r25 ; rotli r5, r6, 5 }
+	{ andi r15, r16, 5 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 }
+	{ andi r15, r16, 5 ; prefetch_l1 r25 ; tblidxb2 r5, r6 }
+	{ andi r15, r16, 5 ; prefetch_l1_fault r25 ; nor r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch_l2 r25 ; cmplts r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch_l2 r25 ; shru r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 }
+	{ andi r15, r16, 5 ; revbits r5, r6 ; ld1s r25, r26 }
+	{ andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+	{ andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
+	{ andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
+	{ andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
+	{ andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+	{ andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 }
+	{ andi r15, r16, 5 ; st r25, r26 ; cmples r5, r6, r7 }
+	{ andi r15, r16, 5 ; st r25, r26 ; shrs r5, r6, r7 }
+	{ andi r15, r16, 5 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ andi r15, r16, 5 ; st2 r25, r26 ; andi r5, r6, 5 }
+	{ andi r15, r16, 5 ; st2 r25, r26 ; shl1addx r5, r6, r7 }
+	{ andi r15, r16, 5 ; st4 r25, r26 ; move r5, r6 }
+	{ andi r15, r16, 5 ; st4 r25, r26 }
+	{ andi r15, r16, 5 ; tblidxb0 r5, r6 ; ld r25, r26 }
+	{ andi r15, r16, 5 ; tblidxb2 r5, r6 ; ld1u r25, r26 }
+	{ andi r15, r16, 5 ; v1avgu r5, r6, r7 }
+	{ andi r15, r16, 5 ; v1subuc r5, r6, r7 }
+	{ andi r15, r16, 5 ; v2shru r5, r6, r7 }
+	{ andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 }
+	{ andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 }
+	{ andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 }
+	{ andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 }
+	{ andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l1 r25 }
+	{ andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+	{ andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+	{ andi r5, r6, 5 ; fetchor4 r15, r16, r17 }
+	{ andi r5, r6, 5 ; ill ; st2 r25, r26 }
+	{ andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 }
+	{ andi r5, r6, 5 ; jr r15 ; st4 r25, r26 }
+	{ andi r5, r6, 5 ; ld r25, r26 ; jalrp r15 }
+	{ andi r5, r6, 5 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
+	{ andi r5, r6, 5 ; ld1u r25, r26 ; addi r15, r16, 5 }
+	{ andi r5, r6, 5 ; ld1u r25, r26 ; shru r15, r16, r17 }
+	{ andi r5, r6, 5 ; ld2s r25, r26 ; shl1add r15, r16, r17 }
+	{ andi r5, r6, 5 ; ld2u r25, r26 ; move r15, r16 }
+	{ andi r5, r6, 5 ; ld4s r25, r26 ; fnop }
+	{ andi r5, r6, 5 ; ld4u r25, r26 ; andi r15, r16, 5 }
+	{ andi r5, r6, 5 ; ld4u r25, r26 ; xor r15, r16, r17 }
+	{ andi r5, r6, 5 ; mfspr r16, 0x5 }
+	{ andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 }
+	{ andi r5, r6, 5 ; nop ; ld1s r25, r26 }
+	{ andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 }
+	{ andi r5, r6, 5 ; prefetch r25 ; mnz r15, r16, r17 }
+	{ andi r5, r6, 5 ; prefetch_l1 r25 ; cmples r15, r16, r17 }
+	{ andi r5, r6, 5 ; prefetch_l1_fault r25 ; add r15, r16, r17 }
+	{ andi r5, r6, 5 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 }
+	{ andi r5, r6, 5 ; prefetch_l2 r25 ; shl1add r15, r16, r17 }
+	{ andi r5, r6, 5 ; prefetch_l2_fault r25 ; movei r15, 5 }
+	{ andi r5, r6, 5 ; prefetch_l3 r25 ; info 19 }
+	{ andi r5, r6, 5 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 }
+	{ andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 }
+	{ andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 }
+	{ andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+	{ andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+	{ andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 }
+	{ andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 }
+	{ andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ andi r5, r6, 5 ; st r25, r26 ; cmples r15, r16, r17 }
+	{ andi r5, r6, 5 ; st1 r25, r26 ; add r15, r16, r17 }
+	{ andi r5, r6, 5 ; st1 r25, r26 ; shrsi r15, r16, 5 }
+	{ andi r5, r6, 5 ; st2 r25, r26 ; shl r15, r16, r17 }
+	{ andi r5, r6, 5 ; st4 r25, r26 ; mnz r15, r16, r17 }
+	{ andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 }
+	{ andi r5, r6, 5 ; v1cmpleu r15, r16, r17 }
+	{ andi r5, r6, 5 ; v2mnz r15, r16, r17 }
+	{ andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 }
+	{ bfexts r5, r6, 5, 7 ; finv r15 }
+	{ bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 }
+	{ bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 }
+	{ bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 }
+	{ bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 }
+	{ bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 }
+	{ bfextu r5, r6, 5, 7 ; ld4s r15, r16 }
+	{ bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 }
+	{ bfextu r5, r6, 5, 7 ; stnt4 r15, r16 }
+	{ bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 }
+	{ bfins r5, r6, 5, 7 ; add r15, r16, r17 }
+	{ bfins r5, r6, 5, 7 ; info 19 }
+	{ bfins r5, r6, 5, 7 ; mfspr r16, 0x5 }
+	{ bfins r5, r6, 5, 7 ; shru r15, r16, r17 }
+	{ bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 }
+	{ bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 }
+	{ clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
+	{ clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 }
+	{ clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 }
+	{ clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
+	{ clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
+	{ clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l1 r25 }
+	{ clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ clz r5, r6 ; fnop ; prefetch_l3_fault r25 }
+	{ clz r5, r6 ; info 19 ; st r25, r26 }
+	{ clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 }
+	{ clz r5, r6 ; jrp r15 ; st1 r25, r26 }
+	{ clz r5, r6 ; ld r25, r26 ; shl2addx r15, r16, r17 }
+	{ clz r5, r6 ; ld1s r25, r26 ; nor r15, r16, r17 }
+	{ clz r5, r6 ; ld1u r25, r26 ; jalrp r15 }
+	{ clz r5, r6 ; ld2s r25, r26 ; cmpleu r15, r16, r17 }
+	{ clz r5, r6 ; ld2u r25, r26 ; add r15, r16, r17 }
+	{ clz r5, r6 ; ld2u r25, r26 ; shrsi r15, r16, 5 }
+	{ clz r5, r6 ; ld4s r25, r26 ; shl r15, r16, r17 }
+	{ clz r5, r6 ; ld4u r25, r26 ; mnz r15, r16, r17 }
+	{ clz r5, r6 ; ldnt4u r15, r16 }
+	{ clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 }
+	{ clz r5, r6 ; movei r15, 5 }
+	{ clz r5, r6 ; nop }
+	{ clz r5, r6 ; prefetch r15 }
+	{ clz r5, r6 ; prefetch r25 ; shrs r15, r16, r17 }
+	{ clz r5, r6 ; prefetch_l1 r25 ; mz r15, r16, r17 }
+	{ clz r5, r6 ; prefetch_l1_fault r25 ; jalr r15 }
+	{ clz r5, r6 ; prefetch_l2 r25 ; cmpleu r15, r16, r17 }
+	{ clz r5, r6 ; prefetch_l2_fault r25 ; addi r15, r16, 5 }
+	{ clz r5, r6 ; prefetch_l2_fault r25 ; shru r15, r16, r17 }
+	{ clz r5, r6 ; prefetch_l3 r25 ; shl1addx r15, r16, r17 }
+	{ clz r5, r6 ; prefetch_l3_fault r25 ; mz r15, r16, r17 }
+	{ clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 }
+	{ clz r5, r6 ; shl16insli r15, r16, 0x1234 }
+	{ clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
+	{ clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 }
+	{ clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 }
+	{ clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
+	{ clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
+	{ clz r5, r6 ; st r25, r26 ; mz r15, r16, r17 }
+	{ clz r5, r6 ; st1 r25, r26 ; jalr r15 }
+	{ clz r5, r6 ; st2 r25, r26 ; cmples r15, r16, r17 }
+	{ clz r5, r6 ; st4 r15, r16 }
+	{ clz r5, r6 ; st4 r25, r26 ; shrs r15, r16, r17 }
+	{ clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
+	{ clz r5, r6 ; v1shrsi r15, r16, 5 }
+	{ clz r5, r6 ; v4int_l r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
+	{ cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
+	{ cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
+	{ cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
+	{ cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
+	{ cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; fnop ; ld1u r25, r26 }
+	{ cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 }
+	{ cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 }
+	{ cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
+	{ cmoveqz r5, r6, r7 ; ld r25, r26 ; movei r15, 5 }
+	{ cmoveqz r5, r6, r7 ; ld1s r25, r26 ; info 19 }
+	{ cmoveqz r5, r6, r7 ; ld1u r25, r26 ; cmpeqi r15, r16, 5 }
+	{ cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 }
+	{ cmoveqz r5, r6, r7 ; ld2s r25, r26 ; shli r15, r16, 5 }
+	{ cmoveqz r5, r6, r7 ; ld2u r25, r26 ; rotl r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; ld4s r25, r26 ; jrp r15 }
+	{ cmoveqz r5, r6, r7 ; ld4u r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmoveqz r5, r6, r7 ; ldnt r15, r16 }
+	{ cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
+	{ cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+	{ cmoveqz r5, r6, r7 ; nop ; prefetch r25 }
+	{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmoveqz r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; prefetch_l1 r25 ; fnop }
+	{ cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 ; cmpeq r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmoveqz r5, r6, r7 ; prefetch_l2 r25 ; shli r15, r16, 5 }
+	{ cmoveqz r5, r6, r7 ; prefetch_l2_fault r25 ; rotli r15, r16, 5 }
+	{ cmoveqz r5, r6, r7 ; prefetch_l3 r25 ; mnz r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 ; fnop }
+	{ cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
+	{ cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1 r25 }
+	{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
+	{ cmoveqz r5, r6, r7 ; st r25, r26 ; fnop }
+	{ cmoveqz r5, r6, r7 ; st1 r25, r26 ; cmpeq r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; st1 r25, r26 }
+	{ cmoveqz r5, r6, r7 ; st2 r25, r26 ; shl3addx r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; st4 r25, r26 ; or r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 }
+	{ cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+	{ cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+	{ cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
+	{ cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+	{ cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+	{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+	{ cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+	{ cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+	{ cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+	{ cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+	{ cmovnez r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 }
+	{ cmovnez r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+	{ cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+	{ cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+	{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+	{ cmovnez r5, r6, r7 ; prefetch r25 ; jalr r15 }
+	{ cmovnez r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 }
+	{ cmovnez r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+	{ cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+	{ cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+	{ cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+	{ cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+	{ cmovnez r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; st2 r25, r26 ; nop }
+	{ cmovnez r5, r6, r7 ; st4 r25, r26 ; jalr r15 }
+	{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+	{ cmovnez r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 }
+	{ cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
+	{ cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
+	{ cmpeq r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l2 r25 }
+	{ cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 }
+	{ cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+	{ cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; ctz r5, r6 ; prefetch_l2 r25 }
+	{ cmpeq r15, r16, r17 ; fsingle_add1 r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 }
+	{ cmpeq r15, r16, r17 ; ld r25, r26 ; nop }
+	{ cmpeq r15, r16, r17 ; ld1s r25, r26 ; cmpleu r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; ld1s r25, r26 ; shrsi r5, r6, 5 }
+	{ cmpeq r15, r16, r17 ; ld1u r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; ld2s r25, r26 ; clz r5, r6 }
+	{ cmpeq r15, r16, r17 ; ld2s r25, r26 ; shl2add r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; ld2u r25, r26 ; movei r5, 5 }
+	{ cmpeq r15, r16, r17 ; ld4s r25, r26 ; add r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; ld4s r25, r26 ; revbytes r5, r6 }
+	{ cmpeq r15, r16, r17 ; ld4u r25, r26 ; ctz r5, r6 }
+	{ cmpeq r15, r16, r17 ; ld4u r25, r26 ; tblidxb0 r5, r6 }
+	{ cmpeq r15, r16, r17 ; move r5, r6 ; st r25, r26 }
+	{ cmpeq r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmpeq r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpeq r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpeq r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 }
+	{ cmpeq r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ cmpeq r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpeq r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 }
+	{ cmpeq r15, r16, r17 ; pcnt r5, r6 ; st2 r25, r26 }
+	{ cmpeq r15, r16, r17 ; prefetch r25 ; or r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; prefetch_l1 r25 ; cmpltsi r5, r6, 5 }
+	{ cmpeq r15, r16, r17 ; prefetch_l1 r25 ; shrui r5, r6, 5 }
+	{ cmpeq r15, r16, r17 ; prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; prefetch_l2 r25 ; cmovnez r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; prefetch_l2 r25 ; shl3add r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; prefetch_l3 r25 ; addx r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; prefetch_l3 r25 ; rotli r5, r6, 5 }
+	{ cmpeq r15, r16, r17 ; prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 }
+	{ cmpeq r15, r16, r17 ; prefetch_l3_fault r25 ; tblidxb2 r5, r6 }
+	{ cmpeq r15, r16, r17 ; revbytes r5, r6 ; st4 r25, r26 }
+	{ cmpeq r15, r16, r17 ; shl r5, r6, r7 ; ld r25, r26 }
+	{ cmpeq r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
+	{ cmpeq r15, r16, r17 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmpeq r15, r16, r17 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpeq r15, r16, r17 ; shrs r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpeq r15, r16, r17 ; shru r5, r6, r7 ; prefetch r25 }
+	{ cmpeq r15, r16, r17 ; st r25, r26 ; clz r5, r6 }
+	{ cmpeq r15, r16, r17 ; st r25, r26 ; shl2add r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; st1 r25, r26 ; movei r5, 5 }
+	{ cmpeq r15, r16, r17 ; st2 r25, r26 ; add r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; st2 r25, r26 ; revbytes r5, r6 }
+	{ cmpeq r15, r16, r17 ; st4 r25, r26 ; ctz r5, r6 }
+	{ cmpeq r15, r16, r17 ; st4 r25, r26 ; tblidxb0 r5, r6 }
+	{ cmpeq r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 }
+	{ cmpeq r15, r16, r17 ; tblidxb1 r5, r6 ; st2 r25, r26 }
+	{ cmpeq r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ cmpeq r15, r16, r17 ; v1shrs r5, r6, r7 }
+	{ cmpeq r15, r16, r17 ; v2shl r5, r6, r7 }
+	{ cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+	{ cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+	{ cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
+	{ cmpeq r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpeq r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpeq r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+	{ cmpeq r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+	{ cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+	{ cmpeq r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+	{ cmpeq r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 }
+	{ cmpeq r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+	{ cmpeq r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+	{ cmpeq r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+	{ cmpeq r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+	{ cmpeq r5, r6, r7 ; prefetch r25 ; jalr r15 }
+	{ cmpeq r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 }
+	{ cmpeq r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+	{ cmpeq r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+	{ cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+	{ cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpeq r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpeq r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpeq r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; st2 r25, r26 ; nop }
+	{ cmpeq r5, r6, r7 ; st4 r25, r26 ; jalr r15 }
+	{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+	{ cmpeq r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ cmpeq r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ cmpeq r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpeqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 }
+	{ cmpeqi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
+	{ cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
+	{ cmpeqi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l2 r25 }
+	{ cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpeqi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 }
+	{ cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; cmpltu r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; ctz r5, r6 ; prefetch_l2 r25 }
+	{ cmpeqi r15, r16, 5 ; fsingle_add1 r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; info 19 ; st1 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; ld r25, r26 ; nop }
+	{ cmpeqi r15, r16, 5 ; ld1s r25, r26 ; cmpleu r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; ld1s r25, r26 ; shrsi r5, r6, 5 }
+	{ cmpeqi r15, r16, 5 ; ld1u r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; ld2s r25, r26 ; clz r5, r6 }
+	{ cmpeqi r15, r16, 5 ; ld2s r25, r26 ; shl2add r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; ld2u r25, r26 ; movei r5, 5 }
+	{ cmpeqi r15, r16, 5 ; ld4s r25, r26 ; add r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; ld4s r25, r26 ; revbytes r5, r6 }
+	{ cmpeqi r15, r16, 5 ; ld4u r25, r26 ; ctz r5, r6 }
+	{ cmpeqi r15, r16, 5 ; ld4u r25, r26 ; tblidxb0 r5, r6 }
+	{ cmpeqi r15, r16, 5 ; move r5, r6 ; st r25, r26 }
+	{ cmpeqi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpeqi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpeqi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 }
+	{ cmpeqi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st1 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; pcnt r5, r6 ; st2 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; prefetch r25 ; or r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l1 r25 ; cmpltsi r5, r6, 5 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l1 r25 ; shrui r5, r6, 5 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l2 r25 ; cmovnez r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l2 r25 ; shl3add r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l3 r25 ; addx r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l3 r25 ; rotli r5, r6, 5 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 }
+	{ cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 ; tblidxb2 r5, r6 }
+	{ cmpeqi r15, r16, 5 ; revbytes r5, r6 ; st4 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; shl r5, r6, r7 ; ld r25, r26 }
+	{ cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
+	{ cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpeqi r15, r16, 5 ; shrs r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; prefetch r25 }
+	{ cmpeqi r15, r16, 5 ; st r25, r26 ; clz r5, r6 }
+	{ cmpeqi r15, r16, 5 ; st r25, r26 ; shl2add r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; st1 r25, r26 ; movei r5, 5 }
+	{ cmpeqi r15, r16, 5 ; st2 r25, r26 ; add r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; st2 r25, r26 ; revbytes r5, r6 }
+	{ cmpeqi r15, r16, 5 ; st4 r25, r26 ; ctz r5, r6 }
+	{ cmpeqi r15, r16, 5 ; st4 r25, r26 ; tblidxb0 r5, r6 }
+	{ cmpeqi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; tblidxb1 r5, r6 ; st2 r25, r26 }
+	{ cmpeqi r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ cmpeqi r15, r16, 5 ; v1shrs r5, r6, r7 }
+	{ cmpeqi r15, r16, 5 ; v2shl r5, r6, r7 }
+	{ cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld r25, r26 }
+	{ cmpeqi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 }
+	{ cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
+	{ cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 }
+	{ cmpeqi r5, r6, 5 ; fetchaddgez r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ill ; prefetch_l2_fault r25 }
+	{ cmpeqi r5, r6, 5 ; jalr r15 ; prefetch_l2 r25 }
+	{ cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l3 r25 }
+	{ cmpeqi r5, r6, 5 ; ld r25, r26 ; cmpne r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ld1s r25, r26 ; andi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; ld1s r25, r26 ; xor r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ld2s r25, r26 ; nor r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ld2u r25, r26 ; jalrp r15 }
+	{ cmpeqi r5, r6, 5 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ld4u r25, r26 ; add r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; lnk r15 ; st1 r25, r26 }
+	{ cmpeqi r5, r6, 5 ; move r15, r16 ; st1 r25, r26 }
+	{ cmpeqi r5, r6, 5 ; mz r15, r16, r17 ; st1 r25, r26 }
+	{ cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; st4 r25, r26 }
+	{ cmpeqi r5, r6, 5 ; prefetch r25 ; jalr r15 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l1 r25 ; sub r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l2 r25 ; nor r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l2_fault r25 ; jr r15 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st2 r25, r26 }
+	{ cmpeqi r5, r6, 5 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+	{ cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+	{ cmpeqi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpeqi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpeqi r5, r6, 5 ; shru r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpeqi r5, r6, 5 ; st r25, r26 ; addxi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; st r25, r26 ; sub r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; st2 r25, r26 ; nop }
+	{ cmpeqi r5, r6, 5 ; st4 r25, r26 ; jalr r15 }
+	{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; ld r25, r26 }
+	{ cmpeqi r5, r6, 5 ; v1addi r15, r16, 5 }
+	{ cmpeqi r5, r6, 5 ; v2int_l r15, r16, r17 }
+	{ cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpexch r15, r16, r17 ; cmulh r5, r6, r7 }
+	{ cmpexch r15, r16, r17 ; mul_ls_lu r5, r6, r7 }
+	{ cmpexch r15, r16, r17 ; shruxi r5, r6, 5 }
+	{ cmpexch r15, r16, r17 ; v1multu r5, r6, r7 }
+	{ cmpexch r15, r16, r17 ; v2mz r5, r6, r7 }
+	{ cmpexch4 r15, r16, r17 ; bfextu r5, r6, 5, 7 }
+	{ cmpexch4 r15, r16, r17 ; fsingle_mul2 r5, r6, r7 }
+	{ cmpexch4 r15, r16, r17 ; revbytes r5, r6 }
+	{ cmpexch4 r15, r16, r17 ; v1cmpltui r5, r6, 5 }
+	{ cmpexch4 r15, r16, r17 ; v2cmples r5, r6, r7 }
+	{ cmpexch4 r15, r16, r17 ; v4packsc r5, r6, r7 }
+	{ cmples r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+	{ cmples r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmples r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmples r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmples r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+	{ cmples r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+	{ cmples r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+	{ cmples r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
+	{ cmples r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
+	{ cmples r15, r16, r17 ; info 19 ; st4 r25, r26 }
+	{ cmples r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
+	{ cmples r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
+	{ cmples r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
+	{ cmples r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ cmples r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmples r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
+	{ cmples r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmples r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
+	{ cmples r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
+	{ cmples r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmples r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
+	{ cmples r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+	{ cmples r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
+	{ cmples r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
+	{ cmples r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmples r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmples r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmples r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+	{ cmples r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+	{ cmples r15, r16, r17 ; pcnt r5, r6 }
+	{ cmples r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
+	{ cmples r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
+	{ cmples r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
+	{ cmples r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
+	{ cmples r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
+	{ cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+	{ cmples r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+	{ cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmples r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+	{ cmples r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+	{ cmples r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmples r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmples r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
+	{ cmples r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmples r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
+	{ cmples r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
+	{ cmples r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmples r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
+	{ cmples r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+	{ cmples r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ cmples r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ cmples r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ cmples r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ cmples r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ cmples r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ cmples r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ cmples r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ cmples r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ cmples r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ cmples r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmples r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+	{ cmples r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+	{ cmples r5, r6, r7 ; jr r15 ; st r25, r26 }
+	{ cmples r5, r6, r7 ; ld r25, r26 ; ill }
+	{ cmples r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ cmples r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ cmples r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ cmples r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ cmples r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
+	{ cmples r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmples r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ cmples r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ cmples r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+	{ cmples r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+	{ cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ cmples r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+	{ cmples r5, r6, r7 ; prefetch r25 ; jr r15 }
+	{ cmples r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ cmples r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ cmples r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ cmples r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ cmples r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ cmples r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ cmples r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ cmples r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ cmples r5, r6, r7 ; rotli r15, r16, 5 }
+	{ cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ cmples r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ cmples r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ cmples r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ cmples r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 }
+	{ cmples r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 }
+	{ cmples r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ cmples r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ cmples r5, r6, r7 ; st4 r25, r26 ; jr r15 }
+	{ cmples r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ cmples r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ cmples r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmpleu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+	{ cmpleu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmpleu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmpleu r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+	{ cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+	{ cmpleu r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+	{ cmpleu r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
+	{ cmpleu r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; info 19 ; st4 r25, r26 }
+	{ cmpleu r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmpleu r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
+	{ cmpleu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+	{ cmpleu r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
+	{ cmpleu r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
+	{ cmpleu r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmpleu r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpleu r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpleu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+	{ cmpleu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+	{ cmpleu r15, r16, r17 ; pcnt r5, r6 }
+	{ cmpleu r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
+	{ cmpleu r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+	{ cmpleu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+	{ cmpleu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+	{ cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+	{ cmpleu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmpleu r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmpleu r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
+	{ cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+	{ cmpleu r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ cmpleu r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ cmpleu r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ cmpleu r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ cmpleu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpleu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpleu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ cmpleu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpleu r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+	{ cmpleu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+	{ cmpleu r5, r6, r7 ; jr r15 ; st r25, r26 }
+	{ cmpleu r5, r6, r7 ; ld r25, r26 ; ill }
+	{ cmpleu r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
+	{ cmpleu r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+	{ cmpleu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+	{ cmpleu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+	{ cmpleu r5, r6, r7 ; prefetch r25 ; jr r15 }
+	{ cmpleu r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ cmpleu r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; rotli r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpleu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpleu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ cmpleu r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; st4 r25, r26 ; jr r15 }
+	{ cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpleu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ cmpleu r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmplts r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+	{ cmplts r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmplts r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmplts r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmplts r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+	{ cmplts r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+	{ cmplts r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+	{ cmplts r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
+	{ cmplts r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; info 19 ; st4 r25, r26 }
+	{ cmplts r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmplts r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
+	{ cmplts r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+	{ cmplts r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
+	{ cmplts r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
+	{ cmplts r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmplts r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmplts r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmplts r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+	{ cmplts r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+	{ cmplts r15, r16, r17 ; pcnt r5, r6 }
+	{ cmplts r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
+	{ cmplts r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+	{ cmplts r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+	{ cmplts r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmplts r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmplts r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+	{ cmplts r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+	{ cmplts r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmplts r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmplts r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
+	{ cmplts r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+	{ cmplts r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ cmplts r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ cmplts r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ cmplts r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ cmplts r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ cmplts r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ cmplts r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ cmplts r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ cmplts r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmplts r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+	{ cmplts r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+	{ cmplts r5, r6, r7 ; jr r15 ; st r25, r26 }
+	{ cmplts r5, r6, r7 ; ld r25, r26 ; ill }
+	{ cmplts r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
+	{ cmplts r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+	{ cmplts r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+	{ cmplts r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ cmplts r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+	{ cmplts r5, r6, r7 ; prefetch r25 ; jr r15 }
+	{ cmplts r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ cmplts r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; rotli r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ cmplts r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmplts r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ cmplts r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ cmplts r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ cmplts r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; st4 r25, r26 ; jr r15 }
+	{ cmplts r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ cmplts r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ cmplts r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ cmplts r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmpltsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+	{ cmpltsi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmpltsi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmpltsi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st r25, r26 }
+	{ cmpltsi r15, r16, 5 ; cmples r5, r6, r7 ; st2 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld r25, r26 }
+	{ cmpltsi r15, r16, 5 ; ctz r5, r6 ; prefetch_l3 r25 }
+	{ cmpltsi r15, r16, 5 ; fsingle_mul1 r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; info 19 ; st4 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; ld r25, r26 ; or r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; ld1s r25, r26 ; shrui r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; ld4s r25, r26 ; addx r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; ld4s r25, r26 ; rotli r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmpltsi r15, r16, 5 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
+	{ cmpltsi r15, r16, 5 ; move r5, r6 ; st2 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
+	{ cmpltsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpltsi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpltsi r15, r16, 5 ; mz r5, r6, r7 ; st1 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; nor r5, r6, r7 ; st4 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; pcnt r5, r6 }
+	{ cmpltsi r15, r16, 5 ; prefetch r25 ; revbits r5, r6 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l1 r25 ; subx r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l2 r25 ; shli r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l3 r25 ; and r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; rotl r5, r6, r7 ; ld r25, r26 }
+	{ cmpltsi r15, r16, 5 ; shl r5, r6, r7 ; ld1u r25, r26 }
+	{ cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch r25 }
+	{ cmpltsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 }
+	{ cmpltsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmpltsi r15, r16, 5 ; st r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; st r25, r26 ; shl3add r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; st2 r25, r26 ; addx r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; st2 r25, r26 ; rotli r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmpltsi r15, r16, 5 ; st4 r25, r26 ; tblidxb2 r5, r6 }
+	{ cmpltsi r15, r16, 5 ; subx r5, r6, r7 ; st4 r25, r26 }
+	{ cmpltsi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ cmpltsi r15, r16, 5 ; v1addi r5, r6, 5 }
+	{ cmpltsi r15, r16, 5 ; v1shru r5, r6, r7 }
+	{ cmpltsi r15, r16, 5 ; v2shlsc r5, r6, r7 }
+	{ cmpltsi r5, r6, 5 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpltsi r5, r6, 5 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpltsi r5, r6, 5 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpltsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpltsi r5, r6, 5 ; fetchand r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; ill ; prefetch_l3_fault r25 }
+	{ cmpltsi r5, r6, 5 ; jalr r15 ; prefetch_l3 r25 }
+	{ cmpltsi r5, r6, 5 ; jr r15 ; st r25, r26 }
+	{ cmpltsi r5, r6, 5 ; ld r25, r26 ; ill }
+	{ cmpltsi r5, r6, 5 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; ld1s_add r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; ld2u r25, r26 ; jrp r15 }
+	{ cmpltsi r5, r6, 5 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; lnk r15 ; st4 r25, r26 }
+	{ cmpltsi r5, r6, 5 ; move r15, r16 ; st4 r25, r26 }
+	{ cmpltsi r5, r6, 5 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ cmpltsi r5, r6, 5 ; or r15, r16, r17 ; ld r25, r26 }
+	{ cmpltsi r5, r6, 5 ; prefetch r25 ; jr r15 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; rotli r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpltsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpltsi r5, r6, 5 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpltsi r5, r6, 5 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ cmpltsi r5, r6, 5 ; st r25, r26 ; andi r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; st r25, r26 ; xor r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; st4 r25, r26 ; jr r15 }
+	{ cmpltsi r5, r6, 5 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpltsi r5, r6, 5 ; v1cmpeq r15, r16, r17 }
+	{ cmpltsi r5, r6, 5 ; v2maxsi r15, r16, 5 }
+	{ cmpltsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmpltu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
+	{ cmpltu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmpltu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ cmpltu r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpltu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
+	{ cmpltu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
+	{ cmpltu r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
+	{ cmpltu r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
+	{ cmpltu r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; info 19 ; st4 r25, r26 }
+	{ cmpltu r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmpltu r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
+	{ cmpltu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
+	{ cmpltu r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
+	{ cmpltu r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
+	{ cmpltu r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
+	{ cmpltu r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
+	{ cmpltu r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpltu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
+	{ cmpltu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
+	{ cmpltu r15, r16, r17 ; pcnt r5, r6 }
+	{ cmpltu r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
+	{ cmpltu r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
+	{ cmpltu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
+	{ cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
+	{ cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
+	{ cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
+	{ cmpltu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
+	{ cmpltu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmpltu r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
+	{ cmpltu r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
+	{ cmpltu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
+	{ cmpltu r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ cmpltu r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ cmpltu r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ cmpltu r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ cmpltu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpltu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpltu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpltu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpltu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ cmpltu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ cmpltu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpltu r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
+	{ cmpltu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
+	{ cmpltu r5, r6, r7 ; jr r15 ; st r25, r26 }
+	{ cmpltu r5, r6, r7 ; ld r25, r26 ; ill }
+	{ cmpltu r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
+	{ cmpltu r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
+	{ cmpltu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
+	{ cmpltu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ cmpltu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
+	{ cmpltu r5, r6, r7 ; prefetch r25 ; jr r15 }
+	{ cmpltu r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ cmpltu r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; rotli r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ cmpltu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpltu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpltu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpltu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ cmpltu r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; st4 r25, r26 ; jr r15 }
+	{ cmpltu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ cmpltu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ cmpltu r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ cmpltu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmpltui r15, r16, 5 ; crc32_32 r5, r6, r7 }
+	{ cmpltui r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ cmpltui r15, r16, 5 ; sub r5, r6, r7 }
+	{ cmpltui r15, r16, 5 ; v1mulus r5, r6, r7 }
+	{ cmpltui r15, r16, 5 ; v2packl r5, r6, r7 }
+	{ cmpltui r5, r6, 5 ; cmpexch4 r15, r16, r17 }
+	{ cmpltui r5, r6, 5 ; ld1u_add r15, r16, 5 }
+	{ cmpltui r5, r6, 5 ; prefetch_add_l1 r15, 5 }
+	{ cmpltui r5, r6, 5 ; stnt r15, r16 }
+	{ cmpltui r5, r6, 5 ; v2addi r15, r16, 5 }
+	{ cmpltui r5, r6, 5 ; v4sub r15, r16, r17 }
+	{ cmpne r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
+	{ cmpne r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
+	{ cmpne r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
+	{ cmpne r15, r16, r17 ; cmoveqz r5, r6, r7 ; st2 r25, r26 }
+	{ cmpne r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+	{ cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
+	{ cmpne r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+	{ cmpne r15, r16, r17 ; ctz r5, r6 ; st2 r25, r26 }
+	{ cmpne r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1u r25, r26 }
+	{ cmpne r15, r16, r17 ; ld r25, r26 ; addi r5, r6, 5 }
+	{ cmpne r15, r16, r17 ; ld r25, r26 ; rotl r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; ld1s r25, r26 ; fnop }
+	{ cmpne r15, r16, r17 ; ld1s r25, r26 ; tblidxb1 r5, r6 }
+	{ cmpne r15, r16, r17 ; ld1u r25, r26 ; nop }
+	{ cmpne r15, r16, r17 ; ld2s r25, r26 ; cmpleu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; ld2s r25, r26 ; shrsi r5, r6, 5 }
+	{ cmpne r15, r16, r17 ; ld2u r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; ld4s r25, r26 ; clz r5, r6 }
+	{ cmpne r15, r16, r17 ; ld4s r25, r26 ; shl2add r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; ld4u r25, r26 ; movei r5, 5 }
+	{ cmpne r15, r16, r17 ; mm r5, r6, 5, 7 }
+	{ cmpne r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
+	{ cmpne r15, r16, r17 ; mul_hs_lu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; mula_hs_hu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st2 r25, r26 }
+	{ cmpne r15, r16, r17 ; mulax r5, r6, r7 ; st4 r25, r26 }
+	{ cmpne r15, r16, r17 ; nop ; ld r25, r26 }
+	{ cmpne r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
+	{ cmpne r15, r16, r17 ; prefetch r25 ; addxi r5, r6, 5 }
+	{ cmpne r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; prefetch_l1 r25 ; info 19 }
+	{ cmpne r15, r16, r17 ; prefetch_l1 r25 ; tblidxb3 r5, r6 }
+	{ cmpne r15, r16, r17 ; prefetch_l1_fault r25 ; or r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; prefetch_l2 r25 ; cmpltsi r5, r6, 5 }
+	{ cmpne r15, r16, r17 ; prefetch_l2 r25 ; shrui r5, r6, 5 }
+	{ cmpne r15, r16, r17 ; prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; prefetch_l3 r25 ; cmovnez r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; prefetch_l3 r25 ; shl3add r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; revbits r5, r6 ; ld1u r25, r26 }
+	{ cmpne r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
+	{ cmpne r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
+	{ cmpne r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+	{ cmpne r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ cmpne r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ cmpne r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ cmpne r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ cmpne r15, r16, r17 ; st r25, r26 ; cmpleu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; st r25, r26 ; shrsi r5, r6, 5 }
+	{ cmpne r15, r16, r17 ; st1 r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; st2 r25, r26 ; clz r5, r6 }
+	{ cmpne r15, r16, r17 ; st2 r25, r26 ; shl2add r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; st4 r25, r26 ; movei r5, 5 }
+	{ cmpne r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+	{ cmpne r15, r16, r17 ; tblidxb0 r5, r6 ; ld1s r25, r26 }
+	{ cmpne r15, r16, r17 ; tblidxb2 r5, r6 ; ld2s r25, r26 }
+	{ cmpne r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; v2add r5, r6, r7 }
+	{ cmpne r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ cmpne r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+	{ cmpne r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+	{ cmpne r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+	{ cmpne r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpne r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ cmpne r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ cmpne r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ cmpne r5, r6, r7 ; finv r15 }
+	{ cmpne r5, r6, r7 ; ill ; st4 r25, r26 }
+	{ cmpne r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+	{ cmpne r5, r6, r7 ; jr r15 }
+	{ cmpne r5, r6, r7 ; ld r25, r26 ; jr r15 }
+	{ cmpne r5, r6, r7 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ cmpne r5, r6, r7 ; ld1u r25, r26 ; addx r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; ld1u r25, r26 ; shrui r15, r16, 5 }
+	{ cmpne r5, r6, r7 ; ld2s r25, r26 ; shl1addx r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; ld2u r25, r26 ; movei r15, 5 }
+	{ cmpne r5, r6, r7 ; ld4s r25, r26 ; ill }
+	{ cmpne r5, r6, r7 ; ld4u r25, r26 ; cmpeq r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; ld4u r25, r26 }
+	{ cmpne r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+	{ cmpne r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+	{ cmpne r5, r6, r7 ; nop ; ld1u r25, r26 }
+	{ cmpne r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpne r5, r6, r7 ; prefetch r25 ; move r15, r16 }
+	{ cmpne r5, r6, r7 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; prefetch_l1_fault r25 ; addi r15, r16, 5 }
+	{ cmpne r5, r6, r7 ; prefetch_l1_fault r25 ; shru r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; prefetch_l2_fault r25 ; mz r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; prefetch_l3 r25 ; jalr r15 }
+	{ cmpne r5, r6, r7 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+	{ cmpne r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+	{ cmpne r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+	{ cmpne r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+	{ cmpne r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 }
+	{ cmpne r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1 r25 }
+	{ cmpne r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+	{ cmpne r5, r6, r7 ; st r25, r26 ; cmpleu r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; st1 r25, r26 ; addi r15, r16, 5 }
+	{ cmpne r5, r6, r7 ; st1 r25, r26 ; shru r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; st2 r25, r26 ; shl1add r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; st4 r25, r26 ; move r15, r16 }
+	{ cmpne r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+	{ cmpne r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ cmpne r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+	{ cmul r5, r6, r7 ; flush r15 }
+	{ cmul r5, r6, r7 ; ldnt4u r15, r16 }
+	{ cmul r5, r6, r7 ; shli r15, r16, 5 }
+	{ cmul r5, r6, r7 ; v1int_h r15, r16, r17 }
+	{ cmul r5, r6, r7 ; v2shli r15, r16, 5 }
+	{ cmula r5, r6, r7 ; cmpltui r15, r16, 5 }
+	{ cmula r5, r6, r7 ; ld4s_add r15, r16, 5 }
+	{ cmula r5, r6, r7 ; prefetch_l1 r15 }
+	{ cmula r5, r6, r7 ; stnt4_add r15, r16, 5 }
+	{ cmula r5, r6, r7 ; v2cmplts r15, r16, r17 }
+	{ cmulaf r5, r6, r7 ; addi r15, r16, 5 }
+	{ cmulaf r5, r6, r7 ; infol 0x1234 }
+	{ cmulaf r5, r6, r7 ; mnz r15, r16, r17 }
+	{ cmulaf r5, r6, r7 ; shrui r15, r16, 5 }
+	{ cmulaf r5, r6, r7 ; v1mnz r15, r16, r17 }
+	{ cmulaf r5, r6, r7 ; v2sub r15, r16, r17 }
+	{ cmulf r5, r6, r7 ; exch r15, r16, r17 }
+	{ cmulf r5, r6, r7 ; ldnt r15, r16 }
+	{ cmulf r5, r6, r7 ; raise }
+	{ cmulf r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ cmulf r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ cmulfr r5, r6, r7 ; and r15, r16, r17 }
+	{ cmulfr r5, r6, r7 ; jrp r15 }
+	{ cmulfr r5, r6, r7 ; nop }
+	{ cmulfr r5, r6, r7 ; st2 r15, r16 }
+	{ cmulfr r5, r6, r7 ; v1shru r15, r16, r17 }
+	{ cmulfr r5, r6, r7 ; v4packsc r15, r16, r17 }
+	{ cmulh r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ cmulh r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+	{ cmulh r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ cmulh r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ cmulh r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ cmulhr r5, r6, r7 ; cmples r15, r16, r17 }
+	{ cmulhr r5, r6, r7 ; ld2s r15, r16 }
+	{ cmulhr r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+	{ cmulhr r5, r6, r7 ; stnt1 r15, r16 }
+	{ cmulhr r5, r6, r7 ; v2addsc r15, r16, r17 }
+	{ cmulhr r5, r6, r7 ; v4subsc r15, r16, r17 }
+	{ crc32_32 r5, r6, r7 ; flushwb }
+	{ crc32_32 r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+	{ crc32_32 r5, r6, r7 ; shlx r15, r16, r17 }
+	{ crc32_32 r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ crc32_32 r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ crc32_8 r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ crc32_8 r5, r6, r7 ; ld4u r15, r16 }
+	{ crc32_8 r5, r6, r7 ; prefetch_l1_fault r15 }
+	{ crc32_8 r5, r6, r7 ; stnt_add r15, r16, 5 }
+	{ crc32_8 r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ ctz r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ ctz r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ ctz r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ ctz r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ ctz r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ ctz r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ ctz r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ ctz r5, r6 ; fetchand r15, r16, r17 }
+	{ ctz r5, r6 ; ill ; prefetch_l3_fault r25 }
+	{ ctz r5, r6 ; jalr r15 ; prefetch_l3 r25 }
+	{ ctz r5, r6 ; jr r15 ; st r25, r26 }
+	{ ctz r5, r6 ; ld r25, r26 ; ill }
+	{ ctz r5, r6 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ ctz r5, r6 ; ld1s_add r15, r16, 5 }
+	{ ctz r5, r6 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ ctz r5, r6 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ ctz r5, r6 ; ld2u r25, r26 ; jrp r15 }
+	{ ctz r5, r6 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ ctz r5, r6 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ ctz r5, r6 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ ctz r5, r6 ; lnk r15 ; st4 r25, r26 }
+	{ ctz r5, r6 ; move r15, r16 ; st4 r25, r26 }
+	{ ctz r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ ctz r5, r6 ; or r15, r16, r17 ; ld r25, r26 }
+	{ ctz r5, r6 ; prefetch r25 ; jr r15 }
+	{ ctz r5, r6 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ ctz r5, r6 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ ctz r5, r6 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ ctz r5, r6 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ ctz r5, r6 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ ctz r5, r6 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ ctz r5, r6 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ ctz r5, r6 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ ctz r5, r6 ; rotli r15, r16, 5 }
+	{ ctz r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ ctz r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ ctz r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ ctz r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ ctz r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ ctz r5, r6 ; st r25, r26 ; andi r15, r16, 5 }
+	{ ctz r5, r6 ; st r25, r26 ; xor r15, r16, r17 }
+	{ ctz r5, r6 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ ctz r5, r6 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ ctz r5, r6 ; st4 r25, r26 ; jr r15 }
+	{ ctz r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ ctz r5, r6 ; v1cmpeq r15, r16, r17 }
+	{ ctz r5, r6 ; v2maxsi r15, r16, 5 }
+	{ ctz r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ dblalign r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ dblalign r5, r6, r7 ; ldnt2u r15, r16 }
+	{ dblalign r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ dblalign r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+	{ dblalign r5, r6, r7 ; v2packh r15, r16, r17 }
+	{ dblalign2 r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ dblalign2 r15, r16, r17 ; info 19 }
+	{ dblalign2 r15, r16, r17 ; shl16insli r5, r6, 0x1234 }
+	{ dblalign2 r15, r16, r17 ; v1ddotpus r5, r6, r7 }
+	{ dblalign2 r15, r16, r17 ; v2cmpltu r5, r6, r7 }
+	{ dblalign2 r15, r16, r17 ; v4shru r5, r6, r7 }
+	{ dblalign2 r5, r6, r7 ; flush r15 }
+	{ dblalign2 r5, r6, r7 ; ldnt4u r15, r16 }
+	{ dblalign2 r5, r6, r7 ; shli r15, r16, 5 }
+	{ dblalign2 r5, r6, r7 ; v1int_h r15, r16, r17 }
+	{ dblalign2 r5, r6, r7 ; v2shli r15, r16, 5 }
+	{ dblalign4 r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ dblalign4 r15, r16, r17 ; move r5, r6 }
+	{ dblalign4 r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ dblalign4 r15, r16, r17 ; v1dotpu r5, r6, r7 }
+	{ dblalign4 r15, r16, r17 ; v2dotpa r5, r6, r7 }
+	{ dblalign4 r15, r16, r17 ; xori r5, r6, 5 }
+	{ dblalign4 r5, r6, r7 ; ill }
+	{ dblalign4 r5, r6, r7 ; mf }
+	{ dblalign4 r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ dblalign4 r5, r6, r7 ; v1minu r15, r16, r17 }
+	{ dblalign4 r5, r6, r7 ; v2shru r15, r16, r17 }
+	{ dblalign6 r15, r16, r17 ; cmpltui r5, r6, 5 }
+	{ dblalign6 r15, r16, r17 ; mul_hs_hu r5, r6, r7 }
+	{ dblalign6 r15, r16, r17 ; shlx r5, r6, r7 }
+	{ dblalign6 r15, r16, r17 ; v1int_h r5, r6, r7 }
+	{ dblalign6 r15, r16, r17 ; v2maxsi r5, r6, 5 }
+	{ dblalign6 r5, r6, r7 ; addx r15, r16, r17 }
+	{ dblalign6 r5, r6, r7 ; iret }
+	{ dblalign6 r5, r6, r7 ; movei r15, 5 }
+	{ dblalign6 r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ dblalign6 r5, r6, r7 ; v1shl r15, r16, r17 }
+	{ dblalign6 r5, r6, r7 ; v4add r15, r16, r17 }
+	{ dtlbpr r15 ; cmula r5, r6, r7 }
+	{ dtlbpr r15 ; mul_hu_hu r5, r6, r7 }
+	{ dtlbpr r15 ; shrsi r5, r6, 5 }
+	{ dtlbpr r15 ; v1maxui r5, r6, 5 }
+	{ dtlbpr r15 ; v2mnz r5, r6, r7 }
+	{ exch r15, r16, r17 ; addxsc r5, r6, r7 }
+	{ exch r15, r16, r17 ; fnop }
+	{ exch r15, r16, r17 ; or r5, r6, r7 }
+	{ exch r15, r16, r17 ; v1cmpleu r5, r6, r7 }
+	{ exch r15, r16, r17 ; v2adiffs r5, r6, r7 }
+	{ exch r15, r16, r17 ; v4add r5, r6, r7 }
+	{ exch4 r15, r16, r17 ; cmulf r5, r6, r7 }
+	{ exch4 r15, r16, r17 ; mul_hu_lu r5, r6, r7 }
+	{ exch4 r15, r16, r17 ; shrui r5, r6, 5 }
+	{ exch4 r15, r16, r17 ; v1minui r5, r6, 5 }
+	{ exch4 r15, r16, r17 ; v2muls r5, r6, r7 }
+	{ fdouble_add_flags r5, r6, r7 ; andi r15, r16, 5 }
+	{ fdouble_add_flags r5, r6, r7 ; ld r15, r16 }
+	{ fdouble_add_flags r5, r6, r7 ; nor r15, r16, r17 }
+	{ fdouble_add_flags r5, r6, r7 ; st2_add r15, r16, 5 }
+	{ fdouble_add_flags r5, r6, r7 ; v1shrui r15, r16, 5 }
+	{ fdouble_add_flags r5, r6, r7 ; v4shl r15, r16, r17 }
+	{ fdouble_addsub r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ fdouble_addsub r5, r6, r7 ; ldnt2u r15, r16 }
+	{ fdouble_addsub r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ fdouble_addsub r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+	{ fdouble_addsub r5, r6, r7 ; v2packh r15, r16, r17 }
+	{ fdouble_mul_flags r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ fdouble_mul_flags r5, r6, r7 ; ld2s_add r15, r16, 5 }
+	{ fdouble_mul_flags r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+	{ fdouble_mul_flags r5, r6, r7 ; stnt1_add r15, r16, 5 }
+	{ fdouble_mul_flags r5, r6, r7 ; v2cmpeq r15, r16, r17 }
+	{ fdouble_mul_flags r5, r6, r7 ; wh64 r15 }
+	{ fdouble_pack1 r5, r6, r7 ; fnop }
+	{ fdouble_pack1 r5, r6, r7 ; ldnt_add r15, r16, 5 }
+	{ fdouble_pack1 r5, r6, r7 ; shlxi r15, r16, 5 }
+	{ fdouble_pack1 r5, r6, r7 ; v1maxu r15, r16, r17 }
+	{ fdouble_pack1 r5, r6, r7 ; v2shrs r15, r16, r17 }
+	{ fdouble_pack2 r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ fdouble_pack2 r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ fdouble_pack2 r5, r6, r7 ; prefetch_l2 r15 }
+	{ fdouble_pack2 r5, r6, r7 ; sub r15, r16, r17 }
+	{ fdouble_pack2 r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ fdouble_sub_flags r5, r6, r7 ; addx r15, r16, r17 }
+	{ fdouble_sub_flags r5, r6, r7 ; iret }
+	{ fdouble_sub_flags r5, r6, r7 ; movei r15, 5 }
+	{ fdouble_sub_flags r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ fdouble_sub_flags r5, r6, r7 ; v1shl r15, r16, r17 }
+	{ fdouble_sub_flags r5, r6, r7 ; v4add r15, r16, r17 }
+	{ fdouble_unpack_max r5, r6, r7 ; fetchadd r15, r16, r17 }
+	{ fdouble_unpack_max r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+	{ fdouble_unpack_max r5, r6, r7 ; rotli r15, r16, 5 }
+	{ fdouble_unpack_max r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ fdouble_unpack_max r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ fdouble_unpack_min r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ fdouble_unpack_min r5, r6, r7 ; ld1s r15, r16 }
+	{ fdouble_unpack_min r5, r6, r7 ; or r15, r16, r17 }
+	{ fdouble_unpack_min r5, r6, r7 ; st4 r15, r16 }
+	{ fdouble_unpack_min r5, r6, r7 ; v1sub r15, r16, r17 }
+	{ fdouble_unpack_min r5, r6, r7 ; v4shlsc r15, r16, r17 }
+	{ fetchadd r15, r16, r17 ; crc32_8 r5, r6, r7 }
+	{ fetchadd r15, r16, r17 ; mula_hs_hu r5, r6, r7 }
+	{ fetchadd r15, r16, r17 ; subx r5, r6, r7 }
+	{ fetchadd r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ fetchadd r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ fetchadd4 r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ fetchadd4 r15, r16, r17 ; fsingle_sub1 r5, r6, r7 }
+	{ fetchadd4 r15, r16, r17 ; shl r5, r6, r7 }
+	{ fetchadd4 r15, r16, r17 ; v1ddotpua r5, r6, r7 }
+	{ fetchadd4 r15, r16, r17 ; v2cmpltsi r5, r6, 5 }
+	{ fetchadd4 r15, r16, r17 ; v4shrs r5, r6, r7 }
+	{ fetchaddgez r15, r16, r17 ; dblalign r5, r6, r7 }
+	{ fetchaddgez r15, r16, r17 ; mula_hs_lu r5, r6, r7 }
+	{ fetchaddgez r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ fetchaddgez r15, r16, r17 ; v1sadu r5, r6, r7 }
+	{ fetchaddgez r15, r16, r17 ; v2sadau r5, r6, r7 }
+	{ fetchaddgez4 r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ fetchaddgez4 r15, r16, r17 ; infol 0x1234 }
+	{ fetchaddgez4 r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ fetchaddgez4 r15, r16, r17 ; v1ddotpusa r5, r6, r7 }
+	{ fetchaddgez4 r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+	{ fetchaddgez4 r15, r16, r17 ; v4sub r5, r6, r7 }
+	{ fetchand r15, r16, r17 ; dblalign4 r5, r6, r7 }
+	{ fetchand r15, r16, r17 ; mula_hu_ls r5, r6, r7 }
+	{ fetchand r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ fetchand r15, r16, r17 ; v1shli r5, r6, 5 }
+	{ fetchand r15, r16, r17 ; v2sadu r5, r6, r7 }
+	{ fetchand4 r15, r16, r17 ; cmples r5, r6, r7 }
+	{ fetchand4 r15, r16, r17 ; mnz r5, r6, r7 }
+	{ fetchand4 r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ fetchand4 r15, r16, r17 ; v1dotpa r5, r6, r7 }
+	{ fetchand4 r15, r16, r17 ; v2dotp r5, r6, r7 }
+	{ fetchand4 r15, r16, r17 ; xor r5, r6, r7 }
+	{ fetchor r15, r16, r17 ; fdouble_add_flags r5, r6, r7 }
+	{ fetchor r15, r16, r17 ; mula_ls_ls r5, r6, r7 }
+	{ fetchor r15, r16, r17 ; v1add r5, r6, r7 }
+	{ fetchor r15, r16, r17 ; v1shrsi r5, r6, 5 }
+	{ fetchor r15, r16, r17 ; v2shli r5, r6, 5 }
+	{ fetchor4 r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ fetchor4 r15, r16, r17 ; movei r5, 5 }
+	{ fetchor4 r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ fetchor4 r15, r16, r17 ; v1dotpua r5, r6, r7 }
+	{ fetchor4 r15, r16, r17 ; v2int_h r5, r6, r7 }
+	{ finv r15 ; add r5, r6, r7 }
+	{ finv r15 ; fdouble_mul_flags r5, r6, r7 }
+	{ finv r15 ; mula_lu_lu r5, r6, r7 }
+	{ finv r15 ; v1adduc r5, r6, r7 }
+	{ finv r15 ; v1shrui r5, r6, 5 }
+	{ finv r15 ; v2shrs r5, r6, r7 }
+	{ flush r15 ; cmpltu r5, r6, r7 }
+	{ flush r15 ; mul_hs_hs r5, r6, r7 }
+	{ flush r15 ; shli r5, r6, 5 }
+	{ flush r15 ; v1dotpusa r5, r6, r7 }
+	{ flush r15 ; v2maxs r5, r6, r7 }
+	{ flushwb ; addli r5, r6, 0x1234 }
+	{ flushwb ; fdouble_pack2 r5, r6, r7 }
+	{ flushwb ; mulx r5, r6, r7 }
+	{ flushwb ; v1avgu r5, r6, r7 }
+	{ flushwb ; v1subuc r5, r6, r7 }
+	{ flushwb ; v2shru r5, r6, r7 }
+	{ fnop ; add r5, r6, r7 ; ld2u r25, r26 }
+	{ fnop ; addi r5, r6, 5 ; ld4u r25, r26 }
+	{ fnop ; addx r5, r6, r7 ; ld4u r25, r26 }
+	{ fnop ; addxi r5, r6, 5 ; prefetch_l1 r25 }
+	{ fnop ; and r5, r6, r7 ; ld4u r25, r26 }
+	{ fnop ; andi r5, r6, 5 ; prefetch_l1 r25 }
+	{ fnop ; cmoveqz r5, r6, r7 ; prefetch r25 }
+	{ fnop ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ fnop ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ fnop ; cmples r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ fnop ; cmpleu r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ fnop ; cmplts r15, r16, r17 ; st1 r25, r26 }
+	{ fnop ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+	{ fnop ; cmpltu r5, r6, r7 ; ld r25, r26 }
+	{ fnop ; cmpne r5, r6, r7 ; ld r25, r26 }
+	{ fnop ; ctz r5, r6 ; prefetch_l3 r25 }
+	{ fnop ; fnop ; ld2u r25, r26 }
+	{ fnop ; icoh r15 }
+	{ fnop ; inv r15 }
+	{ fnop ; jr r15 ; ld r25, r26 }
+	{ fnop ; ld r25, r26 ; add r5, r6, r7 }
+	{ fnop ; ld r25, r26 ; mnz r15, r16, r17 }
+	{ fnop ; ld r25, r26 ; shl3add r15, r16, r17 }
+	{ fnop ; ld1s r25, r26 ; cmovnez r5, r6, r7 }
+	{ fnop ; ld1s r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ fnop ; ld1s r25, r26 ; shrui r5, r6, 5 }
+	{ fnop ; ld1u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ fnop ; ld1u r25, r26 ; revbytes r5, r6 }
+	{ fnop ; ld1u_add r15, r16, 5 }
+	{ fnop ; ld2s r25, r26 ; jr r15 }
+	{ fnop ; ld2s r25, r26 ; shl2add r5, r6, r7 }
+	{ fnop ; ld2u r25, r26 ; andi r15, r16, 5 }
+	{ fnop ; ld2u r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ fnop ; ld2u r25, r26 ; shrsi r5, r6, 5 }
+	{ fnop ; ld4s r25, r26 ; cmpleu r5, r6, r7 }
+	{ fnop ; ld4s r25, r26 ; or r15, r16, r17 }
+	{ fnop ; ld4s r25, r26 ; tblidxb3 r5, r6 }
+	{ fnop ; ld4u r25, r26 ; ill }
+	{ fnop ; ld4u r25, r26 ; shl1add r5, r6, r7 }
+	{ fnop ; ldnt1u_add r15, r16, 5 }
+	{ fnop ; mnz r15, r16, r17 ; prefetch_l1 r25 }
+	{ fnop ; move r15, r16 ; prefetch_l2 r25 }
+	{ fnop ; movei r15, 5 ; prefetch_l3 r25 }
+	{ fnop ; mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ fnop ; mul_ls_ls r5, r6, r7 ; prefetch_l1 r25 }
+	{ fnop ; mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ fnop ; mula_ls_ls r5, r6, r7 ; ld4u r25, r26 }
+	{ fnop ; mulax r5, r6, r7 ; prefetch r25 }
+	{ fnop ; mz r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ fnop ; nop ; prefetch_l2_fault r25 }
+	{ fnop ; nor r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ fnop ; or r5, r6, r7 ; st1 r25, r26 }
+	{ fnop ; prefetch r25 ; cmovnez r5, r6, r7 }
+	{ fnop ; prefetch r25 ; mula_lu_lu r5, r6, r7 }
+	{ fnop ; prefetch r25 ; shrui r5, r6, 5 }
+	{ fnop ; prefetch_l1 r25 ; cmpleu r15, r16, r17 }
+	{ fnop ; prefetch_l1 r25 ; nor r5, r6, r7 }
+	{ fnop ; prefetch_l1 r25 ; tblidxb2 r5, r6 }
+	{ fnop ; prefetch_l1_fault r25 ; ill }
+	{ fnop ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 }
+	{ fnop ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ fnop ; prefetch_l2 r25 ; mul_hs_hs r5, r6, r7 }
+	{ fnop ; prefetch_l2 r25 ; shrs r15, r16, r17 }
+	{ fnop ; prefetch_l2_fault r25 ; cmples r5, r6, r7 }
+	{ fnop ; prefetch_l2_fault r25 ; nor r15, r16, r17 }
+	{ fnop ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 }
+	{ fnop ; prefetch_l3 r25 ; fsingle_pack1 r5, r6 }
+	{ fnop ; prefetch_l3 r25 ; shl1add r15, r16, r17 }
+	{ fnop ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
+	{ fnop ; prefetch_l3_fault r25 ; movei r5, 5 }
+	{ fnop ; prefetch_l3_fault r25 ; shli r5, r6, 5 }
+	{ fnop ; revbytes r5, r6 ; ld r25, r26 }
+	{ fnop ; rotl r5, r6, r7 ; ld1u r25, r26 }
+	{ fnop ; rotli r5, r6, 5 ; ld2u r25, r26 }
+	{ fnop ; shl r5, r6, r7 ; ld4u r25, r26 }
+	{ fnop ; shl1add r5, r6, r7 ; ld4u r25, r26 }
+	{ fnop ; shl1addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ fnop ; shl2add r5, r6, r7 ; prefetch_l2 r25 }
+	{ fnop ; shl2addx r5, r6, r7 ; prefetch_l3 r25 }
+	{ fnop ; shl3add r5, r6, r7 ; st r25, r26 }
+	{ fnop ; shl3addx r5, r6, r7 ; st2 r25, r26 }
+	{ fnop ; shli r5, r6, 5 }
+	{ fnop ; shrs r5, r6, r7 ; st2 r25, r26 }
+	{ fnop ; shrsi r5, r6, 5 }
+	{ fnop ; shrui r15, r16, 5 ; ld1s r25, r26 }
+	{ fnop ; shruxi r5, r6, 5 }
+	{ fnop ; st r25, r26 ; jalrp r15 }
+	{ fnop ; st r25, r26 ; shl2add r15, r16, r17 }
+	{ fnop ; st1 r25, r26 ; andi r15, r16, 5 }
+	{ fnop ; st1 r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ fnop ; st1 r25, r26 ; shrsi r5, r6, 5 }
+	{ fnop ; st2 r25, r26 ; cmpleu r5, r6, r7 }
+	{ fnop ; st2 r25, r26 ; or r15, r16, r17 }
+	{ fnop ; st2 r25, r26 ; tblidxb3 r5, r6 }
+	{ fnop ; st4 r25, r26 ; ill }
+	{ fnop ; st4 r25, r26 ; shl1add r5, r6, r7 }
+	{ fnop ; stnt4_add r15, r16, 5 }
+	{ fnop ; subx r15, r16, r17 ; ld r25, r26 }
+	{ fnop ; tblidxb0 r5, r6 ; ld r25, r26 }
+	{ fnop ; tblidxb2 r5, r6 ; ld1u r25, r26 }
+	{ fnop ; v1adduc r15, r16, r17 }
+	{ fnop ; v1minu r15, r16, r17 }
+	{ fnop ; v2cmpeqi r5, r6, 5 }
+	{ fnop ; v2packuc r15, r16, r17 }
+	{ fnop ; v4shru r15, r16, r17 }
+	{ fnop ; xor r5, r6, r7 ; st r25, r26 }
+	{ fsingle_add1 r5, r6, r7 ; fetchor4 r15, r16, r17 }
+	{ fsingle_add1 r5, r6, r7 ; ldnt4s r15, r16 }
+	{ fsingle_add1 r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ fsingle_add1 r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+	{ fsingle_add1 r5, r6, r7 ; v2packuc r15, r16, r17 }
+	{ fsingle_addsub2 r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ fsingle_addsub2 r5, r6, r7 ; ld2u_add r15, r16, 5 }
+	{ fsingle_addsub2 r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+	{ fsingle_addsub2 r5, r6, r7 ; stnt2_add r15, r16, 5 }
+	{ fsingle_addsub2 r5, r6, r7 ; v2cmples r15, r16, r17 }
+	{ fsingle_addsub2 r5, r6, r7 ; xori r15, r16, 5 }
+	{ fsingle_mul1 r5, r6, r7 ; ill }
+	{ fsingle_mul1 r5, r6, r7 ; mf }
+	{ fsingle_mul1 r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ fsingle_mul1 r5, r6, r7 ; v1minu r15, r16, r17 }
+	{ fsingle_mul1 r5, r6, r7 ; v2shru r15, r16, r17 }
+	{ fsingle_mul2 r5, r6, r7 ; dblalign6 r15, r16, r17 }
+	{ fsingle_mul2 r5, r6, r7 ; ldna r15, r16 }
+	{ fsingle_mul2 r5, r6, r7 ; prefetch_l3 r15 }
+	{ fsingle_mul2 r5, r6, r7 ; subxsc r15, r16, r17 }
+	{ fsingle_mul2 r5, r6, r7 ; v2cmpne r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; add r15, r16, r17 ; ld4s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; addx r15, r16, r17 ; ld4u r25, r26 }
+	{ fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld4u r25, r26 }
+	{ fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 }
+	{ fsingle_pack1 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1 r25 }
+	{ fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+	{ fsingle_pack1 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+	{ fsingle_pack1 r5, r6 ; fetchor4 r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; ill ; st2 r25, r26 }
+	{ fsingle_pack1 r5, r6 ; jalr r15 ; st1 r25, r26 }
+	{ fsingle_pack1 r5, r6 ; jr r15 ; st4 r25, r26 }
+	{ fsingle_pack1 r5, r6 ; ld r25, r26 ; jalrp r15 }
+	{ fsingle_pack1 r5, r6 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; ld1u r25, r26 ; addi r15, r16, 5 }
+	{ fsingle_pack1 r5, r6 ; ld1u r25, r26 ; shru r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; ld2s r25, r26 ; shl1add r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; ld2u r25, r26 ; move r15, r16 }
+	{ fsingle_pack1 r5, r6 ; ld4s r25, r26 ; fnop }
+	{ fsingle_pack1 r5, r6 ; ld4u r25, r26 ; andi r15, r16, 5 }
+	{ fsingle_pack1 r5, r6 ; ld4u r25, r26 ; xor r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; mfspr r16, 0x5 }
+	{ fsingle_pack1 r5, r6 ; movei r15, 5 ; ld1s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; nop ; ld1s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; or r15, r16, r17 ; ld2s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; prefetch r25 ; mnz r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l1 r25 ; cmples r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 ; add r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l2 r25 ; shl1add r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l2_fault r25 ; movei r15, 5 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l3 r25 ; info 19 }
+	{ fsingle_pack1 r5, r6 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; rotl r15, r16, r17 ; ld r25, r26 }
+	{ fsingle_pack1 r5, r6 ; shl r15, r16, r17 ; ld1u r25, r26 }
+	{ fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; shl3addx r15, r16, r17 ; prefetch r25 }
+	{ fsingle_pack1 r5, r6 ; shrs r15, r16, r17 ; prefetch r25 }
+	{ fsingle_pack1 r5, r6 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ fsingle_pack1 r5, r6 ; st r25, r26 ; cmples r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; st1 r25, r26 ; add r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; st1 r25, r26 ; shrsi r15, r16, 5 }
+	{ fsingle_pack1 r5, r6 ; st2 r25, r26 ; shl r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; st4 r25, r26 ; mnz r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; sub r15, r16, r17 ; ld4s r25, r26 }
+	{ fsingle_pack1 r5, r6 ; v1cmpleu r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; v2mnz r15, r16, r17 }
+	{ fsingle_pack1 r5, r6 ; xor r15, r16, r17 ; st r25, r26 }
+	{ fsingle_pack2 r5, r6, r7 ; finv r15 }
+	{ fsingle_pack2 r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+	{ fsingle_pack2 r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ fsingle_pack2 r5, r6, r7 ; v1cmpne r15, r16, r17 }
+	{ fsingle_pack2 r5, r6, r7 ; v2shl r15, r16, r17 }
+	{ fsingle_sub1 r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ fsingle_sub1 r5, r6, r7 ; ld4s r15, r16 }
+	{ fsingle_sub1 r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ fsingle_sub1 r5, r6, r7 ; stnt4 r15, r16 }
+	{ fsingle_sub1 r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+	{ icoh r15 ; add r5, r6, r7 }
+	{ icoh r15 ; fdouble_mul_flags r5, r6, r7 }
+	{ icoh r15 ; mula_lu_lu r5, r6, r7 }
+	{ icoh r15 ; v1adduc r5, r6, r7 }
+	{ icoh r15 ; v1shrui r5, r6, 5 }
+	{ icoh r15 ; v2shrs r5, r6, r7 }
+	{ ill ; addi r5, r6, 5 ; ld1u r25, r26 }
+	{ ill ; addxi r5, r6, 5 ; ld2s r25, r26 }
+	{ ill ; andi r5, r6, 5 ; ld2s r25, r26 }
+	{ ill ; cmoveqz r5, r6, r7 ; ld1u r25, r26 }
+	{ ill ; cmpeq r5, r6, r7 ; ld2u r25, r26 }
+	{ ill ; cmples r5, r6, r7 ; ld4u r25, r26 }
+	{ ill ; cmplts r5, r6, r7 ; prefetch_l1 r25 }
+	{ ill ; cmpltu r5, r6, r7 ; prefetch_l2 r25 }
+	{ ill ; ctz r5, r6 ; ld1u r25, r26 }
+	{ ill ; fnop ; prefetch_l2_fault r25 }
+	{ ill ; info 19 ; prefetch r25 }
+	{ ill ; ld r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ ill ; ld1s r25, r26 ; and r5, r6, r7 }
+	{ ill ; ld1s r25, r26 ; shl1add r5, r6, r7 }
+	{ ill ; ld1u r25, r26 ; mnz r5, r6, r7 }
+	{ ill ; ld1u r25, r26 ; xor r5, r6, r7 }
+	{ ill ; ld2s r25, r26 ; pcnt r5, r6 }
+	{ ill ; ld2u r25, r26 ; cmpltu r5, r6, r7 }
+	{ ill ; ld2u r25, r26 ; sub r5, r6, r7 }
+	{ ill ; ld4s r25, r26 ; mulax r5, r6, r7 }
+	{ ill ; ld4u r25, r26 ; cmpeq r5, r6, r7 }
+	{ ill ; ld4u r25, r26 ; shl3addx r5, r6, r7 }
+	{ ill ; move r5, r6 ; ld4u r25, r26 }
+	{ ill ; mul_hs_hs r5, r6, r7 ; prefetch r25 }
+	{ ill ; mul_ls_ls r5, r6, r7 ; ld2u r25, r26 }
+	{ ill ; mula_hs_hs r5, r6, r7 ; ld4s r25, r26 }
+	{ ill ; mula_ls_ls r5, r6, r7 ; ld1u r25, r26 }
+	{ ill ; mulax r5, r6, r7 ; ld2s r25, r26 }
+	{ ill ; mz r5, r6, r7 ; ld4s r25, r26 }
+	{ ill ; nor r5, r6, r7 ; prefetch r25 }
+	{ ill ; pcnt r5, r6 ; prefetch_l1 r25 }
+	{ ill ; prefetch r25 ; mula_hu_hu r5, r6, r7 }
+	{ ill ; prefetch_l1 r25 ; clz r5, r6 }
+	{ ill ; prefetch_l1 r25 ; shl2add r5, r6, r7 }
+	{ ill ; prefetch_l1_fault r25 ; movei r5, 5 }
+	{ ill ; prefetch_l2 r25 ; add r5, r6, r7 }
+	{ ill ; prefetch_l2 r25 ; revbytes r5, r6 }
+	{ ill ; prefetch_l2_fault r25 ; ctz r5, r6 }
+	{ ill ; prefetch_l2_fault r25 ; tblidxb0 r5, r6 }
+	{ ill ; prefetch_l3 r25 ; mz r5, r6, r7 }
+	{ ill ; prefetch_l3_fault r25 ; cmples r5, r6, r7 }
+	{ ill ; prefetch_l3_fault r25 ; shrs r5, r6, r7 }
+	{ ill ; revbytes r5, r6 ; prefetch_l1_fault r25 }
+	{ ill ; rotli r5, r6, 5 ; prefetch_l2_fault r25 }
+	{ ill ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+	{ ill ; shl2add r5, r6, r7 ; st r25, r26 }
+	{ ill ; shl3add r5, r6, r7 ; st2 r25, r26 }
+	{ ill ; shli r5, r6, 5 }
+	{ ill ; shrsi r5, r6, 5 }
+	{ ill ; shruxi r5, r6, 5 }
+	{ ill ; st r25, r26 ; pcnt r5, r6 }
+	{ ill ; st1 r25, r26 ; cmpltu r5, r6, r7 }
+	{ ill ; st1 r25, r26 ; sub r5, r6, r7 }
+	{ ill ; st2 r25, r26 ; mulax r5, r6, r7 }
+	{ ill ; st4 r25, r26 ; cmpeq r5, r6, r7 }
+	{ ill ; st4 r25, r26 ; shl3addx r5, r6, r7 }
+	{ ill ; subx r5, r6, r7 ; prefetch r25 }
+	{ ill ; tblidxb1 r5, r6 ; prefetch_l1 r25 }
+	{ ill ; tblidxb3 r5, r6 ; prefetch_l2 r25 }
+	{ ill ; v1multu r5, r6, r7 }
+	{ ill ; v2mz r5, r6, r7 }
+	{ ill ; xor r5, r6, r7 ; prefetch_l3 r25 }
+	{ info 19 ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ info 19 ; addi r5, r6, 5 ; st1 r25, r26 }
+	{ info 19 ; addx r5, r6, r7 ; st1 r25, r26 }
+	{ info 19 ; addxi r5, r6, 5 ; st4 r25, r26 }
+	{ info 19 ; and r5, r6, r7 ; st1 r25, r26 }
+	{ info 19 ; andi r5, r6, 5 ; st4 r25, r26 }
+	{ info 19 ; cmoveqz r5, r6, r7 ; st2 r25, r26 }
+	{ info 19 ; cmpeq r15, r16, r17 }
+	{ info 19 ; cmpeqi r5, r6, 5 ; ld1s r25, r26 }
+	{ info 19 ; cmples r5, r6, r7 ; ld1s r25, r26 }
+	{ info 19 ; cmpleu r5, r6, r7 ; ld2s r25, r26 }
+	{ info 19 ; cmplts r5, r6, r7 ; ld4s r25, r26 }
+	{ info 19 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+	{ info 19 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ info 19 ; cmpne r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ info 19 ; dblalign2 r5, r6, r7 }
+	{ info 19 ; fnop ; prefetch_l3_fault r25 }
+	{ info 19 ; ill ; prefetch_l1 r25 }
+	{ info 19 ; jalr r15 ; prefetch r25 }
+	{ info 19 ; jr r15 ; prefetch_l1_fault r25 }
+	{ info 19 ; ld r25, r26 ; andi r15, r16, 5 }
+	{ info 19 ; ld r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ info 19 ; ld r25, r26 ; shrsi r5, r6, 5 }
+	{ info 19 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
+	{ info 19 ; ld1s r25, r26 ; or r5, r6, r7 }
+	{ info 19 ; ld1s r25, r26 ; xor r15, r16, r17 }
+	{ info 19 ; ld1u r25, r26 ; info 19 }
+	{ info 19 ; ld1u r25, r26 ; shl1addx r15, r16, r17 }
+	{ info 19 ; ld2s r25, r26 ; addxi r5, r6, 5 }
+	{ info 19 ; ld2s r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ info 19 ; ld2s r25, r26 ; shrs r15, r16, r17 }
+	{ info 19 ; ld2u r25, r26 ; cmples r15, r16, r17 }
+	{ info 19 ; ld2u r25, r26 ; nop }
+	{ info 19 ; ld2u r25, r26 ; tblidxb0 r5, r6 }
+	{ info 19 ; ld4s r25, r26 ; ctz r5, r6 }
+	{ info 19 ; ld4s r25, r26 ; shl r15, r16, r17 }
+	{ info 19 ; ld4u r25, r26 ; addi r5, r6, 5 }
+	{ info 19 ; ld4u r25, r26 ; move r15, r16 }
+	{ info 19 ; ld4u r25, r26 ; shl3addx r15, r16, r17 }
+	{ info 19 ; ldnt_add r15, r16, 5 }
+	{ info 19 ; mnz r15, r16, r17 ; st4 r25, r26 }
+	{ info 19 ; move r5, r6 ; ld r25, r26 }
+	{ info 19 ; movei r5, 5 ; ld1u r25, r26 }
+	{ info 19 ; mul_hs_ls r5, r6, r7 }
+	{ info 19 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 }
+	{ info 19 ; mula_hs_hs r5, r6, r7 }
+	{ info 19 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ info 19 ; mulax r5, r6, r7 ; st2 r25, r26 }
+	{ info 19 ; mz r15, r16, r17 }
+	{ info 19 ; nor r15, r16, r17 ; ld1s r25, r26 }
+	{ info 19 ; or r15, r16, r17 ; ld2s r25, r26 }
+	{ info 19 ; pcnt r5, r6 ; ld2s r25, r26 }
+	{ info 19 ; prefetch r25 ; cmplts r15, r16, r17 }
+	{ info 19 ; prefetch r25 ; or r5, r6, r7 }
+	{ info 19 ; prefetch r25 ; xor r15, r16, r17 }
+	{ info 19 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
+	{ info 19 ; prefetch_l1 r25 ; rotli r5, r6, 5 }
+	{ info 19 ; prefetch_l1_fault r25 ; addi r5, r6, 5 }
+	{ info 19 ; prefetch_l1_fault r25 ; move r15, r16 }
+	{ info 19 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ info 19 ; prefetch_l2 r25 ; cmpeq r5, r6, r7 }
+	{ info 19 ; prefetch_l2 r25 ; mulx r5, r6, r7 }
+	{ info 19 ; prefetch_l2 r25 ; sub r5, r6, r7 }
+	{ info 19 ; prefetch_l2_fault r25 ; cmpne r15, r16, r17 }
+	{ info 19 ; prefetch_l2_fault r25 ; rotli r15, r16, 5 }
+	{ info 19 ; prefetch_l3 r25 ; addi r15, r16, 5 }
+	{ info 19 ; prefetch_l3 r25 ; mnz r5, r6, r7 }
+	{ info 19 ; prefetch_l3 r25 ; shl3add r5, r6, r7 }
+	{ info 19 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 }
+	{ info 19 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 }
+	{ info 19 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
+	{ info 19 ; revbytes r5, r6 ; prefetch_l1_fault r25 }
+	{ info 19 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ info 19 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ info 19 ; shl r5, r6, r7 ; st1 r25, r26 }
+	{ info 19 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ info 19 ; shl1addx r5, r6, r7 ; st4 r25, r26 }
+	{ info 19 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+	{ info 19 ; shl3add r15, r16, r17 ; ld1u r25, r26 }
+	{ info 19 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ info 19 ; shli r15, r16, 5 ; ld4u r25, r26 }
+	{ info 19 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ info 19 ; shrsi r15, r16, 5 ; ld4u r25, r26 }
+	{ info 19 ; shru r15, r16, r17 ; prefetch_l1 r25 }
+	{ info 19 ; shrui r15, r16, 5 ; prefetch_l2 r25 }
+	{ info 19 ; st r25, r26 ; addxi r15, r16, 5 }
+	{ info 19 ; st r25, r26 ; movei r5, 5 }
+	{ info 19 ; st r25, r26 ; shli r5, r6, 5 }
+	{ info 19 ; st1 r25, r26 ; cmples r15, r16, r17 }
+	{ info 19 ; st1 r25, r26 ; nop }
+	{ info 19 ; st1 r25, r26 ; tblidxb0 r5, r6 }
+	{ info 19 ; st2 r25, r26 ; ctz r5, r6 }
+	{ info 19 ; st2 r25, r26 ; shl r15, r16, r17 }
+	{ info 19 ; st4 r25, r26 ; addi r5, r6, 5 }
+	{ info 19 ; st4 r25, r26 ; move r15, r16 }
+	{ info 19 ; st4 r25, r26 ; shl3addx r15, r16, r17 }
+	{ info 19 ; sub r15, r16, r17 ; prefetch r25 }
+	{ info 19 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ info 19 ; tblidxb0 r5, r6 ; prefetch_l1_fault r25 }
+	{ info 19 ; tblidxb2 r5, r6 ; prefetch_l2_fault r25 }
+	{ info 19 ; v1cmples r5, r6, r7 }
+	{ info 19 ; v1mz r15, r16, r17 }
+	{ info 19 ; v2cmpltu r15, r16, r17 }
+	{ info 19 ; v2shli r5, r6, 5 }
+	{ info 19 ; xor r15, r16, r17 ; ld1u r25, r26 }
+	{ infol 0x1234 ; addi r15, r16, 5 }
+	{ infol 0x1234 ; cmpne r15, r16, r17 }
+	{ infol 0x1234 ; flushwb }
+	{ infol 0x1234 ; ldnt2s r15, r16 }
+	{ infol 0x1234 ; mula_ls_lu r5, r6, r7 }
+	{ infol 0x1234 ; shl1addx r15, r16, r17 }
+	{ infol 0x1234 ; stnt2 r15, r16 }
+	{ infol 0x1234 ; v1cmpne r5, r6, r7 }
+	{ infol 0x1234 ; v1shru r15, r16, r17 }
+	{ infol 0x1234 ; v2maxs r15, r16, r17 }
+	{ infol 0x1234 ; v2sub r5, r6, r7 }
+	{ inv r15 ; bfextu r5, r6, 5, 7 }
+	{ inv r15 ; fsingle_mul2 r5, r6, r7 }
+	{ inv r15 ; revbytes r5, r6 }
+	{ inv r15 ; v1cmpltui r5, r6, 5 }
+	{ inv r15 ; v2cmples r5, r6, r7 }
+	{ inv r15 ; v4packsc r5, r6, r7 }
+	{ iret ; crc32_32 r5, r6, r7 }
+	{ iret ; mula_hs_hs r5, r6, r7 }
+	{ iret ; sub r5, r6, r7 }
+	{ iret ; v1mulus r5, r6, r7 }
+	{ iret ; v2packl r5, r6, r7 }
+	{ jalr r15 ; add r5, r6, r7 ; prefetch_l3 r25 }
+	{ jalr r15 ; addx r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ jalr r15 ; and r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ jalr r15 ; clz r5, r6 ; prefetch_l3 r25 }
+	{ jalr r15 ; cmovnez r5, r6, r7 ; st r25, r26 }
+	{ jalr r15 ; cmpeqi r5, r6, 5 ; st2 r25, r26 }
+	{ jalr r15 ; cmpleu r5, r6, r7 }
+	{ jalr r15 ; cmpltu r5, r6, r7 ; ld1s r25, r26 }
+	{ jalr r15 ; cmulaf r5, r6, r7 }
+	{ jalr r15 ; fnop ; ld1u r25, r26 }
+	{ jalr r15 ; fsingle_pack2 r5, r6, r7 }
+	{ jalr r15 ; ld r25, r26 ; fnop }
+	{ jalr r15 ; ld r25, r26 ; tblidxb1 r5, r6 }
+	{ jalr r15 ; ld1s r25, r26 ; nop }
+	{ jalr r15 ; ld1u r25, r26 ; cmpleu r5, r6, r7 }
+	{ jalr r15 ; ld1u r25, r26 ; shrsi r5, r6, 5 }
+	{ jalr r15 ; ld2s r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ jalr r15 ; ld2u r25, r26 ; clz r5, r6 }
+	{ jalr r15 ; ld2u r25, r26 ; shl2add r5, r6, r7 }
+	{ jalr r15 ; ld4s r25, r26 ; movei r5, 5 }
+	{ jalr r15 ; ld4u r25, r26 ; add r5, r6, r7 }
+	{ jalr r15 ; ld4u r25, r26 ; revbytes r5, r6 }
+	{ jalr r15 ; mnz r5, r6, r7 ; st2 r25, r26 }
+	{ jalr r15 ; movei r5, 5 }
+	{ jalr r15 ; mul_hu_hu r5, r6, r7 ; st2 r25, r26 }
+	{ jalr r15 ; mul_lu_lu r5, r6, r7 ; st1 r25, r26 }
+	{ jalr r15 ; mula_hu_hu r5, r6, r7 ; st r25, r26 }
+	{ jalr r15 ; mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ jalr r15 ; mulx r5, r6, r7 ; st1 r25, r26 }
+	{ jalr r15 ; nop ; st4 r25, r26 }
+	{ jalr r15 ; ori r5, r6, 5 }
+	{ jalr r15 ; prefetch r25 ; info 19 }
+	{ jalr r15 ; prefetch r25 ; tblidxb3 r5, r6 }
+	{ jalr r15 ; prefetch_l1 r25 ; or r5, r6, r7 }
+	{ jalr r15 ; prefetch_l1_fault r25 ; cmpltsi r5, r6, 5 }
+	{ jalr r15 ; prefetch_l1_fault r25 ; shrui r5, r6, 5 }
+	{ jalr r15 ; prefetch_l2 r25 ; mula_lu_lu r5, r6, r7 }
+	{ jalr r15 ; prefetch_l2_fault r25 ; cmovnez r5, r6, r7 }
+	{ jalr r15 ; prefetch_l2_fault r25 ; shl3add r5, r6, r7 }
+	{ jalr r15 ; prefetch_l3 r25 ; mul_hu_hu r5, r6, r7 }
+	{ jalr r15 ; prefetch_l3_fault r25 ; addx r5, r6, r7 }
+	{ jalr r15 ; prefetch_l3_fault r25 ; rotli r5, r6, 5 }
+	{ jalr r15 ; revbytes r5, r6 ; ld r25, r26 }
+	{ jalr r15 ; rotli r5, r6, 5 ; ld1u r25, r26 }
+	{ jalr r15 ; shl1add r5, r6, r7 ; ld2s r25, r26 }
+	{ jalr r15 ; shl2add r5, r6, r7 ; ld4s r25, r26 }
+	{ jalr r15 ; shl3add r5, r6, r7 ; prefetch r25 }
+	{ jalr r15 ; shli r5, r6, 5 ; prefetch_l1_fault r25 }
+	{ jalr r15 ; shrsi r5, r6, 5 ; prefetch_l1_fault r25 }
+	{ jalr r15 ; shrui r5, r6, 5 ; prefetch_l2_fault r25 }
+	{ jalr r15 ; st r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ jalr r15 ; st1 r25, r26 ; clz r5, r6 }
+	{ jalr r15 ; st1 r25, r26 ; shl2add r5, r6, r7 }
+	{ jalr r15 ; st2 r25, r26 ; movei r5, 5 }
+	{ jalr r15 ; st4 r25, r26 ; add r5, r6, r7 }
+	{ jalr r15 ; st4 r25, r26 ; revbytes r5, r6 }
+	{ jalr r15 ; sub r5, r6, r7 ; st4 r25, r26 }
+	{ jalr r15 ; tblidxb0 r5, r6 }
+	{ jalr r15 ; tblidxb3 r5, r6 ; ld1s r25, r26 }
+	{ jalr r15 ; v1dotpus r5, r6, r7 }
+	{ jalr r15 ; v2int_l r5, r6, r7 }
+	{ jalr r15 ; xor r5, r6, r7 ; ld2s r25, r26 }
+	{ jalrp r15 ; addi r5, r6, 5 ; ld2u r25, r26 }
+	{ jalrp r15 ; addxi r5, r6, 5 ; ld4s r25, r26 }
+	{ jalrp r15 ; andi r5, r6, 5 ; ld4s r25, r26 }
+	{ jalrp r15 ; cmoveqz r5, r6, r7 ; ld2u r25, r26 }
+	{ jalrp r15 ; cmpeq r5, r6, r7 ; ld4u r25, r26 }
+	{ jalrp r15 ; cmples r5, r6, r7 ; prefetch_l1 r25 }
+	{ jalrp r15 ; cmplts r5, r6, r7 ; prefetch_l2 r25 }
+	{ jalrp r15 ; cmpltu r5, r6, r7 ; prefetch_l3 r25 }
+	{ jalrp r15 ; ctz r5, r6 ; ld2u r25, r26 }
+	{ jalrp r15 ; fnop ; prefetch_l3_fault r25 }
+	{ jalrp r15 ; info 19 ; prefetch_l1_fault r25 }
+	{ jalrp r15 ; ld r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ jalrp r15 ; ld1s r25, r26 ; clz r5, r6 }
+	{ jalrp r15 ; ld1s r25, r26 ; shl2add r5, r6, r7 }
+	{ jalrp r15 ; ld1u r25, r26 ; movei r5, 5 }
+	{ jalrp r15 ; ld2s r25, r26 ; add r5, r6, r7 }
+	{ jalrp r15 ; ld2s r25, r26 ; revbytes r5, r6 }
+	{ jalrp r15 ; ld2u r25, r26 ; ctz r5, r6 }
+	{ jalrp r15 ; ld2u r25, r26 ; tblidxb0 r5, r6 }
+	{ jalrp r15 ; ld4s r25, r26 ; mz r5, r6, r7 }
+	{ jalrp r15 ; ld4u r25, r26 ; cmples r5, r6, r7 }
+	{ jalrp r15 ; ld4u r25, r26 ; shrs r5, r6, r7 }
+	{ jalrp r15 ; move r5, r6 ; prefetch_l1 r25 }
+	{ jalrp r15 ; mul_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ jalrp r15 ; mul_ls_ls r5, r6, r7 ; ld4u r25, r26 }
+	{ jalrp r15 ; mula_hs_hs r5, r6, r7 ; prefetch r25 }
+	{ jalrp r15 ; mula_ls_ls r5, r6, r7 ; ld2u r25, r26 }
+	{ jalrp r15 ; mulax r5, r6, r7 ; ld4s r25, r26 }
+	{ jalrp r15 ; mz r5, r6, r7 ; prefetch r25 }
+	{ jalrp r15 ; nor r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ jalrp r15 ; pcnt r5, r6 ; prefetch_l2 r25 }
+	{ jalrp r15 ; prefetch r25 ; mula_lu_lu r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l1 r25 ; cmovnez r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l1 r25 ; shl3add r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l1_fault r25 ; mul_hu_hu r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l2 r25 ; addx r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l2 r25 ; rotli r5, r6, 5 }
+	{ jalrp r15 ; prefetch_l2_fault r25 ; fsingle_pack1 r5, r6 }
+	{ jalrp r15 ; prefetch_l2_fault r25 ; tblidxb2 r5, r6 }
+	{ jalrp r15 ; prefetch_l3 r25 ; nor r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l3_fault r25 ; cmplts r5, r6, r7 }
+	{ jalrp r15 ; prefetch_l3_fault r25 ; shru r5, r6, r7 }
+	{ jalrp r15 ; revbytes r5, r6 ; prefetch_l2_fault r25 }
+	{ jalrp r15 ; rotli r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ jalrp r15 ; shl1add r5, r6, r7 ; st r25, r26 }
+	{ jalrp r15 ; shl2add r5, r6, r7 ; st2 r25, r26 }
+	{ jalrp r15 ; shl3add r5, r6, r7 }
+	{ jalrp r15 ; shlxi r5, r6, 5 }
+	{ jalrp r15 ; shru r5, r6, r7 ; ld1s r25, r26 }
+	{ jalrp r15 ; st r25, r26 ; add r5, r6, r7 }
+	{ jalrp r15 ; st r25, r26 ; revbytes r5, r6 }
+	{ jalrp r15 ; st1 r25, r26 ; ctz r5, r6 }
+	{ jalrp r15 ; st1 r25, r26 ; tblidxb0 r5, r6 }
+	{ jalrp r15 ; st2 r25, r26 ; mz r5, r6, r7 }
+	{ jalrp r15 ; st4 r25, r26 ; cmples r5, r6, r7 }
+	{ jalrp r15 ; st4 r25, r26 ; shrs r5, r6, r7 }
+	{ jalrp r15 ; subx r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ jalrp r15 ; tblidxb1 r5, r6 ; prefetch_l2 r25 }
+	{ jalrp r15 ; tblidxb3 r5, r6 ; prefetch_l3 r25 }
+	{ jalrp r15 ; v1mulus r5, r6, r7 }
+	{ jalrp r15 ; v2packl r5, r6, r7 }
+	{ jalrp r15 ; xor r5, r6, r7 ; st r25, r26 }
+	{ jr r15 ; addi r5, r6, 5 ; st1 r25, r26 }
+	{ jr r15 ; addxi r5, r6, 5 ; st2 r25, r26 }
+	{ jr r15 ; andi r5, r6, 5 ; st2 r25, r26 }
+	{ jr r15 ; cmoveqz r5, r6, r7 ; st1 r25, r26 }
+	{ jr r15 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
+	{ jr r15 ; cmpleu r5, r6, r7 ; ld r25, r26 }
+	{ jr r15 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
+	{ jr r15 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
+	{ jr r15 ; ctz r5, r6 ; st1 r25, r26 }
+	{ jr r15 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 }
+	{ jr r15 ; ld r25, r26 ; add r5, r6, r7 }
+	{ jr r15 ; ld r25, r26 ; revbytes r5, r6 }
+	{ jr r15 ; ld1s r25, r26 ; ctz r5, r6 }
+	{ jr r15 ; ld1s r25, r26 ; tblidxb0 r5, r6 }
+	{ jr r15 ; ld1u r25, r26 ; mz r5, r6, r7 }
+	{ jr r15 ; ld2s r25, r26 ; cmples r5, r6, r7 }
+	{ jr r15 ; ld2s r25, r26 ; shrs r5, r6, r7 }
+	{ jr r15 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ jr r15 ; ld4s r25, r26 ; andi r5, r6, 5 }
+	{ jr r15 ; ld4s r25, r26 ; shl1addx r5, r6, r7 }
+	{ jr r15 ; ld4u r25, r26 ; move r5, r6 }
+	{ jr r15 ; ld4u r25, r26 }
+	{ jr r15 ; movei r5, 5 ; ld r25, r26 }
+	{ jr r15 ; mul_hs_ls r5, r6, r7 }
+	{ jr r15 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 }
+	{ jr r15 ; mula_hs_hs r5, r6, r7 }
+	{ jr r15 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ jr r15 ; mulax r5, r6, r7 ; st2 r25, r26 }
+	{ jr r15 ; mz r5, r6, r7 }
+	{ jr r15 ; or r5, r6, r7 ; ld1s r25, r26 }
+	{ jr r15 ; prefetch r25 ; addx r5, r6, r7 }
+	{ jr r15 ; prefetch r25 ; rotli r5, r6, 5 }
+	{ jr r15 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 }
+	{ jr r15 ; prefetch_l1 r25 ; tblidxb2 r5, r6 }
+	{ jr r15 ; prefetch_l1_fault r25 ; nor r5, r6, r7 }
+	{ jr r15 ; prefetch_l2 r25 ; cmplts r5, r6, r7 }
+	{ jr r15 ; prefetch_l2 r25 ; shru r5, r6, r7 }
+	{ jr r15 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 }
+	{ jr r15 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 }
+	{ jr r15 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 }
+	{ jr r15 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 }
+	{ jr r15 ; revbits r5, r6 ; ld1s r25, r26 }
+	{ jr r15 ; rotl r5, r6, r7 ; ld2s r25, r26 }
+	{ jr r15 ; shl r5, r6, r7 ; ld4s r25, r26 }
+	{ jr r15 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
+	{ jr r15 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ jr r15 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
+	{ jr r15 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
+	{ jr r15 ; shru r5, r6, r7 ; prefetch_l3 r25 }
+	{ jr r15 ; st r25, r26 ; cmples r5, r6, r7 }
+	{ jr r15 ; st r25, r26 ; shrs r5, r6, r7 }
+	{ jr r15 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ jr r15 ; st2 r25, r26 ; andi r5, r6, 5 }
+	{ jr r15 ; st2 r25, r26 ; shl1addx r5, r6, r7 }
+	{ jr r15 ; st4 r25, r26 ; move r5, r6 }
+	{ jr r15 ; st4 r25, r26 }
+	{ jr r15 ; tblidxb0 r5, r6 ; ld r25, r26 }
+	{ jr r15 ; tblidxb2 r5, r6 ; ld1u r25, r26 }
+	{ jr r15 ; v1avgu r5, r6, r7 }
+	{ jr r15 ; v1subuc r5, r6, r7 }
+	{ jr r15 ; v2shru r5, r6, r7 }
+	{ jrp r15 ; add r5, r6, r7 ; ld4s r25, r26 }
+	{ jrp r15 ; addx r5, r6, r7 ; ld4u r25, r26 }
+	{ jrp r15 ; and r5, r6, r7 ; ld4u r25, r26 }
+	{ jrp r15 ; clz r5, r6 ; ld4s r25, r26 }
+	{ jrp r15 ; cmovnez r5, r6, r7 ; prefetch r25 }
+	{ jrp r15 ; cmpeqi r5, r6, 5 ; prefetch_l1_fault r25 }
+	{ jrp r15 ; cmpleu r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ jrp r15 ; cmpltsi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ jrp r15 ; cmpne r5, r6, r7 ; st r25, r26 }
+	{ jrp r15 ; fdouble_pack1 r5, r6, r7 }
+	{ jrp r15 ; fsingle_pack1 r5, r6 ; prefetch_l3 r25 }
+	{ jrp r15 ; ld r25, r26 ; cmples r5, r6, r7 }
+	{ jrp r15 ; ld r25, r26 ; shrs r5, r6, r7 }
+	{ jrp r15 ; ld1s r25, r26 ; mula_hs_hs r5, r6, r7 }
+	{ jrp r15 ; ld1u r25, r26 ; andi r5, r6, 5 }
+	{ jrp r15 ; ld1u r25, r26 ; shl1addx r5, r6, r7 }
+	{ jrp r15 ; ld2s r25, r26 ; move r5, r6 }
+	{ jrp r15 ; ld2s r25, r26 }
+	{ jrp r15 ; ld2u r25, r26 ; revbits r5, r6 }
+	{ jrp r15 ; ld4s r25, r26 ; cmpne r5, r6, r7 }
+	{ jrp r15 ; ld4s r25, r26 ; subx r5, r6, r7 }
+	{ jrp r15 ; ld4u r25, r26 ; mulx r5, r6, r7 }
+	{ jrp r15 ; mnz r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ jrp r15 ; movei r5, 5 ; prefetch_l2_fault r25 }
+	{ jrp r15 ; mul_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ jrp r15 ; mul_lu_lu r5, r6, r7 ; prefetch_l1 r25 }
+	{ jrp r15 ; mula_hu_hu r5, r6, r7 ; prefetch r25 }
+	{ jrp r15 ; mula_lu_lu r5, r6, r7 ; ld4u r25, r26 }
+	{ jrp r15 ; mulx r5, r6, r7 ; prefetch_l1 r25 }
+	{ jrp r15 ; nop ; prefetch_l2 r25 }
+	{ jrp r15 ; or r5, r6, r7 ; prefetch_l3 r25 }
+	{ jrp r15 ; prefetch r25 ; cmplts r5, r6, r7 }
+	{ jrp r15 ; prefetch r25 ; shru r5, r6, r7 }
+	{ jrp r15 ; prefetch_l1 r25 ; mula_ls_ls r5, r6, r7 }
+	{ jrp r15 ; prefetch_l1_fault r25 ; cmoveqz r5, r6, r7 }
+	{ jrp r15 ; prefetch_l1_fault r25 ; shl2addx r5, r6, r7 }
+	{ jrp r15 ; prefetch_l2 r25 ; mul_hs_hs r5, r6, r7 }
+	{ jrp r15 ; prefetch_l2_fault r25 ; addi r5, r6, 5 }
+	{ jrp r15 ; prefetch_l2_fault r25 ; rotl r5, r6, r7 }
+	{ jrp r15 ; prefetch_l3 r25 ; fnop }
+	{ jrp r15 ; prefetch_l3 r25 ; tblidxb1 r5, r6 }
+	{ jrp r15 ; prefetch_l3_fault r25 ; nop }
+	{ jrp r15 ; revbits r5, r6 ; prefetch_l3 r25 }
+	{ jrp r15 ; rotl r5, r6, r7 ; st r25, r26 }
+	{ jrp r15 ; shl r5, r6, r7 ; st2 r25, r26 }
+	{ jrp r15 ; shl1addx r5, r6, r7 ; st4 r25, r26 }
+	{ jrp r15 ; shl3add r5, r6, r7 ; ld r25, r26 }
+	{ jrp r15 ; shli r5, r6, 5 ; ld1u r25, r26 }
+	{ jrp r15 ; shrsi r5, r6, 5 ; ld1u r25, r26 }
+	{ jrp r15 ; shrui r5, r6, 5 ; ld2u r25, r26 }
+	{ jrp r15 ; st r25, r26 ; move r5, r6 }
+	{ jrp r15 ; st r25, r26 }
+	{ jrp r15 ; st1 r25, r26 ; revbits r5, r6 }
+	{ jrp r15 ; st2 r25, r26 ; cmpne r5, r6, r7 }
+	{ jrp r15 ; st2 r25, r26 ; subx r5, r6, r7 }
+	{ jrp r15 ; st4 r25, r26 ; mulx r5, r6, r7 }
+	{ jrp r15 ; sub r5, r6, r7 ; prefetch_l2 r25 }
+	{ jrp r15 ; tblidxb0 r5, r6 ; prefetch_l2_fault r25 }
+	{ jrp r15 ; tblidxb2 r5, r6 ; prefetch_l3_fault r25 }
+	{ jrp r15 ; v1ddotpua r5, r6, r7 }
+	{ jrp r15 ; v2cmpltsi r5, r6, 5 }
+	{ jrp r15 ; v4shrs r5, r6, r7 }
+	{ ld r15, r16 ; cmpeqi r5, r6, 5 }
+	{ ld r15, r16 ; mm r5, r6, 5, 7 }
+	{ ld r15, r16 ; shl1addx r5, r6, r7 }
+	{ ld r15, r16 ; v1dotp r5, r6, r7 }
+	{ ld r15, r16 ; v2cmpne r5, r6, r7 }
+	{ ld r15, r16 ; v4subsc r5, r6, r7 }
+	{ ld r25, r26 ; add r15, r16, r17 ; or r5, r6, r7 }
+	{ ld r25, r26 ; add r5, r6, r7 ; fnop }
+	{ ld r25, r26 ; addi r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ ld r25, r26 ; addi r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ ld r25, r26 ; addi r5, r6, 5 ; movei r15, 5 }
+	{ ld r25, r26 ; addx r15, r16, r17 ; ctz r5, r6 }
+	{ ld r25, r26 ; addx r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld r25, r26 ; addx r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld r25, r26 ; addxi r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ ld r25, r26 ; addxi r5, r6, 5 ; and r15, r16, r17 }
+	{ ld r25, r26 ; addxi r5, r6, 5 ; subx r15, r16, r17 }
+	{ ld r25, r26 ; and r15, r16, r17 ; or r5, r6, r7 }
+	{ ld r25, r26 ; and r5, r6, r7 ; fnop }
+	{ ld r25, r26 ; andi r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ ld r25, r26 ; andi r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ ld r25, r26 ; andi r5, r6, 5 ; movei r15, 5 }
+	{ ld r25, r26 ; clz r5, r6 ; jalr r15 }
+	{ ld r25, r26 ; cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ ld r25, r26 ; cmovnez r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld r25, r26 ; cmovnez r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld r25, r26 ; cmpeq r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld r25, r26 ; cmpeq r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld r25, r26 ; cmpeqi r15, r16, 5 ; clz r5, r6 }
+	{ ld r25, r26 ; cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ ld r25, r26 ; cmpeqi r5, r6, 5 ; move r15, r16 }
+	{ ld r25, r26 ; cmples r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld r25, r26 ; cmples r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld r25, r26 ; cmples r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld r25, r26 ; cmpleu r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld r25, r26 ; cmpleu r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld r25, r26 ; cmpleu r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld r25, r26 ; cmplts r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld r25, r26 ; cmplts r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld r25, r26 ; cmpltsi r15, r16, 5 ; clz r5, r6 }
+	{ ld r25, r26 ; cmpltsi r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ ld r25, r26 ; cmpltsi r5, r6, 5 ; move r15, r16 }
+	{ ld r25, r26 ; cmpltu r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld r25, r26 ; cmpltu r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld r25, r26 ; cmpltu r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld r25, r26 ; cmpne r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld r25, r26 ; cmpne r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld r25, r26 ; cmpne r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld r25, r26 ; ctz r5, r6 ; shl3add r15, r16, r17 }
+	{ ld r25, r26 ; fnop ; cmpne r15, r16, r17 }
+	{ ld r25, r26 ; fnop ; rotli r15, r16, 5 }
+	{ ld r25, r26 ; fsingle_pack1 r5, r6 ; addxi r15, r16, 5 }
+	{ ld r25, r26 ; fsingle_pack1 r5, r6 ; sub r15, r16, r17 }
+	{ ld r25, r26 ; ill ; nor r5, r6, r7 }
+	{ ld r25, r26 ; info 19 ; cmoveqz r5, r6, r7 }
+	{ ld r25, r26 ; info 19 ; mula_ls_ls r5, r6, r7 }
+	{ ld r25, r26 ; info 19 ; shrui r15, r16, 5 }
+	{ ld r25, r26 ; jalr r15 ; mul_lu_lu r5, r6, r7 }
+	{ ld r25, r26 ; jalrp r15 ; and r5, r6, r7 }
+	{ ld r25, r26 ; jalrp r15 ; shl1add r5, r6, r7 }
+	{ ld r25, r26 ; jr r15 ; mnz r5, r6, r7 }
+	{ ld r25, r26 ; jr r15 ; xor r5, r6, r7 }
+	{ ld r25, r26 ; jrp r15 ; pcnt r5, r6 }
+	{ ld r25, r26 ; lnk r15 ; cmpltu r5, r6, r7 }
+	{ ld r25, r26 ; lnk r15 ; sub r5, r6, r7 }
+	{ ld r25, r26 ; mnz r15, r16, r17 ; mulax r5, r6, r7 }
+	{ ld r25, r26 ; mnz r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld r25, r26 ; move r15, r16 ; addx r5, r6, r7 }
+	{ ld r25, r26 ; move r15, r16 ; rotli r5, r6, 5 }
+	{ ld r25, r26 ; move r5, r6 ; jr r15 }
+	{ ld r25, r26 ; movei r15, 5 ; cmpleu r5, r6, r7 }
+	{ ld r25, r26 ; movei r15, 5 ; shrsi r5, r6, 5 }
+	{ ld r25, r26 ; movei r5, 5 ; rotl r15, r16, r17 }
+	{ ld r25, r26 ; mul_hs_hs r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld r25, r26 ; mul_hu_hu r5, r6, r7 ; ill }
+	{ ld r25, r26 ; mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 }
+	{ ld r25, r26 ; mul_lu_lu r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld r25, r26 ; mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld r25, r26 ; mula_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld r25, r26 ; mula_hu_hu r5, r6, r7 ; nor r15, r16, r17 }
+	{ ld r25, r26 ; mula_ls_ls r5, r6, r7 ; jrp r15 }
+	{ ld r25, r26 ; mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld r25, r26 ; mulax r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ ld r25, r26 ; mulax r5, r6, r7 }
+	{ ld r25, r26 ; mulx r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld r25, r26 ; mz r15, r16, r17 ; mulax r5, r6, r7 }
+	{ ld r25, r26 ; mz r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld r25, r26 ; nop ; addi r15, r16, 5 }
+	{ ld r25, r26 ; nop ; mnz r5, r6, r7 }
+	{ ld r25, r26 ; nop ; shl3add r5, r6, r7 }
+	{ ld r25, r26 ; nor r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld r25, r26 ; nor r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld r25, r26 ; nor r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld r25, r26 ; or r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld r25, r26 ; or r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld r25, r26 ; or r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld r25, r26 ; pcnt r5, r6 ; shl3add r15, r16, r17 }
+	{ ld r25, r26 ; revbits r5, r6 ; rotl r15, r16, r17 }
+	{ ld r25, r26 ; revbytes r5, r6 ; mnz r15, r16, r17 }
+	{ ld r25, r26 ; rotl r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld r25, r26 ; rotl r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld r25, r26 ; rotl r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld r25, r26 ; rotli r15, r16, 5 ; mul_hu_hu r5, r6, r7 }
+	{ ld r25, r26 ; rotli r5, r6, 5 ; addx r15, r16, r17 }
+	{ ld r25, r26 ; rotli r5, r6, 5 ; shrui r15, r16, 5 }
+	{ ld r25, r26 ; shl r15, r16, r17 ; nop }
+	{ ld r25, r26 ; shl r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ ld r25, r26 ; shl1add r15, r16, r17 ; andi r5, r6, 5 }
+	{ ld r25, r26 ; shl1add r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ ld r25, r26 ; shl1add r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld r25, r26 ; shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld r25, r26 ; shl1addx r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld r25, r26 ; shl1addx r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld r25, r26 ; shl2add r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ ld r25, r26 ; shl2add r5, r6, r7 ; addx r15, r16, r17 }
+	{ ld r25, r26 ; shl2add r5, r6, r7 ; shrui r15, r16, 5 }
+	{ ld r25, r26 ; shl2addx r15, r16, r17 ; nop }
+	{ ld r25, r26 ; shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ ld r25, r26 ; shl3add r15, r16, r17 ; andi r5, r6, 5 }
+	{ ld r25, r26 ; shl3add r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ ld r25, r26 ; shl3add r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld r25, r26 ; shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld r25, r26 ; shl3addx r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld r25, r26 ; shl3addx r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld r25, r26 ; shli r15, r16, 5 ; mul_hu_hu r5, r6, r7 }
+	{ ld r25, r26 ; shli r5, r6, 5 ; addx r15, r16, r17 }
+	{ ld r25, r26 ; shli r5, r6, 5 ; shrui r15, r16, 5 }
+	{ ld r25, r26 ; shrs r15, r16, r17 ; nop }
+	{ ld r25, r26 ; shrs r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ ld r25, r26 ; shrsi r15, r16, 5 ; andi r5, r6, 5 }
+	{ ld r25, r26 ; shrsi r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ ld r25, r26 ; shrsi r5, r6, 5 ; mnz r15, r16, r17 }
+	{ ld r25, r26 ; shru r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld r25, r26 ; shru r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld r25, r26 ; shru r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld r25, r26 ; shrui r15, r16, 5 ; mul_hu_hu r5, r6, r7 }
+	{ ld r25, r26 ; shrui r5, r6, 5 ; addx r15, r16, r17 }
+	{ ld r25, r26 ; shrui r5, r6, 5 ; shrui r15, r16, 5 }
+	{ ld r25, r26 ; sub r15, r16, r17 ; nop }
+	{ ld r25, r26 ; sub r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ ld r25, r26 ; subx r15, r16, r17 ; andi r5, r6, 5 }
+	{ ld r25, r26 ; subx r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ ld r25, r26 ; subx r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld r25, r26 ; tblidxb0 r5, r6 ; ill }
+	{ ld r25, r26 ; tblidxb1 r5, r6 ; cmples r15, r16, r17 }
+	{ ld r25, r26 ; tblidxb2 r5, r6 ; addi r15, r16, 5 }
+	{ ld r25, r26 ; tblidxb2 r5, r6 ; shru r15, r16, r17 }
+	{ ld r25, r26 ; tblidxb3 r5, r6 ; shl2add r15, r16, r17 }
+	{ ld r25, r26 ; xor r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ ld r25, r26 ; xor r5, r6, r7 ; and r15, r16, r17 }
+	{ ld r25, r26 ; xor r5, r6, r7 ; subx r15, r16, r17 }
+	{ ld1s r15, r16 ; dblalign6 r5, r6, r7 }
+	{ ld1s r15, r16 ; mula_hu_lu r5, r6, r7 }
+	{ ld1s r15, r16 ; tblidxb3 r5, r6 }
+	{ ld1s r15, r16 ; v1shrs r5, r6, r7 }
+	{ ld1s r15, r16 ; v2shl r5, r6, r7 }
+	{ ld1s r25, r26 ; add r15, r16, r17 ; fnop }
+	{ ld1s r25, r26 ; add r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld1s r25, r26 ; add r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld1s r25, r26 ; addi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ ld1s r25, r26 ; addi r5, r6, 5 ; andi r15, r16, 5 }
+	{ ld1s r25, r26 ; addi r5, r6, 5 ; xor r15, r16, r17 }
+	{ ld1s r25, r26 ; addx r15, r16, r17 ; pcnt r5, r6 }
+	{ ld1s r25, r26 ; addx r5, r6, r7 ; ill }
+	{ ld1s r25, r26 ; addxi r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ ld1s r25, r26 ; addxi r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ ld1s r25, r26 ; addxi r5, r6, 5 ; mz r15, r16, r17 }
+	{ ld1s r25, r26 ; and r15, r16, r17 ; fnop }
+	{ ld1s r25, r26 ; and r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld1s r25, r26 ; and r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld1s r25, r26 ; andi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ ld1s r25, r26 ; andi r5, r6, 5 ; andi r15, r16, 5 }
+	{ ld1s r25, r26 ; andi r5, r6, 5 ; xor r15, r16, r17 }
+	{ ld1s r25, r26 ; clz r5, r6 ; shli r15, r16, 5 }
+	{ ld1s r25, r26 ; cmoveqz r5, r6, r7 ; shl r15, r16, r17 }
+	{ ld1s r25, r26 ; cmovnez r5, r6, r7 ; movei r15, 5 }
+	{ ld1s r25, r26 ; cmpeq r15, r16, r17 ; ctz r5, r6 }
+	{ ld1s r25, r26 ; cmpeq r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld1s r25, r26 ; cmpeq r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld1s r25, r26 ; cmpeqi r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpeqi r5, r6, 5 ; and r15, r16, r17 }
+	{ ld1s r25, r26 ; cmpeqi r5, r6, 5 ; subx r15, r16, r17 }
+	{ ld1s r25, r26 ; cmples r15, r16, r17 ; or r5, r6, r7 }
+	{ ld1s r25, r26 ; cmples r5, r6, r7 ; fnop }
+	{ ld1s r25, r26 ; cmpleu r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpleu r5, r6, r7 ; movei r15, 5 }
+	{ ld1s r25, r26 ; cmplts r15, r16, r17 ; ctz r5, r6 }
+	{ ld1s r25, r26 ; cmplts r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld1s r25, r26 ; cmplts r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld1s r25, r26 ; cmpltsi r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpltsi r5, r6, 5 ; and r15, r16, r17 }
+	{ ld1s r25, r26 ; cmpltsi r5, r6, 5 ; subx r15, r16, r17 }
+	{ ld1s r25, r26 ; cmpltu r15, r16, r17 ; or r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpltu r5, r6, r7 ; fnop }
+	{ ld1s r25, r26 ; cmpne r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpne r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ ld1s r25, r26 ; cmpne r5, r6, r7 ; movei r15, 5 }
+	{ ld1s r25, r26 ; ctz r5, r6 ; jalr r15 }
+	{ ld1s r25, r26 ; fnop ; andi r15, r16, 5 }
+	{ ld1s r25, r26 ; fnop ; mul_lu_lu r5, r6, r7 }
+	{ ld1s r25, r26 ; fnop ; shrsi r5, r6, 5 }
+	{ ld1s r25, r26 ; fsingle_pack1 r5, r6 ; movei r15, 5 }
+	{ ld1s r25, r26 ; ill ; ctz r5, r6 }
+	{ ld1s r25, r26 ; ill ; tblidxb0 r5, r6 }
+	{ ld1s r25, r26 ; info 19 ; ill }
+	{ ld1s r25, r26 ; info 19 ; shl1add r5, r6, r7 }
+	{ ld1s r25, r26 ; jalr r15 ; cmovnez r5, r6, r7 }
+	{ ld1s r25, r26 ; jalr r15 ; shl3add r5, r6, r7 }
+	{ ld1s r25, r26 ; jalrp r15 ; mul_hu_hu r5, r6, r7 }
+	{ ld1s r25, r26 ; jr r15 ; addx r5, r6, r7 }
+	{ ld1s r25, r26 ; jr r15 ; rotli r5, r6, 5 }
+	{ ld1s r25, r26 ; jrp r15 ; fsingle_pack1 r5, r6 }
+	{ ld1s r25, r26 ; jrp r15 ; tblidxb2 r5, r6 }
+	{ ld1s r25, r26 ; lnk r15 ; nor r5, r6, r7 }
+	{ ld1s r25, r26 ; mnz r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ ld1s r25, r26 ; mnz r15, r16, r17 ; shru r5, r6, r7 }
+	{ ld1s r25, r26 ; mnz r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld1s r25, r26 ; move r15, r16 ; movei r5, 5 }
+	{ ld1s r25, r26 ; move r5, r6 ; add r15, r16, r17 }
+	{ ld1s r25, r26 ; move r5, r6 ; shrsi r15, r16, 5 }
+	{ ld1s r25, r26 ; movei r15, 5 ; mulx r5, r6, r7 }
+	{ ld1s r25, r26 ; movei r5, 5 ; cmplts r15, r16, r17 }
+	{ ld1s r25, r26 ; mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld1s r25, r26 ; mul_hs_hs r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld1s r25, r26 ; mul_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ ld1s r25, r26 ; mul_ls_ls r5, r6, r7 ; rotl r15, r16, r17 }
+	{ ld1s r25, r26 ; mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld1s r25, r26 ; mula_hs_hs r5, r6, r7 ; ill }
+	{ ld1s r25, r26 ; mula_hu_hu r5, r6, r7 ; cmples r15, r16, r17 }
+	{ ld1s r25, r26 ; mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld1s r25, r26 ; mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld1s r25, r26 ; mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld1s r25, r26 ; mulax r5, r6, r7 ; nor r15, r16, r17 }
+	{ ld1s r25, r26 ; mulx r5, r6, r7 ; jrp r15 }
+	{ ld1s r25, r26 ; mz r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ ld1s r25, r26 ; mz r15, r16, r17 ; shru r5, r6, r7 }
+	{ ld1s r25, r26 ; mz r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld1s r25, r26 ; nop ; cmplts r15, r16, r17 }
+	{ ld1s r25, r26 ; nop ; or r5, r6, r7 }
+	{ ld1s r25, r26 ; nop ; xor r15, r16, r17 }
+	{ ld1s r25, r26 ; nor r15, r16, r17 ; or r5, r6, r7 }
+	{ ld1s r25, r26 ; nor r5, r6, r7 ; fnop }
+	{ ld1s r25, r26 ; or r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ ld1s r25, r26 ; or r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ ld1s r25, r26 ; or r5, r6, r7 ; movei r15, 5 }
+	{ ld1s r25, r26 ; pcnt r5, r6 ; jalr r15 }
+	{ ld1s r25, r26 ; revbits r5, r6 ; cmplts r15, r16, r17 }
+	{ ld1s r25, r26 ; revbytes r5, r6 ; addxi r15, r16, 5 }
+	{ ld1s r25, r26 ; revbytes r5, r6 ; sub r15, r16, r17 }
+	{ ld1s r25, r26 ; rotl r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld1s r25, r26 ; rotl r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld1s r25, r26 ; rotli r15, r16, 5 ; clz r5, r6 }
+	{ ld1s r25, r26 ; rotli r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ ld1s r25, r26 ; rotli r5, r6, 5 ; move r15, r16 }
+	{ ld1s r25, r26 ; shl r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld1s r25, r26 ; shl r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld1s r25, r26 ; shl r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld1s r25, r26 ; shl1add r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld1s r25, r26 ; shl1add r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld1s r25, r26 ; shl1add r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld1s r25, r26 ; shl1addx r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld1s r25, r26 ; shl1addx r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld1s r25, r26 ; shl2add r15, r16, r17 ; clz r5, r6 }
+	{ ld1s r25, r26 ; shl2add r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ ld1s r25, r26 ; shl2add r5, r6, r7 ; move r15, r16 }
+	{ ld1s r25, r26 ; shl2addx r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld1s r25, r26 ; shl2addx r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld1s r25, r26 ; shl2addx r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld1s r25, r26 ; shl3add r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld1s r25, r26 ; shl3add r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld1s r25, r26 ; shl3add r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld1s r25, r26 ; shl3addx r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld1s r25, r26 ; shl3addx r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld1s r25, r26 ; shli r15, r16, 5 ; clz r5, r6 }
+	{ ld1s r25, r26 ; shli r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ ld1s r25, r26 ; shli r5, r6, 5 ; move r15, r16 }
+	{ ld1s r25, r26 ; shrs r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld1s r25, r26 ; shrs r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld1s r25, r26 ; shrs r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld1s r25, r26 ; shrsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ ld1s r25, r26 ; shrsi r5, r6, 5 ; addxi r15, r16, 5 }
+	{ ld1s r25, r26 ; shrsi r5, r6, 5 ; sub r15, r16, r17 }
+	{ ld1s r25, r26 ; shru r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld1s r25, r26 ; shru r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld1s r25, r26 ; shrui r15, r16, 5 ; clz r5, r6 }
+	{ ld1s r25, r26 ; shrui r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ ld1s r25, r26 ; shrui r5, r6, 5 ; move r15, r16 }
+	{ ld1s r25, r26 ; sub r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld1s r25, r26 ; sub r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld1s r25, r26 ; sub r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld1s r25, r26 ; subx r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld1s r25, r26 ; subx r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld1s r25, r26 ; subx r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld1s r25, r26 ; tblidxb0 r5, r6 ; shl3add r15, r16, r17 }
+	{ ld1s r25, r26 ; tblidxb1 r5, r6 ; rotl r15, r16, r17 }
+	{ ld1s r25, r26 ; tblidxb2 r5, r6 ; mnz r15, r16, r17 }
+	{ ld1s r25, r26 ; tblidxb3 r5, r6 ; ill }
+	{ ld1s r25, r26 ; xor r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ ld1s r25, r26 ; xor r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ ld1s r25, r26 ; xor r5, r6, r7 ; mz r15, r16, r17 }
+	{ ld1s_add r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ ld1s_add r15, r16, 5 ; move r5, r6 }
+	{ ld1s_add r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ ld1s_add r15, r16, 5 ; v1dotpu r5, r6, r7 }
+	{ ld1s_add r15, r16, 5 ; v2dotpa r5, r6, r7 }
+	{ ld1s_add r15, r16, 5 ; xori r5, r6, 5 }
+	{ ld1u r15, r16 ; fdouble_addsub r5, r6, r7 }
+	{ ld1u r15, r16 ; mula_ls_lu r5, r6, r7 }
+	{ ld1u r15, r16 ; v1addi r5, r6, 5 }
+	{ ld1u r15, r16 ; v1shru r5, r6, r7 }
+	{ ld1u r15, r16 ; v2shlsc r5, r6, r7 }
+	{ ld1u r25, r26 ; add r15, r16, r17 ; info 19 }
+	{ ld1u r25, r26 ; add r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ ld1u r25, r26 ; add r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld1u r25, r26 ; addi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ ld1u r25, r26 ; addi r5, r6, 5 ; cmpeqi r15, r16, 5 }
+	{ ld1u r25, r26 ; addx r15, r16, r17 ; add r5, r6, r7 }
+	{ ld1u r25, r26 ; addx r15, r16, r17 ; revbytes r5, r6 }
+	{ ld1u r25, r26 ; addx r5, r6, r7 ; jalr r15 }
+	{ ld1u r25, r26 ; addxi r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ ld1u r25, r26 ; addxi r15, r16, 5 ; shli r5, r6, 5 }
+	{ ld1u r25, r26 ; addxi r5, r6, 5 ; nor r15, r16, r17 }
+	{ ld1u r25, r26 ; and r15, r16, r17 ; info 19 }
+	{ ld1u r25, r26 ; and r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ ld1u r25, r26 ; and r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld1u r25, r26 ; andi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ ld1u r25, r26 ; andi r5, r6, 5 ; cmpeqi r15, r16, 5 }
+	{ ld1u r25, r26 ; clz r5, r6 ; add r15, r16, r17 }
+	{ ld1u r25, r26 ; clz r5, r6 ; shrsi r15, r16, 5 }
+	{ ld1u r25, r26 ; cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld1u r25, r26 ; cmovnez r5, r6, r7 ; nop }
+	{ ld1u r25, r26 ; cmpeq r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ ld1u r25, r26 ; cmpeq r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ ld1u r25, r26 ; cmpeq r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ ld1u r25, r26 ; cmpeqi r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ ld1u r25, r26 ; cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 }
+	{ ld1u r25, r26 ; cmpeqi r5, r6, 5 }
+	{ ld1u r25, r26 ; cmples r15, r16, r17 ; revbits r5, r6 }
+	{ ld1u r25, r26 ; cmples r5, r6, r7 ; info 19 }
+	{ ld1u r25, r26 ; cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ ld1u r25, r26 ; cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ ld1u r25, r26 ; cmpleu r5, r6, r7 ; nop }
+	{ ld1u r25, r26 ; cmplts r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ ld1u r25, r26 ; cmplts r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ ld1u r25, r26 ; cmplts r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ ld1u r25, r26 ; cmpltsi r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ ld1u r25, r26 ; cmpltsi r5, r6, 5 ; cmpeq r15, r16, r17 }
+	{ ld1u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ ld1u r25, r26 ; cmpltu r15, r16, r17 ; revbits r5, r6 }
+	{ ld1u r25, r26 ; cmpltu r5, r6, r7 ; info 19 }
+	{ ld1u r25, r26 ; cmpne r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ ld1u r25, r26 ; cmpne r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ ld1u r25, r26 ; cmpne r5, r6, r7 ; nop }
+	{ ld1u r25, r26 ; ctz r5, r6 ; jr r15 }
+	{ ld1u r25, r26 ; fnop ; clz r5, r6 }
+	{ ld1u r25, r26 ; fnop ; mula_hu_hu r5, r6, r7 }
+	{ ld1u r25, r26 ; fnop ; shru r5, r6, r7 }
+	{ ld1u r25, r26 ; fsingle_pack1 r5, r6 ; nop }
+	{ ld1u r25, r26 ; ill ; fsingle_pack1 r5, r6 }
+	{ ld1u r25, r26 ; ill ; tblidxb2 r5, r6 }
+	{ ld1u r25, r26 ; info 19 ; jalr r15 }
+	{ ld1u r25, r26 ; info 19 ; shl1addx r5, r6, r7 }
+	{ ld1u r25, r26 ; jalr r15 ; cmpeqi r5, r6, 5 }
+	{ ld1u r25, r26 ; jalr r15 ; shli r5, r6, 5 }
+	{ ld1u r25, r26 ; jalrp r15 ; mul_lu_lu r5, r6, r7 }
+	{ ld1u r25, r26 ; jr r15 ; and r5, r6, r7 }
+	{ ld1u r25, r26 ; jr r15 ; shl1add r5, r6, r7 }
+	{ ld1u r25, r26 ; jrp r15 ; mnz r5, r6, r7 }
+	{ ld1u r25, r26 ; jrp r15 ; xor r5, r6, r7 }
+	{ ld1u r25, r26 ; lnk r15 ; pcnt r5, r6 }
+	{ ld1u r25, r26 ; mnz r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld1u r25, r26 ; mnz r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld1u r25, r26 ; mnz r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld1u r25, r26 ; move r15, r16 ; mul_hu_hu r5, r6, r7 }
+	{ ld1u r25, r26 ; move r5, r6 ; addx r15, r16, r17 }
+	{ ld1u r25, r26 ; move r5, r6 ; shrui r15, r16, 5 }
+	{ ld1u r25, r26 ; movei r15, 5 ; nop }
+	{ ld1u r25, r26 ; movei r5, 5 ; cmpltu r15, r16, r17 }
+	{ ld1u r25, r26 ; mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld1u r25, r26 ; mul_hs_hs r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld1u r25, r26 ; mul_hu_hu r5, r6, r7 ; shli r15, r16, 5 }
+	{ ld1u r25, r26 ; mul_ls_ls r5, r6, r7 ; shl r15, r16, r17 }
+	{ ld1u r25, r26 ; mul_lu_lu r5, r6, r7 ; movei r15, 5 }
+	{ ld1u r25, r26 ; mula_hs_hs r5, r6, r7 ; jalr r15 }
+	{ ld1u r25, r26 ; mula_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ ld1u r25, r26 ; mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld1u r25, r26 ; mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld1u r25, r26 ; mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ ld1u r25, r26 ; mulax r5, r6, r7 ; rotl r15, r16, r17 }
+	{ ld1u r25, r26 ; mulx r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld1u r25, r26 ; mz r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld1u r25, r26 ; mz r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld1u r25, r26 ; mz r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld1u r25, r26 ; nop ; cmpltsi r15, r16, 5 }
+	{ ld1u r25, r26 ; nop ; revbits r5, r6 }
+	{ ld1u r25, r26 ; nop }
+	{ ld1u r25, r26 ; nor r15, r16, r17 ; revbits r5, r6 }
+	{ ld1u r25, r26 ; nor r5, r6, r7 ; info 19 }
+	{ ld1u r25, r26 ; or r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ ld1u r25, r26 ; or r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ ld1u r25, r26 ; or r5, r6, r7 ; nop }
+	{ ld1u r25, r26 ; pcnt r5, r6 ; jr r15 }
+	{ ld1u r25, r26 ; revbits r5, r6 ; cmpltu r15, r16, r17 }
+	{ ld1u r25, r26 ; revbytes r5, r6 ; andi r15, r16, 5 }
+	{ ld1u r25, r26 ; revbytes r5, r6 ; xor r15, r16, r17 }
+	{ ld1u r25, r26 ; rotl r15, r16, r17 ; pcnt r5, r6 }
+	{ ld1u r25, r26 ; rotl r5, r6, r7 ; ill }
+	{ ld1u r25, r26 ; rotli r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ ld1u r25, r26 ; rotli r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ ld1u r25, r26 ; rotli r5, r6, 5 ; mz r15, r16, r17 }
+	{ ld1u r25, r26 ; shl r15, r16, r17 ; fnop }
+	{ ld1u r25, r26 ; shl r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld1u r25, r26 ; shl r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld1u r25, r26 ; shl1add r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ ld1u r25, r26 ; shl1add r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld1u r25, r26 ; shl1add r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld1u r25, r26 ; shl1addx r15, r16, r17 ; pcnt r5, r6 }
+	{ ld1u r25, r26 ; shl1addx r5, r6, r7 ; ill }
+	{ ld1u r25, r26 ; shl2add r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ ld1u r25, r26 ; shl2add r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ ld1u r25, r26 ; shl2add r5, r6, r7 ; mz r15, r16, r17 }
+	{ ld1u r25, r26 ; shl2addx r15, r16, r17 ; fnop }
+	{ ld1u r25, r26 ; shl2addx r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld1u r25, r26 ; shl2addx r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld1u r25, r26 ; shl3add r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ ld1u r25, r26 ; shl3add r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld1u r25, r26 ; shl3add r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld1u r25, r26 ; shl3addx r15, r16, r17 ; pcnt r5, r6 }
+	{ ld1u r25, r26 ; shl3addx r5, r6, r7 ; ill }
+	{ ld1u r25, r26 ; shli r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ ld1u r25, r26 ; shli r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ ld1u r25, r26 ; shli r5, r6, 5 ; mz r15, r16, r17 }
+	{ ld1u r25, r26 ; shrs r15, r16, r17 ; fnop }
+	{ ld1u r25, r26 ; shrs r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld1u r25, r26 ; shrs r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld1u r25, r26 ; shrsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ ld1u r25, r26 ; shrsi r5, r6, 5 ; andi r15, r16, 5 }
+	{ ld1u r25, r26 ; shrsi r5, r6, 5 ; xor r15, r16, r17 }
+	{ ld1u r25, r26 ; shru r15, r16, r17 ; pcnt r5, r6 }
+	{ ld1u r25, r26 ; shru r5, r6, r7 ; ill }
+	{ ld1u r25, r26 ; shrui r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ ld1u r25, r26 ; shrui r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ ld1u r25, r26 ; shrui r5, r6, 5 ; mz r15, r16, r17 }
+	{ ld1u r25, r26 ; sub r15, r16, r17 ; fnop }
+	{ ld1u r25, r26 ; sub r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld1u r25, r26 ; sub r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld1u r25, r26 ; subx r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ ld1u r25, r26 ; subx r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld1u r25, r26 ; subx r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld1u r25, r26 ; tblidxb0 r5, r6 ; shli r15, r16, 5 }
+	{ ld1u r25, r26 ; tblidxb1 r5, r6 ; shl r15, r16, r17 }
+	{ ld1u r25, r26 ; tblidxb2 r5, r6 ; movei r15, 5 }
+	{ ld1u r25, r26 ; tblidxb3 r5, r6 ; jalr r15 }
+	{ ld1u r25, r26 ; xor r15, r16, r17 ; cmpeqi r5, r6, 5 }
+	{ ld1u r25, r26 ; xor r15, r16, r17 ; shli r5, r6, 5 }
+	{ ld1u r25, r26 ; xor r5, r6, r7 ; nor r15, r16, r17 }
+	{ ld1u_add r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ ld1u_add r15, r16, 5 ; moveli r5, 0x1234 }
+	{ ld1u_add r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ ld1u_add r15, r16, 5 ; v1dotpus r5, r6, r7 }
+	{ ld1u_add r15, r16, 5 ; v2int_l r5, r6, r7 }
+	{ ld2s r15, r16 ; addi r5, r6, 5 }
+	{ ld2s r15, r16 ; fdouble_pack1 r5, r6, r7 }
+	{ ld2s r15, r16 ; mulax r5, r6, r7 }
+	{ ld2s r15, r16 ; v1adiffu r5, r6, r7 }
+	{ ld2s r15, r16 ; v1sub r5, r6, r7 }
+	{ ld2s r15, r16 ; v2shrsi r5, r6, 5 }
+	{ ld2s r25, r26 ; add r15, r16, r17 ; move r5, r6 }
+	{ ld2s r25, r26 ; add r15, r16, r17 }
+	{ ld2s r25, r26 ; add r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld2s r25, r26 ; addi r15, r16, 5 ; mulax r5, r6, r7 }
+	{ ld2s r25, r26 ; addi r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ ld2s r25, r26 ; addx r15, r16, r17 ; addx r5, r6, r7 }
+	{ ld2s r25, r26 ; addx r15, r16, r17 ; rotli r5, r6, 5 }
+	{ ld2s r25, r26 ; addx r5, r6, r7 ; jr r15 }
+	{ ld2s r25, r26 ; addxi r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ ld2s r25, r26 ; addxi r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ ld2s r25, r26 ; addxi r5, r6, 5 ; rotl r15, r16, r17 }
+	{ ld2s r25, r26 ; and r15, r16, r17 ; move r5, r6 }
+	{ ld2s r25, r26 ; and r15, r16, r17 }
+	{ ld2s r25, r26 ; and r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld2s r25, r26 ; andi r15, r16, 5 ; mulax r5, r6, r7 }
+	{ ld2s r25, r26 ; andi r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ ld2s r25, r26 ; clz r5, r6 ; addx r15, r16, r17 }
+	{ ld2s r25, r26 ; clz r5, r6 ; shrui r15, r16, 5 }
+	{ ld2s r25, r26 ; cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld2s r25, r26 ; cmovnez r5, r6, r7 ; or r15, r16, r17 }
+	{ ld2s r25, r26 ; cmpeq r15, r16, r17 ; mnz r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpeq r15, r16, r17 ; xor r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpeq r5, r6, r7 ; shli r15, r16, 5 }
+	{ ld2s r25, r26 ; cmpeqi r15, r16, 5 ; mula_lu_lu r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpeqi r5, r6, 5 ; cmples r15, r16, r17 }
+	{ ld2s r25, r26 ; cmples r15, r16, r17 ; addi r5, r6, 5 }
+	{ ld2s r25, r26 ; cmples r15, r16, r17 ; rotl r5, r6, r7 }
+	{ ld2s r25, r26 ; cmples r5, r6, r7 ; jalrp r15 }
+	{ ld2s r25, r26 ; cmpleu r15, r16, r17 ; cmples r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpleu r15, r16, r17 ; shrs r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpleu r5, r6, r7 ; or r15, r16, r17 }
+	{ ld2s r25, r26 ; cmplts r15, r16, r17 ; mnz r5, r6, r7 }
+	{ ld2s r25, r26 ; cmplts r15, r16, r17 ; xor r5, r6, r7 }
+	{ ld2s r25, r26 ; cmplts r5, r6, r7 ; shli r15, r16, 5 }
+	{ ld2s r25, r26 ; cmpltsi r15, r16, 5 ; mula_lu_lu r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpltsi r5, r6, 5 ; cmples r15, r16, r17 }
+	{ ld2s r25, r26 ; cmpltu r15, r16, r17 ; addi r5, r6, 5 }
+	{ ld2s r25, r26 ; cmpltu r15, r16, r17 ; rotl r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpltu r5, r6, r7 ; jalrp r15 }
+	{ ld2s r25, r26 ; cmpne r15, r16, r17 ; cmples r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpne r15, r16, r17 ; shrs r5, r6, r7 }
+	{ ld2s r25, r26 ; cmpne r5, r6, r7 ; or r15, r16, r17 }
+	{ ld2s r25, r26 ; ctz r5, r6 ; lnk r15 }
+	{ ld2s r25, r26 ; fnop ; cmovnez r5, r6, r7 }
+	{ ld2s r25, r26 ; fnop ; mula_lu_lu r5, r6, r7 }
+	{ ld2s r25, r26 ; fnop ; shrui r5, r6, 5 }
+	{ ld2s r25, r26 ; fsingle_pack1 r5, r6 ; or r15, r16, r17 }
+	{ ld2s r25, r26 ; ill ; mnz r5, r6, r7 }
+	{ ld2s r25, r26 ; ill ; xor r5, r6, r7 }
+	{ ld2s r25, r26 ; info 19 ; jr r15 }
+	{ ld2s r25, r26 ; info 19 ; shl2add r5, r6, r7 }
+	{ ld2s r25, r26 ; jalr r15 ; cmpleu r5, r6, r7 }
+	{ ld2s r25, r26 ; jalr r15 ; shrsi r5, r6, 5 }
+	{ ld2s r25, r26 ; jalrp r15 ; mula_hu_hu r5, r6, r7 }
+	{ ld2s r25, r26 ; jr r15 ; clz r5, r6 }
+	{ ld2s r25, r26 ; jr r15 ; shl2add r5, r6, r7 }
+	{ ld2s r25, r26 ; jrp r15 ; movei r5, 5 }
+	{ ld2s r25, r26 ; lnk r15 ; add r5, r6, r7 }
+	{ ld2s r25, r26 ; lnk r15 ; revbytes r5, r6 }
+	{ ld2s r25, r26 ; mnz r15, r16, r17 ; ctz r5, r6 }
+	{ ld2s r25, r26 ; mnz r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld2s r25, r26 ; mnz r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld2s r25, r26 ; move r15, r16 ; mul_lu_lu r5, r6, r7 }
+	{ ld2s r25, r26 ; move r5, r6 ; and r15, r16, r17 }
+	{ ld2s r25, r26 ; move r5, r6 ; subx r15, r16, r17 }
+	{ ld2s r25, r26 ; movei r15, 5 ; or r5, r6, r7 }
+	{ ld2s r25, r26 ; movei r5, 5 ; fnop }
+	{ ld2s r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ ld2s r25, r26 ; mul_hu_hu r5, r6, r7 ; add r15, r16, r17 }
+	{ ld2s r25, r26 ; mul_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ ld2s r25, r26 ; mul_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld2s r25, r26 ; mul_lu_lu r5, r6, r7 ; nop }
+	{ ld2s r25, r26 ; mula_hs_hs r5, r6, r7 ; jr r15 }
+	{ ld2s r25, r26 ; mula_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ ld2s r25, r26 ; mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld2s r25, r26 ; mula_ls_ls r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld2s r25, r26 ; mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 }
+	{ ld2s r25, r26 ; mulax r5, r6, r7 ; shl r15, r16, r17 }
+	{ ld2s r25, r26 ; mulx r5, r6, r7 ; movei r15, 5 }
+	{ ld2s r25, r26 ; mz r15, r16, r17 ; ctz r5, r6 }
+	{ ld2s r25, r26 ; mz r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld2s r25, r26 ; mz r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld2s r25, r26 ; nop ; cmpltu r15, r16, r17 }
+	{ ld2s r25, r26 ; nop ; rotl r15, r16, r17 }
+	{ ld2s r25, r26 ; nor r15, r16, r17 ; addi r5, r6, 5 }
+	{ ld2s r25, r26 ; nor r15, r16, r17 ; rotl r5, r6, r7 }
+	{ ld2s r25, r26 ; nor r5, r6, r7 ; jalrp r15 }
+	{ ld2s r25, r26 ; or r15, r16, r17 ; cmples r5, r6, r7 }
+	{ ld2s r25, r26 ; or r15, r16, r17 ; shrs r5, r6, r7 }
+	{ ld2s r25, r26 ; or r5, r6, r7 ; or r15, r16, r17 }
+	{ ld2s r25, r26 ; pcnt r5, r6 ; lnk r15 }
+	{ ld2s r25, r26 ; revbits r5, r6 ; fnop }
+	{ ld2s r25, r26 ; revbytes r5, r6 ; cmpeqi r15, r16, 5 }
+	{ ld2s r25, r26 ; rotl r15, r16, r17 ; add r5, r6, r7 }
+	{ ld2s r25, r26 ; rotl r15, r16, r17 ; revbytes r5, r6 }
+	{ ld2s r25, r26 ; rotl r5, r6, r7 ; jalr r15 }
+	{ ld2s r25, r26 ; rotli r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ ld2s r25, r26 ; rotli r15, r16, 5 ; shli r5, r6, 5 }
+	{ ld2s r25, r26 ; rotli r5, r6, 5 ; nor r15, r16, r17 }
+	{ ld2s r25, r26 ; shl r15, r16, r17 ; info 19 }
+	{ ld2s r25, r26 ; shl r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ ld2s r25, r26 ; shl r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld2s r25, r26 ; shl1add r15, r16, r17 ; mula_ls_ls r5, r6, r7 }
+	{ ld2s r25, r26 ; shl1add r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ ld2s r25, r26 ; shl1addx r15, r16, r17 ; add r5, r6, r7 }
+	{ ld2s r25, r26 ; shl1addx r15, r16, r17 ; revbytes r5, r6 }
+	{ ld2s r25, r26 ; shl1addx r5, r6, r7 ; jalr r15 }
+	{ ld2s r25, r26 ; shl2add r15, r16, r17 ; cmpeqi r5, r6, 5 }
+	{ ld2s r25, r26 ; shl2add r15, r16, r17 ; shli r5, r6, 5 }
+	{ ld2s r25, r26 ; shl2add r5, r6, r7 ; nor r15, r16, r17 }
+	{ ld2s r25, r26 ; shl2addx r15, r16, r17 ; info 19 }
+	{ ld2s r25, r26 ; shl2addx r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ ld2s r25, r26 ; shl2addx r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld2s r25, r26 ; shl3add r15, r16, r17 ; mula_ls_ls r5, r6, r7 }
+	{ ld2s r25, r26 ; shl3add r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ ld2s r25, r26 ; shl3addx r15, r16, r17 ; add r5, r6, r7 }
+	{ ld2s r25, r26 ; shl3addx r15, r16, r17 ; revbytes r5, r6 }
+	{ ld2s r25, r26 ; shl3addx r5, r6, r7 ; jalr r15 }
+	{ ld2s r25, r26 ; shli r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ ld2s r25, r26 ; shli r15, r16, 5 ; shli r5, r6, 5 }
+	{ ld2s r25, r26 ; shli r5, r6, 5 ; nor r15, r16, r17 }
+	{ ld2s r25, r26 ; shrs r15, r16, r17 ; info 19 }
+	{ ld2s r25, r26 ; shrs r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ ld2s r25, r26 ; shrs r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld2s r25, r26 ; shrsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ ld2s r25, r26 ; shrsi r5, r6, 5 ; cmpeqi r15, r16, 5 }
+	{ ld2s r25, r26 ; shru r15, r16, r17 ; add r5, r6, r7 }
+	{ ld2s r25, r26 ; shru r15, r16, r17 ; revbytes r5, r6 }
+	{ ld2s r25, r26 ; shru r5, r6, r7 ; jalr r15 }
+	{ ld2s r25, r26 ; shrui r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ ld2s r25, r26 ; shrui r15, r16, 5 ; shli r5, r6, 5 }
+	{ ld2s r25, r26 ; shrui r5, r6, 5 ; nor r15, r16, r17 }
+	{ ld2s r25, r26 ; sub r15, r16, r17 ; info 19 }
+	{ ld2s r25, r26 ; sub r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ ld2s r25, r26 ; sub r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld2s r25, r26 ; subx r15, r16, r17 ; mula_ls_ls r5, r6, r7 }
+	{ ld2s r25, r26 ; subx r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ ld2s r25, r26 ; tblidxb0 r5, r6 ; add r15, r16, r17 }
+	{ ld2s r25, r26 ; tblidxb0 r5, r6 ; shrsi r15, r16, 5 }
+	{ ld2s r25, r26 ; tblidxb1 r5, r6 ; shl1addx r15, r16, r17 }
+	{ ld2s r25, r26 ; tblidxb2 r5, r6 ; nop }
+	{ ld2s r25, r26 ; tblidxb3 r5, r6 ; jr r15 }
+	{ ld2s r25, r26 ; xor r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ ld2s r25, r26 ; xor r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ ld2s r25, r26 ; xor r5, r6, r7 ; rotl r15, r16, r17 }
+	{ ld2s_add r15, r16, 5 ; cmpltui r5, r6, 5 }
+	{ ld2s_add r15, r16, 5 ; mul_hs_hu r5, r6, r7 }
+	{ ld2s_add r15, r16, 5 ; shlx r5, r6, r7 }
+	{ ld2s_add r15, r16, 5 ; v1int_h r5, r6, r7 }
+	{ ld2s_add r15, r16, 5 ; v2maxsi r5, r6, 5 }
+	{ ld2u r15, r16 ; addx r5, r6, r7 }
+	{ ld2u r15, r16 ; fdouble_sub_flags r5, r6, r7 }
+	{ ld2u r15, r16 ; mz r5, r6, r7 }
+	{ ld2u r15, r16 ; v1cmpeq r5, r6, r7 }
+	{ ld2u r15, r16 ; v2add r5, r6, r7 }
+	{ ld2u r15, r16 ; v2shrui r5, r6, 5 }
+	{ ld2u r25, r26 ; add r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ ld2u r25, r26 ; add r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld2u r25, r26 ; add r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld2u r25, r26 ; addi r15, r16, 5 ; mz r5, r6, r7 }
+	{ ld2u r25, r26 ; addi r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ ld2u r25, r26 ; addx r15, r16, r17 ; and r5, r6, r7 }
+	{ ld2u r25, r26 ; addx r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ ld2u r25, r26 ; addx r5, r6, r7 ; lnk r15 }
+	{ ld2u r25, r26 ; addxi r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ ld2u r25, r26 ; addxi r15, r16, 5 ; shrui r5, r6, 5 }
+	{ ld2u r25, r26 ; addxi r5, r6, 5 ; shl r15, r16, r17 }
+	{ ld2u r25, r26 ; and r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ ld2u r25, r26 ; and r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld2u r25, r26 ; and r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld2u r25, r26 ; andi r15, r16, 5 ; mz r5, r6, r7 }
+	{ ld2u r25, r26 ; andi r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ ld2u r25, r26 ; clz r5, r6 ; and r15, r16, r17 }
+	{ ld2u r25, r26 ; clz r5, r6 ; subx r15, r16, r17 }
+	{ ld2u r25, r26 ; cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld2u r25, r26 ; cmovnez r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld2u r25, r26 ; cmpeq r15, r16, r17 ; movei r5, 5 }
+	{ ld2u r25, r26 ; cmpeq r5, r6, r7 ; add r15, r16, r17 }
+	{ ld2u r25, r26 ; cmpeq r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ ld2u r25, r26 ; cmpeqi r15, r16, 5 ; mulx r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 }
+	{ ld2u r25, r26 ; cmples r15, r16, r17 ; addxi r5, r6, 5 }
+	{ ld2u r25, r26 ; cmples r15, r16, r17 ; shl r5, r6, r7 }
+	{ ld2u r25, r26 ; cmples r5, r6, r7 ; jrp r15 }
+	{ ld2u r25, r26 ; cmpleu r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpleu r15, r16, r17 ; shru r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpleu r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld2u r25, r26 ; cmplts r15, r16, r17 ; movei r5, 5 }
+	{ ld2u r25, r26 ; cmplts r5, r6, r7 ; add r15, r16, r17 }
+	{ ld2u r25, r26 ; cmplts r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ ld2u r25, r26 ; cmpltsi r15, r16, 5 ; mulx r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpltsi r5, r6, 5 ; cmplts r15, r16, r17 }
+	{ ld2u r25, r26 ; cmpltu r15, r16, r17 ; addxi r5, r6, 5 }
+	{ ld2u r25, r26 ; cmpltu r15, r16, r17 ; shl r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpltu r5, r6, r7 ; jrp r15 }
+	{ ld2u r25, r26 ; cmpne r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpne r15, r16, r17 ; shru r5, r6, r7 }
+	{ ld2u r25, r26 ; cmpne r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld2u r25, r26 ; ctz r5, r6 ; move r15, r16 }
+	{ ld2u r25, r26 ; fnop ; cmpeq r5, r6, r7 }
+	{ ld2u r25, r26 ; fnop ; mulx r5, r6, r7 }
+	{ ld2u r25, r26 ; fnop ; sub r5, r6, r7 }
+	{ ld2u r25, r26 ; fsingle_pack1 r5, r6 ; rotli r15, r16, 5 }
+	{ ld2u r25, r26 ; ill ; movei r5, 5 }
+	{ ld2u r25, r26 ; info 19 ; add r15, r16, r17 }
+	{ ld2u r25, r26 ; info 19 ; lnk r15 }
+	{ ld2u r25, r26 ; info 19 ; shl2addx r5, r6, r7 }
+	{ ld2u r25, r26 ; jalr r15 ; cmpltsi r5, r6, 5 }
+	{ ld2u r25, r26 ; jalr r15 ; shrui r5, r6, 5 }
+	{ ld2u r25, r26 ; jalrp r15 ; mula_lu_lu r5, r6, r7 }
+	{ ld2u r25, r26 ; jr r15 ; cmovnez r5, r6, r7 }
+	{ ld2u r25, r26 ; jr r15 ; shl3add r5, r6, r7 }
+	{ ld2u r25, r26 ; jrp r15 ; mul_hu_hu r5, r6, r7 }
+	{ ld2u r25, r26 ; lnk r15 ; addx r5, r6, r7 }
+	{ ld2u r25, r26 ; lnk r15 ; rotli r5, r6, 5 }
+	{ ld2u r25, r26 ; mnz r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ ld2u r25, r26 ; mnz r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ ld2u r25, r26 ; mnz r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ ld2u r25, r26 ; move r15, r16 ; mula_hu_hu r5, r6, r7 }
+	{ ld2u r25, r26 ; move r5, r6 ; cmpeq r15, r16, r17 }
+	{ ld2u r25, r26 ; move r5, r6 }
+	{ ld2u r25, r26 ; movei r15, 5 ; revbits r5, r6 }
+	{ ld2u r25, r26 ; movei r5, 5 ; info 19 }
+	{ ld2u r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld2u r25, r26 ; mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 }
+	{ ld2u r25, r26 ; mul_hu_hu r5, r6, r7 ; shrui r15, r16, 5 }
+	{ ld2u r25, r26 ; mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld2u r25, r26 ; mul_lu_lu r5, r6, r7 ; or r15, r16, r17 }
+	{ ld2u r25, r26 ; mula_hs_hs r5, r6, r7 ; lnk r15 }
+	{ ld2u r25, r26 ; mula_hu_hu r5, r6, r7 ; fnop }
+	{ ld2u r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ ld2u r25, r26 ; mula_lu_lu r5, r6, r7 ; add r15, r16, r17 }
+	{ ld2u r25, r26 ; mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ ld2u r25, r26 ; mulax r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld2u r25, r26 ; mulx r5, r6, r7 ; nop }
+	{ ld2u r25, r26 ; mz r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ ld2u r25, r26 ; mz r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ ld2u r25, r26 ; mz r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ ld2u r25, r26 ; nop ; cmpne r15, r16, r17 }
+	{ ld2u r25, r26 ; nop ; rotli r15, r16, 5 }
+	{ ld2u r25, r26 ; nor r15, r16, r17 ; addxi r5, r6, 5 }
+	{ ld2u r25, r26 ; nor r15, r16, r17 ; shl r5, r6, r7 }
+	{ ld2u r25, r26 ; nor r5, r6, r7 ; jrp r15 }
+	{ ld2u r25, r26 ; or r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ ld2u r25, r26 ; or r15, r16, r17 ; shru r5, r6, r7 }
+	{ ld2u r25, r26 ; or r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld2u r25, r26 ; pcnt r5, r6 ; move r15, r16 }
+	{ ld2u r25, r26 ; revbits r5, r6 ; info 19 }
+	{ ld2u r25, r26 ; revbytes r5, r6 ; cmpleu r15, r16, r17 }
+	{ ld2u r25, r26 ; rotl r15, r16, r17 ; addx r5, r6, r7 }
+	{ ld2u r25, r26 ; rotl r15, r16, r17 ; rotli r5, r6, 5 }
+	{ ld2u r25, r26 ; rotl r5, r6, r7 ; jr r15 }
+	{ ld2u r25, r26 ; rotli r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ ld2u r25, r26 ; rotli r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ ld2u r25, r26 ; rotli r5, r6, 5 ; rotl r15, r16, r17 }
+	{ ld2u r25, r26 ; shl r15, r16, r17 ; move r5, r6 }
+	{ ld2u r25, r26 ; shl r15, r16, r17 }
+	{ ld2u r25, r26 ; shl r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld2u r25, r26 ; shl1add r15, r16, r17 ; mulax r5, r6, r7 }
+	{ ld2u r25, r26 ; shl1add r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld2u r25, r26 ; shl1addx r15, r16, r17 ; addx r5, r6, r7 }
+	{ ld2u r25, r26 ; shl1addx r15, r16, r17 ; rotli r5, r6, 5 }
+	{ ld2u r25, r26 ; shl1addx r5, r6, r7 ; jr r15 }
+	{ ld2u r25, r26 ; shl2add r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ ld2u r25, r26 ; shl2add r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ ld2u r25, r26 ; shl2add r5, r6, r7 ; rotl r15, r16, r17 }
+	{ ld2u r25, r26 ; shl2addx r15, r16, r17 ; move r5, r6 }
+	{ ld2u r25, r26 ; shl2addx r15, r16, r17 }
+	{ ld2u r25, r26 ; shl2addx r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld2u r25, r26 ; shl3add r15, r16, r17 ; mulax r5, r6, r7 }
+	{ ld2u r25, r26 ; shl3add r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld2u r25, r26 ; shl3addx r15, r16, r17 ; addx r5, r6, r7 }
+	{ ld2u r25, r26 ; shl3addx r15, r16, r17 ; rotli r5, r6, 5 }
+	{ ld2u r25, r26 ; shl3addx r5, r6, r7 ; jr r15 }
+	{ ld2u r25, r26 ; shli r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ ld2u r25, r26 ; shli r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ ld2u r25, r26 ; shli r5, r6, 5 ; rotl r15, r16, r17 }
+	{ ld2u r25, r26 ; shrs r15, r16, r17 ; move r5, r6 }
+	{ ld2u r25, r26 ; shrs r15, r16, r17 }
+	{ ld2u r25, r26 ; shrs r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld2u r25, r26 ; shrsi r15, r16, 5 ; mulax r5, r6, r7 }
+	{ ld2u r25, r26 ; shrsi r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ ld2u r25, r26 ; shru r15, r16, r17 ; addx r5, r6, r7 }
+	{ ld2u r25, r26 ; shru r15, r16, r17 ; rotli r5, r6, 5 }
+	{ ld2u r25, r26 ; shru r5, r6, r7 ; jr r15 }
+	{ ld2u r25, r26 ; shrui r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ ld2u r25, r26 ; shrui r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ ld2u r25, r26 ; shrui r5, r6, 5 ; rotl r15, r16, r17 }
+	{ ld2u r25, r26 ; sub r15, r16, r17 ; move r5, r6 }
+	{ ld2u r25, r26 ; sub r15, r16, r17 }
+	{ ld2u r25, r26 ; sub r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld2u r25, r26 ; subx r15, r16, r17 ; mulax r5, r6, r7 }
+	{ ld2u r25, r26 ; subx r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld2u r25, r26 ; tblidxb0 r5, r6 ; addx r15, r16, r17 }
+	{ ld2u r25, r26 ; tblidxb0 r5, r6 ; shrui r15, r16, 5 }
+	{ ld2u r25, r26 ; tblidxb1 r5, r6 ; shl2addx r15, r16, r17 }
+	{ ld2u r25, r26 ; tblidxb2 r5, r6 ; or r15, r16, r17 }
+	{ ld2u r25, r26 ; tblidxb3 r5, r6 ; lnk r15 }
+	{ ld2u r25, r26 ; xor r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ ld2u r25, r26 ; xor r15, r16, r17 ; shrui r5, r6, 5 }
+	{ ld2u r25, r26 ; xor r5, r6, r7 ; shl r15, r16, r17 }
+	{ ld2u_add r15, r16, 5 ; cmul r5, r6, r7 }
+	{ ld2u_add r15, r16, 5 ; mul_hs_lu r5, r6, r7 }
+	{ ld2u_add r15, r16, 5 ; shrs r5, r6, r7 }
+	{ ld2u_add r15, r16, 5 ; v1maxu r5, r6, r7 }
+	{ ld2u_add r15, r16, 5 ; v2minsi r5, r6, 5 }
+	{ ld4s r15, r16 ; addxli r5, r6, 0x1234 }
+	{ ld4s r15, r16 ; fdouble_unpack_min r5, r6, r7 }
+	{ ld4s r15, r16 ; nor r5, r6, r7 }
+	{ ld4s r15, r16 ; v1cmples r5, r6, r7 }
+	{ ld4s r15, r16 ; v2addsc r5, r6, r7 }
+	{ ld4s r15, r16 ; v2subsc r5, r6, r7 }
+	{ ld4s r25, r26 ; add r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld4s r25, r26 ; add r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld4s r25, r26 ; add r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld4s r25, r26 ; addi r15, r16, 5 ; nor r5, r6, r7 }
+	{ ld4s r25, r26 ; addi r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ ld4s r25, r26 ; addx r15, r16, r17 ; clz r5, r6 }
+	{ ld4s r25, r26 ; addx r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ ld4s r25, r26 ; addx r5, r6, r7 ; move r15, r16 }
+	{ ld4s r25, r26 ; addxi r15, r16, 5 ; cmpne r5, r6, r7 }
+	{ ld4s r25, r26 ; addxi r15, r16, 5 ; subx r5, r6, r7 }
+	{ ld4s r25, r26 ; addxi r5, r6, 5 ; shl1addx r15, r16, r17 }
+	{ ld4s r25, r26 ; and r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld4s r25, r26 ; and r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld4s r25, r26 ; and r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld4s r25, r26 ; andi r15, r16, 5 ; nor r5, r6, r7 }
+	{ ld4s r25, r26 ; andi r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ ld4s r25, r26 ; clz r5, r6 ; cmpeq r15, r16, r17 }
+	{ ld4s r25, r26 ; clz r5, r6 }
+	{ ld4s r25, r26 ; cmoveqz r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld4s r25, r26 ; cmovnez r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld4s r25, r26 ; cmpeq r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ ld4s r25, r26 ; cmpeq r5, r6, r7 ; addx r15, r16, r17 }
+	{ ld4s r25, r26 ; cmpeq r5, r6, r7 ; shrui r15, r16, 5 }
+	{ ld4s r25, r26 ; cmpeqi r15, r16, 5 ; nop }
+	{ ld4s r25, r26 ; cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 }
+	{ ld4s r25, r26 ; cmples r15, r16, r17 ; andi r5, r6, 5 }
+	{ ld4s r25, r26 ; cmples r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ ld4s r25, r26 ; cmples r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld4s r25, r26 ; cmpleu r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld4s r25, r26 ; cmpleu r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld4s r25, r26 ; cmpleu r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld4s r25, r26 ; cmplts r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ ld4s r25, r26 ; cmplts r5, r6, r7 ; addx r15, r16, r17 }
+	{ ld4s r25, r26 ; cmplts r5, r6, r7 ; shrui r15, r16, 5 }
+	{ ld4s r25, r26 ; cmpltsi r15, r16, 5 ; nop }
+	{ ld4s r25, r26 ; cmpltsi r5, r6, 5 ; cmpltu r15, r16, r17 }
+	{ ld4s r25, r26 ; cmpltu r15, r16, r17 ; andi r5, r6, 5 }
+	{ ld4s r25, r26 ; cmpltu r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ ld4s r25, r26 ; cmpltu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld4s r25, r26 ; cmpne r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld4s r25, r26 ; cmpne r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld4s r25, r26 ; cmpne r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld4s r25, r26 ; ctz r5, r6 ; mz r15, r16, r17 }
+	{ ld4s r25, r26 ; fnop ; cmpeqi r5, r6, 5 }
+	{ ld4s r25, r26 ; fnop ; mz r5, r6, r7 }
+	{ ld4s r25, r26 ; fnop ; subx r5, r6, r7 }
+	{ ld4s r25, r26 ; fsingle_pack1 r5, r6 ; shl1add r15, r16, r17 }
+	{ ld4s r25, r26 ; ill ; mul_hu_hu r5, r6, r7 }
+	{ ld4s r25, r26 ; info 19 ; addi r15, r16, 5 }
+	{ ld4s r25, r26 ; info 19 ; mnz r5, r6, r7 }
+	{ ld4s r25, r26 ; info 19 ; shl3add r5, r6, r7 }
+	{ ld4s r25, r26 ; jalr r15 ; cmpne r5, r6, r7 }
+	{ ld4s r25, r26 ; jalr r15 ; subx r5, r6, r7 }
+	{ ld4s r25, r26 ; jalrp r15 ; mulx r5, r6, r7 }
+	{ ld4s r25, r26 ; jr r15 ; cmpeqi r5, r6, 5 }
+	{ ld4s r25, r26 ; jr r15 ; shli r5, r6, 5 }
+	{ ld4s r25, r26 ; jrp r15 ; mul_lu_lu r5, r6, r7 }
+	{ ld4s r25, r26 ; lnk r15 ; and r5, r6, r7 }
+	{ ld4s r25, r26 ; lnk r15 ; shl1add r5, r6, r7 }
+	{ ld4s r25, r26 ; mnz r15, r16, r17 ; mnz r5, r6, r7 }
+	{ ld4s r25, r26 ; mnz r15, r16, r17 ; xor r5, r6, r7 }
+	{ ld4s r25, r26 ; mnz r5, r6, r7 ; shli r15, r16, 5 }
+	{ ld4s r25, r26 ; move r15, r16 ; mula_lu_lu r5, r6, r7 }
+	{ ld4s r25, r26 ; move r5, r6 ; cmples r15, r16, r17 }
+	{ ld4s r25, r26 ; movei r15, 5 ; addi r5, r6, 5 }
+	{ ld4s r25, r26 ; movei r15, 5 ; rotl r5, r6, r7 }
+	{ ld4s r25, r26 ; movei r5, 5 ; jalrp r15 }
+	{ ld4s r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ ld4s r25, r26 ; mul_hu_hu r5, r6, r7 ; and r15, r16, r17 }
+	{ ld4s r25, r26 ; mul_hu_hu r5, r6, r7 ; subx r15, r16, r17 }
+	{ ld4s r25, r26 ; mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld4s r25, r26 ; mul_lu_lu r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld4s r25, r26 ; mula_hs_hs r5, r6, r7 ; move r15, r16 }
+	{ ld4s r25, r26 ; mula_hu_hu r5, r6, r7 ; info 19 }
+	{ ld4s r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ ld4s r25, r26 ; mula_lu_lu r5, r6, r7 ; addx r15, r16, r17 }
+	{ ld4s r25, r26 ; mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 }
+	{ ld4s r25, r26 ; mulax r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld4s r25, r26 ; mulx r5, r6, r7 ; or r15, r16, r17 }
+	{ ld4s r25, r26 ; mz r15, r16, r17 ; mnz r5, r6, r7 }
+	{ ld4s r25, r26 ; mz r15, r16, r17 ; xor r5, r6, r7 }
+	{ ld4s r25, r26 ; mz r5, r6, r7 ; shli r15, r16, 5 }
+	{ ld4s r25, r26 ; nop ; ctz r5, r6 }
+	{ ld4s r25, r26 ; nop ; shl r15, r16, r17 }
+	{ ld4s r25, r26 ; nor r15, r16, r17 ; andi r5, r6, 5 }
+	{ ld4s r25, r26 ; nor r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ ld4s r25, r26 ; nor r5, r6, r7 ; mnz r15, r16, r17 }
+	{ ld4s r25, r26 ; or r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ ld4s r25, r26 ; or r15, r16, r17 ; sub r5, r6, r7 }
+	{ ld4s r25, r26 ; or r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld4s r25, r26 ; pcnt r5, r6 ; mz r15, r16, r17 }
+	{ ld4s r25, r26 ; revbits r5, r6 ; jalrp r15 }
+	{ ld4s r25, r26 ; revbytes r5, r6 ; cmpltsi r15, r16, 5 }
+	{ ld4s r25, r26 ; rotl r15, r16, r17 ; and r5, r6, r7 }
+	{ ld4s r25, r26 ; rotl r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ ld4s r25, r26 ; rotl r5, r6, r7 ; lnk r15 }
+	{ ld4s r25, r26 ; rotli r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ ld4s r25, r26 ; rotli r15, r16, 5 ; shrui r5, r6, 5 }
+	{ ld4s r25, r26 ; rotli r5, r6, 5 ; shl r15, r16, r17 }
+	{ ld4s r25, r26 ; shl r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ ld4s r25, r26 ; shl r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld4s r25, r26 ; shl r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld4s r25, r26 ; shl1add r15, r16, r17 ; mz r5, r6, r7 }
+	{ ld4s r25, r26 ; shl1add r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ ld4s r25, r26 ; shl1addx r15, r16, r17 ; and r5, r6, r7 }
+	{ ld4s r25, r26 ; shl1addx r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ ld4s r25, r26 ; shl1addx r5, r6, r7 ; lnk r15 }
+	{ ld4s r25, r26 ; shl2add r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ ld4s r25, r26 ; shl2add r15, r16, r17 ; shrui r5, r6, 5 }
+	{ ld4s r25, r26 ; shl2add r5, r6, r7 ; shl r15, r16, r17 }
+	{ ld4s r25, r26 ; shl2addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ ld4s r25, r26 ; shl2addx r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld4s r25, r26 ; shl2addx r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld4s r25, r26 ; shl3add r15, r16, r17 ; mz r5, r6, r7 }
+	{ ld4s r25, r26 ; shl3add r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ ld4s r25, r26 ; shl3addx r15, r16, r17 ; and r5, r6, r7 }
+	{ ld4s r25, r26 ; shl3addx r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ ld4s r25, r26 ; shl3addx r5, r6, r7 ; lnk r15 }
+	{ ld4s r25, r26 ; shli r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ ld4s r25, r26 ; shli r15, r16, 5 ; shrui r5, r6, 5 }
+	{ ld4s r25, r26 ; shli r5, r6, 5 ; shl r15, r16, r17 }
+	{ ld4s r25, r26 ; shrs r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ ld4s r25, r26 ; shrs r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld4s r25, r26 ; shrs r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld4s r25, r26 ; shrsi r15, r16, 5 ; mz r5, r6, r7 }
+	{ ld4s r25, r26 ; shrsi r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ ld4s r25, r26 ; shru r15, r16, r17 ; and r5, r6, r7 }
+	{ ld4s r25, r26 ; shru r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ ld4s r25, r26 ; shru r5, r6, r7 ; lnk r15 }
+	{ ld4s r25, r26 ; shrui r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ ld4s r25, r26 ; shrui r15, r16, 5 ; shrui r5, r6, 5 }
+	{ ld4s r25, r26 ; shrui r5, r6, 5 ; shl r15, r16, r17 }
+	{ ld4s r25, r26 ; sub r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ ld4s r25, r26 ; sub r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld4s r25, r26 ; sub r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld4s r25, r26 ; subx r15, r16, r17 ; mz r5, r6, r7 }
+	{ ld4s r25, r26 ; subx r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ ld4s r25, r26 ; tblidxb0 r5, r6 ; and r15, r16, r17 }
+	{ ld4s r25, r26 ; tblidxb0 r5, r6 ; subx r15, r16, r17 }
+	{ ld4s r25, r26 ; tblidxb1 r5, r6 ; shl3addx r15, r16, r17 }
+	{ ld4s r25, r26 ; tblidxb2 r5, r6 ; rotli r15, r16, 5 }
+	{ ld4s r25, r26 ; tblidxb3 r5, r6 ; move r15, r16 }
+	{ ld4s r25, r26 ; xor r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld4s r25, r26 ; xor r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld4s r25, r26 ; xor r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld4s_add r15, r16, 5 ; cmulaf r5, r6, r7 }
+	{ ld4s_add r15, r16, 5 ; mul_hu_ls r5, r6, r7 }
+	{ ld4s_add r15, r16, 5 ; shru r5, r6, r7 }
+	{ ld4s_add r15, r16, 5 ; v1minu r5, r6, r7 }
+	{ ld4s_add r15, r16, 5 ; v2mulfsc r5, r6, r7 }
+	{ ld4u r15, r16 ; and r5, r6, r7 }
+	{ ld4u r15, r16 ; fsingle_add1 r5, r6, r7 }
+	{ ld4u r15, r16 ; ori r5, r6, 5 }
+	{ ld4u r15, r16 ; v1cmplts r5, r6, r7 }
+	{ ld4u r15, r16 ; v2avgs r5, r6, r7 }
+	{ ld4u r15, r16 ; v4addsc r5, r6, r7 }
+	{ ld4u r25, r26 ; add r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ ld4u r25, r26 ; add r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld4u r25, r26 ; add r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld4u r25, r26 ; addi r15, r16, 5 ; pcnt r5, r6 }
+	{ ld4u r25, r26 ; addi r5, r6, 5 ; ill }
+	{ ld4u r25, r26 ; addx r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ ld4u r25, r26 ; addx r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ ld4u r25, r26 ; addx r5, r6, r7 ; mz r15, r16, r17 }
+	{ ld4u r25, r26 ; addxi r15, r16, 5 ; fnop }
+	{ ld4u r25, r26 ; addxi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ ld4u r25, r26 ; addxi r5, r6, 5 ; shl2addx r15, r16, r17 }
+	{ ld4u r25, r26 ; and r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ ld4u r25, r26 ; and r5, r6, r7 ; andi r15, r16, 5 }
+	{ ld4u r25, r26 ; and r5, r6, r7 ; xor r15, r16, r17 }
+	{ ld4u r25, r26 ; andi r15, r16, 5 ; pcnt r5, r6 }
+	{ ld4u r25, r26 ; andi r5, r6, 5 ; ill }
+	{ ld4u r25, r26 ; clz r5, r6 ; cmples r15, r16, r17 }
+	{ ld4u r25, r26 ; cmoveqz r5, r6, r7 ; addi r15, r16, 5 }
+	{ ld4u r25, r26 ; cmoveqz r5, r6, r7 ; shru r15, r16, r17 }
+	{ ld4u r25, r26 ; cmovnez r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld4u r25, r26 ; cmpeq r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ ld4u r25, r26 ; cmpeq r5, r6, r7 ; and r15, r16, r17 }
+	{ ld4u r25, r26 ; cmpeq r5, r6, r7 ; subx r15, r16, r17 }
+	{ ld4u r25, r26 ; cmpeqi r15, r16, 5 ; or r5, r6, r7 }
+	{ ld4u r25, r26 ; cmpeqi r5, r6, 5 ; fnop }
+	{ ld4u r25, r26 ; cmples r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ ld4u r25, r26 ; cmples r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ ld4u r25, r26 ; cmples r5, r6, r7 ; movei r15, 5 }
+	{ ld4u r25, r26 ; cmpleu r15, r16, r17 ; ctz r5, r6 }
+	{ ld4u r25, r26 ; cmpleu r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld4u r25, r26 ; cmpleu r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld4u r25, r26 ; cmplts r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ ld4u r25, r26 ; cmplts r5, r6, r7 ; and r15, r16, r17 }
+	{ ld4u r25, r26 ; cmplts r5, r6, r7 ; subx r15, r16, r17 }
+	{ ld4u r25, r26 ; cmpltsi r15, r16, 5 ; or r5, r6, r7 }
+	{ ld4u r25, r26 ; cmpltsi r5, r6, 5 ; fnop }
+	{ ld4u r25, r26 ; cmpltu r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ ld4u r25, r26 ; cmpltu r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ ld4u r25, r26 ; cmpltu r5, r6, r7 ; movei r15, 5 }
+	{ ld4u r25, r26 ; cmpne r15, r16, r17 ; ctz r5, r6 }
+	{ ld4u r25, r26 ; cmpne r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld4u r25, r26 ; cmpne r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld4u r25, r26 ; ctz r5, r6 ; nor r15, r16, r17 }
+	{ ld4u r25, r26 ; fnop ; cmples r5, r6, r7 }
+	{ ld4u r25, r26 ; fnop ; nor r15, r16, r17 }
+	{ ld4u r25, r26 ; fnop ; tblidxb1 r5, r6 }
+	{ ld4u r25, r26 ; fsingle_pack1 r5, r6 ; shl2add r15, r16, r17 }
+	{ ld4u r25, r26 ; ill ; mul_lu_lu r5, r6, r7 }
+	{ ld4u r25, r26 ; info 19 ; addx r15, r16, r17 }
+	{ ld4u r25, r26 ; info 19 ; move r5, r6 }
+	{ ld4u r25, r26 ; info 19 ; shl3addx r5, r6, r7 }
+	{ ld4u r25, r26 ; jalr r15 ; fnop }
+	{ ld4u r25, r26 ; jalr r15 ; tblidxb1 r5, r6 }
+	{ ld4u r25, r26 ; jalrp r15 ; nop }
+	{ ld4u r25, r26 ; jr r15 ; cmpleu r5, r6, r7 }
+	{ ld4u r25, r26 ; jr r15 ; shrsi r5, r6, 5 }
+	{ ld4u r25, r26 ; jrp r15 ; mula_hu_hu r5, r6, r7 }
+	{ ld4u r25, r26 ; lnk r15 ; clz r5, r6 }
+	{ ld4u r25, r26 ; lnk r15 ; shl2add r5, r6, r7 }
+	{ ld4u r25, r26 ; mnz r15, r16, r17 ; movei r5, 5 }
+	{ ld4u r25, r26 ; mnz r5, r6, r7 ; add r15, r16, r17 }
+	{ ld4u r25, r26 ; mnz r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ ld4u r25, r26 ; move r15, r16 ; mulx r5, r6, r7 }
+	{ ld4u r25, r26 ; move r5, r6 ; cmplts r15, r16, r17 }
+	{ ld4u r25, r26 ; movei r15, 5 ; addxi r5, r6, 5 }
+	{ ld4u r25, r26 ; movei r15, 5 ; shl r5, r6, r7 }
+	{ ld4u r25, r26 ; movei r5, 5 ; jrp r15 }
+	{ ld4u r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld4u r25, r26 ; mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ ld4u r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ ld4u r25, r26 ; mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 }
+	{ ld4u r25, r26 ; mul_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ ld4u r25, r26 ; mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 }
+	{ ld4u r25, r26 ; mula_hu_hu r5, r6, r7 ; jalrp r15 }
+	{ ld4u r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ ld4u r25, r26 ; mula_lu_lu r5, r6, r7 ; and r15, r16, r17 }
+	{ ld4u r25, r26 ; mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 }
+	{ ld4u r25, r26 ; mulax r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ ld4u r25, r26 ; mulx r5, r6, r7 ; rotli r15, r16, 5 }
+	{ ld4u r25, r26 ; mz r15, r16, r17 ; movei r5, 5 }
+	{ ld4u r25, r26 ; mz r5, r6, r7 ; add r15, r16, r17 }
+	{ ld4u r25, r26 ; mz r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ ld4u r25, r26 ; nop ; fsingle_pack1 r5, r6 }
+	{ ld4u r25, r26 ; nop ; shl1add r15, r16, r17 }
+	{ ld4u r25, r26 ; nor r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ ld4u r25, r26 ; nor r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ ld4u r25, r26 ; nor r5, r6, r7 ; movei r15, 5 }
+	{ ld4u r25, r26 ; or r15, r16, r17 ; ctz r5, r6 }
+	{ ld4u r25, r26 ; or r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ ld4u r25, r26 ; or r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ ld4u r25, r26 ; pcnt r5, r6 ; nor r15, r16, r17 }
+	{ ld4u r25, r26 ; revbits r5, r6 ; jrp r15 }
+	{ ld4u r25, r26 ; revbytes r5, r6 ; cmpne r15, r16, r17 }
+	{ ld4u r25, r26 ; rotl r15, r16, r17 ; clz r5, r6 }
+	{ ld4u r25, r26 ; rotl r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ ld4u r25, r26 ; rotl r5, r6, r7 ; move r15, r16 }
+	{ ld4u r25, r26 ; rotli r15, r16, 5 ; cmpne r5, r6, r7 }
+	{ ld4u r25, r26 ; rotli r15, r16, 5 ; subx r5, r6, r7 }
+	{ ld4u r25, r26 ; rotli r5, r6, 5 ; shl1addx r15, r16, r17 }
+	{ ld4u r25, r26 ; shl r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld4u r25, r26 ; shl r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld4u r25, r26 ; shl r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld4u r25, r26 ; shl1add r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld4u r25, r26 ; shl1add r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld4u r25, r26 ; shl1addx r15, r16, r17 ; clz r5, r6 }
+	{ ld4u r25, r26 ; shl1addx r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ ld4u r25, r26 ; shl1addx r5, r6, r7 ; move r15, r16 }
+	{ ld4u r25, r26 ; shl2add r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ ld4u r25, r26 ; shl2add r15, r16, r17 ; subx r5, r6, r7 }
+	{ ld4u r25, r26 ; shl2add r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ ld4u r25, r26 ; shl2addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld4u r25, r26 ; shl2addx r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld4u r25, r26 ; shl2addx r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld4u r25, r26 ; shl3add r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld4u r25, r26 ; shl3add r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld4u r25, r26 ; shl3addx r15, r16, r17 ; clz r5, r6 }
+	{ ld4u r25, r26 ; shl3addx r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ ld4u r25, r26 ; shl3addx r5, r6, r7 ; move r15, r16 }
+	{ ld4u r25, r26 ; shli r15, r16, 5 ; cmpne r5, r6, r7 }
+	{ ld4u r25, r26 ; shli r15, r16, 5 ; subx r5, r6, r7 }
+	{ ld4u r25, r26 ; shli r5, r6, 5 ; shl1addx r15, r16, r17 }
+	{ ld4u r25, r26 ; shrs r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld4u r25, r26 ; shrs r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld4u r25, r26 ; shrs r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld4u r25, r26 ; shrsi r15, r16, 5 ; nor r5, r6, r7 }
+	{ ld4u r25, r26 ; shrsi r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ ld4u r25, r26 ; shru r15, r16, r17 ; clz r5, r6 }
+	{ ld4u r25, r26 ; shru r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ ld4u r25, r26 ; shru r5, r6, r7 ; move r15, r16 }
+	{ ld4u r25, r26 ; shrui r15, r16, 5 ; cmpne r5, r6, r7 }
+	{ ld4u r25, r26 ; shrui r15, r16, 5 ; subx r5, r6, r7 }
+	{ ld4u r25, r26 ; shrui r5, r6, 5 ; shl1addx r15, r16, r17 }
+	{ ld4u r25, r26 ; sub r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ ld4u r25, r26 ; sub r5, r6, r7 ; addxi r15, r16, 5 }
+	{ ld4u r25, r26 ; sub r5, r6, r7 ; sub r15, r16, r17 }
+	{ ld4u r25, r26 ; subx r15, r16, r17 ; nor r5, r6, r7 }
+	{ ld4u r25, r26 ; subx r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ ld4u r25, r26 ; tblidxb0 r5, r6 ; cmpeq r15, r16, r17 }
+	{ ld4u r25, r26 ; tblidxb0 r5, r6 }
+	{ ld4u r25, r26 ; tblidxb1 r5, r6 ; shrs r15, r16, r17 }
+	{ ld4u r25, r26 ; tblidxb2 r5, r6 ; shl1add r15, r16, r17 }
+	{ ld4u r25, r26 ; tblidxb3 r5, r6 ; mz r15, r16, r17 }
+	{ ld4u r25, r26 ; xor r15, r16, r17 ; fnop }
+	{ ld4u r25, r26 ; xor r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ ld4u r25, r26 ; xor r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ ld4u_add r15, r16, 5 ; cmulfr r5, r6, r7 }
+	{ ld4u_add r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ ld4u_add r15, r16, 5 ; shrux r5, r6, r7 }
+	{ ld4u_add r15, r16, 5 ; v1mnz r5, r6, r7 }
+	{ ld4u_add r15, r16, 5 ; v2mults r5, r6, r7 }
+	{ ld_add r15, r16, 5 ; bfexts r5, r6, 5, 7 }
+	{ ld_add r15, r16, 5 ; fsingle_mul1 r5, r6, r7 }
+	{ ld_add r15, r16, 5 ; revbits r5, r6 }
+	{ ld_add r15, r16, 5 ; v1cmpltu r5, r6, r7 }
+	{ ld_add r15, r16, 5 ; v2cmpeqi r5, r6, 5 }
+	{ ld_add r15, r16, 5 ; v4int_l r5, r6, r7 }
+	{ ldna r15, r16 ; cmulhr r5, r6, r7 }
+	{ ldna r15, r16 ; mul_lu_lu r5, r6, r7 }
+	{ ldna r15, r16 ; shufflebytes r5, r6, r7 }
+	{ ldna r15, r16 ; v1mulu r5, r6, r7 }
+	{ ldna r15, r16 ; v2packh r5, r6, r7 }
+	{ ldna_add r15, r16, 5 ; bfins r5, r6, 5, 7 }
+	{ ldna_add r15, r16, 5 ; fsingle_pack1 r5, r6 }
+	{ ldna_add r15, r16, 5 ; rotl r5, r6, r7 }
+	{ ldna_add r15, r16, 5 ; v1cmpne r5, r6, r7 }
+	{ ldna_add r15, r16, 5 ; v2cmpleu r5, r6, r7 }
+	{ ldna_add r15, r16, 5 ; v4shl r5, r6, r7 }
+	{ ldnt r15, r16 ; crc32_8 r5, r6, r7 }
+	{ ldnt r15, r16 ; mula_hs_hu r5, r6, r7 }
+	{ ldnt r15, r16 ; subx r5, r6, r7 }
+	{ ldnt r15, r16 ; v1mz r5, r6, r7 }
+	{ ldnt r15, r16 ; v2packuc r5, r6, r7 }
+	{ ldnt1s r15, r16 ; cmoveqz r5, r6, r7 }
+	{ ldnt1s r15, r16 ; fsingle_sub1 r5, r6, r7 }
+	{ ldnt1s r15, r16 ; shl r5, r6, r7 }
+	{ ldnt1s r15, r16 ; v1ddotpua r5, r6, r7 }
+	{ ldnt1s r15, r16 ; v2cmpltsi r5, r6, 5 }
+	{ ldnt1s r15, r16 ; v4shrs r5, r6, r7 }
+	{ ldnt1s_add r15, r16, 5 ; dblalign r5, r6, r7 }
+	{ ldnt1s_add r15, r16, 5 ; mula_hs_lu r5, r6, r7 }
+	{ ldnt1s_add r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ ldnt1s_add r15, r16, 5 ; v1sadu r5, r6, r7 }
+	{ ldnt1s_add r15, r16, 5 ; v2sadau r5, r6, r7 }
+	{ ldnt1u r15, r16 ; cmpeq r5, r6, r7 }
+	{ ldnt1u r15, r16 ; infol 0x1234 }
+	{ ldnt1u r15, r16 ; shl1add r5, r6, r7 }
+	{ ldnt1u r15, r16 ; v1ddotpusa r5, r6, r7 }
+	{ ldnt1u r15, r16 ; v2cmpltui r5, r6, 5 }
+	{ ldnt1u r15, r16 ; v4sub r5, r6, r7 }
+	{ ldnt1u_add r15, r16, 5 ; dblalign4 r5, r6, r7 }
+	{ ldnt1u_add r15, r16, 5 ; mula_hu_ls r5, r6, r7 }
+	{ ldnt1u_add r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ ldnt1u_add r15, r16, 5 ; v1shli r5, r6, 5 }
+	{ ldnt1u_add r15, r16, 5 ; v2sadu r5, r6, r7 }
+	{ ldnt2s r15, r16 ; cmples r5, r6, r7 }
+	{ ldnt2s r15, r16 ; mnz r5, r6, r7 }
+	{ ldnt2s r15, r16 ; shl2add r5, r6, r7 }
+	{ ldnt2s r15, r16 ; v1dotpa r5, r6, r7 }
+	{ ldnt2s r15, r16 ; v2dotp r5, r6, r7 }
+	{ ldnt2s r15, r16 ; xor r5, r6, r7 }
+	{ ldnt2s_add r15, r16, 5 ; fdouble_add_flags r5, r6, r7 }
+	{ ldnt2s_add r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ ldnt2s_add r15, r16, 5 ; v1add r5, r6, r7 }
+	{ ldnt2s_add r15, r16, 5 ; v1shrsi r5, r6, 5 }
+	{ ldnt2s_add r15, r16, 5 ; v2shli r5, r6, 5 }
+	{ ldnt2u r15, r16 ; cmplts r5, r6, r7 }
+	{ ldnt2u r15, r16 ; movei r5, 5 }
+	{ ldnt2u r15, r16 ; shl3add r5, r6, r7 }
+	{ ldnt2u r15, r16 ; v1dotpua r5, r6, r7 }
+	{ ldnt2u r15, r16 ; v2int_h r5, r6, r7 }
+	{ ldnt2u_add r15, r16, 5 ; add r5, r6, r7 }
+	{ ldnt2u_add r15, r16, 5 ; fdouble_mul_flags r5, r6, r7 }
+	{ ldnt2u_add r15, r16, 5 ; mula_lu_lu r5, r6, r7 }
+	{ ldnt2u_add r15, r16, 5 ; v1adduc r5, r6, r7 }
+	{ ldnt2u_add r15, r16, 5 ; v1shrui r5, r6, 5 }
+	{ ldnt2u_add r15, r16, 5 ; v2shrs r5, r6, r7 }
+	{ ldnt4s r15, r16 ; cmpltu r5, r6, r7 }
+	{ ldnt4s r15, r16 ; mul_hs_hs r5, r6, r7 }
+	{ ldnt4s r15, r16 ; shli r5, r6, 5 }
+	{ ldnt4s r15, r16 ; v1dotpusa r5, r6, r7 }
+	{ ldnt4s r15, r16 ; v2maxs r5, r6, r7 }
+	{ ldnt4s_add r15, r16, 5 ; addli r5, r6, 0x1234 }
+	{ ldnt4s_add r15, r16, 5 ; fdouble_pack2 r5, r6, r7 }
+	{ ldnt4s_add r15, r16, 5 ; mulx r5, r6, r7 }
+	{ ldnt4s_add r15, r16, 5 ; v1avgu r5, r6, r7 }
+	{ ldnt4s_add r15, r16, 5 ; v1subuc r5, r6, r7 }
+	{ ldnt4s_add r15, r16, 5 ; v2shru r5, r6, r7 }
+	{ ldnt4u r15, r16 ; cmpne r5, r6, r7 }
+	{ ldnt4u r15, r16 ; mul_hs_ls r5, r6, r7 }
+	{ ldnt4u r15, r16 ; shlxi r5, r6, 5 }
+	{ ldnt4u r15, r16 ; v1int_l r5, r6, r7 }
+	{ ldnt4u r15, r16 ; v2mins r5, r6, r7 }
+	{ ldnt4u_add r15, r16, 5 ; addxi r5, r6, 5 }
+	{ ldnt4u_add r15, r16, 5 ; fdouble_unpack_max r5, r6, r7 }
+	{ ldnt4u_add r15, r16, 5 ; nop }
+	{ ldnt4u_add r15, r16, 5 ; v1cmpeqi r5, r6, 5 }
+	{ ldnt4u_add r15, r16, 5 ; v2addi r5, r6, 5 }
+	{ ldnt4u_add r15, r16, 5 ; v2sub r5, r6, r7 }
+	{ ldnt_add r15, r16, 5 ; cmula r5, r6, r7 }
+	{ ldnt_add r15, r16, 5 ; mul_hu_hu r5, r6, r7 }
+	{ ldnt_add r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ ldnt_add r15, r16, 5 ; v1maxui r5, r6, 5 }
+	{ ldnt_add r15, r16, 5 ; v2mnz r5, r6, r7 }
+	{ lnk r15 ; add r5, r6, r7 ; ld4u r25, r26 }
+	{ lnk r15 ; addx r5, r6, r7 ; prefetch r25 }
+	{ lnk r15 ; and r5, r6, r7 ; prefetch r25 }
+	{ lnk r15 ; clz r5, r6 ; ld4u r25, r26 }
+	{ lnk r15 ; cmovnez r5, r6, r7 ; prefetch_l1 r25 }
+	{ lnk r15 ; cmpeqi r5, r6, 5 ; prefetch_l2 r25 }
+	{ lnk r15 ; cmpleu r5, r6, r7 ; prefetch_l3 r25 }
+	{ lnk r15 ; cmpltsi r5, r6, 5 ; st r25, r26 }
+	{ lnk r15 ; cmpne r5, r6, r7 ; st1 r25, r26 }
+	{ lnk r15 ; fdouble_pack2 r5, r6, r7 }
+	{ lnk r15 ; fsingle_pack1 r5, r6 ; prefetch_l3_fault r25 }
+	{ lnk r15 ; ld r25, r26 ; cmpleu r5, r6, r7 }
+	{ lnk r15 ; ld r25, r26 ; shrsi r5, r6, 5 }
+	{ lnk r15 ; ld1s r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ lnk r15 ; ld1u r25, r26 ; clz r5, r6 }
+	{ lnk r15 ; ld1u r25, r26 ; shl2add r5, r6, r7 }
+	{ lnk r15 ; ld2s r25, r26 ; movei r5, 5 }
+	{ lnk r15 ; ld2u r25, r26 ; add r5, r6, r7 }
+	{ lnk r15 ; ld2u r25, r26 ; revbytes r5, r6 }
+	{ lnk r15 ; ld4s r25, r26 ; ctz r5, r6 }
+	{ lnk r15 ; ld4s r25, r26 ; tblidxb0 r5, r6 }
+	{ lnk r15 ; ld4u r25, r26 ; mz r5, r6, r7 }
+	{ lnk r15 ; mnz r5, r6, r7 ; prefetch_l2 r25 }
+	{ lnk r15 ; movei r5, 5 ; prefetch_l3 r25 }
+	{ lnk r15 ; mul_hu_hu r5, r6, r7 ; prefetch_l2 r25 }
+	{ lnk r15 ; mul_lu_lu r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ lnk r15 ; mula_hu_hu r5, r6, r7 ; prefetch_l1 r25 }
+	{ lnk r15 ; mula_lu_lu r5, r6, r7 ; prefetch r25 }
+	{ lnk r15 ; mulx r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ lnk r15 ; nop ; prefetch_l2_fault r25 }
+	{ lnk r15 ; or r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ lnk r15 ; prefetch r25 ; cmpltsi r5, r6, 5 }
+	{ lnk r15 ; prefetch r25 ; shrui r5, r6, 5 }
+	{ lnk r15 ; prefetch_l1 r25 ; mula_lu_lu r5, r6, r7 }
+	{ lnk r15 ; prefetch_l1_fault r25 ; cmovnez r5, r6, r7 }
+	{ lnk r15 ; prefetch_l1_fault r25 ; shl3add r5, r6, r7 }
+	{ lnk r15 ; prefetch_l2 r25 ; mul_hu_hu r5, r6, r7 }
+	{ lnk r15 ; prefetch_l2_fault r25 ; addx r5, r6, r7 }
+	{ lnk r15 ; prefetch_l2_fault r25 ; rotli r5, r6, 5 }
+	{ lnk r15 ; prefetch_l3 r25 ; fsingle_pack1 r5, r6 }
+	{ lnk r15 ; prefetch_l3 r25 ; tblidxb2 r5, r6 }
+	{ lnk r15 ; prefetch_l3_fault r25 ; nor r5, r6, r7 }
+	{ lnk r15 ; revbits r5, r6 ; prefetch_l3_fault r25 }
+	{ lnk r15 ; rotl r5, r6, r7 ; st1 r25, r26 }
+	{ lnk r15 ; shl r5, r6, r7 ; st4 r25, r26 }
+	{ lnk r15 ; shl1addx r5, r6, r7 }
+	{ lnk r15 ; shl3add r5, r6, r7 ; ld1s r25, r26 }
+	{ lnk r15 ; shli r5, r6, 5 ; ld2s r25, r26 }
+	{ lnk r15 ; shrsi r5, r6, 5 ; ld2s r25, r26 }
+	{ lnk r15 ; shrui r5, r6, 5 ; ld4s r25, r26 }
+	{ lnk r15 ; st r25, r26 ; movei r5, 5 }
+	{ lnk r15 ; st1 r25, r26 ; add r5, r6, r7 }
+	{ lnk r15 ; st1 r25, r26 ; revbytes r5, r6 }
+	{ lnk r15 ; st2 r25, r26 ; ctz r5, r6 }
+	{ lnk r15 ; st2 r25, r26 ; tblidxb0 r5, r6 }
+	{ lnk r15 ; st4 r25, r26 ; mz r5, r6, r7 }
+	{ lnk r15 ; sub r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ lnk r15 ; tblidxb0 r5, r6 ; prefetch_l3 r25 }
+	{ lnk r15 ; tblidxb2 r5, r6 ; st r25, r26 }
+	{ lnk r15 ; v1ddotpus r5, r6, r7 }
+	{ lnk r15 ; v2cmpltu r5, r6, r7 }
+	{ lnk r15 ; v4shru r5, r6, r7 }
+	{ mf ; cmples r5, r6, r7 }
+	{ mf ; mnz r5, r6, r7 }
+	{ mf ; shl2add r5, r6, r7 }
+	{ mf ; v1dotpa r5, r6, r7 }
+	{ mf ; v2dotp r5, r6, r7 }
+	{ mf ; xor r5, r6, r7 }
+	{ mfspr r16, 0x5 ; fdouble_add_flags r5, r6, r7 }
+	{ mfspr r16, 0x5 ; mula_ls_ls r5, r6, r7 }
+	{ mfspr r16, 0x5 ; v1add r5, r6, r7 }
+	{ mfspr r16, 0x5 ; v1shrsi r5, r6, 5 }
+	{ mfspr r16, 0x5 ; v2shli r5, r6, 5 }
+	{ mm r5, r6, 5, 7 ; cmpne r15, r16, r17 }
+	{ mm r5, r6, 5, 7 ; ld4u r15, r16 }
+	{ mm r5, r6, 5, 7 ; prefetch_l1_fault r15 }
+	{ mm r5, r6, 5, 7 ; stnt_add r15, r16, 5 }
+	{ mm r5, r6, 5, 7 ; v2cmpltsi r15, r16, 5 }
+	{ mnz r15, r16, r17 ; add r5, r6, r7 ; ld1u r25, r26 }
+	{ mnz r15, r16, r17 ; addx r5, r6, r7 ; ld2s r25, r26 }
+	{ mnz r15, r16, r17 ; and r5, r6, r7 ; ld2s r25, r26 }
+	{ mnz r15, r16, r17 ; clz r5, r6 ; ld1u r25, r26 }
+	{ mnz r15, r16, r17 ; cmovnez r5, r6, r7 ; ld2u r25, r26 }
+	{ mnz r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+	{ mnz r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l1 r25 }
+	{ mnz r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+	{ mnz r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ mnz r15, r16, r17 ; fdouble_add_flags r5, r6, r7 }
+	{ mnz r15, r16, r17 ; fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 }
+	{ mnz r15, r16, r17 ; ld r25, r26 ; cmovnez r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld r25, r26 ; shl3add r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld1s r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld1u r25, r26 ; addx r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld1u r25, r26 ; rotli r5, r6, 5 }
+	{ mnz r15, r16, r17 ; ld2s r25, r26 ; fsingle_pack1 r5, r6 }
+	{ mnz r15, r16, r17 ; ld2s r25, r26 ; tblidxb2 r5, r6 }
+	{ mnz r15, r16, r17 ; ld2u r25, r26 ; nor r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld4s r25, r26 ; cmplts r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld4s r25, r26 ; shru r5, r6, r7 }
+	{ mnz r15, r16, r17 ; ld4u r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ mnz r15, r16, r17 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+	{ mnz r15, r16, r17 ; movei r5, 5 ; prefetch_l1 r25 }
+	{ mnz r15, r16, r17 ; mul_hu_hu r5, r6, r7 ; ld4u r25, r26 }
+	{ mnz r15, r16, r17 ; mul_lu_lu r5, r6, r7 ; ld4s r25, r26 }
+	{ mnz r15, r16, r17 ; mula_hu_hu r5, r6, r7 ; ld2u r25, r26 }
+	{ mnz r15, r16, r17 ; mula_lu_lu r5, r6, r7 ; ld2s r25, r26 }
+	{ mnz r15, r16, r17 ; mulx r5, r6, r7 ; ld4s r25, r26 }
+	{ mnz r15, r16, r17 ; nop ; prefetch r25 }
+	{ mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ mnz r15, r16, r17 ; prefetch r25 ; cmpeqi r5, r6, 5 }
+	{ mnz r15, r16, r17 ; prefetch r25 ; shli r5, r6, 5 }
+	{ mnz r15, r16, r17 ; prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l1_fault r25 ; and r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l2 r25 ; mnz r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l2 r25 ; xor r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l2_fault r25 ; pcnt r5, r6 }
+	{ mnz r15, r16, r17 ; prefetch_l3 r25 ; cmpltu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l3 r25 ; sub r5, r6, r7 }
+	{ mnz r15, r16, r17 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 }
+	{ mnz r15, r16, r17 ; revbits r5, r6 ; prefetch_l1_fault r25 }
+	{ mnz r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ mnz r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ mnz r15, r16, r17 ; shl1addx r5, r6, r7 ; st r25, r26 }
+	{ mnz r15, r16, r17 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+	{ mnz r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ mnz r15, r16, r17 ; shrs r5, r6, r7 }
+	{ mnz r15, r16, r17 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+	{ mnz r15, r16, r17 ; st r25, r26 ; fsingle_pack1 r5, r6 }
+	{ mnz r15, r16, r17 ; st r25, r26 ; tblidxb2 r5, r6 }
+	{ mnz r15, r16, r17 ; st1 r25, r26 ; nor r5, r6, r7 }
+	{ mnz r15, r16, r17 ; st2 r25, r26 ; cmplts r5, r6, r7 }
+	{ mnz r15, r16, r17 ; st2 r25, r26 ; shru r5, r6, r7 }
+	{ mnz r15, r16, r17 ; st4 r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ mnz r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+	{ mnz r15, r16, r17 ; tblidxb0 r5, r6 ; prefetch_l1 r25 }
+	{ mnz r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch_l2 r25 }
+	{ mnz r15, r16, r17 ; v1cmpltui r5, r6, 5 }
+	{ mnz r15, r16, r17 ; v2cmples r5, r6, r7 }
+	{ mnz r15, r16, r17 ; v4packsc r5, r6, r7 }
+	{ mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mnz r5, r6, r7 ; addx r15, r16, r17 ; st r25, r26 }
+	{ mnz r5, r6, r7 ; and r15, r16, r17 ; st r25, r26 }
+	{ mnz r5, r6, r7 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+	{ mnz r5, r6, r7 ; cmples r15, r16, r17 ; st2 r25, r26 }
+	{ mnz r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ mnz r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 }
+	{ mnz r5, r6, r7 ; fnop ; ld2u r25, r26 }
+	{ mnz r5, r6, r7 ; info 19 ; ld4s r25, r26 }
+	{ mnz r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 }
+	{ mnz r5, r6, r7 ; jrp r15 ; ld4u r25, r26 }
+	{ mnz r5, r6, r7 ; ld r25, r26 ; nop }
+	{ mnz r5, r6, r7 ; ld1s r25, r26 ; jalrp r15 }
+	{ mnz r5, r6, r7 ; ld1u r25, r26 ; cmpleu r15, r16, r17 }
+	{ mnz r5, r6, r7 ; ld2s r25, r26 ; add r15, r16, r17 }
+	{ mnz r5, r6, r7 ; ld2s r25, r26 ; shrsi r15, r16, 5 }
+	{ mnz r5, r6, r7 ; ld2u r25, r26 ; shl r15, r16, r17 }
+	{ mnz r5, r6, r7 ; ld4s r25, r26 ; mnz r15, r16, r17 }
+	{ mnz r5, r6, r7 ; ld4u r25, r26 ; cmpne r15, r16, r17 }
+	{ mnz r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+	{ mnz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ mnz r5, r6, r7 ; movei r15, 5 ; prefetch_l1_fault r25 }
+	{ mnz r5, r6, r7 ; nop ; prefetch_l1_fault r25 }
+	{ mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ mnz r5, r6, r7 ; prefetch r25 ; rotli r15, r16, 5 }
+	{ mnz r5, r6, r7 ; prefetch_l1 r25 ; info 19 }
+	{ mnz r5, r6, r7 ; prefetch_l1_fault r25 ; cmples r15, r16, r17 }
+	{ mnz r5, r6, r7 ; prefetch_l2 r25 ; add r15, r16, r17 }
+	{ mnz r5, r6, r7 ; prefetch_l2 r25 ; shrsi r15, r16, 5 }
+	{ mnz r5, r6, r7 ; prefetch_l2_fault r25 ; shl1add r15, r16, r17 }
+	{ mnz r5, r6, r7 ; prefetch_l3 r25 ; movei r15, 5 }
+	{ mnz r5, r6, r7 ; prefetch_l3_fault r25 ; info 19 }
+	{ mnz r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1 r25 }
+	{ mnz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+	{ mnz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ mnz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mnz r5, r6, r7 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+	{ mnz r5, r6, r7 ; shrs r15, r16, r17 ; st1 r25, r26 }
+	{ mnz r5, r6, r7 ; shru r15, r16, r17 ; st4 r25, r26 }
+	{ mnz r5, r6, r7 ; st r25, r26 ; info 19 }
+	{ mnz r5, r6, r7 ; st1 r25, r26 ; cmples r15, r16, r17 }
+	{ mnz r5, r6, r7 ; st2 r15, r16 }
+	{ mnz r5, r6, r7 ; st2 r25, r26 ; shrs r15, r16, r17 }
+	{ mnz r5, r6, r7 ; st4 r25, r26 ; rotli r15, r16, 5 }
+	{ mnz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mnz r5, r6, r7 ; v1maxu r15, r16, r17 }
+	{ mnz r5, r6, r7 ; v2shrs r15, r16, r17 }
+	{ move r15, r16 ; add r5, r6, r7 ; ld1u r25, r26 }
+	{ move r15, r16 ; addx r5, r6, r7 ; ld2s r25, r26 }
+	{ move r15, r16 ; and r5, r6, r7 ; ld2s r25, r26 }
+	{ move r15, r16 ; clz r5, r6 ; ld1u r25, r26 }
+	{ move r15, r16 ; cmovnez r5, r6, r7 ; ld2u r25, r26 }
+	{ move r15, r16 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+	{ move r15, r16 ; cmpleu r5, r6, r7 ; prefetch_l1 r25 }
+	{ move r15, r16 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+	{ move r15, r16 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ move r15, r16 ; fdouble_add_flags r5, r6, r7 }
+	{ move r15, r16 ; fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 }
+	{ move r15, r16 ; ld r25, r26 ; cmovnez r5, r6, r7 }
+	{ move r15, r16 ; ld r25, r26 ; shl3add r5, r6, r7 }
+	{ move r15, r16 ; ld1s r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ move r15, r16 ; ld1u r25, r26 ; addx r5, r6, r7 }
+	{ move r15, r16 ; ld1u r25, r26 ; rotli r5, r6, 5 }
+	{ move r15, r16 ; ld2s r25, r26 ; fsingle_pack1 r5, r6 }
+	{ move r15, r16 ; ld2s r25, r26 ; tblidxb2 r5, r6 }
+	{ move r15, r16 ; ld2u r25, r26 ; nor r5, r6, r7 }
+	{ move r15, r16 ; ld4s r25, r26 ; cmplts r5, r6, r7 }
+	{ move r15, r16 ; ld4s r25, r26 ; shru r5, r6, r7 }
+	{ move r15, r16 ; ld4u r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ move r15, r16 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+	{ move r15, r16 ; movei r5, 5 ; prefetch_l1 r25 }
+	{ move r15, r16 ; mul_hu_hu r5, r6, r7 ; ld4u r25, r26 }
+	{ move r15, r16 ; mul_lu_lu r5, r6, r7 ; ld4s r25, r26 }
+	{ move r15, r16 ; mula_hu_hu r5, r6, r7 ; ld2u r25, r26 }
+	{ move r15, r16 ; mula_lu_lu r5, r6, r7 ; ld2s r25, r26 }
+	{ move r15, r16 ; mulx r5, r6, r7 ; ld4s r25, r26 }
+	{ move r15, r16 ; nop ; prefetch r25 }
+	{ move r15, r16 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ move r15, r16 ; prefetch r25 ; cmpeqi r5, r6, 5 }
+	{ move r15, r16 ; prefetch r25 ; shli r5, r6, 5 }
+	{ move r15, r16 ; prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l1_fault r25 ; and r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l2 r25 ; mnz r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l2 r25 ; xor r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l2_fault r25 ; pcnt r5, r6 }
+	{ move r15, r16 ; prefetch_l3 r25 ; cmpltu r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l3 r25 ; sub r5, r6, r7 }
+	{ move r15, r16 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 }
+	{ move r15, r16 ; revbits r5, r6 ; prefetch_l1_fault r25 }
+	{ move r15, r16 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ move r15, r16 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ move r15, r16 ; shl1addx r5, r6, r7 ; st r25, r26 }
+	{ move r15, r16 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+	{ move r15, r16 ; shl3addx r5, r6, r7 }
+	{ move r15, r16 ; shrs r5, r6, r7 }
+	{ move r15, r16 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+	{ move r15, r16 ; st r25, r26 ; fsingle_pack1 r5, r6 }
+	{ move r15, r16 ; st r25, r26 ; tblidxb2 r5, r6 }
+	{ move r15, r16 ; st1 r25, r26 ; nor r5, r6, r7 }
+	{ move r15, r16 ; st2 r25, r26 ; cmplts r5, r6, r7 }
+	{ move r15, r16 ; st2 r25, r26 ; shru r5, r6, r7 }
+	{ move r15, r16 ; st4 r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ move r15, r16 ; sub r5, r6, r7 ; prefetch r25 }
+	{ move r15, r16 ; tblidxb0 r5, r6 ; prefetch_l1 r25 }
+	{ move r15, r16 ; tblidxb2 r5, r6 ; prefetch_l2 r25 }
+	{ move r15, r16 ; v1cmpltui r5, r6, 5 }
+	{ move r15, r16 ; v2cmples r5, r6, r7 }
+	{ move r15, r16 ; v4packsc r5, r6, r7 }
+	{ move r5, r6 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ move r5, r6 ; addx r15, r16, r17 ; st r25, r26 }
+	{ move r5, r6 ; and r15, r16, r17 ; st r25, r26 }
+	{ move r5, r6 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+	{ move r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 }
+	{ move r5, r6 ; cmplts r15, r16, r17 }
+	{ move r5, r6 ; cmpne r15, r16, r17 ; ld r25, r26 }
+	{ move r5, r6 ; fnop ; ld2u r25, r26 }
+	{ move r5, r6 ; info 19 ; ld4s r25, r26 }
+	{ move r5, r6 ; jalrp r15 ; ld2u r25, r26 }
+	{ move r5, r6 ; jrp r15 ; ld4u r25, r26 }
+	{ move r5, r6 ; ld r25, r26 ; nop }
+	{ move r5, r6 ; ld1s r25, r26 ; jalrp r15 }
+	{ move r5, r6 ; ld1u r25, r26 ; cmpleu r15, r16, r17 }
+	{ move r5, r6 ; ld2s r25, r26 ; add r15, r16, r17 }
+	{ move r5, r6 ; ld2s r25, r26 ; shrsi r15, r16, 5 }
+	{ move r5, r6 ; ld2u r25, r26 ; shl r15, r16, r17 }
+	{ move r5, r6 ; ld4s r25, r26 ; mnz r15, r16, r17 }
+	{ move r5, r6 ; ld4u r25, r26 ; cmpne r15, r16, r17 }
+	{ move r5, r6 ; ldnt1s_add r15, r16, 5 }
+	{ move r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ move r5, r6 ; movei r15, 5 ; prefetch_l1_fault r25 }
+	{ move r5, r6 ; nop ; prefetch_l1_fault r25 }
+	{ move r5, r6 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ move r5, r6 ; prefetch r25 ; rotli r15, r16, 5 }
+	{ move r5, r6 ; prefetch_l1 r25 ; info 19 }
+	{ move r5, r6 ; prefetch_l1_fault r25 ; cmples r15, r16, r17 }
+	{ move r5, r6 ; prefetch_l2 r25 ; add r15, r16, r17 }
+	{ move r5, r6 ; prefetch_l2 r25 ; shrsi r15, r16, 5 }
+	{ move r5, r6 ; prefetch_l2_fault r25 ; shl1add r15, r16, r17 }
+	{ move r5, r6 ; prefetch_l3 r25 ; movei r15, 5 }
+	{ move r5, r6 ; prefetch_l3_fault r25 ; info 19 }
+	{ move r5, r6 ; rotl r15, r16, r17 ; prefetch_l1 r25 }
+	{ move r5, r6 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+	{ move r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ move r5, r6 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ move r5, r6 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+	{ move r5, r6 ; shrs r15, r16, r17 ; st1 r25, r26 }
+	{ move r5, r6 ; shru r15, r16, r17 ; st4 r25, r26 }
+	{ move r5, r6 ; st r25, r26 ; info 19 }
+	{ move r5, r6 ; st1 r25, r26 ; cmples r15, r16, r17 }
+	{ move r5, r6 ; st2 r15, r16 }
+	{ move r5, r6 ; st2 r25, r26 ; shrs r15, r16, r17 }
+	{ move r5, r6 ; st4 r25, r26 ; rotli r15, r16, 5 }
+	{ move r5, r6 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ move r5, r6 ; v1maxu r15, r16, r17 }
+	{ move r5, r6 ; v2shrs r15, r16, r17 }
+	{ movei r15, 5 ; add r5, r6, r7 ; ld1u r25, r26 }
+	{ movei r15, 5 ; addx r5, r6, r7 ; ld2s r25, r26 }
+	{ movei r15, 5 ; and r5, r6, r7 ; ld2s r25, r26 }
+	{ movei r15, 5 ; clz r5, r6 ; ld1u r25, r26 }
+	{ movei r15, 5 ; cmovnez r5, r6, r7 ; ld2u r25, r26 }
+	{ movei r15, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 }
+	{ movei r15, 5 ; cmpleu r5, r6, r7 ; prefetch_l1 r25 }
+	{ movei r15, 5 ; cmpltsi r5, r6, 5 ; prefetch_l2 r25 }
+	{ movei r15, 5 ; cmpne r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ movei r15, 5 ; fdouble_add_flags r5, r6, r7 }
+	{ movei r15, 5 ; fsingle_pack1 r5, r6 ; prefetch_l1_fault r25 }
+	{ movei r15, 5 ; ld r25, r26 ; cmovnez r5, r6, r7 }
+	{ movei r15, 5 ; ld r25, r26 ; shl3add r5, r6, r7 }
+	{ movei r15, 5 ; ld1s r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ movei r15, 5 ; ld1u r25, r26 ; addx r5, r6, r7 }
+	{ movei r15, 5 ; ld1u r25, r26 ; rotli r5, r6, 5 }
+	{ movei r15, 5 ; ld2s r25, r26 ; fsingle_pack1 r5, r6 }
+	{ movei r15, 5 ; ld2s r25, r26 ; tblidxb2 r5, r6 }
+	{ movei r15, 5 ; ld2u r25, r26 ; nor r5, r6, r7 }
+	{ movei r15, 5 ; ld4s r25, r26 ; cmplts r5, r6, r7 }
+	{ movei r15, 5 ; ld4s r25, r26 ; shru r5, r6, r7 }
+	{ movei r15, 5 ; ld4u r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ movei r15, 5 ; mnz r5, r6, r7 ; ld4u r25, r26 }
+	{ movei r15, 5 ; movei r5, 5 ; prefetch_l1 r25 }
+	{ movei r15, 5 ; mul_hu_hu r5, r6, r7 ; ld4u r25, r26 }
+	{ movei r15, 5 ; mul_lu_lu r5, r6, r7 ; ld4s r25, r26 }
+	{ movei r15, 5 ; mula_hu_hu r5, r6, r7 ; ld2u r25, r26 }
+	{ movei r15, 5 ; mula_lu_lu r5, r6, r7 ; ld2s r25, r26 }
+	{ movei r15, 5 ; mulx r5, r6, r7 ; ld4s r25, r26 }
+	{ movei r15, 5 ; nop ; prefetch r25 }
+	{ movei r15, 5 ; or r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ movei r15, 5 ; prefetch r25 ; cmpeqi r5, r6, 5 }
+	{ movei r15, 5 ; prefetch r25 ; shli r5, r6, 5 }
+	{ movei r15, 5 ; prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l1_fault r25 ; and r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l1_fault r25 ; shl1add r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l2 r25 ; mnz r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l2 r25 ; xor r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l2_fault r25 ; pcnt r5, r6 }
+	{ movei r15, 5 ; prefetch_l3 r25 ; cmpltu r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l3 r25 ; sub r5, r6, r7 }
+	{ movei r15, 5 ; prefetch_l3_fault r25 ; mulax r5, r6, r7 }
+	{ movei r15, 5 ; revbits r5, r6 ; prefetch_l1_fault r25 }
+	{ movei r15, 5 ; rotl r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ movei r15, 5 ; shl r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ movei r15, 5 ; shl1addx r5, r6, r7 ; st r25, r26 }
+	{ movei r15, 5 ; shl2addx r5, r6, r7 ; st2 r25, r26 }
+	{ movei r15, 5 ; shl3addx r5, r6, r7 }
+	{ movei r15, 5 ; shrs r5, r6, r7 }
+	{ movei r15, 5 ; shrui r5, r6, 5 ; ld1s r25, r26 }
+	{ movei r15, 5 ; st r25, r26 ; fsingle_pack1 r5, r6 }
+	{ movei r15, 5 ; st r25, r26 ; tblidxb2 r5, r6 }
+	{ movei r15, 5 ; st1 r25, r26 ; nor r5, r6, r7 }
+	{ movei r15, 5 ; st2 r25, r26 ; cmplts r5, r6, r7 }
+	{ movei r15, 5 ; st2 r25, r26 ; shru r5, r6, r7 }
+	{ movei r15, 5 ; st4 r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ movei r15, 5 ; sub r5, r6, r7 ; prefetch r25 }
+	{ movei r15, 5 ; tblidxb0 r5, r6 ; prefetch_l1 r25 }
+	{ movei r15, 5 ; tblidxb2 r5, r6 ; prefetch_l2 r25 }
+	{ movei r15, 5 ; v1cmpltui r5, r6, 5 }
+	{ movei r15, 5 ; v2cmples r5, r6, r7 }
+	{ movei r15, 5 ; v4packsc r5, r6, r7 }
+	{ movei r5, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ movei r5, 5 ; addx r15, r16, r17 ; st r25, r26 }
+	{ movei r5, 5 ; and r15, r16, r17 ; st r25, r26 }
+	{ movei r5, 5 ; cmpeq r15, r16, r17 ; st2 r25, r26 }
+	{ movei r5, 5 ; cmples r15, r16, r17 ; st2 r25, r26 }
+	{ movei r5, 5 ; cmplts r15, r16, r17 }
+	{ movei r5, 5 ; cmpne r15, r16, r17 ; ld r25, r26 }
+	{ movei r5, 5 ; fnop ; ld2u r25, r26 }
+	{ movei r5, 5 ; info 19 ; ld4s r25, r26 }
+	{ movei r5, 5 ; jalrp r15 ; ld2u r25, r26 }
+	{ movei r5, 5 ; jrp r15 ; ld4u r25, r26 }
+	{ movei r5, 5 ; ld r25, r26 ; nop }
+	{ movei r5, 5 ; ld1s r25, r26 ; jalrp r15 }
+	{ movei r5, 5 ; ld1u r25, r26 ; cmpleu r15, r16, r17 }
+	{ movei r5, 5 ; ld2s r25, r26 ; add r15, r16, r17 }
+	{ movei r5, 5 ; ld2s r25, r26 ; shrsi r15, r16, 5 }
+	{ movei r5, 5 ; ld2u r25, r26 ; shl r15, r16, r17 }
+	{ movei r5, 5 ; ld4s r25, r26 ; mnz r15, r16, r17 }
+	{ movei r5, 5 ; ld4u r25, r26 ; cmpne r15, r16, r17 }
+	{ movei r5, 5 ; ldnt1s_add r15, r16, 5 }
+	{ movei r5, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ movei r5, 5 ; movei r15, 5 ; prefetch_l1_fault r25 }
+	{ movei r5, 5 ; nop ; prefetch_l1_fault r25 }
+	{ movei r5, 5 ; or r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ movei r5, 5 ; prefetch r25 ; rotli r15, r16, 5 }
+	{ movei r5, 5 ; prefetch_l1 r25 ; info 19 }
+	{ movei r5, 5 ; prefetch_l1_fault r25 ; cmples r15, r16, r17 }
+	{ movei r5, 5 ; prefetch_l2 r25 ; add r15, r16, r17 }
+	{ movei r5, 5 ; prefetch_l2 r25 ; shrsi r15, r16, 5 }
+	{ movei r5, 5 ; prefetch_l2_fault r25 ; shl1add r15, r16, r17 }
+	{ movei r5, 5 ; prefetch_l3 r25 ; movei r15, 5 }
+	{ movei r5, 5 ; prefetch_l3_fault r25 ; info 19 }
+	{ movei r5, 5 ; rotl r15, r16, r17 ; prefetch_l1 r25 }
+	{ movei r5, 5 ; shl r15, r16, r17 ; prefetch_l2 r25 }
+	{ movei r5, 5 ; shl1addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ movei r5, 5 ; shl2addx r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ movei r5, 5 ; shl3addx r15, r16, r17 ; st1 r25, r26 }
+	{ movei r5, 5 ; shrs r15, r16, r17 ; st1 r25, r26 }
+	{ movei r5, 5 ; shru r15, r16, r17 ; st4 r25, r26 }
+	{ movei r5, 5 ; st r25, r26 ; info 19 }
+	{ movei r5, 5 ; st1 r25, r26 ; cmples r15, r16, r17 }
+	{ movei r5, 5 ; st2 r15, r16 }
+	{ movei r5, 5 ; st2 r25, r26 ; shrs r15, r16, r17 }
+	{ movei r5, 5 ; st4 r25, r26 ; rotli r15, r16, 5 }
+	{ movei r5, 5 ; sub r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ movei r5, 5 ; v1maxu r15, r16, r17 }
+	{ movei r5, 5 ; v2shrs r15, r16, r17 }
+	{ moveli r15, 0x1234 ; addli r5, r6, 0x1234 }
+	{ moveli r15, 0x1234 ; fdouble_pack2 r5, r6, r7 }
+	{ moveli r15, 0x1234 ; mulx r5, r6, r7 }
+	{ moveli r15, 0x1234 ; v1avgu r5, r6, r7 }
+	{ moveli r15, 0x1234 ; v1subuc r5, r6, r7 }
+	{ moveli r15, 0x1234 ; v2shru r5, r6, r7 }
+	{ moveli r5, 0x1234 ; dtlbpr r15 }
+	{ moveli r5, 0x1234 ; ldna_add r15, r16, 5 }
+	{ moveli r5, 0x1234 ; prefetch_l3_fault r15 }
+	{ moveli r5, 0x1234 ; v1add r15, r16, r17 }
+	{ moveli r5, 0x1234 ; v2int_h r15, r16, r17 }
+	{ mtspr 0x5, r16 ; addxsc r5, r6, r7 }
+	{ mtspr 0x5, r16 ; fnop }
+	{ mtspr 0x5, r16 ; or r5, r6, r7 }
+	{ mtspr 0x5, r16 ; v1cmpleu r5, r6, r7 }
+	{ mtspr 0x5, r16 ; v2adiffs r5, r6, r7 }
+	{ mtspr 0x5, r16 ; v4add r5, r6, r7 }
+	{ mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1 r25 }
+	{ mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ mul_hs_hs r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ mul_hs_hs r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ mul_hs_hs r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ mul_hs_hs r5, r6, r7 ; cmpne r15, r16, r17 ; st r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; fnop }
+	{ mul_hs_hs r5, r6, r7 ; infol 0x1234 }
+	{ mul_hs_hs r5, r6, r7 ; jalrp r15 }
+	{ mul_hs_hs r5, r6, r7 ; ld r25, r26 ; add r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; ld r25, r26 ; shrsi r15, r16, 5 }
+	{ mul_hs_hs r5, r6, r7 ; ld1s r25, r26 ; shl1add r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; ld1u r25, r26 ; move r15, r16 }
+	{ mul_hs_hs r5, r6, r7 ; ld2s r25, r26 ; fnop }
+	{ mul_hs_hs r5, r6, r7 ; ld2u r25, r26 ; andi r15, r16, 5 }
+	{ mul_hs_hs r5, r6, r7 ; ld2u r25, r26 ; xor r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; ld4s r25, r26 ; shl3add r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; ld4u r25, r26 ; nor r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; lnk r15 ; ld1u r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; move r15, r16 ; ld1u r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; ld1u r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; nor r15, r16, r17 ; ld2u r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch r25 ; and r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch r25 ; subx r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 ; rotli r15, r16, 5 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 ; mnz r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 ; fnop }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 ; cmpeq r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 ; shli r15, r16, 5 }
+	{ mul_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 ; rotli r15, r16, 5 }
+	{ mul_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; ld2s r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 ; ld2u r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 ; ld4u r25, r26 }
+	{ mul_hs_hs r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l1 r25 }
+	{ mul_hs_hs r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 }
+	{ mul_hs_hs r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l2 r25 }
+	{ mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l3 r25 }
+	{ mul_hs_hs r5, r6, r7 ; st r25, r26 ; rotli r15, r16, 5 }
+	{ mul_hs_hs r5, r6, r7 ; st1 r25, r26 ; mnz r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; st2 r25, r26 ; cmpne r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; st4 r25, r26 ; and r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; st4 r25, r26 ; subx r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l1 r25 }
+	{ mul_hs_hs r5, r6, r7 ; v2add r15, r16, r17 }
+	{ mul_hs_hs r5, r6, r7 ; v4shru r15, r16, r17 }
+	{ mul_hs_hu r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ mul_hs_hu r5, r6, r7 ; ld2u_add r15, r16, 5 }
+	{ mul_hs_hu r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+	{ mul_hs_hu r5, r6, r7 ; stnt2_add r15, r16, 5 }
+	{ mul_hs_hu r5, r6, r7 ; v2cmples r15, r16, r17 }
+	{ mul_hs_hu r5, r6, r7 ; xori r15, r16, 5 }
+	{ mul_hs_ls r5, r6, r7 ; ill }
+	{ mul_hs_ls r5, r6, r7 ; mf }
+	{ mul_hs_ls r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ mul_hs_ls r5, r6, r7 ; v1minu r15, r16, r17 }
+	{ mul_hs_ls r5, r6, r7 ; v2shru r15, r16, r17 }
+	{ mul_hs_lu r5, r6, r7 ; dblalign6 r15, r16, r17 }
+	{ mul_hs_lu r5, r6, r7 ; ldna r15, r16 }
+	{ mul_hs_lu r5, r6, r7 ; prefetch_l3 r15 }
+	{ mul_hs_lu r5, r6, r7 ; subxsc r15, r16, r17 }
+	{ mul_hs_lu r5, r6, r7 ; v2cmpne r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 }
+	{ mul_hu_hu r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1 r25 }
+	{ mul_hu_hu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
+	{ mul_hu_hu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
+	{ mul_hu_hu r5, r6, r7 ; fetchor4 r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; ill ; st2 r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; jr r15 ; st4 r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; ld r25, r26 ; jalrp r15 }
+	{ mul_hu_hu r5, r6, r7 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; ld1u r25, r26 ; addi r15, r16, 5 }
+	{ mul_hu_hu r5, r6, r7 ; ld1u r25, r26 ; shru r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; ld2s r25, r26 ; shl1add r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; ld2u r25, r26 ; move r15, r16 }
+	{ mul_hu_hu r5, r6, r7 ; ld4s r25, r26 ; fnop }
+	{ mul_hu_hu r5, r6, r7 ; ld4u r25, r26 ; andi r15, r16, 5 }
+	{ mul_hu_hu r5, r6, r7 ; ld4u r25, r26 ; xor r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; mfspr r16, 0x5 }
+	{ mul_hu_hu r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; nop ; ld1s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch r25 ; mnz r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l1 r25 ; cmples r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 ; add r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l2 r25 ; shl1add r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l2_fault r25 ; movei r15, 5 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l3 r25 ; info 19 }
+	{ mul_hu_hu r5, r6, r7 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
+	{ mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
+	{ mul_hu_hu r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mul_hu_hu r5, r6, r7 ; st r25, r26 ; cmples r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; st1 r25, r26 ; add r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; st1 r25, r26 ; shrsi r15, r16, 5 }
+	{ mul_hu_hu r5, r6, r7 ; st2 r25, r26 ; shl r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; st4 r25, r26 ; mnz r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
+	{ mul_hu_hu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; v2mnz r15, r16, r17 }
+	{ mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
+	{ mul_hu_ls r5, r6, r7 ; finv r15 }
+	{ mul_hu_ls r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+	{ mul_hu_ls r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ mul_hu_ls r5, r6, r7 ; v1cmpne r15, r16, r17 }
+	{ mul_hu_ls r5, r6, r7 ; v2shl r15, r16, r17 }
+	{ mul_hu_lu r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ mul_hu_lu r5, r6, r7 ; ld4s r15, r16 }
+	{ mul_hu_lu r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ mul_hu_lu r5, r6, r7 ; stnt4 r15, r16 }
+	{ mul_hu_lu r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
+	{ mul_ls_ls r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
+	{ mul_ls_ls r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
+	{ mul_ls_ls r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
+	{ mul_ls_ls r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 }
+	{ mul_ls_ls r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch r25 ; jalr r15 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; st2 r25, r26 ; nop }
+	{ mul_ls_ls r5, r6, r7 ; st4 r25, r26 ; jalr r15 }
+	{ mul_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
+	{ mul_ls_ls r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ mul_ls_ls r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ mul_ls_ls r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mul_ls_lu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+	{ mul_ls_lu r5, r6, r7 ; ldnt2s r15, r16 }
+	{ mul_ls_lu r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ mul_ls_lu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+	{ mul_ls_lu r5, r6, r7 ; v2mnz r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3 r25 }
+	{ mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mul_lu_lu r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mul_lu_lu r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 ; st1 r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; cmpltui r15, r16, 5 }
+	{ mul_lu_lu r5, r6, r7 ; fnop ; ld2s r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; info 19 ; ld2u r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; jalrp r15 ; ld2s r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; jrp r15 ; ld4s r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; ld r25, r26 ; mz r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; ld1s r25, r26 ; jalr r15 }
+	{ mul_lu_lu r5, r6, r7 ; ld1u r25, r26 ; cmples r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; ld2s r15, r16 }
+	{ mul_lu_lu r5, r6, r7 ; ld2s r25, r26 ; shrs r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; ld2u r25, r26 ; rotli r15, r16, 5 }
+	{ mul_lu_lu r5, r6, r7 ; ld4s r25, r26 ; lnk r15 }
+	{ mul_lu_lu r5, r6, r7 ; ld4u r25, r26 ; cmpltu r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; ldnt1s r15, r16 }
+	{ mul_lu_lu r5, r6, r7 ; mnz r15, r16, r17 ; ld4u r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; movei r15, 5 ; prefetch_l1 r25 }
+	{ mul_lu_lu r5, r6, r7 ; nop ; prefetch_l1 r25 }
+	{ mul_lu_lu r5, r6, r7 ; or r15, r16, r17 ; prefetch_l2 r25 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch r25 ; rotl r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l1 r25 ; ill }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l1_fault r25 ; cmpeqi r15, r16, 5 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l2 r15 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l2 r25 ; shrs r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l2_fault r25 ; shl r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l3 r25 ; move r15, r16 }
+	{ mul_lu_lu r5, r6, r7 ; prefetch_l3_fault r25 ; ill }
+	{ mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 ; prefetch r25 }
+	{ mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l2 r25 }
+	{ mul_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l3 r25 }
+	{ mul_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 ; st r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; shrs r15, r16, r17 ; st r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; shru r15, r16, r17 ; st2 r25, r26 }
+	{ mul_lu_lu r5, r6, r7 ; st r25, r26 ; ill }
+	{ mul_lu_lu r5, r6, r7 ; st1 r25, r26 ; cmpeqi r15, r16, 5 }
+	{ mul_lu_lu r5, r6, r7 ; st1_add r15, r16, 5 }
+	{ mul_lu_lu r5, r6, r7 ; st2 r25, r26 ; shli r15, r16, 5 }
+	{ mul_lu_lu r5, r6, r7 ; st4 r25, r26 ; rotl r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3 r25 }
+	{ mul_lu_lu r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ mul_lu_lu r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld1s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld1u r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2u r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; cmples r15, r16, r17 ; ld2u r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 ; ld4u r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1 r25 }
+	{ mula_hs_hs r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; ill ; prefetch_l3 r25 }
+	{ mula_hs_hs r5, r6, r7 ; jalr r15 ; prefetch_l2_fault r25 }
+	{ mula_hs_hs r5, r6, r7 ; jr r15 ; prefetch_l3_fault r25 }
+	{ mula_hs_hs r5, r6, r7 ; ld r25, r26 ; fnop }
+	{ mula_hs_hs r5, r6, r7 ; ld1s r25, r26 ; cmpeq r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; ld1s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; ld1u r25, r26 ; shl3addx r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; ld2s r25, r26 ; or r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; ld2u r25, r26 ; jr r15 }
+	{ mula_hs_hs r5, r6, r7 ; ld4s r25, r26 ; cmplts r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; ld4u r25, r26 ; addi r15, r16, 5 }
+	{ mula_hs_hs r5, r6, r7 ; ld4u r25, r26 ; shru r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; lnk r15 ; st2 r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; move r15, r16 ; st2 r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; mz r15, r16, r17 ; st2 r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; nor r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch r25 ; jalrp r15 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 ; and r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 ; subx r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l1_fault r25 ; shl3add r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 ; or r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l2_fault r25 ; jrp r15 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l3 r25 ; cmpltu r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 ; and r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 ; subx r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; rotli r15, r16, 5 ; st4 r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; shrs r15, r16, r17 ; ld2s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 ; ld4s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; st r25, r26 ; and r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; st r25, r26 ; subx r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; st1 r25, r26 ; shl3add r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; st2 r25, r26 ; nor r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; st4 r25, r26 ; jalrp r15 }
+	{ mula_hs_hs r5, r6, r7 ; sub r15, r16, r17 ; ld1s r25, r26 }
+	{ mula_hs_hs r5, r6, r7 ; v1adduc r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; v2maxs r15, r16, r17 }
+	{ mula_hs_hs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2 r25 }
+	{ mula_hs_hu r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ mula_hs_hu r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+	{ mula_hs_hu r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ mula_hs_hu r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ mula_hs_hu r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ mula_hs_ls r5, r6, r7 ; cmples r15, r16, r17 }
+	{ mula_hs_ls r5, r6, r7 ; ld2s r15, r16 }
+	{ mula_hs_ls r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+	{ mula_hs_ls r5, r6, r7 ; stnt1 r15, r16 }
+	{ mula_hs_ls r5, r6, r7 ; v2addsc r15, r16, r17 }
+	{ mula_hs_ls r5, r6, r7 ; v4subsc r15, r16, r17 }
+	{ mula_hs_lu r5, r6, r7 ; flushwb }
+	{ mula_hs_lu r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+	{ mula_hs_lu r5, r6, r7 ; shlx r15, r16, r17 }
+	{ mula_hs_lu r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ mula_hs_lu r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; addxi r15, r16, 5 ; ld1s r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld2s r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 ; ld2s r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4s r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; cmpne r15, r16, r17 ; ld4u r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; fnop ; prefetch_l2 r25 }
+	{ mula_hu_hu r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 }
+	{ mula_hu_hu r5, r6, r7 ; jalrp r15 ; prefetch_l2 r25 }
+	{ mula_hu_hu r5, r6, r7 ; jrp r15 ; prefetch_l3 r25 }
+	{ mula_hu_hu r5, r6, r7 ; ld r25, r26 ; shl1add r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; ld1s r25, r26 ; movei r15, 5 }
+	{ mula_hu_hu r5, r6, r7 ; ld1u r25, r26 ; ill }
+	{ mula_hu_hu r5, r6, r7 ; ld2s r25, r26 ; cmpeq r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; ld2s r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; ld2u r25, r26 ; shl3addx r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; ld4s r25, r26 ; or r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; ld4u r25, r26 ; jr r15 }
+	{ mula_hu_hu r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+	{ mula_hu_hu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mula_hu_hu r5, r6, r7 ; movei r15, 5 ; st1 r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; nop ; st1 r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch r25 ; shl3add r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l1 r25 ; mnz r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l1_fault r25 ; fnop }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 ; cmpeq r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l2 r25 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l2_fault r25 ; shli r15, r16, 5 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l3 r25 ; rotli r15, r16, 5 }
+	{ mula_hu_hu r5, r6, r7 ; prefetch_l3_fault r25 ; mnz r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; rotl r15, r16, r17 ; st r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; shl1addx r15, r16, r17 ; st4 r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; shl3add r15, r16, r17 ; ld r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; shli r15, r16, 5 ; ld1u r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; shrsi r15, r16, 5 ; ld1u r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; shrui r15, r16, 5 ; ld2u r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; st r25, r26 ; mnz r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; st1 r25, r26 ; fnop }
+	{ mula_hu_hu r5, r6, r7 ; st2 r25, r26 ; andi r15, r16, 5 }
+	{ mula_hu_hu r5, r6, r7 ; st2 r25, r26 ; xor r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; st4 r25, r26 ; shl3add r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; subx r15, r16, r17 ; ld r25, r26 }
+	{ mula_hu_hu r5, r6, r7 ; v1shl r15, r16, r17 }
+	{ mula_hu_hu r5, r6, r7 ; v4add r15, r16, r17 }
+	{ mula_hu_ls r5, r6, r7 ; andi r15, r16, 5 }
+	{ mula_hu_ls r5, r6, r7 ; ld r15, r16 }
+	{ mula_hu_ls r5, r6, r7 ; nor r15, r16, r17 }
+	{ mula_hu_ls r5, r6, r7 ; st2_add r15, r16, 5 }
+	{ mula_hu_ls r5, r6, r7 ; v1shrui r15, r16, 5 }
+	{ mula_hu_ls r5, r6, r7 ; v4shl r15, r16, r17 }
+	{ mula_hu_lu r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ mula_hu_lu r5, r6, r7 ; ldnt2u r15, r16 }
+	{ mula_hu_lu r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ mula_hu_lu r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+	{ mula_hu_lu r5, r6, r7 ; v2packh r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; st1 r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 ; st4 r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; cmpne r15, r16, r17 ; ld1s r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; fnop ; ld4s r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; info 19 ; ld4u r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; jalrp r15 ; ld4s r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; jrp r15 ; prefetch r25 }
+	{ mula_ls_ls r5, r6, r7 ; ld r25, r26 ; nor r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; ld1s r25, r26 ; jr r15 }
+	{ mula_ls_ls r5, r6, r7 ; ld1u r25, r26 ; cmplts r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; ld2s r25, r26 ; addi r15, r16, 5 }
+	{ mula_ls_ls r5, r6, r7 ; ld2s r25, r26 ; shru r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; ld2u r25, r26 ; shl1add r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; ld4s r25, r26 ; move r15, r16 }
+	{ mula_ls_ls r5, r6, r7 ; ld4u r25, r26 ; fnop }
+	{ mula_ls_ls r5, r6, r7 ; ldnt1u r15, r16 }
+	{ mula_ls_ls r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1 r25 }
+	{ mula_ls_ls r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 }
+	{ mula_ls_ls r5, r6, r7 ; nop ; prefetch_l2 r25 }
+	{ mula_ls_ls r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3 r25 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch r25 ; shl r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l1 r25 ; jalr r15 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 ; cmpleu r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 ; addi r15, r16, 5 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 ; shru r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l2_fault r25 ; shl1addx r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 ; mz r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 ; jalr r15 }
+	{ mula_ls_ls r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mula_ls_ls r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ mula_ls_ls r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 }
+	{ mula_ls_ls r5, r6, r7 ; shl2addx r15, r16, r17 ; st r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; shrs r15, r16, r17 ; st2 r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; shru r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; st r25, r26 ; jalr r15 }
+	{ mula_ls_ls r5, r6, r7 ; st1 r25, r26 ; cmpleu r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; st2 r25, r26 ; add r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; st2 r25, r26 ; shrsi r15, r16, 5 }
+	{ mula_ls_ls r5, r6, r7 ; st4 r25, r26 ; shl r15, r16, r17 }
+	{ mula_ls_ls r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 }
+	{ mula_ls_ls r5, r6, r7 ; v1maxui r15, r16, 5 }
+	{ mula_ls_ls r5, r6, r7 ; v2shrsi r15, r16, 5 }
+	{ mula_ls_lu r5, r6, r7 ; addx r15, r16, r17 }
+	{ mula_ls_lu r5, r6, r7 ; iret }
+	{ mula_ls_lu r5, r6, r7 ; movei r15, 5 }
+	{ mula_ls_lu r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ mula_ls_lu r5, r6, r7 ; v1shl r15, r16, r17 }
+	{ mula_ls_lu r5, r6, r7 ; v4add r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+	{ mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1 r25 }
+	{ mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l1 r25 }
+	{ mula_lu_lu r5, r6, r7 ; cmpeqi r15, r16, 5 ; prefetch_l2 r25 }
+	{ mula_lu_lu r5, r6, r7 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 }
+	{ mula_lu_lu r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 }
+	{ mula_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mula_lu_lu r5, r6, r7 ; fnop ; st4 r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; info 19 }
+	{ mula_lu_lu r5, r6, r7 ; jalrp r15 ; st4 r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; ld r15, r16 }
+	{ mula_lu_lu r5, r6, r7 ; ld r25, r26 ; shrs r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld1s r25, r26 ; shl r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld1u r25, r26 ; mnz r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld2s r25, r26 ; cmpne r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld2u r25, r26 ; and r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld2u r25, r26 ; subx r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld4s r25, r26 ; shl2addx r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; ld4u r25, r26 ; nop }
+	{ mula_lu_lu r5, r6, r7 ; lnk r15 ; ld1s r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; move r15, r16 ; ld1s r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 ; ld1s r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch r25 ; addxi r15, r16, 5 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch r25 ; sub r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l1 r25 ; rotl r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l1_fault r25 ; lnk r15 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l2 r25 ; cmpne r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l2_fault r25 ; andi r15, r16, 5 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l2_fault r25 ; xor r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l3 r25 ; shl3addx r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; prefetch_l3_fault r25 ; rotl r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; rotli r15, r16, 5 ; ld1u r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; shl2add r15, r16, r17 ; ld4s r25, r26 }
+	{ mula_lu_lu r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 }
+	{ mula_lu_lu r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ mula_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ mula_lu_lu r5, r6, r7 ; shrui r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ mula_lu_lu r5, r6, r7 ; st r25, r26 ; rotl r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; st1 r25, r26 ; lnk r15 }
+	{ mula_lu_lu r5, r6, r7 ; st2 r25, r26 ; cmpltu r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; st4 r25, r26 ; addxi r15, r16, 5 }
+	{ mula_lu_lu r5, r6, r7 ; st4 r25, r26 ; sub r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; subx r15, r16, r17 ; prefetch r25 }
+	{ mula_lu_lu r5, r6, r7 ; v1subuc r15, r16, r17 }
+	{ mula_lu_lu r5, r6, r7 ; v4shrs r15, r16, r17 }
+	{ mulax r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 }
+	{ mulax r5, r6, r7 ; addx r15, r16, r17 ; st2 r25, r26 }
+	{ mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 }
+	{ mulax r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ mulax r5, r6, r7 ; cmples r15, r16, r17 }
+	{ mulax r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld1s r25, r26 }
+	{ mulax r5, r6, r7 ; cmpne r15, r16, r17 ; ld1u r25, r26 }
+	{ mulax r5, r6, r7 ; fnop ; ld4u r25, r26 }
+	{ mulax r5, r6, r7 ; info 19 ; prefetch r25 }
+	{ mulax r5, r6, r7 ; jalrp r15 ; ld4u r25, r26 }
+	{ mulax r5, r6, r7 ; jrp r15 ; prefetch_l1 r25 }
+	{ mulax r5, r6, r7 ; ld r25, r26 ; or r15, r16, r17 }
+	{ mulax r5, r6, r7 ; ld1s r25, r26 ; jrp r15 }
+	{ mulax r5, r6, r7 ; ld1u r25, r26 ; cmpltsi r15, r16, 5 }
+	{ mulax r5, r6, r7 ; ld2s r25, r26 ; addx r15, r16, r17 }
+	{ mulax r5, r6, r7 ; ld2s r25, r26 ; shrui r15, r16, 5 }
+	{ mulax r5, r6, r7 ; ld2u r25, r26 ; shl1addx r15, r16, r17 }
+	{ mulax r5, r6, r7 ; ld4s r25, r26 ; movei r15, 5 }
+	{ mulax r5, r6, r7 ; ld4u r25, r26 ; ill }
+	{ mulax r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+	{ mulax r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mulax r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 }
+	{ mulax r5, r6, r7 ; nop ; prefetch_l2_fault r25 }
+	{ mulax r5, r6, r7 ; or r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mulax r5, r6, r7 ; prefetch r25 ; shl1add r15, r16, r17 }
+	{ mulax r5, r6, r7 ; prefetch_l1 r25 ; jalrp r15 }
+	{ mulax r5, r6, r7 ; prefetch_l1_fault r25 ; cmplts r15, r16, r17 }
+	{ mulax r5, r6, r7 ; prefetch_l2 r25 ; addx r15, r16, r17 }
+	{ mulax r5, r6, r7 ; prefetch_l2 r25 ; shrui r15, r16, 5 }
+	{ mulax r5, r6, r7 ; prefetch_l2_fault r25 ; shl2add r15, r16, r17 }
+	{ mulax r5, r6, r7 ; prefetch_l3 r25 ; nop }
+	{ mulax r5, r6, r7 ; prefetch_l3_fault r25 ; jalrp r15 }
+	{ mulax r5, r6, r7 ; rotl r15, r16, r17 ; prefetch_l2 r25 }
+	{ mulax r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l3 r25 }
+	{ mulax r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mulax r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 }
+	{ mulax r5, r6, r7 ; shl3addx r15, r16, r17 ; st4 r25, r26 }
+	{ mulax r5, r6, r7 ; shrs r15, r16, r17 ; st4 r25, r26 }
+	{ mulax r5, r6, r7 ; shrui r15, r16, 5 ; ld r25, r26 }
+	{ mulax r5, r6, r7 ; st r25, r26 ; jalrp r15 }
+	{ mulax r5, r6, r7 ; st1 r25, r26 ; cmplts r15, r16, r17 }
+	{ mulax r5, r6, r7 ; st2 r25, r26 ; addi r15, r16, 5 }
+	{ mulax r5, r6, r7 ; st2 r25, r26 ; shru r15, r16, r17 }
+	{ mulax r5, r6, r7 ; st4 r25, r26 ; shl1add r15, r16, r17 }
+	{ mulax r5, r6, r7 ; sub r15, r16, r17 ; st1 r25, r26 }
+	{ mulax r5, r6, r7 ; v1minu r15, r16, r17 }
+	{ mulax r5, r6, r7 ; v2shru r15, r16, r17 }
+	{ mulx r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+	{ mulx r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+	{ mulx r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+	{ mulx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+	{ mulx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+	{ mulx r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mulx r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ mulx r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ill ; st1 r25, r26 }
+	{ mulx r5, r6, r7 ; jalr r15 ; st r25, r26 }
+	{ mulx r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+	{ mulx r5, r6, r7 ; ld r25, r26 ; jalr r15 }
+	{ mulx r5, r6, r7 ; ld1s r25, r26 ; cmpleu r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ld1u r25, r26 ; add r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ld1u r25, r26 ; shrsi r15, r16, 5 }
+	{ mulx r5, r6, r7 ; ld2s r25, r26 ; shl r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ld2u r25, r26 ; mnz r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ld4s r25, r26 ; cmpne r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ld4u r25, r26 ; and r15, r16, r17 }
+	{ mulx r5, r6, r7 ; ld4u r25, r26 ; subx r15, r16, r17 }
+	{ mulx r5, r6, r7 ; mf }
+	{ mulx r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
+	{ mulx r5, r6, r7 ; nop ; ld r25, r26 }
+	{ mulx r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 }
+	{ mulx r5, r6, r7 ; prefetch r25 ; lnk r15 }
+	{ mulx r5, r6, r7 ; prefetch_l1 r25 ; cmpeqi r15, r16, 5 }
+	{ mulx r5, r6, r7 ; prefetch_l1_fault r15 }
+	{ mulx r5, r6, r7 ; prefetch_l1_fault r25 ; shrs r15, r16, r17 }
+	{ mulx r5, r6, r7 ; prefetch_l2 r25 ; shl r15, r16, r17 }
+	{ mulx r5, r6, r7 ; prefetch_l2_fault r25 ; move r15, r16 }
+	{ mulx r5, r6, r7 ; prefetch_l3 r25 ; ill }
+	{ mulx r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeqi r15, r16, 5 }
+	{ mulx r5, r6, r7 ; raise }
+	{ mulx r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+	{ mulx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+	{ mulx r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+	{ mulx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+	{ mulx r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+	{ mulx r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1 r25 }
+	{ mulx r5, r6, r7 ; st r25, r26 ; cmpeqi r15, r16, 5 }
+	{ mulx r5, r6, r7 ; st1 r15, r16 }
+	{ mulx r5, r6, r7 ; st1 r25, r26 ; shrs r15, r16, r17 }
+	{ mulx r5, r6, r7 ; st2 r25, r26 ; rotli r15, r16, 5 }
+	{ mulx r5, r6, r7 ; st4 r25, r26 ; lnk r15 }
+	{ mulx r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
+	{ mulx r5, r6, r7 ; v1cmples r15, r16, r17 }
+	{ mulx r5, r6, r7 ; v2minsi r15, r16, 5 }
+	{ mulx r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ mz r15, r16, r17 ; addi r5, r6, 5 ; st r25, r26 }
+	{ mz r15, r16, r17 ; addxi r5, r6, 5 ; st1 r25, r26 }
+	{ mz r15, r16, r17 ; andi r5, r6, 5 ; st1 r25, r26 }
+	{ mz r15, r16, r17 ; cmoveqz r5, r6, r7 ; st r25, r26 }
+	{ mz r15, r16, r17 ; cmpeq r5, r6, r7 ; st2 r25, r26 }
+	{ mz r15, r16, r17 ; cmples r5, r6, r7 }
+	{ mz r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1s r25, r26 }
+	{ mz r15, r16, r17 ; cmpne r5, r6, r7 ; ld1u r25, r26 }
+	{ mz r15, r16, r17 ; ctz r5, r6 ; st r25, r26 }
+	{ mz r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld r25, r26 }
+	{ mz r15, r16, r17 ; infol 0x1234 }
+	{ mz r15, r16, r17 ; ld r25, r26 ; revbits r5, r6 }
+	{ mz r15, r16, r17 ; ld1s r25, r26 ; cmpne r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld1s r25, r26 ; subx r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld1u r25, r26 ; mulx r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld2s r25, r26 ; cmpeqi r5, r6, 5 }
+	{ mz r15, r16, r17 ; ld2s r25, r26 ; shli r5, r6, 5 }
+	{ mz r15, r16, r17 ; ld2u r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld4s r25, r26 ; and r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld4s r25, r26 ; shl1add r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld4u r25, r26 ; mnz r5, r6, r7 }
+	{ mz r15, r16, r17 ; ld4u r25, r26 ; xor r5, r6, r7 }
+	{ mz r15, r16, r17 ; move r5, r6 }
+	{ mz r15, r16, r17 ; mul_hs_hu r5, r6, r7 }
+	{ mz r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st2 r25, r26 }
+	{ mz r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st4 r25, r26 }
+	{ mz r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st r25, r26 }
+	{ mz r15, r16, r17 ; mulax r5, r6, r7 ; st1 r25, r26 }
+	{ mz r15, r16, r17 ; mz r5, r6, r7 ; st4 r25, r26 }
+	{ mz r15, r16, r17 ; or r5, r6, r7 ; ld r25, r26 }
+	{ mz r15, r16, r17 ; prefetch r25 ; addi r5, r6, 5 }
+	{ mz r15, r16, r17 ; prefetch r25 ; rotl r5, r6, r7 }
+	{ mz r15, r16, r17 ; prefetch_l1 r25 ; fnop }
+	{ mz r15, r16, r17 ; prefetch_l1 r25 ; tblidxb1 r5, r6 }
+	{ mz r15, r16, r17 ; prefetch_l1_fault r25 ; nop }
+	{ mz r15, r16, r17 ; prefetch_l2 r25 ; cmpleu r5, r6, r7 }
+	{ mz r15, r16, r17 ; prefetch_l2 r25 ; shrsi r5, r6, 5 }
+	{ mz r15, r16, r17 ; prefetch_l2_fault r25 ; mula_hu_hu r5, r6, r7 }
+	{ mz r15, r16, r17 ; prefetch_l3 r25 ; clz r5, r6 }
+	{ mz r15, r16, r17 ; prefetch_l3 r25 ; shl2add r5, r6, r7 }
+	{ mz r15, r16, r17 ; prefetch_l3_fault r25 ; movei r5, 5 }
+	{ mz r15, r16, r17 ; revbits r5, r6 ; ld r25, r26 }
+	{ mz r15, r16, r17 ; rotl r5, r6, r7 ; ld1u r25, r26 }
+	{ mz r15, r16, r17 ; shl r5, r6, r7 ; ld2u r25, r26 }
+	{ mz r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 }
+	{ mz r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 }
+	{ mz r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ mz r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ mz r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ mz r15, r16, r17 ; st r25, r26 ; cmpeqi r5, r6, 5 }
+	{ mz r15, r16, r17 ; st r25, r26 ; shli r5, r6, 5 }
+	{ mz r15, r16, r17 ; st1 r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ mz r15, r16, r17 ; st2 r25, r26 ; and r5, r6, r7 }
+	{ mz r15, r16, r17 ; st2 r25, r26 ; shl1add r5, r6, r7 }
+	{ mz r15, r16, r17 ; st4 r25, r26 ; mnz r5, r6, r7 }
+	{ mz r15, r16, r17 ; st4 r25, r26 ; xor r5, r6, r7 }
+	{ mz r15, r16, r17 ; subxsc r5, r6, r7 }
+	{ mz r15, r16, r17 ; tblidxb2 r5, r6 ; ld1s r25, r26 }
+	{ mz r15, r16, r17 ; v1adiffu r5, r6, r7 }
+	{ mz r15, r16, r17 ; v1sub r5, r6, r7 }
+	{ mz r15, r16, r17 ; v2shrsi r5, r6, 5 }
+	{ mz r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 }
+	{ mz r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 }
+	{ mz r5, r6, r7 ; and r15, r16, r17 ; ld4s r25, r26 }
+	{ mz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 }
+	{ mz r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 }
+	{ mz r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ mz r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ mz r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ mz r5, r6, r7 ; ill ; st1 r25, r26 }
+	{ mz r5, r6, r7 ; jalr r15 ; st r25, r26 }
+	{ mz r5, r6, r7 ; jr r15 ; st2 r25, r26 }
+	{ mz r5, r6, r7 ; ld r25, r26 ; jalr r15 }
+	{ mz r5, r6, r7 ; ld1s r25, r26 ; cmpleu r15, r16, r17 }
+	{ mz r5, r6, r7 ; ld1u r25, r26 ; add r15, r16, r17 }
+	{ mz r5, r6, r7 ; ld1u r25, r26 ; shrsi r15, r16, 5 }
+	{ mz r5, r6, r7 ; ld2s r25, r26 ; shl r15, r16, r17 }
+	{ mz r5, r6, r7 ; ld2u r25, r26 ; mnz r15, r16, r17 }
+	{ mz r5, r6, r7 ; ld4s r25, r26 ; cmpne r15, r16, r17 }
+	{ mz r5, r6, r7 ; ld4u r25, r26 ; and r15, r16, r17 }
+	{ mz r5, r6, r7 ; ld4u r25, r26 ; subx r15, r16, r17 }
+	{ mz r5, r6, r7 ; mf }
+	{ mz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 }
+	{ mz r5, r6, r7 ; nop ; ld r25, r26 }
+	{ mz r5, r6, r7 ; or r15, r16, r17 ; ld1u r25, r26 }
+	{ mz r5, r6, r7 ; prefetch r25 ; lnk r15 }
+	{ mz r5, r6, r7 ; prefetch_l1 r25 ; cmpeqi r15, r16, 5 }
+	{ mz r5, r6, r7 ; prefetch_l1_fault r15 }
+	{ mz r5, r6, r7 ; prefetch_l1_fault r25 ; shrs r15, r16, r17 }
+	{ mz r5, r6, r7 ; prefetch_l2 r25 ; shl r15, r16, r17 }
+	{ mz r5, r6, r7 ; prefetch_l2_fault r25 ; move r15, r16 }
+	{ mz r5, r6, r7 ; prefetch_l3 r25 ; ill }
+	{ mz r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeqi r15, r16, 5 }
+	{ mz r5, r6, r7 ; raise }
+	{ mz r5, r6, r7 ; shl r15, r16, r17 ; ld1s r25, r26 }
+	{ mz r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 }
+	{ mz r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2u r25, r26 }
+	{ mz r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 }
+	{ mz r5, r6, r7 ; shrs r15, r16, r17 ; ld4u r25, r26 }
+	{ mz r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1 r25 }
+	{ mz r5, r6, r7 ; st r25, r26 ; cmpeqi r15, r16, 5 }
+	{ mz r5, r6, r7 ; st1 r15, r16 }
+	{ mz r5, r6, r7 ; st1 r25, r26 ; shrs r15, r16, r17 }
+	{ mz r5, r6, r7 ; st2 r25, r26 ; rotli r15, r16, 5 }
+	{ mz r5, r6, r7 ; st4 r25, r26 ; lnk r15 }
+	{ mz r5, r6, r7 ; sub r15, r16, r17 ; ld2u r25, r26 }
+	{ mz r5, r6, r7 ; v1cmples r15, r16, r17 }
+	{ mz r5, r6, r7 ; v2minsi r15, r16, 5 }
+	{ mz r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ nop ; add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ nop ; addi r5, r6, 5 ; st1 r25, r26 }
+	{ nop ; addx r5, r6, r7 ; st1 r25, r26 }
+	{ nop ; addxi r5, r6, 5 ; st4 r25, r26 }
+	{ nop ; and r5, r6, r7 ; st1 r25, r26 }
+	{ nop ; andi r5, r6, 5 ; st4 r25, r26 }
+	{ nop ; cmoveqz r5, r6, r7 ; st1 r25, r26 }
+	{ nop ; cmpeq r15, r16, r17 ; st4 r25, r26 }
+	{ nop ; cmpeqi r5, r6, 5 ; ld r25, r26 }
+	{ nop ; cmples r5, r6, r7 ; ld r25, r26 }
+	{ nop ; cmpleu r5, r6, r7 ; ld1u r25, r26 }
+	{ nop ; cmplts r5, r6, r7 ; ld2u r25, r26 }
+	{ nop ; cmpltsi r5, r6, 5 ; ld4u r25, r26 }
+	{ nop ; cmpltu r5, r6, r7 ; prefetch_l1 r25 }
+	{ nop ; cmpne r5, r6, r7 ; prefetch_l1 r25 }
+	{ nop ; dblalign2 r15, r16, r17 }
+	{ nop ; fnop ; prefetch_l2_fault r25 }
+	{ nop ; ill ; ld4u r25, r26 }
+	{ nop ; jalr r15 ; ld4s r25, r26 }
+	{ nop ; jr r15 ; prefetch r25 }
+	{ nop ; ld r25, r26 ; and r15, r16, r17 }
+	{ nop ; ld r25, r26 ; mul_hu_hu r5, r6, r7 }
+	{ nop ; ld r25, r26 ; shrs r5, r6, r7 }
+	{ nop ; ld1s r25, r26 ; cmpleu r15, r16, r17 }
+	{ nop ; ld1s r25, r26 ; nor r5, r6, r7 }
+	{ nop ; ld1s r25, r26 ; tblidxb2 r5, r6 }
+	{ nop ; ld1u r25, r26 ; fsingle_pack1 r5, r6 }
+	{ nop ; ld1u r25, r26 ; shl1add r15, r16, r17 }
+	{ nop ; ld2s r25, r26 ; addx r5, r6, r7 }
+	{ nop ; ld2s r25, r26 ; movei r15, 5 }
+	{ nop ; ld2s r25, r26 ; shli r15, r16, 5 }
+	{ nop ; ld2u r25, r26 ; cmpeqi r15, r16, 5 }
+	{ nop ; ld2u r25, r26 ; mz r15, r16, r17 }
+	{ nop ; ld2u r25, r26 ; subx r15, r16, r17 }
+	{ nop ; ld4s r25, r26 ; cmpne r15, r16, r17 }
+	{ nop ; ld4s r25, r26 ; rotli r15, r16, 5 }
+	{ nop ; ld4u r25, r26 ; add r5, r6, r7 }
+	{ nop ; ld4u r25, r26 ; mnz r15, r16, r17 }
+	{ nop ; ld4u r25, r26 ; shl3add r15, r16, r17 }
+	{ nop ; ldnt4u r15, r16 }
+	{ nop ; mnz r15, r16, r17 ; st1 r25, r26 }
+	{ nop ; move r15, r16 ; st4 r25, r26 }
+	{ nop ; movei r5, 5 ; ld r25, r26 }
+	{ nop ; mul_hs_hs r5, r6, r7 }
+	{ nop ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ nop ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 }
+	{ nop ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ nop ; mulax r5, r6, r7 ; st r25, r26 }
+	{ nop ; mz r15, r16, r17 ; st2 r25, r26 }
+	{ nop ; nop ; st4 r25, r26 }
+	{ nop ; or r15, r16, r17 ; ld r25, r26 }
+	{ nop ; pcnt r5, r6 ; ld r25, r26 }
+	{ nop ; prefetch r25 ; cmples r5, r6, r7 }
+	{ nop ; prefetch r25 ; nor r15, r16, r17 }
+	{ nop ; prefetch r25 ; tblidxb1 r5, r6 }
+	{ nop ; prefetch_l1 r25 ; cmpltu r15, r16, r17 }
+	{ nop ; prefetch_l1 r25 ; rotl r15, r16, r17 }
+	{ nop ; prefetch_l1_fault r25 ; add r15, r16, r17 }
+	{ nop ; prefetch_l1_fault r25 ; lnk r15 }
+	{ nop ; prefetch_l1_fault r25 ; shl2addx r5, r6, r7 }
+	{ nop ; prefetch_l2 r25 ; cmoveqz r5, r6, r7 }
+	{ nop ; prefetch_l2 r25 ; mula_ls_ls r5, r6, r7 }
+	{ nop ; prefetch_l2 r25 ; shrui r15, r16, 5 }
+	{ nop ; prefetch_l2_fault r25 ; cmpltsi r5, r6, 5 }
+	{ nop ; prefetch_l2_fault r25 ; revbytes r5, r6 }
+	{ nop ; prefetch_l3 r15 }
+	{ nop ; prefetch_l3 r25 ; jrp r15 }
+	{ nop ; prefetch_l3 r25 ; shl2addx r15, r16, r17 }
+	{ nop ; prefetch_l3_fault r25 ; clz r5, r6 }
+	{ nop ; prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 }
+	{ nop ; prefetch_l3_fault r25 ; shru r5, r6, r7 }
+	{ nop ; revbytes r5, r6 ; ld4u r25, r26 }
+	{ nop ; rotl r5, r6, r7 ; prefetch_l1 r25 }
+	{ nop ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+	{ nop ; shl r5, r6, r7 ; prefetch_l3 r25 }
+	{ nop ; shl1add r5, r6, r7 ; prefetch_l3 r25 }
+	{ nop ; shl1addx r5, r6, r7 ; st r25, r26 }
+	{ nop ; shl2add r5, r6, r7 ; st2 r25, r26 }
+	{ nop ; shl2addx r5, r6, r7 }
+	{ nop ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+	{ nop ; shli r15, r16, 5 ; ld2s r25, r26 }
+	{ nop ; shrs r15, r16, r17 ; ld1s r25, r26 }
+	{ nop ; shrsi r15, r16, 5 ; ld2s r25, r26 }
+	{ nop ; shru r15, r16, r17 ; ld4s r25, r26 }
+	{ nop ; shrui r15, r16, 5 ; prefetch r25 }
+	{ nop ; st r25, r26 ; addi r5, r6, 5 }
+	{ nop ; st r25, r26 ; move r15, r16 }
+	{ nop ; st r25, r26 ; shl3addx r15, r16, r17 }
+	{ nop ; st1 r25, r26 ; cmpeq r5, r6, r7 }
+	{ nop ; st1 r25, r26 ; mulx r5, r6, r7 }
+	{ nop ; st1 r25, r26 ; sub r5, r6, r7 }
+	{ nop ; st2 r25, r26 ; cmpltu r5, r6, r7 }
+	{ nop ; st2 r25, r26 ; rotl r5, r6, r7 }
+	{ nop ; st4 r25, r26 ; add r15, r16, r17 }
+	{ nop ; st4 r25, r26 ; lnk r15 }
+	{ nop ; st4 r25, r26 ; shl2addx r5, r6, r7 }
+	{ nop ; sub r15, r16, r17 ; ld2u r25, r26 }
+	{ nop ; subx r15, r16, r17 ; ld4u r25, r26 }
+	{ nop ; tblidxb0 r5, r6 ; ld1u r25, r26 }
+	{ nop ; tblidxb2 r5, r6 ; ld2u r25, r26 }
+	{ nop ; v1adiffu r5, r6, r7 }
+	{ nop ; v1minui r15, r16, 5 }
+	{ nop ; v2cmples r5, r6, r7 }
+	{ nop ; v2sadas r5, r6, r7 }
+	{ nop ; v4sub r15, r16, r17 }
+	{ nop ; xor r5, r6, r7 ; st2 r25, r26 }
+	{ nor r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
+	{ nor r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
+	{ nor r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
+	{ nor r15, r16, r17 ; cmoveqz r5, r6, r7 ; st2 r25, r26 }
+	{ nor r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ nor r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+	{ nor r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
+	{ nor r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+	{ nor r15, r16, r17 ; ctz r5, r6 ; st2 r25, r26 }
+	{ nor r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1u r25, r26 }
+	{ nor r15, r16, r17 ; ld r25, r26 ; addi r5, r6, 5 }
+	{ nor r15, r16, r17 ; ld r25, r26 ; rotl r5, r6, r7 }
+	{ nor r15, r16, r17 ; ld1s r25, r26 ; fnop }
+	{ nor r15, r16, r17 ; ld1s r25, r26 ; tblidxb1 r5, r6 }
+	{ nor r15, r16, r17 ; ld1u r25, r26 ; nop }
+	{ nor r15, r16, r17 ; ld2s r25, r26 ; cmpleu r5, r6, r7 }
+	{ nor r15, r16, r17 ; ld2s r25, r26 ; shrsi r5, r6, 5 }
+	{ nor r15, r16, r17 ; ld2u r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ nor r15, r16, r17 ; ld4s r25, r26 ; clz r5, r6 }
+	{ nor r15, r16, r17 ; ld4s r25, r26 ; shl2add r5, r6, r7 }
+	{ nor r15, r16, r17 ; ld4u r25, r26 ; movei r5, 5 }
+	{ nor r15, r16, r17 ; mm r5, r6, 5, 7 }
+	{ nor r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
+	{ nor r15, r16, r17 ; mul_hs_lu r5, r6, r7 }
+	{ nor r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ nor r15, r16, r17 ; mula_hs_hu r5, r6, r7 }
+	{ nor r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st2 r25, r26 }
+	{ nor r15, r16, r17 ; mulax r5, r6, r7 ; st4 r25, r26 }
+	{ nor r15, r16, r17 ; nop ; ld r25, r26 }
+	{ nor r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
+	{ nor r15, r16, r17 ; prefetch r25 ; addxi r5, r6, 5 }
+	{ nor r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 }
+	{ nor r15, r16, r17 ; prefetch_l1 r25 ; info 19 }
+	{ nor r15, r16, r17 ; prefetch_l1 r25 ; tblidxb3 r5, r6 }
+	{ nor r15, r16, r17 ; prefetch_l1_fault r25 ; or r5, r6, r7 }
+	{ nor r15, r16, r17 ; prefetch_l2 r25 ; cmpltsi r5, r6, 5 }
+	{ nor r15, r16, r17 ; prefetch_l2 r25 ; shrui r5, r6, 5 }
+	{ nor r15, r16, r17 ; prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 }
+	{ nor r15, r16, r17 ; prefetch_l3 r25 ; cmovnez r5, r6, r7 }
+	{ nor r15, r16, r17 ; prefetch_l3 r25 ; shl3add r5, r6, r7 }
+	{ nor r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 }
+	{ nor r15, r16, r17 ; revbits r5, r6 ; ld1u r25, r26 }
+	{ nor r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
+	{ nor r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
+	{ nor r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+	{ nor r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ nor r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ nor r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ nor r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ nor r15, r16, r17 ; st r25, r26 ; cmpleu r5, r6, r7 }
+	{ nor r15, r16, r17 ; st r25, r26 ; shrsi r5, r6, 5 }
+	{ nor r15, r16, r17 ; st1 r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ nor r15, r16, r17 ; st2 r25, r26 ; clz r5, r6 }
+	{ nor r15, r16, r17 ; st2 r25, r26 ; shl2add r5, r6, r7 }
+	{ nor r15, r16, r17 ; st4 r25, r26 ; movei r5, 5 }
+	{ nor r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+	{ nor r15, r16, r17 ; tblidxb0 r5, r6 ; ld1s r25, r26 }
+	{ nor r15, r16, r17 ; tblidxb2 r5, r6 ; ld2s r25, r26 }
+	{ nor r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ nor r15, r16, r17 ; v2add r5, r6, r7 }
+	{ nor r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ nor r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+	{ nor r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+	{ nor r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+	{ nor r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ nor r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ nor r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ nor r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ nor r5, r6, r7 ; finv r15 }
+	{ nor r5, r6, r7 ; ill ; st4 r25, r26 }
+	{ nor r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+	{ nor r5, r6, r7 ; jr r15 }
+	{ nor r5, r6, r7 ; ld r25, r26 ; jr r15 }
+	{ nor r5, r6, r7 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ nor r5, r6, r7 ; ld1u r25, r26 ; addx r15, r16, r17 }
+	{ nor r5, r6, r7 ; ld1u r25, r26 ; shrui r15, r16, 5 }
+	{ nor r5, r6, r7 ; ld2s r25, r26 ; shl1addx r15, r16, r17 }
+	{ nor r5, r6, r7 ; ld2u r25, r26 ; movei r15, 5 }
+	{ nor r5, r6, r7 ; ld4s r25, r26 ; ill }
+	{ nor r5, r6, r7 ; ld4u r25, r26 ; cmpeq r15, r16, r17 }
+	{ nor r5, r6, r7 ; ld4u r25, r26 }
+	{ nor r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+	{ nor r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+	{ nor r5, r6, r7 ; nop ; ld1u r25, r26 }
+	{ nor r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+	{ nor r5, r6, r7 ; prefetch r25 ; move r15, r16 }
+	{ nor r5, r6, r7 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 }
+	{ nor r5, r6, r7 ; prefetch_l1_fault r25 ; addi r15, r16, 5 }
+	{ nor r5, r6, r7 ; prefetch_l1_fault r25 ; shru r15, r16, r17 }
+	{ nor r5, r6, r7 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 }
+	{ nor r5, r6, r7 ; prefetch_l2_fault r25 ; mz r15, r16, r17 }
+	{ nor r5, r6, r7 ; prefetch_l3 r25 ; jalr r15 }
+	{ nor r5, r6, r7 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 }
+	{ nor r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+	{ nor r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+	{ nor r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+	{ nor r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+	{ nor r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 }
+	{ nor r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1 r25 }
+	{ nor r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+	{ nor r5, r6, r7 ; st r25, r26 ; cmpleu r15, r16, r17 }
+	{ nor r5, r6, r7 ; st1 r25, r26 ; addi r15, r16, 5 }
+	{ nor r5, r6, r7 ; st1 r25, r26 ; shru r15, r16, r17 }
+	{ nor r5, r6, r7 ; st2 r25, r26 ; shl1add r15, r16, r17 }
+	{ nor r5, r6, r7 ; st4 r25, r26 ; move r15, r16 }
+	{ nor r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+	{ nor r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ nor r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ nor r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+	{ or r15, r16, r17 ; addi r5, r6, 5 ; st2 r25, r26 }
+	{ or r15, r16, r17 ; addxi r5, r6, 5 ; st4 r25, r26 }
+	{ or r15, r16, r17 ; andi r5, r6, 5 ; st4 r25, r26 }
+	{ or r15, r16, r17 ; cmoveqz r5, r6, r7 ; st2 r25, r26 }
+	{ or r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ or r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 }
+	{ or r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld2s r25, r26 }
+	{ or r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 }
+	{ or r15, r16, r17 ; ctz r5, r6 ; st2 r25, r26 }
+	{ or r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1u r25, r26 }
+	{ or r15, r16, r17 ; ld r25, r26 ; addi r5, r6, 5 }
+	{ or r15, r16, r17 ; ld r25, r26 ; rotl r5, r6, r7 }
+	{ or r15, r16, r17 ; ld1s r25, r26 ; fnop }
+	{ or r15, r16, r17 ; ld1s r25, r26 ; tblidxb1 r5, r6 }
+	{ or r15, r16, r17 ; ld1u r25, r26 ; nop }
+	{ or r15, r16, r17 ; ld2s r25, r26 ; cmpleu r5, r6, r7 }
+	{ or r15, r16, r17 ; ld2s r25, r26 ; shrsi r5, r6, 5 }
+	{ or r15, r16, r17 ; ld2u r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ or r15, r16, r17 ; ld4s r25, r26 ; clz r5, r6 }
+	{ or r15, r16, r17 ; ld4s r25, r26 ; shl2add r5, r6, r7 }
+	{ or r15, r16, r17 ; ld4u r25, r26 ; movei r5, 5 }
+	{ or r15, r16, r17 ; mm r5, r6, 5, 7 }
+	{ or r15, r16, r17 ; movei r5, 5 ; ld1s r25, r26 }
+	{ or r15, r16, r17 ; mul_hs_lu r5, r6, r7 }
+	{ or r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ or r15, r16, r17 ; mula_hs_hu r5, r6, r7 }
+	{ or r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st2 r25, r26 }
+	{ or r15, r16, r17 ; mulax r5, r6, r7 ; st4 r25, r26 }
+	{ or r15, r16, r17 ; nop ; ld r25, r26 }
+	{ or r15, r16, r17 ; or r5, r6, r7 ; ld1u r25, r26 }
+	{ or r15, r16, r17 ; prefetch r25 ; addxi r5, r6, 5 }
+	{ or r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 }
+	{ or r15, r16, r17 ; prefetch_l1 r25 ; info 19 }
+	{ or r15, r16, r17 ; prefetch_l1 r25 ; tblidxb3 r5, r6 }
+	{ or r15, r16, r17 ; prefetch_l1_fault r25 ; or r5, r6, r7 }
+	{ or r15, r16, r17 ; prefetch_l2 r25 ; cmpltsi r5, r6, 5 }
+	{ or r15, r16, r17 ; prefetch_l2 r25 ; shrui r5, r6, 5 }
+	{ or r15, r16, r17 ; prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 }
+	{ or r15, r16, r17 ; prefetch_l3 r25 ; cmovnez r5, r6, r7 }
+	{ or r15, r16, r17 ; prefetch_l3 r25 ; shl3add r5, r6, r7 }
+	{ or r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 }
+	{ or r15, r16, r17 ; revbits r5, r6 ; ld1u r25, r26 }
+	{ or r15, r16, r17 ; rotl r5, r6, r7 ; ld2u r25, r26 }
+	{ or r15, r16, r17 ; shl r5, r6, r7 ; ld4u r25, r26 }
+	{ or r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch r25 }
+	{ or r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ or r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ or r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ or r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ or r15, r16, r17 ; st r25, r26 ; cmpleu r5, r6, r7 }
+	{ or r15, r16, r17 ; st r25, r26 ; shrsi r5, r6, 5 }
+	{ or r15, r16, r17 ; st1 r25, r26 ; mula_hu_hu r5, r6, r7 }
+	{ or r15, r16, r17 ; st2 r25, r26 ; clz r5, r6 }
+	{ or r15, r16, r17 ; st2 r25, r26 ; shl2add r5, r6, r7 }
+	{ or r15, r16, r17 ; st4 r25, r26 ; movei r5, 5 }
+	{ or r15, r16, r17 ; sub r5, r6, r7 ; ld r25, r26 }
+	{ or r15, r16, r17 ; tblidxb0 r5, r6 ; ld1s r25, r26 }
+	{ or r15, r16, r17 ; tblidxb2 r5, r6 ; ld2s r25, r26 }
+	{ or r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ or r15, r16, r17 ; v2add r5, r6, r7 }
+	{ or r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ or r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 }
+	{ or r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 }
+	{ or r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+	{ or r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ or r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ or r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ or r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ or r5, r6, r7 ; finv r15 }
+	{ or r5, r6, r7 ; ill ; st4 r25, r26 }
+	{ or r5, r6, r7 ; jalr r15 ; st2 r25, r26 }
+	{ or r5, r6, r7 ; jr r15 }
+	{ or r5, r6, r7 ; ld r25, r26 ; jr r15 }
+	{ or r5, r6, r7 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ or r5, r6, r7 ; ld1u r25, r26 ; addx r15, r16, r17 }
+	{ or r5, r6, r7 ; ld1u r25, r26 ; shrui r15, r16, 5 }
+	{ or r5, r6, r7 ; ld2s r25, r26 ; shl1addx r15, r16, r17 }
+	{ or r5, r6, r7 ; ld2u r25, r26 ; movei r15, 5 }
+	{ or r5, r6, r7 ; ld4s r25, r26 ; ill }
+	{ or r5, r6, r7 ; ld4u r25, r26 ; cmpeq r15, r16, r17 }
+	{ or r5, r6, r7 ; ld4u r25, r26 }
+	{ or r5, r6, r7 ; mnz r15, r16, r17 ; ld r25, r26 }
+	{ or r5, r6, r7 ; movei r15, 5 ; ld1u r25, r26 }
+	{ or r5, r6, r7 ; nop ; ld1u r25, r26 }
+	{ or r5, r6, r7 ; or r15, r16, r17 ; ld2u r25, r26 }
+	{ or r5, r6, r7 ; prefetch r25 ; move r15, r16 }
+	{ or r5, r6, r7 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 }
+	{ or r5, r6, r7 ; prefetch_l1_fault r25 ; addi r15, r16, 5 }
+	{ or r5, r6, r7 ; prefetch_l1_fault r25 ; shru r15, r16, r17 }
+	{ or r5, r6, r7 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 }
+	{ or r5, r6, r7 ; prefetch_l2_fault r25 ; mz r15, r16, r17 }
+	{ or r5, r6, r7 ; prefetch_l3 r25 ; jalr r15 }
+	{ or r5, r6, r7 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 }
+	{ or r5, r6, r7 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+	{ or r5, r6, r7 ; shl r15, r16, r17 ; ld2s r25, r26 }
+	{ or r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+	{ or r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+	{ or r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 }
+	{ or r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l1 r25 }
+	{ or r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+	{ or r5, r6, r7 ; st r25, r26 ; cmpleu r15, r16, r17 }
+	{ or r5, r6, r7 ; st1 r25, r26 ; addi r15, r16, 5 }
+	{ or r5, r6, r7 ; st1 r25, r26 ; shru r15, r16, r17 }
+	{ or r5, r6, r7 ; st2 r25, r26 ; shl1add r15, r16, r17 }
+	{ or r5, r6, r7 ; st4 r25, r26 ; move r15, r16 }
+	{ or r5, r6, r7 ; sub r15, r16, r17 ; ld4u r25, r26 }
+	{ or r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ or r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ or r5, r6, r7 ; xor r15, r16, r17 ; st1 r25, r26 }
+	{ ori r15, r16, 5 ; dblalign2 r5, r6, r7 }
+	{ ori r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ ori r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ ori r15, r16, 5 ; v1shl r5, r6, r7 }
+	{ ori r15, r16, 5 ; v2sads r5, r6, r7 }
+	{ ori r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ ori r5, r6, 5 ; ld2u_add r15, r16, 5 }
+	{ ori r5, r6, 5 ; prefetch_add_l3 r15, 5 }
+	{ ori r5, r6, 5 ; stnt2_add r15, r16, 5 }
+	{ ori r5, r6, 5 ; v2cmples r15, r16, r17 }
+	{ ori r5, r6, 5 ; xori r15, r16, 5 }
+	{ pcnt r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
+	{ pcnt r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+	{ pcnt r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+	{ pcnt r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+	{ pcnt r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+	{ pcnt r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+	{ pcnt r5, r6 ; fetchadd4 r15, r16, r17 }
+	{ pcnt r5, r6 ; ill ; prefetch_l2 r25 }
+	{ pcnt r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
+	{ pcnt r5, r6 ; jr r15 ; prefetch_l2_fault r25 }
+	{ pcnt r5, r6 ; ld r25, r26 ; cmpltu r15, r16, r17 }
+	{ pcnt r5, r6 ; ld1s r25, r26 ; and r15, r16, r17 }
+	{ pcnt r5, r6 ; ld1s r25, r26 ; subx r15, r16, r17 }
+	{ pcnt r5, r6 ; ld1u r25, r26 ; shl2addx r15, r16, r17 }
+	{ pcnt r5, r6 ; ld2s r25, r26 ; nop }
+	{ pcnt r5, r6 ; ld2u r25, r26 ; jalr r15 }
+	{ pcnt r5, r6 ; ld4s r25, r26 ; cmples r15, r16, r17 }
+	{ pcnt r5, r6 ; ld4u r15, r16 }
+	{ pcnt r5, r6 ; ld4u r25, r26 ; shrs r15, r16, r17 }
+	{ pcnt r5, r6 ; lnk r15 ; st r25, r26 }
+	{ pcnt r5, r6 ; move r15, r16 ; st r25, r26 }
+	{ pcnt r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+	{ pcnt r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+	{ pcnt r5, r6 ; prefetch r25 ; info 19 }
+	{ pcnt r5, r6 ; prefetch_l1 r25 ; addx r15, r16, r17 }
+	{ pcnt r5, r6 ; prefetch_l1 r25 ; shrui r15, r16, 5 }
+	{ pcnt r5, r6 ; prefetch_l1_fault r25 ; shl2add r15, r16, r17 }
+	{ pcnt r5, r6 ; prefetch_l2 r25 ; nop }
+	{ pcnt r5, r6 ; prefetch_l2_fault r25 ; jalrp r15 }
+	{ pcnt r5, r6 ; prefetch_l3 r25 ; cmplts r15, r16, r17 }
+	{ pcnt r5, r6 ; prefetch_l3_fault r25 ; addx r15, r16, r17 }
+	{ pcnt r5, r6 ; prefetch_l3_fault r25 ; shrui r15, r16, 5 }
+	{ pcnt r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 }
+	{ pcnt r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+	{ pcnt r5, r6 ; shl2add r15, r16, r17 }
+	{ pcnt r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+	{ pcnt r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 }
+	{ pcnt r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
+	{ pcnt r5, r6 ; st r25, r26 ; addx r15, r16, r17 }
+	{ pcnt r5, r6 ; st r25, r26 ; shrui r15, r16, 5 }
+	{ pcnt r5, r6 ; st1 r25, r26 ; shl2add r15, r16, r17 }
+	{ pcnt r5, r6 ; st2 r25, r26 ; mz r15, r16, r17 }
+	{ pcnt r5, r6 ; st4 r25, r26 ; info 19 }
+	{ pcnt r5, r6 ; stnt_add r15, r16, 5 }
+	{ pcnt r5, r6 ; v1add r15, r16, r17 }
+	{ pcnt r5, r6 ; v2int_h r15, r16, r17 }
+	{ pcnt r5, r6 ; xor r15, r16, r17 ; prefetch_l1 r25 }
+	{ prefetch r15 ; cmulfr r5, r6, r7 }
+	{ prefetch r15 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch r15 ; shrux r5, r6, r7 }
+	{ prefetch r15 ; v1mnz r5, r6, r7 }
+	{ prefetch r15 ; v2mults r5, r6, r7 }
+	{ prefetch r25 ; add r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ prefetch r25 ; add r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ prefetch r25 ; add r5, r6, r7 ; nop }
+	{ prefetch r25 ; addi r15, r16, 5 ; fsingle_pack1 r5, r6 }
+	{ prefetch r25 ; addi r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; addi r5, r6, 5 ; shl3add r15, r16, r17 }
+	{ prefetch r25 ; addx r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch r25 ; addx r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch r25 ; addx r5, r6, r7 }
+	{ prefetch r25 ; addxi r15, r16, 5 ; revbits r5, r6 }
+	{ prefetch r25 ; addxi r5, r6, 5 ; info 19 }
+	{ prefetch r25 ; and r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ prefetch r25 ; and r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ prefetch r25 ; and r5, r6, r7 ; nop }
+	{ prefetch r25 ; andi r15, r16, 5 ; fsingle_pack1 r5, r6 }
+	{ prefetch r25 ; andi r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; andi r5, r6, 5 ; shl3add r15, r16, r17 }
+	{ prefetch r25 ; clz r5, r6 ; rotl r15, r16, r17 }
+	{ prefetch r25 ; cmoveqz r5, r6, r7 ; mnz r15, r16, r17 }
+	{ prefetch r25 ; cmovnez r5, r6, r7 ; ill }
+	{ prefetch r25 ; cmpeq r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch r25 ; cmpeq r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch r25 ; cmpeq r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch r25 ; cmpeqi r15, r16, 5 ; fnop }
+	{ prefetch r25 ; cmpeqi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ prefetch r25 ; cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 }
+	{ prefetch r25 ; cmples r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch r25 ; cmples r5, r6, r7 ; andi r15, r16, 5 }
+	{ prefetch r25 ; cmples r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; cmpleu r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch r25 ; cmpleu r5, r6, r7 ; ill }
+	{ prefetch r25 ; cmplts r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch r25 ; cmplts r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch r25 ; cmplts r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch r25 ; cmpltsi r15, r16, 5 ; fnop }
+	{ prefetch r25 ; cmpltsi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ prefetch r25 ; cmpltsi r5, r6, 5 ; shl2addx r15, r16, r17 }
+	{ prefetch r25 ; cmpltu r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch r25 ; cmpltu r5, r6, r7 ; andi r15, r16, 5 }
+	{ prefetch r25 ; cmpltu r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; cmpne r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch r25 ; cmpne r5, r6, r7 ; ill }
+	{ prefetch r25 ; ctz r5, r6 ; cmples r15, r16, r17 }
+	{ prefetch r25 ; fnop ; add r5, r6, r7 }
+	{ prefetch r25 ; fnop ; mnz r15, r16, r17 }
+	{ prefetch r25 ; fnop ; shl3add r15, r16, r17 }
+	{ prefetch r25 ; fsingle_pack1 r5, r6 ; ill }
+	{ prefetch r25 ; ill ; cmovnez r5, r6, r7 }
+	{ prefetch r25 ; ill ; shl3add r5, r6, r7 }
+	{ prefetch r25 ; info 19 ; cmpltsi r15, r16, 5 }
+	{ prefetch r25 ; info 19 ; revbits r5, r6 }
+	{ prefetch r25 ; info 19 }
+	{ prefetch r25 ; jalr r15 ; revbits r5, r6 }
+	{ prefetch r25 ; jalrp r15 ; cmpne r5, r6, r7 }
+	{ prefetch r25 ; jalrp r15 ; subx r5, r6, r7 }
+	{ prefetch r25 ; jr r15 ; mulx r5, r6, r7 }
+	{ prefetch r25 ; jrp r15 ; cmpeqi r5, r6, 5 }
+	{ prefetch r25 ; jrp r15 ; shli r5, r6, 5 }
+	{ prefetch r25 ; lnk r15 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch r25 ; mnz r15, r16, r17 ; and r5, r6, r7 }
+	{ prefetch r25 ; mnz r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ prefetch r25 ; mnz r5, r6, r7 ; lnk r15 }
+	{ prefetch r25 ; move r15, r16 ; cmpltsi r5, r6, 5 }
+	{ prefetch r25 ; move r15, r16 ; shrui r5, r6, 5 }
+	{ prefetch r25 ; move r5, r6 ; shl r15, r16, r17 }
+	{ prefetch r25 ; movei r15, 5 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch r25 ; movei r5, 5 ; addi r15, r16, 5 }
+	{ prefetch r25 ; movei r5, 5 ; shru r15, r16, r17 }
+	{ prefetch r25 ; mul_hs_hs r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch r25 ; mul_hu_hu r5, r6, r7 ; nor r15, r16, r17 }
+	{ prefetch r25 ; mul_ls_ls r5, r6, r7 ; jrp r15 }
+	{ prefetch r25 ; mul_lu_lu r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch r25 ; mula_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch r25 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch r25 ; mula_hu_hu r5, r6, r7 ; shrs r15, r16, r17 }
+	{ prefetch r25 ; mula_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch r25 ; mula_lu_lu r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch r25 ; mulax r5, r6, r7 ; jalrp r15 }
+	{ prefetch r25 ; mulx r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch r25 ; mz r15, r16, r17 ; and r5, r6, r7 }
+	{ prefetch r25 ; mz r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ prefetch r25 ; mz r5, r6, r7 ; lnk r15 }
+	{ prefetch r25 ; nop ; cmovnez r5, r6, r7 }
+	{ prefetch r25 ; nop ; mula_lu_lu r5, r6, r7 }
+	{ prefetch r25 ; nop ; shrui r5, r6, 5 }
+	{ prefetch r25 ; nor r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch r25 ; nor r5, r6, r7 ; andi r15, r16, 5 }
+	{ prefetch r25 ; nor r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; or r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch r25 ; or r5, r6, r7 ; ill }
+	{ prefetch r25 ; pcnt r5, r6 ; cmples r15, r16, r17 }
+	{ prefetch r25 ; revbits r5, r6 ; addi r15, r16, 5 }
+	{ prefetch r25 ; revbits r5, r6 ; shru r15, r16, r17 }
+	{ prefetch r25 ; revbytes r5, r6 ; shl2add r15, r16, r17 }
+	{ prefetch r25 ; rotl r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch r25 ; rotl r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch r25 ; rotl r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch r25 ; rotli r15, r16, 5 ; or r5, r6, r7 }
+	{ prefetch r25 ; rotli r5, r6, 5 ; fnop }
+	{ prefetch r25 ; shl r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ prefetch r25 ; shl r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ prefetch r25 ; shl r5, r6, r7 ; movei r15, 5 }
+	{ prefetch r25 ; shl1add r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch r25 ; shl1add r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch r25 ; shl1add r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch r25 ; shl1addx r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch r25 ; shl1addx r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch r25 ; shl1addx r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch r25 ; shl2add r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch r25 ; shl2add r5, r6, r7 ; fnop }
+	{ prefetch r25 ; shl2addx r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ prefetch r25 ; shl2addx r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ prefetch r25 ; shl2addx r5, r6, r7 ; movei r15, 5 }
+	{ prefetch r25 ; shl3add r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch r25 ; shl3add r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch r25 ; shl3add r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch r25 ; shl3addx r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch r25 ; shl3addx r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch r25 ; shl3addx r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch r25 ; shli r15, r16, 5 ; or r5, r6, r7 }
+	{ prefetch r25 ; shli r5, r6, 5 ; fnop }
+	{ prefetch r25 ; shrs r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ prefetch r25 ; shrs r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ prefetch r25 ; shrs r5, r6, r7 ; movei r15, 5 }
+	{ prefetch r25 ; shrsi r15, r16, 5 ; ctz r5, r6 }
+	{ prefetch r25 ; shrsi r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ prefetch r25 ; shrsi r5, r6, 5 ; shl2add r15, r16, r17 }
+	{ prefetch r25 ; shru r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch r25 ; shru r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch r25 ; shru r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch r25 ; shrui r15, r16, 5 ; or r5, r6, r7 }
+	{ prefetch r25 ; shrui r5, r6, 5 ; fnop }
+	{ prefetch r25 ; sub r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ prefetch r25 ; sub r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ prefetch r25 ; sub r5, r6, r7 ; movei r15, 5 }
+	{ prefetch r25 ; subx r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch r25 ; subx r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch r25 ; subx r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch r25 ; tblidxb0 r5, r6 ; nor r15, r16, r17 }
+	{ prefetch r25 ; tblidxb1 r5, r6 ; jrp r15 }
+	{ prefetch r25 ; tblidxb2 r5, r6 ; cmpne r15, r16, r17 }
+	{ prefetch r25 ; tblidxb3 r5, r6 ; cmpeq r15, r16, r17 }
+	{ prefetch r25 ; tblidxb3 r5, r6 }
+	{ prefetch r25 ; xor r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch r25 ; xor r5, r6, r7 ; info 19 }
+	{ prefetch_add_l1 r15, 5 ; bfexts r5, r6, 5, 7 }
+	{ prefetch_add_l1 r15, 5 ; fsingle_mul1 r5, r6, r7 }
+	{ prefetch_add_l1 r15, 5 ; revbits r5, r6 }
+	{ prefetch_add_l1 r15, 5 ; v1cmpltu r5, r6, r7 }
+	{ prefetch_add_l1 r15, 5 ; v2cmpeqi r5, r6, 5 }
+	{ prefetch_add_l1 r15, 5 ; v4int_l r5, r6, r7 }
+	{ prefetch_add_l1_fault r15, 5 ; cmulhr r5, r6, r7 }
+	{ prefetch_add_l1_fault r15, 5 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_add_l1_fault r15, 5 ; shufflebytes r5, r6, r7 }
+	{ prefetch_add_l1_fault r15, 5 ; v1mulu r5, r6, r7 }
+	{ prefetch_add_l1_fault r15, 5 ; v2packh r5, r6, r7 }
+	{ prefetch_add_l2 r15, 5 ; bfins r5, r6, 5, 7 }
+	{ prefetch_add_l2 r15, 5 ; fsingle_pack1 r5, r6 }
+	{ prefetch_add_l2 r15, 5 ; rotl r5, r6, r7 }
+	{ prefetch_add_l2 r15, 5 ; v1cmpne r5, r6, r7 }
+	{ prefetch_add_l2 r15, 5 ; v2cmpleu r5, r6, r7 }
+	{ prefetch_add_l2 r15, 5 ; v4shl r5, r6, r7 }
+	{ prefetch_add_l2_fault r15, 5 ; crc32_8 r5, r6, r7 }
+	{ prefetch_add_l2_fault r15, 5 ; mula_hs_hu r5, r6, r7 }
+	{ prefetch_add_l2_fault r15, 5 ; subx r5, r6, r7 }
+	{ prefetch_add_l2_fault r15, 5 ; v1mz r5, r6, r7 }
+	{ prefetch_add_l2_fault r15, 5 ; v2packuc r5, r6, r7 }
+	{ prefetch_add_l3 r15, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_add_l3 r15, 5 ; fsingle_sub1 r5, r6, r7 }
+	{ prefetch_add_l3 r15, 5 ; shl r5, r6, r7 }
+	{ prefetch_add_l3 r15, 5 ; v1ddotpua r5, r6, r7 }
+	{ prefetch_add_l3 r15, 5 ; v2cmpltsi r5, r6, 5 }
+	{ prefetch_add_l3 r15, 5 ; v4shrs r5, r6, r7 }
+	{ prefetch_add_l3_fault r15, 5 ; dblalign r5, r6, r7 }
+	{ prefetch_add_l3_fault r15, 5 ; mula_hs_lu r5, r6, r7 }
+	{ prefetch_add_l3_fault r15, 5 ; tblidxb0 r5, r6 }
+	{ prefetch_add_l3_fault r15, 5 ; v1sadu r5, r6, r7 }
+	{ prefetch_add_l3_fault r15, 5 ; v2sadau r5, r6, r7 }
+	{ prefetch_l1 r15 ; cmpeq r5, r6, r7 }
+	{ prefetch_l1 r15 ; infol 0x1234 }
+	{ prefetch_l1 r15 ; shl1add r5, r6, r7 }
+	{ prefetch_l1 r15 ; v1ddotpusa r5, r6, r7 }
+	{ prefetch_l1 r15 ; v2cmpltui r5, r6, 5 }
+	{ prefetch_l1 r15 ; v4sub r5, r6, r7 }
+	{ prefetch_l1 r25 ; add r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l1 r25 ; add r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l1 r25 ; addi r15, r16, 5 ; clz r5, r6 }
+	{ prefetch_l1 r25 ; addi r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ prefetch_l1 r25 ; addi r5, r6, 5 ; move r15, r16 }
+	{ prefetch_l1 r25 ; addx r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l1 r25 ; addx r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l1 r25 ; addx r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; addxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l1 r25 ; addxi r5, r6, 5 ; addxi r15, r16, 5 }
+	{ prefetch_l1 r25 ; addxi r5, r6, 5 ; sub r15, r16, r17 }
+	{ prefetch_l1 r25 ; and r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l1 r25 ; and r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l1 r25 ; andi r15, r16, 5 ; clz r5, r6 }
+	{ prefetch_l1 r25 ; andi r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ prefetch_l1 r25 ; andi r5, r6, 5 ; move r15, r16 }
+	{ prefetch_l1 r25 ; clz r5, r6 ; info 19 }
+	{ prefetch_l1 r25 ; cmoveqz r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmovnez r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmovnez r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1 r25 ; cmpeq r15, r16, r17 ; nop }
+	{ prefetch_l1 r25 ; cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpeqi r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch_l1 r25 ; cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmpeqi r5, r6, 5 ; mnz r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmples r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmples r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmples r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpleu r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmpleu r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpleu r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1 r25 ; cmplts r15, r16, r17 ; nop }
+	{ prefetch_l1 r25 ; cmplts r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpltsi r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch_l1 r25 ; cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmpltsi r5, r6, 5 ; mnz r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpltu r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmpltu r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmpltu r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpne r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1 r25 ; cmpne r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; cmpne r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1 r25 ; ctz r5, r6 ; shl2addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; fnop ; cmpltu r5, r6, r7 }
+	{ prefetch_l1 r25 ; fnop ; rotl r5, r6, r7 }
+	{ prefetch_l1 r25 ; fsingle_pack1 r5, r6 ; addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; fsingle_pack1 r5, r6 ; shrui r15, r16, 5 }
+	{ prefetch_l1 r25 ; ill ; nop }
+	{ prefetch_l1 r25 ; info 19 ; clz r5, r6 }
+	{ prefetch_l1 r25 ; info 19 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l1 r25 ; info 19 ; shru r5, r6, r7 }
+	{ prefetch_l1 r25 ; jalr r15 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l1 r25 ; jalrp r15 ; addxi r5, r6, 5 }
+	{ prefetch_l1 r25 ; jalrp r15 ; shl r5, r6, r7 }
+	{ prefetch_l1 r25 ; jr r15 ; info 19 }
+	{ prefetch_l1 r25 ; jr r15 ; tblidxb3 r5, r6 }
+	{ prefetch_l1 r25 ; jrp r15 ; or r5, r6, r7 }
+	{ prefetch_l1 r25 ; lnk r15 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l1 r25 ; lnk r15 ; shrui r5, r6, 5 }
+	{ prefetch_l1 r25 ; mnz r15, r16, r17 ; mula_lu_lu r5, r6, r7 }
+	{ prefetch_l1 r25 ; mnz r5, r6, r7 ; cmples r15, r16, r17 }
+	{ prefetch_l1 r25 ; move r15, r16 ; addi r5, r6, 5 }
+	{ prefetch_l1 r25 ; move r15, r16 ; rotl r5, r6, r7 }
+	{ prefetch_l1 r25 ; move r5, r6 ; jalrp r15 }
+	{ prefetch_l1 r25 ; movei r15, 5 ; cmples r5, r6, r7 }
+	{ prefetch_l1 r25 ; movei r15, 5 ; shrs r5, r6, r7 }
+	{ prefetch_l1 r25 ; movei r5, 5 ; or r15, r16, r17 }
+	{ prefetch_l1 r25 ; mul_hs_hs r5, r6, r7 ; lnk r15 }
+	{ prefetch_l1 r25 ; mul_hu_hu r5, r6, r7 ; fnop }
+	{ prefetch_l1 r25 ; mul_ls_ls r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 ; add r15, r16, r17 }
+	{ prefetch_l1 r25 ; mul_lu_lu r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ prefetch_l1 r25 ; mula_hs_hs r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; mula_hu_hu r5, r6, r7 ; nop }
+	{ prefetch_l1 r25 ; mula_ls_ls r5, r6, r7 ; jr r15 }
+	{ prefetch_l1 r25 ; mula_lu_lu r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1 r25 ; mulax r5, r6, r7 ; andi r15, r16, 5 }
+	{ prefetch_l1 r25 ; mulax r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch_l1 r25 ; mulx r5, r6, r7 ; shli r15, r16, 5 }
+	{ prefetch_l1 r25 ; mz r15, r16, r17 ; mula_lu_lu r5, r6, r7 }
+	{ prefetch_l1 r25 ; mz r5, r6, r7 ; cmples r15, r16, r17 }
+	{ prefetch_l1 r25 ; nop ; add r5, r6, r7 }
+	{ prefetch_l1 r25 ; nop ; mnz r15, r16, r17 }
+	{ prefetch_l1 r25 ; nop ; shl3add r15, r16, r17 }
+	{ prefetch_l1 r25 ; nor r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1 r25 ; nor r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1 r25 ; nor r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1 r25 ; or r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1 r25 ; or r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; or r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1 r25 ; pcnt r5, r6 ; shl2addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; revbits r5, r6 ; or r15, r16, r17 }
+	{ prefetch_l1 r25 ; revbytes r5, r6 ; lnk r15 }
+	{ prefetch_l1 r25 ; rotl r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l1 r25 ; rotl r15, r16, r17 ; shrui r5, r6, 5 }
+	{ prefetch_l1 r25 ; rotl r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch_l1 r25 ; rotli r15, r16, 5 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l1 r25 ; rotli r5, r6, 5 ; addi r15, r16, 5 }
+	{ prefetch_l1 r25 ; rotli r5, r6, 5 ; shru r15, r16, r17 }
+	{ prefetch_l1 r25 ; shl r15, r16, r17 ; mz r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l1 r25 ; shl1add r15, r16, r17 ; and r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl1add r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl1add r5, r6, r7 ; lnk r15 }
+	{ prefetch_l1 r25 ; shl1addx r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l1 r25 ; shl1addx r15, r16, r17 ; shrui r5, r6, 5 }
+	{ prefetch_l1 r25 ; shl1addx r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch_l1 r25 ; shl2add r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl2add r5, r6, r7 ; addi r15, r16, 5 }
+	{ prefetch_l1 r25 ; shl2add r5, r6, r7 ; shru r15, r16, r17 }
+	{ prefetch_l1 r25 ; shl2addx r15, r16, r17 ; mz r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl2addx r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l1 r25 ; shl3add r15, r16, r17 ; and r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl3add r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ prefetch_l1 r25 ; shl3add r5, r6, r7 ; lnk r15 }
+	{ prefetch_l1 r25 ; shl3addx r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l1 r25 ; shl3addx r15, r16, r17 ; shrui r5, r6, 5 }
+	{ prefetch_l1 r25 ; shl3addx r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch_l1 r25 ; shli r15, r16, 5 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l1 r25 ; shli r5, r6, 5 ; addi r15, r16, 5 }
+	{ prefetch_l1 r25 ; shli r5, r6, 5 ; shru r15, r16, r17 }
+	{ prefetch_l1 r25 ; shrs r15, r16, r17 ; mz r5, r6, r7 }
+	{ prefetch_l1 r25 ; shrs r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l1 r25 ; shrsi r15, r16, 5 ; and r5, r6, r7 }
+	{ prefetch_l1 r25 ; shrsi r15, r16, 5 ; shl1add r5, r6, r7 }
+	{ prefetch_l1 r25 ; shrsi r5, r6, 5 ; lnk r15 }
+	{ prefetch_l1 r25 ; shru r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l1 r25 ; shru r15, r16, r17 ; shrui r5, r6, 5 }
+	{ prefetch_l1 r25 ; shru r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch_l1 r25 ; shrui r15, r16, 5 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l1 r25 ; shrui r5, r6, 5 ; addi r15, r16, 5 }
+	{ prefetch_l1 r25 ; shrui r5, r6, 5 ; shru r15, r16, r17 }
+	{ prefetch_l1 r25 ; sub r15, r16, r17 ; mz r5, r6, r7 }
+	{ prefetch_l1 r25 ; sub r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l1 r25 ; subx r15, r16, r17 ; and r5, r6, r7 }
+	{ prefetch_l1 r25 ; subx r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ prefetch_l1 r25 ; subx r5, r6, r7 ; lnk r15 }
+	{ prefetch_l1 r25 ; tblidxb0 r5, r6 ; fnop }
+	{ prefetch_l1 r25 ; tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l1 r25 ; tblidxb2 r5, r6 ; add r15, r16, r17 }
+	{ prefetch_l1 r25 ; tblidxb2 r5, r6 ; shrsi r15, r16, 5 }
+	{ prefetch_l1 r25 ; tblidxb3 r5, r6 ; shl1addx r15, r16, r17 }
+	{ prefetch_l1 r25 ; xor r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l1 r25 ; xor r5, r6, r7 ; addxi r15, r16, 5 }
+	{ prefetch_l1 r25 ; xor r5, r6, r7 ; sub r15, r16, r17 }
+	{ prefetch_l1_fault r15 ; dblalign4 r5, r6, r7 }
+	{ prefetch_l1_fault r15 ; mula_hu_ls r5, r6, r7 }
+	{ prefetch_l1_fault r15 ; tblidxb2 r5, r6 }
+	{ prefetch_l1_fault r15 ; v1shli r5, r6, 5 }
+	{ prefetch_l1_fault r15 ; v2sadu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; add r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l1_fault r25 ; add r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l1_fault r25 ; add r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; addi r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; addi r5, r6, 5 ; and r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; addi r5, r6, 5 ; subx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; addx r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; addx r5, r6, r7 ; fnop }
+	{ prefetch_l1_fault r25 ; addxi r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; addxi r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; addxi r5, r6, 5 ; movei r15, 5 }
+	{ prefetch_l1_fault r25 ; and r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l1_fault r25 ; and r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l1_fault r25 ; and r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; andi r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; andi r5, r6, 5 ; and r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; andi r5, r6, 5 ; subx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; clz r5, r6 ; shl3addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmoveqz r5, r6, r7 ; rotli r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; cmovnez r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l1_fault r25 ; cmpeq r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpeq r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpeq r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmpeqi r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpeqi r5, r6, 5 ; addxi r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; cmpeqi r5, r6, 5 ; sub r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmples r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmples r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmpleu r15, r16, r17 ; clz r5, r6 }
+	{ prefetch_l1_fault r25 ; cmpleu r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpleu r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l1_fault r25 ; cmplts r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmplts r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmplts r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmpltsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpltsi r5, r6, 5 ; addxi r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; cmpltsi r5, r6, 5 ; sub r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmpltu r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpltu r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; cmpne r15, r16, r17 ; clz r5, r6 }
+	{ prefetch_l1_fault r25 ; cmpne r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; cmpne r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l1_fault r25 ; ctz r5, r6 ; info 19 }
+	{ prefetch_l1_fault r25 ; fnop ; and r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; fnop ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; fnop ; shrsi r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; fsingle_pack1 r5, r6 ; move r15, r16 }
+	{ prefetch_l1_fault r25 ; ill ; cmpne r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; ill ; subx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; info 19 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l1_fault r25 ; info 19 ; shl1add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; jalr r15 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; jalr r15 ; shl2addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; jalrp r15 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; jr r15 ; addi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; jr r15 ; rotl r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; jrp r15 ; fnop }
+	{ prefetch_l1_fault r25 ; jrp r15 ; tblidxb1 r5, r6 }
+	{ prefetch_l1_fault r25 ; lnk r15 ; nop }
+	{ prefetch_l1_fault r25 ; mnz r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; mnz r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; mnz r5, r6, r7 ; rotl r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; move r15, r16 ; move r5, r6 }
+	{ prefetch_l1_fault r25 ; move r15, r16 }
+	{ prefetch_l1_fault r25 ; move r5, r6 ; shrs r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; movei r15, 5 ; mulax r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; movei r5, 5 ; cmpleu r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; mul_hu_hu r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 ; or r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; mul_lu_lu r5, r6, r7 ; lnk r15 }
+	{ prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 ; fnop }
+	{ prefetch_l1_fault r25 ; mula_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; mula_ls_ls r5, r6, r7 ; add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; mula_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; mulax r5, r6, r7 ; nop }
+	{ prefetch_l1_fault r25 ; mulx r5, r6, r7 ; jr r15 }
+	{ prefetch_l1_fault r25 ; mz r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; mz r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; mz r5, r6, r7 ; rotl r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; nop ; cmpleu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; nop ; or r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; nop ; tblidxb3 r5, r6 }
+	{ prefetch_l1_fault r25 ; nor r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; nor r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; or r15, r16, r17 ; clz r5, r6 }
+	{ prefetch_l1_fault r25 ; or r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; or r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l1_fault r25 ; pcnt r5, r6 ; info 19 }
+	{ prefetch_l1_fault r25 ; revbits r5, r6 ; cmpleu r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; revbytes r5, r6 ; addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; revbytes r5, r6 ; shrui r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; rotl r15, r16, r17 ; nop }
+	{ prefetch_l1_fault r25 ; rotl r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; rotli r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; rotli r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; rotli r5, r6, 5 ; mnz r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl1add r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl1add r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl1add r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; shl1addx r15, r16, r17 ; nop }
+	{ prefetch_l1_fault r25 ; shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl2add r15, r16, r17 ; andi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; shl2add r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl2add r5, r6, r7 ; mnz r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl2addx r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl2addx r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl3add r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shl3add r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shl3add r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; shl3addx r15, r16, r17 ; nop }
+	{ prefetch_l1_fault r25 ; shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shli r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; shli r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shli r5, r6, 5 ; mnz r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shrs r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shrs r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shrs r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shrsi r15, r16, 5 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shrsi r5, r6, 5 ; addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shrsi r5, r6, 5 ; shrui r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; shru r15, r16, r17 ; nop }
+	{ prefetch_l1_fault r25 ; shru r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; shrui r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch_l1_fault r25 ; shrui r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; shrui r5, r6, 5 ; mnz r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; sub r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; sub r15, r16, r17 ; sub r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; sub r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; subx r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; subx r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; subx r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l1_fault r25 ; tblidxb0 r5, r6 ; shl2addx r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; tblidxb1 r5, r6 ; or r15, r16, r17 }
+	{ prefetch_l1_fault r25 ; tblidxb2 r5, r6 ; lnk r15 }
+	{ prefetch_l1_fault r25 ; tblidxb3 r5, r6 ; fnop }
+	{ prefetch_l1_fault r25 ; xor r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; xor r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ prefetch_l1_fault r25 ; xor r5, r6, r7 ; movei r15, 5 }
+	{ prefetch_l2 r15 ; cmples r5, r6, r7 }
+	{ prefetch_l2 r15 ; mnz r5, r6, r7 }
+	{ prefetch_l2 r15 ; shl2add r5, r6, r7 }
+	{ prefetch_l2 r15 ; v1dotpa r5, r6, r7 }
+	{ prefetch_l2 r15 ; v2dotp r5, r6, r7 }
+	{ prefetch_l2 r15 ; xor r5, r6, r7 }
+	{ prefetch_l2 r25 ; add r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l2 r25 ; add r5, r6, r7 ; ill }
+	{ prefetch_l2 r25 ; addi r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ prefetch_l2 r25 ; addi r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ prefetch_l2 r25 ; addi r5, r6, 5 ; mz r15, r16, r17 }
+	{ prefetch_l2 r25 ; addx r15, r16, r17 ; fnop }
+	{ prefetch_l2 r25 ; addx r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l2 r25 ; addx r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; addxi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l2 r25 ; addxi r5, r6, 5 ; andi r15, r16, 5 }
+	{ prefetch_l2 r25 ; addxi r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch_l2 r25 ; and r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l2 r25 ; and r5, r6, r7 ; ill }
+	{ prefetch_l2 r25 ; andi r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ prefetch_l2 r25 ; andi r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ prefetch_l2 r25 ; andi r5, r6, 5 ; mz r15, r16, r17 }
+	{ prefetch_l2 r25 ; clz r5, r6 ; jalrp r15 }
+	{ prefetch_l2 r25 ; cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l2 r25 ; cmovnez r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmovnez r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmpeq r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpeq r5, r6, r7 ; fnop }
+	{ prefetch_l2 r25 ; cmpeqi r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpeqi r5, r6, 5 ; movei r15, 5 }
+	{ prefetch_l2 r25 ; cmples r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2 r25 ; cmples r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2 r25 ; cmples r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmpleu r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpleu r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmpleu r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmplts r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmplts r5, r6, r7 ; fnop }
+	{ prefetch_l2 r25 ; cmpltsi r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpltsi r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpltsi r5, r6, 5 ; movei r15, 5 }
+	{ prefetch_l2 r25 ; cmpltu r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2 r25 ; cmpltu r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2 r25 ; cmpltu r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmpne r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2 r25 ; cmpne r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2 r25 ; cmpne r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2 r25 ; ctz r5, r6 ; shl3addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; fnop ; cmpne r5, r6, r7 }
+	{ prefetch_l2 r25 ; fnop ; rotli r5, r6, 5 }
+	{ prefetch_l2 r25 ; fsingle_pack1 r5, r6 ; and r15, r16, r17 }
+	{ prefetch_l2 r25 ; fsingle_pack1 r5, r6 ; subx r15, r16, r17 }
+	{ prefetch_l2 r25 ; ill ; or r5, r6, r7 }
+	{ prefetch_l2 r25 ; info 19 ; cmovnez r5, r6, r7 }
+	{ prefetch_l2 r25 ; info 19 ; mula_lu_lu r5, r6, r7 }
+	{ prefetch_l2 r25 ; info 19 ; shrui r5, r6, 5 }
+	{ prefetch_l2 r25 ; jalr r15 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l2 r25 ; jalrp r15 ; andi r5, r6, 5 }
+	{ prefetch_l2 r25 ; jalrp r15 ; shl1addx r5, r6, r7 }
+	{ prefetch_l2 r25 ; jr r15 ; move r5, r6 }
+	{ prefetch_l2 r25 ; jr r15 }
+	{ prefetch_l2 r25 ; jrp r15 ; revbits r5, r6 }
+	{ prefetch_l2 r25 ; lnk r15 ; cmpne r5, r6, r7 }
+	{ prefetch_l2 r25 ; lnk r15 ; subx r5, r6, r7 }
+	{ prefetch_l2 r25 ; mnz r15, r16, r17 ; mulx r5, r6, r7 }
+	{ prefetch_l2 r25 ; mnz r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ prefetch_l2 r25 ; move r15, r16 ; addxi r5, r6, 5 }
+	{ prefetch_l2 r25 ; move r15, r16 ; shl r5, r6, r7 }
+	{ prefetch_l2 r25 ; move r5, r6 ; jrp r15 }
+	{ prefetch_l2 r25 ; movei r15, 5 ; cmplts r5, r6, r7 }
+	{ prefetch_l2 r25 ; movei r15, 5 ; shru r5, r6, r7 }
+	{ prefetch_l2 r25 ; movei r5, 5 ; rotli r15, r16, 5 }
+	{ prefetch_l2 r25 ; mul_hs_hs r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l2 r25 ; mul_hu_hu r5, r6, r7 ; info 19 }
+	{ prefetch_l2 r25 ; mul_ls_ls r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ prefetch_l2 r25 ; mul_lu_lu r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; mul_lu_lu r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l2 r25 ; mula_hs_hs r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; mula_hu_hu r5, r6, r7 ; or r15, r16, r17 }
+	{ prefetch_l2 r25 ; mula_ls_ls r5, r6, r7 ; lnk r15 }
+	{ prefetch_l2 r25 ; mula_lu_lu r5, r6, r7 ; fnop }
+	{ prefetch_l2 r25 ; mulax r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l2 r25 ; mulx r5, r6, r7 ; add r15, r16, r17 }
+	{ prefetch_l2 r25 ; mulx r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ prefetch_l2 r25 ; mz r15, r16, r17 ; mulx r5, r6, r7 }
+	{ prefetch_l2 r25 ; mz r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ prefetch_l2 r25 ; nop ; addi r5, r6, 5 }
+	{ prefetch_l2 r25 ; nop ; move r15, r16 }
+	{ prefetch_l2 r25 ; nop ; shl3addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; nor r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2 r25 ; nor r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2 r25 ; nor r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2 r25 ; or r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2 r25 ; or r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2 r25 ; or r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2 r25 ; pcnt r5, r6 ; shl3addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; revbits r5, r6 ; rotli r15, r16, 5 }
+	{ prefetch_l2 r25 ; revbytes r5, r6 ; move r15, r16 }
+	{ prefetch_l2 r25 ; rotl r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l2 r25 ; rotl r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l2 r25 ; rotl r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; rotli r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l2 r25 ; rotli r5, r6, 5 ; addxi r15, r16, 5 }
+	{ prefetch_l2 r25 ; rotli r5, r6, 5 ; sub r15, r16, r17 }
+	{ prefetch_l2 r25 ; shl r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l2 r25 ; shl1add r15, r16, r17 ; clz r5, r6 }
+	{ prefetch_l2 r25 ; shl1add r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl1add r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l2 r25 ; shl1addx r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl1addx r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl1addx r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; shl2add r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl2add r5, r6, r7 ; addxi r15, r16, 5 }
+	{ prefetch_l2 r25 ; shl2add r5, r6, r7 ; sub r15, r16, r17 }
+	{ prefetch_l2 r25 ; shl2addx r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl2addx r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l2 r25 ; shl3add r15, r16, r17 ; clz r5, r6 }
+	{ prefetch_l2 r25 ; shl3add r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl3add r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l2 r25 ; shl3addx r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl3addx r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l2 r25 ; shl3addx r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; shli r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l2 r25 ; shli r5, r6, 5 ; addxi r15, r16, 5 }
+	{ prefetch_l2 r25 ; shli r5, r6, 5 ; sub r15, r16, r17 }
+	{ prefetch_l2 r25 ; shrs r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l2 r25 ; shrs r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l2 r25 ; shrsi r15, r16, 5 ; clz r5, r6 }
+	{ prefetch_l2 r25 ; shrsi r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ prefetch_l2 r25 ; shrsi r5, r6, 5 ; move r15, r16 }
+	{ prefetch_l2 r25 ; shru r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l2 r25 ; shru r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l2 r25 ; shru r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; shrui r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l2 r25 ; shrui r5, r6, 5 ; addxi r15, r16, 5 }
+	{ prefetch_l2 r25 ; shrui r5, r6, 5 ; sub r15, r16, r17 }
+	{ prefetch_l2 r25 ; sub r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch_l2 r25 ; sub r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l2 r25 ; subx r15, r16, r17 ; clz r5, r6 }
+	{ prefetch_l2 r25 ; subx r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ prefetch_l2 r25 ; subx r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l2 r25 ; tblidxb0 r5, r6 ; info 19 }
+	{ prefetch_l2 r25 ; tblidxb1 r5, r6 ; cmpleu r15, r16, r17 }
+	{ prefetch_l2 r25 ; tblidxb2 r5, r6 ; addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; tblidxb2 r5, r6 ; shrui r15, r16, 5 }
+	{ prefetch_l2 r25 ; tblidxb3 r5, r6 ; shl2addx r15, r16, r17 }
+	{ prefetch_l2 r25 ; xor r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l2 r25 ; xor r5, r6, r7 ; andi r15, r16, 5 }
+	{ prefetch_l2 r25 ; xor r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch_l2_fault r15 ; fdouble_add_flags r5, r6, r7 }
+	{ prefetch_l2_fault r15 ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l2_fault r15 ; v1add r5, r6, r7 }
+	{ prefetch_l2_fault r15 ; v1shrsi r5, r6, 5 }
+	{ prefetch_l2_fault r15 ; v2shli r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; add r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l2_fault r25 ; add r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l2_fault r25 ; add r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; addi r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; addi r5, r6, 5 ; cmpeq r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; addi r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; addx r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l2_fault r25 ; addx r5, r6, r7 ; info 19 }
+	{ prefetch_l2_fault r25 ; addxi r15, r16, 5 ; cmpeq r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; addxi r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; addxi r5, r6, 5 ; nop }
+	{ prefetch_l2_fault r25 ; and r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l2_fault r25 ; and r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l2_fault r25 ; and r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; andi r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; andi r5, r6, 5 ; cmpeq r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; andi r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; clz r5, r6 ; shrs r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmoveqz r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmovnez r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmpeq r15, r16, r17 ; fnop }
+	{ prefetch_l2_fault r25 ; cmpeq r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l2_fault r25 ; cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmpeqi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; cmpeqi r5, r6, 5 ; andi r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; cmpeqi r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmples r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l2_fault r25 ; cmples r5, r6, r7 ; ill }
+	{ prefetch_l2_fault r25 ; cmpleu r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; cmpleu r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; cmpleu r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmplts r15, r16, r17 ; fnop }
+	{ prefetch_l2_fault r25 ; cmplts r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l2_fault r25 ; cmplts r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmpltsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; cmpltsi r5, r6, 5 ; andi r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; cmpltsi r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; cmpltu r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l2_fault r25 ; cmpltu r5, r6, r7 ; ill }
+	{ prefetch_l2_fault r25 ; cmpne r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; cmpne r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; cmpne r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; ctz r5, r6 ; jalrp r15 }
+	{ prefetch_l2_fault r25 ; fnop ; andi r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; fnop ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; fnop ; shru r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; fsingle_pack1 r5, r6 ; mz r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; ill ; fnop }
+	{ prefetch_l2_fault r25 ; ill ; tblidxb1 r5, r6 }
+	{ prefetch_l2_fault r25 ; info 19 ; info 19 }
+	{ prefetch_l2_fault r25 ; info 19 ; shl1addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; jalr r15 ; cmpeq r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; jalr r15 ; shl3addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; jalrp r15 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; jr r15 ; addxi r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; jr r15 ; shl r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; jrp r15 ; info 19 }
+	{ prefetch_l2_fault r25 ; jrp r15 ; tblidxb3 r5, r6 }
+	{ prefetch_l2_fault r25 ; lnk r15 ; or r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; mnz r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; mnz r15, r16, r17 ; shrui r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; mnz r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; move r15, r16 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; move r5, r6 ; addi r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; move r5, r6 ; shru r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; movei r15, 5 ; mz r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; movei r5, 5 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; mul_hs_hs r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mul_hs_hs r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mul_ls_ls r5, r6, r7 ; rotli r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 ; info 19 }
+	{ prefetch_l2_fault r25 ; mula_hu_hu r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; mula_lu_lu r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mulax r5, r6, r7 ; or r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; mulx r5, r6, r7 ; lnk r15 }
+	{ prefetch_l2_fault r25 ; mz r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; mz r15, r16, r17 ; shrui r5, r6, 5 }
+	{ prefetch_l2_fault r25 ; mz r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; nop ; cmplts r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; nop ; pcnt r5, r6 }
+	{ prefetch_l2_fault r25 ; nop ; xor r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; nor r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l2_fault r25 ; nor r5, r6, r7 ; ill }
+	{ prefetch_l2_fault r25 ; or r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; or r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; or r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; pcnt r5, r6 ; jalrp r15 }
+	{ prefetch_l2_fault r25 ; revbits r5, r6 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; revbytes r5, r6 ; and r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; revbytes r5, r6 ; subx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; rotl r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; rotl r5, r6, r7 ; fnop }
+	{ prefetch_l2_fault r25 ; rotli r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; rotli r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; rotli r5, r6, 5 ; movei r15, 5 }
+	{ prefetch_l2_fault r25 ; shl r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2_fault r25 ; shl r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2_fault r25 ; shl r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shl1add r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shl1add r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shl1add r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shl1addx r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shl1addx r5, r6, r7 ; fnop }
+	{ prefetch_l2_fault r25 ; shl2add r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shl2add r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shl2add r5, r6, r7 ; movei r15, 5 }
+	{ prefetch_l2_fault r25 ; shl2addx r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2_fault r25 ; shl2addx r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2_fault r25 ; shl2addx r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shl3add r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shl3add r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shl3add r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shl3addx r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shl3addx r5, r6, r7 ; fnop }
+	{ prefetch_l2_fault r25 ; shli r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shli r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shli r5, r6, 5 ; movei r15, 5 }
+	{ prefetch_l2_fault r25 ; shrs r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2_fault r25 ; shrs r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2_fault r25 ; shrs r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shrsi r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shrsi r5, r6, 5 ; and r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shrsi r5, r6, 5 ; subx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; shru r15, r16, r17 ; or r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shru r5, r6, r7 ; fnop }
+	{ prefetch_l2_fault r25 ; shrui r15, r16, 5 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shrui r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; shrui r5, r6, 5 ; movei r15, 5 }
+	{ prefetch_l2_fault r25 ; sub r15, r16, r17 ; ctz r5, r6 }
+	{ prefetch_l2_fault r25 ; sub r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch_l2_fault r25 ; sub r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; subx r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; subx r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; subx r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; tblidxb0 r5, r6 ; shl3addx r15, r16, r17 }
+	{ prefetch_l2_fault r25 ; tblidxb1 r5, r6 ; rotli r15, r16, 5 }
+	{ prefetch_l2_fault r25 ; tblidxb2 r5, r6 ; move r15, r16 }
+	{ prefetch_l2_fault r25 ; tblidxb3 r5, r6 ; info 19 }
+	{ prefetch_l2_fault r25 ; xor r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; xor r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ prefetch_l2_fault r25 ; xor r5, r6, r7 ; nop }
+	{ prefetch_l3 r15 ; cmplts r5, r6, r7 }
+	{ prefetch_l3 r15 ; movei r5, 5 }
+	{ prefetch_l3 r15 ; shl3add r5, r6, r7 }
+	{ prefetch_l3 r15 ; v1dotpua r5, r6, r7 }
+	{ prefetch_l3 r15 ; v2int_h r5, r6, r7 }
+	{ prefetch_l3 r25 ; add r15, r16, r17 ; add r5, r6, r7 }
+	{ prefetch_l3 r25 ; add r15, r16, r17 ; revbytes r5, r6 }
+	{ prefetch_l3 r25 ; add r5, r6, r7 ; jalr r15 }
+	{ prefetch_l3 r25 ; addi r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ prefetch_l3 r25 ; addi r15, r16, 5 ; shli r5, r6, 5 }
+	{ prefetch_l3 r25 ; addi r5, r6, 5 ; nor r15, r16, r17 }
+	{ prefetch_l3 r25 ; addx r15, r16, r17 ; info 19 }
+	{ prefetch_l3 r25 ; addx r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ prefetch_l3 r25 ; addx r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; addxi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l3 r25 ; addxi r5, r6, 5 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l3 r25 ; and r15, r16, r17 ; add r5, r6, r7 }
+	{ prefetch_l3 r25 ; and r15, r16, r17 ; revbytes r5, r6 }
+	{ prefetch_l3 r25 ; and r5, r6, r7 ; jalr r15 }
+	{ prefetch_l3 r25 ; andi r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ prefetch_l3 r25 ; andi r15, r16, 5 ; shli r5, r6, 5 }
+	{ prefetch_l3 r25 ; andi r5, r6, 5 ; nor r15, r16, r17 }
+	{ prefetch_l3 r25 ; clz r5, r6 ; jrp r15 }
+	{ prefetch_l3 r25 ; cmoveqz r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ prefetch_l3 r25 ; cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3 r25 ; cmovnez r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpeq r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l3 r25 ; cmpeq r5, r6, r7 ; info 19 }
+	{ prefetch_l3 r25 ; cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpeqi r5, r6, 5 ; nop }
+	{ prefetch_l3 r25 ; cmples r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3 r25 ; cmples r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3 r25 ; cmples r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3 r25 ; cmpleu r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3 r25 ; cmpleu r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmplts r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l3 r25 ; cmplts r5, r6, r7 ; info 19 }
+	{ prefetch_l3 r25 ; cmpltsi r15, r16, 5 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpltsi r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpltsi r5, r6, 5 ; nop }
+	{ prefetch_l3 r25 ; cmpltu r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3 r25 ; cmpltu r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3 r25 ; cmpltu r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3 r25 ; cmpne r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3 r25 ; cmpne r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3 r25 ; cmpne r5, r6, r7 }
+	{ prefetch_l3 r25 ; ctz r5, r6 ; shrs r15, r16, r17 }
+	{ prefetch_l3 r25 ; fnop ; fnop }
+	{ prefetch_l3 r25 ; fnop ; shl r5, r6, r7 }
+	{ prefetch_l3 r25 ; fsingle_pack1 r5, r6 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3 r25 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3 r25 ; ill ; revbits r5, r6 }
+	{ prefetch_l3 r25 ; info 19 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3 r25 ; info 19 ; mulx r5, r6, r7 }
+	{ prefetch_l3 r25 ; info 19 ; sub r5, r6, r7 }
+	{ prefetch_l3 r25 ; jalr r15 ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l3 r25 ; jalrp r15 ; cmoveqz r5, r6, r7 }
+	{ prefetch_l3 r25 ; jalrp r15 ; shl2addx r5, r6, r7 }
+	{ prefetch_l3 r25 ; jr r15 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l3 r25 ; jrp r15 ; addi r5, r6, 5 }
+	{ prefetch_l3 r25 ; jrp r15 ; rotl r5, r6, r7 }
+	{ prefetch_l3 r25 ; lnk r15 ; fnop }
+	{ prefetch_l3 r25 ; lnk r15 ; tblidxb1 r5, r6 }
+	{ prefetch_l3 r25 ; mnz r15, r16, r17 ; nop }
+	{ prefetch_l3 r25 ; mnz r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l3 r25 ; move r15, r16 ; andi r5, r6, 5 }
+	{ prefetch_l3 r25 ; move r15, r16 ; shl1addx r5, r6, r7 }
+	{ prefetch_l3 r25 ; move r5, r6 ; mnz r15, r16, r17 }
+	{ prefetch_l3 r25 ; movei r15, 5 ; cmpltu r5, r6, r7 }
+	{ prefetch_l3 r25 ; movei r15, 5 ; sub r5, r6, r7 }
+	{ prefetch_l3 r25 ; movei r5, 5 ; shl1add r15, r16, r17 }
+	{ prefetch_l3 r25 ; mul_hs_hs r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l3 r25 ; mul_hu_hu r5, r6, r7 ; jalrp r15 }
+	{ prefetch_l3 r25 ; mul_ls_ls r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l3 r25 ; mul_lu_lu r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l3 r25 ; mul_lu_lu r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l3 r25 ; mula_hs_hs r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; mula_hu_hu r5, r6, r7 ; rotli r15, r16, 5 }
+	{ prefetch_l3 r25 ; mula_ls_ls r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l3 r25 ; mula_lu_lu r5, r6, r7 ; info 19 }
+	{ prefetch_l3 r25 ; mulax r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ prefetch_l3 r25 ; mulx r5, r6, r7 ; addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; mulx r5, r6, r7 ; shrui r15, r16, 5 }
+	{ prefetch_l3 r25 ; mz r15, r16, r17 ; nop }
+	{ prefetch_l3 r25 ; mz r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ prefetch_l3 r25 ; nop ; addx r5, r6, r7 }
+	{ prefetch_l3 r25 ; nop ; movei r15, 5 }
+	{ prefetch_l3 r25 ; nop ; shli r15, r16, 5 }
+	{ prefetch_l3 r25 ; nor r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3 r25 ; nor r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3 r25 ; nor r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3 r25 ; or r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3 r25 ; or r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3 r25 ; or r5, r6, r7 }
+	{ prefetch_l3 r25 ; pcnt r5, r6 ; shrs r15, r16, r17 }
+	{ prefetch_l3 r25 ; revbits r5, r6 ; shl1add r15, r16, r17 }
+	{ prefetch_l3 r25 ; revbytes r5, r6 ; mz r15, r16, r17 }
+	{ prefetch_l3 r25 ; rotl r15, r16, r17 ; fnop }
+	{ prefetch_l3 r25 ; rotl r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l3 r25 ; rotl r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; rotli r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l3 r25 ; rotli r5, r6, 5 ; andi r15, r16, 5 }
+	{ prefetch_l3 r25 ; rotli r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch_l3 r25 ; shl r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l3 r25 ; shl r5, r6, r7 ; ill }
+	{ prefetch_l3 r25 ; shl1add r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch_l3 r25 ; shl1add r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch_l3 r25 ; shl1add r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l3 r25 ; shl1addx r15, r16, r17 ; fnop }
+	{ prefetch_l3 r25 ; shl1addx r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l3 r25 ; shl1addx r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; shl2add r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l3 r25 ; shl2add r5, r6, r7 ; andi r15, r16, 5 }
+	{ prefetch_l3 r25 ; shl2add r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch_l3 r25 ; shl2addx r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l3 r25 ; shl2addx r5, r6, r7 ; ill }
+	{ prefetch_l3 r25 ; shl3add r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch_l3 r25 ; shl3add r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch_l3 r25 ; shl3add r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l3 r25 ; shl3addx r15, r16, r17 ; fnop }
+	{ prefetch_l3 r25 ; shl3addx r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l3 r25 ; shl3addx r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; shli r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l3 r25 ; shli r5, r6, 5 ; andi r15, r16, 5 }
+	{ prefetch_l3 r25 ; shli r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch_l3 r25 ; shrs r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l3 r25 ; shrs r5, r6, r7 ; ill }
+	{ prefetch_l3 r25 ; shrsi r15, r16, 5 ; cmovnez r5, r6, r7 }
+	{ prefetch_l3 r25 ; shrsi r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ prefetch_l3 r25 ; shrsi r5, r6, 5 ; mz r15, r16, r17 }
+	{ prefetch_l3 r25 ; shru r15, r16, r17 ; fnop }
+	{ prefetch_l3 r25 ; shru r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch_l3 r25 ; shru r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; shrui r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l3 r25 ; shrui r5, r6, 5 ; andi r15, r16, 5 }
+	{ prefetch_l3 r25 ; shrui r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch_l3 r25 ; sub r15, r16, r17 ; pcnt r5, r6 }
+	{ prefetch_l3 r25 ; sub r5, r6, r7 ; ill }
+	{ prefetch_l3 r25 ; subx r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ prefetch_l3 r25 ; subx r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ prefetch_l3 r25 ; subx r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l3 r25 ; tblidxb0 r5, r6 ; jalrp r15 }
+	{ prefetch_l3 r25 ; tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l3 r25 ; tblidxb2 r5, r6 ; and r15, r16, r17 }
+	{ prefetch_l3 r25 ; tblidxb2 r5, r6 ; subx r15, r16, r17 }
+	{ prefetch_l3 r25 ; tblidxb3 r5, r6 ; shl3addx r15, r16, r17 }
+	{ prefetch_l3 r25 ; xor r15, r16, r17 ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l3 r25 ; xor r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l3_fault r15 ; add r5, r6, r7 }
+	{ prefetch_l3_fault r15 ; fdouble_mul_flags r5, r6, r7 }
+	{ prefetch_l3_fault r15 ; mula_lu_lu r5, r6, r7 }
+	{ prefetch_l3_fault r15 ; v1adduc r5, r6, r7 }
+	{ prefetch_l3_fault r15 ; v1shrui r5, r6, 5 }
+	{ prefetch_l3_fault r15 ; v2shrs r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; add r15, r16, r17 ; mnz r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; add r15, r16, r17 ; xor r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; add r5, r6, r7 ; shli r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; addi r15, r16, 5 ; mula_lu_lu r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; addi r5, r6, 5 ; cmples r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; addx r15, r16, r17 ; addi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; addx r15, r16, r17 ; rotl r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; addx r5, r6, r7 ; jalrp r15 }
+	{ prefetch_l3_fault r25 ; addxi r15, r16, 5 ; cmples r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; addxi r15, r16, 5 ; shrs r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; addxi r5, r6, 5 ; or r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; and r15, r16, r17 ; mnz r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; and r15, r16, r17 ; xor r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; and r5, r6, r7 ; shli r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; andi r15, r16, 5 ; mula_lu_lu r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; andi r5, r6, 5 ; cmples r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; clz r5, r6 ; addi r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; clz r5, r6 ; shru r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; cmoveqz r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; cmovnez r5, r6, r7 ; nor r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; cmpeq r15, r16, r17 ; info 19 }
+	{ prefetch_l3_fault r25 ; cmpeq r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ prefetch_l3_fault r25 ; cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; cmpeqi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; cmples r15, r16, r17 ; add r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; cmples r15, r16, r17 ; revbytes r5, r6 }
+	{ prefetch_l3_fault r25 ; cmples r5, r6, r7 ; jalr r15 }
+	{ prefetch_l3_fault r25 ; cmpleu r15, r16, r17 ; cmpeqi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; cmpleu r15, r16, r17 ; shli r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; cmpleu r5, r6, r7 ; nor r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; cmplts r15, r16, r17 ; info 19 }
+	{ prefetch_l3_fault r25 ; cmplts r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ prefetch_l3_fault r25 ; cmplts r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; cmpltsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 ; cmpeqi r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; cmpltu r15, r16, r17 ; add r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; cmpltu r15, r16, r17 ; revbytes r5, r6 }
+	{ prefetch_l3_fault r25 ; cmpltu r5, r6, r7 ; jalr r15 }
+	{ prefetch_l3_fault r25 ; cmpne r15, r16, r17 ; cmpeqi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; cmpne r15, r16, r17 ; shli r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; cmpne r5, r6, r7 ; nor r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; ctz r5, r6 ; jrp r15 }
+	{ prefetch_l3_fault r25 ; fnop ; cmoveqz r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; fnop ; mula_ls_ls r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; fnop ; shrui r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 ; nor r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; ill ; info 19 }
+	{ prefetch_l3_fault r25 ; ill ; tblidxb3 r5, r6 }
+	{ prefetch_l3_fault r25 ; info 19 ; jalrp r15 }
+	{ prefetch_l3_fault r25 ; info 19 ; shl2add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; jalr r15 ; cmples r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; jalr r15 ; shrs r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; jalrp r15 ; mula_hs_hs r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; jr r15 ; andi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; jr r15 ; shl1addx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; jrp r15 ; move r5, r6 }
+	{ prefetch_l3_fault r25 ; jrp r15 }
+	{ prefetch_l3_fault r25 ; lnk r15 ; revbits r5, r6 }
+	{ prefetch_l3_fault r25 ; mnz r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; mnz r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; mnz r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; move r15, r16 ; mul_ls_ls r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; move r5, r6 ; addxi r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; move r5, r6 ; sub r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; movei r15, 5 ; nor r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; movei r5, 5 ; cmpne r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; mul_hu_hu r5, r6, r7 ; shrs r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mul_ls_ls r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mul_lu_lu r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mula_hs_hs r5, r6, r7 ; jalrp r15 }
+	{ prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; mula_ls_ls r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mula_ls_ls r5, r6, r7 ; subx r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mula_lu_lu r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; mulax r5, r6, r7 ; rotli r15, r16, 5 }
+	{ prefetch_l3_fault r25 ; mulx r5, r6, r7 ; move r15, r16 }
+	{ prefetch_l3_fault r25 ; mz r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; mz r15, r16, r17 ; subx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; mz r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; nop ; cmpltsi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; nop ; revbytes r5, r6 }
+	{ prefetch_l3_fault r25 ; nor r15, r16, r17 ; add r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; nor r15, r16, r17 ; revbytes r5, r6 }
+	{ prefetch_l3_fault r25 ; nor r5, r6, r7 ; jalr r15 }
+	{ prefetch_l3_fault r25 ; or r15, r16, r17 ; cmpeqi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; or r15, r16, r17 ; shli r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; or r5, r6, r7 ; nor r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; pcnt r5, r6 ; jrp r15 }
+	{ prefetch_l3_fault r25 ; revbits r5, r6 ; cmpne r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; revbytes r5, r6 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; revbytes r5, r6 }
+	{ prefetch_l3_fault r25 ; rotl r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l3_fault r25 ; rotl r5, r6, r7 ; info 19 }
+	{ prefetch_l3_fault r25 ; rotli r15, r16, 5 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; rotli r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; rotli r5, r6, 5 ; nop }
+	{ prefetch_l3_fault r25 ; shl r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3_fault r25 ; shl r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3_fault r25 ; shl r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; shl1add r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shl1add r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; shl1add r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shl1addx r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l3_fault r25 ; shl1addx r5, r6, r7 ; info 19 }
+	{ prefetch_l3_fault r25 ; shl2add r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shl2add r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shl2add r5, r6, r7 ; nop }
+	{ prefetch_l3_fault r25 ; shl2addx r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3_fault r25 ; shl2addx r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3_fault r25 ; shl2addx r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; shl3add r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shl3add r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; shl3add r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shl3addx r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l3_fault r25 ; shl3addx r5, r6, r7 ; info 19 }
+	{ prefetch_l3_fault r25 ; shli r15, r16, 5 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shli r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shli r5, r6, 5 ; nop }
+	{ prefetch_l3_fault r25 ; shrs r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3_fault r25 ; shrs r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3_fault r25 ; shrs r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; shrsi r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shrsi r5, r6, 5 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; shrsi r5, r6, 5 }
+	{ prefetch_l3_fault r25 ; shru r15, r16, r17 ; revbits r5, r6 }
+	{ prefetch_l3_fault r25 ; shru r5, r6, r7 ; info 19 }
+	{ prefetch_l3_fault r25 ; shrui r15, r16, 5 ; cmpeq r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shrui r15, r16, 5 ; shl3addx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; shrui r5, r6, 5 ; nop }
+	{ prefetch_l3_fault r25 ; sub r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ prefetch_l3_fault r25 ; sub r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch_l3_fault r25 ; sub r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; subx r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; subx r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; subx r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; tblidxb0 r5, r6 ; shrs r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; tblidxb1 r5, r6 ; shl1add r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; tblidxb2 r5, r6 ; mz r15, r16, r17 }
+	{ prefetch_l3_fault r25 ; tblidxb3 r5, r6 ; jalrp r15 }
+	{ prefetch_l3_fault r25 ; xor r15, r16, r17 ; cmples r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; xor r15, r16, r17 ; shrs r5, r6, r7 }
+	{ prefetch_l3_fault r25 ; xor r5, r6, r7 ; or r15, r16, r17 }
+	{ raise ; cmpltu r5, r6, r7 }
+	{ raise ; mul_hs_hs r5, r6, r7 }
+	{ raise ; shli r5, r6, 5 }
+	{ raise ; v1dotpusa r5, r6, r7 }
+	{ raise ; v2maxs r5, r6, r7 }
+	{ revbits r5, r6 ; add r15, r16, r17 ; ld1u r25, r26 }
+	{ revbits r5, r6 ; addx r15, r16, r17 ; ld2s r25, r26 }
+	{ revbits r5, r6 ; and r15, r16, r17 ; ld2s r25, r26 }
+	{ revbits r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
+	{ revbits r5, r6 ; cmples r15, r16, r17 ; ld4s r25, r26 }
+	{ revbits r5, r6 ; cmplts r15, r16, r17 ; prefetch r25 }
+	{ revbits r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ revbits r5, r6 ; fetchand r15, r16, r17 }
+	{ revbits r5, r6 ; ill ; prefetch_l3_fault r25 }
+	{ revbits r5, r6 ; jalr r15 ; prefetch_l3 r25 }
+	{ revbits r5, r6 ; jr r15 ; st r25, r26 }
+	{ revbits r5, r6 ; ld r25, r26 ; ill }
+	{ revbits r5, r6 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
+	{ revbits r5, r6 ; ld1s_add r15, r16, 5 }
+	{ revbits r5, r6 ; ld1u r25, r26 ; shli r15, r16, 5 }
+	{ revbits r5, r6 ; ld2s r25, r26 ; rotl r15, r16, r17 }
+	{ revbits r5, r6 ; ld2u r25, r26 ; jrp r15 }
+	{ revbits r5, r6 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ revbits r5, r6 ; ld4u r25, r26 ; addx r15, r16, r17 }
+	{ revbits r5, r6 ; ld4u r25, r26 ; shrui r15, r16, 5 }
+	{ revbits r5, r6 ; lnk r15 ; st4 r25, r26 }
+	{ revbits r5, r6 ; move r15, r16 ; st4 r25, r26 }
+	{ revbits r5, r6 ; mz r15, r16, r17 ; st4 r25, r26 }
+	{ revbits r5, r6 ; or r15, r16, r17 ; ld r25, r26 }
+	{ revbits r5, r6 ; prefetch r25 ; jr r15 }
+	{ revbits r5, r6 ; prefetch_l1 r25 ; andi r15, r16, 5 }
+	{ revbits r5, r6 ; prefetch_l1 r25 ; xor r15, r16, r17 }
+	{ revbits r5, r6 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
+	{ revbits r5, r6 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
+	{ revbits r5, r6 ; prefetch_l2_fault r25 ; lnk r15 }
+	{ revbits r5, r6 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
+	{ revbits r5, r6 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
+	{ revbits r5, r6 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
+	{ revbits r5, r6 ; rotli r15, r16, 5 }
+	{ revbits r5, r6 ; shl1addx r15, r16, r17 ; ld r25, r26 }
+	{ revbits r5, r6 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
+	{ revbits r5, r6 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
+	{ revbits r5, r6 ; shrs r15, r16, r17 ; ld2u r25, r26 }
+	{ revbits r5, r6 ; shru r15, r16, r17 ; ld4u r25, r26 }
+	{ revbits r5, r6 ; st r25, r26 ; andi r15, r16, 5 }
+	{ revbits r5, r6 ; st r25, r26 ; xor r15, r16, r17 }
+	{ revbits r5, r6 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
+	{ revbits r5, r6 ; st2 r25, r26 ; or r15, r16, r17 }
+	{ revbits r5, r6 ; st4 r25, r26 ; jr r15 }
+	{ revbits r5, r6 ; sub r15, r16, r17 ; ld1u r25, r26 }
+	{ revbits r5, r6 ; v1cmpeq r15, r16, r17 }
+	{ revbits r5, r6 ; v2maxsi r15, r16, 5 }
+	{ revbits r5, r6 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+	{ revbytes r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ revbytes r5, r6 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ revbytes r5, r6 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+	{ revbytes r5, r6 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+	{ revbytes r5, r6 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+	{ revbytes r5, r6 ; cmpne r15, r16, r17 }
+	{ revbytes r5, r6 ; ill ; ld1u r25, r26 }
+	{ revbytes r5, r6 ; jalr r15 ; ld1s r25, r26 }
+	{ revbytes r5, r6 ; jr r15 ; ld2s r25, r26 }
+	{ revbytes r5, r6 ; ld r25, r26 ; and r15, r16, r17 }
+	{ revbytes r5, r6 ; ld r25, r26 ; subx r15, r16, r17 }
+	{ revbytes r5, r6 ; ld1s r25, r26 ; shl3add r15, r16, r17 }
+	{ revbytes r5, r6 ; ld1u r25, r26 ; nor r15, r16, r17 }
+	{ revbytes r5, r6 ; ld2s r25, r26 ; jalrp r15 }
+	{ revbytes r5, r6 ; ld2u r25, r26 ; cmpleu r15, r16, r17 }
+	{ revbytes r5, r6 ; ld4s r25, r26 ; add r15, r16, r17 }
+	{ revbytes r5, r6 ; ld4s r25, r26 ; shrsi r15, r16, 5 }
+	{ revbytes r5, r6 ; ld4u r25, r26 ; shl r15, r16, r17 }
+	{ revbytes r5, r6 ; lnk r15 ; ld4u r25, r26 }
+	{ revbytes r5, r6 ; move r15, r16 ; ld4u r25, r26 }
+	{ revbytes r5, r6 ; mz r15, r16, r17 ; ld4u r25, r26 }
+	{ revbytes r5, r6 ; nor r15, r16, r17 ; prefetch_l1 r25 }
+	{ revbytes r5, r6 ; prefetch r25 ; cmples r15, r16, r17 }
+	{ revbytes r5, r6 ; prefetch_add_l1_fault r15, 5 }
+	{ revbytes r5, r6 ; prefetch_l1 r25 ; shl2add r15, r16, r17 }
+	{ revbytes r5, r6 ; prefetch_l1_fault r25 ; nop }
+	{ revbytes r5, r6 ; prefetch_l2 r25 ; jalrp r15 }
+	{ revbytes r5, r6 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 }
+	{ revbytes r5, r6 ; prefetch_l3 r25 ; addx r15, r16, r17 }
+	{ revbytes r5, r6 ; prefetch_l3 r25 ; shrui r15, r16, 5 }
+	{ revbytes r5, r6 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 }
+	{ revbytes r5, r6 ; rotli r15, r16, 5 ; prefetch r25 }
+	{ revbytes r5, r6 ; shl1add r15, r16, r17 ; prefetch_l1 r25 }
+	{ revbytes r5, r6 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+	{ revbytes r5, r6 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+	{ revbytes r5, r6 ; shli r15, r16, 5 ; st r25, r26 }
+	{ revbytes r5, r6 ; shrsi r15, r16, 5 ; st r25, r26 }
+	{ revbytes r5, r6 ; shrui r15, r16, 5 ; st2 r25, r26 }
+	{ revbytes r5, r6 ; st r25, r26 ; shl2add r15, r16, r17 }
+	{ revbytes r5, r6 ; st1 r25, r26 ; nop }
+	{ revbytes r5, r6 ; st2 r25, r26 ; jalr r15 }
+	{ revbytes r5, r6 ; st4 r25, r26 ; cmples r15, r16, r17 }
+	{ revbytes r5, r6 ; st_add r15, r16, 5 }
+	{ revbytes r5, r6 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+	{ revbytes r5, r6 ; v2cmpeqi r15, r16, 5 }
+	{ revbytes r5, r6 ; xor r15, r16, r17 ; ld r25, r26 }
+	{ rotl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 }
+	{ rotl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 }
+	{ rotl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 }
+	{ rotl r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld1s r25, r26 }
+	{ rotl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+	{ rotl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 }
+	{ rotl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 }
+	{ rotl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ rotl r15, r16, r17 ; ctz r5, r6 ; ld1s r25, r26 }
+	{ rotl r15, r16, r17 ; fnop ; prefetch_l2 r25 }
+	{ rotl r15, r16, r17 ; info 19 ; ld4u r25, r26 }
+	{ rotl r15, r16, r17 ; ld r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ rotl r15, r16, r17 ; ld1s r25, r26 ; addxi r5, r6, 5 }
+	{ rotl r15, r16, r17 ; ld1s r25, r26 ; shl r5, r6, r7 }
+	{ rotl r15, r16, r17 ; ld1u r25, r26 ; info 19 }
+	{ rotl r15, r16, r17 ; ld1u r25, r26 ; tblidxb3 r5, r6 }
+	{ rotl r15, r16, r17 ; ld2s r25, r26 ; or r5, r6, r7 }
+	{ rotl r15, r16, r17 ; ld2u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ rotl r15, r16, r17 ; ld2u r25, r26 ; shrui r5, r6, 5 }
+	{ rotl r15, r16, r17 ; ld4s r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ rotl r15, r16, r17 ; ld4u r25, r26 ; cmovnez r5, r6, r7 }
+	{ rotl r15, r16, r17 ; ld4u r25, r26 ; shl3add r5, r6, r7 }
+	{ rotl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 }
+	{ rotl r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; ld4u r25, r26 }
+	{ rotl r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld2s r25, r26 }
+	{ rotl r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld2u r25, r26 }
+	{ rotl r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld1s r25, r26 }
+	{ rotl r15, r16, r17 ; mulax r5, r6, r7 ; ld1u r25, r26 }
+	{ rotl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 }
+	{ rotl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+	{ rotl r15, r16, r17 ; pcnt r5, r6 ; prefetch r25 }
+	{ rotl r15, r16, r17 ; prefetch r25 ; mula_hs_hs r5, r6, r7 }
+	{ rotl r15, r16, r17 ; prefetch_l1 r25 ; andi r5, r6, 5 }
+	{ rotl r15, r16, r17 ; prefetch_l1 r25 ; shl1addx r5, r6, r7 }
+	{ rotl r15, r16, r17 ; prefetch_l1_fault r25 ; move r5, r6 }
+	{ rotl r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ rotl r15, r16, r17 ; prefetch_l2 r25 ; revbits r5, r6 }
+	{ rotl r15, r16, r17 ; prefetch_l2_fault r25 ; cmpne r5, r6, r7 }
+	{ rotl r15, r16, r17 ; prefetch_l2_fault r25 ; subx r5, r6, r7 }
+	{ rotl r15, r16, r17 ; prefetch_l3 r25 ; mulx r5, r6, r7 }
+	{ rotl r15, r16, r17 ; prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 }
+	{ rotl r15, r16, r17 ; prefetch_l3_fault r25 ; shli r5, r6, 5 }
+	{ rotl r15, r16, r17 ; revbytes r5, r6 ; prefetch_l1 r25 }
+	{ rotl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+	{ rotl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ rotl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ rotl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 }
+	{ rotl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
+	{ rotl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+	{ rotl r15, r16, r17 ; shrux r5, r6, r7 }
+	{ rotl r15, r16, r17 ; st r25, r26 ; or r5, r6, r7 }
+	{ rotl r15, r16, r17 ; st1 r25, r26 ; cmpltsi r5, r6, 5 }
+	{ rotl r15, r16, r17 ; st1 r25, r26 ; shrui r5, r6, 5 }
+	{ rotl r15, r16, r17 ; st2 r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ rotl r15, r16, r17 ; st4 r25, r26 ; cmovnez r5, r6, r7 }
+	{ rotl r15, r16, r17 ; st4 r25, r26 ; shl3add r5, r6, r7 }
+	{ rotl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
+	{ rotl r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 }
+	{ rotl r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l1_fault r25 }
+	{ rotl r15, r16, r17 ; v1mnz r5, r6, r7 }
+	{ rotl r15, r16, r17 ; v2mults r5, r6, r7 }
+	{ rotl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ rotl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+	{ rotl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ rotl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ rotl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+	{ rotl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+	{ rotl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+	{ rotl r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ill ; ld1u r25, r26 }
+	{ rotl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+	{ rotl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+	{ rotl r5, r6, r7 ; ld r25, r26 ; and r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ld r25, r26 ; subx r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ld1s r25, r26 ; shl3add r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ld1u r25, r26 ; nor r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ld2s r25, r26 ; jalrp r15 }
+	{ rotl r5, r6, r7 ; ld2u r25, r26 ; cmpleu r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ld4s r25, r26 ; add r15, r16, r17 }
+	{ rotl r5, r6, r7 ; ld4s r25, r26 ; shrsi r15, r16, 5 }
+	{ rotl r5, r6, r7 ; ld4u r25, r26 ; shl r15, r16, r17 }
+	{ rotl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+	{ rotl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+	{ rotl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
+	{ rotl r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l1 r25 }
+	{ rotl r5, r6, r7 ; prefetch r25 ; cmples r15, r16, r17 }
+	{ rotl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+	{ rotl r5, r6, r7 ; prefetch_l1 r25 ; shl2add r15, r16, r17 }
+	{ rotl r5, r6, r7 ; prefetch_l1_fault r25 ; nop }
+	{ rotl r5, r6, r7 ; prefetch_l2 r25 ; jalrp r15 }
+	{ rotl r5, r6, r7 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 }
+	{ rotl r5, r6, r7 ; prefetch_l3 r25 ; addx r15, r16, r17 }
+	{ rotl r5, r6, r7 ; prefetch_l3 r25 ; shrui r15, r16, 5 }
+	{ rotl r5, r6, r7 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 }
+	{ rotl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+	{ rotl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1 r25 }
+	{ rotl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+	{ rotl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+	{ rotl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+	{ rotl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+	{ rotl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+	{ rotl r5, r6, r7 ; st r25, r26 ; shl2add r15, r16, r17 }
+	{ rotl r5, r6, r7 ; st1 r25, r26 ; nop }
+	{ rotl r5, r6, r7 ; st2 r25, r26 ; jalr r15 }
+	{ rotl r5, r6, r7 ; st4 r25, r26 ; cmples r15, r16, r17 }
+	{ rotl r5, r6, r7 ; st_add r15, r16, 5 }
+	{ rotl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+	{ rotl r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+	{ rotl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
+	{ rotli r15, r16, 5 ; addi r5, r6, 5 ; ld1s r25, r26 }
+	{ rotli r15, r16, 5 ; addxi r5, r6, 5 ; ld1u r25, r26 }
+	{ rotli r15, r16, 5 ; andi r5, r6, 5 ; ld1u r25, r26 }
+	{ rotli r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld1s r25, r26 }
+	{ rotli r15, r16, 5 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+	{ rotli r15, r16, 5 ; cmples r5, r6, r7 ; ld4s r25, r26 }
+	{ rotli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch r25 }
+	{ rotli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ rotli r15, r16, 5 ; ctz r5, r6 ; ld1s r25, r26 }
+	{ rotli r15, r16, 5 ; fnop ; prefetch_l2 r25 }
+	{ rotli r15, r16, 5 ; info 19 ; ld4u r25, r26 }
+	{ rotli r15, r16, 5 ; ld r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ rotli r15, r16, 5 ; ld1s r25, r26 ; addxi r5, r6, 5 }
+	{ rotli r15, r16, 5 ; ld1s r25, r26 ; shl r5, r6, r7 }
+	{ rotli r15, r16, 5 ; ld1u r25, r26 ; info 19 }
+	{ rotli r15, r16, 5 ; ld1u r25, r26 ; tblidxb3 r5, r6 }
+	{ rotli r15, r16, 5 ; ld2s r25, r26 ; or r5, r6, r7 }
+	{ rotli r15, r16, 5 ; ld2u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ rotli r15, r16, 5 ; ld2u r25, r26 ; shrui r5, r6, 5 }
+	{ rotli r15, r16, 5 ; ld4s r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ rotli r15, r16, 5 ; ld4u r25, r26 ; cmovnez r5, r6, r7 }
+	{ rotli r15, r16, 5 ; ld4u r25, r26 ; shl3add r5, r6, r7 }
+	{ rotli r15, r16, 5 ; move r5, r6 ; ld4s r25, r26 }
+	{ rotli r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; ld4u r25, r26 }
+	{ rotli r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; ld2s r25, r26 }
+	{ rotli r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; ld2u r25, r26 }
+	{ rotli r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld1s r25, r26 }
+	{ rotli r15, r16, 5 ; mulax r5, r6, r7 ; ld1u r25, r26 }
+	{ rotli r15, r16, 5 ; mz r5, r6, r7 ; ld2u r25, r26 }
+	{ rotli r15, r16, 5 ; nor r5, r6, r7 ; ld4u r25, r26 }
+	{ rotli r15, r16, 5 ; pcnt r5, r6 ; prefetch r25 }
+	{ rotli r15, r16, 5 ; prefetch r25 ; mula_hs_hs r5, r6, r7 }
+	{ rotli r15, r16, 5 ; prefetch_l1 r25 ; andi r5, r6, 5 }
+	{ rotli r15, r16, 5 ; prefetch_l1 r25 ; shl1addx r5, r6, r7 }
+	{ rotli r15, r16, 5 ; prefetch_l1_fault r25 ; move r5, r6 }
+	{ rotli r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ rotli r15, r16, 5 ; prefetch_l2 r25 ; revbits r5, r6 }
+	{ rotli r15, r16, 5 ; prefetch_l2_fault r25 ; cmpne r5, r6, r7 }
+	{ rotli r15, r16, 5 ; prefetch_l2_fault r25 ; subx r5, r6, r7 }
+	{ rotli r15, r16, 5 ; prefetch_l3 r25 ; mulx r5, r6, r7 }
+	{ rotli r15, r16, 5 ; prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 }
+	{ rotli r15, r16, 5 ; prefetch_l3_fault r25 ; shli r5, r6, 5 }
+	{ rotli r15, r16, 5 ; revbytes r5, r6 ; prefetch_l1 r25 }
+	{ rotli r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+	{ rotli r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ rotli r15, r16, 5 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ rotli r15, r16, 5 ; shl3add r5, r6, r7 ; st1 r25, r26 }
+	{ rotli r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 }
+	{ rotli r15, r16, 5 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+	{ rotli r15, r16, 5 ; shrux r5, r6, r7 }
+	{ rotli r15, r16, 5 ; st r25, r26 ; or r5, r6, r7 }
+	{ rotli r15, r16, 5 ; st1 r25, r26 ; cmpltsi r5, r6, 5 }
+	{ rotli r15, r16, 5 ; st1 r25, r26 ; shrui r5, r6, 5 }
+	{ rotli r15, r16, 5 ; st2 r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ rotli r15, r16, 5 ; st4 r25, r26 ; cmovnez r5, r6, r7 }
+	{ rotli r15, r16, 5 ; st4 r25, r26 ; shl3add r5, r6, r7 }
+	{ rotli r15, r16, 5 ; subx r5, r6, r7 ; ld4u r25, r26 }
+	{ rotli r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch r25 }
+	{ rotli r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l1_fault r25 }
+	{ rotli r15, r16, 5 ; v1mnz r5, r6, r7 }
+	{ rotli r15, r16, 5 ; v2mults r5, r6, r7 }
+	{ rotli r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ rotli r5, r6, 5 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+	{ rotli r5, r6, 5 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ rotli r5, r6, 5 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ rotli r5, r6, 5 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+	{ rotli r5, r6, 5 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+	{ rotli r5, r6, 5 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+	{ rotli r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ill ; ld1u r25, r26 }
+	{ rotli r5, r6, 5 ; jalr r15 ; ld1s r25, r26 }
+	{ rotli r5, r6, 5 ; jr r15 ; ld2s r25, r26 }
+	{ rotli r5, r6, 5 ; ld r25, r26 ; and r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ld r25, r26 ; subx r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ld1s r25, r26 ; shl3add r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ld1u r25, r26 ; nor r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ld2s r25, r26 ; jalrp r15 }
+	{ rotli r5, r6, 5 ; ld2u r25, r26 ; cmpleu r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ld4s r25, r26 ; add r15, r16, r17 }
+	{ rotli r5, r6, 5 ; ld4s r25, r26 ; shrsi r15, r16, 5 }
+	{ rotli r5, r6, 5 ; ld4u r25, r26 ; shl r15, r16, r17 }
+	{ rotli r5, r6, 5 ; lnk r15 ; ld4u r25, r26 }
+	{ rotli r5, r6, 5 ; move r15, r16 ; ld4u r25, r26 }
+	{ rotli r5, r6, 5 ; mz r15, r16, r17 ; ld4u r25, r26 }
+	{ rotli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l1 r25 }
+	{ rotli r5, r6, 5 ; prefetch r25 ; cmples r15, r16, r17 }
+	{ rotli r5, r6, 5 ; prefetch_add_l1_fault r15, 5 }
+	{ rotli r5, r6, 5 ; prefetch_l1 r25 ; shl2add r15, r16, r17 }
+	{ rotli r5, r6, 5 ; prefetch_l1_fault r25 ; nop }
+	{ rotli r5, r6, 5 ; prefetch_l2 r25 ; jalrp r15 }
+	{ rotli r5, r6, 5 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 }
+	{ rotli r5, r6, 5 ; prefetch_l3 r25 ; addx r15, r16, r17 }
+	{ rotli r5, r6, 5 ; prefetch_l3 r25 ; shrui r15, r16, 5 }
+	{ rotli r5, r6, 5 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 }
+	{ rotli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch r25 }
+	{ rotli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l1 r25 }
+	{ rotli r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+	{ rotli r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+	{ rotli r5, r6, 5 ; shli r15, r16, 5 ; st r25, r26 }
+	{ rotli r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 }
+	{ rotli r5, r6, 5 ; shrui r15, r16, 5 ; st2 r25, r26 }
+	{ rotli r5, r6, 5 ; st r25, r26 ; shl2add r15, r16, r17 }
+	{ rotli r5, r6, 5 ; st1 r25, r26 ; nop }
+	{ rotli r5, r6, 5 ; st2 r25, r26 ; jalr r15 }
+	{ rotli r5, r6, 5 ; st4 r25, r26 ; cmples r15, r16, r17 }
+	{ rotli r5, r6, 5 ; st_add r15, r16, 5 }
+	{ rotli r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+	{ rotli r5, r6, 5 ; v2cmpeqi r15, r16, 5 }
+	{ rotli r5, r6, 5 ; xor r15, r16, r17 ; ld r25, r26 }
+	{ shl r15, r16, r17 ; addi r5, r6, 5 ; ld1s r25, r26 }
+	{ shl r15, r16, r17 ; addxi r5, r6, 5 ; ld1u r25, r26 }
+	{ shl r15, r16, r17 ; andi r5, r6, 5 ; ld1u r25, r26 }
+	{ shl r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld1s r25, r26 }
+	{ shl r15, r16, r17 ; cmpeq r5, r6, r7 ; ld2s r25, r26 }
+	{ shl r15, r16, r17 ; cmples r5, r6, r7 ; ld4s r25, r26 }
+	{ shl r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch r25 }
+	{ shl r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl r15, r16, r17 ; ctz r5, r6 ; ld1s r25, r26 }
+	{ shl r15, r16, r17 ; fnop ; prefetch_l2 r25 }
+	{ shl r15, r16, r17 ; info 19 ; ld4u r25, r26 }
+	{ shl r15, r16, r17 ; ld r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shl r15, r16, r17 ; ld1s r25, r26 ; addxi r5, r6, 5 }
+	{ shl r15, r16, r17 ; ld1s r25, r26 ; shl r5, r6, r7 }
+	{ shl r15, r16, r17 ; ld1u r25, r26 ; info 19 }
+	{ shl r15, r16, r17 ; ld1u r25, r26 ; tblidxb3 r5, r6 }
+	{ shl r15, r16, r17 ; ld2s r25, r26 ; or r5, r6, r7 }
+	{ shl r15, r16, r17 ; ld2u r25, r26 ; cmpltsi r5, r6, 5 }
+	{ shl r15, r16, r17 ; ld2u r25, r26 ; shrui r5, r6, 5 }
+	{ shl r15, r16, r17 ; ld4s r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ shl r15, r16, r17 ; ld4u r25, r26 ; cmovnez r5, r6, r7 }
+	{ shl r15, r16, r17 ; ld4u r25, r26 ; shl3add r5, r6, r7 }
+	{ shl r15, r16, r17 ; move r5, r6 ; ld4s r25, r26 }
+	{ shl r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; ld4u r25, r26 }
+	{ shl r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld2s r25, r26 }
+	{ shl r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld2u r25, r26 }
+	{ shl r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld1s r25, r26 }
+	{ shl r15, r16, r17 ; mulax r5, r6, r7 ; ld1u r25, r26 }
+	{ shl r15, r16, r17 ; mz r5, r6, r7 ; ld2u r25, r26 }
+	{ shl r15, r16, r17 ; nor r5, r6, r7 ; ld4u r25, r26 }
+	{ shl r15, r16, r17 ; pcnt r5, r6 ; prefetch r25 }
+	{ shl r15, r16, r17 ; prefetch r25 ; mula_hs_hs r5, r6, r7 }
+	{ shl r15, r16, r17 ; prefetch_l1 r25 ; andi r5, r6, 5 }
+	{ shl r15, r16, r17 ; prefetch_l1 r25 ; shl1addx r5, r6, r7 }
+	{ shl r15, r16, r17 ; prefetch_l1_fault r25 ; move r5, r6 }
+	{ shl r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ shl r15, r16, r17 ; prefetch_l2 r25 ; revbits r5, r6 }
+	{ shl r15, r16, r17 ; prefetch_l2_fault r25 ; cmpne r5, r6, r7 }
+	{ shl r15, r16, r17 ; prefetch_l2_fault r25 ; subx r5, r6, r7 }
+	{ shl r15, r16, r17 ; prefetch_l3 r25 ; mulx r5, r6, r7 }
+	{ shl r15, r16, r17 ; prefetch_l3_fault r25 ; cmpeqi r5, r6, 5 }
+	{ shl r15, r16, r17 ; prefetch_l3_fault r25 ; shli r5, r6, 5 }
+	{ shl r15, r16, r17 ; revbytes r5, r6 ; prefetch_l1 r25 }
+	{ shl r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l2 r25 }
+	{ shl r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl r15, r16, r17 ; shl2add r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl r15, r16, r17 ; shl3add r5, r6, r7 ; st1 r25, r26 }
+	{ shl r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 }
+	{ shl r15, r16, r17 ; shrsi r5, r6, 5 ; st4 r25, r26 }
+	{ shl r15, r16, r17 ; shrux r5, r6, r7 }
+	{ shl r15, r16, r17 ; st r25, r26 ; or r5, r6, r7 }
+	{ shl r15, r16, r17 ; st1 r25, r26 ; cmpltsi r5, r6, 5 }
+	{ shl r15, r16, r17 ; st1 r25, r26 ; shrui r5, r6, 5 }
+	{ shl r15, r16, r17 ; st2 r25, r26 ; mula_lu_lu r5, r6, r7 }
+	{ shl r15, r16, r17 ; st4 r25, r26 ; cmovnez r5, r6, r7 }
+	{ shl r15, r16, r17 ; st4 r25, r26 ; shl3add r5, r6, r7 }
+	{ shl r15, r16, r17 ; subx r5, r6, r7 ; ld4u r25, r26 }
+	{ shl r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 }
+	{ shl r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l1_fault r25 }
+	{ shl r15, r16, r17 ; v1mnz r5, r6, r7 }
+	{ shl r15, r16, r17 ; v2mults r5, r6, r7 }
+	{ shl r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l3 r25 }
+	{ shl r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ shl r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ shl r5, r6, r7 ; cmpeqi r15, r16, 5 ; st1 r25, r26 }
+	{ shl r5, r6, r7 ; cmpleu r15, r16, r17 ; st1 r25, r26 }
+	{ shl r5, r6, r7 ; cmpltsi r15, r16, 5 ; st4 r25, r26 }
+	{ shl r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ shl r5, r6, r7 ; ill ; ld1u r25, r26 }
+	{ shl r5, r6, r7 ; jalr r15 ; ld1s r25, r26 }
+	{ shl r5, r6, r7 ; jr r15 ; ld2s r25, r26 }
+	{ shl r5, r6, r7 ; ld r25, r26 ; and r15, r16, r17 }
+	{ shl r5, r6, r7 ; ld r25, r26 ; subx r15, r16, r17 }
+	{ shl r5, r6, r7 ; ld1s r25, r26 ; shl3add r15, r16, r17 }
+	{ shl r5, r6, r7 ; ld1u r25, r26 ; nor r15, r16, r17 }
+	{ shl r5, r6, r7 ; ld2s r25, r26 ; jalrp r15 }
+	{ shl r5, r6, r7 ; ld2u r25, r26 ; cmpleu r15, r16, r17 }
+	{ shl r5, r6, r7 ; ld4s r25, r26 ; add r15, r16, r17 }
+	{ shl r5, r6, r7 ; ld4s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl r5, r6, r7 ; ld4u r25, r26 ; shl r15, r16, r17 }
+	{ shl r5, r6, r7 ; lnk r15 ; ld4u r25, r26 }
+	{ shl r5, r6, r7 ; move r15, r16 ; ld4u r25, r26 }
+	{ shl r5, r6, r7 ; mz r15, r16, r17 ; ld4u r25, r26 }
+	{ shl r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l1 r25 }
+	{ shl r5, r6, r7 ; prefetch r25 ; cmples r15, r16, r17 }
+	{ shl r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+	{ shl r5, r6, r7 ; prefetch_l1 r25 ; shl2add r15, r16, r17 }
+	{ shl r5, r6, r7 ; prefetch_l1_fault r25 ; nop }
+	{ shl r5, r6, r7 ; prefetch_l2 r25 ; jalrp r15 }
+	{ shl r5, r6, r7 ; prefetch_l2_fault r25 ; cmplts r15, r16, r17 }
+	{ shl r5, r6, r7 ; prefetch_l3 r25 ; addx r15, r16, r17 }
+	{ shl r5, r6, r7 ; prefetch_l3 r25 ; shrui r15, r16, 5 }
+	{ shl r5, r6, r7 ; prefetch_l3_fault r25 ; shl2add r15, r16, r17 }
+	{ shl r5, r6, r7 ; rotli r15, r16, 5 ; prefetch r25 }
+	{ shl r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1 r25 }
+	{ shl r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl r5, r6, r7 ; shli r15, r16, 5 ; st r25, r26 }
+	{ shl r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 }
+	{ shl r5, r6, r7 ; shrui r15, r16, 5 ; st2 r25, r26 }
+	{ shl r5, r6, r7 ; st r25, r26 ; shl2add r15, r16, r17 }
+	{ shl r5, r6, r7 ; st1 r25, r26 ; nop }
+	{ shl r5, r6, r7 ; st2 r25, r26 ; jalr r15 }
+	{ shl r5, r6, r7 ; st4 r25, r26 ; cmples r15, r16, r17 }
+	{ shl r5, r6, r7 ; st_add r15, r16, 5 }
+	{ shl r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+	{ shl r5, r6, r7 ; xor r15, r16, r17 ; ld r25, r26 }
+	{ shl16insli r15, r16, 0x1234 ; cmpltsi r5, r6, 5 }
+	{ shl16insli r15, r16, 0x1234 ; moveli r5, 0x1234 }
+	{ shl16insli r15, r16, 0x1234 ; shl3addx r5, r6, r7 }
+	{ shl16insli r15, r16, 0x1234 ; v1dotpus r5, r6, r7 }
+	{ shl16insli r15, r16, 0x1234 ; v2int_l r5, r6, r7 }
+	{ shl16insli r5, r6, 0x1234 ; addi r15, r16, 5 }
+	{ shl16insli r5, r6, 0x1234 ; infol 0x1234 }
+	{ shl16insli r5, r6, 0x1234 ; mnz r15, r16, r17 }
+	{ shl16insli r5, r6, 0x1234 ; shrui r15, r16, 5 }
+	{ shl16insli r5, r6, 0x1234 ; v1mnz r15, r16, r17 }
+	{ shl16insli r5, r6, 0x1234 ; v2sub r15, r16, r17 }
+	{ shl1add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shl1add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl1add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl1add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shl1add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shl1add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl1add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl1add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl1add r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shl1add r15, r16, r17 ; fnop ; st r25, r26 }
+	{ shl1add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ shl1add r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ shl1add r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shl1add r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ shl1add r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shl1add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl1add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shl1add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl1add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shl1add r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shl1add r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl1add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl1add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shl1add r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ shl1add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shl1add r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shl1add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shl1add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shl1add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shl1add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shl1add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shl1add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shl1add r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ shl1add r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shl1add r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ shl1add r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shl1add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl1add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shl1add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shl1add r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shl1add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shl1add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shl1add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shl1add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shl1add r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shl1add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shl1add r5, r6, r7 ; dtlbpr r15 }
+	{ shl1add r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ shl1add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ shl1add r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ shl1add r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ shl1add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shl1add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl1add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl1add r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ shl1add r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ shl1add r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; prefetch_l3 r25 }
+	{ shl1add r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shl1add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl1add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shl1add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shl1add r5, r6, r7 ; shli r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ shl1add r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shl1add r5, r6, r7 ; stnt2 r15, r16 }
+	{ shl1add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shl1add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ shl1add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shl1addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shl1addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl1addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl1addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shl1addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shl1addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl1addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl1addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl1addx r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shl1addx r15, r16, r17 ; fnop ; st r25, r26 }
+	{ shl1addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ shl1addx r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ shl1addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shl1addx r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ shl1addx r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shl1addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl1addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shl1addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl1addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shl1addx r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shl1addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl1addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl1addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shl1addx r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ shl1addx r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shl1addx r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shl1addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shl1addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shl1addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shl1addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shl1addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shl1addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shl1addx r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ shl1addx r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shl1addx r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ shl1addx r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shl1addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl1addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shl1addx r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shl1addx r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shl1addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shl1addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shl1addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shl1addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shl1addx r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shl1addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shl1addx r5, r6, r7 ; dtlbpr r15 }
+	{ shl1addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ shl1addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ shl1addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ shl1addx r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ shl1addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shl1addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl1addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl1addx r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ shl1addx r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ shl1addx r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; prefetch_l3 r25 }
+	{ shl1addx r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shl1addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl1addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shl1addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shl1addx r5, r6, r7 ; shli r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ shl1addx r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shl1addx r5, r6, r7 ; stnt2 r15, r16 }
+	{ shl1addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shl1addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ shl1addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shl2add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shl2add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl2add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl2add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shl2add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shl2add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl2add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl2add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl2add r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shl2add r15, r16, r17 ; fnop ; st r25, r26 }
+	{ shl2add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ shl2add r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ shl2add r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shl2add r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ shl2add r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shl2add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl2add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shl2add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl2add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shl2add r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shl2add r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl2add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl2add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shl2add r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ shl2add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shl2add r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shl2add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shl2add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shl2add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shl2add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shl2add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shl2add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shl2add r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ shl2add r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shl2add r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ shl2add r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shl2add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl2add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shl2add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shl2add r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shl2add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shl2add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shl2add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shl2add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shl2add r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shl2add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shl2add r5, r6, r7 ; dtlbpr r15 }
+	{ shl2add r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ shl2add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ shl2add r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ shl2add r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ shl2add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shl2add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl2add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl2add r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ shl2add r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ shl2add r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; prefetch_l3 r25 }
+	{ shl2add r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shl2add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl2add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shl2add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shl2add r5, r6, r7 ; shli r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ shl2add r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shl2add r5, r6, r7 ; stnt2 r15, r16 }
+	{ shl2add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shl2add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ shl2add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shl2addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shl2addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl2addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl2addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shl2addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shl2addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl2addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl2addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl2addx r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shl2addx r15, r16, r17 ; fnop ; st r25, r26 }
+	{ shl2addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ shl2addx r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ shl2addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shl2addx r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ shl2addx r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shl2addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl2addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shl2addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl2addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shl2addx r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shl2addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl2addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl2addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shl2addx r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ shl2addx r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shl2addx r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shl2addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shl2addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shl2addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shl2addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shl2addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shl2addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shl2addx r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ shl2addx r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shl2addx r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ shl2addx r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shl2addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl2addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shl2addx r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shl2addx r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shl2addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shl2addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shl2addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shl2addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shl2addx r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shl2addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shl2addx r5, r6, r7 ; dtlbpr r15 }
+	{ shl2addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ shl2addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ shl2addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ shl2addx r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ shl2addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shl2addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl2addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl2addx r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ shl2addx r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ shl2addx r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; prefetch_l3 r25 }
+	{ shl2addx r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shl2addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl2addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shl2addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shl2addx r5, r6, r7 ; shli r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ shl2addx r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shl2addx r5, r6, r7 ; stnt2 r15, r16 }
+	{ shl2addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shl2addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ shl2addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shl3add r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shl3add r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl3add r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl3add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shl3add r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shl3add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl3add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl3add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl3add r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shl3add r15, r16, r17 ; fnop ; st r25, r26 }
+	{ shl3add r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ shl3add r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ shl3add r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shl3add r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ shl3add r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shl3add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl3add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shl3add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl3add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shl3add r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shl3add r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl3add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl3add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shl3add r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ shl3add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shl3add r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shl3add r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shl3add r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shl3add r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shl3add r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shl3add r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shl3add r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shl3add r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ shl3add r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shl3add r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ shl3add r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shl3add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl3add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shl3add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shl3add r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shl3add r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shl3add r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shl3add r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shl3add r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shl3add r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shl3add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shl3add r5, r6, r7 ; dtlbpr r15 }
+	{ shl3add r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ shl3add r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ shl3add r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ shl3add r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ shl3add r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shl3add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl3add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl3add r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ shl3add r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ shl3add r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; prefetch_l3 r25 }
+	{ shl3add r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shl3add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl3add r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shl3add r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shl3add r5, r6, r7 ; shli r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ shl3add r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shl3add r5, r6, r7 ; stnt2 r15, r16 }
+	{ shl3add r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shl3add r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ shl3add r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shl3addx r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shl3addx r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl3addx r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shl3addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shl3addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shl3addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shl3addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shl3addx r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shl3addx r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shl3addx r15, r16, r17 ; fnop ; st r25, r26 }
+	{ shl3addx r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ shl3addx r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ shl3addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shl3addx r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ shl3addx r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shl3addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl3addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shl3addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl3addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shl3addx r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shl3addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shl3addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl3addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shl3addx r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ shl3addx r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shl3addx r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shl3addx r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shl3addx r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shl3addx r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shl3addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shl3addx r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shl3addx r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shl3addx r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ shl3addx r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shl3addx r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ shl3addx r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shl3addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shl3addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shl3addx r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shl3addx r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shl3addx r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shl3addx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shl3addx r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shl3addx r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shl3addx r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shl3addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shl3addx r5, r6, r7 ; dtlbpr r15 }
+	{ shl3addx r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ shl3addx r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ shl3addx r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ shl3addx r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ shl3addx r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shl3addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shl3addx r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl3addx r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ shl3addx r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ shl3addx r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; prefetch_l3 r25 }
+	{ shl3addx r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shl3addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shl3addx r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shl3addx r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shl3addx r5, r6, r7 ; shli r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ shl3addx r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shl3addx r5, r6, r7 ; stnt2 r15, r16 }
+	{ shl3addx r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shl3addx r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ shl3addx r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shli r15, r16, 5 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ shli r15, r16, 5 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ shli r15, r16, 5 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ shli r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ shli r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ shli r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ shli r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ shli r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shli r15, r16, 5 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ shli r15, r16, 5 ; fnop ; st r25, r26 }
+	{ shli r15, r16, 5 ; info 19 ; prefetch_l2 r25 }
+	{ shli r15, r16, 5 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ shli r15, r16, 5 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ shli r15, r16, 5 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ shli r15, r16, 5 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ shli r15, r16, 5 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ shli r15, r16, 5 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ shli r15, r16, 5 ; ld2u r25, r26 ; fnop }
+	{ shli r15, r16, 5 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ shli r15, r16, 5 ; ld4s r25, r26 ; nop }
+	{ shli r15, r16, 5 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ shli r15, r16, 5 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ shli r15, r16, 5 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ shli r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ shli r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ shli r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shli r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ shli r15, r16, 5 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ shli r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ shli r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ shli r15, r16, 5 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ shli r15, r16, 5 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ shli r15, r16, 5 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch_l2_fault r25 ; info 19 }
+	{ shli r15, r16, 5 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ shli r15, r16, 5 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ shli r15, r16, 5 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ shli r15, r16, 5 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ shli r15, r16, 5 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ shli r15, r16, 5 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ shli r15, r16, 5 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ shli r15, r16, 5 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ shli r15, r16, 5 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ shli r15, r16, 5 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ shli r15, r16, 5 ; st r25, r26 ; addi r5, r6, 5 }
+	{ shli r15, r16, 5 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ shli r15, r16, 5 ; st1 r25, r26 ; fnop }
+	{ shli r15, r16, 5 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ shli r15, r16, 5 ; st2 r25, r26 ; nop }
+	{ shli r15, r16, 5 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ shli r15, r16, 5 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ shli r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ shli r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ shli r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ shli r15, r16, 5 ; v1mz r5, r6, r7 }
+	{ shli r15, r16, 5 ; v2packuc r5, r6, r7 }
+	{ shli r15, r16, 5 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ shli r5, r6, 5 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ shli r5, r6, 5 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ shli r5, r6, 5 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ shli r5, r6, 5 ; cmpexch r15, r16, r17 }
+	{ shli r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ shli r5, r6, 5 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ shli r5, r6, 5 ; dtlbpr r15 }
+	{ shli r5, r6, 5 ; ill ; ld4u r25, r26 }
+	{ shli r5, r6, 5 ; jalr r15 ; ld4s r25, r26 }
+	{ shli r5, r6, 5 ; jr r15 ; prefetch r25 }
+	{ shli r5, r6, 5 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ shli r5, r6, 5 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ shli r5, r6, 5 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ shli r5, r6, 5 ; lnk r15 ; prefetch_l2 r25 }
+	{ shli r5, r6, 5 ; move r15, r16 ; prefetch_l2 r25 }
+	{ shli r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ shli r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shli r5, r6, 5 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ shli r5, r6, 5 ; prefetch_add_l3_fault r15, 5 }
+	{ shli r5, r6, 5 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ shli r5, r6, 5 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ shli r5, r6, 5 ; prefetch_l2_fault r25 ; fnop }
+	{ shli r5, r6, 5 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ shli r5, r6, 5 ; prefetch_l3 r25 }
+	{ shli r5, r6, 5 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ shli r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ shli r5, r6, 5 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ shli r5, r6, 5 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ shli r5, r6, 5 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; shrsi r15, r16, 5 }
+	{ shli r5, r6, 5 ; shruxi r15, r16, 5 }
+	{ shli r5, r6, 5 ; st r25, r26 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ shli r5, r6, 5 ; st2 r25, r26 ; lnk r15 }
+	{ shli r5, r6, 5 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ shli r5, r6, 5 ; stnt2 r15, r16 }
+	{ shli r5, r6, 5 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ shli r5, r6, 5 ; v2cmpltsi r15, r16, 5 }
+	{ shli r5, r6, 5 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ shlx r15, r16, r17 ; cmul r5, r6, r7 }
+	{ shlx r15, r16, r17 ; mul_hs_lu r5, r6, r7 }
+	{ shlx r15, r16, r17 ; shrs r5, r6, r7 }
+	{ shlx r15, r16, r17 ; v1maxu r5, r6, r7 }
+	{ shlx r15, r16, r17 ; v2minsi r5, r6, 5 }
+	{ shlx r5, r6, r7 ; addxli r15, r16, 0x1234 }
+	{ shlx r5, r6, r7 ; jalrp r15 }
+	{ shlx r5, r6, r7 ; mtspr 0x5, r16 }
+	{ shlx r5, r6, r7 ; st1 r15, r16 }
+	{ shlx r5, r6, r7 ; v1shrs r15, r16, r17 }
+	{ shlx r5, r6, r7 ; v4int_h r15, r16, r17 }
+	{ shlxi r15, r16, 5 ; cmulfr r5, r6, r7 }
+	{ shlxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 }
+	{ shlxi r15, r16, 5 ; shrux r5, r6, r7 }
+	{ shlxi r15, r16, 5 ; v1mnz r5, r6, r7 }
+	{ shlxi r15, r16, 5 ; v2mults r5, r6, r7 }
+	{ shlxi r5, r6, 5 ; cmpeq r15, r16, r17 }
+	{ shlxi r5, r6, 5 ; ld1s r15, r16 }
+	{ shlxi r5, r6, 5 ; or r15, r16, r17 }
+	{ shlxi r5, r6, 5 ; st4 r15, r16 }
+	{ shlxi r5, r6, 5 ; v1sub r15, r16, r17 }
+	{ shlxi r5, r6, 5 ; v4shlsc r15, r16, r17 }
+	{ shrs r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ shrs r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+	{ shrs r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 }
+	{ shrs r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrs r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+	{ shrs r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 }
+	{ shrs r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+	{ shrs r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+	{ shrs r15, r16, r17 ; ctz r5, r6 ; prefetch_l3_fault r25 }
+	{ shrs r15, r16, r17 ; fsingle_mul2 r5, r6, r7 }
+	{ shrs r15, r16, r17 ; info 19 }
+	{ shrs r15, r16, r17 ; ld r25, r26 ; pcnt r5, r6 }
+	{ shrs r15, r16, r17 ; ld1s r25, r26 ; cmpltu r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld1s r25, r26 ; sub r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld1u r25, r26 ; mulax r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld2s r25, r26 ; cmpeq r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld2s r25, r26 ; shl3addx r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld4s r25, r26 ; addxi r5, r6, 5 }
+	{ shrs r15, r16, r17 ; ld4s r25, r26 ; shl r5, r6, r7 }
+	{ shrs r15, r16, r17 ; ld4u r25, r26 ; info 19 }
+	{ shrs r15, r16, r17 ; ld4u r25, r26 ; tblidxb3 r5, r6 }
+	{ shrs r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
+	{ shrs r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ shrs r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ shrs r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 }
+	{ shrs r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrs r15, r16, r17 ; mulax r5, r6, r7 ; st r25, r26 }
+	{ shrs r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 }
+	{ shrs r15, r16, r17 ; nor r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch r25 ; revbytes r5, r6 }
+	{ shrs r15, r16, r17 ; prefetch_l1 r25 ; ctz r5, r6 }
+	{ shrs r15, r16, r17 ; prefetch_l1 r25 ; tblidxb0 r5, r6 }
+	{ shrs r15, r16, r17 ; prefetch_l1_fault r25 ; mz r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch_l2 r25 ; cmples r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch_l2 r25 ; shrs r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch_l3 r25 ; andi r5, r6, 5 }
+	{ shrs r15, r16, r17 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 }
+	{ shrs r15, r16, r17 ; prefetch_l3_fault r25 ; move r5, r6 }
+	{ shrs r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ shrs r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+	{ shrs r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
+	{ shrs r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+	{ shrs r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+	{ shrs r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrs r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrs r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+	{ shrs r15, r16, r17 ; st r25, r26 ; cmpeq r5, r6, r7 }
+	{ shrs r15, r16, r17 ; st r25, r26 ; shl3addx r5, r6, r7 }
+	{ shrs r15, r16, r17 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shrs r15, r16, r17 ; st2 r25, r26 ; addxi r5, r6, 5 }
+	{ shrs r15, r16, r17 ; st2 r25, r26 ; shl r5, r6, r7 }
+	{ shrs r15, r16, r17 ; st4 r25, r26 ; info 19 }
+	{ shrs r15, r16, r17 ; st4 r25, r26 ; tblidxb3 r5, r6 }
+	{ shrs r15, r16, r17 ; subx r5, r6, r7 }
+	{ shrs r15, r16, r17 ; tblidxb2 r5, r6 ; ld r25, r26 }
+	{ shrs r15, r16, r17 ; v1adduc r5, r6, r7 }
+	{ shrs r15, r16, r17 ; v1shrui r5, r6, 5 }
+	{ shrs r15, r16, r17 ; v2shrs r5, r6, r7 }
+	{ shrs r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+	{ shrs r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
+	{ shrs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+	{ shrs r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+	{ shrs r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+	{ shrs r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1 r25 }
+	{ shrs r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+	{ shrs r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ shrs r5, r6, r7 ; ill ; st r25, r26 }
+	{ shrs r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+	{ shrs r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+	{ shrs r5, r6, r7 ; ld r25, r26 ; info 19 }
+	{ shrs r5, r6, r7 ; ld1s r25, r26 ; cmples r15, r16, r17 }
+	{ shrs r5, r6, r7 ; ld1u r15, r16 }
+	{ shrs r5, r6, r7 ; ld1u r25, r26 ; shrs r15, r16, r17 }
+	{ shrs r5, r6, r7 ; ld2s r25, r26 ; rotli r15, r16, 5 }
+	{ shrs r5, r6, r7 ; ld2u r25, r26 ; lnk r15 }
+	{ shrs r5, r6, r7 ; ld4s r25, r26 ; cmpltu r15, r16, r17 }
+	{ shrs r5, r6, r7 ; ld4u r25, r26 ; addxi r15, r16, 5 }
+	{ shrs r5, r6, r7 ; ld4u r25, r26 ; sub r15, r16, r17 }
+	{ shrs r5, r6, r7 ; lnk r15 }
+	{ shrs r5, r6, r7 ; move r15, r16 }
+	{ shrs r5, r6, r7 ; mz r15, r16, r17 }
+	{ shrs r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
+	{ shrs r5, r6, r7 ; prefetch r25 ; jrp r15 }
+	{ shrs r5, r6, r7 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 }
+	{ shrs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrs r5, r6, r7 ; prefetch_l1_fault r25 ; shli r15, r16, 5 }
+	{ shrs r5, r6, r7 ; prefetch_l2 r25 ; rotli r15, r16, 5 }
+	{ shrs r5, r6, r7 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 }
+	{ shrs r5, r6, r7 ; prefetch_l3 r25 ; fnop }
+	{ shrs r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 }
+	{ shrs r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrs r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
+	{ shrs r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+	{ shrs r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+	{ shrs r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+	{ shrs r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+	{ shrs r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+	{ shrs r5, r6, r7 ; st r25, r26 ; cmpeq r15, r16, r17 }
+	{ shrs r5, r6, r7 ; st r25, r26 }
+	{ shrs r5, r6, r7 ; st1 r25, r26 ; shli r15, r16, 5 }
+	{ shrs r5, r6, r7 ; st2 r25, r26 ; rotl r15, r16, r17 }
+	{ shrs r5, r6, r7 ; st4 r25, r26 ; jrp r15 }
+	{ shrs r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
+	{ shrs r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+	{ shrs r5, r6, r7 ; v2mins r15, r16, r17 }
+	{ shrs r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shrsi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ shrsi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
+	{ shrsi r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 }
+	{ shrsi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrsi r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+	{ shrsi r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 }
+	{ shrsi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+	{ shrsi r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+	{ shrsi r15, r16, 5 ; ctz r5, r6 ; prefetch_l3_fault r25 }
+	{ shrsi r15, r16, 5 ; fsingle_mul2 r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; info 19 }
+	{ shrsi r15, r16, 5 ; ld r25, r26 ; pcnt r5, r6 }
+	{ shrsi r15, r16, 5 ; ld1s r25, r26 ; cmpltu r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld1s r25, r26 ; sub r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld1u r25, r26 ; mulax r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld2s r25, r26 ; cmpeq r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld2s r25, r26 ; shl3addx r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld4s r25, r26 ; addxi r5, r6, 5 }
+	{ shrsi r15, r16, 5 ; ld4s r25, r26 ; shl r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; ld4u r25, r26 ; info 19 }
+	{ shrsi r15, r16, 5 ; ld4u r25, r26 ; tblidxb3 r5, r6 }
+	{ shrsi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
+	{ shrsi r15, r16, 5 ; mul_hs_hs r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ shrsi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 }
+	{ shrsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrsi r15, r16, 5 ; mulax r5, r6, r7 ; st r25, r26 }
+	{ shrsi r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 }
+	{ shrsi r15, r16, 5 ; nor r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch r25 ; revbytes r5, r6 }
+	{ shrsi r15, r16, 5 ; prefetch_l1 r25 ; ctz r5, r6 }
+	{ shrsi r15, r16, 5 ; prefetch_l1 r25 ; tblidxb0 r5, r6 }
+	{ shrsi r15, r16, 5 ; prefetch_l1_fault r25 ; mz r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch_l2 r25 ; cmples r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch_l2 r25 ; shrs r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch_l3 r25 ; andi r5, r6, 5 }
+	{ shrsi r15, r16, 5 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; prefetch_l3_fault r25 ; move r5, r6 }
+	{ shrsi r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ shrsi r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+	{ shrsi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
+	{ shrsi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+	{ shrsi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+	{ shrsi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrsi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrsi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+	{ shrsi r15, r16, 5 ; st r25, r26 ; cmpeq r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; st r25, r26 ; shl3addx r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; st2 r25, r26 ; addxi r5, r6, 5 }
+	{ shrsi r15, r16, 5 ; st2 r25, r26 ; shl r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; st4 r25, r26 ; info 19 }
+	{ shrsi r15, r16, 5 ; st4 r25, r26 ; tblidxb3 r5, r6 }
+	{ shrsi r15, r16, 5 ; subx r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; tblidxb2 r5, r6 ; ld r25, r26 }
+	{ shrsi r15, r16, 5 ; v1adduc r5, r6, r7 }
+	{ shrsi r15, r16, 5 ; v1shrui r5, r6, 5 }
+	{ shrsi r15, r16, 5 ; v2shrs r5, r6, r7 }
+	{ shrsi r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
+	{ shrsi r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 }
+	{ shrsi r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 }
+	{ shrsi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+	{ shrsi r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+	{ shrsi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l1 r25 }
+	{ shrsi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+	{ shrsi r5, r6, 5 ; fetchand4 r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; ill ; st r25, r26 }
+	{ shrsi r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
+	{ shrsi r5, r6, 5 ; jr r15 ; st1 r25, r26 }
+	{ shrsi r5, r6, 5 ; ld r25, r26 ; info 19 }
+	{ shrsi r5, r6, 5 ; ld1s r25, r26 ; cmples r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; ld1u r15, r16 }
+	{ shrsi r5, r6, 5 ; ld1u r25, r26 ; shrs r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; ld2s r25, r26 ; rotli r15, r16, 5 }
+	{ shrsi r5, r6, 5 ; ld2u r25, r26 ; lnk r15 }
+	{ shrsi r5, r6, 5 ; ld4s r25, r26 ; cmpltu r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; ld4u r25, r26 ; addxi r15, r16, 5 }
+	{ shrsi r5, r6, 5 ; ld4u r25, r26 ; sub r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; lnk r15 }
+	{ shrsi r5, r6, 5 ; move r15, r16 }
+	{ shrsi r5, r6, 5 ; mz r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 }
+	{ shrsi r5, r6, 5 ; prefetch r25 ; jrp r15 }
+	{ shrsi r5, r6, 5 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; prefetch_l1 r25 }
+	{ shrsi r5, r6, 5 ; prefetch_l1_fault r25 ; shli r15, r16, 5 }
+	{ shrsi r5, r6, 5 ; prefetch_l2 r25 ; rotli r15, r16, 5 }
+	{ shrsi r5, r6, 5 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; prefetch_l3 r25 ; fnop }
+	{ shrsi r5, r6, 5 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ shrsi r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 }
+	{ shrsi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+	{ shrsi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+	{ shrsi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+	{ shrsi r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+	{ shrsi r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+	{ shrsi r5, r6, 5 ; st r25, r26 ; cmpeq r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; st r25, r26 }
+	{ shrsi r5, r6, 5 ; st1 r25, r26 ; shli r15, r16, 5 }
+	{ shrsi r5, r6, 5 ; st2 r25, r26 ; rotl r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; st4 r25, r26 ; jrp r15 }
+	{ shrsi r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 }
+	{ shrsi r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
+	{ shrsi r5, r6, 5 ; v2mins r15, r16, r17 }
+	{ shrsi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shru r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ shru r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 }
+	{ shru r15, r16, r17 ; andi r5, r6, 5 ; st r25, r26 }
+	{ shru r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shru r15, r16, r17 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+	{ shru r15, r16, r17 ; cmples r5, r6, r7 ; st4 r25, r26 }
+	{ shru r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+	{ shru r15, r16, r17 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+	{ shru r15, r16, r17 ; ctz r5, r6 ; prefetch_l3_fault r25 }
+	{ shru r15, r16, r17 ; fsingle_mul2 r5, r6, r7 }
+	{ shru r15, r16, r17 ; info 19 }
+	{ shru r15, r16, r17 ; ld r25, r26 ; pcnt r5, r6 }
+	{ shru r15, r16, r17 ; ld1s r25, r26 ; cmpltu r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld1s r25, r26 ; sub r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld1u r25, r26 ; mulax r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld2s r25, r26 ; cmpeq r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld2s r25, r26 ; shl3addx r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld4s r25, r26 ; addxi r5, r6, 5 }
+	{ shru r15, r16, r17 ; ld4s r25, r26 ; shl r5, r6, r7 }
+	{ shru r15, r16, r17 ; ld4u r25, r26 ; info 19 }
+	{ shru r15, r16, r17 ; ld4u r25, r26 ; tblidxb3 r5, r6 }
+	{ shru r15, r16, r17 ; move r5, r6 ; st4 r25, r26 }
+	{ shru r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ shru r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ shru r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 }
+	{ shru r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shru r15, r16, r17 ; mulax r5, r6, r7 ; st r25, r26 }
+	{ shru r15, r16, r17 ; mz r5, r6, r7 ; st2 r25, r26 }
+	{ shru r15, r16, r17 ; nor r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch r25 ; revbytes r5, r6 }
+	{ shru r15, r16, r17 ; prefetch_l1 r25 ; ctz r5, r6 }
+	{ shru r15, r16, r17 ; prefetch_l1 r25 ; tblidxb0 r5, r6 }
+	{ shru r15, r16, r17 ; prefetch_l1_fault r25 ; mz r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch_l2 r25 ; cmples r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch_l2 r25 ; shrs r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch_l3 r25 ; andi r5, r6, 5 }
+	{ shru r15, r16, r17 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 }
+	{ shru r15, r16, r17 ; prefetch_l3_fault r25 ; move r5, r6 }
+	{ shru r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ shru r15, r16, r17 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+	{ shru r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 }
+	{ shru r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+	{ shru r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+	{ shru r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ shru r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shru r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+	{ shru r15, r16, r17 ; st r25, r26 ; cmpeq r5, r6, r7 }
+	{ shru r15, r16, r17 ; st r25, r26 ; shl3addx r5, r6, r7 }
+	{ shru r15, r16, r17 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shru r15, r16, r17 ; st2 r25, r26 ; addxi r5, r6, 5 }
+	{ shru r15, r16, r17 ; st2 r25, r26 ; shl r5, r6, r7 }
+	{ shru r15, r16, r17 ; st4 r25, r26 ; info 19 }
+	{ shru r15, r16, r17 ; st4 r25, r26 ; tblidxb3 r5, r6 }
+	{ shru r15, r16, r17 ; subx r5, r6, r7 }
+	{ shru r15, r16, r17 ; tblidxb2 r5, r6 ; ld r25, r26 }
+	{ shru r15, r16, r17 ; v1adduc r5, r6, r7 }
+	{ shru r15, r16, r17 ; v1shrui r5, r6, 5 }
+	{ shru r15, r16, r17 ; v2shrs r5, r6, r7 }
+	{ shru r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 }
+	{ shru r5, r6, r7 ; addx r15, r16, r17 ; ld2u r25, r26 }
+	{ shru r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 }
+	{ shru r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+	{ shru r5, r6, r7 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+	{ shru r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l1 r25 }
+	{ shru r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+	{ shru r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ shru r5, r6, r7 ; ill ; st r25, r26 }
+	{ shru r5, r6, r7 ; jalr r15 ; prefetch_l3_fault r25 }
+	{ shru r5, r6, r7 ; jr r15 ; st1 r25, r26 }
+	{ shru r5, r6, r7 ; ld r25, r26 ; info 19 }
+	{ shru r5, r6, r7 ; ld1s r25, r26 ; cmples r15, r16, r17 }
+	{ shru r5, r6, r7 ; ld1u r15, r16 }
+	{ shru r5, r6, r7 ; ld1u r25, r26 ; shrs r15, r16, r17 }
+	{ shru r5, r6, r7 ; ld2s r25, r26 ; rotli r15, r16, 5 }
+	{ shru r5, r6, r7 ; ld2u r25, r26 ; lnk r15 }
+	{ shru r5, r6, r7 ; ld4s r25, r26 ; cmpltu r15, r16, r17 }
+	{ shru r5, r6, r7 ; ld4u r25, r26 ; addxi r15, r16, 5 }
+	{ shru r5, r6, r7 ; ld4u r25, r26 ; sub r15, r16, r17 }
+	{ shru r5, r6, r7 ; lnk r15 }
+	{ shru r5, r6, r7 ; move r15, r16 }
+	{ shru r5, r6, r7 ; mz r15, r16, r17 }
+	{ shru r5, r6, r7 ; or r15, r16, r17 ; ld1s r25, r26 }
+	{ shru r5, r6, r7 ; prefetch r25 ; jrp r15 }
+	{ shru r5, r6, r7 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 }
+	{ shru r5, r6, r7 ; prefetch_l1 r25 }
+	{ shru r5, r6, r7 ; prefetch_l1_fault r25 ; shli r15, r16, 5 }
+	{ shru r5, r6, r7 ; prefetch_l2 r25 ; rotli r15, r16, 5 }
+	{ shru r5, r6, r7 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 }
+	{ shru r5, r6, r7 ; prefetch_l3 r25 ; fnop }
+	{ shru r5, r6, r7 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 }
+	{ shru r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shru r5, r6, r7 ; shl r15, r16, r17 ; ld r25, r26 }
+	{ shru r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+	{ shru r5, r6, r7 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+	{ shru r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+	{ shru r5, r6, r7 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+	{ shru r5, r6, r7 ; shru r15, r16, r17 ; prefetch r25 }
+	{ shru r5, r6, r7 ; st r25, r26 ; cmpeq r15, r16, r17 }
+	{ shru r5, r6, r7 ; st r25, r26 }
+	{ shru r5, r6, r7 ; st1 r25, r26 ; shli r15, r16, 5 }
+	{ shru r5, r6, r7 ; st2 r25, r26 ; rotl r15, r16, r17 }
+	{ shru r5, r6, r7 ; st4 r25, r26 ; jrp r15 }
+	{ shru r5, r6, r7 ; sub r15, r16, r17 ; ld2s r25, r26 }
+	{ shru r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+	{ shru r5, r6, r7 ; v2mins r15, r16, r17 }
+	{ shru r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shrui r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ shrui r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 }
+	{ shrui r15, r16, 5 ; andi r5, r6, 5 ; st r25, r26 }
+	{ shrui r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrui r15, r16, 5 ; cmpeq r5, r6, r7 ; st1 r25, r26 }
+	{ shrui r15, r16, 5 ; cmples r5, r6, r7 ; st4 r25, r26 }
+	{ shrui r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld r25, r26 }
+	{ shrui r15, r16, 5 ; cmpne r5, r6, r7 ; ld1s r25, r26 }
+	{ shrui r15, r16, 5 ; ctz r5, r6 ; prefetch_l3_fault r25 }
+	{ shrui r15, r16, 5 ; fsingle_mul2 r5, r6, r7 }
+	{ shrui r15, r16, 5 ; info 19 }
+	{ shrui r15, r16, 5 ; ld r25, r26 ; pcnt r5, r6 }
+	{ shrui r15, r16, 5 ; ld1s r25, r26 ; cmpltu r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld1s r25, r26 ; sub r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld1u r25, r26 ; mulax r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld2s r25, r26 ; cmpeq r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld2s r25, r26 ; shl3addx r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld2u r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld4s r25, r26 ; addxi r5, r6, 5 }
+	{ shrui r15, r16, 5 ; ld4s r25, r26 ; shl r5, r6, r7 }
+	{ shrui r15, r16, 5 ; ld4u r25, r26 ; info 19 }
+	{ shrui r15, r16, 5 ; ld4u r25, r26 ; tblidxb3 r5, r6 }
+	{ shrui r15, r16, 5 ; move r5, r6 ; st4 r25, r26 }
+	{ shrui r15, r16, 5 ; mul_hs_hs r5, r6, r7 }
+	{ shrui r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st1 r25, r26 }
+	{ shrui r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; st2 r25, r26 }
+	{ shrui r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ shrui r15, r16, 5 ; mulax r5, r6, r7 ; st r25, r26 }
+	{ shrui r15, r16, 5 ; mz r5, r6, r7 ; st2 r25, r26 }
+	{ shrui r15, r16, 5 ; nor r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch r25 ; revbytes r5, r6 }
+	{ shrui r15, r16, 5 ; prefetch_l1 r25 ; ctz r5, r6 }
+	{ shrui r15, r16, 5 ; prefetch_l1 r25 ; tblidxb0 r5, r6 }
+	{ shrui r15, r16, 5 ; prefetch_l1_fault r25 ; mz r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch_l2 r25 ; cmples r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch_l2 r25 ; shrs r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch_l2_fault r25 ; mula_hs_hs r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch_l3 r25 ; andi r5, r6, 5 }
+	{ shrui r15, r16, 5 ; prefetch_l3 r25 ; shl1addx r5, r6, r7 }
+	{ shrui r15, r16, 5 ; prefetch_l3_fault r25 ; move r5, r6 }
+	{ shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ shrui r15, r16, 5 ; rotl r5, r6, r7 ; ld1s r25, r26 }
+	{ shrui r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 }
+	{ shrui r15, r16, 5 ; shl1addx r5, r6, r7 ; ld2u r25, r26 }
+	{ shrui r15, r16, 5 ; shl2addx r5, r6, r7 ; ld4u r25, r26 }
+	{ shrui r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrui r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l1 r25 }
+	{ shrui r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 }
+	{ shrui r15, r16, 5 ; st r25, r26 ; cmpeq r5, r6, r7 }
+	{ shrui r15, r16, 5 ; st r25, r26 ; shl3addx r5, r6, r7 }
+	{ shrui r15, r16, 5 ; st1 r25, r26 ; mul_ls_ls r5, r6, r7 }
+	{ shrui r15, r16, 5 ; st2 r25, r26 ; addxi r5, r6, 5 }
+	{ shrui r15, r16, 5 ; st2 r25, r26 ; shl r5, r6, r7 }
+	{ shrui r15, r16, 5 ; st4 r25, r26 ; info 19 }
+	{ shrui r15, r16, 5 ; st4 r25, r26 ; tblidxb3 r5, r6 }
+	{ shrui r15, r16, 5 ; subx r5, r6, r7 }
+	{ shrui r15, r16, 5 ; tblidxb2 r5, r6 ; ld r25, r26 }
+	{ shrui r15, r16, 5 ; v1adduc r5, r6, r7 }
+	{ shrui r15, r16, 5 ; v1shrui r5, r6, 5 }
+	{ shrui r15, r16, 5 ; v2shrs r5, r6, r7 }
+	{ shrui r5, r6, 5 ; add r15, r16, r17 ; ld2s r25, r26 }
+	{ shrui r5, r6, 5 ; addx r15, r16, r17 ; ld2u r25, r26 }
+	{ shrui r5, r6, 5 ; and r15, r16, r17 ; ld2u r25, r26 }
+	{ shrui r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4u r25, r26 }
+	{ shrui r5, r6, 5 ; cmples r15, r16, r17 ; ld4u r25, r26 }
+	{ shrui r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l1 r25 }
+	{ shrui r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2 r25 }
+	{ shrui r5, r6, 5 ; fetchand4 r15, r16, r17 }
+	{ shrui r5, r6, 5 ; ill ; st r25, r26 }
+	{ shrui r5, r6, 5 ; jalr r15 ; prefetch_l3_fault r25 }
+	{ shrui r5, r6, 5 ; jr r15 ; st1 r25, r26 }
+	{ shrui r5, r6, 5 ; ld r25, r26 ; info 19 }
+	{ shrui r5, r6, 5 ; ld1s r25, r26 ; cmples r15, r16, r17 }
+	{ shrui r5, r6, 5 ; ld1u r15, r16 }
+	{ shrui r5, r6, 5 ; ld1u r25, r26 ; shrs r15, r16, r17 }
+	{ shrui r5, r6, 5 ; ld2s r25, r26 ; rotli r15, r16, 5 }
+	{ shrui r5, r6, 5 ; ld2u r25, r26 ; lnk r15 }
+	{ shrui r5, r6, 5 ; ld4s r25, r26 ; cmpltu r15, r16, r17 }
+	{ shrui r5, r6, 5 ; ld4u r25, r26 ; addxi r15, r16, 5 }
+	{ shrui r5, r6, 5 ; ld4u r25, r26 ; sub r15, r16, r17 }
+	{ shrui r5, r6, 5 ; lnk r15 }
+	{ shrui r5, r6, 5 ; move r15, r16 }
+	{ shrui r5, r6, 5 ; mz r15, r16, r17 }
+	{ shrui r5, r6, 5 ; or r15, r16, r17 ; ld1s r25, r26 }
+	{ shrui r5, r6, 5 ; prefetch r25 ; jrp r15 }
+	{ shrui r5, r6, 5 ; prefetch_l1 r25 ; cmpeq r15, r16, r17 }
+	{ shrui r5, r6, 5 ; prefetch_l1 r25 }
+	{ shrui r5, r6, 5 ; prefetch_l1_fault r25 ; shli r15, r16, 5 }
+	{ shrui r5, r6, 5 ; prefetch_l2 r25 ; rotli r15, r16, 5 }
+	{ shrui r5, r6, 5 ; prefetch_l2_fault r25 ; mnz r15, r16, r17 }
+	{ shrui r5, r6, 5 ; prefetch_l3 r25 ; fnop }
+	{ shrui r5, r6, 5 ; prefetch_l3_fault r25 ; cmpeq r15, r16, r17 }
+	{ shrui r5, r6, 5 ; prefetch_l3_fault r25 }
+	{ shrui r5, r6, 5 ; shl r15, r16, r17 ; ld r25, r26 }
+	{ shrui r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1s r25, r26 }
+	{ shrui r5, r6, 5 ; shl2addx r15, r16, r17 ; ld2s r25, r26 }
+	{ shrui r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4s r25, r26 }
+	{ shrui r5, r6, 5 ; shrs r15, r16, r17 ; ld4s r25, r26 }
+	{ shrui r5, r6, 5 ; shru r15, r16, r17 ; prefetch r25 }
+	{ shrui r5, r6, 5 ; st r25, r26 ; cmpeq r15, r16, r17 }
+	{ shrui r5, r6, 5 ; st r25, r26 }
+	{ shrui r5, r6, 5 ; st1 r25, r26 ; shli r15, r16, 5 }
+	{ shrui r5, r6, 5 ; st2 r25, r26 ; rotl r15, r16, r17 }
+	{ shrui r5, r6, 5 ; st4 r25, r26 ; jrp r15 }
+	{ shrui r5, r6, 5 ; sub r15, r16, r17 ; ld2s r25, r26 }
+	{ shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
+	{ shrui r5, r6, 5 ; v2mins r15, r16, r17 }
+	{ shrui r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l3 r25 }
+	{ shrux r15, r16, r17 ; crc32_8 r5, r6, r7 }
+	{ shrux r15, r16, r17 ; mula_hs_hu r5, r6, r7 }
+	{ shrux r15, r16, r17 ; subx r5, r6, r7 }
+	{ shrux r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ shrux r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ shrux r5, r6, r7 ; cmples r15, r16, r17 }
+	{ shrux r5, r6, r7 ; ld2s r15, r16 }
+	{ shrux r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+	{ shrux r5, r6, r7 ; stnt1 r15, r16 }
+	{ shrux r5, r6, r7 ; v2addsc r15, r16, r17 }
+	{ shrux r5, r6, r7 ; v4subsc r15, r16, r17 }
+	{ shruxi r15, r16, 5 ; dblalign4 r5, r6, r7 }
+	{ shruxi r15, r16, 5 ; mula_hu_ls r5, r6, r7 }
+	{ shruxi r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ shruxi r15, r16, 5 ; v1shli r5, r6, 5 }
+	{ shruxi r15, r16, 5 ; v2sadu r5, r6, r7 }
+	{ shruxi r5, r6, 5 ; cmpltu r15, r16, r17 }
+	{ shruxi r5, r6, 5 ; ld4s r15, r16 }
+	{ shruxi r5, r6, 5 ; prefetch_add_l3_fault r15, 5 }
+	{ shruxi r5, r6, 5 ; stnt4 r15, r16 }
+	{ shruxi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
+	{ shufflebytes r5, r6, r7 ; add r15, r16, r17 }
+	{ shufflebytes r5, r6, r7 ; info 19 }
+	{ shufflebytes r5, r6, r7 ; mfspr r16, 0x5 }
+	{ shufflebytes r5, r6, r7 ; shru r15, r16, r17 }
+	{ shufflebytes r5, r6, r7 ; v1minui r15, r16, 5 }
+	{ shufflebytes r5, r6, r7 ; v2shrui r15, r16, 5 }
+	{ st r15, r16 ; cmpne r5, r6, r7 }
+	{ st r15, r16 ; mul_hs_ls r5, r6, r7 }
+	{ st r15, r16 ; shlxi r5, r6, 5 }
+	{ st r15, r16 ; v1int_l r5, r6, r7 }
+	{ st r15, r16 ; v2mins r5, r6, r7 }
+	{ st r25, r26 ; add r15, r16, r17 ; and r5, r6, r7 }
+	{ st r25, r26 ; add r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ st r25, r26 ; add r5, r6, r7 ; lnk r15 }
+	{ st r25, r26 ; addi r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ st r25, r26 ; addi r15, r16, 5 ; shrui r5, r6, 5 }
+	{ st r25, r26 ; addi r5, r6, 5 ; shl r15, r16, r17 }
+	{ st r25, r26 ; addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ st r25, r26 ; addx r5, r6, r7 ; addi r15, r16, 5 }
+	{ st r25, r26 ; addx r5, r6, r7 ; shru r15, r16, r17 }
+	{ st r25, r26 ; addxi r15, r16, 5 ; mz r5, r6, r7 }
+	{ st r25, r26 ; addxi r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ st r25, r26 ; and r15, r16, r17 ; and r5, r6, r7 }
+	{ st r25, r26 ; and r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ st r25, r26 ; and r5, r6, r7 ; lnk r15 }
+	{ st r25, r26 ; andi r15, r16, 5 ; cmpltsi r5, r6, 5 }
+	{ st r25, r26 ; andi r15, r16, 5 ; shrui r5, r6, 5 }
+	{ st r25, r26 ; andi r5, r6, 5 ; shl r15, r16, r17 }
+	{ st r25, r26 ; clz r5, r6 ; movei r15, 5 }
+	{ st r25, r26 ; cmoveqz r5, r6, r7 ; jalr r15 }
+	{ st r25, r26 ; cmovnez r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st r25, r26 ; cmpeq r15, r16, r17 ; addxi r5, r6, 5 }
+	{ st r25, r26 ; cmpeq r15, r16, r17 ; shl r5, r6, r7 }
+	{ st r25, r26 ; cmpeq r5, r6, r7 ; jrp r15 }
+	{ st r25, r26 ; cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ st r25, r26 ; cmpeqi r15, r16, 5 ; shru r5, r6, r7 }
+	{ st r25, r26 ; cmpeqi r5, r6, 5 ; rotli r15, r16, 5 }
+	{ st r25, r26 ; cmples r15, r16, r17 ; movei r5, 5 }
+	{ st r25, r26 ; cmples r5, r6, r7 ; add r15, r16, r17 }
+	{ st r25, r26 ; cmples r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st r25, r26 ; cmpleu r15, r16, r17 ; mulx r5, r6, r7 }
+	{ st r25, r26 ; cmpleu r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st r25, r26 ; cmplts r15, r16, r17 ; addxi r5, r6, 5 }
+	{ st r25, r26 ; cmplts r15, r16, r17 ; shl r5, r6, r7 }
+	{ st r25, r26 ; cmplts r5, r6, r7 ; jrp r15 }
+	{ st r25, r26 ; cmpltsi r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ st r25, r26 ; cmpltsi r15, r16, 5 ; shru r5, r6, r7 }
+	{ st r25, r26 ; cmpltsi r5, r6, 5 ; rotli r15, r16, 5 }
+	{ st r25, r26 ; cmpltu r15, r16, r17 ; movei r5, 5 }
+	{ st r25, r26 ; cmpltu r5, r6, r7 ; add r15, r16, r17 }
+	{ st r25, r26 ; cmpltu r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st r25, r26 ; cmpne r15, r16, r17 ; mulx r5, r6, r7 }
+	{ st r25, r26 ; cmpne r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st r25, r26 ; ctz r5, r6 ; addxi r15, r16, 5 }
+	{ st r25, r26 ; ctz r5, r6 ; sub r15, r16, r17 }
+	{ st r25, r26 ; fnop ; jalr r15 }
+	{ st r25, r26 ; fnop ; shl1addx r5, r6, r7 }
+	{ st r25, r26 ; fsingle_pack1 r5, r6 ; cmplts r15, r16, r17 }
+	{ st r25, r26 ; ill ; addxi r5, r6, 5 }
+	{ st r25, r26 ; ill ; shl r5, r6, r7 }
+	{ st r25, r26 ; info 19 ; cmples r5, r6, r7 }
+	{ st r25, r26 ; info 19 ; nor r15, r16, r17 }
+	{ st r25, r26 ; info 19 ; tblidxb1 r5, r6 }
+	{ st r25, r26 ; jalr r15 ; mz r5, r6, r7 }
+	{ st r25, r26 ; jalrp r15 ; cmples r5, r6, r7 }
+	{ st r25, r26 ; jalrp r15 ; shrs r5, r6, r7 }
+	{ st r25, r26 ; jr r15 ; mula_hs_hs r5, r6, r7 }
+	{ st r25, r26 ; jrp r15 ; andi r5, r6, 5 }
+	{ st r25, r26 ; jrp r15 ; shl1addx r5, r6, r7 }
+	{ st r25, r26 ; lnk r15 ; move r5, r6 }
+	{ st r25, r26 ; lnk r15 }
+	{ st r25, r26 ; mnz r15, r16, r17 ; revbits r5, r6 }
+	{ st r25, r26 ; mnz r5, r6, r7 ; info 19 }
+	{ st r25, r26 ; move r15, r16 ; cmpeq r5, r6, r7 }
+	{ st r25, r26 ; move r15, r16 ; shl3addx r5, r6, r7 }
+	{ st r25, r26 ; move r5, r6 ; nop }
+	{ st r25, r26 ; movei r15, 5 ; fsingle_pack1 r5, r6 }
+	{ st r25, r26 ; movei r15, 5 ; tblidxb2 r5, r6 }
+	{ st r25, r26 ; movei r5, 5 ; shl3add r15, r16, r17 }
+	{ st r25, r26 ; mul_hs_hs r5, r6, r7 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; mul_hu_hu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st r25, r26 ; mul_ls_ls r5, r6, r7 ; ill }
+	{ st r25, r26 ; mul_lu_lu r5, r6, r7 ; cmples r15, r16, r17 }
+	{ st r25, r26 ; mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 }
+	{ st r25, r26 ; mula_hs_hs r5, r6, r7 ; shru r15, r16, r17 }
+	{ st r25, r26 ; mula_hu_hu r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ st r25, r26 ; mula_ls_ls r5, r6, r7 ; nor r15, r16, r17 }
+	{ st r25, r26 ; mula_lu_lu r5, r6, r7 ; jrp r15 }
+	{ st r25, r26 ; mulax r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ st r25, r26 ; mulx r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ st r25, r26 ; mulx r5, r6, r7 }
+	{ st r25, r26 ; mz r15, r16, r17 ; revbits r5, r6 }
+	{ st r25, r26 ; mz r5, r6, r7 ; info 19 }
+	{ st r25, r26 ; nop ; and r5, r6, r7 }
+	{ st r25, r26 ; nop ; mul_ls_ls r5, r6, r7 }
+	{ st r25, r26 ; nop ; shrsi r15, r16, 5 }
+	{ st r25, r26 ; nor r15, r16, r17 ; movei r5, 5 }
+	{ st r25, r26 ; nor r5, r6, r7 ; add r15, r16, r17 }
+	{ st r25, r26 ; nor r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st r25, r26 ; or r15, r16, r17 ; mulx r5, r6, r7 }
+	{ st r25, r26 ; or r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st r25, r26 ; pcnt r5, r6 ; addxi r15, r16, 5 }
+	{ st r25, r26 ; pcnt r5, r6 ; sub r15, r16, r17 }
+	{ st r25, r26 ; revbits r5, r6 ; shl3add r15, r16, r17 }
+	{ st r25, r26 ; revbytes r5, r6 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; rotl r15, r16, r17 ; move r5, r6 }
+	{ st r25, r26 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; rotl r5, r6, r7 ; shrs r15, r16, r17 }
+	{ st r25, r26 ; rotli r15, r16, 5 ; mulax r5, r6, r7 }
+	{ st r25, r26 ; rotli r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ st r25, r26 ; shl r15, r16, r17 ; addx r5, r6, r7 }
+	{ st r25, r26 ; shl r15, r16, r17 ; rotli r5, r6, 5 }
+	{ st r25, r26 ; shl r5, r6, r7 ; jr r15 }
+	{ st r25, r26 ; shl1add r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ st r25, r26 ; shl1add r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ st r25, r26 ; shl1add r5, r6, r7 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; shl1addx r15, r16, r17 ; move r5, r6 }
+	{ st r25, r26 ; shl1addx r15, r16, r17 }
+	{ st r25, r26 ; shl1addx r5, r6, r7 ; shrs r15, r16, r17 }
+	{ st r25, r26 ; shl2add r15, r16, r17 ; mulax r5, r6, r7 }
+	{ st r25, r26 ; shl2add r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ st r25, r26 ; shl2addx r15, r16, r17 ; addx r5, r6, r7 }
+	{ st r25, r26 ; shl2addx r15, r16, r17 ; rotli r5, r6, 5 }
+	{ st r25, r26 ; shl2addx r5, r6, r7 ; jr r15 }
+	{ st r25, r26 ; shl3add r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ st r25, r26 ; shl3add r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ st r25, r26 ; shl3add r5, r6, r7 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; shl3addx r15, r16, r17 ; move r5, r6 }
+	{ st r25, r26 ; shl3addx r15, r16, r17 }
+	{ st r25, r26 ; shl3addx r5, r6, r7 ; shrs r15, r16, r17 }
+	{ st r25, r26 ; shli r15, r16, 5 ; mulax r5, r6, r7 }
+	{ st r25, r26 ; shli r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ st r25, r26 ; shrs r15, r16, r17 ; addx r5, r6, r7 }
+	{ st r25, r26 ; shrs r15, r16, r17 ; rotli r5, r6, 5 }
+	{ st r25, r26 ; shrs r5, r6, r7 ; jr r15 }
+	{ st r25, r26 ; shrsi r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ st r25, r26 ; shrsi r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ st r25, r26 ; shrsi r5, r6, 5 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; shru r15, r16, r17 ; move r5, r6 }
+	{ st r25, r26 ; shru r15, r16, r17 }
+	{ st r25, r26 ; shru r5, r6, r7 ; shrs r15, r16, r17 }
+	{ st r25, r26 ; shrui r15, r16, 5 ; mulax r5, r6, r7 }
+	{ st r25, r26 ; shrui r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ st r25, r26 ; sub r15, r16, r17 ; addx r5, r6, r7 }
+	{ st r25, r26 ; sub r15, r16, r17 ; rotli r5, r6, 5 }
+	{ st r25, r26 ; sub r5, r6, r7 ; jr r15 }
+	{ st r25, r26 ; subx r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ st r25, r26 ; subx r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ st r25, r26 ; subx r5, r6, r7 ; rotl r15, r16, r17 }
+	{ st r25, r26 ; tblidxb0 r5, r6 ; mnz r15, r16, r17 }
+	{ st r25, r26 ; tblidxb1 r5, r6 ; ill }
+	{ st r25, r26 ; tblidxb2 r5, r6 ; cmples r15, r16, r17 }
+	{ st r25, r26 ; tblidxb3 r5, r6 ; addi r15, r16, 5 }
+	{ st r25, r26 ; tblidxb3 r5, r6 ; shru r15, r16, r17 }
+	{ st r25, r26 ; xor r15, r16, r17 ; mz r5, r6, r7 }
+	{ st r25, r26 ; xor r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ st1 r15, r16 ; addxi r5, r6, 5 }
+	{ st1 r15, r16 ; fdouble_unpack_max r5, r6, r7 }
+	{ st1 r15, r16 ; nop }
+	{ st1 r15, r16 ; v1cmpeqi r5, r6, 5 }
+	{ st1 r15, r16 ; v2addi r5, r6, 5 }
+	{ st1 r15, r16 ; v2sub r5, r6, r7 }
+	{ st1 r25, r26 ; add r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ st1 r25, r26 ; add r5, r6, r7 ; addx r15, r16, r17 }
+	{ st1 r25, r26 ; add r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st1 r25, r26 ; addi r15, r16, 5 ; nop }
+	{ st1 r25, r26 ; addi r5, r6, 5 ; cmpltu r15, r16, r17 }
+	{ st1 r25, r26 ; addx r15, r16, r17 ; andi r5, r6, 5 }
+	{ st1 r25, r26 ; addx r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ st1 r25, r26 ; addx r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st1 r25, r26 ; addxi r15, r16, 5 ; cmpltu r5, r6, r7 }
+	{ st1 r25, r26 ; addxi r15, r16, 5 ; sub r5, r6, r7 }
+	{ st1 r25, r26 ; addxi r5, r6, 5 ; shl1add r15, r16, r17 }
+	{ st1 r25, r26 ; and r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ st1 r25, r26 ; and r5, r6, r7 ; addx r15, r16, r17 }
+	{ st1 r25, r26 ; and r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st1 r25, r26 ; andi r15, r16, 5 ; nop }
+	{ st1 r25, r26 ; andi r5, r6, 5 ; cmpltu r15, r16, r17 }
+	{ st1 r25, r26 ; clz r5, r6 ; andi r15, r16, 5 }
+	{ st1 r25, r26 ; clz r5, r6 ; xor r15, r16, r17 }
+	{ st1 r25, r26 ; cmoveqz r5, r6, r7 ; shli r15, r16, 5 }
+	{ st1 r25, r26 ; cmovnez r5, r6, r7 ; shl r15, r16, r17 }
+	{ st1 r25, r26 ; cmpeq r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ st1 r25, r26 ; cmpeq r5, r6, r7 ; addi r15, r16, 5 }
+	{ st1 r25, r26 ; cmpeq r5, r6, r7 ; shru r15, r16, r17 }
+	{ st1 r25, r26 ; cmpeqi r15, r16, 5 ; mz r5, r6, r7 }
+	{ st1 r25, r26 ; cmpeqi r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ st1 r25, r26 ; cmples r15, r16, r17 ; and r5, r6, r7 }
+	{ st1 r25, r26 ; cmples r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ st1 r25, r26 ; cmples r5, r6, r7 ; lnk r15 }
+	{ st1 r25, r26 ; cmpleu r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ st1 r25, r26 ; cmpleu r15, r16, r17 ; shrui r5, r6, 5 }
+	{ st1 r25, r26 ; cmpleu r5, r6, r7 ; shl r15, r16, r17 }
+	{ st1 r25, r26 ; cmplts r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ st1 r25, r26 ; cmplts r5, r6, r7 ; addi r15, r16, 5 }
+	{ st1 r25, r26 ; cmplts r5, r6, r7 ; shru r15, r16, r17 }
+	{ st1 r25, r26 ; cmpltsi r15, r16, 5 ; mz r5, r6, r7 }
+	{ st1 r25, r26 ; cmpltsi r5, r6, 5 ; cmpltsi r15, r16, 5 }
+	{ st1 r25, r26 ; cmpltu r15, r16, r17 ; and r5, r6, r7 }
+	{ st1 r25, r26 ; cmpltu r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ st1 r25, r26 ; cmpltu r5, r6, r7 ; lnk r15 }
+	{ st1 r25, r26 ; cmpne r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ st1 r25, r26 ; cmpne r15, r16, r17 ; shrui r5, r6, 5 }
+	{ st1 r25, r26 ; cmpne r5, r6, r7 ; shl r15, r16, r17 }
+	{ st1 r25, r26 ; ctz r5, r6 ; movei r15, 5 }
+	{ st1 r25, r26 ; fnop ; cmpeqi r15, r16, 5 }
+	{ st1 r25, r26 ; fnop ; mz r15, r16, r17 }
+	{ st1 r25, r26 ; fnop ; subx r15, r16, r17 }
+	{ st1 r25, r26 ; fsingle_pack1 r5, r6 ; shl r15, r16, r17 }
+	{ st1 r25, r26 ; ill ; mul_hs_hs r5, r6, r7 }
+	{ st1 r25, r26 ; info 19 ; add r5, r6, r7 }
+	{ st1 r25, r26 ; info 19 ; mnz r15, r16, r17 }
+	{ st1 r25, r26 ; info 19 ; shl3add r15, r16, r17 }
+	{ st1 r25, r26 ; jalr r15 ; cmpltu r5, r6, r7 }
+	{ st1 r25, r26 ; jalr r15 ; sub r5, r6, r7 }
+	{ st1 r25, r26 ; jalrp r15 ; mulax r5, r6, r7 }
+	{ st1 r25, r26 ; jr r15 ; cmpeq r5, r6, r7 }
+	{ st1 r25, r26 ; jr r15 ; shl3addx r5, r6, r7 }
+	{ st1 r25, r26 ; jrp r15 ; mul_ls_ls r5, r6, r7 }
+	{ st1 r25, r26 ; lnk r15 ; addxi r5, r6, 5 }
+	{ st1 r25, r26 ; lnk r15 ; shl r5, r6, r7 }
+	{ st1 r25, r26 ; mnz r15, r16, r17 ; info 19 }
+	{ st1 r25, r26 ; mnz r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ st1 r25, r26 ; mnz r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ st1 r25, r26 ; move r15, r16 ; mula_ls_ls r5, r6, r7 }
+	{ st1 r25, r26 ; move r5, r6 ; cmpeqi r15, r16, 5 }
+	{ st1 r25, r26 ; movei r15, 5 ; add r5, r6, r7 }
+	{ st1 r25, r26 ; movei r15, 5 ; revbytes r5, r6 }
+	{ st1 r25, r26 ; movei r5, 5 ; jalr r15 }
+	{ st1 r25, r26 ; mul_hs_hs r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st1 r25, r26 ; mul_hu_hu r5, r6, r7 ; addxi r15, r16, 5 }
+	{ st1 r25, r26 ; mul_hu_hu r5, r6, r7 ; sub r15, r16, r17 }
+	{ st1 r25, r26 ; mul_ls_ls r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ st1 r25, r26 ; mul_lu_lu r5, r6, r7 ; rotl r15, r16, r17 }
+	{ st1 r25, r26 ; mula_hs_hs r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st1 r25, r26 ; mula_hu_hu r5, r6, r7 ; ill }
+	{ st1 r25, r26 ; mula_ls_ls r5, r6, r7 ; cmples r15, r16, r17 }
+	{ st1 r25, r26 ; mula_lu_lu r5, r6, r7 ; addi r15, r16, 5 }
+	{ st1 r25, r26 ; mula_lu_lu r5, r6, r7 ; shru r15, r16, r17 }
+	{ st1 r25, r26 ; mulax r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ st1 r25, r26 ; mulx r5, r6, r7 ; nor r15, r16, r17 }
+	{ st1 r25, r26 ; mz r15, r16, r17 ; info 19 }
+	{ st1 r25, r26 ; mz r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ st1 r25, r26 ; mz r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ st1 r25, r26 ; nop ; cmpne r5, r6, r7 }
+	{ st1 r25, r26 ; nop ; rotli r5, r6, 5 }
+	{ st1 r25, r26 ; nor r15, r16, r17 ; and r5, r6, r7 }
+	{ st1 r25, r26 ; nor r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ st1 r25, r26 ; nor r5, r6, r7 ; lnk r15 }
+	{ st1 r25, r26 ; or r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ st1 r25, r26 ; or r15, r16, r17 ; shrui r5, r6, 5 }
+	{ st1 r25, r26 ; or r5, r6, r7 ; shl r15, r16, r17 }
+	{ st1 r25, r26 ; pcnt r5, r6 ; movei r15, 5 }
+	{ st1 r25, r26 ; revbits r5, r6 ; jalr r15 }
+	{ st1 r25, r26 ; revbytes r5, r6 ; cmplts r15, r16, r17 }
+	{ st1 r25, r26 ; rotl r15, r16, r17 ; addxi r5, r6, 5 }
+	{ st1 r25, r26 ; rotl r15, r16, r17 ; shl r5, r6, r7 }
+	{ st1 r25, r26 ; rotl r5, r6, r7 ; jrp r15 }
+	{ st1 r25, r26 ; rotli r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ st1 r25, r26 ; rotli r15, r16, 5 ; shru r5, r6, r7 }
+	{ st1 r25, r26 ; rotli r5, r6, 5 ; rotli r15, r16, 5 }
+	{ st1 r25, r26 ; shl r15, r16, r17 ; movei r5, 5 }
+	{ st1 r25, r26 ; shl r5, r6, r7 ; add r15, r16, r17 }
+	{ st1 r25, r26 ; shl r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st1 r25, r26 ; shl1add r15, r16, r17 ; mulx r5, r6, r7 }
+	{ st1 r25, r26 ; shl1add r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st1 r25, r26 ; shl1addx r15, r16, r17 ; addxi r5, r6, 5 }
+	{ st1 r25, r26 ; shl1addx r15, r16, r17 ; shl r5, r6, r7 }
+	{ st1 r25, r26 ; shl1addx r5, r6, r7 ; jrp r15 }
+	{ st1 r25, r26 ; shl2add r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ st1 r25, r26 ; shl2add r15, r16, r17 ; shru r5, r6, r7 }
+	{ st1 r25, r26 ; shl2add r5, r6, r7 ; rotli r15, r16, 5 }
+	{ st1 r25, r26 ; shl2addx r15, r16, r17 ; movei r5, 5 }
+	{ st1 r25, r26 ; shl2addx r5, r6, r7 ; add r15, r16, r17 }
+	{ st1 r25, r26 ; shl2addx r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st1 r25, r26 ; shl3add r15, r16, r17 ; mulx r5, r6, r7 }
+	{ st1 r25, r26 ; shl3add r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st1 r25, r26 ; shl3addx r15, r16, r17 ; addxi r5, r6, 5 }
+	{ st1 r25, r26 ; shl3addx r15, r16, r17 ; shl r5, r6, r7 }
+	{ st1 r25, r26 ; shl3addx r5, r6, r7 ; jrp r15 }
+	{ st1 r25, r26 ; shli r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ st1 r25, r26 ; shli r15, r16, 5 ; shru r5, r6, r7 }
+	{ st1 r25, r26 ; shli r5, r6, 5 ; rotli r15, r16, 5 }
+	{ st1 r25, r26 ; shrs r15, r16, r17 ; movei r5, 5 }
+	{ st1 r25, r26 ; shrs r5, r6, r7 ; add r15, r16, r17 }
+	{ st1 r25, r26 ; shrs r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st1 r25, r26 ; shrsi r15, r16, 5 ; mulx r5, r6, r7 }
+	{ st1 r25, r26 ; shrsi r5, r6, 5 ; cmplts r15, r16, r17 }
+	{ st1 r25, r26 ; shru r15, r16, r17 ; addxi r5, r6, 5 }
+	{ st1 r25, r26 ; shru r15, r16, r17 ; shl r5, r6, r7 }
+	{ st1 r25, r26 ; shru r5, r6, r7 ; jrp r15 }
+	{ st1 r25, r26 ; shrui r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ st1 r25, r26 ; shrui r15, r16, 5 ; shru r5, r6, r7 }
+	{ st1 r25, r26 ; shrui r5, r6, 5 ; rotli r15, r16, 5 }
+	{ st1 r25, r26 ; sub r15, r16, r17 ; movei r5, 5 }
+	{ st1 r25, r26 ; sub r5, r6, r7 ; add r15, r16, r17 }
+	{ st1 r25, r26 ; sub r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st1 r25, r26 ; subx r15, r16, r17 ; mulx r5, r6, r7 }
+	{ st1 r25, r26 ; subx r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st1 r25, r26 ; tblidxb0 r5, r6 ; addxi r15, r16, 5 }
+	{ st1 r25, r26 ; tblidxb0 r5, r6 ; sub r15, r16, r17 }
+	{ st1 r25, r26 ; tblidxb1 r5, r6 ; shl3add r15, r16, r17 }
+	{ st1 r25, r26 ; tblidxb2 r5, r6 ; rotl r15, r16, r17 }
+	{ st1 r25, r26 ; tblidxb3 r5, r6 ; mnz r15, r16, r17 }
+	{ st1 r25, r26 ; xor r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ st1 r25, r26 ; xor r15, r16, r17 ; sub r5, r6, r7 }
+	{ st1 r25, r26 ; xor r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ st1_add r15, r16, 5 ; cmula r5, r6, r7 }
+	{ st1_add r15, r16, 5 ; mul_hu_hu r5, r6, r7 }
+	{ st1_add r15, r16, 5 ; shrsi r5, r6, 5 }
+	{ st1_add r15, r16, 5 ; v1maxui r5, r6, 5 }
+	{ st1_add r15, r16, 5 ; v2mnz r5, r6, r7 }
+	{ st2 r15, r16 ; addxsc r5, r6, r7 }
+	{ st2 r15, r16 ; fnop }
+	{ st2 r15, r16 ; or r5, r6, r7 }
+	{ st2 r15, r16 ; v1cmpleu r5, r6, r7 }
+	{ st2 r15, r16 ; v2adiffs r5, r6, r7 }
+	{ st2 r15, r16 ; v4add r5, r6, r7 }
+	{ st2 r25, r26 ; add r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ st2 r25, r26 ; add r5, r6, r7 ; and r15, r16, r17 }
+	{ st2 r25, r26 ; add r5, r6, r7 ; subx r15, r16, r17 }
+	{ st2 r25, r26 ; addi r15, r16, 5 ; or r5, r6, r7 }
+	{ st2 r25, r26 ; addi r5, r6, 5 ; fnop }
+	{ st2 r25, r26 ; addx r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ st2 r25, r26 ; addx r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ st2 r25, r26 ; addx r5, r6, r7 ; movei r15, 5 }
+	{ st2 r25, r26 ; addxi r15, r16, 5 ; ctz r5, r6 }
+	{ st2 r25, r26 ; addxi r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ st2 r25, r26 ; addxi r5, r6, 5 ; shl2add r15, r16, r17 }
+	{ st2 r25, r26 ; and r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ st2 r25, r26 ; and r5, r6, r7 ; and r15, r16, r17 }
+	{ st2 r25, r26 ; and r5, r6, r7 ; subx r15, r16, r17 }
+	{ st2 r25, r26 ; andi r15, r16, 5 ; or r5, r6, r7 }
+	{ st2 r25, r26 ; andi r5, r6, 5 ; fnop }
+	{ st2 r25, r26 ; clz r5, r6 ; cmpeqi r15, r16, 5 }
+	{ st2 r25, r26 ; cmoveqz r5, r6, r7 ; add r15, r16, r17 }
+	{ st2 r25, r26 ; cmoveqz r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st2 r25, r26 ; cmovnez r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ st2 r25, r26 ; cmpeq r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ st2 r25, r26 ; cmpeq r5, r6, r7 ; addxi r15, r16, 5 }
+	{ st2 r25, r26 ; cmpeq r5, r6, r7 ; sub r15, r16, r17 }
+	{ st2 r25, r26 ; cmpeqi r15, r16, 5 ; nor r5, r6, r7 }
+	{ st2 r25, r26 ; cmpeqi r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ st2 r25, r26 ; cmples r15, r16, r17 ; clz r5, r6 }
+	{ st2 r25, r26 ; cmples r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ st2 r25, r26 ; cmples r5, r6, r7 ; move r15, r16 }
+	{ st2 r25, r26 ; cmpleu r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ st2 r25, r26 ; cmpleu r15, r16, r17 ; subx r5, r6, r7 }
+	{ st2 r25, r26 ; cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ st2 r25, r26 ; cmplts r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ st2 r25, r26 ; cmplts r5, r6, r7 ; addxi r15, r16, 5 }
+	{ st2 r25, r26 ; cmplts r5, r6, r7 ; sub r15, r16, r17 }
+	{ st2 r25, r26 ; cmpltsi r15, r16, 5 ; nor r5, r6, r7 }
+	{ st2 r25, r26 ; cmpltsi r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ st2 r25, r26 ; cmpltu r15, r16, r17 ; clz r5, r6 }
+	{ st2 r25, r26 ; cmpltu r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ st2 r25, r26 ; cmpltu r5, r6, r7 ; move r15, r16 }
+	{ st2 r25, r26 ; cmpne r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ st2 r25, r26 ; cmpne r15, r16, r17 ; subx r5, r6, r7 }
+	{ st2 r25, r26 ; cmpne r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ st2 r25, r26 ; ctz r5, r6 ; nop }
+	{ st2 r25, r26 ; fnop ; cmples r15, r16, r17 }
+	{ st2 r25, r26 ; fnop ; nop }
+	{ st2 r25, r26 ; fnop ; tblidxb0 r5, r6 }
+	{ st2 r25, r26 ; fsingle_pack1 r5, r6 ; shl1addx r15, r16, r17 }
+	{ st2 r25, r26 ; ill ; mul_ls_ls r5, r6, r7 }
+	{ st2 r25, r26 ; info 19 ; addi r5, r6, 5 }
+	{ st2 r25, r26 ; info 19 ; move r15, r16 }
+	{ st2 r25, r26 ; info 19 ; shl3addx r15, r16, r17 }
+	{ st2 r25, r26 ; jalr r15 ; ctz r5, r6 }
+	{ st2 r25, r26 ; jalr r15 ; tblidxb0 r5, r6 }
+	{ st2 r25, r26 ; jalrp r15 ; mz r5, r6, r7 }
+	{ st2 r25, r26 ; jr r15 ; cmples r5, r6, r7 }
+	{ st2 r25, r26 ; jr r15 ; shrs r5, r6, r7 }
+	{ st2 r25, r26 ; jrp r15 ; mula_hs_hs r5, r6, r7 }
+	{ st2 r25, r26 ; lnk r15 ; andi r5, r6, 5 }
+	{ st2 r25, r26 ; lnk r15 ; shl1addx r5, r6, r7 }
+	{ st2 r25, r26 ; mnz r15, r16, r17 ; move r5, r6 }
+	{ st2 r25, r26 ; mnz r15, r16, r17 }
+	{ st2 r25, r26 ; mnz r5, r6, r7 ; shrs r15, r16, r17 }
+	{ st2 r25, r26 ; move r15, r16 ; mulax r5, r6, r7 }
+	{ st2 r25, r26 ; move r5, r6 ; cmpleu r15, r16, r17 }
+	{ st2 r25, r26 ; movei r15, 5 ; addx r5, r6, r7 }
+	{ st2 r25, r26 ; movei r15, 5 ; rotli r5, r6, 5 }
+	{ st2 r25, r26 ; movei r5, 5 ; jr r15 }
+	{ st2 r25, r26 ; mul_hs_hs r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ st2 r25, r26 ; mul_hu_hu r5, r6, r7 ; andi r15, r16, 5 }
+	{ st2 r25, r26 ; mul_hu_hu r5, r6, r7 ; xor r15, r16, r17 }
+	{ st2 r25, r26 ; mul_ls_ls r5, r6, r7 ; shli r15, r16, 5 }
+	{ st2 r25, r26 ; mul_lu_lu r5, r6, r7 ; shl r15, r16, r17 }
+	{ st2 r25, r26 ; mula_hs_hs r5, r6, r7 ; movei r15, 5 }
+	{ st2 r25, r26 ; mula_hu_hu r5, r6, r7 ; jalr r15 }
+	{ st2 r25, r26 ; mula_ls_ls r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ st2 r25, r26 ; mula_lu_lu r5, r6, r7 ; addxi r15, r16, 5 }
+	{ st2 r25, r26 ; mula_lu_lu r5, r6, r7 ; sub r15, r16, r17 }
+	{ st2 r25, r26 ; mulax r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ st2 r25, r26 ; mulx r5, r6, r7 ; rotl r15, r16, r17 }
+	{ st2 r25, r26 ; mz r15, r16, r17 ; move r5, r6 }
+	{ st2 r25, r26 ; mz r15, r16, r17 }
+	{ st2 r25, r26 ; mz r5, r6, r7 ; shrs r15, r16, r17 }
+	{ st2 r25, r26 ; nop ; fnop }
+	{ st2 r25, r26 ; nop ; shl r5, r6, r7 }
+	{ st2 r25, r26 ; nor r15, r16, r17 ; clz r5, r6 }
+	{ st2 r25, r26 ; nor r15, r16, r17 ; shl2add r5, r6, r7 }
+	{ st2 r25, r26 ; nor r5, r6, r7 ; move r15, r16 }
+	{ st2 r25, r26 ; or r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ st2 r25, r26 ; or r15, r16, r17 ; subx r5, r6, r7 }
+	{ st2 r25, r26 ; or r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ st2 r25, r26 ; pcnt r5, r6 ; nop }
+	{ st2 r25, r26 ; revbits r5, r6 ; jr r15 }
+	{ st2 r25, r26 ; revbytes r5, r6 ; cmpltu r15, r16, r17 }
+	{ st2 r25, r26 ; rotl r15, r16, r17 ; andi r5, r6, 5 }
+	{ st2 r25, r26 ; rotl r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ st2 r25, r26 ; rotl r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st2 r25, r26 ; rotli r15, r16, 5 ; cmpltu r5, r6, r7 }
+	{ st2 r25, r26 ; rotli r15, r16, 5 ; sub r5, r6, r7 }
+	{ st2 r25, r26 ; rotli r5, r6, 5 ; shl1add r15, r16, r17 }
+	{ st2 r25, r26 ; shl r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ st2 r25, r26 ; shl r5, r6, r7 ; addx r15, r16, r17 }
+	{ st2 r25, r26 ; shl r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st2 r25, r26 ; shl1add r15, r16, r17 ; nop }
+	{ st2 r25, r26 ; shl1add r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ st2 r25, r26 ; shl1addx r15, r16, r17 ; andi r5, r6, 5 }
+	{ st2 r25, r26 ; shl1addx r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ st2 r25, r26 ; shl1addx r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st2 r25, r26 ; shl2add r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ st2 r25, r26 ; shl2add r15, r16, r17 ; sub r5, r6, r7 }
+	{ st2 r25, r26 ; shl2add r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ st2 r25, r26 ; shl2addx r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ st2 r25, r26 ; shl2addx r5, r6, r7 ; addx r15, r16, r17 }
+	{ st2 r25, r26 ; shl2addx r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st2 r25, r26 ; shl3add r15, r16, r17 ; nop }
+	{ st2 r25, r26 ; shl3add r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ st2 r25, r26 ; shl3addx r15, r16, r17 ; andi r5, r6, 5 }
+	{ st2 r25, r26 ; shl3addx r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ st2 r25, r26 ; shl3addx r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st2 r25, r26 ; shli r15, r16, 5 ; cmpltu r5, r6, r7 }
+	{ st2 r25, r26 ; shli r15, r16, 5 ; sub r5, r6, r7 }
+	{ st2 r25, r26 ; shli r5, r6, 5 ; shl1add r15, r16, r17 }
+	{ st2 r25, r26 ; shrs r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ st2 r25, r26 ; shrs r5, r6, r7 ; addx r15, r16, r17 }
+	{ st2 r25, r26 ; shrs r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st2 r25, r26 ; shrsi r15, r16, 5 ; nop }
+	{ st2 r25, r26 ; shrsi r5, r6, 5 ; cmpltu r15, r16, r17 }
+	{ st2 r25, r26 ; shru r15, r16, r17 ; andi r5, r6, 5 }
+	{ st2 r25, r26 ; shru r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ st2 r25, r26 ; shru r5, r6, r7 ; mnz r15, r16, r17 }
+	{ st2 r25, r26 ; shrui r15, r16, 5 ; cmpltu r5, r6, r7 }
+	{ st2 r25, r26 ; shrui r15, r16, 5 ; sub r5, r6, r7 }
+	{ st2 r25, r26 ; shrui r5, r6, 5 ; shl1add r15, r16, r17 }
+	{ st2 r25, r26 ; sub r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ st2 r25, r26 ; sub r5, r6, r7 ; addx r15, r16, r17 }
+	{ st2 r25, r26 ; sub r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st2 r25, r26 ; subx r15, r16, r17 ; nop }
+	{ st2 r25, r26 ; subx r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ st2 r25, r26 ; tblidxb0 r5, r6 ; andi r15, r16, 5 }
+	{ st2 r25, r26 ; tblidxb0 r5, r6 ; xor r15, r16, r17 }
+	{ st2 r25, r26 ; tblidxb1 r5, r6 ; shli r15, r16, 5 }
+	{ st2 r25, r26 ; tblidxb2 r5, r6 ; shl r15, r16, r17 }
+	{ st2 r25, r26 ; tblidxb3 r5, r6 ; movei r15, 5 }
+	{ st2 r25, r26 ; xor r15, r16, r17 ; ctz r5, r6 }
+	{ st2 r25, r26 ; xor r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ st2 r25, r26 ; xor r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ st2_add r15, r16, 5 ; cmulf r5, r6, r7 }
+	{ st2_add r15, r16, 5 ; mul_hu_lu r5, r6, r7 }
+	{ st2_add r15, r16, 5 ; shrui r5, r6, 5 }
+	{ st2_add r15, r16, 5 ; v1minui r5, r6, 5 }
+	{ st2_add r15, r16, 5 ; v2muls r5, r6, r7 }
+	{ st4 r15, r16 ; andi r5, r6, 5 }
+	{ st4 r15, r16 ; fsingle_addsub2 r5, r6, r7 }
+	{ st4 r15, r16 ; pcnt r5, r6 }
+	{ st4 r15, r16 ; v1cmpltsi r5, r6, 5 }
+	{ st4 r15, r16 ; v2cmpeq r5, r6, r7 }
+	{ st4 r15, r16 ; v4int_h r5, r6, r7 }
+	{ st4 r25, r26 ; add r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ st4 r25, r26 ; add r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ st4 r25, r26 ; add r5, r6, r7 }
+	{ st4 r25, r26 ; addi r15, r16, 5 ; revbits r5, r6 }
+	{ st4 r25, r26 ; addi r5, r6, 5 ; info 19 }
+	{ st4 r25, r26 ; addx r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ st4 r25, r26 ; addx r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ st4 r25, r26 ; addx r5, r6, r7 ; nop }
+	{ st4 r25, r26 ; addxi r15, r16, 5 ; fsingle_pack1 r5, r6 }
+	{ st4 r25, r26 ; addxi r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ st4 r25, r26 ; addxi r5, r6, 5 ; shl3add r15, r16, r17 }
+	{ st4 r25, r26 ; and r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ st4 r25, r26 ; and r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ st4 r25, r26 ; and r5, r6, r7 }
+	{ st4 r25, r26 ; andi r15, r16, 5 ; revbits r5, r6 }
+	{ st4 r25, r26 ; andi r5, r6, 5 ; info 19 }
+	{ st4 r25, r26 ; clz r5, r6 ; cmpleu r15, r16, r17 }
+	{ st4 r25, r26 ; cmoveqz r5, r6, r7 ; addx r15, r16, r17 }
+	{ st4 r25, r26 ; cmoveqz r5, r6, r7 ; shrui r15, r16, 5 }
+	{ st4 r25, r26 ; cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ st4 r25, r26 ; cmpeq r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ st4 r25, r26 ; cmpeq r5, r6, r7 ; andi r15, r16, 5 }
+	{ st4 r25, r26 ; cmpeq r5, r6, r7 ; xor r15, r16, r17 }
+	{ st4 r25, r26 ; cmpeqi r15, r16, 5 ; pcnt r5, r6 }
+	{ st4 r25, r26 ; cmpeqi r5, r6, 5 ; ill }
+	{ st4 r25, r26 ; cmples r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ st4 r25, r26 ; cmples r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ st4 r25, r26 ; cmples r5, r6, r7 ; mz r15, r16, r17 }
+	{ st4 r25, r26 ; cmpleu r15, r16, r17 ; fnop }
+	{ st4 r25, r26 ; cmpleu r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ st4 r25, r26 ; cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ st4 r25, r26 ; cmplts r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ st4 r25, r26 ; cmplts r5, r6, r7 ; andi r15, r16, 5 }
+	{ st4 r25, r26 ; cmplts r5, r6, r7 ; xor r15, r16, r17 }
+	{ st4 r25, r26 ; cmpltsi r15, r16, 5 ; pcnt r5, r6 }
+	{ st4 r25, r26 ; cmpltsi r5, r6, 5 ; ill }
+	{ st4 r25, r26 ; cmpltu r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ st4 r25, r26 ; cmpltu r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ st4 r25, r26 ; cmpltu r5, r6, r7 ; mz r15, r16, r17 }
+	{ st4 r25, r26 ; cmpne r15, r16, r17 ; fnop }
+	{ st4 r25, r26 ; cmpne r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ st4 r25, r26 ; cmpne r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ st4 r25, r26 ; ctz r5, r6 ; or r15, r16, r17 }
+	{ st4 r25, r26 ; fnop ; cmpleu r15, r16, r17 }
+	{ st4 r25, r26 ; fnop ; nor r5, r6, r7 }
+	{ st4 r25, r26 ; fnop ; tblidxb2 r5, r6 }
+	{ st4 r25, r26 ; fsingle_pack1 r5, r6 ; shl2addx r15, r16, r17 }
+	{ st4 r25, r26 ; ill ; mula_hs_hs r5, r6, r7 }
+	{ st4 r25, r26 ; info 19 ; addx r5, r6, r7 }
+	{ st4 r25, r26 ; info 19 ; movei r15, 5 }
+	{ st4 r25, r26 ; info 19 ; shli r15, r16, 5 }
+	{ st4 r25, r26 ; jalr r15 ; fsingle_pack1 r5, r6 }
+	{ st4 r25, r26 ; jalr r15 ; tblidxb2 r5, r6 }
+	{ st4 r25, r26 ; jalrp r15 ; nor r5, r6, r7 }
+	{ st4 r25, r26 ; jr r15 ; cmplts r5, r6, r7 }
+	{ st4 r25, r26 ; jr r15 ; shru r5, r6, r7 }
+	{ st4 r25, r26 ; jrp r15 ; mula_ls_ls r5, r6, r7 }
+	{ st4 r25, r26 ; lnk r15 ; cmoveqz r5, r6, r7 }
+	{ st4 r25, r26 ; lnk r15 ; shl2addx r5, r6, r7 }
+	{ st4 r25, r26 ; mnz r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ st4 r25, r26 ; mnz r5, r6, r7 ; addi r15, r16, 5 }
+	{ st4 r25, r26 ; mnz r5, r6, r7 ; shru r15, r16, r17 }
+	{ st4 r25, r26 ; move r15, r16 ; mz r5, r6, r7 }
+	{ st4 r25, r26 ; move r5, r6 ; cmpltsi r15, r16, 5 }
+	{ st4 r25, r26 ; movei r15, 5 ; and r5, r6, r7 }
+	{ st4 r25, r26 ; movei r15, 5 ; shl1add r5, r6, r7 }
+	{ st4 r25, r26 ; movei r5, 5 ; lnk r15 }
+	{ st4 r25, r26 ; mul_hs_hs r5, r6, r7 ; fnop }
+	{ st4 r25, r26 ; mul_hu_hu r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ st4 r25, r26 ; mul_ls_ls r5, r6, r7 ; add r15, r16, r17 }
+	{ st4 r25, r26 ; mul_ls_ls r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ st4 r25, r26 ; mul_lu_lu r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ st4 r25, r26 ; mula_hs_hs r5, r6, r7 ; nop }
+	{ st4 r25, r26 ; mula_hu_hu r5, r6, r7 ; jr r15 }
+	{ st4 r25, r26 ; mula_ls_ls r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ st4 r25, r26 ; mula_lu_lu r5, r6, r7 ; andi r15, r16, 5 }
+	{ st4 r25, r26 ; mula_lu_lu r5, r6, r7 ; xor r15, r16, r17 }
+	{ st4 r25, r26 ; mulax r5, r6, r7 ; shli r15, r16, 5 }
+	{ st4 r25, r26 ; mulx r5, r6, r7 ; shl r15, r16, r17 }
+	{ st4 r25, r26 ; mz r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ st4 r25, r26 ; mz r5, r6, r7 ; addi r15, r16, 5 }
+	{ st4 r25, r26 ; mz r5, r6, r7 ; shru r15, r16, r17 }
+	{ st4 r25, r26 ; nop ; ill }
+	{ st4 r25, r26 ; nop ; shl1add r5, r6, r7 }
+	{ st4 r25, r26 ; nor r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ st4 r25, r26 ; nor r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ st4 r25, r26 ; nor r5, r6, r7 ; mz r15, r16, r17 }
+	{ st4 r25, r26 ; or r15, r16, r17 ; fnop }
+	{ st4 r25, r26 ; or r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ st4 r25, r26 ; or r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ st4 r25, r26 ; pcnt r5, r6 ; or r15, r16, r17 }
+	{ st4 r25, r26 ; revbits r5, r6 ; lnk r15 }
+	{ st4 r25, r26 ; revbytes r5, r6 ; fnop }
+	{ st4 r25, r26 ; rotl r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ st4 r25, r26 ; rotl r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ st4 r25, r26 ; rotl r5, r6, r7 ; movei r15, 5 }
+	{ st4 r25, r26 ; rotli r15, r16, 5 ; ctz r5, r6 }
+	{ st4 r25, r26 ; rotli r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ st4 r25, r26 ; rotli r5, r6, 5 ; shl2add r15, r16, r17 }
+	{ st4 r25, r26 ; shl r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ st4 r25, r26 ; shl r5, r6, r7 ; and r15, r16, r17 }
+	{ st4 r25, r26 ; shl r5, r6, r7 ; subx r15, r16, r17 }
+	{ st4 r25, r26 ; shl1add r15, r16, r17 ; or r5, r6, r7 }
+	{ st4 r25, r26 ; shl1add r5, r6, r7 ; fnop }
+	{ st4 r25, r26 ; shl1addx r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ st4 r25, r26 ; shl1addx r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ st4 r25, r26 ; shl1addx r5, r6, r7 ; movei r15, 5 }
+	{ st4 r25, r26 ; shl2add r15, r16, r17 ; ctz r5, r6 }
+	{ st4 r25, r26 ; shl2add r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ st4 r25, r26 ; shl2add r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ st4 r25, r26 ; shl2addx r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ st4 r25, r26 ; shl2addx r5, r6, r7 ; and r15, r16, r17 }
+	{ st4 r25, r26 ; shl2addx r5, r6, r7 ; subx r15, r16, r17 }
+	{ st4 r25, r26 ; shl3add r15, r16, r17 ; or r5, r6, r7 }
+	{ st4 r25, r26 ; shl3add r5, r6, r7 ; fnop }
+	{ st4 r25, r26 ; shl3addx r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ st4 r25, r26 ; shl3addx r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ st4 r25, r26 ; shl3addx r5, r6, r7 ; movei r15, 5 }
+	{ st4 r25, r26 ; shli r15, r16, 5 ; ctz r5, r6 }
+	{ st4 r25, r26 ; shli r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ st4 r25, r26 ; shli r5, r6, 5 ; shl2add r15, r16, r17 }
+	{ st4 r25, r26 ; shrs r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ st4 r25, r26 ; shrs r5, r6, r7 ; and r15, r16, r17 }
+	{ st4 r25, r26 ; shrs r5, r6, r7 ; subx r15, r16, r17 }
+	{ st4 r25, r26 ; shrsi r15, r16, 5 ; or r5, r6, r7 }
+	{ st4 r25, r26 ; shrsi r5, r6, 5 ; fnop }
+	{ st4 r25, r26 ; shru r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ st4 r25, r26 ; shru r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ st4 r25, r26 ; shru r5, r6, r7 ; movei r15, 5 }
+	{ st4 r25, r26 ; shrui r15, r16, 5 ; ctz r5, r6 }
+	{ st4 r25, r26 ; shrui r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ st4 r25, r26 ; shrui r5, r6, 5 ; shl2add r15, r16, r17 }
+	{ st4 r25, r26 ; sub r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
+	{ st4 r25, r26 ; sub r5, r6, r7 ; and r15, r16, r17 }
+	{ st4 r25, r26 ; sub r5, r6, r7 ; subx r15, r16, r17 }
+	{ st4 r25, r26 ; subx r15, r16, r17 ; or r5, r6, r7 }
+	{ st4 r25, r26 ; subx r5, r6, r7 ; fnop }
+	{ st4 r25, r26 ; tblidxb0 r5, r6 ; cmpeqi r15, r16, 5 }
+	{ st4 r25, r26 ; tblidxb1 r5, r6 ; add r15, r16, r17 }
+	{ st4 r25, r26 ; tblidxb1 r5, r6 ; shrsi r15, r16, 5 }
+	{ st4 r25, r26 ; tblidxb2 r5, r6 ; shl1addx r15, r16, r17 }
+	{ st4 r25, r26 ; tblidxb3 r5, r6 ; nop }
+	{ st4 r25, r26 ; xor r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ st4 r25, r26 ; xor r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ st4 r25, r26 ; xor r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ st4_add r15, r16, 5 ; cmulh r5, r6, r7 }
+	{ st4_add r15, r16, 5 ; mul_ls_lu r5, r6, r7 }
+	{ st4_add r15, r16, 5 ; shruxi r5, r6, 5 }
+	{ st4_add r15, r16, 5 ; v1multu r5, r6, r7 }
+	{ st4_add r15, r16, 5 ; v2mz r5, r6, r7 }
+	{ st_add r15, r16, 5 ; bfextu r5, r6, 5, 7 }
+	{ st_add r15, r16, 5 ; fsingle_mul2 r5, r6, r7 }
+	{ st_add r15, r16, 5 ; revbytes r5, r6 }
+	{ st_add r15, r16, 5 ; v1cmpltui r5, r6, 5 }
+	{ st_add r15, r16, 5 ; v2cmples r5, r6, r7 }
+	{ st_add r15, r16, 5 ; v4packsc r5, r6, r7 }
+	{ stnt r15, r16 ; crc32_32 r5, r6, r7 }
+	{ stnt r15, r16 ; mula_hs_hs r5, r6, r7 }
+	{ stnt r15, r16 ; sub r5, r6, r7 }
+	{ stnt r15, r16 ; v1mulus r5, r6, r7 }
+	{ stnt r15, r16 ; v2packl r5, r6, r7 }
+	{ stnt1 r15, r16 ; clz r5, r6 }
+	{ stnt1 r15, r16 ; fsingle_pack2 r5, r6, r7 }
+	{ stnt1 r15, r16 ; rotli r5, r6, 5 }
+	{ stnt1 r15, r16 ; v1ddotpu r5, r6, r7 }
+	{ stnt1 r15, r16 ; v2cmplts r5, r6, r7 }
+	{ stnt1 r15, r16 ; v4shlsc r5, r6, r7 }
+	{ stnt1_add r15, r16, 5 ; ctz r5, r6 }
+	{ stnt1_add r15, r16, 5 ; mula_hs_ls r5, r6, r7 }
+	{ stnt1_add r15, r16, 5 ; subxsc r5, r6, r7 }
+	{ stnt1_add r15, r16, 5 ; v1sadau r5, r6, r7 }
+	{ stnt1_add r15, r16, 5 ; v2sadas r5, r6, r7 }
+	{ stnt2 r15, r16 ; cmovnez r5, r6, r7 }
+	{ stnt2 r15, r16 ; info 19 }
+	{ stnt2 r15, r16 ; shl16insli r5, r6, 0x1234 }
+	{ stnt2 r15, r16 ; v1ddotpus r5, r6, r7 }
+	{ stnt2 r15, r16 ; v2cmpltu r5, r6, r7 }
+	{ stnt2 r15, r16 ; v4shru r5, r6, r7 }
+	{ stnt2_add r15, r16, 5 ; dblalign2 r5, r6, r7 }
+	{ stnt2_add r15, r16, 5 ; mula_hu_hu r5, r6, r7 }
+	{ stnt2_add r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ stnt2_add r15, r16, 5 ; v1shl r5, r6, r7 }
+	{ stnt2_add r15, r16, 5 ; v2sads r5, r6, r7 }
+	{ stnt4 r15, r16 ; cmpeqi r5, r6, 5 }
+	{ stnt4 r15, r16 ; mm r5, r6, 5, 7 }
+	{ stnt4 r15, r16 ; shl1addx r5, r6, r7 }
+	{ stnt4 r15, r16 ; v1dotp r5, r6, r7 }
+	{ stnt4 r15, r16 ; v2cmpne r5, r6, r7 }
+	{ stnt4 r15, r16 ; v4subsc r5, r6, r7 }
+	{ stnt4_add r15, r16, 5 ; dblalign6 r5, r6, r7 }
+	{ stnt4_add r15, r16, 5 ; mula_hu_lu r5, r6, r7 }
+	{ stnt4_add r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ stnt4_add r15, r16, 5 ; v1shrs r5, r6, r7 }
+	{ stnt4_add r15, r16, 5 ; v2shl r5, r6, r7 }
+	{ stnt_add r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ stnt_add r15, r16, 5 ; move r5, r6 }
+	{ stnt_add r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ stnt_add r15, r16, 5 ; v1dotpu r5, r6, r7 }
+	{ stnt_add r15, r16, 5 ; v2dotpa r5, r6, r7 }
+	{ stnt_add r15, r16, 5 ; xori r5, r6, 5 }
+	{ sub r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 }
+	{ sub r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 }
+	{ sub r15, r16, r17 ; bfins r5, r6, 5, 7 }
+	{ sub r15, r16, r17 ; cmovnez r5, r6, r7 ; ld1s r25, r26 }
+	{ sub r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+	{ sub r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 }
+	{ sub r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+	{ sub r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1 r25 }
+	{ sub r15, r16, r17 ; dblalign2 r5, r6, r7 }
+	{ sub r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld4u r25, r26 }
+	{ sub r15, r16, r17 ; ld r25, r26 ; andi r5, r6, 5 }
+	{ sub r15, r16, r17 ; ld r25, r26 ; shl1addx r5, r6, r7 }
+	{ sub r15, r16, r17 ; ld1s r25, r26 ; move r5, r6 }
+	{ sub r15, r16, r17 ; ld1s r25, r26 }
+	{ sub r15, r16, r17 ; ld1u r25, r26 ; revbits r5, r6 }
+	{ sub r15, r16, r17 ; ld2s r25, r26 ; cmpne r5, r6, r7 }
+	{ sub r15, r16, r17 ; ld2s r25, r26 ; subx r5, r6, r7 }
+	{ sub r15, r16, r17 ; ld2u r25, r26 ; mulx r5, r6, r7 }
+	{ sub r15, r16, r17 ; ld4s r25, r26 ; cmpeqi r5, r6, 5 }
+	{ sub r15, r16, r17 ; ld4s r25, r26 ; shli r5, r6, 5 }
+	{ sub r15, r16, r17 ; ld4u r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ sub r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
+	{ sub r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 }
+	{ sub r15, r16, r17 ; mul_hu_hu r5, r6, r7 ; ld2s r25, r26 }
+	{ sub r15, r16, r17 ; mul_lu_lu r5, r6, r7 ; ld1u r25, r26 }
+	{ sub r15, r16, r17 ; mula_hu_hu r5, r6, r7 ; ld1s r25, r26 }
+	{ sub r15, r16, r17 ; mula_lu_lu r5, r6, r7 ; ld r25, r26 }
+	{ sub r15, r16, r17 ; mulx r5, r6, r7 ; ld1u r25, r26 }
+	{ sub r15, r16, r17 ; nop ; ld2u r25, r26 }
+	{ sub r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 }
+	{ sub r15, r16, r17 ; prefetch r25 ; cmoveqz r5, r6, r7 }
+	{ sub r15, r16, r17 ; prefetch r25 ; shl2addx r5, r6, r7 }
+	{ sub r15, r16, r17 ; prefetch_l1 r25 ; mul_hs_hs r5, r6, r7 }
+	{ sub r15, r16, r17 ; prefetch_l1_fault r25 ; addi r5, r6, 5 }
+	{ sub r15, r16, r17 ; prefetch_l1_fault r25 ; rotl r5, r6, r7 }
+	{ sub r15, r16, r17 ; prefetch_l2 r25 ; fnop }
+	{ sub r15, r16, r17 ; prefetch_l2 r25 ; tblidxb1 r5, r6 }
+	{ sub r15, r16, r17 ; prefetch_l2_fault r25 ; nop }
+	{ sub r15, r16, r17 ; prefetch_l3 r25 ; cmpleu r5, r6, r7 }
+	{ sub r15, r16, r17 ; prefetch_l3 r25 ; shrsi r5, r6, 5 }
+	{ sub r15, r16, r17 ; prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 }
+	{ sub r15, r16, r17 ; revbits r5, r6 ; ld4u r25, r26 }
+	{ sub r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1 r25 }
+	{ sub r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+	{ sub r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ sub r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ sub r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 }
+	{ sub r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 }
+	{ sub r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 }
+	{ sub r15, r16, r17 ; st r25, r26 ; cmpne r5, r6, r7 }
+	{ sub r15, r16, r17 ; st r25, r26 ; subx r5, r6, r7 }
+	{ sub r15, r16, r17 ; st1 r25, r26 ; mulx r5, r6, r7 }
+	{ sub r15, r16, r17 ; st2 r25, r26 ; cmpeqi r5, r6, 5 }
+	{ sub r15, r16, r17 ; st2 r25, r26 ; shli r5, r6, 5 }
+	{ sub r15, r16, r17 ; st4 r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ sub r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 }
+	{ sub r15, r16, r17 ; tblidxb0 r5, r6 ; ld4s r25, r26 }
+	{ sub r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch r25 }
+	{ sub r15, r16, r17 ; v1cmplts r5, r6, r7 }
+	{ sub r15, r16, r17 ; v2avgs r5, r6, r7 }
+	{ sub r15, r16, r17 ; v4addsc r5, r6, r7 }
+	{ sub r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
+	{ sub r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ sub r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ sub r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ sub r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ sub r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+	{ sub r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+	{ sub r5, r6, r7 ; fnop ; ld1s r25, r26 }
+	{ sub r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+	{ sub r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+	{ sub r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
+	{ sub r5, r6, r7 ; ld r25, r26 ; move r15, r16 }
+	{ sub r5, r6, r7 ; ld1s r25, r26 ; ill }
+	{ sub r5, r6, r7 ; ld1u r25, r26 ; cmpeq r15, r16, r17 }
+	{ sub r5, r6, r7 ; ld1u r25, r26 }
+	{ sub r5, r6, r7 ; ld2s r25, r26 ; shl3addx r15, r16, r17 }
+	{ sub r5, r6, r7 ; ld2u r25, r26 ; or r15, r16, r17 }
+	{ sub r5, r6, r7 ; ld4s r25, r26 ; jr r15 }
+	{ sub r5, r6, r7 ; ld4u r25, r26 ; cmplts r15, r16, r17 }
+	{ sub r5, r6, r7 ; ldna_add r15, r16, 5 }
+	{ sub r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+	{ sub r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+	{ sub r5, r6, r7 ; nop ; ld4u r25, r26 }
+	{ sub r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1 r25 }
+	{ sub r5, r6, r7 ; prefetch r25 ; nor r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch_l1 r25 ; cmpne r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch_l1_fault r25 ; andi r15, r16, 5 }
+	{ sub r5, r6, r7 ; prefetch_l1_fault r25 ; xor r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch_l2 r25 ; shl3addx r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch_l2_fault r25 ; rotl r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch_l3 r25 ; lnk r15 }
+	{ sub r5, r6, r7 ; prefetch_l3_fault r25 ; cmpne r15, r16, r17 }
+	{ sub r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
+	{ sub r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+	{ sub r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1 r25 }
+	{ sub r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+	{ sub r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+	{ sub r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+	{ sub r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+	{ sub r5, r6, r7 ; st r25, r26 ; cmpne r15, r16, r17 }
+	{ sub r5, r6, r7 ; st1 r25, r26 ; andi r15, r16, 5 }
+	{ sub r5, r6, r7 ; st1 r25, r26 ; xor r15, r16, r17 }
+	{ sub r5, r6, r7 ; st2 r25, r26 ; shl3add r15, r16, r17 }
+	{ sub r5, r6, r7 ; st4 r25, r26 ; nor r15, r16, r17 }
+	{ sub r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+	{ sub r5, r6, r7 ; v1cmpne r15, r16, r17 }
+	{ sub r5, r6, r7 ; v2shl r15, r16, r17 }
+	{ sub r5, r6, r7 ; xori r15, r16, 5 }
+	{ subx r15, r16, r17 ; addx r5, r6, r7 ; ld r25, r26 }
+	{ subx r15, r16, r17 ; and r5, r6, r7 ; ld r25, r26 }
+	{ subx r15, r16, r17 ; bfins r5, r6, 5, 7 }
+	{ subx r15, r16, r17 ; cmovnez r5, r6, r7 ; ld1s r25, r26 }
+	{ subx r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld2s r25, r26 }
+	{ subx r15, r16, r17 ; cmpleu r5, r6, r7 ; ld4s r25, r26 }
+	{ subx r15, r16, r17 ; cmpltsi r5, r6, 5 ; prefetch r25 }
+	{ subx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l1 r25 }
+	{ subx r15, r16, r17 ; dblalign2 r5, r6, r7 }
+	{ subx r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld4u r25, r26 }
+	{ subx r15, r16, r17 ; ld r25, r26 ; andi r5, r6, 5 }
+	{ subx r15, r16, r17 ; ld r25, r26 ; shl1addx r5, r6, r7 }
+	{ subx r15, r16, r17 ; ld1s r25, r26 ; move r5, r6 }
+	{ subx r15, r16, r17 ; ld1s r25, r26 }
+	{ subx r15, r16, r17 ; ld1u r25, r26 ; revbits r5, r6 }
+	{ subx r15, r16, r17 ; ld2s r25, r26 ; cmpne r5, r6, r7 }
+	{ subx r15, r16, r17 ; ld2s r25, r26 ; subx r5, r6, r7 }
+	{ subx r15, r16, r17 ; ld2u r25, r26 ; mulx r5, r6, r7 }
+	{ subx r15, r16, r17 ; ld4s r25, r26 ; cmpeqi r5, r6, 5 }
+	{ subx r15, r16, r17 ; ld4s r25, r26 ; shli r5, r6, 5 }
+	{ subx r15, r16, r17 ; ld4u r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ subx r15, r16, r17 ; mnz r5, r6, r7 ; ld2s r25, r26 }
+	{ subx r15, r16, r17 ; movei r5, 5 ; ld4s r25, r26 }
+	{ subx r15, r16, r17 ; mul_hu_hu r5, r6, r7 ; ld2s r25, r26 }
+	{ subx r15, r16, r17 ; mul_lu_lu r5, r6, r7 ; ld1u r25, r26 }
+	{ subx r15, r16, r17 ; mula_hu_hu r5, r6, r7 ; ld1s r25, r26 }
+	{ subx r15, r16, r17 ; mula_lu_lu r5, r6, r7 ; ld r25, r26 }
+	{ subx r15, r16, r17 ; mulx r5, r6, r7 ; ld1u r25, r26 }
+	{ subx r15, r16, r17 ; nop ; ld2u r25, r26 }
+	{ subx r15, r16, r17 ; or r5, r6, r7 ; ld4u r25, r26 }
+	{ subx r15, r16, r17 ; prefetch r25 ; cmoveqz r5, r6, r7 }
+	{ subx r15, r16, r17 ; prefetch r25 ; shl2addx r5, r6, r7 }
+	{ subx r15, r16, r17 ; prefetch_l1 r25 ; mul_hs_hs r5, r6, r7 }
+	{ subx r15, r16, r17 ; prefetch_l1_fault r25 ; addi r5, r6, 5 }
+	{ subx r15, r16, r17 ; prefetch_l1_fault r25 ; rotl r5, r6, r7 }
+	{ subx r15, r16, r17 ; prefetch_l2 r25 ; fnop }
+	{ subx r15, r16, r17 ; prefetch_l2 r25 ; tblidxb1 r5, r6 }
+	{ subx r15, r16, r17 ; prefetch_l2_fault r25 ; nop }
+	{ subx r15, r16, r17 ; prefetch_l3 r25 ; cmpleu r5, r6, r7 }
+	{ subx r15, r16, r17 ; prefetch_l3 r25 ; shrsi r5, r6, 5 }
+	{ subx r15, r16, r17 ; prefetch_l3_fault r25 ; mula_hu_hu r5, r6, r7 }
+	{ subx r15, r16, r17 ; revbits r5, r6 ; ld4u r25, r26 }
+	{ subx r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l1 r25 }
+	{ subx r15, r16, r17 ; shl r5, r6, r7 ; prefetch_l2 r25 }
+	{ subx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ subx r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ subx r15, r16, r17 ; shl3addx r5, r6, r7 ; st1 r25, r26 }
+	{ subx r15, r16, r17 ; shrs r5, r6, r7 ; st1 r25, r26 }
+	{ subx r15, r16, r17 ; shru r5, r6, r7 ; st4 r25, r26 }
+	{ subx r15, r16, r17 ; st r25, r26 ; cmpne r5, r6, r7 }
+	{ subx r15, r16, r17 ; st r25, r26 ; subx r5, r6, r7 }
+	{ subx r15, r16, r17 ; st1 r25, r26 ; mulx r5, r6, r7 }
+	{ subx r15, r16, r17 ; st2 r25, r26 ; cmpeqi r5, r6, 5 }
+	{ subx r15, r16, r17 ; st2 r25, r26 ; shli r5, r6, 5 }
+	{ subx r15, r16, r17 ; st4 r25, r26 ; mul_lu_lu r5, r6, r7 }
+	{ subx r15, r16, r17 ; sub r5, r6, r7 ; ld2u r25, r26 }
+	{ subx r15, r16, r17 ; tblidxb0 r5, r6 ; ld4s r25, r26 }
+	{ subx r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch r25 }
+	{ subx r15, r16, r17 ; v1cmplts r5, r6, r7 }
+	{ subx r15, r16, r17 ; v2avgs r5, r6, r7 }
+	{ subx r15, r16, r17 ; v4addsc r5, r6, r7 }
+	{ subx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2 r25 }
+	{ subx r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ subx r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ subx r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ subx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ subx r5, r6, r7 ; cmplts r15, r16, r17 ; st1 r25, r26 }
+	{ subx r5, r6, r7 ; cmpltu r15, r16, r17 ; st4 r25, r26 }
+	{ subx r5, r6, r7 ; fnop ; ld1s r25, r26 }
+	{ subx r5, r6, r7 ; info 19 ; ld1u r25, r26 }
+	{ subx r5, r6, r7 ; jalrp r15 ; ld1s r25, r26 }
+	{ subx r5, r6, r7 ; jrp r15 ; ld2s r25, r26 }
+	{ subx r5, r6, r7 ; ld r25, r26 ; move r15, r16 }
+	{ subx r5, r6, r7 ; ld1s r25, r26 ; ill }
+	{ subx r5, r6, r7 ; ld1u r25, r26 ; cmpeq r15, r16, r17 }
+	{ subx r5, r6, r7 ; ld1u r25, r26 }
+	{ subx r5, r6, r7 ; ld2s r25, r26 ; shl3addx r15, r16, r17 }
+	{ subx r5, r6, r7 ; ld2u r25, r26 ; or r15, r16, r17 }
+	{ subx r5, r6, r7 ; ld4s r25, r26 ; jr r15 }
+	{ subx r5, r6, r7 ; ld4u r25, r26 ; cmplts r15, r16, r17 }
+	{ subx r5, r6, r7 ; ldna_add r15, r16, 5 }
+	{ subx r5, r6, r7 ; mnz r15, r16, r17 ; ld2u r25, r26 }
+	{ subx r5, r6, r7 ; movei r15, 5 ; ld4u r25, r26 }
+	{ subx r5, r6, r7 ; nop ; ld4u r25, r26 }
+	{ subx r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1 r25 }
+	{ subx r5, r6, r7 ; prefetch r25 ; nor r15, r16, r17 }
+	{ subx r5, r6, r7 ; prefetch_l1 r25 ; cmpne r15, r16, r17 }
+	{ subx r5, r6, r7 ; prefetch_l1_fault r25 ; andi r15, r16, 5 }
+	{ subx r5, r6, r7 ; prefetch_l1_fault r25 ; xor r15, r16, r17 }
+	{ subx r5, r6, r7 ; prefetch_l2 r25 ; shl3addx r15, r16, r17 }
+	{ subx r5, r6, r7 ; prefetch_l2_fault r25 ; rotl r15, r16, r17 }
+	{ subx r5, r6, r7 ; prefetch_l3 r25 ; lnk r15 }
+	{ subx r5, r6, r7 ; prefetch_l3_fault r25 ; cmpne r15, r16, r17 }
+	{ subx r5, r6, r7 ; rotl r15, r16, r17 ; ld4s r25, r26 }
+	{ subx r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+	{ subx r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1 r25 }
+	{ subx r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2 r25 }
+	{ subx r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3 r25 }
+	{ subx r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3 r25 }
+	{ subx r5, r6, r7 ; shru r15, r16, r17 ; st r25, r26 }
+	{ subx r5, r6, r7 ; st r25, r26 ; cmpne r15, r16, r17 }
+	{ subx r5, r6, r7 ; st1 r25, r26 ; andi r15, r16, 5 }
+	{ subx r5, r6, r7 ; st1 r25, r26 ; xor r15, r16, r17 }
+	{ subx r5, r6, r7 ; st2 r25, r26 ; shl3add r15, r16, r17 }
+	{ subx r5, r6, r7 ; st4 r25, r26 ; nor r15, r16, r17 }
+	{ subx r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2 r25 }
+	{ subx r5, r6, r7 ; v1cmpne r15, r16, r17 }
+	{ subx r5, r6, r7 ; v2shl r15, r16, r17 }
+	{ subx r5, r6, r7 ; xori r15, r16, 5 }
+	{ subxsc r15, r16, r17 ; fdouble_addsub r5, r6, r7 }
+	{ subxsc r15, r16, r17 ; mula_ls_lu r5, r6, r7 }
+	{ subxsc r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ subxsc r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ subxsc r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ subxsc r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ subxsc r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ subxsc r5, r6, r7 ; prefetch_l2 r15 }
+	{ subxsc r5, r6, r7 ; sub r15, r16, r17 }
+	{ subxsc r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ swint3 ; nop }
+	{ tblidxb0 r5, r6 ; addx r15, r16, r17 ; ld r25, r26 }
+	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 }
+	{ tblidxb0 r5, r6 ; cmpeq r15, r16, r17 ; ld1u r25, r26 }
+	{ tblidxb0 r5, r6 ; cmples r15, r16, r17 ; ld1u r25, r26 }
+	{ tblidxb0 r5, r6 ; cmplts r15, r16, r17 ; ld2u r25, r26 }
+	{ tblidxb0 r5, r6 ; cmpltu r15, r16, r17 ; ld4u r25, r26 }
+	{ tblidxb0 r5, r6 ; fetchadd4 r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; ill ; prefetch_l2 r25 }
+	{ tblidxb0 r5, r6 ; jalr r15 ; prefetch_l1_fault r25 }
+	{ tblidxb0 r5, r6 ; jr r15 ; prefetch_l2_fault r25 }
+	{ tblidxb0 r5, r6 ; ld r25, r26 ; cmpltu r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; ld1s r25, r26 ; and r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; ld1s r25, r26 ; subx r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; ld1u r25, r26 ; shl2addx r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; ld2s r25, r26 ; nop }
+	{ tblidxb0 r5, r6 ; ld2u r25, r26 ; jalr r15 }
+	{ tblidxb0 r5, r6 ; ld4s r25, r26 ; cmples r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; ld4u r15, r16 }
+	{ tblidxb0 r5, r6 ; ld4u r25, r26 ; shrs r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; lnk r15 ; st r25, r26 }
+	{ tblidxb0 r5, r6 ; move r15, r16 ; st r25, r26 }
+	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; st r25, r26 }
+	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; st2 r25, r26 }
+	{ tblidxb0 r5, r6 ; prefetch r25 ; info 19 }
+	{ tblidxb0 r5, r6 ; prefetch_l1 r25 ; addx r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; prefetch_l1 r25 ; shrui r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; prefetch_l1_fault r25 ; shl2add r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; prefetch_l2 r25 ; nop }
+	{ tblidxb0 r5, r6 ; prefetch_l2_fault r25 ; jalrp r15 }
+	{ tblidxb0 r5, r6 ; prefetch_l3 r25 ; cmplts r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; prefetch_l3_fault r25 ; addx r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; prefetch_l3_fault r25 ; shrui r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; rotli r15, r16, 5 ; st1 r25, r26 }
+	{ tblidxb0 r5, r6 ; shl1add r15, r16, r17 ; st2 r25, r26 }
+	{ tblidxb0 r5, r6 ; shl2add r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; shl3addx r15, r16, r17 ; ld1s r25, r26 }
+	{ tblidxb0 r5, r6 ; shrs r15, r16, r17 ; ld1s r25, r26 }
+	{ tblidxb0 r5, r6 ; shru r15, r16, r17 ; ld2s r25, r26 }
+	{ tblidxb0 r5, r6 ; st r25, r26 ; addx r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; st r25, r26 ; shrui r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; st1 r25, r26 ; shl2add r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; st2 r25, r26 ; mz r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; st4 r25, r26 ; info 19 }
+	{ tblidxb0 r5, r6 ; stnt_add r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; v1add r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; v2int_h r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; xor r15, r16, r17 ; prefetch_l1 r25 }
+	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 }
+	{ tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l2 r25 }
+	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; prefetch_l2 r25 }
+	{ tblidxb1 r5, r6 ; cmpeqi r15, r16, 5 ; prefetch_l3 r25 }
+	{ tblidxb1 r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l3 r25 }
+	{ tblidxb1 r5, r6 ; cmpltsi r15, r16, 5 ; st r25, r26 }
+	{ tblidxb1 r5, r6 ; cmpne r15, r16, r17 ; st1 r25, r26 }
+	{ tblidxb1 r5, r6 ; icoh r15 }
+	{ tblidxb1 r5, r6 ; inv r15 }
+	{ tblidxb1 r5, r6 ; jr r15 ; ld r25, r26 }
+	{ tblidxb1 r5, r6 ; ld r25, r26 ; addi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; ld r25, r26 ; shru r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; ld1s r25, r26 ; shl1addx r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; ld1u r25, r26 ; movei r15, 5 }
+	{ tblidxb1 r5, r6 ; ld2s r25, r26 ; ill }
+	{ tblidxb1 r5, r6 ; ld2u r25, r26 ; cmpeq r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; ld2u r25, r26 }
+	{ tblidxb1 r5, r6 ; ld4s r25, r26 ; shl3addx r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; ld4u r25, r26 ; or r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lnk r15 ; ld2s r25, r26 }
+	{ tblidxb1 r5, r6 ; move r15, r16 ; ld2s r25, r26 }
+	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; ld2s r25, r26 }
+	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; ld4s r25, r26 }
+	{ tblidxb1 r5, r6 ; prefetch r25 ; andi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; prefetch r25 ; xor r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; prefetch_l1 r25 ; shl r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; prefetch_l1_fault r25 ; move r15, r16 }
+	{ tblidxb1 r5, r6 ; prefetch_l2 r25 ; ill }
+	{ tblidxb1 r5, r6 ; prefetch_l2_fault r25 ; cmpeqi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; prefetch_l3 r15 }
+	{ tblidxb1 r5, r6 ; prefetch_l3 r25 ; shrs r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; prefetch_l3_fault r25 ; shl r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; rotli r15, r16, 5 ; ld2u r25, r26 }
+	{ tblidxb1 r5, r6 ; shl1add r15, r16, r17 ; ld4s r25, r26 }
+	{ tblidxb1 r5, r6 ; shl2add r15, r16, r17 ; prefetch r25 }
+	{ tblidxb1 r5, r6 ; shl3add r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ tblidxb1 r5, r6 ; shrsi r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ tblidxb1 r5, r6 ; shrui r15, r16, 5 ; prefetch_l3_fault r25 }
+	{ tblidxb1 r5, r6 ; st r25, r26 ; shl r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; st1 r25, r26 ; move r15, r16 }
+	{ tblidxb1 r5, r6 ; st2 r25, r26 ; fnop }
+	{ tblidxb1 r5, r6 ; st4 r25, r26 ; andi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; st4 r25, r26 ; xor r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; subx r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ tblidxb1 r5, r6 ; v2addi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; v4sub r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; add r15, r16, r17 ; st4 r25, r26 }
+	{ tblidxb2 r5, r6 ; addx r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; and r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; cmpeqi r15, r16, 5 ; ld1s r25, r26 }
+	{ tblidxb2 r5, r6 ; cmpleu r15, r16, r17 ; ld1s r25, r26 }
+	{ tblidxb2 r5, r6 ; cmpltsi r15, r16, 5 ; ld2s r25, r26 }
+	{ tblidxb2 r5, r6 ; cmpne r15, r16, r17 ; ld2u r25, r26 }
+	{ tblidxb2 r5, r6 ; fnop ; prefetch_l1 r25 }
+	{ tblidxb2 r5, r6 ; info 19 ; prefetch_l1_fault r25 }
+	{ tblidxb2 r5, r6 ; jalrp r15 ; prefetch_l1 r25 }
+	{ tblidxb2 r5, r6 ; jrp r15 ; prefetch_l2 r25 }
+	{ tblidxb2 r5, r6 ; ld r25, r26 ; rotli r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; ld1s r25, r26 ; mnz r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; ld1u r25, r26 ; cmpne r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; ld2s r25, r26 ; and r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; ld2s r25, r26 ; subx r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; ld2u r25, r26 ; shl2addx r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; ld4s r25, r26 ; nop }
+	{ tblidxb2 r5, r6 ; ld4u r25, r26 ; jalr r15 }
+	{ tblidxb2 r5, r6 ; ldnt2s_add r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ tblidxb2 r5, r6 ; movei r15, 5 ; prefetch_l3_fault r25 }
+	{ tblidxb2 r5, r6 ; nop ; prefetch_l3_fault r25 }
+	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; st1 r25, r26 }
+	{ tblidxb2 r5, r6 ; prefetch r25 ; shl2add r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; prefetch_l1 r25 ; jrp r15 }
+	{ tblidxb2 r5, r6 ; prefetch_l1_fault r25 ; cmpltu r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; prefetch_l2 r25 ; and r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; prefetch_l2 r25 ; subx r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; prefetch_l2_fault r25 ; shl3add r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; prefetch_l3 r25 ; or r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; prefetch_l3_fault r25 ; jrp r15 }
+	{ tblidxb2 r5, r6 ; rotl r15, r16, r17 ; prefetch_l3 r25 }
+	{ tblidxb2 r5, r6 ; shl r15, r16, r17 ; st r25, r26 }
+	{ tblidxb2 r5, r6 ; shl1addx r15, r16, r17 ; st1 r25, r26 }
+	{ tblidxb2 r5, r6 ; shl2addx r15, r16, r17 ; st4 r25, r26 }
+	{ tblidxb2 r5, r6 ; shli r15, r16, 5 ; ld r25, r26 }
+	{ tblidxb2 r5, r6 ; shrsi r15, r16, 5 ; ld r25, r26 }
+	{ tblidxb2 r5, r6 ; shrui r15, r16, 5 ; ld1u r25, r26 }
+	{ tblidxb2 r5, r6 ; st r25, r26 ; jrp r15 }
+	{ tblidxb2 r5, r6 ; st1 r25, r26 ; cmpltu r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; st2 r25, r26 ; addxi r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; st2 r25, r26 ; sub r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; st4 r25, r26 ; shl2add r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; sub r15, r16, r17 ; st4 r25, r26 }
+	{ tblidxb2 r5, r6 ; v1mnz r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; v2sub r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; ld4u r25, r26 }
+	{ tblidxb3 r5, r6 ; addx r15, r16, r17 ; prefetch r25 }
+	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+	{ tblidxb3 r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ tblidxb3 r5, r6 ; cmples r15, r16, r17 ; prefetch_l1_fault r25 }
+	{ tblidxb3 r5, r6 ; cmplts r15, r16, r17 ; prefetch_l2_fault r25 }
+	{ tblidxb3 r5, r6 ; cmpltu r15, r16, r17 ; prefetch_l3_fault r25 }
+	{ tblidxb3 r5, r6 ; finv r15 }
+	{ tblidxb3 r5, r6 ; ill ; st4 r25, r26 }
+	{ tblidxb3 r5, r6 ; jalr r15 ; st2 r25, r26 }
+	{ tblidxb3 r5, r6 ; jr r15 }
+	{ tblidxb3 r5, r6 ; ld r25, r26 ; jr r15 }
+	{ tblidxb3 r5, r6 ; ld1s r25, r26 ; cmpltsi r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; ld1u r25, r26 ; addx r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; ld1u r25, r26 ; shrui r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; ld2s r25, r26 ; shl1addx r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; ld2u r25, r26 ; movei r15, 5 }
+	{ tblidxb3 r5, r6 ; ld4s r25, r26 ; ill }
+	{ tblidxb3 r5, r6 ; ld4u r25, r26 ; cmpeq r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; ld4u r25, r26 }
+	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; ld r25, r26 }
+	{ tblidxb3 r5, r6 ; movei r15, 5 ; ld1u r25, r26 }
+	{ tblidxb3 r5, r6 ; nop ; ld1u r25, r26 }
+	{ tblidxb3 r5, r6 ; or r15, r16, r17 ; ld2u r25, r26 }
+	{ tblidxb3 r5, r6 ; prefetch r25 ; move r15, r16 }
+	{ tblidxb3 r5, r6 ; prefetch_l1 r25 ; cmpleu r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; prefetch_l1_fault r25 ; addi r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; prefetch_l1_fault r25 ; shru r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; prefetch_l2 r25 ; shl1addx r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; prefetch_l2_fault r25 ; mz r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; prefetch_l3 r25 ; jalr r15 }
+	{ tblidxb3 r5, r6 ; prefetch_l3_fault r25 ; cmpleu r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; rotl r15, r16, r17 ; ld1s r25, r26 }
+	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; ld2s r25, r26 }
+	{ tblidxb3 r5, r6 ; shl1addx r15, r16, r17 ; ld2u r25, r26 }
+	{ tblidxb3 r5, r6 ; shl2addx r15, r16, r17 ; ld4u r25, r26 }
+	{ tblidxb3 r5, r6 ; shl3addx r15, r16, r17 ; prefetch_l1 r25 }
+	{ tblidxb3 r5, r6 ; shrs r15, r16, r17 ; prefetch_l1 r25 }
+	{ tblidxb3 r5, r6 ; shru r15, r16, r17 ; prefetch_l2 r25 }
+	{ tblidxb3 r5, r6 ; st r25, r26 ; cmpleu r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; st1 r25, r26 ; addi r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; st1 r25, r26 ; shru r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; st2 r25, r26 ; shl1add r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; st4 r25, r26 ; move r15, r16 }
+	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; ld4u r25, r26 }
+	{ tblidxb3 r5, r6 ; v1cmplts r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; v2mz r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; st1 r25, r26 }
+	{ v1add r15, r16, r17 ; dblalign2 r5, r6, r7 }
+	{ v1add r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ v1add r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ v1add r15, r16, r17 ; v1shl r5, r6, r7 }
+	{ v1add r15, r16, r17 ; v2sads r5, r6, r7 }
+	{ v1add r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ v1add r5, r6, r7 ; ld2u_add r15, r16, 5 }
+	{ v1add r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+	{ v1add r5, r6, r7 ; stnt2_add r15, r16, 5 }
+	{ v1add r5, r6, r7 ; v2cmples r15, r16, r17 }
+	{ v1add r5, r6, r7 ; xori r15, r16, 5 }
+	{ v1addi r15, r16, 5 ; fdouble_addsub r5, r6, r7 }
+	{ v1addi r15, r16, 5 ; mula_ls_lu r5, r6, r7 }
+	{ v1addi r15, r16, 5 ; v1addi r5, r6, 5 }
+	{ v1addi r15, r16, 5 ; v1shru r5, r6, r7 }
+	{ v1addi r15, r16, 5 ; v2shlsc r5, r6, r7 }
+	{ v1addi r5, r6, 5 ; dblalign2 r15, r16, r17 }
+	{ v1addi r5, r6, 5 ; ld4u_add r15, r16, 5 }
+	{ v1addi r5, r6, 5 ; prefetch_l2 r15 }
+	{ v1addi r5, r6, 5 ; sub r15, r16, r17 }
+	{ v1addi r5, r6, 5 ; v2cmpltu r15, r16, r17 }
+	{ v1adduc r15, r16, r17 ; addx r5, r6, r7 }
+	{ v1adduc r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 }
+	{ v1adduc r15, r16, r17 ; mz r5, r6, r7 }
+	{ v1adduc r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ v1adduc r15, r16, r17 ; v2add r5, r6, r7 }
+	{ v1adduc r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ v1adduc r5, r6, r7 ; exch r15, r16, r17 }
+	{ v1adduc r5, r6, r7 ; ldnt r15, r16 }
+	{ v1adduc r5, r6, r7 ; raise }
+	{ v1adduc r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ v1adduc r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ v1adiffu r5, r6, r7 ; and r15, r16, r17 }
+	{ v1adiffu r5, r6, r7 ; jrp r15 }
+	{ v1adiffu r5, r6, r7 ; nop }
+	{ v1adiffu r5, r6, r7 ; st2 r15, r16 }
+	{ v1adiffu r5, r6, r7 ; v1shru r15, r16, r17 }
+	{ v1adiffu r5, r6, r7 ; v4packsc r15, r16, r17 }
+	{ v1avgu r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ v1avgu r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+	{ v1avgu r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ v1avgu r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ v1avgu r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ v1cmpeq r15, r16, r17 ; cmoveqz r5, r6, r7 }
+	{ v1cmpeq r15, r16, r17 ; fsingle_sub1 r5, r6, r7 }
+	{ v1cmpeq r15, r16, r17 ; shl r5, r6, r7 }
+	{ v1cmpeq r15, r16, r17 ; v1ddotpua r5, r6, r7 }
+	{ v1cmpeq r15, r16, r17 ; v2cmpltsi r5, r6, 5 }
+	{ v1cmpeq r15, r16, r17 ; v4shrs r5, r6, r7 }
+	{ v1cmpeq r5, r6, r7 ; finv r15 }
+	{ v1cmpeq r5, r6, r7 ; ldnt4s_add r15, r16, 5 }
+	{ v1cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 }
+	{ v1cmpeq r5, r6, r7 ; v1cmpne r15, r16, r17 }
+	{ v1cmpeq r5, r6, r7 ; v2shl r15, r16, r17 }
+	{ v1cmpeqi r15, r16, 5 ; cmples r5, r6, r7 }
+	{ v1cmpeqi r15, r16, 5 ; mnz r5, r6, r7 }
+	{ v1cmpeqi r15, r16, 5 ; shl2add r5, r6, r7 }
+	{ v1cmpeqi r15, r16, 5 ; v1dotpa r5, r6, r7 }
+	{ v1cmpeqi r15, r16, 5 ; v2dotp r5, r6, r7 }
+	{ v1cmpeqi r15, r16, 5 ; xor r5, r6, r7 }
+	{ v1cmpeqi r5, r6, 5 ; icoh r15 }
+	{ v1cmpeqi r5, r6, 5 ; lnk r15 }
+	{ v1cmpeqi r5, r6, 5 ; shrs r15, r16, r17 }
+	{ v1cmpeqi r5, r6, 5 ; v1maxui r15, r16, 5 }
+	{ v1cmpeqi r5, r6, 5 ; v2shrsi r15, r16, 5 }
+	{ v1cmples r15, r16, r17 ; cmpltu r5, r6, r7 }
+	{ v1cmples r15, r16, r17 ; mul_hs_hs r5, r6, r7 }
+	{ v1cmples r15, r16, r17 ; shli r5, r6, 5 }
+	{ v1cmples r15, r16, r17 ; v1dotpusa r5, r6, r7 }
+	{ v1cmples r15, r16, r17 ; v2maxs r5, r6, r7 }
+	{ v1cmples r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ v1cmples r5, r6, r7 ; inv r15 }
+	{ v1cmples r5, r6, r7 ; move r15, r16 }
+	{ v1cmples r5, r6, r7 ; shrux r15, r16, r17 }
+	{ v1cmples r5, r6, r7 ; v1mz r15, r16, r17 }
+	{ v1cmples r5, r6, r7 ; v2subsc r15, r16, r17 }
+	{ v1cmpleu r15, r16, r17 ; cmula r5, r6, r7 }
+	{ v1cmpleu r15, r16, r17 ; mul_hu_hu r5, r6, r7 }
+	{ v1cmpleu r15, r16, r17 ; shrsi r5, r6, 5 }
+	{ v1cmpleu r15, r16, r17 ; v1maxui r5, r6, 5 }
+	{ v1cmpleu r15, r16, r17 ; v2mnz r5, r6, r7 }
+	{ v1cmpleu r5, r6, r7 ; addxsc r15, r16, r17 }
+	{ v1cmpleu r5, r6, r7 ; jr r15 }
+	{ v1cmpleu r5, r6, r7 ; mz r15, r16, r17 }
+	{ v1cmpleu r5, r6, r7 ; st1_add r15, r16, 5 }
+	{ v1cmpleu r5, r6, r7 ; v1shrsi r15, r16, 5 }
+	{ v1cmpleu r5, r6, r7 ; v4int_l r15, r16, r17 }
+	{ v1cmplts r15, r16, r17 ; cmulh r5, r6, r7 }
+	{ v1cmplts r15, r16, r17 ; mul_ls_lu r5, r6, r7 }
+	{ v1cmplts r15, r16, r17 ; shruxi r5, r6, 5 }
+	{ v1cmplts r15, r16, r17 ; v1multu r5, r6, r7 }
+	{ v1cmplts r15, r16, r17 ; v2mz r5, r6, r7 }
+	{ v1cmplts r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ v1cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ v1cmplts r5, r6, r7 ; ori r15, r16, 5 }
+	{ v1cmplts r5, r6, r7 ; st4_add r15, r16, 5 }
+	{ v1cmplts r5, r6, r7 ; v1subuc r15, r16, r17 }
+	{ v1cmplts r5, r6, r7 ; v4shrs r15, r16, r17 }
+	{ v1cmpltsi r15, r16, 5 ; ctz r5, r6 }
+	{ v1cmpltsi r15, r16, 5 ; mula_hs_ls r5, r6, r7 }
+	{ v1cmpltsi r15, r16, 5 ; subxsc r5, r6, r7 }
+	{ v1cmpltsi r15, r16, 5 ; v1sadau r5, r6, r7 }
+	{ v1cmpltsi r15, r16, 5 ; v2sadas r5, r6, r7 }
+	{ v1cmpltsi r5, r6, 5 ; cmpleu r15, r16, r17 }
+	{ v1cmpltsi r5, r6, 5 ; ld2s_add r15, r16, 5 }
+	{ v1cmpltsi r5, r6, 5 ; prefetch_add_l2 r15, 5 }
+	{ v1cmpltsi r5, r6, 5 ; stnt1_add r15, r16, 5 }
+	{ v1cmpltsi r5, r6, 5 ; v2cmpeq r15, r16, r17 }
+	{ v1cmpltsi r5, r6, 5 ; wh64 r15 }
+	{ v1cmpltu r15, r16, r17 ; dblalign6 r5, r6, r7 }
+	{ v1cmpltu r15, r16, r17 ; mula_hu_lu r5, r6, r7 }
+	{ v1cmpltu r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ v1cmpltu r15, r16, r17 ; v1shrs r5, r6, r7 }
+	{ v1cmpltu r15, r16, r17 ; v2shl r5, r6, r7 }
+	{ v1cmpltu r5, r6, r7 ; cmpltui r15, r16, 5 }
+	{ v1cmpltu r5, r6, r7 ; ld4s_add r15, r16, 5 }
+	{ v1cmpltu r5, r6, r7 ; prefetch_l1 r15 }
+	{ v1cmpltu r5, r6, r7 ; stnt4_add r15, r16, 5 }
+	{ v1cmpltu r5, r6, r7 ; v2cmplts r15, r16, r17 }
+	{ v1cmpltui r15, r16, 5 ; addi r5, r6, 5 }
+	{ v1cmpltui r15, r16, 5 ; fdouble_pack1 r5, r6, r7 }
+	{ v1cmpltui r15, r16, 5 ; mulax r5, r6, r7 }
+	{ v1cmpltui r15, r16, 5 ; v1adiffu r5, r6, r7 }
+	{ v1cmpltui r15, r16, 5 ; v1sub r5, r6, r7 }
+	{ v1cmpltui r15, r16, 5 ; v2shrsi r5, r6, 5 }
+	{ v1cmpltui r5, r6, 5 ; dblalign6 r15, r16, r17 }
+	{ v1cmpltui r5, r6, 5 ; ldna r15, r16 }
+	{ v1cmpltui r5, r6, 5 ; prefetch_l3 r15 }
+	{ v1cmpltui r5, r6, 5 ; subxsc r15, r16, r17 }
+	{ v1cmpltui r5, r6, 5 ; v2cmpne r15, r16, r17 }
+	{ v1cmpne r15, r16, r17 ; addxli r5, r6, 0x1234 }
+	{ v1cmpne r15, r16, r17 ; fdouble_unpack_min r5, r6, r7 }
+	{ v1cmpne r15, r16, r17 ; nor r5, r6, r7 }
+	{ v1cmpne r15, r16, r17 ; v1cmples r5, r6, r7 }
+	{ v1cmpne r15, r16, r17 ; v2addsc r5, r6, r7 }
+	{ v1cmpne r15, r16, r17 ; v2subsc r5, r6, r7 }
+	{ v1cmpne r5, r6, r7 ; fetchadd r15, r16, r17 }
+	{ v1cmpne r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+	{ v1cmpne r5, r6, r7 ; rotli r15, r16, 5 }
+	{ v1cmpne r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ v1cmpne r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ v1ddotpu r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ v1ddotpu r5, r6, r7 ; ld1s r15, r16 }
+	{ v1ddotpu r5, r6, r7 ; or r15, r16, r17 }
+	{ v1ddotpu r5, r6, r7 ; st4 r15, r16 }
+	{ v1ddotpu r5, r6, r7 ; v1sub r15, r16, r17 }
+	{ v1ddotpu r5, r6, r7 ; v4shlsc r15, r16, r17 }
+	{ v1ddotpua r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ v1ddotpua r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+	{ v1ddotpua r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ v1ddotpua r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+	{ v1ddotpua r5, r6, r7 ; v2packl r15, r16, r17 }
+	{ v1ddotpus r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ v1ddotpus r5, r6, r7 ; ld2u r15, r16 }
+	{ v1ddotpus r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+	{ v1ddotpus r5, r6, r7 ; stnt2 r15, r16 }
+	{ v1ddotpus r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+	{ v1ddotpus r5, r6, r7 ; xor r15, r16, r17 }
+	{ v1ddotpusa r5, r6, r7 ; icoh r15 }
+	{ v1ddotpusa r5, r6, r7 ; lnk r15 }
+	{ v1ddotpusa r5, r6, r7 ; shrs r15, r16, r17 }
+	{ v1ddotpusa r5, r6, r7 ; v1maxui r15, r16, 5 }
+	{ v1ddotpusa r5, r6, r7 ; v2shrsi r15, r16, 5 }
+	{ v1dotp r5, r6, r7 ; dblalign4 r15, r16, r17 }
+	{ v1dotp r5, r6, r7 ; ld_add r15, r16, 5 }
+	{ v1dotp r5, r6, r7 ; prefetch_l2_fault r15 }
+	{ v1dotp r5, r6, r7 ; subx r15, r16, r17 }
+	{ v1dotp r5, r6, r7 ; v2cmpltui r15, r16, 5 }
+	{ v1dotpa r5, r6, r7 ; addxi r15, r16, 5 }
+	{ v1dotpa r5, r6, r7 ; jalr r15 }
+	{ v1dotpa r5, r6, r7 ; moveli r15, 0x1234 }
+	{ v1dotpa r5, r6, r7 ; st r15, r16 }
+	{ v1dotpa r5, r6, r7 ; v1shli r15, r16, 5 }
+	{ v1dotpa r5, r6, r7 ; v4addsc r15, r16, r17 }
+	{ v1dotpu r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+	{ v1dotpu r5, r6, r7 ; ldnt1u r15, r16 }
+	{ v1dotpu r5, r6, r7 ; shl r15, r16, r17 }
+	{ v1dotpu r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+	{ v1dotpu r5, r6, r7 ; v2mins r15, r16, r17 }
+	{ v1dotpua r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ v1dotpua r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ v1dotpua r5, r6, r7 ; ori r15, r16, 5 }
+	{ v1dotpua r5, r6, r7 ; st4_add r15, r16, 5 }
+	{ v1dotpua r5, r6, r7 ; v1subuc r15, r16, r17 }
+	{ v1dotpua r5, r6, r7 ; v4shrs r15, r16, r17 }
+	{ v1dotpus r5, r6, r7 ; fetchor4 r15, r16, r17 }
+	{ v1dotpus r5, r6, r7 ; ldnt4s r15, r16 }
+	{ v1dotpus r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ v1dotpus r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+	{ v1dotpus r5, r6, r7 ; v2packuc r15, r16, r17 }
+	{ v1dotpusa r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ v1dotpusa r5, r6, r7 ; ld2u_add r15, r16, 5 }
+	{ v1dotpusa r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+	{ v1dotpusa r5, r6, r7 ; stnt2_add r15, r16, 5 }
+	{ v1dotpusa r5, r6, r7 ; v2cmples r15, r16, r17 }
+	{ v1dotpusa r5, r6, r7 ; xori r15, r16, 5 }
+	{ v1int_h r15, r16, r17 ; fdouble_addsub r5, r6, r7 }
+	{ v1int_h r15, r16, r17 ; mula_ls_lu r5, r6, r7 }
+	{ v1int_h r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ v1int_h r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ v1int_h r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ v1int_h r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ v1int_h r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ v1int_h r5, r6, r7 ; prefetch_l2 r15 }
+	{ v1int_h r5, r6, r7 ; sub r15, r16, r17 }
+	{ v1int_h r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ v1int_l r15, r16, r17 ; addx r5, r6, r7 }
+	{ v1int_l r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 }
+	{ v1int_l r15, r16, r17 ; mz r5, r6, r7 }
+	{ v1int_l r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ v1int_l r15, r16, r17 ; v2add r5, r6, r7 }
+	{ v1int_l r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ v1int_l r5, r6, r7 ; exch r15, r16, r17 }
+	{ v1int_l r5, r6, r7 ; ldnt r15, r16 }
+	{ v1int_l r5, r6, r7 ; raise }
+	{ v1int_l r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ v1int_l r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ v1maxu r15, r16, r17 ; and r5, r6, r7 }
+	{ v1maxu r15, r16, r17 ; fsingle_add1 r5, r6, r7 }
+	{ v1maxu r15, r16, r17 ; ori r5, r6, 5 }
+	{ v1maxu r15, r16, r17 ; v1cmplts r5, r6, r7 }
+	{ v1maxu r15, r16, r17 ; v2avgs r5, r6, r7 }
+	{ v1maxu r15, r16, r17 ; v4addsc r5, r6, r7 }
+	{ v1maxu r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+	{ v1maxu r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+	{ v1maxu r5, r6, r7 ; shl16insli r15, r16, 0x1234 }
+	{ v1maxu r5, r6, r7 ; v1cmples r15, r16, r17 }
+	{ v1maxu r5, r6, r7 ; v2minsi r15, r16, 5 }
+	{ v1maxui r15, r16, 5 ; bfins r5, r6, 5, 7 }
+	{ v1maxui r15, r16, 5 ; fsingle_pack1 r5, r6 }
+	{ v1maxui r15, r16, 5 ; rotl r5, r6, r7 }
+	{ v1maxui r15, r16, 5 ; v1cmpne r5, r6, r7 }
+	{ v1maxui r15, r16, 5 ; v2cmpleu r5, r6, r7 }
+	{ v1maxui r15, r16, 5 ; v4shl r5, r6, r7 }
+	{ v1maxui r5, r6, 5 ; fetchor r15, r16, r17 }
+	{ v1maxui r5, r6, 5 ; ldnt2u_add r15, r16, 5 }
+	{ v1maxui r5, r6, 5 ; shl2addx r15, r16, r17 }
+	{ v1maxui r5, r6, 5 ; v1cmpltu r15, r16, r17 }
+	{ v1maxui r5, r6, 5 ; v2packl r15, r16, r17 }
+	{ v1minu r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ v1minu r15, r16, r17 ; infol 0x1234 }
+	{ v1minu r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ v1minu r15, r16, r17 ; v1ddotpusa r5, r6, r7 }
+	{ v1minu r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+	{ v1minu r15, r16, r17 ; v4sub r5, r6, r7 }
+	{ v1minu r5, r6, r7 ; flushwb }
+	{ v1minu r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+	{ v1minu r5, r6, r7 ; shlx r15, r16, r17 }
+	{ v1minu r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ v1minu r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ v1minui r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ v1minui r15, r16, 5 ; movei r5, 5 }
+	{ v1minui r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ v1minui r15, r16, 5 ; v1dotpua r5, r6, r7 }
+	{ v1minui r15, r16, 5 ; v2int_h r5, r6, r7 }
+	{ v1minui r5, r6, 5 ; add r15, r16, r17 }
+	{ v1minui r5, r6, 5 ; info 19 }
+	{ v1minui r5, r6, 5 ; mfspr r16, 0x5 }
+	{ v1minui r5, r6, 5 ; shru r15, r16, r17 }
+	{ v1minui r5, r6, 5 ; v1minui r15, r16, 5 }
+	{ v1minui r5, r6, 5 ; v2shrui r15, r16, 5 }
+	{ v1mnz r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ v1mnz r15, r16, r17 ; mul_hs_ls r5, r6, r7 }
+	{ v1mnz r15, r16, r17 ; shlxi r5, r6, 5 }
+	{ v1mnz r15, r16, r17 ; v1int_l r5, r6, r7 }
+	{ v1mnz r15, r16, r17 ; v2mins r5, r6, r7 }
+	{ v1mnz r5, r6, r7 ; addxi r15, r16, 5 }
+	{ v1mnz r5, r6, r7 ; jalr r15 }
+	{ v1mnz r5, r6, r7 ; moveli r15, 0x1234 }
+	{ v1mnz r5, r6, r7 ; st r15, r16 }
+	{ v1mnz r5, r6, r7 ; v1shli r15, r16, 5 }
+	{ v1mnz r5, r6, r7 ; v4addsc r15, r16, r17 }
+	{ v1multu r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+	{ v1multu r5, r6, r7 ; ldnt1u r15, r16 }
+	{ v1multu r5, r6, r7 ; shl r15, r16, r17 }
+	{ v1multu r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+	{ v1multu r5, r6, r7 ; v2mins r15, r16, r17 }
+	{ v1mulu r5, r6, r7 ; cmpeqi r15, r16, 5 }
+	{ v1mulu r5, r6, r7 ; ld1s_add r15, r16, 5 }
+	{ v1mulu r5, r6, r7 ; ori r15, r16, 5 }
+	{ v1mulu r5, r6, r7 ; st4_add r15, r16, 5 }
+	{ v1mulu r5, r6, r7 ; v1subuc r15, r16, r17 }
+	{ v1mulu r5, r6, r7 ; v4shrs r15, r16, r17 }
+	{ v1mulus r5, r6, r7 ; fetchor4 r15, r16, r17 }
+	{ v1mulus r5, r6, r7 ; ldnt4s r15, r16 }
+	{ v1mulus r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ v1mulus r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+	{ v1mulus r5, r6, r7 ; v2packuc r15, r16, r17 }
+	{ v1mz r15, r16, r17 ; cmpeqi r5, r6, 5 }
+	{ v1mz r15, r16, r17 ; mm r5, r6, 5, 7 }
+	{ v1mz r15, r16, r17 ; shl1addx r5, r6, r7 }
+	{ v1mz r15, r16, r17 ; v1dotp r5, r6, r7 }
+	{ v1mz r15, r16, r17 ; v2cmpne r5, r6, r7 }
+	{ v1mz r15, r16, r17 ; v4subsc r5, r6, r7 }
+	{ v1mz r5, r6, r7 ; fnop }
+	{ v1mz r5, r6, r7 ; ldnt_add r15, r16, 5 }
+	{ v1mz r5, r6, r7 ; shlxi r15, r16, 5 }
+	{ v1mz r5, r6, r7 ; v1maxu r15, r16, r17 }
+	{ v1mz r5, r6, r7 ; v2shrs r15, r16, r17 }
+	{ v1sadau r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ v1sadau r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ v1sadau r5, r6, r7 ; prefetch_l2 r15 }
+	{ v1sadau r5, r6, r7 ; sub r15, r16, r17 }
+	{ v1sadau r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ v1sadu r5, r6, r7 ; addx r15, r16, r17 }
+	{ v1sadu r5, r6, r7 ; iret }
+	{ v1sadu r5, r6, r7 ; movei r15, 5 }
+	{ v1sadu r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ v1sadu r5, r6, r7 ; v1shl r15, r16, r17 }
+	{ v1sadu r5, r6, r7 ; v4add r15, r16, r17 }
+	{ v1shl r15, r16, r17 ; cmulaf r5, r6, r7 }
+	{ v1shl r15, r16, r17 ; mul_hu_ls r5, r6, r7 }
+	{ v1shl r15, r16, r17 ; shru r5, r6, r7 }
+	{ v1shl r15, r16, r17 ; v1minu r5, r6, r7 }
+	{ v1shl r15, r16, r17 ; v2mulfsc r5, r6, r7 }
+	{ v1shl r5, r6, r7 ; and r15, r16, r17 }
+	{ v1shl r5, r6, r7 ; jrp r15 }
+	{ v1shl r5, r6, r7 ; nop }
+	{ v1shl r5, r6, r7 ; st2 r15, r16 }
+	{ v1shl r5, r6, r7 ; v1shru r15, r16, r17 }
+	{ v1shl r5, r6, r7 ; v4packsc r15, r16, r17 }
+	{ v1shli r15, r16, 5 ; cmulhr r5, r6, r7 }
+	{ v1shli r15, r16, 5 ; mul_lu_lu r5, r6, r7 }
+	{ v1shli r15, r16, 5 ; shufflebytes r5, r6, r7 }
+	{ v1shli r15, r16, 5 ; v1mulu r5, r6, r7 }
+	{ v1shli r15, r16, 5 ; v2packh r5, r6, r7 }
+	{ v1shli r5, r6, 5 ; cmpexch r15, r16, r17 }
+	{ v1shli r5, r6, 5 ; ld1u r15, r16 }
+	{ v1shli r5, r6, 5 ; prefetch r15 }
+	{ v1shli r5, r6, 5 ; st_add r15, r16, 5 }
+	{ v1shli r5, r6, 5 ; v2add r15, r16, r17 }
+	{ v1shli r5, r6, 5 ; v4shru r15, r16, r17 }
+	{ v1shrs r15, r16, r17 ; dblalign r5, r6, r7 }
+	{ v1shrs r15, r16, r17 ; mula_hs_lu r5, r6, r7 }
+	{ v1shrs r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ v1shrs r15, r16, r17 ; v1sadu r5, r6, r7 }
+	{ v1shrs r15, r16, r17 ; v2sadau r5, r6, r7 }
+	{ v1shrs r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ v1shrs r5, r6, r7 ; ld2u r15, r16 }
+	{ v1shrs r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+	{ v1shrs r5, r6, r7 ; stnt2 r15, r16 }
+	{ v1shrs r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+	{ v1shrs r5, r6, r7 ; xor r15, r16, r17 }
+	{ v1shrsi r15, r16, 5 ; fdouble_add_flags r5, r6, r7 }
+	{ v1shrsi r15, r16, 5 ; mula_ls_ls r5, r6, r7 }
+	{ v1shrsi r15, r16, 5 ; v1add r5, r6, r7 }
+	{ v1shrsi r15, r16, 5 ; v1shrsi r5, r6, 5 }
+	{ v1shrsi r15, r16, 5 ; v2shli r5, r6, 5 }
+	{ v1shrsi r5, r6, 5 ; cmpne r15, r16, r17 }
+	{ v1shrsi r5, r6, 5 ; ld4u r15, r16 }
+	{ v1shrsi r5, r6, 5 ; prefetch_l1_fault r15 }
+	{ v1shrsi r5, r6, 5 ; stnt_add r15, r16, 5 }
+	{ v1shrsi r5, r6, 5 ; v2cmpltsi r15, r16, 5 }
+	{ v1shru r15, r16, r17 ; addli r5, r6, 0x1234 }
+	{ v1shru r15, r16, r17 ; fdouble_pack2 r5, r6, r7 }
+	{ v1shru r15, r16, r17 ; mulx r5, r6, r7 }
+	{ v1shru r15, r16, r17 ; v1avgu r5, r6, r7 }
+	{ v1shru r15, r16, r17 ; v1subuc r5, r6, r7 }
+	{ v1shru r15, r16, r17 ; v2shru r5, r6, r7 }
+	{ v1shru r5, r6, r7 ; dtlbpr r15 }
+	{ v1shru r5, r6, r7 ; ldna_add r15, r16, 5 }
+	{ v1shru r5, r6, r7 ; prefetch_l3_fault r15 }
+	{ v1shru r5, r6, r7 ; v1add r15, r16, r17 }
+	{ v1shru r5, r6, r7 ; v2int_h r15, r16, r17 }
+	{ v1shrui r15, r16, 5 ; addxsc r5, r6, r7 }
+	{ v1shrui r15, r16, 5 ; fnop }
+	{ v1shrui r15, r16, 5 ; or r5, r6, r7 }
+	{ v1shrui r15, r16, 5 ; v1cmpleu r5, r6, r7 }
+	{ v1shrui r15, r16, 5 ; v2adiffs r5, r6, r7 }
+	{ v1shrui r15, r16, 5 ; v4add r5, r6, r7 }
+	{ v1shrui r5, r6, 5 ; fetchadd4 r15, r16, r17 }
+	{ v1shrui r5, r6, 5 ; ldnt1u r15, r16 }
+	{ v1shrui r5, r6, 5 ; shl r15, r16, r17 }
+	{ v1shrui r5, r6, 5 ; v1cmpeqi r15, r16, 5 }
+	{ v1shrui r5, r6, 5 ; v2mins r15, r16, r17 }
+	{ v1sub r15, r16, r17 ; bfextu r5, r6, 5, 7 }
+	{ v1sub r15, r16, r17 ; fsingle_mul2 r5, r6, r7 }
+	{ v1sub r15, r16, r17 ; revbytes r5, r6 }
+	{ v1sub r15, r16, r17 ; v1cmpltui r5, r6, 5 }
+	{ v1sub r15, r16, r17 ; v2cmples r5, r6, r7 }
+	{ v1sub r15, r16, r17 ; v4packsc r5, r6, r7 }
+	{ v1sub r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ v1sub r5, r6, r7 ; ldnt2u r15, r16 }
+	{ v1sub r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ v1sub r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+	{ v1sub r5, r6, r7 ; v2packh r15, r16, r17 }
+	{ v1subuc r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ v1subuc r15, r16, r17 ; info 19 }
+	{ v1subuc r15, r16, r17 ; shl16insli r5, r6, 0x1234 }
+	{ v1subuc r15, r16, r17 ; v1ddotpus r5, r6, r7 }
+	{ v1subuc r15, r16, r17 ; v2cmpltu r5, r6, r7 }
+	{ v1subuc r15, r16, r17 ; v4shru r5, r6, r7 }
+	{ v1subuc r5, r6, r7 ; flush r15 }
+	{ v1subuc r5, r6, r7 ; ldnt4u r15, r16 }
+	{ v1subuc r5, r6, r7 ; shli r15, r16, 5 }
+	{ v1subuc r5, r6, r7 ; v1int_h r15, r16, r17 }
+	{ v1subuc r5, r6, r7 ; v2shli r15, r16, 5 }
+	{ v2add r15, r16, r17 ; cmpleu r5, r6, r7 }
+	{ v2add r15, r16, r17 ; move r5, r6 }
+	{ v2add r15, r16, r17 ; shl2addx r5, r6, r7 }
+	{ v2add r15, r16, r17 ; v1dotpu r5, r6, r7 }
+	{ v2add r15, r16, r17 ; v2dotpa r5, r6, r7 }
+	{ v2add r15, r16, r17 ; xori r5, r6, 5 }
+	{ v2add r5, r6, r7 ; ill }
+	{ v2add r5, r6, r7 ; mf }
+	{ v2add r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ v2add r5, r6, r7 ; v1minu r15, r16, r17 }
+	{ v2add r5, r6, r7 ; v2shru r15, r16, r17 }
+	{ v2addi r15, r16, 5 ; cmpltui r5, r6, 5 }
+	{ v2addi r15, r16, 5 ; mul_hs_hu r5, r6, r7 }
+	{ v2addi r15, r16, 5 ; shlx r5, r6, r7 }
+	{ v2addi r15, r16, 5 ; v1int_h r5, r6, r7 }
+	{ v2addi r15, r16, 5 ; v2maxsi r5, r6, 5 }
+	{ v2addi r5, r6, 5 ; addx r15, r16, r17 }
+	{ v2addi r5, r6, 5 ; iret }
+	{ v2addi r5, r6, 5 ; movei r15, 5 }
+	{ v2addi r5, r6, 5 ; shruxi r15, r16, 5 }
+	{ v2addi r5, r6, 5 ; v1shl r15, r16, r17 }
+	{ v2addi r5, r6, 5 ; v4add r15, r16, r17 }
+	{ v2addsc r15, r16, r17 ; cmulaf r5, r6, r7 }
+	{ v2addsc r15, r16, r17 ; mul_hu_ls r5, r6, r7 }
+	{ v2addsc r15, r16, r17 ; shru r5, r6, r7 }
+	{ v2addsc r15, r16, r17 ; v1minu r5, r6, r7 }
+	{ v2addsc r15, r16, r17 ; v2mulfsc r5, r6, r7 }
+	{ v2addsc r5, r6, r7 ; and r15, r16, r17 }
+	{ v2addsc r5, r6, r7 ; jrp r15 }
+	{ v2addsc r5, r6, r7 ; nop }
+	{ v2addsc r5, r6, r7 ; st2 r15, r16 }
+	{ v2addsc r5, r6, r7 ; v1shru r15, r16, r17 }
+	{ v2addsc r5, r6, r7 ; v4packsc r15, r16, r17 }
+	{ v2adiffs r5, r6, r7 ; fetchand r15, r16, r17 }
+	{ v2adiffs r5, r6, r7 ; ldnt2s_add r15, r16, 5 }
+	{ v2adiffs r5, r6, r7 ; shl1addx r15, r16, r17 }
+	{ v2adiffs r5, r6, r7 ; v1cmplts r15, r16, r17 }
+	{ v2adiffs r5, r6, r7 ; v2mz r15, r16, r17 }
+	{ v2avgs r5, r6, r7 ; cmples r15, r16, r17 }
+	{ v2avgs r5, r6, r7 ; ld2s r15, r16 }
+	{ v2avgs r5, r6, r7 ; prefetch_add_l1_fault r15, 5 }
+	{ v2avgs r5, r6, r7 ; stnt1 r15, r16 }
+	{ v2avgs r5, r6, r7 ; v2addsc r15, r16, r17 }
+	{ v2avgs r5, r6, r7 ; v4subsc r15, r16, r17 }
+	{ v2cmpeq r15, r16, r17 ; dblalign4 r5, r6, r7 }
+	{ v2cmpeq r15, r16, r17 ; mula_hu_ls r5, r6, r7 }
+	{ v2cmpeq r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ v2cmpeq r15, r16, r17 ; v1shli r5, r6, 5 }
+	{ v2cmpeq r15, r16, r17 ; v2sadu r5, r6, r7 }
+	{ v2cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 }
+	{ v2cmpeq r5, r6, r7 ; ld4s r15, r16 }
+	{ v2cmpeq r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ v2cmpeq r5, r6, r7 ; stnt4 r15, r16 }
+	{ v2cmpeq r5, r6, r7 ; v2cmpleu r15, r16, r17 }
+	{ v2cmpeqi r15, r16, 5 ; add r5, r6, r7 }
+	{ v2cmpeqi r15, r16, 5 ; fdouble_mul_flags r5, r6, r7 }
+	{ v2cmpeqi r15, r16, 5 ; mula_lu_lu r5, r6, r7 }
+	{ v2cmpeqi r15, r16, 5 ; v1adduc r5, r6, r7 }
+	{ v2cmpeqi r15, r16, 5 ; v1shrui r5, r6, 5 }
+	{ v2cmpeqi r15, r16, 5 ; v2shrs r5, r6, r7 }
+	{ v2cmpeqi r5, r6, 5 ; dblalign4 r15, r16, r17 }
+	{ v2cmpeqi r5, r6, 5 ; ld_add r15, r16, 5 }
+	{ v2cmpeqi r5, r6, 5 ; prefetch_l2_fault r15 }
+	{ v2cmpeqi r5, r6, 5 ; subx r15, r16, r17 }
+	{ v2cmpeqi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
+	{ v2cmples r15, r16, r17 ; addxi r5, r6, 5 }
+	{ v2cmples r15, r16, r17 ; fdouble_unpack_max r5, r6, r7 }
+	{ v2cmples r15, r16, r17 ; nop }
+	{ v2cmples r15, r16, r17 ; v1cmpeqi r5, r6, 5 }
+	{ v2cmples r15, r16, r17 ; v2addi r5, r6, 5 }
+	{ v2cmples r15, r16, r17 ; v2sub r5, r6, r7 }
+	{ v2cmples r5, r6, r7 ; exch4 r15, r16, r17 }
+	{ v2cmples r5, r6, r7 ; ldnt1s r15, r16 }
+	{ v2cmples r5, r6, r7 ; rotl r15, r16, r17 }
+	{ v2cmples r5, r6, r7 ; v1adduc r15, r16, r17 }
+	{ v2cmples r5, r6, r7 ; v2maxs r15, r16, r17 }
+	{ v2cmpleu r15, r16, r17 ; andi r5, r6, 5 }
+	{ v2cmpleu r15, r16, r17 ; fsingle_addsub2 r5, r6, r7 }
+	{ v2cmpleu r15, r16, r17 ; pcnt r5, r6 }
+	{ v2cmpleu r15, r16, r17 ; v1cmpltsi r5, r6, 5 }
+	{ v2cmpleu r15, r16, r17 ; v2cmpeq r5, r6, r7 }
+	{ v2cmpleu r15, r16, r17 ; v4int_h r5, r6, r7 }
+	{ v2cmpleu r5, r6, r7 ; fetchaddgez4 r15, r16, r17 }
+	{ v2cmpleu r5, r6, r7 ; ldnt2s r15, r16 }
+	{ v2cmpleu r5, r6, r7 ; shl1add r15, r16, r17 }
+	{ v2cmpleu r5, r6, r7 ; v1cmpleu r15, r16, r17 }
+	{ v2cmpleu r5, r6, r7 ; v2mnz r15, r16, r17 }
+	{ v2cmplts r15, r16, r17 ; clz r5, r6 }
+	{ v2cmplts r15, r16, r17 ; fsingle_pack2 r5, r6, r7 }
+	{ v2cmplts r15, r16, r17 ; rotli r5, r6, 5 }
+	{ v2cmplts r15, r16, r17 ; v1ddotpu r5, r6, r7 }
+	{ v2cmplts r15, r16, r17 ; v2cmplts r5, r6, r7 }
+	{ v2cmplts r15, r16, r17 ; v4shlsc r5, r6, r7 }
+	{ v2cmplts r5, r6, r7 ; fetchor4 r15, r16, r17 }
+	{ v2cmplts r5, r6, r7 ; ldnt4s r15, r16 }
+	{ v2cmplts r5, r6, r7 ; shl3add r15, r16, r17 }
+	{ v2cmplts r5, r6, r7 ; v1cmpltui r15, r16, 5 }
+	{ v2cmplts r5, r6, r7 ; v2packuc r15, r16, r17 }
+	{ v2cmpltsi r15, r16, 5 ; cmpeqi r5, r6, 5 }
+	{ v2cmpltsi r15, r16, 5 ; mm r5, r6, 5, 7 }
+	{ v2cmpltsi r15, r16, 5 ; shl1addx r5, r6, r7 }
+	{ v2cmpltsi r15, r16, 5 ; v1dotp r5, r6, r7 }
+	{ v2cmpltsi r15, r16, 5 ; v2cmpne r5, r6, r7 }
+	{ v2cmpltsi r15, r16, 5 ; v4subsc r5, r6, r7 }
+	{ v2cmpltsi r5, r6, 5 ; fnop }
+	{ v2cmpltsi r5, r6, 5 ; ldnt_add r15, r16, 5 }
+	{ v2cmpltsi r5, r6, 5 ; shlxi r15, r16, 5 }
+	{ v2cmpltsi r5, r6, 5 ; v1maxu r15, r16, r17 }
+	{ v2cmpltsi r5, r6, 5 ; v2shrs r15, r16, r17 }
+	{ v2cmpltu r15, r16, r17 ; cmpltsi r5, r6, 5 }
+	{ v2cmpltu r15, r16, r17 ; moveli r5, 0x1234 }
+	{ v2cmpltu r15, r16, r17 ; shl3addx r5, r6, r7 }
+	{ v2cmpltu r15, r16, r17 ; v1dotpus r5, r6, r7 }
+	{ v2cmpltu r15, r16, r17 ; v2int_l r5, r6, r7 }
+	{ v2cmpltu r5, r6, r7 ; addi r15, r16, 5 }
+	{ v2cmpltu r5, r6, r7 ; infol 0x1234 }
+	{ v2cmpltu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ v2cmpltu r5, r6, r7 ; shrui r15, r16, 5 }
+	{ v2cmpltu r5, r6, r7 ; v1mnz r15, r16, r17 }
+	{ v2cmpltu r5, r6, r7 ; v2sub r15, r16, r17 }
+	{ v2cmpltui r15, r16, 5 ; cmul r5, r6, r7 }
+	{ v2cmpltui r15, r16, 5 ; mul_hs_lu r5, r6, r7 }
+	{ v2cmpltui r15, r16, 5 ; shrs r5, r6, r7 }
+	{ v2cmpltui r15, r16, 5 ; v1maxu r5, r6, r7 }
+	{ v2cmpltui r15, r16, 5 ; v2minsi r5, r6, 5 }
+	{ v2cmpltui r5, r6, 5 ; addxli r15, r16, 0x1234 }
+	{ v2cmpltui r5, r6, 5 ; jalrp r15 }
+	{ v2cmpltui r5, r6, 5 ; mtspr 0x5, r16 }
+	{ v2cmpltui r5, r6, 5 ; st1 r15, r16 }
+	{ v2cmpltui r5, r6, 5 ; v1shrs r15, r16, r17 }
+	{ v2cmpltui r5, r6, 5 ; v4int_h r15, r16, r17 }
+	{ v2cmpne r15, r16, r17 ; cmulfr r5, r6, r7 }
+	{ v2cmpne r15, r16, r17 ; mul_ls_ls r5, r6, r7 }
+	{ v2cmpne r15, r16, r17 ; shrux r5, r6, r7 }
+	{ v2cmpne r15, r16, r17 ; v1mnz r5, r6, r7 }
+	{ v2cmpne r15, r16, r17 ; v2mults r5, r6, r7 }
+	{ v2cmpne r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ v2cmpne r5, r6, r7 ; ld1s r15, r16 }
+	{ v2cmpne r5, r6, r7 ; or r15, r16, r17 }
+	{ v2cmpne r5, r6, r7 ; st4 r15, r16 }
+	{ v2cmpne r5, r6, r7 ; v1sub r15, r16, r17 }
+	{ v2cmpne r5, r6, r7 ; v4shlsc r15, r16, r17 }
+	{ v2dotp r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ v2dotp r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+	{ v2dotp r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ v2dotp r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+	{ v2dotp r5, r6, r7 ; v2packl r15, r16, r17 }
+	{ v2dotpa r5, r6, r7 ; cmplts r15, r16, r17 }
+	{ v2dotpa r5, r6, r7 ; ld2u r15, r16 }
+	{ v2dotpa r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
+	{ v2dotpa r5, r6, r7 ; stnt2 r15, r16 }
+	{ v2dotpa r5, r6, r7 ; v2cmpeqi r15, r16, 5 }
+	{ v2dotpa r5, r6, r7 ; xor r15, r16, r17 }
+	{ v2int_h r15, r16, r17 ; fdouble_add_flags r5, r6, r7 }
+	{ v2int_h r15, r16, r17 ; mula_ls_ls r5, r6, r7 }
+	{ v2int_h r15, r16, r17 ; v1add r5, r6, r7 }
+	{ v2int_h r15, r16, r17 ; v1shrsi r5, r6, 5 }
+	{ v2int_h r15, r16, r17 ; v2shli r5, r6, 5 }
+	{ v2int_h r5, r6, r7 ; cmpne r15, r16, r17 }
+	{ v2int_h r5, r6, r7 ; ld4u r15, r16 }
+	{ v2int_h r5, r6, r7 ; prefetch_l1_fault r15 }
+	{ v2int_h r5, r6, r7 ; stnt_add r15, r16, 5 }
+	{ v2int_h r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ v2int_l r15, r16, r17 ; addli r5, r6, 0x1234 }
+	{ v2int_l r15, r16, r17 ; fdouble_pack2 r5, r6, r7 }
+	{ v2int_l r15, r16, r17 ; mulx r5, r6, r7 }
+	{ v2int_l r15, r16, r17 ; v1avgu r5, r6, r7 }
+	{ v2int_l r15, r16, r17 ; v1subuc r5, r6, r7 }
+	{ v2int_l r15, r16, r17 ; v2shru r5, r6, r7 }
+	{ v2int_l r5, r6, r7 ; dtlbpr r15 }
+	{ v2int_l r5, r6, r7 ; ldna_add r15, r16, 5 }
+	{ v2int_l r5, r6, r7 ; prefetch_l3_fault r15 }
+	{ v2int_l r5, r6, r7 ; v1add r15, r16, r17 }
+	{ v2int_l r5, r6, r7 ; v2int_h r15, r16, r17 }
+	{ v2maxs r15, r16, r17 ; addxsc r5, r6, r7 }
+	{ v2maxs r15, r16, r17 ; fnop }
+	{ v2maxs r15, r16, r17 ; or r5, r6, r7 }
+	{ v2maxs r15, r16, r17 ; v1cmpleu r5, r6, r7 }
+	{ v2maxs r15, r16, r17 ; v2adiffs r5, r6, r7 }
+	{ v2maxs r15, r16, r17 ; v4add r5, r6, r7 }
+	{ v2maxs r5, r6, r7 ; fetchadd4 r15, r16, r17 }
+	{ v2maxs r5, r6, r7 ; ldnt1u r15, r16 }
+	{ v2maxs r5, r6, r7 ; shl r15, r16, r17 }
+	{ v2maxs r5, r6, r7 ; v1cmpeqi r15, r16, 5 }
+	{ v2maxs r5, r6, r7 ; v2mins r15, r16, r17 }
+	{ v2maxsi r15, r16, 5 ; bfextu r5, r6, 5, 7 }
+	{ v2maxsi r15, r16, 5 ; fsingle_mul2 r5, r6, r7 }
+	{ v2maxsi r15, r16, 5 ; revbytes r5, r6 }
+	{ v2maxsi r15, r16, 5 ; v1cmpltui r5, r6, 5 }
+	{ v2maxsi r15, r16, 5 ; v2cmples r5, r6, r7 }
+	{ v2maxsi r15, r16, 5 ; v4packsc r5, r6, r7 }
+	{ v2maxsi r5, r6, 5 ; fetchand4 r15, r16, r17 }
+	{ v2maxsi r5, r6, 5 ; ldnt2u r15, r16 }
+	{ v2maxsi r5, r6, 5 ; shl2add r15, r16, r17 }
+	{ v2maxsi r5, r6, 5 ; v1cmpltsi r15, r16, 5 }
+	{ v2maxsi r5, r6, 5 ; v2packh r15, r16, r17 }
+	{ v2mins r15, r16, r17 ; cmovnez r5, r6, r7 }
+	{ v2mins r15, r16, r17 ; info 19 }
+	{ v2mins r15, r16, r17 ; shl16insli r5, r6, 0x1234 }
+	{ v2mins r15, r16, r17 ; v1ddotpus r5, r6, r7 }
+	{ v2mins r15, r16, r17 ; v2cmpltu r5, r6, r7 }
+	{ v2mins r15, r16, r17 ; v4shru r5, r6, r7 }
+	{ v2mins r5, r6, r7 ; flush r15 }
+	{ v2mins r5, r6, r7 ; ldnt4u r15, r16 }
+	{ v2mins r5, r6, r7 ; shli r15, r16, 5 }
+	{ v2mins r5, r6, r7 ; v1int_h r15, r16, r17 }
+	{ v2mins r5, r6, r7 ; v2shli r15, r16, 5 }
+	{ v2minsi r15, r16, 5 ; cmpleu r5, r6, r7 }
+	{ v2minsi r15, r16, 5 ; move r5, r6 }
+	{ v2minsi r15, r16, 5 ; shl2addx r5, r6, r7 }
+	{ v2minsi r15, r16, 5 ; v1dotpu r5, r6, r7 }
+	{ v2minsi r15, r16, 5 ; v2dotpa r5, r6, r7 }
+	{ v2minsi r15, r16, 5 ; xori r5, r6, 5 }
+	{ v2minsi r5, r6, 5 ; ill }
+	{ v2minsi r5, r6, 5 ; mf }
+	{ v2minsi r5, r6, 5 ; shrsi r15, r16, 5 }
+	{ v2minsi r5, r6, 5 ; v1minu r15, r16, r17 }
+	{ v2minsi r5, r6, 5 ; v2shru r15, r16, r17 }
+	{ v2mnz r15, r16, r17 ; cmpltui r5, r6, 5 }
+	{ v2mnz r15, r16, r17 ; mul_hs_hu r5, r6, r7 }
+	{ v2mnz r15, r16, r17 ; shlx r5, r6, r7 }
+	{ v2mnz r15, r16, r17 ; v1int_h r5, r6, r7 }
+	{ v2mnz r15, r16, r17 ; v2maxsi r5, r6, 5 }
+	{ v2mnz r5, r6, r7 ; addx r15, r16, r17 }
+	{ v2mnz r5, r6, r7 ; iret }
+	{ v2mnz r5, r6, r7 ; movei r15, 5 }
+	{ v2mnz r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ v2mnz r5, r6, r7 ; v1shl r15, r16, r17 }
+	{ v2mnz r5, r6, r7 ; v4add r15, r16, r17 }
+	{ v2mulfsc r5, r6, r7 ; fetchadd r15, r16, r17 }
+	{ v2mulfsc r5, r6, r7 ; ldnt1s_add r15, r16, 5 }
+	{ v2mulfsc r5, r6, r7 ; rotli r15, r16, 5 }
+	{ v2mulfsc r5, r6, r7 ; v1cmpeq r15, r16, r17 }
+	{ v2mulfsc r5, r6, r7 ; v2maxsi r15, r16, 5 }
+	{ v2muls r5, r6, r7 ; cmpeq r15, r16, r17 }
+	{ v2muls r5, r6, r7 ; ld1s r15, r16 }
+	{ v2muls r5, r6, r7 ; or r15, r16, r17 }
+	{ v2muls r5, r6, r7 ; st4 r15, r16 }
+	{ v2muls r5, r6, r7 ; v1sub r15, r16, r17 }
+	{ v2muls r5, r6, r7 ; v4shlsc r15, r16, r17 }
+	{ v2mults r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ v2mults r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+	{ v2mults r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ v2mults r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+	{ v2mults r5, r6, r7 ; v2packl r15, r16, r17 }
+	{ v2mz r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ v2mz r15, r16, r17 ; infol 0x1234 }
+	{ v2mz r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ v2mz r15, r16, r17 ; v1ddotpusa r5, r6, r7 }
+	{ v2mz r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+	{ v2mz r15, r16, r17 ; v4sub r5, r6, r7 }
+	{ v2mz r5, r6, r7 ; flushwb }
+	{ v2mz r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+	{ v2mz r5, r6, r7 ; shlx r15, r16, r17 }
+	{ v2mz r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ v2mz r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ v2packh r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ v2packh r15, r16, r17 ; movei r5, 5 }
+	{ v2packh r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ v2packh r15, r16, r17 ; v1dotpua r5, r6, r7 }
+	{ v2packh r15, r16, r17 ; v2int_h r5, r6, r7 }
+	{ v2packh r5, r6, r7 ; add r15, r16, r17 }
+	{ v2packh r5, r6, r7 ; info 19 }
+	{ v2packh r5, r6, r7 ; mfspr r16, 0x5 }
+	{ v2packh r5, r6, r7 ; shru r15, r16, r17 }
+	{ v2packh r5, r6, r7 ; v1minui r15, r16, 5 }
+	{ v2packh r5, r6, r7 ; v2shrui r15, r16, 5 }
+	{ v2packl r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ v2packl r15, r16, r17 ; mul_hs_ls r5, r6, r7 }
+	{ v2packl r15, r16, r17 ; shlxi r5, r6, 5 }
+	{ v2packl r15, r16, r17 ; v1int_l r5, r6, r7 }
+	{ v2packl r15, r16, r17 ; v2mins r5, r6, r7 }
+	{ v2packl r5, r6, r7 ; addxi r15, r16, 5 }
+	{ v2packl r5, r6, r7 ; jalr r15 }
+	{ v2packl r5, r6, r7 ; moveli r15, 0x1234 }
+	{ v2packl r5, r6, r7 ; st r15, r16 }
+	{ v2packl r5, r6, r7 ; v1shli r15, r16, 5 }
+	{ v2packl r5, r6, r7 ; v4addsc r15, r16, r17 }
+	{ v2packuc r15, r16, r17 ; cmulf r5, r6, r7 }
+	{ v2packuc r15, r16, r17 ; mul_hu_lu r5, r6, r7 }
+	{ v2packuc r15, r16, r17 ; shrui r5, r6, 5 }
+	{ v2packuc r15, r16, r17 ; v1minui r5, r6, 5 }
+	{ v2packuc r15, r16, r17 ; v2muls r5, r6, r7 }
+	{ v2packuc r5, r6, r7 ; andi r15, r16, 5 }
+	{ v2packuc r5, r6, r7 ; ld r15, r16 }
+	{ v2packuc r5, r6, r7 ; nor r15, r16, r17 }
+	{ v2packuc r5, r6, r7 ; st2_add r15, r16, 5 }
+	{ v2packuc r5, r6, r7 ; v1shrui r15, r16, 5 }
+	{ v2packuc r5, r6, r7 ; v4shl r15, r16, r17 }
+	{ v2sadas r5, r6, r7 ; fetchand4 r15, r16, r17 }
+	{ v2sadas r5, r6, r7 ; ldnt2u r15, r16 }
+	{ v2sadas r5, r6, r7 ; shl2add r15, r16, r17 }
+	{ v2sadas r5, r6, r7 ; v1cmpltsi r15, r16, 5 }
+	{ v2sadas r5, r6, r7 ; v2packh r15, r16, r17 }
+	{ v2sadau r5, r6, r7 ; cmpleu r15, r16, r17 }
+	{ v2sadau r5, r6, r7 ; ld2s_add r15, r16, 5 }
+	{ v2sadau r5, r6, r7 ; prefetch_add_l2 r15, 5 }
+	{ v2sadau r5, r6, r7 ; stnt1_add r15, r16, 5 }
+	{ v2sadau r5, r6, r7 ; v2cmpeq r15, r16, r17 }
+	{ v2sadau r5, r6, r7 ; wh64 r15 }
+	{ v2sads r5, r6, r7 ; fnop }
+	{ v2sads r5, r6, r7 ; ldnt_add r15, r16, 5 }
+	{ v2sads r5, r6, r7 ; shlxi r15, r16, 5 }
+	{ v2sads r5, r6, r7 ; v1maxu r15, r16, r17 }
+	{ v2sads r5, r6, r7 ; v2shrs r15, r16, r17 }
+	{ v2sadu r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ v2sadu r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ v2sadu r5, r6, r7 ; prefetch_l2 r15 }
+	{ v2sadu r5, r6, r7 ; sub r15, r16, r17 }
+	{ v2sadu r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ v2shl r15, r16, r17 ; addx r5, r6, r7 }
+	{ v2shl r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 }
+	{ v2shl r15, r16, r17 ; mz r5, r6, r7 }
+	{ v2shl r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ v2shl r15, r16, r17 ; v2add r5, r6, r7 }
+	{ v2shl r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ v2shl r5, r6, r7 ; exch r15, r16, r17 }
+	{ v2shl r5, r6, r7 ; ldnt r15, r16 }
+	{ v2shl r5, r6, r7 ; raise }
+	{ v2shl r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ v2shl r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ v2shli r15, r16, 5 ; and r5, r6, r7 }
+	{ v2shli r15, r16, 5 ; fsingle_add1 r5, r6, r7 }
+	{ v2shli r15, r16, 5 ; ori r5, r6, 5 }
+	{ v2shli r15, r16, 5 ; v1cmplts r5, r6, r7 }
+	{ v2shli r15, r16, 5 ; v2avgs r5, r6, r7 }
+	{ v2shli r15, r16, 5 ; v4addsc r5, r6, r7 }
+	{ v2shli r5, r6, 5 ; fetchaddgez r15, r16, r17 }
+	{ v2shli r5, r6, 5 ; ldnt1u_add r15, r16, 5 }
+	{ v2shli r5, r6, 5 ; shl16insli r15, r16, 0x1234 }
+	{ v2shli r5, r6, 5 ; v1cmples r15, r16, r17 }
+	{ v2shli r5, r6, 5 ; v2minsi r15, r16, 5 }
+	{ v2shlsc r15, r16, r17 ; bfins r5, r6, 5, 7 }
+	{ v2shlsc r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ v2shlsc r15, r16, r17 ; rotl r5, r6, r7 }
+	{ v2shlsc r15, r16, r17 ; v1cmpne r5, r6, r7 }
+	{ v2shlsc r15, r16, r17 ; v2cmpleu r5, r6, r7 }
+	{ v2shlsc r15, r16, r17 ; v4shl r5, r6, r7 }
+	{ v2shlsc r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ v2shlsc r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+	{ v2shlsc r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ v2shlsc r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+	{ v2shlsc r5, r6, r7 ; v2packl r15, r16, r17 }
+	{ v2shrs r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ v2shrs r15, r16, r17 ; infol 0x1234 }
+	{ v2shrs r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ v2shrs r15, r16, r17 ; v1ddotpusa r5, r6, r7 }
+	{ v2shrs r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+	{ v2shrs r15, r16, r17 ; v4sub r5, r6, r7 }
+	{ v2shrs r5, r6, r7 ; flushwb }
+	{ v2shrs r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+	{ v2shrs r5, r6, r7 ; shlx r15, r16, r17 }
+	{ v2shrs r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ v2shrs r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ v2shrsi r15, r16, 5 ; cmplts r5, r6, r7 }
+	{ v2shrsi r15, r16, 5 ; movei r5, 5 }
+	{ v2shrsi r15, r16, 5 ; shl3add r5, r6, r7 }
+	{ v2shrsi r15, r16, 5 ; v1dotpua r5, r6, r7 }
+	{ v2shrsi r15, r16, 5 ; v2int_h r5, r6, r7 }
+	{ v2shrsi r5, r6, 5 ; add r15, r16, r17 }
+	{ v2shrsi r5, r6, 5 ; info 19 }
+	{ v2shrsi r5, r6, 5 ; mfspr r16, 0x5 }
+	{ v2shrsi r5, r6, 5 ; shru r15, r16, r17 }
+	{ v2shrsi r5, r6, 5 ; v1minui r15, r16, 5 }
+	{ v2shrsi r5, r6, 5 ; v2shrui r15, r16, 5 }
+	{ v2shru r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ v2shru r15, r16, r17 ; mul_hs_ls r5, r6, r7 }
+	{ v2shru r15, r16, r17 ; shlxi r5, r6, 5 }
+	{ v2shru r15, r16, r17 ; v1int_l r5, r6, r7 }
+	{ v2shru r15, r16, r17 ; v2mins r5, r6, r7 }
+	{ v2shru r5, r6, r7 ; addxi r15, r16, 5 }
+	{ v2shru r5, r6, r7 ; jalr r15 }
+	{ v2shru r5, r6, r7 ; moveli r15, 0x1234 }
+	{ v2shru r5, r6, r7 ; st r15, r16 }
+	{ v2shru r5, r6, r7 ; v1shli r15, r16, 5 }
+	{ v2shru r5, r6, r7 ; v4addsc r15, r16, r17 }
+	{ v2shrui r15, r16, 5 ; cmulf r5, r6, r7 }
+	{ v2shrui r15, r16, 5 ; mul_hu_lu r5, r6, r7 }
+	{ v2shrui r15, r16, 5 ; shrui r5, r6, 5 }
+	{ v2shrui r15, r16, 5 ; v1minui r5, r6, 5 }
+	{ v2shrui r15, r16, 5 ; v2muls r5, r6, r7 }
+	{ v2shrui r5, r6, 5 ; andi r15, r16, 5 }
+	{ v2shrui r5, r6, 5 ; ld r15, r16 }
+	{ v2shrui r5, r6, 5 ; nor r15, r16, r17 }
+	{ v2shrui r5, r6, 5 ; st2_add r15, r16, 5 }
+	{ v2shrui r5, r6, 5 ; v1shrui r15, r16, 5 }
+	{ v2shrui r5, r6, 5 ; v4shl r15, r16, r17 }
+	{ v2sub r15, r16, r17 ; crc32_32 r5, r6, r7 }
+	{ v2sub r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ v2sub r15, r16, r17 ; sub r5, r6, r7 }
+	{ v2sub r15, r16, r17 ; v1mulus r5, r6, r7 }
+	{ v2sub r15, r16, r17 ; v2packl r5, r6, r7 }
+	{ v2sub r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+	{ v2sub r5, r6, r7 ; ld1u_add r15, r16, 5 }
+	{ v2sub r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+	{ v2sub r5, r6, r7 ; stnt r15, r16 }
+	{ v2sub r5, r6, r7 ; v2addi r15, r16, 5 }
+	{ v2sub r5, r6, r7 ; v4sub r15, r16, r17 }
+	{ v2subsc r15, r16, r17 ; dblalign2 r5, r6, r7 }
+	{ v2subsc r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ v2subsc r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ v2subsc r15, r16, r17 ; v1shl r5, r6, r7 }
+	{ v2subsc r15, r16, r17 ; v2sads r5, r6, r7 }
+	{ v2subsc r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ v2subsc r5, r6, r7 ; ld2u_add r15, r16, 5 }
+	{ v2subsc r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+	{ v2subsc r5, r6, r7 ; stnt2_add r15, r16, 5 }
+	{ v2subsc r5, r6, r7 ; v2cmples r15, r16, r17 }
+	{ v2subsc r5, r6, r7 ; xori r15, r16, 5 }
+	{ v4add r15, r16, r17 ; fdouble_addsub r5, r6, r7 }
+	{ v4add r15, r16, r17 ; mula_ls_lu r5, r6, r7 }
+	{ v4add r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ v4add r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ v4add r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ v4add r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ v4add r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ v4add r5, r6, r7 ; prefetch_l2 r15 }
+	{ v4add r5, r6, r7 ; sub r15, r16, r17 }
+	{ v4add r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ v4addsc r15, r16, r17 ; addx r5, r6, r7 }
+	{ v4addsc r15, r16, r17 ; fdouble_sub_flags r5, r6, r7 }
+	{ v4addsc r15, r16, r17 ; mz r5, r6, r7 }
+	{ v4addsc r15, r16, r17 ; v1cmpeq r5, r6, r7 }
+	{ v4addsc r15, r16, r17 ; v2add r5, r6, r7 }
+	{ v4addsc r15, r16, r17 ; v2shrui r5, r6, 5 }
+	{ v4addsc r5, r6, r7 ; exch r15, r16, r17 }
+	{ v4addsc r5, r6, r7 ; ldnt r15, r16 }
+	{ v4addsc r5, r6, r7 ; raise }
+	{ v4addsc r5, r6, r7 ; v1addi r15, r16, 5 }
+	{ v4addsc r5, r6, r7 ; v2int_l r15, r16, r17 }
+	{ v4int_h r15, r16, r17 ; and r5, r6, r7 }
+	{ v4int_h r15, r16, r17 ; fsingle_add1 r5, r6, r7 }
+	{ v4int_h r15, r16, r17 ; ori r5, r6, 5 }
+	{ v4int_h r15, r16, r17 ; v1cmplts r5, r6, r7 }
+	{ v4int_h r15, r16, r17 ; v2avgs r5, r6, r7 }
+	{ v4int_h r15, r16, r17 ; v4addsc r5, r6, r7 }
+	{ v4int_h r5, r6, r7 ; fetchaddgez r15, r16, r17 }
+	{ v4int_h r5, r6, r7 ; ldnt1u_add r15, r16, 5 }
+	{ v4int_h r5, r6, r7 ; shl16insli r15, r16, 0x1234 }
+	{ v4int_h r5, r6, r7 ; v1cmples r15, r16, r17 }
+	{ v4int_h r5, r6, r7 ; v2minsi r15, r16, 5 }
+	{ v4int_l r15, r16, r17 ; bfins r5, r6, 5, 7 }
+	{ v4int_l r15, r16, r17 ; fsingle_pack1 r5, r6 }
+	{ v4int_l r15, r16, r17 ; rotl r5, r6, r7 }
+	{ v4int_l r15, r16, r17 ; v1cmpne r5, r6, r7 }
+	{ v4int_l r15, r16, r17 ; v2cmpleu r5, r6, r7 }
+	{ v4int_l r15, r16, r17 ; v4shl r5, r6, r7 }
+	{ v4int_l r5, r6, r7 ; fetchor r15, r16, r17 }
+	{ v4int_l r5, r6, r7 ; ldnt2u_add r15, r16, 5 }
+	{ v4int_l r5, r6, r7 ; shl2addx r15, r16, r17 }
+	{ v4int_l r5, r6, r7 ; v1cmpltu r15, r16, r17 }
+	{ v4int_l r5, r6, r7 ; v2packl r15, r16, r17 }
+	{ v4packsc r15, r16, r17 ; cmpeq r5, r6, r7 }
+	{ v4packsc r15, r16, r17 ; infol 0x1234 }
+	{ v4packsc r15, r16, r17 ; shl1add r5, r6, r7 }
+	{ v4packsc r15, r16, r17 ; v1ddotpusa r5, r6, r7 }
+	{ v4packsc r15, r16, r17 ; v2cmpltui r5, r6, 5 }
+	{ v4packsc r15, r16, r17 ; v4sub r5, r6, r7 }
+	{ v4packsc r5, r6, r7 ; flushwb }
+	{ v4packsc r5, r6, r7 ; ldnt4u_add r15, r16, 5 }
+	{ v4packsc r5, r6, r7 ; shlx r15, r16, r17 }
+	{ v4packsc r5, r6, r7 ; v1int_l r15, r16, r17 }
+	{ v4packsc r5, r6, r7 ; v2shlsc r15, r16, r17 }
+	{ v4shl r15, r16, r17 ; cmplts r5, r6, r7 }
+	{ v4shl r15, r16, r17 ; movei r5, 5 }
+	{ v4shl r15, r16, r17 ; shl3add r5, r6, r7 }
+	{ v4shl r15, r16, r17 ; v1dotpua r5, r6, r7 }
+	{ v4shl r15, r16, r17 ; v2int_h r5, r6, r7 }
+	{ v4shl r5, r6, r7 ; add r15, r16, r17 }
+	{ v4shl r5, r6, r7 ; info 19 }
+	{ v4shl r5, r6, r7 ; mfspr r16, 0x5 }
+	{ v4shl r5, r6, r7 ; shru r15, r16, r17 }
+	{ v4shl r5, r6, r7 ; v1minui r15, r16, 5 }
+	{ v4shl r5, r6, r7 ; v2shrui r15, r16, 5 }
+	{ v4shlsc r15, r16, r17 ; cmpne r5, r6, r7 }
+	{ v4shlsc r15, r16, r17 ; mul_hs_ls r5, r6, r7 }
+	{ v4shlsc r15, r16, r17 ; shlxi r5, r6, 5 }
+	{ v4shlsc r15, r16, r17 ; v1int_l r5, r6, r7 }
+	{ v4shlsc r15, r16, r17 ; v2mins r5, r6, r7 }
+	{ v4shlsc r5, r6, r7 ; addxi r15, r16, 5 }
+	{ v4shlsc r5, r6, r7 ; jalr r15 }
+	{ v4shlsc r5, r6, r7 ; moveli r15, 0x1234 }
+	{ v4shlsc r5, r6, r7 ; st r15, r16 }
+	{ v4shlsc r5, r6, r7 ; v1shli r15, r16, 5 }
+	{ v4shlsc r5, r6, r7 ; v4addsc r15, r16, r17 }
+	{ v4shrs r15, r16, r17 ; cmulf r5, r6, r7 }
+	{ v4shrs r15, r16, r17 ; mul_hu_lu r5, r6, r7 }
+	{ v4shrs r15, r16, r17 ; shrui r5, r6, 5 }
+	{ v4shrs r15, r16, r17 ; v1minui r5, r6, 5 }
+	{ v4shrs r15, r16, r17 ; v2muls r5, r6, r7 }
+	{ v4shrs r5, r6, r7 ; andi r15, r16, 5 }
+	{ v4shrs r5, r6, r7 ; ld r15, r16 }
+	{ v4shrs r5, r6, r7 ; nor r15, r16, r17 }
+	{ v4shrs r5, r6, r7 ; st2_add r15, r16, 5 }
+	{ v4shrs r5, r6, r7 ; v1shrui r15, r16, 5 }
+	{ v4shrs r5, r6, r7 ; v4shl r15, r16, r17 }
+	{ v4shru r15, r16, r17 ; crc32_32 r5, r6, r7 }
+	{ v4shru r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
+	{ v4shru r15, r16, r17 ; sub r5, r6, r7 }
+	{ v4shru r15, r16, r17 ; v1mulus r5, r6, r7 }
+	{ v4shru r15, r16, r17 ; v2packl r5, r6, r7 }
+	{ v4shru r5, r6, r7 ; cmpexch4 r15, r16, r17 }
+	{ v4shru r5, r6, r7 ; ld1u_add r15, r16, 5 }
+	{ v4shru r5, r6, r7 ; prefetch_add_l1 r15, 5 }
+	{ v4shru r5, r6, r7 ; stnt r15, r16 }
+	{ v4shru r5, r6, r7 ; v2addi r15, r16, 5 }
+	{ v4shru r5, r6, r7 ; v4sub r15, r16, r17 }
+	{ v4sub r15, r16, r17 ; dblalign2 r5, r6, r7 }
+	{ v4sub r15, r16, r17 ; mula_hu_hu r5, r6, r7 }
+	{ v4sub r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ v4sub r15, r16, r17 ; v1shl r5, r6, r7 }
+	{ v4sub r15, r16, r17 ; v2sads r5, r6, r7 }
+	{ v4sub r5, r6, r7 ; cmpltsi r15, r16, 5 }
+	{ v4sub r5, r6, r7 ; ld2u_add r15, r16, 5 }
+	{ v4sub r5, r6, r7 ; prefetch_add_l3 r15, 5 }
+	{ v4sub r5, r6, r7 ; stnt2_add r15, r16, 5 }
+	{ v4sub r5, r6, r7 ; v2cmples r15, r16, r17 }
+	{ v4sub r5, r6, r7 ; xori r15, r16, 5 }
+	{ v4subsc r15, r16, r17 ; fdouble_addsub r5, r6, r7 }
+	{ v4subsc r15, r16, r17 ; mula_ls_lu r5, r6, r7 }
+	{ v4subsc r15, r16, r17 ; v1addi r5, r6, 5 }
+	{ v4subsc r15, r16, r17 ; v1shru r5, r6, r7 }
+	{ v4subsc r15, r16, r17 ; v2shlsc r5, r6, r7 }
+	{ v4subsc r5, r6, r7 ; dblalign2 r15, r16, r17 }
+	{ v4subsc r5, r6, r7 ; ld4u_add r15, r16, 5 }
+	{ v4subsc r5, r6, r7 ; prefetch_l2 r15 }
+	{ v4subsc r5, r6, r7 ; sub r15, r16, r17 }
+	{ v4subsc r5, r6, r7 ; v2cmpltu r15, r16, r17 }
+	{ wh64 r15 ; addx r5, r6, r7 }
+	{ wh64 r15 ; fdouble_sub_flags r5, r6, r7 }
+	{ wh64 r15 ; mz r5, r6, r7 }
+	{ wh64 r15 ; v1cmpeq r5, r6, r7 }
+	{ wh64 r15 ; v2add r5, r6, r7 }
+	{ wh64 r15 ; v2shrui r5, r6, 5 }
+	{ xor r15, r16, r17 ; addi r5, r6, 5 ; ld4s r25, r26 }
+	{ xor r15, r16, r17 ; addxi r5, r6, 5 ; ld4u r25, r26 }
+	{ xor r15, r16, r17 ; andi r5, r6, 5 ; ld4u r25, r26 }
+	{ xor r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld4s r25, r26 }
+	{ xor r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch r25 }
+	{ xor r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l1_fault r25 }
+	{ xor r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2_fault r25 }
+	{ xor r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l3_fault r25 }
+	{ xor r15, r16, r17 ; ctz r5, r6 ; ld4s r25, r26 }
+	{ xor r15, r16, r17 ; fnop ; st r25, r26 }
+	{ xor r15, r16, r17 ; info 19 ; prefetch_l2 r25 }
+	{ xor r15, r16, r17 ; ld r25, r26 ; mula_ls_ls r5, r6, r7 }
+	{ xor r15, r16, r17 ; ld1s r25, r26 ; cmoveqz r5, r6, r7 }
+	{ xor r15, r16, r17 ; ld1s r25, r26 ; shl2addx r5, r6, r7 }
+	{ xor r15, r16, r17 ; ld1u r25, r26 ; mul_hs_hs r5, r6, r7 }
+	{ xor r15, r16, r17 ; ld2s r25, r26 ; addi r5, r6, 5 }
+	{ xor r15, r16, r17 ; ld2s r25, r26 ; rotl r5, r6, r7 }
+	{ xor r15, r16, r17 ; ld2u r25, r26 ; fnop }
+	{ xor r15, r16, r17 ; ld2u r25, r26 ; tblidxb1 r5, r6 }
+	{ xor r15, r16, r17 ; ld4s r25, r26 ; nop }
+	{ xor r15, r16, r17 ; ld4u r25, r26 ; cmpleu r5, r6, r7 }
+	{ xor r15, r16, r17 ; ld4u r25, r26 ; shrsi r5, r6, 5 }
+	{ xor r15, r16, r17 ; move r5, r6 ; prefetch_l1_fault r25 }
+	{ xor r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
+	{ xor r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch r25 }
+	{ xor r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
+	{ xor r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld4s r25, r26 }
+	{ xor r15, r16, r17 ; mulax r5, r6, r7 ; ld4u r25, r26 }
+	{ xor r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l1 r25 }
+	{ xor r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l2 r25 }
+	{ xor r15, r16, r17 ; pcnt r5, r6 ; prefetch_l2_fault r25 }
+	{ xor r15, r16, r17 ; prefetch r25 ; mulax r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch_l1 r25 ; cmpeq r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch_l1 r25 ; shl3addx r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch_l1_fault r25 ; mul_ls_ls r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch_l2 r25 ; addxi r5, r6, 5 }
+	{ xor r15, r16, r17 ; prefetch_l2 r25 ; shl r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch_l2_fault r25 ; info 19 }
+	{ xor r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb3 r5, r6 }
+	{ xor r15, r16, r17 ; prefetch_l3 r25 ; or r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch_l3_fault r25 ; cmpltsi r5, r6, 5 }
+	{ xor r15, r16, r17 ; prefetch_l3_fault r25 ; shrui r5, r6, 5 }
+	{ xor r15, r16, r17 ; revbytes r5, r6 ; prefetch_l3 r25 }
+	{ xor r15, r16, r17 ; rotli r5, r6, 5 ; st r25, r26 }
+	{ xor r15, r16, r17 ; shl1add r5, r6, r7 ; st1 r25, r26 }
+	{ xor r15, r16, r17 ; shl2add r5, r6, r7 ; st4 r25, r26 }
+	{ xor r15, r16, r17 ; shl3addx r5, r6, r7 ; ld r25, r26 }
+	{ xor r15, r16, r17 ; shrs r5, r6, r7 ; ld r25, r26 }
+	{ xor r15, r16, r17 ; shru r5, r6, r7 ; ld1u r25, r26 }
+	{ xor r15, r16, r17 ; st r25, r26 ; addi r5, r6, 5 }
+	{ xor r15, r16, r17 ; st r25, r26 ; rotl r5, r6, r7 }
+	{ xor r15, r16, r17 ; st1 r25, r26 ; fnop }
+	{ xor r15, r16, r17 ; st1 r25, r26 ; tblidxb1 r5, r6 }
+	{ xor r15, r16, r17 ; st2 r25, r26 ; nop }
+	{ xor r15, r16, r17 ; st4 r25, r26 ; cmpleu r5, r6, r7 }
+	{ xor r15, r16, r17 ; st4 r25, r26 ; shrsi r5, r6, 5 }
+	{ xor r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l2 r25 }
+	{ xor r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l2_fault r25 }
+	{ xor r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l3_fault r25 }
+	{ xor r15, r16, r17 ; v1mz r5, r6, r7 }
+	{ xor r15, r16, r17 ; v2packuc r5, r6, r7 }
+	{ xor r15, r16, r17 ; xor r5, r6, r7 ; st1 r25, r26 }
+	{ xor r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 }
+	{ xor r5, r6, r7 ; addxi r15, r16, 5 ; st4 r25, r26 }
+	{ xor r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 }
+	{ xor r5, r6, r7 ; cmpexch r15, r16, r17 }
+	{ xor r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 }
+	{ xor r5, r6, r7 ; cmpltu r15, r16, r17 ; ld1u r25, r26 }
+	{ xor r5, r6, r7 ; dtlbpr r15 }
+	{ xor r5, r6, r7 ; ill ; ld4u r25, r26 }
+	{ xor r5, r6, r7 ; jalr r15 ; ld4s r25, r26 }
+	{ xor r5, r6, r7 ; jr r15 ; prefetch r25 }
+	{ xor r5, r6, r7 ; ld r25, r26 ; cmples r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld1s r25, r26 ; add r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld1s r25, r26 ; shrsi r15, r16, 5 }
+	{ xor r5, r6, r7 ; ld1u r25, r26 ; shl r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld2s r25, r26 ; mnz r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld2u r25, r26 ; cmpne r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld4s r25, r26 ; and r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld4s r25, r26 ; subx r15, r16, r17 }
+	{ xor r5, r6, r7 ; ld4u r25, r26 ; shl2addx r15, r16, r17 }
+	{ xor r5, r6, r7 ; lnk r15 ; prefetch_l2 r25 }
+	{ xor r5, r6, r7 ; move r15, r16 ; prefetch_l2 r25 }
+	{ xor r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l2 r25 }
+	{ xor r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l3 r25 }
+	{ xor r5, r6, r7 ; prefetch r25 ; cmpltu r15, r16, r17 }
+	{ xor r5, r6, r7 ; prefetch_add_l3_fault r15, 5 }
+	{ xor r5, r6, r7 ; prefetch_l1 r25 ; shli r15, r16, 5 }
+	{ xor r5, r6, r7 ; prefetch_l1_fault r25 ; rotli r15, r16, 5 }
+	{ xor r5, r6, r7 ; prefetch_l2 r25 ; mnz r15, r16, r17 }
+	{ xor r5, r6, r7 ; prefetch_l2_fault r25 ; fnop }
+	{ xor r5, r6, r7 ; prefetch_l3 r25 ; cmpeq r15, r16, r17 }
+	{ xor r5, r6, r7 ; prefetch_l3 r25 }
+	{ xor r5, r6, r7 ; prefetch_l3_fault r25 ; shli r15, r16, 5 }
+	{ xor r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 }
+	{ xor r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l3 r25 }
+	{ xor r5, r6, r7 ; shl2add r15, r16, r17 ; st r25, r26 }
+	{ xor r5, r6, r7 ; shl3add r15, r16, r17 ; st2 r25, r26 }
+	{ xor r5, r6, r7 ; shli r15, r16, 5 }
+	{ xor r5, r6, r7 ; shrsi r15, r16, 5 }
+	{ xor r5, r6, r7 ; shruxi r15, r16, 5 }
+	{ xor r5, r6, r7 ; st r25, r26 ; shli r15, r16, 5 }
+	{ xor r5, r6, r7 ; st1 r25, r26 ; rotli r15, r16, 5 }
+	{ xor r5, r6, r7 ; st2 r25, r26 ; lnk r15 }
+	{ xor r5, r6, r7 ; st4 r25, r26 ; cmpltu r15, r16, r17 }
+	{ xor r5, r6, r7 ; stnt2 r15, r16 }
+	{ xor r5, r6, r7 ; subx r15, r16, r17 ; st2 r25, r26 }
+	{ xor r5, r6, r7 ; v2cmpltsi r15, r16, 5 }
+	{ xor r5, r6, r7 ; xor r15, r16, r17 ; ld2u r25, r26 }
+	{ xori r15, r16, 5 ; cmul r5, r6, r7 }
+	{ xori r15, r16, 5 ; mul_hs_lu r5, r6, r7 }
+	{ xori r15, r16, 5 ; shrs r5, r6, r7 }
+	{ xori r15, r16, 5 ; v1maxu r5, r6, r7 }
+	{ xori r15, r16, 5 ; v2minsi r5, r6, 5 }
+	{ xori r5, r6, 5 ; addxli r15, r16, 0x1234 }
+	{ xori r5, r6, 5 ; jalrp r15 }
+	{ xori r5, r6, 5 ; mtspr 0x5, r16 }
+	{ xori r5, r6, 5 ; st1 r15, r16 }
+	{ xori r5, r6, 5 ; v1shrs r15, r16, r17 }
+	{ xori r5, r6, 5 ; v4int_h r15, r16, r17 }
diff --git a/gas/testsuite/gas/tilegx/tilegx.exp b/gas/testsuite/gas/tilegx/tilegx.exp
new file mode 100644
index 0000000..1bf6b4e
--- /dev/null
+++ b/gas/testsuite/gas/tilegx/tilegx.exp
@@ -0,0 +1,23 @@
+# Expect script for TILE-Gx assembler tests.
+#   Copyright 2011 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+if [istarget tilegx-*-*] {
+    run_dump_test "t_insns"
+}
diff --git a/gas/testsuite/gas/tilepro/t_constants.d b/gas/testsuite/gas/tilepro/t_constants.d
new file mode 100644
index 0000000..c3ee25f
--- /dev/null
+++ b/gas/testsuite/gas/tilepro/t_constants.d
@@ -0,0 +1,262 @@
+#as:
+#objdump: --section .data -w -s -z
+
+.*:     file format .*
+
+Contents of section .data:
+ 0000 37000000 00000000 3839c600 00010203  .*
+ 0010 04050607 08090a0b 0c0d0e0f 10111213  .*
+ 0020 14151617 18191a1b 1c1d1e1f 20212223  .*
+ 0030 24252627 28292a2b 2c2d2e2f 30313233  .*
+ 0040 34353637 38393a3b 3c3d3e3f 40414243  .*
+ 0050 44454647 48494a4b 4c4d4e4f 50515253  .*
+ 0060 54555657 58595a5b 5c5d5e5f 60616263  .*
+ 0070 64656667 68696a6b 6c6d6e6f 70717273  .*
+ 0080 74757677 78797a7b 7c7d7e7f 80818283  .*
+ 0090 84858687 88898a8b 8c8d8e8f 90919293  .*
+ 00a0 94959697 98999a9b 9c9d9e9f a0a1a2a3  .*
+ 00b0 a4a5a6a7 a8a9aaab acadaeaf b0b1b2b3  .*
+ 00c0 b4b5b6b7 b8b9babb bcbdbebf c0c1c2c3  .*
+ 00d0 c4c5c6c7 c8c9cacb cccdcecf d0d1d2d3  .*
+ 00e0 d4d5d6d7 d8d9dadb dcdddedf e0e1e2e3  .*
+ 00f0 e4e5e6e7 e8e9eaeb ecedeeef f0f1f2f3  .*
+ 0100 f4f5f6f7 f8f9fafb fcfdfeff 00001100  .*
+ 0110 22003300 44005500 ed07fe07 0f082008  .*
+ 0120 31084208 da0feb0f fc0f0d10 1e102f10  .*
+ 0130 c717d817 e917fa17 0b181c18 b41fc51f  .*
+ 0140 d61fe71f f81f0920 a127b227 c327d427  .*
+ 0150 e527f627 8e2f9f2f b02fc12f d22fe32f  .*
+ 0160 7b378c37 9d37ae37 bf37d037 683f793f  .*
+ 0170 8a3f9b3f ac3fbd3f 55476647 77478847  .*
+ 0180 9947aa47 424f534f 644f754f 864f974f  .*
+ 0190 2f574057 51576257 73578457 1c5f2d5f  .*
+ 01a0 3e5f4f5f 605f715f 09671a67 2b673c67  .*
+ 01b0 4d675e67 f66e076f 186f296f 3a6f4b6f  .*
+ 01c0 e376f476 05771677 27773877 d07ee17e  .*
+ 01d0 f27e037f 147f257f bd86ce86 df86f086  .*
+ 01e0 01871287 aa8ebb8e cc8edd8e ee8eff8e  .*
+ 01f0 9796a896 b996ca96 db96ec96 849e959e  .*
+ 0200 a69eb79e c89ed99e 71a682a6 93a6a4a6  .*
+ 0210 b5a6c6a6 5eae6fae 80ae91ae a2aeb3ae  .*
+ 0220 4bb65cb6 6db67eb6 8fb6a0b6 38be49be  .*
+ 0230 5abe6bbe 7cbe8dbe 25c636c6 47c658c6  .*
+ 0240 69c67ac6 12ce23ce 34ce45ce 56ce67ce  .*
+ 0250 ffd510d6 21d632d6 43d654d6 ecddfddd  .*
+ 0260 0ede1fde 30de41de d9e5eae5 fbe50ce6  .*
+ 0270 1de62ee6 c6edd7ed e8edf9ed 0aee1bee  .*
+ 0280 b3f5c4f5 d5f5e6f5 f7f508f6 78563412  .*
+ 0290 5d2e2612 42061812 27de0912 3bf85f19  .*
+ 02a0 c8d45119 55b14319 e28d3519 fe998b20  .*
+ 02b0 337b7d20 685c6f20 9d3d6120 c13bb727  .*
+ 02c0 9e21a927 7b079b27 58ed8c27 84dde22e  .*
+ 02d0 09c8d42e 8eb2c62e 139db82e 477f0e36  .*
+ 02e0 746e0036 a15df235 ce4ce435 0a213a3d  .*
+ 02f0 df142c3d b4081e3d 89fc0f3d cdc26544  .*
+ 0300 4abb5744 c7b34944 44ac3b44 9064914b  .*
+ 0310 b561834b da5e754b ff5b674b 5306bd52  .*
+ 0320 2008af52 ed09a152 ba0b9352 16a8e859  .*
+ 0330 8baeda59 00b5cc59 75bbbe59 d9491461  .*
+ 0340 f6540661 1360f860 306bea60 9ceb3f68  .*
+ 0350 61fb3168 260b2468 eb1a1668 5f8d6b6f  .*
+ 0360 cca15d6f 39b64f6f a6ca416f 222f9776  .*
+ 0370 37488976 4c617b76 617a6d76 e5d0c27d  .*
+ 0380 a2eeb47d 5f0ca77d 1c2a997d a872ee84  .*
+ 0390 0d95e084 72b7d284 d7d9c484 6b141a8c  .*
+ 03a0 783b0c8c 8562fe8b 9289f08b 2eb64593  .*
+ 03b0 e3e13793 980d2a93 4d391c93 f157719a  .*
+ 03c0 4e88639a abb8559a 08e9479a b4f99ca1  .*
+ 03d0 b92e8fa1 be6381a1 c39873a1 779bc8a8  .*
+ 03e0 24d5baa8 d10eada8 7e489fa8 3a3df4af  .*
+ 03f0 8f7be6af e4b9d8af 39f8caaf fdde1fb7  .*
+ 0400 fa2112b7 f76404b7 f4a7f6b6 c0804bbe  .*
+ 0410 65c83dbe 0a1030be af5722be 832277c5  .*
+ 0420 d06e69c5 1dbb5bc5 6a074ec5 46c4a2cc  .*
+ 0430 3b1595cc 306687cc 25b779cc 0966ced3  .*
+ 0440 a6bbc0d3 4311b3d3 e066a5d3 cc07fada  .*
+ 0450 1162ecda 56bcdeda 9b16d1da 8fa925e2  .*
+ 0460 7c0818e2 69670ae2 56c6fce1 524b51e9  .*
+ 0470 e7ae43e9 7c1236e9 117628e9 15ed7cf0  .*
+ 0480 52556ff0 8fbd61f0 cc2554f0 00010203  .*
+ 0490 04050607 08090a0b 0c0d0e0f 10111213  .*
+ 04a0 14151617 18191a1b 1c1d1e1f 20212223  .*
+ 04b0 24252627 28292a2b 2c2d2e2f 30313233  .*
+ 04c0 34353637 38393a3b 3c3d3e3f 40414243  .*
+ 04d0 44454647 48494a4b 4c4d4e4f 50515253  .*
+ 04e0 54555657 58595a5b 5c5d5e5f 60616263  .*
+ 04f0 64656667 68696a6b 6c6d6e6f 70717273  .*
+ 0500 74757677 78797a7b 7c7d7e7f 80818283  .*
+ 0510 84858687 88898a8b 8c8d8e8f 90919293  .*
+ 0520 94959697 98999a9b 9c9d9e9f a0a1a2a3  .*
+ 0530 a4a5a6a7 a8a9aaab acadaeaf b0b1b2b3  .*
+ 0540 b4b5b6b7 b8b9babb bcbdbebf c0c1c2c3  .*
+ 0550 c4c5c6c7 c8c9cacb cccdcecf d0d1d2d3  .*
+ 0560 d4d5d6d7 d8d9dadb dcdddedf e0e1e2e3  .*
+ 0570 e4e5e6e7 e8e9eaeb ecedeeef f0f1f2f3  .*
+ 0580 f4f5f6f7 f8f9fafb fcfdfeff 00001100  .*
+ 0590 22003300 44005500 ed07fe07 0f082008  .*
+ 05a0 31084208 da0feb0f fc0f0d10 1e102f10  .*
+ 05b0 c717d817 e917fa17 0b181c18 b41fc51f  .*
+ 05c0 d61fe71f f81f0920 a127b227 c327d427  .*
+ 05d0 e527f627 8e2f9f2f b02fc12f d22fe32f  .*
+ 05e0 7b378c37 9d37ae37 bf37d037 683f793f  .*
+ 05f0 8a3f9b3f ac3fbd3f 55476647 77478847  .*
+ 0600 9947aa47 424f534f 644f754f 864f974f  .*
+ 0610 2f574057 51576257 73578457 1c5f2d5f  .*
+ 0620 3e5f4f5f 605f715f 09671a67 2b673c67  .*
+ 0630 4d675e67 f66e076f 186f296f 3a6f4b6f  .*
+ 0640 e376f476 05771677 27773877 d07ee17e  .*
+ 0650 f27e037f 147f257f bd86ce86 df86f086  .*
+ 0660 01871287 aa8ebb8e cc8edd8e ee8eff8e  .*
+ 0670 9796a896 b996ca96 db96ec96 849e959e  .*
+ 0680 a69eb79e c89ed99e 71a682a6 93a6a4a6  .*
+ 0690 b5a6c6a6 5eae6fae 80ae91ae a2aeb3ae  .*
+ 06a0 4bb65cb6 6db67eb6 8fb6a0b6 38be49be  .*
+ 06b0 5abe6bbe 7cbe8dbe 25c636c6 47c658c6  .*
+ 06c0 69c67ac6 12ce23ce 34ce45ce 56ce67ce  .*
+ 06d0 ffd510d6 21d632d6 43d654d6 ecddfddd  .*
+ 06e0 0ede1fde 30de41de d9e5eae5 fbe50ce6  .*
+ 06f0 1de62ee6 c6edd7ed e8edf9ed 0aee1bee  .*
+ 0700 b3f5c4f5 d5f5e6f5 f7f508f6 78563412  .*
+ 0710 5d2e2612 42061812 27de0912 eb7a223d  .*
+ 0720 554e143d bf21063d 29f5f73c 5e9f1068  .*
+ 0730 4d6e0268 3c3df467 2b0ce667 d1c3fe92  .*
+ 0740 458ef092 b958e292 2d23d492 44e8ecbd  .*
+ 0750 3daedebd 3674d0bd 2f3ac2bd b70cdbe8  .*
+ 0760 35cecce8 b38fbee8 3151b0e8 2a31c913  .*
+ 0770 2deeba13 30abac13 33689e13 9d55b73e  .*
+ 0780 250ea93e adc69a3e 357f8c3e 107aa569  .*
+ 0790 1d2e9769 2ae28869 37967a69 839e9394  .*
+ 07a0 154e8594 a7fd7694 39ad6894 f6c281bf  .*
+ 07b0 0d6e73bf 241965bf 3bc456bf 69e76fea  .*
+ 07c0 058e61ea a13453ea 3ddb44ea dc0b5e15  .*
+ 07d0 fdad4f15 1e504115 3ff23215 4f304c40  .*
+ 07e0 f5cd3d40 9b6b2f40 41092140 c2543a6b  .*
+ 07f0 eded2b6b 18871d6b 43200f6b 35792896  .*
+ 0800 e50d1a96 95a20b96 4537fd95 a89d16c1  .*
+ 0810 dd2d08c1 12bef9c0 474eebc0 1bc204ec  .*
+ 0820 d54df6eb 8fd9e7eb 4965d9eb 8ee6f216  .*
+ 0830 cd6de416 0cf5d516 4b7cc716 010be141  .*
+ 0840 c58dd241 8910c441 4d93b541 742fcf6c  .*
+ 0850 bdadc06c 062cb26c 4faaa36c e753bd97  .*
+ 0860 b5cdae97 8347a097 51c19197 5a78abc2  .*
+ 0870 aded9cc2 00638ec2 53d87fc2 cd9c99ed  .*
+ 0880 a50d8bed 7d7e7ced 55ef6ded 40c18718  .*
+ 0890 9d2d7918 fa996a18 57065c18 b3e57543  .*
+ 08a0 954d6743 77b55843 591d4a43 260a646e  .*
+ 08b0 8d6d556e f4d0466e 5b34386e 992e5299  .*
+ 08c0 858d4399 71ec3499 5d4b2699 0c5340c4  .*
+ 08d0 7dad31c4 ee0723c4 5f6214c4 7f772eef  .*
+ 08e0 75cd1fef 6b2311ef 617902ef f29b1c1a  .*
+ 08f0 6ded0d1a e83eff19 6390f019 65c00a45  .*
+ 0900 650dfc44 655aed44 65a7de44 2241fc05  .*
+ 0910 d0f22bfa d0f22bfa 761afb05 6da739d4  .*
+ 0920 6da739d4 caf3f905 0a5c47ae 0a5c47ae  .*
+ 0930 1ecdf805 a7105588 a7105588 52fe700c  .*
+ 0940 bbafcef4 bbafcef4 82b1110c fd3ea6ce  .*
+ 0950 fd3ea6ce b264b20b 3fce7da8 3fce7da8  .*
+ 0960 e217530b 815d5582 815d5582 82bbe512  .*
+ 0970 a66c71ef a66c71ef 8e482812 8dd612c9  .*
+ 0980 8dd612c9 9ad56a11 7440b4a2 7440b4a2  .*
+ 0990 a662ad10 5baa557c 5baa557c b2785a19  .*
+ 09a0 912914ea 912914ea 9adf3e18 1d6e7fc3  .*
+ 09b0 1d6e7fc3 82462317 a9b2ea9c a9b2ea9c  .*
+ 09c0 6aad0716 35f75576 35f75576 e235cf1f  .*
+ 09d0 7ce6b6e4 7ce6b6e4 a676551e ad05ecbd  .*
+ 09e0 ad05ecbd 6ab7db1c de242197 de242197  .*
+ 09f0 2ef8611b 0f445670 0f445670 12f34326  .*
+ 0a00 67a359df 67a359df b20d6c24 3d9d58b8  .*
+ 0a10 3d9d58b8 52289422 13975791 13975791  .*
+ 0a20 f242bc20 e990566a e990566a 42b0b82c  .*
+ 0a30 5260fcd9 5260fcd9 bea4822a cd34c5b2  .*
+ 0a40 cd34c5b2 3a994c28 48098e8b 48098e8b  .*
+ 0a50 b68d1626 c3dd5664 c3dd5664 726d2d33  .*
+ 0a60 3d1d9fd4 3d1d9fd4 ca3b9930 5dcc31ad  .*
+ 0a70 5dcc31ad 220a052e 7d7bc485 7d7bc485  .*
+ 0a80 7ad8702b 9d2a575e 9d2a575e a22aa239  .*
+ 0a90 28da41cf 28da41cf d6d2af36 ed639ea7  .*
+ 0aa0 ed639ea7 0a7bbd33 b2edfa7f b2edfa7f  .*
+ 0ab0 3e23cb30 77775758 77775758 d2e71640  .*
+ 0ac0 1397e4c9 1397e4c9 e269c63c 7dfb0aa2  .*
+ 0ad0 7dfb0aa2 f2eb7539 e75f317a e75f317a  .*
+ 0ae0 026e2536 51c45752 51c45752 02a58b46  .*
+ 0af0 fe5387c4 fe5387c4 ee00dd42 0d93779c  .*
+ 0b00 0d93779c da5c2e3f 1cd26774 1cd26774  .*
+ 0b10 c6b87f3b 2b11584c 2b11584c 3262004d  .*
+ 0b20 e9102abf e9102abf fa97f348 9d2ae496  .*
+ 0b30 9d2ae496 c2cde644 51449e6e 51449e6e  .*
+ 0b40 8a03da40 055e5846 055e5846 621f7553  .*
+ 0b50 d4cdccb9 d4cdccb9 062f0a4f 2dc25091  .*
+ 0b60 2dc25091 aa3e9f4a 86b6d468 86b6d468  .*
+ 0b70 4e4e3446 dfaa5840 dfaa5840 92dce959  .*
+ 0b80 bf8a6fb4 bf8a6fb4 12c62055 bd59bd8b  .*
+ 0b90 bd59bd8b 92af5750 bb280b63 bb280b63  .*
+ 0ba0 12998e4b b9f7583a b9f7583a c2995e60  .*
+ 0bb0 aa4712af aa4712af 1e5d375b 4df12986  .*
+ 0bc0 4df12986 7a201056 f09a415d f09a415d  .*
+ 0bd0 d6e3e850 93445934 93445934 f256d366  .*
+ 0be0 9504b5a9 9504b5a9 2af44d61 dd889680  .*
+ 0bf0 dd889680 6291c85b 250d7857 250d7857  .*
+ 0c00 9a2e4356 6d91592e 6d91592e 2214486d  .*
+ 0c10 80c157a4 80c157a4 368b6467 6d20037b  .*
+ 0c20 6d20037b 4a028161 5a7fae51 5a7fae51  .*
+ 0c30 5e799d5b 47de5928 47de5928 52d1bc73  .*
+ 0c40 6b7efa9e 6b7efa9e 42227b6d fdb76f75  .*
+ 0c50 fdb76f75 32733967 8ff1e44b 8ff1e44b  .*
+ 0c60 22c4f760 212b5a22 212b5a22 828e317a  .*
+ 0c70 563b9d99 563b9d99 4eb99173 8d4fdc6f  .*
+ 0c80 8d4fdc6f 1ae4f16c c4631b46 c4631b46  .*
+ 0c90 e60e5266 fb775a1c fb775a1c b24ba680  .*
+ 0ca0 41f83f94 41f83f94 5a50a879 1de7486a  .*
+ 0cb0 1de7486a 0255aa72 f9d55140 f9d55140  .*
+ 0cc0 aa59ac6b d5c45a16 d5c45a16 e2081b87  .*
+ 0cd0 2cb5e28e 2cb5e28e 66e7be7f ad7eb564  .*
+ 0ce0 ad7eb564 eac56278 2e48883a 2e48883a  .*
+ 0cf0 6ea40671 af115b10 af115b10 12c68f8d  .*
+ 0d00 17728589 17728589 727ed585 3d16225f  .*
+ 0d10 3d16225f d2361b7e 63babe34 63babe34  .*
+ 0d20 32ef6076 895e5b0a 895e5b0a 42830494  .*
+ 0d30 022f2884 022f2884 7e15ec8b cdad8e59  .*
+ 0d40 cdad8e59 baa7d383 982cf52e 982cf52e  .*
+ 0d50 f639bb7b 63ab5b04 63ab5b04 7240799a  .*
+ 0d60 edebca7e edebca7e 8aac0292 5d45fb53  .*
+ 0d70 5d45fb53 a2188c89 cd9e2b29 cd9e2b29  .*
+ 0d80 ba841581 3df85bfe 3df85bfe a2fdeda0  .*
+ 0d90 d8a86d79 d8a86d79 96431998 eddc674e  .*
+ 0da0 eddc674e 8a89448f 02116223 02116223  .*
+ 0db0 7ecf6f86 17455cf8 17455cf8 d2ba62a7  .*
+ 0dc0 c3651074 c3651074 a2da2f9e 7d74d448  .*
+ 0dd0 7d74d448 72fafc94 3783981d 3783981d  .*
+ 0de0 421aca8b f1915cf2 f1915cf2 0278d7ad  .*
+ 0df0 ae22b36e ae22b36e ae7146a4 0d0c4143  .*
+ 0e00 0d0c4143 5a6bb59a 6cf5ce17 6cf5ce17  .*
+ 0e10 06652491 cbde5cec cbde5cec 32354cb4  .*
+ 0e20 99df5569 99df5569 ba085daa 9da3ad3d  .*
+ 0e30 9da3ad3d 42dc6da0 a1670512 a1670512  .*
+ 0e40 caaf7e96 a52b5de6 a52b5de6 62f2c0ba  .*
+ 0e50 849cf863 849cf863 c69f73b0 2d3b1a38  .*
+ 0e60 2d3b1a38 2a4d26a6 d6d93b0c d6d93b0c  .*
+ 0e70 8efad89b 7f785de0 7f785de0 92af35c1  .*
+ 0e80 6f599b5e 6f599b5e d2368ab6 bdd28632  .*
+ 0e90 bdd28632 12bedeab 0b4c7206 0b4c7206  .*
+ 0ea0 524533a1 59c55dda 59c55dda c26caac7  .*
+ 0eb0 5a163e59 5a163e59 decda0bc 4d6af32c  .*
+ 0ec0 4d6af32c fa2e97b1 40bea800 40bea800  .*
+ 0ed0 16908da6 33125ed4 33125ed4 f2291fce  .*
+ 0ee0 45d3e053 45d3e053 ea64b7c2 dd016027  .*
+ 0ef0 dd016027 e29f4fb7 7530dffa 7530dffa  .*
+ 0f00 dadae7ab 0d5f5ece 0d5f5ece 00000000  .*
+ 0f10 00000000 00000000 00000000 00000000  .*
+ 0f20 00000000 00000000 00000000 00000000  .*
+ 0f30 00000000 00000000 00000000 00000000  .*
+ 0f40 00000000 00000000 00000000 00000000  .*
+ 0f50 00000000 00000000 00000000 00000000  .*
+ 0f60 00000000 00000000 00000000 00000000  .*
+ 0f70 00000000 00000000 00000000 00000000  .*
+ 0f80 00000000 00000000 00000000 00000000  .*
+ 0f90 00000000 00000000 00000000 00000000  .*
+ 0fa0 00000000 00000000 00000000 00000000  .*
+ 0fb0 00000000 00000000 00000000 00000000  .*
+ 0fc0 00000000 00000000 00000000 00000000  .*
+ 0fd0 00000000 00000000 00000000 00000000  .*
+ 0fe0 00000000 00000000 00000000 00000000  .*
+ 0ff0 00000000 00000000 00000000 00000000  .*
diff --git a/gas/testsuite/gas/tilepro/t_constants.s b/gas/testsuite/gas/tilepro/t_constants.s
new file mode 100644
index 0000000..bf36a25
--- /dev/null
+++ b/gas/testsuite/gas/tilepro/t_constants.s
@@ -0,0 +1,639 @@
+	.text
+	.global _start
+_start:
+	.data
+	.align 1024
+label_1:
+	.byte 0x37
+	.align 8
+	.byte 0x38
+	.byte 0x39
+	.byte -0x3A
+	.align 4
+label_2:
+	.byte 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
+	.byte 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
+	.byte 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
+	.byte 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F
+	.byte 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27
+	.byte 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F
+	.byte 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37
+	.byte 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F
+	.byte 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47
+	.byte 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F
+	.byte 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57
+	.byte 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F
+	.byte 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67
+	.byte 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F
+	.byte 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77
+	.byte 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F
+	.byte 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87
+	.byte 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F
+	.byte 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97
+	.byte 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F
+	.byte 0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7
+	.byte 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF
+	.byte 0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7
+	.byte 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF
+	.byte 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7
+	.byte 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF
+	.byte 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7
+	.byte 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF
+	.byte 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7
+	.byte 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF
+	.byte 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7
+	.byte 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
+
+	.short 0x0000, 0x0011, 0x0022, 0x0033, 0x0044, 0x0055
+	.short 0x07ED, 0x07FE, 0x080F, 0x0820, 0x0831, 0x0842
+	.short 0x0FDA, 0x0FEB, 0x0FFC, 0x100D, 0x101E, 0x102F
+	.short 0x17C7, 0x17D8, 0x17E9, 0x17FA, 0x180B, 0x181C
+	.short 0x1FB4, 0x1FC5, 0x1FD6, 0x1FE7, 0x1FF8, 0x2009
+	.short 0x27A1, 0x27B2, 0x27C3, 0x27D4, 0x27E5, 0x27F6
+	.short 0x2F8E, 0x2F9F, 0x2FB0, 0x2FC1, 0x2FD2, 0x2FE3
+	.short 0x377B, 0x378C, 0x379D, 0x37AE, 0x37BF, 0x37D0
+	.short 0x3F68, 0x3F79, 0x3F8A, 0x3F9B, 0x3FAC, 0x3FBD
+	.short 0x4755, 0x4766, 0x4777, 0x4788, 0x4799, 0x47AA
+	.short 0x4F42, 0x4F53, 0x4F64, 0x4F75, 0x4F86, 0x4F97
+	.short 0x572F, 0x5740, 0x5751, 0x5762, 0x5773, 0x5784
+	.short 0x5F1C, 0x5F2D, 0x5F3E, 0x5F4F, 0x5F60, 0x5F71
+	.short 0x6709, 0x671A, 0x672B, 0x673C, 0x674D, 0x675E
+	.short 0x6EF6, 0x6F07, 0x6F18, 0x6F29, 0x6F3A, 0x6F4B
+	.short 0x76E3, 0x76F4, 0x7705, 0x7716, 0x7727, 0x7738
+	.short 0x7ED0, 0x7EE1, 0x7EF2, 0x7F03, 0x7F14, 0x7F25
+	.short 0x86BD, 0x86CE, 0x86DF, 0x86F0, 0x8701, 0x8712
+	.short 0x8EAA, 0x8EBB, 0x8ECC, 0x8EDD, 0x8EEE, 0x8EFF
+	.short 0x9697, 0x96A8, 0x96B9, 0x96CA, 0x96DB, 0x96EC
+	.short 0x9E84, 0x9E95, 0x9EA6, 0x9EB7, 0x9EC8, 0x9ED9
+	.short 0xA671, 0xA682, 0xA693, 0xA6A4, 0xA6B5, 0xA6C6
+	.short 0xAE5E, 0xAE6F, 0xAE80, 0xAE91, 0xAEA2, 0xAEB3
+	.short 0xB64B, 0xB65C, 0xB66D, 0xB67E, 0xB68F, 0xB6A0
+	.short 0xBE38, 0xBE49, 0xBE5A, 0xBE6B, 0xBE7C, 0xBE8D
+	.short 0xC625, 0xC636, 0xC647, 0xC658, 0xC669, 0xC67A
+	.short 0xCE12, 0xCE23, 0xCE34, 0xCE45, 0xCE56, 0xCE67
+	.short 0xD5FF, 0xD610, 0xD621, 0xD632, 0xD643, 0xD654
+	.short 0xDDEC, 0xDDFD, 0xDE0E, 0xDE1F, 0xDE30, 0xDE41
+	.short 0xE5D9, 0xE5EA, 0xE5FB, 0xE60C, 0xE61D, 0xE62E
+	.short 0xEDC6, 0xEDD7, 0xEDE8, 0xEDF9, 0xEE0A, 0xEE1B
+	.short 0xF5B3, 0xF5C4, 0xF5D5, 0xF5E6, 0xF5F7, 0xF608
+
+	.word 0x12345678, 0x12262E5D, 0x12180642, 0x1209DE27
+	.word 0x195FF83B, 0x1951D4C8, 0x1943B155, 0x19358DE2
+	.word 0x208B99FE, 0x207D7B33, 0x206F5C68, 0x20613D9D
+	.word 0x27B73BC1, 0x27A9219E, 0x279B077B, 0x278CED58
+	.word 0x2EE2DD84, 0x2ED4C809, 0x2EC6B28E, 0x2EB89D13
+	.word 0x360E7F47, 0x36006E74, 0x35F25DA1, 0x35E44CCE
+	.word 0x3D3A210A, 0x3D2C14DF, 0x3D1E08B4, 0x3D0FFC89
+	.word 0x4465C2CD, 0x4457BB4A, 0x4449B3C7, 0x443BAC44
+	.word 0x4B916490, 0x4B8361B5, 0x4B755EDA, 0x4B675BFF
+	.word 0x52BD0653, 0x52AF0820, 0x52A109ED, 0x52930BBA
+	.word 0x59E8A816, 0x59DAAE8B, 0x59CCB500, 0x59BEBB75
+	.word 0x611449D9, 0x610654F6, 0x60F86013, 0x60EA6B30
+	.word 0x683FEB9C, 0x6831FB61, 0x68240B26, 0x68161AEB
+	.word 0x6F6B8D5F, 0x6F5DA1CC, 0x6F4FB639, 0x6F41CAA6
+	.word 0x76972F22, 0x76894837, 0x767B614C, 0x766D7A61
+	.word 0x7DC2D0E5, 0x7DB4EEA2, 0x7DA70C5F, 0x7D992A1C
+	.word 0x84EE72A8, 0x84E0950D, 0x84D2B772, 0x84C4D9D7
+	.word 0x8C1A146B, 0x8C0C3B78, 0x8BFE6285, 0x8BF08992
+	.word 0x9345B62E, 0x9337E1E3, 0x932A0D98, 0x931C394D
+	.word 0x9A7157F1, 0x9A63884E, 0x9A55B8AB, 0x9A47E908
+	.word 0xA19CF9B4, 0xA18F2EB9, 0xA18163BE, 0xA17398C3
+	.word 0xA8C89B77, 0xA8BAD524, 0xA8AD0ED1, 0xA89F487E
+	.word 0xAFF43D3A, 0xAFE67B8F, 0xAFD8B9E4, 0xAFCAF839
+	.word 0xB71FDEFD, 0xB71221FA, 0xB70464F7, 0xB6F6A7F4
+	.word 0xBE4B80C0, 0xBE3DC865, 0xBE30100A, 0xBE2257AF
+	.word 0xC5772283, 0xC5696ED0, 0xC55BBB1D, 0xC54E076A
+	.word 0xCCA2C446, 0xCC95153B, 0xCC876630, 0xCC79B725
+	.word 0xD3CE6609, 0xD3C0BBA6, 0xD3B31143, 0xD3A566E0
+	.word 0xDAFA07CC, 0xDAEC6211, 0xDADEBC56, 0xDAD1169B
+	.word 0xE225A98F, 0xE218087C, 0xE20A6769, 0xE1FCC656
+	.word 0xE9514B52, 0xE943AEE7, 0xE936127C, 0xE9287611
+	.word 0xF07CED15, 0xF06F5552, 0xF061BD8F, 0xF05425CC
+
+	.byte 0, 1, 2, 3, 4, 5, 6, 7
+	.byte 8, 9, 10, 11, 12, 13, 14, 15
+	.byte 16, 17, 18, 19, 20, 21, 22, 23
+	.byte 24, 25, 26, 27, 28, 29, 30, 31
+	.byte 32, 33, 34, 35, 36, 37, 38, 39
+	.byte 40, 41, 42, 43, 44, 45, 46, 47
+	.byte 48, 49, 50, 51, 52, 53, 54, 55
+	.byte 56, 57, 58, 59, 60, 61, 62, 63
+	.byte 64, 65, 66, 67, 68, 69, 70, 71
+	.byte 72, 73, 74, 75, 76, 77, 78, 79
+	.byte 80, 81, 82, 83, 84, 85, 86, 87
+	.byte 88, 89, 90, 91, 92, 93, 94, 95
+	.byte 96, 97, 98, 99, 100, 101, 102, 103
+	.byte 104, 105, 106, 107, 108, 109, 110, 111
+	.byte 112, 113, 114, 115, 116, 117, 118, 119
+	.byte 120, 121, 122, 123, 124, 125, 126, 127
+	.byte -128, -127, -126, -125, -124, -123, -122, -121
+	.byte -120, -119, -118, -117, -116, -115, -114, -113
+	.byte -112, -111, -110, -109, -108, -107, -106, -105
+	.byte -104, -103, -102, -101, -100, -99, -98, -97
+	.byte -96, -95, -94, -93, -92, -91, -90, -89
+	.byte -88, -87, -86, -85, -84, -83, -82, -81
+	.byte -80, -79, -78, -77, -76, -75, -74, -73
+	.byte -72, -71, -70, -69, -68, -67, -66, -65
+	.byte -64, -63, -62, -61, -60, -59, -58, -57
+	.byte -56, -55, -54, -53, -52, -51, -50, -49
+	.byte -48, -47, -46, -45, -44, -43, -42, -41
+	.byte -40, -39, -38, -37, -36, -35, -34, -33
+	.byte -32, -31, -30, -29, -28, -27, -26, -25
+	.byte -24, -23, -22, -21, -20, -19, -18, -17
+	.byte -16, -15, -14, -13, -12, -11, -10, -9
+	.byte -8, -7, -6, -5, -4, -3, -2, -1
+
+	.short 0, 17, 34, 51, 68, 85
+	.short 2029, 2046, 2063, 2080, 2097, 2114
+	.short 4058, 4075, 4092, 4109, 4126, 4143
+	.short 6087, 6104, 6121, 6138, 6155, 6172
+	.short 8116, 8133, 8150, 8167, 8184, 8201
+	.short 10145, 10162, 10179, 10196, 10213, 10230
+	.short 12174, 12191, 12208, 12225, 12242, 12259
+	.short 14203, 14220, 14237, 14254, 14271, 14288
+	.short 16232, 16249, 16266, 16283, 16300, 16317
+	.short 18261, 18278, 18295, 18312, 18329, 18346
+	.short 20290, 20307, 20324, 20341, 20358, 20375
+	.short 22319, 22336, 22353, 22370, 22387, 22404
+	.short 24348, 24365, 24382, 24399, 24416, 24433
+	.short 26377, 26394, 26411, 26428, 26445, 26462
+	.short 28406, 28423, 28440, 28457, 28474, 28491
+	.short 30435, 30452, 30469, 30486, 30503, 30520
+	.short 32464, 32481, 32498, 32515, 32532, 32549
+	.short -31043, -31026, -31009, -30992, -30975, -30958
+	.short -29014, -28997, -28980, -28963, -28946, -28929
+	.short -26985, -26968, -26951, -26934, -26917, -26900
+	.short -24956, -24939, -24922, -24905, -24888, -24871
+	.short -22927, -22910, -22893, -22876, -22859, -22842
+	.short -20898, -20881, -20864, -20847, -20830, -20813
+	.short -18869, -18852, -18835, -18818, -18801, -18784
+	.short -16840, -16823, -16806, -16789, -16772, -16755
+	.short -14811, -14794, -14777, -14760, -14743, -14726
+	.short -12782, -12765, -12748, -12731, -12714, -12697
+	.short -10753, -10736, -10719, -10702, -10685, -10668
+	.short -8724, -8707, -8690, -8673, -8656, -8639
+	.short -6695, -6678, -6661, -6644, -6627, -6610
+	.short -4666, -4649, -4632, -4615, -4598, -4581
+	.short -2637, -2620, -2603, -2586, -2569, -2552
+
+	.word 305419896, 304492125, 303564354, 302636583
+	.word 1025669867, 1024740949, 1023812031, 1022883113
+	.word 1745919838, 1744989773, 1744059708, 1743129643
+	.word -1828797487, -1829728699, -1830659911, -1831591123
+	.word -1108547516, -1109479875, -1110412234, -1111344593
+	.word -388297545, -389231051, -390164557, -391098063
+	.word 331952426, 331017773, 330083120, 329148467
+	.word 1052202397, 1051266597, 1050330797, 1049394997
+	.word 1772452368, 1771515421, 1770578474, 1769641527
+	.word -1802264957, -1803203051, -1804141145, -1805079239
+	.word -1082014986, -1082954227, -1083893468, -1084832709
+	.word -361765015, -362705403, -363645791, -364586179
+	.word 358484956, 357543421, 356601886, 355660351
+	.word 1078734927, 1077792245, 1076849563, 1075906881
+	.word 1798984898, 1798041069, 1797097240, 1796153411
+	.word -1775732427, -1776677403, -1777622379, -1778567355
+	.word -1055482456, -1056428579, -1057374702, -1058320825
+	.word -335232485, -336179755, -337127025, -338074295
+	.word 385017486, 384069069, 383120652, 382172235
+	.word 1105267457, 1104317893, 1103368329, 1102418765
+	.word 1825517428, 1824566717, 1823616006, 1822665295
+	.word -1749199897, -1750151755, -1751103613, -1752055471
+	.word -1028949926, -1029902931, -1030855936, -1031808941
+	.word -308699955, -309654107, -310608259, -311562411
+	.word 411550016, 410594717, 409639418, 408684119
+	.word 1131799987, 1130843541, 1129887095, 1128930649
+	.word 1852049958, 1851092365, 1850134772, 1849177179
+	.word -1722667367, -1723626107, -1724584847, -1725543587
+	.word -1002417396, -1003377283, -1004337170, -1005297057
+	.word -282167425, -283128459, -284089493, -285050527
+	.word 438082546, 437120365, 436158184, 435196003
+	.word 1158332517, 1157369189, 1156405861, 1155442533
+	.int 1254161 + 99163665
+	.word 1254161 - 99163665 + 126416
+	.word 126416 - (99163665 - 1254161)
+	.int 1206444 + 99135946
+	.word 1206444 - 99135946 + -636489589
+	.word -636489589 - (99135946 - 1206444)
+	.int 1158727 + 99108227
+	.word 1158727 - 99108227 + -1273105594
+	.word -1273105594 - (99108227 - 1158727)
+	.int 1111010 + 99080508
+	.word 1111010 - 99080508 + -1909721599
+	.word -1909721599 - (99080508 - 1111010)
+
+	.int 10371432 + 198360298
+	.word 10371432 - 198360298 + 207677
+	.word 207677 - (198360298 - 10371432)
+	.int 10322568 + 192163578
+	.word 10322568 - 192163578 + -646124689
+	.word -646124689 - (192163578 - 10322568)
+	.int 10273704 + 185966858
+	.word 10273704 - 185966858 + -1292457055
+	.word -1292457055 - (185966858 - 10273704)
+	.int 10224840 + 179770138
+	.word 10224840 - 179770138 + -1938789421
+	.word -1938789421 - (179770138 - 10224840)
+
+	.int 19488703 + 297556931
+	.word 19488703 - 297556931 + 288938
+	.word 288938 - (297556931 - 19488703)
+	.int 19438692 + 285191210
+	.word 19438692 - 285191210 + -655759789
+	.word -655759789 - (285191210 - 19438692)
+	.int 19388681 + 272825489
+	.word 19388681 - 272825489 + -1311808516
+	.word -1311808516 - (272825489 - 19388681)
+	.int 19338670 + 260459768
+	.word 19338670 - 260459768 + -1967857243
+	.word -1967857243 - (260459768 - 19338670)
+
+	.int 28605974 + 396753564
+	.word 28605974 - 396753564 + 370199
+	.word 370199 - (396753564 - 28605974)
+	.int 28554816 + 378218842
+	.word 28554816 - 378218842 + -665394889
+	.word -665394889 - (378218842 - 28554816)
+	.int 28503658 + 359684120
+	.word 28503658 - 359684120 + -1331159977
+	.word -1331159977 - (359684120 - 28503658)
+	.int 28452500 + 341149398
+	.word 28452500 - 341149398 + -1996925065
+	.word -1996925065 - (341149398 - 28452500)
+
+	.int 37723245 + 495950197
+	.word 37723245 - 495950197 + 451460
+	.word 451460 - (495950197 - 37723245)
+	.int 37670940 + 471246474
+	.word 37670940 - 471246474 + -675029989
+	.word -675029989 - (471246474 - 37670940)
+	.int 37618635 + 446542751
+	.word 37618635 - 446542751 + -1350511438
+	.word -1350511438 - (446542751 - 37618635)
+	.int 37566330 + 421839028
+	.word 37566330 - 421839028 + -2025992887
+	.word -2025992887 - (421839028 - 37566330)
+
+	.int 46840516 + 595146830
+	.word 46840516 - 595146830 + 532721
+	.word 532721 - (595146830 - 46840516)
+	.int 46787064 + 564274106
+	.word 46787064 - 564274106 + -684665089
+	.word -684665089 - (564274106 - 46787064)
+	.int 46733612 + 533401382
+	.word 46733612 - 533401382 + -1369862899
+	.word -1369862899 - (533401382 - 46733612)
+	.int 46680160 + 502528658
+	.word 46680160 - 502528658 + -2055060709
+	.word -2055060709 - (502528658 - 46680160)
+
+	.int 55957787 + 694343463
+	.word 55957787 - 694343463 + 613982
+	.word 613982 - (694343463 - 55957787)
+	.int 55903188 + 657301738
+	.word 55903188 - 657301738 + -694300189
+	.word -694300189 - (657301738 - 55903188)
+	.int 55848589 + 620260013
+	.word 55848589 - 620260013 + -1389214360
+	.word -1389214360 - (620260013 - 55848589)
+	.int 55793990 + 583218288
+	.word 55793990 - 583218288 + -2084128531
+	.word -2084128531 - (583218288 - 55793990)
+
+	.int 65075058 + 793540096
+	.word 65075058 - 793540096 + 695243
+	.word 695243 - (793540096 - 65075058)
+	.int 65019312 + 750329370
+	.word 65019312 - 750329370 + -703935289
+	.word -703935289 - (750329370 - 65019312)
+	.int 64963566 + 707118644
+	.word 64963566 - 707118644 + -1408565821
+	.word -1408565821 - (707118644 - 64963566)
+	.int 64907820 + 663907918
+	.word 64907820 - 663907918 + -2113196353
+	.word -2113196353 - (663907918 - 64907820)
+
+	.int 74192329 + 892736729
+	.word 74192329 - 892736729 + 776504
+	.word 776504 - (892736729 - 74192329)
+	.int 74135436 + 843357002
+	.word 74135436 - 843357002 + -713570389
+	.word -713570389 - (843357002 - 74135436)
+	.int 74078543 + 793977275
+	.word 74078543 - 793977275 + -1427917282
+	.word -1427917282 - (793977275 - 74078543)
+	.int 74021650 + 744597548
+	.word 74021650 - 744597548 + -2142264175
+	.word -2142264175 - (744597548 - 74021650)
+
+	.int 83309600 + 991933362
+	.word 83309600 - 991933362 + 857765
+	.word 857765 - (991933362 - 83309600)
+	.int 83251560 + 936384634
+	.word 83251560 - 936384634 + -723205489
+	.word -723205489 - (936384634 - 83251560)
+	.int 83193520 + 880835906
+	.word 83193520 - 880835906 + -1447268743
+	.word -1447268743 - (880835906 - 83193520)
+	.int 83135480 + 825287178
+	.word 83135480 - 825287178 + 2123635299
+	.word 2123635299 - (825287178 - 83135480)
+
+	.int 92426871 + 1091129995
+	.word 92426871 - 1091129995 + 939026
+	.word 939026 - (1091129995 - 92426871)
+	.int 92367684 + 1029412266
+	.word 92367684 - 1029412266 + -732840589
+	.word -732840589 - (1029412266 - 92367684)
+	.int 92308497 + 967694537
+	.word 92308497 - 967694537 + -1466620204
+	.word -1466620204 - (967694537 - 92308497)
+	.int 92249310 + 905976808
+	.word 92249310 - 905976808 + 2094567477
+	.word 2094567477 - (905976808 - 92249310)
+
+	.int 101544142 + 1190326628
+	.word 101544142 - 1190326628 + 1020287
+	.word 1020287 - (1190326628 - 101544142)
+	.int 101483808 + 1122439898
+	.word 101483808 - 1122439898 + -742475689
+	.word -742475689 - (1122439898 - 101483808)
+	.int 101423474 + 1054553168
+	.word 101423474 - 1054553168 + -1485971665
+	.word -1485971665 - (1054553168 - 101423474)
+	.int 101363140 + 986666438
+	.word 101363140 - 986666438 + 2065499655
+	.word 2065499655 - (986666438 - 101363140)
+
+	.int 110661413 + 1289523261
+	.word 110661413 - 1289523261 + 1101548
+	.word 1101548 - (1289523261 - 110661413)
+	.int 110599932 + 1215467530
+	.word 110599932 - 1215467530 + -752110789
+	.word -752110789 - (1215467530 - 110599932)
+	.int 110538451 + 1141411799
+	.word 110538451 - 1141411799 + -1505323126
+	.word -1505323126 - (1141411799 - 110538451)
+	.int 110476970 + 1067356068
+	.word 110476970 - 1067356068 + 2036431833
+	.word 2036431833 - (1067356068 - 110476970)
+
+	.int 119778684 + 1388719894
+	.word 119778684 - 1388719894 + 1182809
+	.word 1182809 - (1388719894 - 119778684)
+	.int 119716056 + 1308495162
+	.word 119716056 - 1308495162 + -761745889
+	.word -761745889 - (1308495162 - 119716056)
+	.int 119653428 + 1228270430
+	.word 119653428 - 1228270430 + -1524674587
+	.word -1524674587 - (1228270430 - 119653428)
+	.int 119590800 + 1148045698
+	.word 119590800 - 1148045698 + 2007364011
+	.word 2007364011 - (1148045698 - 119590800)
+
+	.int 128895955 + 1487916527
+	.word 128895955 - 1487916527 + 1264070
+	.word 1264070 - (1487916527 - 128895955)
+	.int 128832180 + 1401522794
+	.word 128832180 - 1401522794 + -771380989
+	.word -771380989 - (1401522794 - 128832180)
+	.int 128768405 + 1315129061
+	.word 128768405 - 1315129061 + -1544026048
+	.word -1544026048 - (1315129061 - 128768405)
+	.int 128704630 + 1228735328
+	.word 128704630 - 1228735328 + 1978296189
+	.word 1978296189 - (1228735328 - 128704630)
+
+	.int 138013226 + 1587113160
+	.word 138013226 - 1587113160 + 1345331
+	.word 1345331 - (1587113160 - 138013226)
+	.int 137948304 + 1494550426
+	.word 137948304 - 1494550426 + -781016089
+	.word -781016089 - (1494550426 - 137948304)
+	.int 137883382 + 1401987692
+	.word 137883382 - 1401987692 + -1563377509
+	.word -1563377509 - (1401987692 - 137883382)
+	.int 137818460 + 1309424958
+	.word 137818460 - 1309424958 + 1949228367
+	.word 1949228367 - (1309424958 - 137818460)
+
+	.int 147130497 + 1686309793
+	.word 147130497 - 1686309793 + 1426592
+	.word 1426592 - (1686309793 - 147130497)
+	.int 147064428 + 1587578058
+	.word 147064428 - 1587578058 + -790651189
+	.word -790651189 - (1587578058 - 147064428)
+	.int 146998359 + 1488846323
+	.word 146998359 - 1488846323 + -1582728970
+	.word -1582728970 - (1488846323 - 146998359)
+	.int 146932290 + 1390114588
+	.word 146932290 - 1390114588 + 1920160545
+	.word 1920160545 - (1390114588 - 146932290)
+
+	.int 156247768 + 1785506426
+	.word 156247768 - 1785506426 + 1507853
+	.word 1507853 - (1785506426 - 156247768)
+	.int 156180552 + 1680605690
+	.word 156180552 - 1680605690 + -800286289
+	.word -800286289 - (1680605690 - 156180552)
+	.int 156113336 + 1575704954
+	.word 156113336 - 1575704954 + -1602080431
+	.word -1602080431 - (1575704954 - 156113336)
+	.int 156046120 + 1470804218
+	.word 156046120 - 1470804218 + 1891092723
+	.word 1891092723 - (1470804218 - 156046120)
+
+	.int 165365039 + 1884703059
+	.word 165365039 - 1884703059 + 1589114
+	.word 1589114 - (1884703059 - 165365039)
+	.int 165296676 + 1773633322
+	.word 165296676 - 1773633322 + -809921389
+	.word -809921389 - (1773633322 - 165296676)
+	.int 165228313 + 1662563585
+	.word 165228313 - 1662563585 + -1621431892
+	.word -1621431892 - (1662563585 - 165228313)
+	.int 165159950 + 1551493848
+	.word 165159950 - 1551493848 + 1862024901
+	.word 1862024901 - (1551493848 - 165159950)
+
+	.int 174482310 + 1983899692
+	.word 174482310 - 1983899692 + 1670375
+	.word 1670375 - (1983899692 - 174482310)
+	.int 174412800 + 1866660954
+	.word 174412800 - 1866660954 + -819556489
+	.word -819556489 - (1866660954 - 174412800)
+	.int 174343290 + 1749422216
+	.word 174343290 - 1749422216 + -1640783353
+	.word -1640783353 - (1749422216 - 174343290)
+	.int 174273780 + 1632183478
+	.word 174273780 - 1632183478 + 1832957079
+	.word 1832957079 - (1632183478 - 174273780)
+
+	.int 183599581 + 2083096325
+	.word 183599581 - 2083096325 + 1751636
+	.word 1751636 - (2083096325 - 183599581)
+	.int 183528924 + 1959688586
+	.word 183528924 - 1959688586 + -829191589
+	.word -829191589 - (1959688586 - 183528924)
+	.int 183458267 + 1836280847
+	.word 183458267 - 1836280847 + -1660134814
+	.word -1660134814 - (1836280847 - 183458267)
+	.int 183387610 + 1712873108
+	.word 183387610 - 1712873108 + 1803889257
+	.word 1803889257 - (1712873108 - 183387610)
+
+	.int 192716852 + -2112674338
+	.word 192716852 - -2112674338 + 1832897
+	.word 1832897 - (-2112674338 - 192716852)
+	.int 192645048 + 2052716218
+	.word 192645048 - 2052716218 + -838826689
+	.word -838826689 - (2052716218 - 192645048)
+	.int 192573244 + 1923139478
+	.word 192573244 - 1923139478 + -1679486275
+	.word -1679486275 - (1923139478 - 192573244)
+	.int 192501440 + 1793562738
+	.word 192501440 - 1793562738 + 1774821435
+	.word 1774821435 - (1793562738 - 192501440)
+
+	.int 201834123 + -2013477705
+	.word 201834123 - -2013477705 + 1914158
+	.word 1914158 - (-2013477705 - 201834123)
+	.int 201761172 + 2145743850
+	.word 201761172 - 2145743850 + -848461789
+	.word -848461789 - (2145743850 - 201761172)
+	.int 201688221 + 2009998109
+	.word 201688221 - 2009998109 + -1698837736
+	.word -1698837736 - (2009998109 - 201688221)
+	.int 201615270 + 1874252368
+	.word 201615270 - 1874252368 + 1745753613
+	.word 1745753613 - (1874252368 - 201615270)
+
+	.int 210951394 + -1914281072
+	.word 210951394 - -1914281072 + 1995419
+	.word 1995419 - (-1914281072 - 210951394)
+	.int 210877296 + -2056195814
+	.word 210877296 - -2056195814 + -858096889
+	.word -858096889 - (-2056195814 - 210877296)
+	.int 210803198 + 2096856740
+	.word 210803198 - 2096856740 + -1718189197
+	.word -1718189197 - (2096856740 - 210803198)
+	.int 210729100 + 1954941998
+	.word 210729100 - 1954941998 + 1716685791
+	.word 1716685791 - (1954941998 - 210729100)
+
+	.int 220068665 + -1815084439
+	.word 220068665 - -1815084439 + 2076680
+	.word 2076680 - (-1815084439 - 220068665)
+	.int 219993420 + -1963168182
+	.word 219993420 - -1963168182 + -867731989
+	.word -867731989 - (-1963168182 - 219993420)
+	.int 219918175 + -2111251925
+	.word 219918175 - -2111251925 + -1737540658
+	.word -1737540658 - (-2111251925 - 219918175)
+	.int 219842930 + 2035631628
+	.word 219842930 - 2035631628 + 1687617969
+	.word 1687617969 - (2035631628 - 219842930)
+
+	.int 229185936 + -1715887806
+	.word 229185936 - -1715887806 + 2157941
+	.word 2157941 - (-1715887806 - 229185936)
+	.int 229109544 + -1870140550
+	.word 229109544 - -1870140550 + -877367089
+	.word -877367089 - (-1870140550 - 229109544)
+	.int 229033152 + -2024393294
+	.word 229033152 - -2024393294 + -1756892119
+	.word -1756892119 - (-2024393294 - 229033152)
+	.int 228956760 + 2116321258
+	.word 228956760 - 2116321258 + 1658550147
+	.word 1658550147 - (2116321258 - 228956760)
+
+	.int 238303207 + -1616691173
+	.word 238303207 - -1616691173 + 2239202
+	.word 2239202 - (-1616691173 - 238303207)
+	.int 238225668 + -1777112918
+	.word 238225668 - -1777112918 + -887002189
+	.word -887002189 - (-1777112918 - 238225668)
+	.int 238148129 + -1937534663
+	.word 238148129 - -1937534663 + -1776243580
+	.word -1776243580 - (-1937534663 - 238148129)
+	.int 238070590 + -2097956408
+	.word 238070590 - -2097956408 + 1629482325
+	.word 1629482325 - (-2097956408 - 238070590)
+
+	.int 247420478 + -1517494540
+	.word 247420478 - -1517494540 + 2320463
+	.word 2320463 - (-1517494540 - 247420478)
+	.int 247341792 + -1684085286
+	.word 247341792 - -1684085286 + -896637289
+	.word -896637289 - (-1684085286 - 247341792)
+	.int 247263106 + -1850676032
+	.word 247263106 - -1850676032 + -1795595041
+	.word -1795595041 - (-1850676032 - 247263106)
+	.int 247184420 + -2017266778
+	.word 247184420 - -2017266778 + 1600414503
+	.word 1600414503 - (-2017266778 - 247184420)
+
+	.int 256537749 + -1418297907
+	.word 256537749 - -1418297907 + 2401724
+	.word 2401724 - (-1418297907 - 256537749)
+	.int 256457916 + -1591057654
+	.word 256457916 - -1591057654 + -906272389
+	.word -906272389 - (-1591057654 - 256457916)
+	.int 256378083 + -1763817401
+	.word 256378083 - -1763817401 + -1814946502
+	.word -1814946502 - (-1763817401 - 256378083)
+	.int 256298250 + -1936577148
+	.word 256298250 - -1936577148 + 1571346681
+	.word 1571346681 - (-1936577148 - 256298250)
+
+	.int 265655020 + -1319101274
+	.word 265655020 - -1319101274 + 2482985
+	.word 2482985 - (-1319101274 - 265655020)
+	.int 265574040 + -1498030022
+	.word 265574040 - -1498030022 + -915907489
+	.word -915907489 - (-1498030022 - 265574040)
+	.int 265493060 + -1676958770
+	.word 265493060 - -1676958770 + -1834297963
+	.word -1834297963 - (-1676958770 - 265493060)
+	.int 265412080 + -1855887518
+	.word 265412080 - -1855887518 + 1542278859
+	.word 1542278859 - (-1855887518 - 265412080)
+
+	.int 274772291 + -1219904641
+	.word 274772291 - -1219904641 + 2564246
+	.word 2564246 - (-1219904641 - 274772291)
+	.int 274690164 + -1405002390
+	.word 274690164 - -1405002390 + -925542589
+	.word -925542589 - (-1405002390 - 274690164)
+	.int 274608037 + -1590100139
+	.word 274608037 - -1590100139 + -1853649424
+	.word -1853649424 - (-1590100139 - 274608037)
+	.int 274525910 + -1775197888
+	.word 274525910 - -1775197888 + 1513211037
+	.word 1513211037 - (-1775197888 - 274525910)
+
+	.int 283889562 + -1120708008
+	.word 283889562 - -1120708008 + 2645507
+	.word 2645507 - (-1120708008 - 283889562)
+	.int 283806288 + -1311974758
+	.word 283806288 - -1311974758 + -935177689
+	.word -935177689 - (-1311974758 - 283806288)
+	.int 283723014 + -1503241508
+	.word 283723014 - -1503241508 + -1873000885
+	.word -1873000885 - (-1503241508 - 283723014)
+	.int 283639740 + -1694508258
+	.word 283639740 - -1694508258 + 1484143215
+	.word 1484143215 - (-1694508258 - 283639740)
+
+	.word label_1, label_2, label_3
+	.word label_1 - 37
+	.word label_1 - label_2 + label_3
+	.word label_3 - (label_1 - label_2 + 47)
+	.short lo16(label_1 - label_2)
+	.short lo16(label_3 + 0x12345678 - label_1)
+	.short hi16(label_3 + 0x12345678 - label_1)
+	.short ha16(label_1 - label_3)
+	.short ha16(label_3 - label_1)
+	.short ha16(0x8000)
+	.short ha16(0x7230000)
+	.short ha16(0x723FFFF)
+label_3:
diff --git a/gas/testsuite/gas/tilepro/t_insns.d b/gas/testsuite/gas/tilepro/t_insns.d
new file mode 100644
index 0000000..8fe4f5f
--- /dev/null
+++ b/gas/testsuite/gas/tilepro/t_insns.d
@@ -0,0 +1,8177 @@
+#as:
+#objdump: -dr
+
+.*:     file format .*
+
+
+Disassembly of section .text:
+
+00000000 <target>:
+       0:	[0-9a-f]* 	{ nop }
+       8:	[0-9a-f]* 	{ nop }
+      10:	[0-9a-f]* 	{ nop }
+      18:	[0-9a-f]* 	{ nop }
+      20:	[0-9a-f]* 	{ nop }
+      28:	[0-9a-f]* 	{ nop }
+      30:	[0-9a-f]* 	{ nop }
+      38:	[0-9a-f]* 	{ nop }
+      40:	[0-9a-f]* 	{ nop }
+      48:	[0-9a-f]* 	{ nop }
+      50:	[0-9a-f]* 	{ nop }
+      58:	[0-9a-f]* 	{ nop }
+      60:	[0-9a-f]* 	{ nop }
+      68:	[0-9a-f]* 	{ nop }
+      70:	[0-9a-f]* 	{ nop }
+      78:	[0-9a-f]* 	{ nop }
+      80:	[0-9a-f]* 	{ nop }
+      88:	[0-9a-f]* 	{ nop }
+      90:	[0-9a-f]* 	{ nop }
+      98:	[0-9a-f]* 	{ nop }
+      a0:	[0-9a-f]* 	{ nop }
+      a8:	[0-9a-f]* 	{ nop }
+      b0:	[0-9a-f]* 	{ nop }
+      b8:	[0-9a-f]* 	{ nop }
+      c0:	[0-9a-f]* 	{ nop }
+      c8:	[0-9a-f]* 	{ nop }
+      d0:	[0-9a-f]* 	{ nop }
+      d8:	[0-9a-f]* 	{ nop }
+      e0:	[0-9a-f]* 	{ nop }
+      e8:	[0-9a-f]* 	{ nop }
+      f0:	[0-9a-f]* 	{ nop }
+      f8:	[0-9a-f]* 	{ nop }
+     100:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; bbnst r15, 0 <target> }
+     108:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; blezt r15, 0 <target> }
+     110:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; bbnst r15, 0 <target> }
+     118:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; bgezt r15, 0 <target> }
+     120:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; bzt r15, 0 <target> }
+     128:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; bbnst r15, 0 <target> }
+     130:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; bgzt r15, 0 <target> }
+     138:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; blezt r15, 0 <target> }
+     140:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; blzt r15, 0 <target> }
+     148:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; bbnst r15, 0 <target> }
+     150:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; bgzt r15, 0 <target> }
+     158:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; bz r15, 0 <target> }
+     160:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; blzt r15, 0 <target> }
+     168:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; blzt r15, 0 <target> }
+     170:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; bzt r15, 0 <target> }
+     178:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; bbst r15, 0 <target> }
+     180:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; bbs r15, 0 <target> }
+     188:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; bz r15, 0 <target> }
+     190:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; blzt r15, 0 <target> }
+     198:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; bgez r15, 0 <target> }
+     1a0:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; bbns r15, 0 <target> }
+     1a8:	[0-9a-f]* 	{ auli r5, r6, 4660 ; bzt r15, 0 <target> }
+     1b0:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; bgezt r15, 0 <target> }
+     1b8:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; blez r15, 0 <target> }
+     1c0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; bz r15, 0 <target> }
+     1c8:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; bzt r15, 0 <target> }
+     1d0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; bz r15, 0 <target> }
+     1d8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; bgzt r15, 0 <target> }
+     1e0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; bbnst r15, 0 <target> }
+     1e8:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; bbnst r15, 0 <target> }
+     1f0:	[0-9a-f]* 	{ addhs r5, r6, r7 ; blezt r15, 0 <target> }
+     1f8:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; blz r15, 0 <target> }
+     200:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; blzt r15, 0 <target> }
+     208:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; blez r15, 0 <target> }
+     210:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; bz r15, 0 <target> }
+     218:	[0-9a-f]* 	{ packhs r5, r6, r7 ; bnzt r15, 0 <target> }
+     220:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; bzt r15, 0 <target> }
+     228:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; bgez r15, 0 <target> }
+     230:	[0-9a-f]* 	{ slteh r5, r6, r7 ; bbnst r15, 0 <target> }
+     238:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; bgez r15, 0 <target> }
+     240:	[0-9a-f]* 	{ addb r5, r6, r7 ; bbnst r15, 0 <target> }
+     248:	[0-9a-f]* 	{ adds r5, r6, r7 ; bbnst r15, 0 <target> }
+     250:	[0-9a-f]* 	{ inthb r5, r6, r7 ; bgez r15, 0 <target> }
+     258:	[0-9a-f]* 	{ intlh r5, r6, r7 ; bbst r15, 0 <target> }
+     260:	[0-9a-f]* 	{ maxih r5, r6, 5 ; bgezt r15, 0 <target> }
+     268:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; blezt r15, 0 <target> }
+     270:	[0-9a-f]* 	{ packhs r5, r6, r7 ; blz r15, 0 <target> }
+     278:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; bnz r15, 0 <target> }
+     280:	[0-9a-f]* 	{ seqih r5, r6, 5 ; bgezt r15, 0 <target> }
+     288:	[0-9a-f]* 	{ shrib r5, r6, 5 ; bbnst r15, 0 <target> }
+     290:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; bzt r15, 0 <target> }
+     298:	[0-9a-f]* 	{ slteh r5, r6, r7 ; bgzt r15, 0 <target> }
+     2a0:	[0-9a-f]* 	{ sltib r5, r6, 5 ; bbnst r15, 0 <target> }
+     2a8:	[0-9a-f]* 	{ sneh r5, r6, r7 ; bgezt r15, 0 <target> }
+     2b0:	[0-9a-f]* 	{ subh r5, r6, r7 ; blezt r15, 0 <target> }
+     2b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; bbnst r15, 0 <target> }
+     2c0:	[0-9a-f]* 	{ addhs r5, r6, r7 ; bbs r15, 0 <target> }
+     2c8:	[0-9a-f]* 	{ addih r5, r6, 5 ; blzt r15, 0 <target> }
+     2d0:	[0-9a-f]* 	{ avgh r5, r6, r7 ; bgez r15, 0 <target> }
+     2d8:	[0-9a-f]* 	{ intlh r5, r6, r7 ; bbs r15, 0 <target> }
+     2e0:	[0-9a-f]* 	{ maxih r5, r6, 5 ; bnzt r15, 0 <target> }
+     2e8:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; bbns r15, 0 <target> }
+     2f0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; bgez r15, 0 <target> }
+     2f8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; bbnst r15, 0 <target> }
+     300:	[0-9a-f]* 	{ sadh r5, r6, r7 ; blzt r15, 0 <target> }
+     308:	[0-9a-f]* 	{ seqi r5, r6, 5 ; bbnst r15, 0 <target> }
+     310:	[0-9a-f]* 	{ shlb r5, r6, r7 ; bbns r15, 0 <target> }
+     318:	[0-9a-f]* 	{ shlib r5, r6, 5 ; bgzt r15, 0 <target> }
+     320:	[0-9a-f]* 	{ shrb r5, r6, r7 ; bnzt r15, 0 <target> }
+     328:	[0-9a-f]* 	{ shrih r5, r6, 5 ; bgez r15, 0 <target> }
+     330:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; bz r15, 0 <target> }
+     338:	[0-9a-f]* 	{ slth r5, r6, r7 ; bbst r15, 0 <target> }
+     340:	[0-9a-f]* 	{ sltib r5, r6, 5 ; blzt r15, 0 <target> }
+     348:	[0-9a-f]* 	{ sneb r5, r6, r7 ; bnzt r15, 0 <target> }
+     350:	[0-9a-f]* 	{ srah r5, r6, r7 ; bgez r15, 0 <target> }
+     358:	[0-9a-f]* 	{ sraih r5, r6, 5 ; blzt r15, 0 <target> }
+     360:	[0-9a-f]* 	{ subhs r5, r6, r7 ; bgz r15, 0 <target> }
+     368:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; bgez r15, 0 <target> }
+     370:	[0-9a-f]* 	{ xor r5, r6, r7 ; bgezt r15, 0 <target> }
+     378:	[0-9a-f]* 	{ addh r5, r6, r7 ; bnz r15, 0 <target> }
+     380:	[0-9a-f]* 	{ addli r5, r6, 4660 ; jal 0 <target> }
+     388:	[0-9a-f]* 	{ avgh r5, r6, r7 ; bbs r15, 0 <target> }
+     390:	[0-9a-f]* 	{ minh r5, r6, r7 ; bbs r15, 0 <target> }
+     398:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; bnz r15, 0 <target> }
+     3a0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; bnz r15, 0 <target> }
+     3a8:	[0-9a-f]* 	{ mzh r5, r6, r7 ; bbst r15, 0 <target> }
+     3b0:	[0-9a-f]* 	{ rl r5, r6, r7 ; bgezt r15, 0 <target> }
+     3b8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; bbst r15, 0 <target> }
+     3c0:	[0-9a-f]* 	{ seqb r5, r6, r7 ; bgz r15, 0 <target> }
+     3c8:	[0-9a-f]* 	{ seqib r5, r6, 5 ; bzt r15, 0 <target> }
+     3d0:	[0-9a-f]* 	{ shlh r5, r6, r7 ; blz r15, 0 <target> }
+     3d8:	[0-9a-f]* 	{ shr r5, r6, r7 ; bbns r15, 0 <target> }
+     3e0:	[0-9a-f]* 	{ shri r5, r6, 5 ; bgzt r15, 0 <target> }
+     3e8:	[0-9a-f]* 	{ slt r5, r6, r7 ; bnzt r15, 0 <target> }
+     3f0:	[0-9a-f]* 	{ slti r5, r6, 5 ; bbst r15, 0 <target> }
+     3f8:	[0-9a-f]* 	{ sne r5, r6, r7 ; bgzt r15, 0 <target> }
+     400:	[0-9a-f]* 	{ sra r5, r6, r7 ; bnzt r15, 0 <target> }
+     408:	[0-9a-f]* 	{ sraib r5, r6, 5 ; blz r15, 0 <target> }
+     410:	[0-9a-f]* 	{ subh r5, r6, r7 ; bbs r15, 0 <target> }
+     418:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; bzt r15, 0 <target> }
+     420:	[0-9a-f]* 	{ xori r5, r6, 5 ; bgez r15, 0 <target> }
+     428:	[0-9a-f]* 	{ adds r5, r6, r7 ; bz r15, 0 <target> }
+     430:	[0-9a-f]* 	{ infol 4660 ; blezt r15, 0 <target> }
+     438:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; jal 0 <target> }
+     440:	[0-9a-f]* 	{ mzb r5, r6, r7 ; bgz r15, 0 <target> }
+     448:	[0-9a-f]* 	{ or r5, r6, r7 ; bnzt r15, 0 <target> }
+     450:	[0-9a-f]* 	{ rli r5, r6, 5 ; blez r15, 0 <target> }
+     458:	[0-9a-f]* 	{ seq r5, r6, r7 ; bgz r15, 0 <target> }
+     460:	[0-9a-f]* 	{ shli r5, r6, 5 ; bbs r15, 0 <target> }
+     468:	[0-9a-f]* 	{ shrih r5, r6, 5 ; bz r15, 0 <target> }
+     470:	[0-9a-f]* 	{ sne r5, r6, r7 ; bzt r15, 0 <target> }
+     478:	[0-9a-f]* 	{ sub r5, r6, r7 ; bnz r15, 0 <target> }
+     480:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; jal 0 <target> }
+     488:	[0-9a-f]* 	{ infol 4660 ; blez r15, 0 <target> }
+     490:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; j 0 <target> }
+     498:	[0-9a-f]* 	{ pcnt r5, r6 ; bbnst r15, 0 <target> }
+     4a0:	[0-9a-f]* 	{ shl r5, r6, r7 ; bz r15, 0 <target> }
+     4a8:	[0-9a-f]* 	{ bitx r5, r6 ; bbst r15, 0 <target> }
+     4b0:	[0-9a-f]* 	{ infol 4660 ; blz r15, 0 <target> }
+     4b8:	[0-9a-f]* 	{ movei r5, 5 ; blzt r15, 0 <target> }
+     4c0:	[0-9a-f]* 	{ pcnt r5, r6 ; bbns r15, 0 <target> }
+     4c8:	[0-9a-f]* 	{ bitx r5, r6 ; blz r15, 0 <target> }
+     4d0:	[0-9a-f]* 	{ inthb r5, r6, r7 ; jal 0 <target> }
+     4d8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; j 0 <target> }
+     4e0:	[0-9a-f]* 	{ clz r5, r6 ; bbs r15, 0 <target> }
+     4e8:	[0-9a-f]* 	{ move r5, r6 ; bz r15, 0 <target> }
+     4f0:	[0-9a-f]* 	{ shrh r5, r6, r7 ; jal 0 <target> }
+     4f8:	[0-9a-f]* 	{ subh r5, r6, r7 ; jal 0 <target> }
+     500:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jal 0 <target> }
+     508:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; j 0 <target> }
+     510:	[0-9a-f]* 	{ info 19 ; bnzt r15, 0 <target> }
+     518:	[0-9a-f]* 	{ shlib r5, r6, 5 ; j 0 <target> }
+     520:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; j 0 <target> }
+     528:	[0-9a-f]* 	{ s1a r5, r6, r7 ; j 0 <target> }
+     530:	[0-9a-f]* 	{ blezt r15, 0 <target> }
+     538:	[0-9a-f]* 	{ infol 4660 ; j 0 <target> }
+     540:	[0-9a-f]* 	{ clz r5, r6 ; j 0 <target> }
+     548:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; bbnst r15, 0 <target> }
+     550:	[0-9a-f]* 	{ inthh r5, r6, r7 ; bbnst r15, 0 <target> }
+     558:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; bbnst r15, 0 <target> }
+     560:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; bbnst r15, 0 <target> }
+     568:	[0-9a-f]* 	{ s3a r5, r6, r7 ; bbnst r15, 0 <target> }
+     570:	[0-9a-f]* 	{ shrb r5, r6, r7 ; bbnst r15, 0 <target> }
+     578:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; bbnst r15, 0 <target> }
+     580:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; bbnst r15, 0 <target> }
+     588:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; bgezt r15, 0 <target> }
+     590:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; bgezt r15, 0 <target> }
+     598:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; bgezt r15, 0 <target> }
+     5a0:	[0-9a-f]* 	{ nop ; bgezt r15, 0 <target> }
+     5a8:	[0-9a-f]* 	{ seq r5, r6, r7 ; bgezt r15, 0 <target> }
+     5b0:	[0-9a-f]* 	{ sltb r5, r6, r7 ; bgezt r15, 0 <target> }
+     5b8:	[0-9a-f]* 	{ srab r5, r6, r7 ; bgezt r15, 0 <target> }
+     5c0:	[0-9a-f]* 	{ addh r5, r6, r7 ; blezt r15, 0 <target> }
+     5c8:	[0-9a-f]* 	{ ctz r5, r6 ; blezt r15, 0 <target> }
+     5d0:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; blezt r15, 0 <target> }
+     5d8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; blezt r15, 0 <target> }
+     5e0:	[0-9a-f]* 	{ packlb r5, r6, r7 ; blezt r15, 0 <target> }
+     5e8:	[0-9a-f]* 	{ shlb r5, r6, r7 ; blezt r15, 0 <target> }
+     5f0:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; blezt r15, 0 <target> }
+     5f8:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; blezt r15, 0 <target> }
+     600:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; bbns r15, 0 <target> }
+     608:	[0-9a-f]* 	{ inthh r5, r6, r7 ; bbns r15, 0 <target> }
+     610:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; bbns r15, 0 <target> }
+     618:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; bbns r15, 0 <target> }
+     620:	[0-9a-f]* 	{ s3a r5, r6, r7 ; bbns r15, 0 <target> }
+     628:	[0-9a-f]* 	{ shrb r5, r6, r7 ; bbns r15, 0 <target> }
+     630:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; bbns r15, 0 <target> }
+     638:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; bbns r15, 0 <target> }
+     640:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; bbst r15, 0 <target> }
+     648:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; bbst r15, 0 <target> }
+     650:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; bbst r15, 0 <target> }
+     658:	[0-9a-f]* 	{ nop ; bbst r15, 0 <target> }
+     660:	[0-9a-f]* 	{ seq r5, r6, r7 ; bbst r15, 0 <target> }
+     668:	[0-9a-f]* 	{ sltb r5, r6, r7 ; bbst r15, 0 <target> }
+     670:	[0-9a-f]* 	{ srab r5, r6, r7 ; bbst r15, 0 <target> }
+     678:	[0-9a-f]* 	{ addh r5, r6, r7 ; bgez r15, 0 <target> }
+     680:	[0-9a-f]* 	{ ctz r5, r6 ; bgez r15, 0 <target> }
+     688:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; bgez r15, 0 <target> }
+     690:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; bgez r15, 0 <target> }
+     698:	[0-9a-f]* 	{ packlb r5, r6, r7 ; bgez r15, 0 <target> }
+     6a0:	[0-9a-f]* 	{ shlb r5, r6, r7 ; bgez r15, 0 <target> }
+     6a8:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; bgez r15, 0 <target> }
+     6b0:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; bgez r15, 0 <target> }
+     6b8:	[0-9a-f]* 	{ adds r5, r6, r7 ; bgzt r15, 0 <target> }
+     6c0:	[0-9a-f]* 	{ intlb r5, r6, r7 ; bgzt r15, 0 <target> }
+     6c8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; bgzt r15, 0 <target> }
+     6d0:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; bgzt r15, 0 <target> }
+     6d8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; bgzt r15, 0 <target> }
+     6e0:	[0-9a-f]* 	{ shrh r5, r6, r7 ; bgzt r15, 0 <target> }
+     6e8:	[0-9a-f]* 	{ sltih r5, r6, 5 ; bgzt r15, 0 <target> }
+     6f0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; bgzt r15, 0 <target> }
+     6f8:	[0-9a-f]* 	{ avgh r5, r6, r7 ; blez r15, 0 <target> }
+     700:	[0-9a-f]* 	{ minh r5, r6, r7 ; blez r15, 0 <target> }
+     708:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; blez r15, 0 <target> }
+     710:	[0-9a-f]* 	{ nor r5, r6, r7 ; blez r15, 0 <target> }
+     718:	[0-9a-f]* 	{ seqb r5, r6, r7 ; blez r15, 0 <target> }
+     720:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; blez r15, 0 <target> }
+     728:	[0-9a-f]* 	{ srah r5, r6, r7 ; blez r15, 0 <target> }
+     730:	[0-9a-f]* 	{ addhs r5, r6, r7 ; blzt r15, 0 <target> }
+     738:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; blzt r15, 0 <target> }
+     740:	[0-9a-f]* 	{ move r5, r6 ; blzt r15, 0 <target> }
+     748:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; blzt r15, 0 <target> }
+     750:	[0-9a-f]* 	{ pcnt r5, r6 ; blzt r15, 0 <target> }
+     758:	[0-9a-f]* 	{ shlh r5, r6, r7 ; blzt r15, 0 <target> }
+     760:	[0-9a-f]* 	{ slth r5, r6, r7 ; blzt r15, 0 <target> }
+     768:	[0-9a-f]* 	{ subh r5, r6, r7 ; blzt r15, 0 <target> }
+     770:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; bnzt r15, 0 <target> }
+     778:	[0-9a-f]* 	{ intlh r5, r6, r7 ; bnzt r15, 0 <target> }
+     780:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; bnzt r15, 0 <target> }
+     788:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; bnzt r15, 0 <target> }
+     790:	[0-9a-f]* 	{ sadah r5, r6, r7 ; bnzt r15, 0 <target> }
+     798:	[0-9a-f]* 	{ shri r5, r6, 5 ; bnzt r15, 0 <target> }
+     7a0:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; bnzt r15, 0 <target> }
+     7a8:	[0-9a-f]* 	{ xor r5, r6, r7 ; bnzt r15, 0 <target> }
+     7b0:	[0-9a-f]* 	{ avgh r5, r6, r7 ; bbs r15, 0 <target> }
+     7b8:	[0-9a-f]* 	{ minh r5, r6, r7 ; bbs r15, 0 <target> }
+     7c0:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; bbs r15, 0 <target> }
+     7c8:	[0-9a-f]* 	{ nor r5, r6, r7 ; bbs r15, 0 <target> }
+     7d0:	[0-9a-f]* 	{ seqb r5, r6, r7 ; bbs r15, 0 <target> }
+     7d8:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; bbs r15, 0 <target> }
+     7e0:	[0-9a-f]* 	{ srah r5, r6, r7 ; bbs r15, 0 <target> }
+     7e8:	[0-9a-f]* 	{ addhs r5, r6, r7 ; bgz r15, 0 <target> }
+     7f0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; bgz r15, 0 <target> }
+     7f8:	[0-9a-f]* 	{ move r5, r6 ; bgz r15, 0 <target> }
+     800:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; bgz r15, 0 <target> }
+     808:	[0-9a-f]* 	{ pcnt r5, r6 ; bgz r15, 0 <target> }
+     810:	[0-9a-f]* 	{ shlh r5, r6, r7 ; bgz r15, 0 <target> }
+     818:	[0-9a-f]* 	{ slth r5, r6, r7 ; bgz r15, 0 <target> }
+     820:	[0-9a-f]* 	{ subh r5, r6, r7 ; bgz r15, 0 <target> }
+     828:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; blz r15, 0 <target> }
+     830:	[0-9a-f]* 	{ intlh r5, r6, r7 ; blz r15, 0 <target> }
+     838:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; blz r15, 0 <target> }
+     840:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; blz r15, 0 <target> }
+     848:	[0-9a-f]* 	{ sadah r5, r6, r7 ; blz r15, 0 <target> }
+     850:	[0-9a-f]* 	{ shri r5, r6, 5 ; blz r15, 0 <target> }
+     858:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; blz r15, 0 <target> }
+     860:	[0-9a-f]* 	{ xor r5, r6, r7 ; blz r15, 0 <target> }
+     868:	[0-9a-f]* 	{ bitx r5, r6 ; bnz r15, 0 <target> }
+     870:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; bnz r15, 0 <target> }
+     878:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; bnz r15, 0 <target> }
+     880:	[0-9a-f]* 	{ or r5, r6, r7 ; bnz r15, 0 <target> }
+     888:	[0-9a-f]* 	{ seqh r5, r6, r7 ; bnz r15, 0 <target> }
+     890:	[0-9a-f]* 	{ slte r5, r6, r7 ; bnz r15, 0 <target> }
+     898:	[0-9a-f]* 	{ srai r5, r6, 5 ; bnz r15, 0 <target> }
+     8a0:	[0-9a-f]* 	{ addi r5, r6, 5 ; bzt r15, 0 <target> }
+     8a8:	[0-9a-f]* 	{ bzt r15, 0 <target> }
+     8b0:	[0-9a-f]* 	{ movei r5, 5 ; bzt r15, 0 <target> }
+     8b8:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; bzt r15, 0 <target> }
+     8c0:	[0-9a-f]* 	{ rl r5, r6, r7 ; bzt r15, 0 <target> }
+     8c8:	[0-9a-f]* 	{ shli r5, r6, 5 ; bzt r15, 0 <target> }
+     8d0:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; bzt r15, 0 <target> }
+     8d8:	[0-9a-f]* 	{ subhs r5, r6, r7 ; bzt r15, 0 <target> }
+     8e0:	[0-9a-f]* 	{ addli r5, r6, 4660 ; bz r15, 0 <target> }
+     8e8:	[0-9a-f]* 	{ inthb r5, r6, r7 ; bz r15, 0 <target> }
+     8f0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; bz r15, 0 <target> }
+     8f8:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; bz r15, 0 <target> }
+     900:	[0-9a-f]* 	{ s2a r5, r6, r7 ; bz r15, 0 <target> }
+     908:	[0-9a-f]* 	{ shr r5, r6, r7 ; bz r15, 0 <target> }
+     910:	[0-9a-f]* 	{ sltib r5, r6, 5 ; bz r15, 0 <target> }
+     918:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; bz r15, 0 <target> }
+     920:	[0-9a-f]* 	{ addb r5, r6, r7 ; jal 0 <target> }
+     928:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; jal 0 <target> }
+     930:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jal 0 <target> }
+     938:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; jal 0 <target> }
+     940:	[0-9a-f]* 	{ packhb r5, r6, r7 ; jal 0 <target> }
+     948:	[0-9a-f]* 	{ seqih r5, r6, 5 ; jal 0 <target> }
+     950:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; jal 0 <target> }
+     958:	[0-9a-f]* 	{ sub r5, r6, r7 ; jal 0 <target> }
+     960:	[0-9a-f]* 	{ addih r5, r6, 5 ; j 0 <target> }
+     968:	[0-9a-f]* 	{ infol 4660 ; j 0 <target> }
+     970:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; j 0 <target> }
+     978:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; j 0 <target> }
+     980:	[0-9a-f]* 	{ s1a r5, r6, r7 ; j 0 <target> }
+     988:	[0-9a-f]* 	{ shlih r5, r6, 5 ; j 0 <target> }
+     990:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; j 0 <target> }
+     998:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; j 0 <target> }
+     9a0:	[0-9a-f]* 	{ and r5, r6, r7 }
+     9a8:	[0-9a-f]* 	{ info 19 }
+     9b0:	[0-9a-f]* 	{ lnk r5 }
+     9b8:	[0-9a-f]* 	{ movei r5, 5 }
+     9c0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 }
+     9c8:	[0-9a-f]* 	{ packlb r5, r6, r7 }
+     9d0:	[0-9a-f]* 	{ seqi r5, r6, 5 }
+     9d8:	[0-9a-f]* 	{ sltb_u r5, r6, r7 }
+     9e0:	[0-9a-f]* 	{ srah r5, r6, r7 }
+     9e8:	[0-9a-f]* 	{ tns r5, r6 }
+     9f0:	[0-9a-f]* 	{ add r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 }
+     9f8:	[0-9a-f]* 	{ add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+     a00:	[0-9a-f]* 	{ bitx r5, r6 ; add r15, r16, r17 ; lh r25, r26 }
+     a08:	[0-9a-f]* 	{ clz r5, r6 ; add r15, r16, r17 ; lh r25, r26 }
+     a10:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; add r15, r16, r17 }
+     a18:	[0-9a-f]* 	{ add r15, r16, r17 ; info 19 }
+     a20:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; add r15, r16, r17 ; lb r25, r26 }
+     a28:	[0-9a-f]* 	{ add r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+     a30:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; lb r25, r26 }
+     a38:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 }
+     a40:	[0-9a-f]* 	{ add r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 }
+     a48:	[0-9a-f]* 	{ add r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 }
+     a50:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+     a58:	[0-9a-f]* 	{ add r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 }
+     a60:	[0-9a-f]* 	{ add r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 }
+     a68:	[0-9a-f]* 	{ mvz r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 }
+     a70:	[0-9a-f]* 	{ add r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 }
+     a78:	[0-9a-f]* 	{ clz r5, r6 ; add r15, r16, r17 ; lw r25, r26 }
+     a80:	[0-9a-f]* 	{ add r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 }
+     a88:	[0-9a-f]* 	{ add r15, r16, r17 ; slti_u r5, r6, 5 ; lw r25, r26 }
+     a90:	[0-9a-f]* 	{ add r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 }
+     a98:	[0-9a-f]* 	{ add r15, r16, r17 ; move r5, r6 ; sw r25, r26 }
+     aa0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+     aa8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+     ab0:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; add r15, r16, r17 }
+     ab8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+     ac0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+     ac8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+     ad0:	[0-9a-f]* 	{ add r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 }
+     ad8:	[0-9a-f]* 	{ add r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+     ae0:	[0-9a-f]* 	{ add r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 }
+     ae8:	[0-9a-f]* 	{ pcnt r5, r6 ; add r15, r16, r17 ; sb r25, r26 }
+     af0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+     af8:	[0-9a-f]* 	{ add r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
+     b00:	[0-9a-f]* 	{ add r15, r16, r17 ; prefetch r25 }
+     b08:	[0-9a-f]* 	{ add r15, r16, r17 ; rli r5, r6, 5 }
+     b10:	[0-9a-f]* 	{ add r15, r16, r17 ; s2a r5, r6, r7 }
+     b18:	[0-9a-f]* 	{ add r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 }
+     b20:	[0-9a-f]* 	{ mvz r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+     b28:	[0-9a-f]* 	{ add r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 }
+     b30:	[0-9a-f]* 	{ add r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+     b38:	[0-9a-f]* 	{ add r15, r16, r17 ; and r5, r6, r7 ; sh r25, r26 }
+     b40:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 }
+     b48:	[0-9a-f]* 	{ add r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 }
+     b50:	[0-9a-f]* 	{ add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+     b58:	[0-9a-f]* 	{ add r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 }
+     b60:	[0-9a-f]* 	{ add r15, r16, r17 ; shri r5, r6, 5 }
+     b68:	[0-9a-f]* 	{ add r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 }
+     b70:	[0-9a-f]* 	{ add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
+     b78:	[0-9a-f]* 	{ add r15, r16, r17 ; slti r5, r6, 5 }
+     b80:	[0-9a-f]* 	{ add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
+     b88:	[0-9a-f]* 	{ add r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+     b90:	[0-9a-f]* 	{ add r15, r16, r17 ; sub r5, r6, r7 }
+     b98:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 }
+     ba0:	[0-9a-f]* 	{ add r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+     ba8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; sw r25, r26 }
+     bb0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; sh r25, r26 }
+     bb8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; sh r25, r26 }
+     bc0:	[0-9a-f]* 	{ add r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+     bc8:	[0-9a-f]* 	{ add r5, r6, r7 ; addli r15, r16, 4660 }
+     bd0:	[0-9a-f]* 	{ add r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+     bd8:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; lh r25, r26 }
+     be0:	[0-9a-f]* 	{ add r5, r6, r7 ; inthh r15, r16, r17 }
+     be8:	[0-9a-f]* 	{ add r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+     bf0:	[0-9a-f]* 	{ add r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+     bf8:	[0-9a-f]* 	{ add r5, r6, r7 ; nop ; lb_u r25, r26 }
+     c00:	[0-9a-f]* 	{ add r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+     c08:	[0-9a-f]* 	{ add r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+     c10:	[0-9a-f]* 	{ add r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+     c18:	[0-9a-f]* 	{ add r5, r6, r7 ; nop ; lh_u r25, r26 }
+     c20:	[0-9a-f]* 	{ add r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 }
+     c28:	[0-9a-f]* 	{ add r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+     c30:	[0-9a-f]* 	{ add r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+     c38:	[0-9a-f]* 	{ add r5, r6, r7 ; minib_u r15, r16, 5 }
+     c40:	[0-9a-f]* 	{ add r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+     c48:	[0-9a-f]* 	{ add r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+     c50:	[0-9a-f]* 	{ add r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+     c58:	[0-9a-f]* 	{ add r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+     c60:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; prefetch r25 }
+     c68:	[0-9a-f]* 	{ add r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+     c70:	[0-9a-f]* 	{ add r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+     c78:	[0-9a-f]* 	{ add r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+     c80:	[0-9a-f]* 	{ add r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+     c88:	[0-9a-f]* 	{ add r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+     c90:	[0-9a-f]* 	{ add r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+     c98:	[0-9a-f]* 	{ add r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+     ca0:	[0-9a-f]* 	{ add r5, r6, r7 ; nop ; sh r25, r26 }
+     ca8:	[0-9a-f]* 	{ add r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+     cb0:	[0-9a-f]* 	{ add r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 }
+     cb8:	[0-9a-f]* 	{ add r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+     cc0:	[0-9a-f]* 	{ add r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+     cc8:	[0-9a-f]* 	{ add r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+     cd0:	[0-9a-f]* 	{ add r5, r6, r7 ; slteh r15, r16, r17 }
+     cd8:	[0-9a-f]* 	{ add r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+     ce0:	[0-9a-f]* 	{ add r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 }
+     ce8:	[0-9a-f]* 	{ add r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 }
+     cf0:	[0-9a-f]* 	{ add r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 }
+     cf8:	[0-9a-f]* 	{ add r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+     d00:	[0-9a-f]* 	{ add r5, r6, r7 ; wh64 r15 }
+     d08:	[0-9a-f]* 	{ addb r15, r16, r17 ; addli r5, r6, 4660 }
+     d10:	[0-9a-f]* 	{ addb r15, r16, r17 ; inthb r5, r6, r7 }
+     d18:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; addb r15, r16, r17 }
+     d20:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; addb r15, r16, r17 }
+     d28:	[0-9a-f]* 	{ addb r15, r16, r17 ; s2a r5, r6, r7 }
+     d30:	[0-9a-f]* 	{ addb r15, r16, r17 ; shr r5, r6, r7 }
+     d38:	[0-9a-f]* 	{ addb r15, r16, r17 ; sltib r5, r6, 5 }
+     d40:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addb r15, r16, r17 }
+     d48:	[0-9a-f]* 	{ addb r5, r6, r7 ; finv r15 }
+     d50:	[0-9a-f]* 	{ addb r5, r6, r7 ; lbadd_u r15, r16, 5 }
+     d58:	[0-9a-f]* 	{ addb r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+     d60:	[0-9a-f]* 	{ addb r5, r6, r7 ; prefetch r15 }
+     d68:	[0-9a-f]* 	{ addb r5, r6, r7 ; shli r15, r16, 5 }
+     d70:	[0-9a-f]* 	{ addb r5, r6, r7 ; slth_u r15, r16, r17 }
+     d78:	[0-9a-f]* 	{ addb r5, r6, r7 ; subhs r15, r16, r17 }
+     d80:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; addbs_u r15, r16, r17 }
+     d88:	[0-9a-f]* 	{ addbs_u r15, r16, r17 ; maxb_u r5, r6, r7 }
+     d90:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; addbs_u r15, r16, r17 }
+     d98:	[0-9a-f]* 	{ mvz r5, r6, r7 ; addbs_u r15, r16, r17 }
+     da0:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; addbs_u r15, r16, r17 }
+     da8:	[0-9a-f]* 	{ addbs_u r15, r16, r17 ; shrib r5, r6, 5 }
+     db0:	[0-9a-f]* 	{ addbs_u r15, r16, r17 ; sne r5, r6, r7 }
+     db8:	[0-9a-f]* 	{ addbs_u r15, r16, r17 ; xori r5, r6, 5 }
+     dc0:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; ill }
+     dc8:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; lhadd_u r15, r16, 5 }
+     dd0:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; move r15, r16 }
+     dd8:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; s1a r15, r16, r17 }
+     de0:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; shrb r15, r16, r17 }
+     de8:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; sltib_u r15, r16, 5 }
+     df0:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; tns r15, r16 }
+     df8:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; addh r15, r16, r17 }
+     e00:	[0-9a-f]* 	{ addh r15, r16, r17 ; minb_u r5, r6, r7 }
+     e08:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; addh r15, r16, r17 }
+     e10:	[0-9a-f]* 	{ addh r15, r16, r17 ; nop }
+     e18:	[0-9a-f]* 	{ addh r15, r16, r17 ; seq r5, r6, r7 }
+     e20:	[0-9a-f]* 	{ addh r15, r16, r17 ; sltb r5, r6, r7 }
+     e28:	[0-9a-f]* 	{ addh r15, r16, r17 ; srab r5, r6, r7 }
+     e30:	[0-9a-f]* 	{ addh r5, r6, r7 ; addh r15, r16, r17 }
+     e38:	[0-9a-f]* 	{ addh r5, r6, r7 ; inthh r15, r16, r17 }
+     e40:	[0-9a-f]* 	{ addh r5, r6, r7 ; lwadd r15, r16, 5 }
+     e48:	[0-9a-f]* 	{ addh r5, r6, r7 ; mtspr 5, r16 }
+     e50:	[0-9a-f]* 	{ addh r5, r6, r7 ; sbadd r15, r16, 5 }
+     e58:	[0-9a-f]* 	{ addh r5, r6, r7 ; shrih r15, r16, 5 }
+     e60:	[0-9a-f]* 	{ addh r5, r6, r7 ; sneb r15, r16, r17 }
+     e68:	[0-9a-f]* 	{ addhs r15, r16, r17 ; add r5, r6, r7 }
+     e70:	[0-9a-f]* 	{ clz r5, r6 ; addhs r15, r16, r17 }
+     e78:	[0-9a-f]* 	{ addhs r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+     e80:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; addhs r15, r16, r17 }
+     e88:	[0-9a-f]* 	{ addhs r15, r16, r17 ; packbs_u r5, r6, r7 }
+     e90:	[0-9a-f]* 	{ addhs r15, r16, r17 ; seqib r5, r6, 5 }
+     e98:	[0-9a-f]* 	{ addhs r15, r16, r17 ; slteb r5, r6, r7 }
+     ea0:	[0-9a-f]* 	{ addhs r15, r16, r17 ; sraih r5, r6, 5 }
+     ea8:	[0-9a-f]* 	{ addhs r5, r6, r7 ; addih r15, r16, 5 }
+     eb0:	[0-9a-f]* 	{ addhs r5, r6, r7 ; iret }
+     eb8:	[0-9a-f]* 	{ addhs r5, r6, r7 ; maxib_u r15, r16, 5 }
+     ec0:	[0-9a-f]* 	{ addhs r5, r6, r7 ; nop }
+     ec8:	[0-9a-f]* 	{ addhs r5, r6, r7 ; seqi r15, r16, 5 }
+     ed0:	[0-9a-f]* 	{ addhs r5, r6, r7 ; sltb_u r15, r16, r17 }
+     ed8:	[0-9a-f]* 	{ addhs r5, r6, r7 ; srah r15, r16, r17 }
+     ee0:	[0-9a-f]* 	{ addi r15, r16, 5 ; add r5, r6, r7 ; lw r25, r26 }
+     ee8:	[0-9a-f]* 	{ addi r15, r16, 5 ; addib r5, r6, 5 }
+     ef0:	[0-9a-f]* 	{ addi r15, r16, 5 ; andi r5, r6, 5 ; lh_u r25, r26 }
+     ef8:	[0-9a-f]* 	{ bytex r5, r6 ; addi r15, r16, 5 ; lb r25, r26 }
+     f00:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; addi r15, r16, 5 }
+     f08:	[0-9a-f]* 	{ addi r15, r16, 5 ; sh r25, r26 }
+     f10:	[0-9a-f]* 	{ addi r15, r16, 5 ; and r5, r6, r7 ; lb r25, r26 }
+     f18:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+     f20:	[0-9a-f]* 	{ addi r15, r16, 5 ; slt_u r5, r6, r7 ; lb r25, r26 }
+     f28:	[0-9a-f]* 	{ bytex r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 }
+     f30:	[0-9a-f]* 	{ addi r15, r16, 5 ; nop ; lb_u r25, r26 }
+     f38:	[0-9a-f]* 	{ addi r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+     f40:	[0-9a-f]* 	{ addi r15, r16, 5 ; lh r25, r26 }
+     f48:	[0-9a-f]* 	{ addi r15, r16, 5 ; ori r5, r6, 5 ; lh r25, r26 }
+     f50:	[0-9a-f]* 	{ addi r15, r16, 5 ; sra r5, r6, r7 ; lh r25, r26 }
+     f58:	[0-9a-f]* 	{ addi r15, r16, 5 ; move r5, r6 ; lh_u r25, r26 }
+     f60:	[0-9a-f]* 	{ addi r15, r16, 5 ; rli r5, r6, 5 ; lh_u r25, r26 }
+     f68:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+     f70:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+     f78:	[0-9a-f]* 	{ addi r15, r16, 5 ; s3a r5, r6, r7 ; lw r25, r26 }
+     f80:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addi r15, r16, 5 ; lw r25, r26 }
+     f88:	[0-9a-f]* 	{ addi r15, r16, 5 ; mnz r5, r6, r7 ; sw r25, r26 }
+     f90:	[0-9a-f]* 	{ addi r15, r16, 5 ; movei r5, 5 ; sb r25, r26 }
+     f98:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 }
+     fa0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; addi r15, r16, 5 ; lh r25, r26 }
+     fa8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 }
+     fb0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; addi r15, r16, 5 ; lh r25, r26 }
+     fb8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 }
+     fc0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+     fc8:	[0-9a-f]* 	{ addi r15, r16, 5 ; mzb r5, r6, r7 }
+     fd0:	[0-9a-f]* 	{ addi r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+     fd8:	[0-9a-f]* 	{ addi r15, r16, 5 ; ori r5, r6, 5 ; sw r25, r26 }
+     fe0:	[0-9a-f]* 	{ bitx r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+     fe8:	[0-9a-f]* 	{ addi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
+     ff0:	[0-9a-f]* 	{ addi r15, r16, 5 ; slte_u r5, r6, r7 ; prefetch r25 }
+     ff8:	[0-9a-f]* 	{ addi r15, r16, 5 ; rl r5, r6, r7 ; sh r25, r26 }
+    1000:	[0-9a-f]* 	{ addi r15, r16, 5 ; s1a r5, r6, r7 ; sh r25, r26 }
+    1008:	[0-9a-f]* 	{ addi r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 }
+    1010:	[0-9a-f]* 	{ addi r15, r16, 5 ; move r5, r6 ; sb r25, r26 }
+    1018:	[0-9a-f]* 	{ addi r15, r16, 5 ; rli r5, r6, 5 ; sb r25, r26 }
+    1020:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addi r15, r16, 5 ; sb r25, r26 }
+    1028:	[0-9a-f]* 	{ addi r15, r16, 5 ; seqi r5, r6, 5 ; lh r25, r26 }
+    1030:	[0-9a-f]* 	{ addi r15, r16, 5 ; mnz r5, r6, r7 ; sh r25, r26 }
+    1038:	[0-9a-f]* 	{ addi r15, r16, 5 ; rl r5, r6, r7 ; sh r25, r26 }
+    1040:	[0-9a-f]* 	{ addi r15, r16, 5 ; sub r5, r6, r7 ; sh r25, r26 }
+    1048:	[0-9a-f]* 	{ addi r15, r16, 5 ; shli r5, r6, 5 ; lb_u r25, r26 }
+    1050:	[0-9a-f]* 	{ addi r15, r16, 5 ; shr r5, r6, r7 }
+    1058:	[0-9a-f]* 	{ addi r15, r16, 5 ; slt r5, r6, r7 ; prefetch r25 }
+    1060:	[0-9a-f]* 	{ addi r15, r16, 5 ; slte r5, r6, r7 ; lh_u r25, r26 }
+    1068:	[0-9a-f]* 	{ addi r15, r16, 5 ; slteh_u r5, r6, r7 }
+    1070:	[0-9a-f]* 	{ addi r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    1078:	[0-9a-f]* 	{ addi r15, r16, 5 ; sra r5, r6, r7 ; lb_u r25, r26 }
+    1080:	[0-9a-f]* 	{ addi r15, r16, 5 ; srai r5, r6, 5 }
+    1088:	[0-9a-f]* 	{ addi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 }
+    1090:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+    1098:	[0-9a-f]* 	{ addi r15, r16, 5 ; slt_u r5, r6, r7 ; sw r25, r26 }
+    10a0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    10a8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    10b0:	[0-9a-f]* 	{ addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch r25 }
+    10b8:	[0-9a-f]* 	{ addi r5, r6, 5 ; addi r15, r16, 5 ; lb r25, r26 }
+    10c0:	[0-9a-f]* 	{ addi r5, r6, 5 ; and r15, r16, r17 ; prefetch r25 }
+    10c8:	[0-9a-f]* 	{ addi r5, r6, 5 ; lb_u r25, r26 }
+    10d0:	[0-9a-f]* 	{ addi r5, r6, 5 ; info 19 ; lb r25, r26 }
+    10d8:	[0-9a-f]* 	{ addi r5, r6, 5 ; jrp r15 }
+    10e0:	[0-9a-f]* 	{ addi r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 }
+    10e8:	[0-9a-f]* 	{ addi r5, r6, 5 ; lb_u r15, r16 }
+    10f0:	[0-9a-f]* 	{ addi r5, r6, 5 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    10f8:	[0-9a-f]* 	{ addi r5, r6, 5 ; lbadd_u r15, r16, 5 }
+    1100:	[0-9a-f]* 	{ addi r5, r6, 5 ; s2a r15, r16, r17 ; lh r25, r26 }
+    1108:	[0-9a-f]* 	{ addi r5, r6, 5 ; lh_u r15, r16 }
+    1110:	[0-9a-f]* 	{ addi r5, r6, 5 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    1118:	[0-9a-f]* 	{ addi r5, r6, 5 ; lhadd_u r15, r16, 5 }
+    1120:	[0-9a-f]* 	{ addi r5, r6, 5 ; s1a r15, r16, r17 ; lw r25, r26 }
+    1128:	[0-9a-f]* 	{ addi r5, r6, 5 ; lw r25, r26 }
+    1130:	[0-9a-f]* 	{ addi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+    1138:	[0-9a-f]* 	{ addi r5, r6, 5 ; movei r15, 5 ; lh_u r25, r26 }
+    1140:	[0-9a-f]* 	{ addi r5, r6, 5 ; mzb r15, r16, r17 }
+    1148:	[0-9a-f]* 	{ addi r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+    1150:	[0-9a-f]* 	{ addi r5, r6, 5 ; ori r15, r16, 5 ; sw r25, r26 }
+    1158:	[0-9a-f]* 	{ addi r5, r6, 5 ; or r15, r16, r17 ; prefetch r25 }
+    1160:	[0-9a-f]* 	{ addi r5, r6, 5 ; sra r15, r16, r17 ; prefetch r25 }
+    1168:	[0-9a-f]* 	{ addi r5, r6, 5 ; rli r15, r16, 5 ; lw r25, r26 }
+    1170:	[0-9a-f]* 	{ addi r5, r6, 5 ; s2a r15, r16, r17 ; lw r25, r26 }
+    1178:	[0-9a-f]* 	{ addi r5, r6, 5 ; andi r15, r16, 5 ; sb r25, r26 }
+    1180:	[0-9a-f]* 	{ addi r5, r6, 5 ; shli r15, r16, 5 ; sb r25, r26 }
+    1188:	[0-9a-f]* 	{ addi r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 }
+    1190:	[0-9a-f]* 	{ addi r5, r6, 5 ; sh r15, r16 }
+    1198:	[0-9a-f]* 	{ addi r5, r6, 5 ; s3a r15, r16, r17 ; sh r25, r26 }
+    11a0:	[0-9a-f]* 	{ addi r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    11a8:	[0-9a-f]* 	{ addi r5, r6, 5 ; shli r15, r16, 5 ; sw r25, r26 }
+    11b0:	[0-9a-f]* 	{ addi r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 }
+    11b8:	[0-9a-f]* 	{ addi r5, r6, 5 ; slt_u r15, r16, r17 ; lh r25, r26 }
+    11c0:	[0-9a-f]* 	{ addi r5, r6, 5 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    11c8:	[0-9a-f]* 	{ addi r5, r6, 5 ; slti r15, r16, 5 ; lw r25, r26 }
+    11d0:	[0-9a-f]* 	{ addi r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 }
+    11d8:	[0-9a-f]* 	{ addi r5, r6, 5 ; sra r15, r16, r17 ; sw r25, r26 }
+    11e0:	[0-9a-f]* 	{ addi r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 }
+    11e8:	[0-9a-f]* 	{ addi r5, r6, 5 ; move r15, r16 ; sw r25, r26 }
+    11f0:	[0-9a-f]* 	{ addi r5, r6, 5 ; slte r15, r16, r17 ; sw r25, r26 }
+    11f8:	[0-9a-f]* 	{ addi r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 }
+    1200:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; addib r15, r16, 5 }
+    1208:	[0-9a-f]* 	{ addib r15, r16, 5 ; minb_u r5, r6, r7 }
+    1210:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; addib r15, r16, 5 }
+    1218:	[0-9a-f]* 	{ addib r15, r16, 5 ; nop }
+    1220:	[0-9a-f]* 	{ addib r15, r16, 5 ; seq r5, r6, r7 }
+    1228:	[0-9a-f]* 	{ addib r15, r16, 5 ; sltb r5, r6, r7 }
+    1230:	[0-9a-f]* 	{ addib r15, r16, 5 ; srab r5, r6, r7 }
+    1238:	[0-9a-f]* 	{ addib r5, r6, 5 ; addh r15, r16, r17 }
+    1240:	[0-9a-f]* 	{ addib r5, r6, 5 ; inthh r15, r16, r17 }
+    1248:	[0-9a-f]* 	{ addib r5, r6, 5 ; lwadd r15, r16, 5 }
+    1250:	[0-9a-f]* 	{ addib r5, r6, 5 ; mtspr 5, r16 }
+    1258:	[0-9a-f]* 	{ addib r5, r6, 5 ; sbadd r15, r16, 5 }
+    1260:	[0-9a-f]* 	{ addib r5, r6, 5 ; shrih r15, r16, 5 }
+    1268:	[0-9a-f]* 	{ addib r5, r6, 5 ; sneb r15, r16, r17 }
+    1270:	[0-9a-f]* 	{ addih r15, r16, 5 ; add r5, r6, r7 }
+    1278:	[0-9a-f]* 	{ clz r5, r6 ; addih r15, r16, 5 }
+    1280:	[0-9a-f]* 	{ addih r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+    1288:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; addih r15, r16, 5 }
+    1290:	[0-9a-f]* 	{ addih r15, r16, 5 ; packbs_u r5, r6, r7 }
+    1298:	[0-9a-f]* 	{ addih r15, r16, 5 ; seqib r5, r6, 5 }
+    12a0:	[0-9a-f]* 	{ addih r15, r16, 5 ; slteb r5, r6, r7 }
+    12a8:	[0-9a-f]* 	{ addih r15, r16, 5 ; sraih r5, r6, 5 }
+    12b0:	[0-9a-f]* 	{ addih r5, r6, 5 ; addih r15, r16, 5 }
+    12b8:	[0-9a-f]* 	{ addih r5, r6, 5 ; iret }
+    12c0:	[0-9a-f]* 	{ addih r5, r6, 5 ; maxib_u r15, r16, 5 }
+    12c8:	[0-9a-f]* 	{ addih r5, r6, 5 ; nop }
+    12d0:	[0-9a-f]* 	{ addih r5, r6, 5 ; seqi r15, r16, 5 }
+    12d8:	[0-9a-f]* 	{ addih r5, r6, 5 ; sltb_u r15, r16, r17 }
+    12e0:	[0-9a-f]* 	{ addih r5, r6, 5 ; srah r15, r16, r17 }
+    12e8:	[0-9a-f]* 	{ addli r15, r16, 4660 ; addhs r5, r6, r7 }
+    12f0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; addli r15, r16, 4660 }
+    12f8:	[0-9a-f]* 	{ addli r15, r16, 4660 ; move r5, r6 }
+    1300:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; addli r15, r16, 4660 }
+    1308:	[0-9a-f]* 	{ pcnt r5, r6 ; addli r15, r16, 4660 }
+    1310:	[0-9a-f]* 	{ addli r15, r16, 4660 ; shlh r5, r6, r7 }
+    1318:	[0-9a-f]* 	{ addli r15, r16, 4660 ; slth r5, r6, r7 }
+    1320:	[0-9a-f]* 	{ addli r15, r16, 4660 ; subh r5, r6, r7 }
+    1328:	[0-9a-f]* 	{ addli r5, r6, 4660 ; and r15, r16, r17 }
+    1330:	[0-9a-f]* 	{ addli r5, r6, 4660 ; jrp r15 }
+    1338:	[0-9a-f]* 	{ addli r5, r6, 4660 ; minb_u r15, r16, r17 }
+    1340:	[0-9a-f]* 	{ addli r5, r6, 4660 ; packbs_u r15, r16, r17 }
+    1348:	[0-9a-f]* 	{ addli r5, r6, 4660 ; shadd r15, r16, 5 }
+    1350:	[0-9a-f]* 	{ addli r5, r6, 4660 ; slteb_u r15, r16, r17 }
+    1358:	[0-9a-f]* 	{ addli r5, r6, 4660 ; sub r15, r16, r17 }
+    1360:	[0-9a-f]* 	{ addli.sn r15, r16, 4660 ; addli r5, r6, 4660 }
+    1368:	[0-9a-f]* 	{ addli.sn r15, r16, 4660 ; inthh r5, r6, r7 }
+    1370:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; addli.sn r15, r16, 4660 }
+    1378:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; addli.sn r15, r16, 4660 }
+    1380:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; addli.sn r15, r16, 4660 }
+    1388:	[0-9a-f]* 	{ addli.sn r15, r16, 4660 ; shrh r5, r6, r7 }
+    1390:	[0-9a-f]* 	{ addli.sn r15, r16, 4660 ; sltih r5, r6, 5 }
+    1398:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addli.sn r15, r16, 4660 }
+    13a0:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; icoh r15 }
+    13a8:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; lhadd r15, r16, 5 }
+    13b0:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; mnzh r15, r16, r17 }
+    13b8:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; s1a r15, r16, r17 }
+    13c0:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; shrb r15, r16, r17 }
+    13c8:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; sltib_u r15, r16, 5 }
+    13d0:	[0-9a-f]* 	{ addli.sn r5, r6, 4660 ; tns r15, r16 }
+    13d8:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; adds r15, r16, r17 }
+    13e0:	[0-9a-f]* 	{ adds r15, r16, r17 ; minb_u r5, r6, r7 }
+    13e8:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; adds r15, r16, r17 }
+    13f0:	[0-9a-f]* 	{ adds r15, r16, r17 ; nop }
+    13f8:	[0-9a-f]* 	{ adds r15, r16, r17 ; seq r5, r6, r7 }
+    1400:	[0-9a-f]* 	{ adds r15, r16, r17 ; sltb r5, r6, r7 }
+    1408:	[0-9a-f]* 	{ adds r15, r16, r17 ; srab r5, r6, r7 }
+    1410:	[0-9a-f]* 	{ adds r5, r6, r7 ; addh r15, r16, r17 }
+    1418:	[0-9a-f]* 	{ adds r5, r6, r7 ; inthh r15, r16, r17 }
+    1420:	[0-9a-f]* 	{ adds r5, r6, r7 ; lwadd r15, r16, 5 }
+    1428:	[0-9a-f]* 	{ adds r5, r6, r7 ; mtspr 5, r16 }
+    1430:	[0-9a-f]* 	{ adds r5, r6, r7 ; sbadd r15, r16, 5 }
+    1438:	[0-9a-f]* 	{ adds r5, r6, r7 ; shrih r15, r16, 5 }
+    1440:	[0-9a-f]* 	{ adds r5, r6, r7 ; sneb r15, r16, r17 }
+    1448:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; add r15, r16, r17 }
+    1450:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; info 19 }
+    1458:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; lnk r15 }
+    1460:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; movei r15, 5 }
+    1468:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; s2a r15, r16, r17 }
+    1470:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; shrh r15, r16, r17 }
+    1478:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; sltih r15, r16, 5 }
+    1480:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; wh64 r15 }
+    1488:	[0-9a-f]* 	{ adiffh r5, r6, r7 }
+    1490:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; lh_u r15, r16 }
+    1498:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; mnzb r15, r16, r17 }
+    14a0:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; rl r15, r16, r17 }
+    14a8:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; shlih r15, r16, 5 }
+    14b0:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; slti_u r15, r16, 5 }
+    14b8:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; sw r15, r16 }
+    14c0:	[0-9a-f]* 	{ and r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 }
+    14c8:	[0-9a-f]* 	{ and r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 }
+    14d0:	[0-9a-f]* 	{ bitx r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+    14d8:	[0-9a-f]* 	{ clz r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+    14e0:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+    14e8:	[0-9a-f]* 	{ and r15, r16, r17 ; info 19 ; sh r25, r26 }
+    14f0:	[0-9a-f]* 	{ and r15, r16, r17 ; movei r5, 5 ; lb r25, r26 }
+    14f8:	[0-9a-f]* 	{ and r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 }
+    1500:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+    1508:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    1510:	[0-9a-f]* 	{ and r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 }
+    1518:	[0-9a-f]* 	{ and r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    1520:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    1528:	[0-9a-f]* 	{ and r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 }
+    1530:	[0-9a-f]* 	{ and r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 }
+    1538:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    1540:	[0-9a-f]* 	{ and r15, r16, r17 ; slt r5, r6, r7 ; lh_u r25, r26 }
+    1548:	[0-9a-f]* 	{ bitx r5, r6 ; and r15, r16, r17 ; lw r25, r26 }
+    1550:	[0-9a-f]* 	{ and r15, r16, r17 ; mz r5, r6, r7 ; lw r25, r26 }
+    1558:	[0-9a-f]* 	{ and r15, r16, r17 ; slte_u r5, r6, r7 ; lw r25, r26 }
+    1560:	[0-9a-f]* 	{ and r15, r16, r17 ; minih r5, r6, 5 }
+    1568:	[0-9a-f]* 	{ and r15, r16, r17 ; move r5, r6 ; sb r25, r26 }
+    1570:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 }
+    1578:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    1580:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; and r15, r16, r17 }
+    1588:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    1590:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    1598:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    15a0:	[0-9a-f]* 	{ and r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+    15a8:	[0-9a-f]* 	{ and r15, r16, r17 ; nop ; sw r25, r26 }
+    15b0:	[0-9a-f]* 	{ and r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 }
+    15b8:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; lw r25, r26 }
+    15c0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    15c8:	[0-9a-f]* 	{ and r15, r16, r17 ; s3a r5, r6, r7 ; prefetch r25 }
+    15d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+    15d8:	[0-9a-f]* 	{ and r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 }
+    15e0:	[0-9a-f]* 	{ and r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+    15e8:	[0-9a-f]* 	{ and r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 }
+    15f0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    15f8:	[0-9a-f]* 	{ and r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 }
+    1600:	[0-9a-f]* 	{ and r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+    1608:	[0-9a-f]* 	{ and r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 }
+    1610:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 }
+    1618:	[0-9a-f]* 	{ and r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 }
+    1620:	[0-9a-f]* 	{ and r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 }
+    1628:	[0-9a-f]* 	{ and r15, r16, r17 ; shlih r5, r6, 5 }
+    1630:	[0-9a-f]* 	{ and r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 }
+    1638:	[0-9a-f]* 	{ and r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 }
+    1640:	[0-9a-f]* 	{ and r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    1648:	[0-9a-f]* 	{ and r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 }
+    1650:	[0-9a-f]* 	{ and r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    1658:	[0-9a-f]* 	{ and r15, r16, r17 ; srah r5, r6, r7 }
+    1660:	[0-9a-f]* 	{ and r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 }
+    1668:	[0-9a-f]* 	{ and r15, r16, r17 ; movei r5, 5 ; sw r25, r26 }
+    1670:	[0-9a-f]* 	{ and r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 }
+    1678:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+    1680:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+    1688:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; prefetch r25 }
+    1690:	[0-9a-f]* 	{ and r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+    1698:	[0-9a-f]* 	{ and r5, r6, r7 ; addib r15, r16, 5 }
+    16a0:	[0-9a-f]* 	{ and r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    16a8:	[0-9a-f]* 	{ and r5, r6, r7 ; ill ; lb r25, r26 }
+    16b0:	[0-9a-f]* 	{ and r5, r6, r7 ; infol 4660 }
+    16b8:	[0-9a-f]* 	{ and r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    16c0:	[0-9a-f]* 	{ and r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+    16c8:	[0-9a-f]* 	{ and r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    16d0:	[0-9a-f]* 	{ and r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    16d8:	[0-9a-f]* 	{ and r5, r6, r7 ; move r15, r16 ; lh r25, r26 }
+    16e0:	[0-9a-f]* 	{ and r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+    16e8:	[0-9a-f]* 	{ and r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+    16f0:	[0-9a-f]* 	{ and r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    16f8:	[0-9a-f]* 	{ and r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+    1700:	[0-9a-f]* 	{ and r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    1708:	[0-9a-f]* 	{ and r5, r6, r7 ; minb_u r15, r16, r17 }
+    1710:	[0-9a-f]* 	{ and r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+    1718:	[0-9a-f]* 	{ and r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+    1720:	[0-9a-f]* 	{ and r5, r6, r7 ; nop ; sw r25, r26 }
+    1728:	[0-9a-f]* 	{ and r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 }
+    1730:	[0-9a-f]* 	{ and r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    1738:	[0-9a-f]* 	{ and r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    1740:	[0-9a-f]* 	{ and r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    1748:	[0-9a-f]* 	{ and r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    1750:	[0-9a-f]* 	{ and r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+    1758:	[0-9a-f]* 	{ and r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    1760:	[0-9a-f]* 	{ and r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    1768:	[0-9a-f]* 	{ and r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 }
+    1770:	[0-9a-f]* 	{ and r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    1778:	[0-9a-f]* 	{ and r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    1780:	[0-9a-f]* 	{ and r5, r6, r7 ; shlb r15, r16, r17 }
+    1788:	[0-9a-f]* 	{ and r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    1790:	[0-9a-f]* 	{ and r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+    1798:	[0-9a-f]* 	{ and r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+    17a0:	[0-9a-f]* 	{ and r5, r6, r7 ; slteb r15, r16, r17 }
+    17a8:	[0-9a-f]* 	{ and r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 }
+    17b0:	[0-9a-f]* 	{ and r5, r6, r7 ; sneb r15, r16, r17 }
+    17b8:	[0-9a-f]* 	{ and r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+    17c0:	[0-9a-f]* 	{ and r5, r6, r7 ; subs r15, r16, r17 }
+    17c8:	[0-9a-f]* 	{ and r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    17d0:	[0-9a-f]* 	{ and r5, r6, r7 ; swadd r15, r16, 5 }
+    17d8:	[0-9a-f]* 	{ andi r15, r16, 5 ; add r5, r6, r7 ; sb r25, r26 }
+    17e0:	[0-9a-f]* 	{ andi r15, r16, 5 ; addli r5, r6, 4660 }
+    17e8:	[0-9a-f]* 	{ andi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    17f0:	[0-9a-f]* 	{ bytex r5, r6 ; andi r15, r16, 5 ; lh r25, r26 }
+    17f8:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 }
+    1800:	[0-9a-f]* 	{ andi r15, r16, 5 }
+    1808:	[0-9a-f]* 	{ bitx r5, r6 ; andi r15, r16, 5 ; lb r25, r26 }
+    1810:	[0-9a-f]* 	{ andi r15, r16, 5 ; mz r5, r6, r7 ; lb r25, r26 }
+    1818:	[0-9a-f]* 	{ andi r15, r16, 5 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    1820:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    1828:	[0-9a-f]* 	{ andi r15, r16, 5 ; or r5, r6, r7 ; lb_u r25, r26 }
+    1830:	[0-9a-f]* 	{ andi r15, r16, 5 ; sne r5, r6, r7 ; lb_u r25, r26 }
+    1838:	[0-9a-f]* 	{ andi r15, r16, 5 ; mnz r5, r6, r7 ; lh r25, r26 }
+    1840:	[0-9a-f]* 	{ andi r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 }
+    1848:	[0-9a-f]* 	{ andi r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 }
+    1850:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    1858:	[0-9a-f]* 	{ andi r15, r16, 5 ; s2a r5, r6, r7 ; lh_u r25, r26 }
+    1860:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    1868:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 }
+    1870:	[0-9a-f]* 	{ andi r15, r16, 5 ; seqi r5, r6, 5 ; lw r25, r26 }
+    1878:	[0-9a-f]* 	{ andi r15, r16, 5 ; lw r25, r26 }
+    1880:	[0-9a-f]* 	{ andi r15, r16, 5 ; mnzb r5, r6, r7 }
+    1888:	[0-9a-f]* 	{ andi r15, r16, 5 ; movei r5, 5 ; sw r25, r26 }
+    1890:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    1898:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 }
+    18a0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    18a8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 }
+    18b0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    18b8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 }
+    18c0:	[0-9a-f]* 	{ andi r15, r16, 5 ; nop ; lb r25, r26 }
+    18c8:	[0-9a-f]* 	{ andi r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 }
+    18d0:	[0-9a-f]* 	{ andi r15, r16, 5 ; packbs_u r5, r6, r7 }
+    18d8:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    18e0:	[0-9a-f]* 	{ andi r15, r16, 5 ; nor r5, r6, r7 ; prefetch r25 }
+    18e8:	[0-9a-f]* 	{ andi r15, r16, 5 ; slti_u r5, r6, 5 ; prefetch r25 }
+    18f0:	[0-9a-f]* 	{ andi r15, r16, 5 ; rl r5, r6, r7 }
+    18f8:	[0-9a-f]* 	{ andi r15, r16, 5 ; s1a r5, r6, r7 }
+    1900:	[0-9a-f]* 	{ andi r15, r16, 5 ; s3a r5, r6, r7 }
+    1908:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 }
+    1910:	[0-9a-f]* 	{ andi r15, r16, 5 ; s2a r5, r6, r7 ; sb r25, r26 }
+    1918:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 }
+    1920:	[0-9a-f]* 	{ andi r15, r16, 5 ; seqi r5, r6, 5 ; lw r25, r26 }
+    1928:	[0-9a-f]* 	{ andi r15, r16, 5 ; movei r5, 5 ; sh r25, r26 }
+    1930:	[0-9a-f]* 	{ andi r15, r16, 5 ; s1a r5, r6, r7 ; sh r25, r26 }
+    1938:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; sh r25, r26 }
+    1940:	[0-9a-f]* 	{ andi r15, r16, 5 ; shli r5, r6, 5 ; lh_u r25, r26 }
+    1948:	[0-9a-f]* 	{ andi r15, r16, 5 ; shrh r5, r6, r7 }
+    1950:	[0-9a-f]* 	{ andi r15, r16, 5 ; slt r5, r6, r7 ; sh r25, r26 }
+    1958:	[0-9a-f]* 	{ andi r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 }
+    1960:	[0-9a-f]* 	{ andi r15, r16, 5 ; slth_u r5, r6, r7 }
+    1968:	[0-9a-f]* 	{ andi r15, r16, 5 ; slti_u r5, r6, 5 }
+    1970:	[0-9a-f]* 	{ andi r15, r16, 5 ; sra r5, r6, r7 ; lh_u r25, r26 }
+    1978:	[0-9a-f]* 	{ andi r15, r16, 5 ; sraih r5, r6, 5 }
+    1980:	[0-9a-f]* 	{ bitx r5, r6 ; andi r15, r16, 5 ; sw r25, r26 }
+    1988:	[0-9a-f]* 	{ andi r15, r16, 5 ; mz r5, r6, r7 ; sw r25, r26 }
+    1990:	[0-9a-f]* 	{ andi r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    1998:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; andi r15, r16, 5 ; sh r25, r26 }
+    19a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; sh r25, r26 }
+    19a8:	[0-9a-f]* 	{ andi r15, r16, 5 ; xor r5, r6, r7 ; sh r25, r26 }
+    19b0:	[0-9a-f]* 	{ andi r5, r6, 5 ; addi r15, r16, 5 ; lh r25, r26 }
+    19b8:	[0-9a-f]* 	{ andi r5, r6, 5 ; and r15, r16, r17 ; sh r25, r26 }
+    19c0:	[0-9a-f]* 	{ andi r5, r6, 5 ; lh_u r25, r26 }
+    19c8:	[0-9a-f]* 	{ andi r5, r6, 5 ; info 19 ; lh r25, r26 }
+    19d0:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; lb r25, r26 }
+    19d8:	[0-9a-f]* 	{ andi r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 }
+    19e0:	[0-9a-f]* 	{ andi r5, r6, 5 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    19e8:	[0-9a-f]* 	{ andi r5, r6, 5 ; seqi r15, r16, 5 ; lb_u r25, r26 }
+    19f0:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; lh r25, r26 }
+    19f8:	[0-9a-f]* 	{ andi r5, r6, 5 ; seq r15, r16, r17 ; lh r25, r26 }
+    1a00:	[0-9a-f]* 	{ andi r5, r6, 5 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    1a08:	[0-9a-f]* 	{ andi r5, r6, 5 ; seqi r15, r16, 5 ; lh_u r25, r26 }
+    1a10:	[0-9a-f]* 	{ andi r5, r6, 5 ; lw r15, r16 }
+    1a18:	[0-9a-f]* 	{ andi r5, r6, 5 ; s3a r15, r16, r17 ; lw r25, r26 }
+    1a20:	[0-9a-f]* 	{ andi r5, r6, 5 ; lwadd r15, r16, 5 }
+    1a28:	[0-9a-f]* 	{ andi r5, r6, 5 ; mnz r15, r16, r17 ; sh r25, r26 }
+    1a30:	[0-9a-f]* 	{ andi r5, r6, 5 ; movei r15, 5 ; prefetch r25 }
+    1a38:	[0-9a-f]* 	{ andi r5, r6, 5 ; nop ; lb r25, r26 }
+    1a40:	[0-9a-f]* 	{ andi r5, r6, 5 ; or r15, r16, r17 ; lb r25, r26 }
+    1a48:	[0-9a-f]* 	{ andi r5, r6, 5 ; packbs_u r15, r16, r17 }
+    1a50:	[0-9a-f]* 	{ andi r5, r6, 5 ; rl r15, r16, r17 ; prefetch r25 }
+    1a58:	[0-9a-f]* 	{ andi r5, r6, 5 ; sub r15, r16, r17 ; prefetch r25 }
+    1a60:	[0-9a-f]* 	{ andi r5, r6, 5 ; rli r15, r16, 5 ; sb r25, r26 }
+    1a68:	[0-9a-f]* 	{ andi r5, r6, 5 ; s2a r15, r16, r17 ; sb r25, r26 }
+    1a70:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; sb r25, r26 }
+    1a78:	[0-9a-f]* 	{ andi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 }
+    1a80:	[0-9a-f]* 	{ andi r5, r6, 5 ; seq r15, r16, r17 ; sb r25, r26 }
+    1a88:	[0-9a-f]* 	{ andi r5, r6, 5 ; addi r15, r16, 5 ; sh r25, r26 }
+    1a90:	[0-9a-f]* 	{ andi r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 }
+    1a98:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+    1aa0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shlib r15, r16, 5 }
+    1aa8:	[0-9a-f]* 	{ andi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 }
+    1ab0:	[0-9a-f]* 	{ andi r5, r6, 5 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    1ab8:	[0-9a-f]* 	{ andi r5, r6, 5 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    1ac0:	[0-9a-f]* 	{ andi r5, r6, 5 ; slti r15, r16, 5 ; sb r25, r26 }
+    1ac8:	[0-9a-f]* 	{ andi r5, r6, 5 ; sne r15, r16, r17 ; lh r25, r26 }
+    1ad0:	[0-9a-f]* 	{ andi r5, r6, 5 ; srab r15, r16, r17 }
+    1ad8:	[0-9a-f]* 	{ andi r5, r6, 5 ; sub r15, r16, r17 ; sb r25, r26 }
+    1ae0:	[0-9a-f]* 	{ andi r5, r6, 5 ; mz r15, r16, r17 ; sw r25, r26 }
+    1ae8:	[0-9a-f]* 	{ andi r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+    1af0:	[0-9a-f]* 	{ andi r5, r6, 5 ; xor r15, r16, r17 }
+    1af8:	[0-9a-f]* 	{ bitx r5, r6 ; auli r15, r16, 4660 }
+    1b00:	[0-9a-f]* 	{ auli r15, r16, 4660 ; minib_u r5, r6, 5 }
+    1b08:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; auli r15, r16, 4660 }
+    1b10:	[0-9a-f]* 	{ auli r15, r16, 4660 ; or r5, r6, r7 }
+    1b18:	[0-9a-f]* 	{ auli r15, r16, 4660 ; seqh r5, r6, r7 }
+    1b20:	[0-9a-f]* 	{ auli r15, r16, 4660 ; slte r5, r6, r7 }
+    1b28:	[0-9a-f]* 	{ auli r15, r16, 4660 ; srai r5, r6, 5 }
+    1b30:	[0-9a-f]* 	{ auli r5, r6, 4660 ; addi r15, r16, 5 }
+    1b38:	[0-9a-f]* 	{ auli r5, r6, 4660 ; intlh r15, r16, r17 }
+    1b40:	[0-9a-f]* 	{ auli r5, r6, 4660 ; maxb_u r15, r16, r17 }
+    1b48:	[0-9a-f]* 	{ auli r5, r6, 4660 ; mzb r15, r16, r17 }
+    1b50:	[0-9a-f]* 	{ auli r5, r6, 4660 ; seqb r15, r16, r17 }
+    1b58:	[0-9a-f]* 	{ auli r5, r6, 4660 ; slt_u r15, r16, r17 }
+    1b60:	[0-9a-f]* 	{ auli r5, r6, 4660 ; sra r15, r16, r17 }
+    1b68:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; addbs_u r15, r16, r17 }
+    1b70:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; inthb r15, r16, r17 }
+    1b78:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; lw_na r15, r16 }
+    1b80:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; moveli.sn r15, 4660 }
+    1b88:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; sb r15, r16 }
+    1b90:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; shrib r15, r16, 5 }
+    1b98:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; sne r15, r16, r17 }
+    1ba0:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; xori r15, r16, 5 }
+    1ba8:	[0-9a-f]* 	{ avgh r5, r6, r7 ; ill }
+    1bb0:	[0-9a-f]* 	{ avgh r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    1bb8:	[0-9a-f]* 	{ avgh r5, r6, r7 ; move r15, r16 }
+    1bc0:	[0-9a-f]* 	{ avgh r5, r6, r7 ; s1a r15, r16, r17 }
+    1bc8:	[0-9a-f]* 	{ avgh r5, r6, r7 ; shrb r15, r16, r17 }
+    1bd0:	[0-9a-f]* 	{ avgh r5, r6, r7 ; sltib_u r15, r16, 5 }
+    1bd8:	[0-9a-f]* 	{ avgh r5, r6, r7 ; tns r15, r16 }
+    1be0:	[0-9a-f]* 	{ bitx r5, r6 ; addi r15, r16, 5 ; lh r25, r26 }
+    1be8:	[0-9a-f]* 	{ bitx r5, r6 ; and r15, r16, r17 ; sh r25, r26 }
+    1bf0:	[0-9a-f]* 	{ bitx r5, r6 ; lh_u r25, r26 }
+    1bf8:	[0-9a-f]* 	{ bitx r5, r6 ; info 19 ; lh r25, r26 }
+    1c00:	[0-9a-f]* 	{ bitx r5, r6 ; add r15, r16, r17 ; lb r25, r26 }
+    1c08:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; lb r25, r26 }
+    1c10:	[0-9a-f]* 	{ bitx r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    1c18:	[0-9a-f]* 	{ bitx r5, r6 ; seqi r15, r16, 5 ; lb_u r25, r26 }
+    1c20:	[0-9a-f]* 	{ bitx r5, r6 ; add r15, r16, r17 ; lh r25, r26 }
+    1c28:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; lh r25, r26 }
+    1c30:	[0-9a-f]* 	{ bitx r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    1c38:	[0-9a-f]* 	{ bitx r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 }
+    1c40:	[0-9a-f]* 	{ bitx r5, r6 ; lw r15, r16 }
+    1c48:	[0-9a-f]* 	{ bitx r5, r6 ; s3a r15, r16, r17 ; lw r25, r26 }
+    1c50:	[0-9a-f]* 	{ bitx r5, r6 ; lwadd r15, r16, 5 }
+    1c58:	[0-9a-f]* 	{ bitx r5, r6 ; mnz r15, r16, r17 ; sh r25, r26 }
+    1c60:	[0-9a-f]* 	{ bitx r5, r6 ; movei r15, 5 ; prefetch r25 }
+    1c68:	[0-9a-f]* 	{ bitx r5, r6 ; nop ; lb r25, r26 }
+    1c70:	[0-9a-f]* 	{ bitx r5, r6 ; or r15, r16, r17 ; lb r25, r26 }
+    1c78:	[0-9a-f]* 	{ bitx r5, r6 ; packbs_u r15, r16, r17 }
+    1c80:	[0-9a-f]* 	{ bitx r5, r6 ; rl r15, r16, r17 ; prefetch r25 }
+    1c88:	[0-9a-f]* 	{ bitx r5, r6 ; sub r15, r16, r17 ; prefetch r25 }
+    1c90:	[0-9a-f]* 	{ bitx r5, r6 ; rli r15, r16, 5 ; sb r25, r26 }
+    1c98:	[0-9a-f]* 	{ bitx r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 }
+    1ca0:	[0-9a-f]* 	{ bitx r5, r6 ; ill ; sb r25, r26 }
+    1ca8:	[0-9a-f]* 	{ bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 }
+    1cb0:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; sb r25, r26 }
+    1cb8:	[0-9a-f]* 	{ bitx r5, r6 ; addi r15, r16, 5 ; sh r25, r26 }
+    1cc0:	[0-9a-f]* 	{ bitx r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 }
+    1cc8:	[0-9a-f]* 	{ bitx r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+    1cd0:	[0-9a-f]* 	{ bitx r5, r6 ; shlib r15, r16, 5 }
+    1cd8:	[0-9a-f]* 	{ bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 }
+    1ce0:	[0-9a-f]* 	{ bitx r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    1ce8:	[0-9a-f]* 	{ bitx r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    1cf0:	[0-9a-f]* 	{ bitx r5, r6 ; slti r15, r16, 5 ; sb r25, r26 }
+    1cf8:	[0-9a-f]* 	{ bitx r5, r6 ; sne r15, r16, r17 ; lh r25, r26 }
+    1d00:	[0-9a-f]* 	{ bitx r5, r6 ; srab r15, r16, r17 }
+    1d08:	[0-9a-f]* 	{ bitx r5, r6 ; sub r15, r16, r17 ; sb r25, r26 }
+    1d10:	[0-9a-f]* 	{ bitx r5, r6 ; mz r15, r16, r17 ; sw r25, r26 }
+    1d18:	[0-9a-f]* 	{ bitx r5, r6 ; slti r15, r16, 5 ; sw r25, r26 }
+    1d20:	[0-9a-f]* 	{ bitx r5, r6 ; xor r15, r16, r17 }
+    1d28:	[0-9a-f]* 	{ bytex r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    1d30:	[0-9a-f]* 	{ bytex r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+    1d38:	[0-9a-f]* 	{ bytex r5, r6 ; lw r25, r26 }
+    1d40:	[0-9a-f]* 	{ bytex r5, r6 ; info 19 ; lh_u r25, r26 }
+    1d48:	[0-9a-f]* 	{ bytex r5, r6 ; addi r15, r16, 5 ; lb r25, r26 }
+    1d50:	[0-9a-f]* 	{ bytex r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 }
+    1d58:	[0-9a-f]* 	{ bytex r5, r6 ; and r15, r16, r17 ; lb_u r25, r26 }
+    1d60:	[0-9a-f]* 	{ bytex r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    1d68:	[0-9a-f]* 	{ bytex r5, r6 ; addi r15, r16, 5 ; lh r25, r26 }
+    1d70:	[0-9a-f]* 	{ bytex r5, r6 ; seqi r15, r16, 5 ; lh r25, r26 }
+    1d78:	[0-9a-f]* 	{ bytex r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 }
+    1d80:	[0-9a-f]* 	{ bytex r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    1d88:	[0-9a-f]* 	{ bytex r5, r6 ; add r15, r16, r17 ; lw r25, r26 }
+    1d90:	[0-9a-f]* 	{ bytex r5, r6 ; seq r15, r16, r17 ; lw r25, r26 }
+    1d98:	[0-9a-f]* 	{ bytex r5, r6 ; lwadd_na r15, r16, 5 }
+    1da0:	[0-9a-f]* 	{ bytex r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 }
+    1da8:	[0-9a-f]* 	{ bytex r5, r6 ; movei r15, 5 ; sb r25, r26 }
+    1db0:	[0-9a-f]* 	{ bytex r5, r6 ; nop ; lb_u r25, r26 }
+    1db8:	[0-9a-f]* 	{ bytex r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 }
+    1dc0:	[0-9a-f]* 	{ bytex r5, r6 ; packhb r15, r16, r17 }
+    1dc8:	[0-9a-f]* 	{ bytex r5, r6 ; rli r15, r16, 5 ; prefetch r25 }
+    1dd0:	[0-9a-f]* 	{ bytex r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    1dd8:	[0-9a-f]* 	{ bytex r5, r6 ; rli r15, r16, 5 ; sh r25, r26 }
+    1de0:	[0-9a-f]* 	{ bytex r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 }
+    1de8:	[0-9a-f]* 	{ bytex r5, r6 ; info 19 ; sb r25, r26 }
+    1df0:	[0-9a-f]* 	{ bytex r5, r6 ; slt r15, r16, r17 ; sb r25, r26 }
+    1df8:	[0-9a-f]* 	{ bytex r5, r6 ; seq r15, r16, r17 ; sh r25, r26 }
+    1e00:	[0-9a-f]* 	{ bytex r5, r6 ; and r15, r16, r17 ; sh r25, r26 }
+    1e08:	[0-9a-f]* 	{ bytex r5, r6 ; shl r15, r16, r17 ; sh r25, r26 }
+    1e10:	[0-9a-f]* 	{ bytex r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    1e18:	[0-9a-f]* 	{ bytex r5, r6 ; shlih r15, r16, 5 }
+    1e20:	[0-9a-f]* 	{ bytex r5, r6 ; shri r15, r16, 5 ; sh r25, r26 }
+    1e28:	[0-9a-f]* 	{ bytex r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 }
+    1e30:	[0-9a-f]* 	{ bytex r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    1e38:	[0-9a-f]* 	{ bytex r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+    1e40:	[0-9a-f]* 	{ bytex r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    1e48:	[0-9a-f]* 	{ bytex r5, r6 ; srah r15, r16, r17 }
+    1e50:	[0-9a-f]* 	{ bytex r5, r6 ; sub r15, r16, r17 ; sh r25, r26 }
+    1e58:	[0-9a-f]* 	{ bytex r5, r6 ; nop ; sw r25, r26 }
+    1e60:	[0-9a-f]* 	{ bytex r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    1e68:	[0-9a-f]* 	{ bytex r5, r6 ; xori r15, r16, 5 }
+    1e70:	[0-9a-f]* 	{ clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    1e78:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 }
+    1e80:	[0-9a-f]* 	{ clz r5, r6 ; sb r25, r26 }
+    1e88:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; prefetch r25 }
+    1e90:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 }
+    1e98:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; lb r25, r26 }
+    1ea0:	[0-9a-f]* 	{ clz r5, r6 ; lb_u r25, r26 }
+    1ea8:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    1eb0:	[0-9a-f]* 	{ clz r5, r6 ; andi r15, r16, 5 ; lh r25, r26 }
+    1eb8:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; lh r25, r26 }
+    1ec0:	[0-9a-f]* 	{ clz r5, r6 ; lh_u r25, r26 }
+    1ec8:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    1ed0:	[0-9a-f]* 	{ clz r5, r6 ; and r15, r16, r17 ; lw r25, r26 }
+    1ed8:	[0-9a-f]* 	{ clz r5, r6 ; shl r15, r16, r17 ; lw r25, r26 }
+    1ee0:	[0-9a-f]* 	{ clz r5, r6 ; maxh r15, r16, r17 }
+    1ee8:	[0-9a-f]* 	{ clz r5, r6 ; mnzb r15, r16, r17 }
+    1ef0:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 ; sw r25, r26 }
+    1ef8:	[0-9a-f]* 	{ clz r5, r6 ; nop ; lh_u r25, r26 }
+    1f00:	[0-9a-f]* 	{ clz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 }
+    1f08:	[0-9a-f]* 	{ clz r5, r6 ; packlb r15, r16, r17 }
+    1f10:	[0-9a-f]* 	{ clz r5, r6 ; s2a r15, r16, r17 ; prefetch r25 }
+    1f18:	[0-9a-f]* 	{ clz r5, r6 ; raise }
+    1f20:	[0-9a-f]* 	{ clz r5, r6 ; rli r15, r16, 5 }
+    1f28:	[0-9a-f]* 	{ clz r5, r6 ; s2a r15, r16, r17 }
+    1f30:	[0-9a-f]* 	{ clz r5, r6 ; move r15, r16 ; sb r25, r26 }
+    1f38:	[0-9a-f]* 	{ clz r5, r6 ; slte r15, r16, r17 ; sb r25, r26 }
+    1f40:	[0-9a-f]* 	{ clz r5, r6 ; seq r15, r16, r17 }
+    1f48:	[0-9a-f]* 	{ clz r5, r6 ; sh r25, r26 }
+    1f50:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; sh r25, r26 }
+    1f58:	[0-9a-f]* 	{ clz r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+    1f60:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    1f68:	[0-9a-f]* 	{ clz r5, r6 ; shri r15, r16, 5 }
+    1f70:	[0-9a-f]* 	{ clz r5, r6 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    1f78:	[0-9a-f]* 	{ clz r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 }
+    1f80:	[0-9a-f]* 	{ clz r5, r6 ; slti r15, r16, 5 }
+    1f88:	[0-9a-f]* 	{ clz r5, r6 ; sne r15, r16, r17 ; prefetch r25 }
+    1f90:	[0-9a-f]* 	{ clz r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    1f98:	[0-9a-f]* 	{ clz r5, r6 ; sub r15, r16, r17 }
+    1fa0:	[0-9a-f]* 	{ clz r5, r6 ; or r15, r16, r17 ; sw r25, r26 }
+    1fa8:	[0-9a-f]* 	{ clz r5, r6 ; sra r15, r16, r17 ; sw r25, r26 }
+    1fb0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; addb r15, r16, r17 }
+    1fb8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; infol 4660 }
+    1fc0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; lw r15, r16 }
+    1fc8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; moveli r15, 4660 }
+    1fd0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; s3a r15, r16, r17 }
+    1fd8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; shri r15, r16, 5 }
+    1fe0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; sltih_u r15, r16, 5 }
+    1fe8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; xor r15, r16, r17 }
+    1ff0:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; icoh r15 }
+    1ff8:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; lhadd r15, r16, 5 }
+    2000:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; mnzh r15, r16, r17 }
+    2008:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; rli r15, r16, 5 }
+    2010:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; shr r15, r16, r17 }
+    2018:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; sltib r15, r16, 5 }
+    2020:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; swadd r15, r16, 5 }
+    2028:	[0-9a-f]* 	{ ctz r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    2030:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; sb r25, r26 }
+    2038:	[0-9a-f]* 	{ ctz r5, r6 ; lh r25, r26 }
+    2040:	[0-9a-f]* 	{ ctz r5, r6 ; info 19 ; lb_u r25, r26 }
+    2048:	[0-9a-f]* 	{ ctz r5, r6 ; lb r15, r16 }
+    2050:	[0-9a-f]* 	{ ctz r5, r6 ; s3a r15, r16, r17 ; lb r25, r26 }
+    2058:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 }
+    2060:	[0-9a-f]* 	{ ctz r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    2068:	[0-9a-f]* 	{ ctz r5, r6 ; lh r15, r16 }
+    2070:	[0-9a-f]* 	{ ctz r5, r6 ; s3a r15, r16, r17 ; lh r25, r26 }
+    2078:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; lh_u r25, r26 }
+    2080:	[0-9a-f]* 	{ ctz r5, r6 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    2088:	[0-9a-f]* 	{ ctz r5, r6 ; lnk r15 }
+    2090:	[0-9a-f]* 	{ ctz r5, r6 ; s2a r15, r16, r17 ; lw r25, r26 }
+    2098:	[0-9a-f]* 	{ ctz r5, r6 ; lw_na r15, r16 }
+    20a0:	[0-9a-f]* 	{ ctz r5, r6 ; mnz r15, r16, r17 ; sb r25, r26 }
+    20a8:	[0-9a-f]* 	{ ctz r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    20b0:	[0-9a-f]* 	{ ctz r5, r6 ; mzh r15, r16, r17 }
+    20b8:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 }
+    20c0:	[0-9a-f]* 	{ ctz r5, r6 ; ori r15, r16, 5 }
+    20c8:	[0-9a-f]* 	{ ctz r5, r6 ; ori r15, r16, 5 ; prefetch r25 }
+    20d0:	[0-9a-f]* 	{ ctz r5, r6 ; srai r15, r16, 5 ; prefetch r25 }
+    20d8:	[0-9a-f]* 	{ ctz r5, r6 ; rli r15, r16, 5 ; prefetch r25 }
+    20e0:	[0-9a-f]* 	{ ctz r5, r6 ; s2a r15, r16, r17 ; prefetch r25 }
+    20e8:	[0-9a-f]* 	{ ctz r5, r6 ; sb r25, r26 }
+    20f0:	[0-9a-f]* 	{ ctz r5, r6 ; shr r15, r16, r17 ; sb r25, r26 }
+    20f8:	[0-9a-f]* 	{ ctz r5, r6 ; seq r15, r16, r17 ; prefetch r25 }
+    2100:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; sh r25, r26 }
+    2108:	[0-9a-f]* 	{ ctz r5, r6 ; seq r15, r16, r17 ; sh r25, r26 }
+    2110:	[0-9a-f]* 	{ ctz r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    2118:	[0-9a-f]* 	{ ctz r5, r6 ; shli r15, r16, 5 }
+    2120:	[0-9a-f]* 	{ ctz r5, r6 ; shri r15, r16, 5 ; prefetch r25 }
+    2128:	[0-9a-f]* 	{ ctz r5, r6 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    2130:	[0-9a-f]* 	{ ctz r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    2138:	[0-9a-f]* 	{ ctz r5, r6 ; slti r15, r16, 5 ; prefetch r25 }
+    2140:	[0-9a-f]* 	{ ctz r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    2148:	[0-9a-f]* 	{ ctz r5, r6 ; sra r15, r16, r17 }
+    2150:	[0-9a-f]* 	{ ctz r5, r6 ; sub r15, r16, r17 ; prefetch r25 }
+    2158:	[0-9a-f]* 	{ ctz r5, r6 ; movei r15, 5 ; sw r25, r26 }
+    2160:	[0-9a-f]* 	{ ctz r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    2168:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; sw r25, r26 }
+    2170:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; dtlbpr r15 }
+    2178:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; dtlbpr r15 }
+    2180:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; dtlbpr r15 }
+    2188:	[0-9a-f]* 	{ nop ; dtlbpr r15 }
+    2190:	[0-9a-f]* 	{ seq r5, r6, r7 ; dtlbpr r15 }
+    2198:	[0-9a-f]* 	{ sltb r5, r6, r7 ; dtlbpr r15 }
+    21a0:	[0-9a-f]* 	{ srab r5, r6, r7 ; dtlbpr r15 }
+    21a8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; addh r15, r16, r17 }
+    21b0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; inthh r15, r16, r17 }
+    21b8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; lwadd r15, r16, 5 }
+    21c0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; mtspr 5, r16 }
+    21c8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; sbadd r15, r16, 5 }
+    21d0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; shrih r15, r16, 5 }
+    21d8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; sneb r15, r16, r17 }
+    21e0:	[0-9a-f]* 	{ add r5, r6, r7 ; finv r15 }
+    21e8:	[0-9a-f]* 	{ clz r5, r6 ; finv r15 }
+    21f0:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; finv r15 }
+    21f8:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; finv r15 }
+    2200:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; finv r15 }
+    2208:	[0-9a-f]* 	{ seqib r5, r6, 5 ; finv r15 }
+    2210:	[0-9a-f]* 	{ slteb r5, r6, r7 ; finv r15 }
+    2218:	[0-9a-f]* 	{ sraih r5, r6, 5 ; finv r15 }
+    2220:	[0-9a-f]* 	{ addih r5, r6, 5 ; flush r15 }
+    2228:	[0-9a-f]* 	{ infol 4660 ; flush r15 }
+    2230:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; flush r15 }
+    2238:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; flush r15 }
+    2240:	[0-9a-f]* 	{ s1a r5, r6, r7 ; flush r15 }
+    2248:	[0-9a-f]* 	{ shlih r5, r6, 5 ; flush r15 }
+    2250:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; flush r15 }
+    2258:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; flush r15 }
+    2260:	[0-9a-f]* 	{ add r5, r6, r7 ; lw r25, r26 }
+    2268:	[0-9a-f]* 	{ addi r15, r16, 5 ; sb r25, r26 }
+    2270:	[0-9a-f]* 	{ addli.sn r15, r16, 4660 }
+    2278:	[0-9a-f]* 	{ and r5, r6, r7 ; lw r25, r26 }
+    2280:	[0-9a-f]* 	{ andi r5, r6, 5 ; lw r25, r26 }
+    2288:	[0-9a-f]* 	{ bytex r5, r6 ; lb r25, r26 }
+    2290:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 }
+    2298:	[0-9a-f]* 	{ lw r25, r26 }
+    22a0:	[0-9a-f]* 	{ info 19 ; lh_u r25, r26 }
+    22a8:	[0-9a-f]* 	{ jr r15 }
+    22b0:	[0-9a-f]* 	{ move r15, r16 ; lb r25, r26 }
+    22b8:	[0-9a-f]* 	{ or r15, r16, r17 ; lb r25, r26 }
+    22c0:	[0-9a-f]* 	{ shl r5, r6, r7 ; lb r25, r26 }
+    22c8:	[0-9a-f]* 	{ sne r5, r6, r7 ; lb r25, r26 }
+    22d0:	[0-9a-f]* 	{ and r5, r6, r7 ; lb_u r25, r26 }
+    22d8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; lb_u r25, r26 }
+    22e0:	[0-9a-f]* 	{ rli r5, r6, 5 ; lb_u r25, r26 }
+    22e8:	[0-9a-f]* 	{ slt r5, r6, r7 ; lb_u r25, r26 }
+    22f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; lb_u r25, r26 }
+    22f8:	[0-9a-f]* 	{ ctz r5, r6 ; lh r25, r26 }
+    2300:	[0-9a-f]* 	{ mvz r5, r6, r7 ; lh r25, r26 }
+    2308:	[0-9a-f]* 	{ s3a r5, r6, r7 ; lh r25, r26 }
+    2310:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; lh r25, r26 }
+    2318:	[0-9a-f]* 	{ lh_u r15, r16 }
+    2320:	[0-9a-f]* 	{ movei r15, 5 ; lh_u r25, r26 }
+    2328:	[0-9a-f]* 	{ ori r15, r16, 5 ; lh_u r25, r26 }
+    2330:	[0-9a-f]* 	{ shli r5, r6, 5 ; lh_u r25, r26 }
+    2338:	[0-9a-f]* 	{ sra r5, r6, r7 ; lh_u r25, r26 }
+    2340:	[0-9a-f]* 	{ and r15, r16, r17 ; lw r25, r26 }
+    2348:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lw r25, r26 }
+    2350:	[0-9a-f]* 	{ rli r15, r16, 5 ; lw r25, r26 }
+    2358:	[0-9a-f]* 	{ slt r15, r16, r17 ; lw r25, r26 }
+    2360:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lw r25, r26 }
+    2368:	[0-9a-f]* 	{ minb_u r15, r16, r17 }
+    2370:	[0-9a-f]* 	{ mnz r5, r6, r7 ; lb r25, r26 }
+    2378:	[0-9a-f]* 	{ move r15, r16 ; sb r25, r26 }
+    2380:	[0-9a-f]* 	{ movei r15, 5 ; sb r25, r26 }
+    2388:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lb_u r25, r26 }
+    2390:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lb r25, r26 }
+    2398:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 }
+    23a0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; lb r25, r26 }
+    23a8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 }
+    23b0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sw r25, r26 }
+    23b8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sh r25, r26 }
+    23c0:	[0-9a-f]* 	{ mz r5, r6, r7 ; sh r25, r26 }
+    23c8:	[0-9a-f]* 	{ nor r15, r16, r17 ; lh_u r25, r26 }
+    23d0:	[0-9a-f]* 	{ or r15, r16, r17 ; lh_u r25, r26 }
+    23d8:	[0-9a-f]* 	{ ori r15, r16, 5 ; lh_u r25, r26 }
+    23e0:	[0-9a-f]* 	{ packhb r5, r6, r7 }
+    23e8:	[0-9a-f]* 	{ and r15, r16, r17 ; prefetch r25 }
+    23f0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; prefetch r25 }
+    23f8:	[0-9a-f]* 	{ rli r15, r16, 5 ; prefetch r25 }
+    2400:	[0-9a-f]* 	{ slt r15, r16, r17 ; prefetch r25 }
+    2408:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; prefetch r25 }
+    2410:	[0-9a-f]* 	{ rl r5, r6, r7 ; lh r25, r26 }
+    2418:	[0-9a-f]* 	{ rli r5, r6, 5 ; lh r25, r26 }
+    2420:	[0-9a-f]* 	{ s1a r5, r6, r7 ; lh r25, r26 }
+    2428:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lh r25, r26 }
+    2430:	[0-9a-f]* 	{ s3a r5, r6, r7 ; lh r25, r26 }
+    2438:	[0-9a-f]* 	{ and r5, r6, r7 ; sb r25, r26 }
+    2440:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sb r25, r26 }
+    2448:	[0-9a-f]* 	{ rli r5, r6, 5 ; sb r25, r26 }
+    2450:	[0-9a-f]* 	{ slt r5, r6, r7 ; sb r25, r26 }
+    2458:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sb r25, r26 }
+    2460:	[0-9a-f]* 	{ seq r5, r6, r7 ; lh_u r25, r26 }
+    2468:	[0-9a-f]* 	{ seqi r15, r16, 5 }
+    2470:	[0-9a-f]* 	{ and r15, r16, r17 ; sh r25, r26 }
+    2478:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sh r25, r26 }
+    2480:	[0-9a-f]* 	{ rli r15, r16, 5 ; sh r25, r26 }
+    2488:	[0-9a-f]* 	{ slt r15, r16, r17 ; sh r25, r26 }
+    2490:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sh r25, r26 }
+    2498:	[0-9a-f]* 	{ shl r5, r6, r7 ; lh r25, r26 }
+    24a0:	[0-9a-f]* 	{ shli r15, r16, 5 ; sw r25, r26 }
+    24a8:	[0-9a-f]* 	{ shr r15, r16, r17 ; lw r25, r26 }
+    24b0:	[0-9a-f]* 	{ shri r15, r16, 5 ; lb r25, r26 }
+    24b8:	[0-9a-f]* 	{ shrib r15, r16, 5 }
+    24c0:	[0-9a-f]* 	{ slt r5, r6, r7 ; sb r25, r26 }
+    24c8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sb r25, r26 }
+    24d0:	[0-9a-f]* 	{ slte r5, r6, r7 ; lh r25, r26 }
+    24d8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; lh r25, r26 }
+    24e0:	[0-9a-f]* 	{ slti r15, r16, 5 ; lb r25, r26 }
+    24e8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; lb r25, r26 }
+    24f0:	[0-9a-f]* 	{ sltib r15, r16, 5 }
+    24f8:	[0-9a-f]* 	{ sne r5, r6, r7 ; lh r25, r26 }
+    2500:	[0-9a-f]* 	{ sra r15, r16, r17 ; sw r25, r26 }
+    2508:	[0-9a-f]* 	{ srai r15, r16, 5 ; lw r25, r26 }
+    2510:	[0-9a-f]* 	{ sub r15, r16, r17 ; lb r25, r26 }
+    2518:	[0-9a-f]* 	{ subb r15, r16, r17 }
+    2520:	[0-9a-f]* 	{ bytex r5, r6 ; sw r25, r26 }
+    2528:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sw r25, r26 }
+    2530:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sw r25, r26 }
+    2538:	[0-9a-f]* 	{ slte r5, r6, r7 ; sw r25, r26 }
+    2540:	[0-9a-f]* 	{ xor r5, r6, r7 ; sw r25, r26 }
+    2548:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sh r25, r26 }
+    2550:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sh r25, r26 }
+    2558:	[0-9a-f]* 	{ xor r5, r6, r7 ; prefetch r25 }
+    2560:	[0-9a-f]* 	{ and r5, r6, r7 ; icoh r15 }
+    2568:	[0-9a-f]* 	{ maxh r5, r6, r7 ; icoh r15 }
+    2570:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; icoh r15 }
+    2578:	[0-9a-f]* 	{ mz r5, r6, r7 ; icoh r15 }
+    2580:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; icoh r15 }
+    2588:	[0-9a-f]* 	{ shrih r5, r6, 5 ; icoh r15 }
+    2590:	[0-9a-f]* 	{ sneb r5, r6, r7 ; icoh r15 }
+    2598:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; lb r25, r26 }
+    25a0:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; sb r25, r26 }
+    25a8:	[0-9a-f]* 	{ and r5, r6, r7 ; ill }
+    25b0:	[0-9a-f]* 	{ bitx r5, r6 ; ill ; sb r25, r26 }
+    25b8:	[0-9a-f]* 	{ clz r5, r6 ; ill ; sb r25, r26 }
+    25c0:	[0-9a-f]* 	{ ill ; lh_u r25, r26 }
+    25c8:	[0-9a-f]* 	{ intlb r5, r6, r7 ; ill }
+    25d0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ill ; lb r25, r26 }
+    25d8:	[0-9a-f]* 	{ shli r5, r6, 5 ; ill ; lb r25, r26 }
+    25e0:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; lb_u r25, r26 }
+    25e8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ill ; lb_u r25, r26 }
+    25f0:	[0-9a-f]* 	{ slt r5, r6, r7 ; ill ; lb_u r25, r26 }
+    25f8:	[0-9a-f]* 	{ bitx r5, r6 ; ill ; lh r25, r26 }
+    2600:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; lh r25, r26 }
+    2608:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; ill ; lh r25, r26 }
+    2610:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; lh_u r25, r26 }
+    2618:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; lh_u r25, r26 }
+    2620:	[0-9a-f]* 	{ sne r5, r6, r7 ; ill ; lh_u r25, r26 }
+    2628:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ill ; lw r25, r26 }
+    2630:	[0-9a-f]* 	{ rl r5, r6, r7 ; ill ; lw r25, r26 }
+    2638:	[0-9a-f]* 	{ sub r5, r6, r7 ; ill ; lw r25, r26 }
+    2640:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ill ; lw r25, r26 }
+    2648:	[0-9a-f]* 	{ movei r5, 5 ; ill ; lh r25, r26 }
+    2650:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; ill }
+    2658:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ill }
+    2660:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; ill }
+    2668:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ill }
+    2670:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; ill ; sw r25, r26 }
+    2678:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; ill ; sb r25, r26 }
+    2680:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; sb r25, r26 }
+    2688:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; lw r25, r26 }
+    2690:	[0-9a-f]* 	{ ori r5, r6, 5 ; ill ; lw r25, r26 }
+    2698:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; prefetch r25 }
+    26a0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; ill ; prefetch r25 }
+    26a8:	[0-9a-f]* 	{ shri r5, r6, 5 ; ill ; prefetch r25 }
+    26b0:	[0-9a-f]* 	{ rl r5, r6, r7 ; ill ; lh_u r25, r26 }
+    26b8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; ill ; lh_u r25, r26 }
+    26c0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; ill ; lh_u r25, r26 }
+    26c8:	[0-9a-f]* 	{ ctz r5, r6 ; ill ; sb r25, r26 }
+    26d0:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; sb r25, r26 }
+    26d8:	[0-9a-f]* 	{ sne r5, r6, r7 ; ill ; sb r25, r26 }
+    26e0:	[0-9a-f]* 	{ seqb r5, r6, r7 ; ill }
+    26e8:	[0-9a-f]* 	{ clz r5, r6 ; ill ; sh r25, r26 }
+    26f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; sh r25, r26 }
+    26f8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ill ; sh r25, r26 }
+    2700:	[0-9a-f]* 	{ shl r5, r6, r7 ; ill }
+    2708:	[0-9a-f]* 	{ shr r5, r6, r7 ; ill ; prefetch r25 }
+    2710:	[0-9a-f]* 	{ slt r5, r6, r7 ; ill ; lb_u r25, r26 }
+    2718:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; ill }
+    2720:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; ill }
+    2728:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ill ; lh_u r25, r26 }
+    2730:	[0-9a-f]* 	{ sne r5, r6, r7 ; ill }
+    2738:	[0-9a-f]* 	{ srai r5, r6, 5 ; ill ; prefetch r25 }
+    2740:	[0-9a-f]* 	{ subhs r5, r6, r7 ; ill }
+    2748:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ill ; sw r25, r26 }
+    2750:	[0-9a-f]* 	{ shli r5, r6, 5 ; ill ; sw r25, r26 }
+    2758:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ill ; lb_u r25, r26 }
+    2760:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ill ; lb_u r25, r26 }
+    2768:	[0-9a-f]* 	{ xor r5, r6, r7 ; ill ; lb_u r25, r26 }
+    2770:	[0-9a-f]* 	{ info 19 ; add r5, r6, r7 ; lb r25, r26 }
+    2778:	[0-9a-f]* 	{ info 19 ; addi r15, r16, 5 ; lh r25, r26 }
+    2780:	[0-9a-f]* 	{ info 19 ; addih r15, r16, 5 }
+    2788:	[0-9a-f]* 	{ info 19 ; and r5, r6, r7 ; lb r25, r26 }
+    2790:	[0-9a-f]* 	{ info 19 ; andi r5, r6, 5 ; lb r25, r26 }
+    2798:	[0-9a-f]* 	{ bitx r5, r6 ; info 19 ; sb r25, r26 }
+    27a0:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; sb r25, r26 }
+    27a8:	[0-9a-f]* 	{ info 19 ; lb r25, r26 }
+    27b0:	[0-9a-f]* 	{ info 19 ; ill }
+    27b8:	[0-9a-f]* 	{ info 19 ; inv r15 }
+    27c0:	[0-9a-f]* 	{ info 19 ; ill ; lb r25, r26 }
+    27c8:	[0-9a-f]* 	{ info 19 ; mz r5, r6, r7 ; lb r25, r26 }
+    27d0:	[0-9a-f]* 	{ info 19 ; seq r5, r6, r7 ; lb r25, r26 }
+    27d8:	[0-9a-f]* 	{ info 19 ; slti r5, r6, 5 ; lb r25, r26 }
+    27e0:	[0-9a-f]* 	{ info 19 ; add r5, r6, r7 ; lb_u r25, r26 }
+    27e8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+    27f0:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; lb_u r25, r26 }
+    27f8:	[0-9a-f]* 	{ info 19 ; shr r5, r6, r7 ; lb_u r25, r26 }
+    2800:	[0-9a-f]* 	{ info 19 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    2808:	[0-9a-f]* 	{ info 19 ; andi r5, r6, 5 ; lh r25, r26 }
+    2810:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; info 19 ; lh r25, r26 }
+    2818:	[0-9a-f]* 	{ info 19 ; s1a r5, r6, r7 ; lh r25, r26 }
+    2820:	[0-9a-f]* 	{ info 19 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    2828:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; info 19 ; lh r25, r26 }
+    2830:	[0-9a-f]* 	{ info 19 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    2838:	[0-9a-f]* 	{ info 19 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    2840:	[0-9a-f]* 	{ info 19 ; seqi r5, r6, 5 ; lh_u r25, r26 }
+    2848:	[0-9a-f]* 	{ info 19 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    2850:	[0-9a-f]* 	{ info 19 ; add r15, r16, r17 ; lw r25, r26 }
+    2858:	[0-9a-f]* 	{ info 19 ; movei r5, 5 ; lw r25, r26 }
+    2860:	[0-9a-f]* 	{ info 19 ; ori r5, r6, 5 ; lw r25, r26 }
+    2868:	[0-9a-f]* 	{ info 19 ; shr r15, r16, r17 ; lw r25, r26 }
+    2870:	[0-9a-f]* 	{ info 19 ; srai r15, r16, 5 ; lw r25, r26 }
+    2878:	[0-9a-f]* 	{ info 19 ; maxih r15, r16, 5 }
+    2880:	[0-9a-f]* 	{ info 19 ; mnz r15, r16, r17 ; sb r25, r26 }
+    2888:	[0-9a-f]* 	{ info 19 ; move r15, r16 ; lh r25, r26 }
+    2890:	[0-9a-f]* 	{ info 19 ; movei r15, 5 ; lh r25, r26 }
+    2898:	[0-9a-f]* 	{ info 19 ; moveli.sn r15, 4660 }
+    28a0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; info 19 ; sb r25, r26 }
+    28a8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; info 19 ; prefetch r25 }
+    28b0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; info 19 ; sb r25, r26 }
+    28b8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; info 19 ; prefetch r25 }
+    28c0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; info 19 ; lw r25, r26 }
+    28c8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+    28d0:	[0-9a-f]* 	{ info 19 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    28d8:	[0-9a-f]* 	{ info 19 ; nop }
+    28e0:	[0-9a-f]* 	{ info 19 ; nor r5, r6, r7 }
+    28e8:	[0-9a-f]* 	{ info 19 ; or r5, r6, r7 }
+    28f0:	[0-9a-f]* 	{ info 19 ; ori r5, r6, 5 }
+    28f8:	[0-9a-f]* 	{ info 19 ; add r15, r16, r17 ; prefetch r25 }
+    2900:	[0-9a-f]* 	{ info 19 ; movei r5, 5 ; prefetch r25 }
+    2908:	[0-9a-f]* 	{ info 19 ; ori r5, r6, 5 ; prefetch r25 }
+    2910:	[0-9a-f]* 	{ info 19 ; shr r15, r16, r17 ; prefetch r25 }
+    2918:	[0-9a-f]* 	{ info 19 ; srai r15, r16, 5 ; prefetch r25 }
+    2920:	[0-9a-f]* 	{ info 19 ; rl r15, r16, r17 ; sw r25, r26 }
+    2928:	[0-9a-f]* 	{ info 19 ; rli r15, r16, 5 ; sw r25, r26 }
+    2930:	[0-9a-f]* 	{ info 19 ; s1a r15, r16, r17 ; sw r25, r26 }
+    2938:	[0-9a-f]* 	{ info 19 ; s2a r15, r16, r17 ; sw r25, r26 }
+    2940:	[0-9a-f]* 	{ info 19 ; s3a r15, r16, r17 ; sw r25, r26 }
+    2948:	[0-9a-f]* 	{ info 19 ; add r5, r6, r7 ; sb r25, r26 }
+    2950:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; info 19 ; sb r25, r26 }
+    2958:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; sb r25, r26 }
+    2960:	[0-9a-f]* 	{ info 19 ; shr r5, r6, r7 ; sb r25, r26 }
+    2968:	[0-9a-f]* 	{ info 19 ; srai r5, r6, 5 ; sb r25, r26 }
+    2970:	[0-9a-f]* 	{ info 19 ; seq r15, r16, r17 }
+    2978:	[0-9a-f]* 	{ info 19 ; seqi r15, r16, 5 ; prefetch r25 }
+    2980:	[0-9a-f]* 	{ info 19 ; add r15, r16, r17 ; sh r25, r26 }
+    2988:	[0-9a-f]* 	{ info 19 ; movei r5, 5 ; sh r25, r26 }
+    2990:	[0-9a-f]* 	{ info 19 ; ori r5, r6, 5 ; sh r25, r26 }
+    2998:	[0-9a-f]* 	{ info 19 ; shr r15, r16, r17 ; sh r25, r26 }
+    29a0:	[0-9a-f]* 	{ info 19 ; srai r15, r16, 5 ; sh r25, r26 }
+    29a8:	[0-9a-f]* 	{ info 19 ; shl r15, r16, r17 ; sw r25, r26 }
+    29b0:	[0-9a-f]* 	{ info 19 ; shli r15, r16, 5 ; lw r25, r26 }
+    29b8:	[0-9a-f]* 	{ info 19 ; shr r15, r16, r17 ; lb r25, r26 }
+    29c0:	[0-9a-f]* 	{ info 19 ; shrb r15, r16, r17 }
+    29c8:	[0-9a-f]* 	{ info 19 ; shri r5, r6, 5 ; sb r25, r26 }
+    29d0:	[0-9a-f]* 	{ info 19 ; slt r5, r6, r7 ; lh r25, r26 }
+    29d8:	[0-9a-f]* 	{ info 19 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    29e0:	[0-9a-f]* 	{ info 19 ; slte r15, r16, r17 ; sw r25, r26 }
+    29e8:	[0-9a-f]* 	{ info 19 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    29f0:	[0-9a-f]* 	{ info 19 ; slth r15, r16, r17 }
+    29f8:	[0-9a-f]* 	{ info 19 ; slti r5, r6, 5 ; sb r25, r26 }
+    2a00:	[0-9a-f]* 	{ info 19 ; slti_u r5, r6, 5 ; sb r25, r26 }
+    2a08:	[0-9a-f]* 	{ info 19 ; sne r15, r16, r17 ; sw r25, r26 }
+    2a10:	[0-9a-f]* 	{ info 19 ; sra r15, r16, r17 ; lw r25, r26 }
+    2a18:	[0-9a-f]* 	{ info 19 ; srai r15, r16, 5 ; lb r25, r26 }
+    2a20:	[0-9a-f]* 	{ info 19 ; sraib r15, r16, 5 }
+    2a28:	[0-9a-f]* 	{ info 19 ; sub r5, r6, r7 ; sb r25, r26 }
+    2a30:	[0-9a-f]* 	{ info 19 ; and r5, r6, r7 ; sw r25, r26 }
+    2a38:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; info 19 ; sw r25, r26 }
+    2a40:	[0-9a-f]* 	{ info 19 ; rli r5, r6, 5 ; sw r25, r26 }
+    2a48:	[0-9a-f]* 	{ info 19 ; slt r5, r6, r7 ; sw r25, r26 }
+    2a50:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; sw r25, r26 }
+    2a58:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; lh_u r25, r26 }
+    2a60:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; info 19 ; lh_u r25, r26 }
+    2a68:	[0-9a-f]* 	{ info 19 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    2a70:	[0-9a-f]* 	{ infol 4660 ; addhs r5, r6, r7 }
+    2a78:	[0-9a-f]* 	{ infol 4660 ; auli r5, r6, 4660 }
+    2a80:	[0-9a-f]* 	{ infol 4660 ; inthh r15, r16, r17 }
+    2a88:	[0-9a-f]* 	{ infol 4660 ; lnk r15 }
+    2a90:	[0-9a-f]* 	{ infol 4660 ; minib_u r5, r6, 5 }
+    2a98:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; infol 4660 }
+    2aa0:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; infol 4660 }
+    2aa8:	[0-9a-f]* 	{ infol 4660 ; packhb r15, r16, r17 }
+    2ab0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; infol 4660 }
+    2ab8:	[0-9a-f]* 	{ infol 4660 ; shadd r15, r16, 5 }
+    2ac0:	[0-9a-f]* 	{ infol 4660 ; shri r5, r6, 5 }
+    2ac8:	[0-9a-f]* 	{ infol 4660 ; slteb_u r5, r6, r7 }
+    2ad0:	[0-9a-f]* 	{ infol 4660 ; sltih_u r5, r6, 5 }
+    2ad8:	[0-9a-f]* 	{ infol 4660 ; sub r5, r6, r7 }
+    2ae0:	[0-9a-f]* 	{ infol 4660 ; xor r5, r6, r7 }
+    2ae8:	[0-9a-f]* 	{ avgh r5, r6, r7 ; inthb r15, r16, r17 }
+    2af0:	[0-9a-f]* 	{ inthb r15, r16, r17 ; minh r5, r6, r7 }
+    2af8:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; inthb r15, r16, r17 }
+    2b00:	[0-9a-f]* 	{ inthb r15, r16, r17 ; nor r5, r6, r7 }
+    2b08:	[0-9a-f]* 	{ inthb r15, r16, r17 ; seqb r5, r6, r7 }
+    2b10:	[0-9a-f]* 	{ inthb r15, r16, r17 ; sltb_u r5, r6, r7 }
+    2b18:	[0-9a-f]* 	{ inthb r15, r16, r17 ; srah r5, r6, r7 }
+    2b20:	[0-9a-f]* 	{ inthb r5, r6, r7 ; addhs r15, r16, r17 }
+    2b28:	[0-9a-f]* 	{ inthb r5, r6, r7 ; intlb r15, r16, r17 }
+    2b30:	[0-9a-f]* 	{ inthb r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    2b38:	[0-9a-f]* 	{ inthb r5, r6, r7 ; mz r15, r16, r17 }
+    2b40:	[0-9a-f]* 	{ inthb r5, r6, r7 ; seq r15, r16, r17 }
+    2b48:	[0-9a-f]* 	{ inthb r5, r6, r7 ; slt r15, r16, r17 }
+    2b50:	[0-9a-f]* 	{ inthb r5, r6, r7 ; sneh r15, r16, r17 }
+    2b58:	[0-9a-f]* 	{ inthh r15, r16, r17 ; addb r5, r6, r7 }
+    2b60:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; inthh r15, r16, r17 }
+    2b68:	[0-9a-f]* 	{ inthh r15, r16, r17 ; mnz r5, r6, r7 }
+    2b70:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; inthh r15, r16, r17 }
+    2b78:	[0-9a-f]* 	{ inthh r15, r16, r17 ; packhb r5, r6, r7 }
+    2b80:	[0-9a-f]* 	{ inthh r15, r16, r17 ; seqih r5, r6, 5 }
+    2b88:	[0-9a-f]* 	{ inthh r15, r16, r17 ; slteb_u r5, r6, r7 }
+    2b90:	[0-9a-f]* 	{ inthh r15, r16, r17 ; sub r5, r6, r7 }
+    2b98:	[0-9a-f]* 	{ inthh r5, r6, r7 ; addli r15, r16, 4660 }
+    2ba0:	[0-9a-f]* 	{ inthh r5, r6, r7 ; jalr r15 }
+    2ba8:	[0-9a-f]* 	{ inthh r5, r6, r7 ; maxih r15, r16, 5 }
+    2bb0:	[0-9a-f]* 	{ inthh r5, r6, r7 ; nor r15, r16, r17 }
+    2bb8:	[0-9a-f]* 	{ inthh r5, r6, r7 ; seqib r15, r16, 5 }
+    2bc0:	[0-9a-f]* 	{ inthh r5, r6, r7 ; slte r15, r16, r17 }
+    2bc8:	[0-9a-f]* 	{ inthh r5, r6, r7 ; srai r15, r16, 5 }
+    2bd0:	[0-9a-f]* 	{ intlb r15, r16, r17 ; addi r5, r6, 5 }
+    2bd8:	[0-9a-f]* 	{ intlb r15, r16, r17 }
+    2be0:	[0-9a-f]* 	{ intlb r15, r16, r17 ; movei r5, 5 }
+    2be8:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; intlb r15, r16, r17 }
+    2bf0:	[0-9a-f]* 	{ intlb r15, r16, r17 ; rl r5, r6, r7 }
+    2bf8:	[0-9a-f]* 	{ intlb r15, r16, r17 ; shli r5, r6, 5 }
+    2c00:	[0-9a-f]* 	{ intlb r15, r16, r17 ; slth_u r5, r6, r7 }
+    2c08:	[0-9a-f]* 	{ intlb r15, r16, r17 ; subhs r5, r6, r7 }
+    2c10:	[0-9a-f]* 	{ intlb r5, r6, r7 ; andi r15, r16, 5 }
+    2c18:	[0-9a-f]* 	{ intlb r5, r6, r7 ; lb r15, r16 }
+    2c20:	[0-9a-f]* 	{ intlb r5, r6, r7 ; minh r15, r16, r17 }
+    2c28:	[0-9a-f]* 	{ intlb r5, r6, r7 ; packhb r15, r16, r17 }
+    2c30:	[0-9a-f]* 	{ intlb r5, r6, r7 ; shl r15, r16, r17 }
+    2c38:	[0-9a-f]* 	{ intlb r5, r6, r7 ; slteh r15, r16, r17 }
+    2c40:	[0-9a-f]* 	{ intlb r5, r6, r7 ; subb r15, r16, r17 }
+    2c48:	[0-9a-f]* 	{ intlh r15, r16, r17 ; addli.sn r5, r6, 4660 }
+    2c50:	[0-9a-f]* 	{ intlh r15, r16, r17 ; inthh r5, r6, r7 }
+    2c58:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; intlh r15, r16, r17 }
+    2c60:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; intlh r15, r16, r17 }
+    2c68:	[0-9a-f]* 	{ intlh r15, r16, r17 ; s3a r5, r6, r7 }
+    2c70:	[0-9a-f]* 	{ intlh r15, r16, r17 ; shrb r5, r6, r7 }
+    2c78:	[0-9a-f]* 	{ intlh r15, r16, r17 ; sltib_u r5, r6, 5 }
+    2c80:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; intlh r15, r16, r17 }
+    2c88:	[0-9a-f]* 	{ intlh r5, r6, r7 ; flush r15 }
+    2c90:	[0-9a-f]* 	{ intlh r5, r6, r7 ; lh r15, r16 }
+    2c98:	[0-9a-f]* 	{ intlh r5, r6, r7 ; mnz r15, r16, r17 }
+    2ca0:	[0-9a-f]* 	{ intlh r5, r6, r7 ; raise }
+    2ca8:	[0-9a-f]* 	{ intlh r5, r6, r7 ; shlib r15, r16, 5 }
+    2cb0:	[0-9a-f]* 	{ intlh r5, r6, r7 ; slti r15, r16, 5 }
+    2cb8:	[0-9a-f]* 	{ intlh r5, r6, r7 ; subs r15, r16, r17 }
+    2cc0:	[0-9a-f]* 	{ and r5, r6, r7 ; inv r15 }
+    2cc8:	[0-9a-f]* 	{ maxh r5, r6, r7 ; inv r15 }
+    2cd0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; inv r15 }
+    2cd8:	[0-9a-f]* 	{ mz r5, r6, r7 ; inv r15 }
+    2ce0:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; inv r15 }
+    2ce8:	[0-9a-f]* 	{ shrih r5, r6, 5 ; inv r15 }
+    2cf0:	[0-9a-f]* 	{ sneb r5, r6, r7 ; inv r15 }
+    2cf8:	[0-9a-f]* 	{ add r5, r6, r7 ; iret }
+    2d00:	[0-9a-f]* 	{ clz r5, r6 ; iret }
+    2d08:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; iret }
+    2d10:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; iret }
+    2d18:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; iret }
+    2d20:	[0-9a-f]* 	{ seqib r5, r6, 5 ; iret }
+    2d28:	[0-9a-f]* 	{ slteb r5, r6, r7 ; iret }
+    2d30:	[0-9a-f]* 	{ sraih r5, r6, 5 ; iret }
+    2d38:	[0-9a-f]* 	{ addih r5, r6, 5 ; jalr r15 }
+    2d40:	[0-9a-f]* 	{ infol 4660 ; jalr r15 }
+    2d48:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; jalr r15 }
+    2d50:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; jalr r15 }
+    2d58:	[0-9a-f]* 	{ s1a r5, r6, r7 ; jalr r15 }
+    2d60:	[0-9a-f]* 	{ shlih r5, r6, 5 ; jalr r15 }
+    2d68:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; jalr r15 }
+    2d70:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; jalr r15 }
+    2d78:	[0-9a-f]* 	{ andi r5, r6, 5 ; jalrp r15 }
+    2d80:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; jalrp r15 }
+    2d88:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; jalrp r15 }
+    2d90:	[0-9a-f]* 	{ mzb r5, r6, r7 ; jalrp r15 }
+    2d98:	[0-9a-f]* 	{ sadh r5, r6, r7 ; jalrp r15 }
+    2da0:	[0-9a-f]* 	{ slt r5, r6, r7 ; jalrp r15 }
+    2da8:	[0-9a-f]* 	{ sneh r5, r6, r7 ; jalrp r15 }
+    2db0:	[0-9a-f]* 	{ addb r5, r6, r7 ; jr r15 }
+    2db8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; jr r15 }
+    2dc0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; jr r15 }
+    2dc8:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; jr r15 }
+    2dd0:	[0-9a-f]* 	{ packhb r5, r6, r7 ; jr r15 }
+    2dd8:	[0-9a-f]* 	{ seqih r5, r6, 5 ; jr r15 }
+    2de0:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; jr r15 }
+    2de8:	[0-9a-f]* 	{ sub r5, r6, r7 ; jr r15 }
+    2df0:	[0-9a-f]* 	{ addli r5, r6, 4660 ; jrp r15 }
+    2df8:	[0-9a-f]* 	{ inthb r5, r6, r7 ; jrp r15 }
+    2e00:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; jrp r15 }
+    2e08:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; jrp r15 }
+    2e10:	[0-9a-f]* 	{ s2a r5, r6, r7 ; jrp r15 }
+    2e18:	[0-9a-f]* 	{ shr r5, r6, r7 ; jrp r15 }
+    2e20:	[0-9a-f]* 	{ sltib r5, r6, 5 ; jrp r15 }
+    2e28:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; jrp r15 }
+    2e30:	[0-9a-f]* 	{ auli r5, r6, 4660 ; lb r15, r16 }
+    2e38:	[0-9a-f]* 	{ maxih r5, r6, 5 ; lb r15, r16 }
+    2e40:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; lb r15, r16 }
+    2e48:	[0-9a-f]* 	{ mzh r5, r6, r7 ; lb r15, r16 }
+    2e50:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; lb r15, r16 }
+    2e58:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; lb r15, r16 }
+    2e60:	[0-9a-f]* 	{ sra r5, r6, r7 ; lb r15, r16 }
+    2e68:	[0-9a-f]* 	{ add r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 }
+    2e70:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; add r15, r16, r17 ; lb r25, r26 }
+    2e78:	[0-9a-f]* 	{ add r15, r16, r17 ; slt_u r5, r6, r7 ; lb r25, r26 }
+    2e80:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; lb r25, r26 }
+    2e88:	[0-9a-f]* 	{ add r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    2e90:	[0-9a-f]* 	{ ctz r5, r6 ; addi r15, r16, 5 ; lb r25, r26 }
+    2e98:	[0-9a-f]* 	{ addi r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 }
+    2ea0:	[0-9a-f]* 	{ addi r15, r16, 5 ; sne r5, r6, r7 ; lb r25, r26 }
+    2ea8:	[0-9a-f]* 	{ addi r5, r6, 5 ; mz r15, r16, r17 ; lb r25, r26 }
+    2eb0:	[0-9a-f]* 	{ addi r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 }
+    2eb8:	[0-9a-f]* 	{ and r15, r16, r17 ; movei r5, 5 ; lb r25, r26 }
+    2ec0:	[0-9a-f]* 	{ and r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 }
+    2ec8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+    2ed0:	[0-9a-f]* 	{ and r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 }
+    2ed8:	[0-9a-f]* 	{ and r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    2ee0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; lb r25, r26 }
+    2ee8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl r5, r6, r7 ; lb r25, r26 }
+    2ef0:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; lb r25, r26 }
+    2ef8:	[0-9a-f]* 	{ andi r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 }
+    2f00:	[0-9a-f]* 	{ bitx r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+    2f08:	[0-9a-f]* 	{ bitx r5, r6 ; shl r15, r16, r17 ; lb r25, r26 }
+    2f10:	[0-9a-f]* 	{ bytex r5, r6 ; lb r25, r26 }
+    2f18:	[0-9a-f]* 	{ bytex r5, r6 ; shr r15, r16, r17 ; lb r25, r26 }
+    2f20:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; lb r25, r26 }
+    2f28:	[0-9a-f]* 	{ clz r5, r6 ; slt r15, r16, r17 ; lb r25, r26 }
+    2f30:	[0-9a-f]* 	{ ctz r5, r6 ; move r15, r16 ; lb r25, r26 }
+    2f38:	[0-9a-f]* 	{ ctz r5, r6 ; slte r15, r16, r17 ; lb r25, r26 }
+    2f40:	[0-9a-f]* 	{ clz r5, r6 ; lb r25, r26 }
+    2f48:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; lb r25, r26 }
+    2f50:	[0-9a-f]* 	{ s3a r15, r16, r17 ; lb r25, r26 }
+    2f58:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; lb r25, r26 }
+    2f60:	[0-9a-f]* 	{ lb r25, r26 }
+    2f68:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ill ; lb r25, r26 }
+    2f70:	[0-9a-f]* 	{ shr r5, r6, r7 ; ill ; lb r25, r26 }
+    2f78:	[0-9a-f]* 	{ info 19 ; addi r15, r16, 5 ; lb r25, r26 }
+    2f80:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; info 19 ; lb r25, r26 }
+    2f88:	[0-9a-f]* 	{ info 19 ; rl r15, r16, r17 ; lb r25, r26 }
+    2f90:	[0-9a-f]* 	{ info 19 ; shri r15, r16, 5 ; lb r25, r26 }
+    2f98:	[0-9a-f]* 	{ info 19 ; sub r15, r16, r17 ; lb r25, r26 }
+    2fa0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    2fa8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; rli r5, r6, 5 ; lb r25, r26 }
+    2fb0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 }
+    2fb8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    2fc0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    2fc8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    2fd0:	[0-9a-f]* 	{ move r15, r16 ; seqi r5, r6, 5 ; lb r25, r26 }
+    2fd8:	[0-9a-f]* 	{ move r15, r16 ; lb r25, r26 }
+    2fe0:	[0-9a-f]* 	{ move r5, r6 ; s3a r15, r16, r17 ; lb r25, r26 }
+    2fe8:	[0-9a-f]* 	{ movei r15, 5 ; addi r5, r6, 5 ; lb r25, r26 }
+    2ff0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+    2ff8:	[0-9a-f]* 	{ movei r15, 5 ; slt r5, r6, r7 ; lb r25, r26 }
+    3000:	[0-9a-f]* 	{ movei r5, 5 ; lb r25, r26 }
+    3008:	[0-9a-f]* 	{ movei r5, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+    3010:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; info 19 ; lb r25, r26 }
+    3018:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    3020:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    3028:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+    3030:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+    3038:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    3040:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    3048:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    3050:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    3058:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    3060:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    3068:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 }
+    3070:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    3078:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lb r25, r26 }
+    3080:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+    3088:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    3090:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    3098:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; lb r25, r26 }
+    30a0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    30a8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; info 19 ; lb r25, r26 }
+    30b0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    30b8:	[0-9a-f]* 	{ mz r15, r16, r17 ; lb r25, r26 }
+    30c0:	[0-9a-f]* 	{ mz r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 }
+    30c8:	[0-9a-f]* 	{ mz r15, r16, r17 ; sra r5, r6, r7 ; lb r25, r26 }
+    30d0:	[0-9a-f]* 	{ mz r5, r6, r7 ; nop ; lb r25, r26 }
+    30d8:	[0-9a-f]* 	{ mz r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 }
+    30e0:	[0-9a-f]* 	{ nop ; ill ; lb r25, r26 }
+    30e8:	[0-9a-f]* 	{ nop ; mz r5, r6, r7 ; lb r25, r26 }
+    30f0:	[0-9a-f]* 	{ nop ; seq r5, r6, r7 ; lb r25, r26 }
+    30f8:	[0-9a-f]* 	{ nop ; slti r5, r6, 5 ; lb r25, r26 }
+    3100:	[0-9a-f]* 	{ nor r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 }
+    3108:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    3110:	[0-9a-f]* 	{ nor r15, r16, r17 ; slt_u r5, r6, r7 ; lb r25, r26 }
+    3118:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; lb r25, r26 }
+    3120:	[0-9a-f]* 	{ nor r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    3128:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; lb r25, r26 }
+    3130:	[0-9a-f]* 	{ or r15, r16, r17 ; or r5, r6, r7 ; lb r25, r26 }
+    3138:	[0-9a-f]* 	{ or r15, r16, r17 ; sne r5, r6, r7 ; lb r25, r26 }
+    3140:	[0-9a-f]* 	{ or r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+    3148:	[0-9a-f]* 	{ or r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    3150:	[0-9a-f]* 	{ ori r15, r16, 5 ; movei r5, 5 ; lb r25, r26 }
+    3158:	[0-9a-f]* 	{ ori r15, r16, 5 ; s1a r5, r6, r7 ; lb r25, r26 }
+    3160:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb r25, r26 }
+    3168:	[0-9a-f]* 	{ ori r5, r6, 5 ; rl r15, r16, r17 ; lb r25, r26 }
+    3170:	[0-9a-f]* 	{ ori r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 }
+    3178:	[0-9a-f]* 	{ pcnt r5, r6 ; s1a r15, r16, r17 ; lb r25, r26 }
+    3180:	[0-9a-f]* 	{ pcnt r5, r6 ; lb r25, r26 }
+    3188:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 }
+    3190:	[0-9a-f]* 	{ rl r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 }
+    3198:	[0-9a-f]* 	{ rl r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    31a0:	[0-9a-f]* 	{ rl r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    31a8:	[0-9a-f]* 	{ bitx r5, r6 ; rli r15, r16, 5 ; lb r25, r26 }
+    31b0:	[0-9a-f]* 	{ rli r15, r16, 5 ; mz r5, r6, r7 ; lb r25, r26 }
+    31b8:	[0-9a-f]* 	{ rli r15, r16, 5 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    31c0:	[0-9a-f]* 	{ rli r5, r6, 5 ; mnz r15, r16, r17 ; lb r25, r26 }
+    31c8:	[0-9a-f]* 	{ rli r5, r6, 5 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    31d0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; info 19 ; lb r25, r26 }
+    31d8:	[0-9a-f]* 	{ pcnt r5, r6 ; s1a r15, r16, r17 ; lb r25, r26 }
+    31e0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 }
+    31e8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    31f0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    31f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    3200:	[0-9a-f]* 	{ s2a r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+    3208:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lb r25, r26 }
+    3210:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 }
+    3218:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lb r25, r26 }
+    3220:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 }
+    3228:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 }
+    3230:	[0-9a-f]* 	{ s3a r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    3238:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    3240:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; lb r25, r26 }
+    3248:	[0-9a-f]* 	{ seq r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+    3250:	[0-9a-f]* 	{ seq r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    3258:	[0-9a-f]* 	{ seq r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    3260:	[0-9a-f]* 	{ seq r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    3268:	[0-9a-f]* 	{ seqi r15, r16, 5 ; info 19 ; lb r25, r26 }
+    3270:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 }
+    3278:	[0-9a-f]* 	{ seqi r15, r16, 5 ; srai r5, r6, 5 ; lb r25, r26 }
+    3280:	[0-9a-f]* 	{ seqi r5, r6, 5 ; nor r15, r16, r17 ; lb r25, r26 }
+    3288:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 }
+    3290:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    3298:	[0-9a-f]* 	{ shl r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+    32a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; lb r25, r26 }
+    32a8:	[0-9a-f]* 	{ shl r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 }
+    32b0:	[0-9a-f]* 	{ shl r5, r6, r7 ; lb r25, r26 }
+    32b8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 }
+    32c0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shr r5, r6, r7 ; lb r25, r26 }
+    32c8:	[0-9a-f]* 	{ shli r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    32d0:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    32d8:	[0-9a-f]* 	{ bitx r5, r6 ; shr r15, r16, r17 ; lb r25, r26 }
+    32e0:	[0-9a-f]* 	{ shr r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+    32e8:	[0-9a-f]* 	{ shr r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    32f0:	[0-9a-f]* 	{ shr r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    32f8:	[0-9a-f]* 	{ shr r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    3300:	[0-9a-f]* 	{ shri r15, r16, 5 ; info 19 ; lb r25, r26 }
+    3308:	[0-9a-f]* 	{ pcnt r5, r6 ; shri r15, r16, 5 ; lb r25, r26 }
+    3310:	[0-9a-f]* 	{ shri r15, r16, 5 ; srai r5, r6, 5 ; lb r25, r26 }
+    3318:	[0-9a-f]* 	{ shri r5, r6, 5 ; nor r15, r16, r17 ; lb r25, r26 }
+    3320:	[0-9a-f]* 	{ shri r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 }
+    3328:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    3330:	[0-9a-f]* 	{ slt r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+    3338:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slt r15, r16, r17 ; lb r25, r26 }
+    3340:	[0-9a-f]* 	{ slt r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 }
+    3348:	[0-9a-f]* 	{ slt r5, r6, r7 ; lb r25, r26 }
+    3350:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    3358:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 }
+    3360:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    3368:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    3370:	[0-9a-f]* 	{ bitx r5, r6 ; slte r15, r16, r17 ; lb r25, r26 }
+    3378:	[0-9a-f]* 	{ slte r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+    3380:	[0-9a-f]* 	{ slte r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    3388:	[0-9a-f]* 	{ slte r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    3390:	[0-9a-f]* 	{ slte r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    3398:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; info 19 ; lb r25, r26 }
+    33a0:	[0-9a-f]* 	{ pcnt r5, r6 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    33a8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 }
+    33b0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    33b8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    33c0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    33c8:	[0-9a-f]* 	{ slti r15, r16, 5 ; s3a r5, r6, r7 ; lb r25, r26 }
+    33d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb r25, r26 }
+    33d8:	[0-9a-f]* 	{ slti r5, r6, 5 ; s1a r15, r16, r17 ; lb r25, r26 }
+    33e0:	[0-9a-f]* 	{ slti r5, r6, 5 ; lb r25, r26 }
+    33e8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 }
+    33f0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shr r5, r6, r7 ; lb r25, r26 }
+    33f8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    3400:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    3408:	[0-9a-f]* 	{ bitx r5, r6 ; sne r15, r16, r17 ; lb r25, r26 }
+    3410:	[0-9a-f]* 	{ sne r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+    3418:	[0-9a-f]* 	{ sne r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    3420:	[0-9a-f]* 	{ sne r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    3428:	[0-9a-f]* 	{ sne r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    3430:	[0-9a-f]* 	{ sra r15, r16, r17 ; info 19 ; lb r25, r26 }
+    3438:	[0-9a-f]* 	{ pcnt r5, r6 ; sra r15, r16, r17 ; lb r25, r26 }
+    3440:	[0-9a-f]* 	{ sra r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 }
+    3448:	[0-9a-f]* 	{ sra r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    3450:	[0-9a-f]* 	{ sra r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    3458:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    3460:	[0-9a-f]* 	{ srai r15, r16, 5 ; s3a r5, r6, r7 ; lb r25, r26 }
+    3468:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; srai r15, r16, 5 ; lb r25, r26 }
+    3470:	[0-9a-f]* 	{ srai r5, r6, 5 ; s1a r15, r16, r17 ; lb r25, r26 }
+    3478:	[0-9a-f]* 	{ srai r5, r6, 5 ; lb r25, r26 }
+    3480:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    3488:	[0-9a-f]* 	{ sub r15, r16, r17 ; shr r5, r6, r7 ; lb r25, r26 }
+    3490:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    3498:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    34a0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lb r25, r26 }
+    34a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shr r15, r16, r17 ; lb r25, r26 }
+    34b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; lb r25, r26 }
+    34b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; lb r25, r26 }
+    34c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; lb r25, r26 }
+    34c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte r15, r16, r17 ; lb r25, r26 }
+    34d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; lb r25, r26 }
+    34d8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb r25, r26 }
+    34e0:	[0-9a-f]* 	{ xor r15, r16, r17 ; movei r5, 5 ; lb r25, r26 }
+    34e8:	[0-9a-f]* 	{ xor r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 }
+    34f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; lb r25, r26 }
+    34f8:	[0-9a-f]* 	{ xor r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 }
+    3500:	[0-9a-f]* 	{ xor r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    3508:	[0-9a-f]* 	{ avgh r5, r6, r7 ; lb_u r15, r16 }
+    3510:	[0-9a-f]* 	{ minh r5, r6, r7 ; lb_u r15, r16 }
+    3518:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; lb_u r15, r16 }
+    3520:	[0-9a-f]* 	{ nor r5, r6, r7 ; lb_u r15, r16 }
+    3528:	[0-9a-f]* 	{ seqb r5, r6, r7 ; lb_u r15, r16 }
+    3530:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; lb_u r15, r16 }
+    3538:	[0-9a-f]* 	{ srah r5, r6, r7 ; lb_u r15, r16 }
+    3540:	[0-9a-f]* 	{ bitx r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 }
+    3548:	[0-9a-f]* 	{ add r15, r16, r17 ; mz r5, r6, r7 ; lb_u r25, r26 }
+    3550:	[0-9a-f]* 	{ add r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+    3558:	[0-9a-f]* 	{ add r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    3560:	[0-9a-f]* 	{ add r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    3568:	[0-9a-f]* 	{ addi r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    3570:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    3578:	[0-9a-f]* 	{ addi r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    3580:	[0-9a-f]* 	{ addi r5, r6, 5 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    3588:	[0-9a-f]* 	{ addi r5, r6, 5 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    3590:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    3598:	[0-9a-f]* 	{ and r15, r16, r17 ; s3a r5, r6, r7 ; lb_u r25, r26 }
+    35a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; lb_u r25, r26 }
+    35a8:	[0-9a-f]* 	{ and r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    35b0:	[0-9a-f]* 	{ and r5, r6, r7 ; lb_u r25, r26 }
+    35b8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    35c0:	[0-9a-f]* 	{ andi r15, r16, 5 ; shr r5, r6, r7 ; lb_u r25, r26 }
+    35c8:	[0-9a-f]* 	{ andi r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 }
+    35d0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    35d8:	[0-9a-f]* 	{ bitx r5, r6 ; lb_u r25, r26 }
+    35e0:	[0-9a-f]* 	{ bitx r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    35e8:	[0-9a-f]* 	{ bytex r5, r6 ; info 19 ; lb_u r25, r26 }
+    35f0:	[0-9a-f]* 	{ bytex r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    35f8:	[0-9a-f]* 	{ clz r5, r6 ; move r15, r16 ; lb_u r25, r26 }
+    3600:	[0-9a-f]* 	{ clz r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    3608:	[0-9a-f]* 	{ ctz r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 }
+    3610:	[0-9a-f]* 	{ ctz r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    3618:	[0-9a-f]* 	{ lb_u r25, r26 }
+    3620:	[0-9a-f]* 	{ mz r15, r16, r17 ; lb_u r25, r26 }
+    3628:	[0-9a-f]* 	{ seq r15, r16, r17 ; lb_u r25, r26 }
+    3630:	[0-9a-f]* 	{ slti r15, r16, 5 ; lb_u r25, r26 }
+    3638:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; lb_u r25, r26 }
+    3640:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ill ; lb_u r25, r26 }
+    3648:	[0-9a-f]* 	{ slt r5, r6, r7 ; ill ; lb_u r25, r26 }
+    3650:	[0-9a-f]* 	{ info 19 ; and r15, r16, r17 ; lb_u r25, r26 }
+    3658:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+    3660:	[0-9a-f]* 	{ info 19 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    3668:	[0-9a-f]* 	{ info 19 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    3670:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; lb_u r25, r26 }
+    3678:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    3680:	[0-9a-f]* 	{ mnz r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    3688:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    3690:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    3698:	[0-9a-f]* 	{ mnz r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    36a0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+    36a8:	[0-9a-f]* 	{ move r15, r16 ; shli r5, r6, 5 ; lb_u r25, r26 }
+    36b0:	[0-9a-f]* 	{ move r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    36b8:	[0-9a-f]* 	{ move r5, r6 ; seqi r15, r16, 5 ; lb_u r25, r26 }
+    36c0:	[0-9a-f]* 	{ movei r15, 5 ; andi r5, r6, 5 ; lb_u r25, r26 }
+    36c8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    36d0:	[0-9a-f]* 	{ movei r15, 5 ; slte r5, r6, r7 ; lb_u r25, r26 }
+    36d8:	[0-9a-f]* 	{ movei r5, 5 ; info 19 ; lb_u r25, r26 }
+    36e0:	[0-9a-f]* 	{ movei r5, 5 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    36e8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+    36f0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    36f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mz r15, r16, r17 ; lb_u r25, r26 }
+    3700:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    3708:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    3710:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    3718:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    3720:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    3728:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    3730:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    3738:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    3740:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 }
+    3748:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    3750:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    3758:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    3760:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; lb_u r25, r26 }
+    3768:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    3770:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+    3778:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    3780:	[0-9a-f]* 	{ mvz r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+    3788:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    3790:	[0-9a-f]* 	{ mz r15, r16, r17 ; mnz r5, r6, r7 ; lb_u r25, r26 }
+    3798:	[0-9a-f]* 	{ mz r15, r16, r17 ; rl r5, r6, r7 ; lb_u r25, r26 }
+    37a0:	[0-9a-f]* 	{ mz r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    37a8:	[0-9a-f]* 	{ mz r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 }
+    37b0:	[0-9a-f]* 	{ mz r5, r6, r7 ; sra r15, r16, r17 ; lb_u r25, r26 }
+    37b8:	[0-9a-f]* 	{ nop ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    37c0:	[0-9a-f]* 	{ nop ; nor r15, r16, r17 ; lb_u r25, r26 }
+    37c8:	[0-9a-f]* 	{ nop ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    37d0:	[0-9a-f]* 	{ nop ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    37d8:	[0-9a-f]* 	{ bitx r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    37e0:	[0-9a-f]* 	{ nor r15, r16, r17 ; mz r5, r6, r7 ; lb_u r25, r26 }
+    37e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+    37f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    37f8:	[0-9a-f]* 	{ nor r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    3800:	[0-9a-f]* 	{ or r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    3808:	[0-9a-f]* 	{ pcnt r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 }
+    3810:	[0-9a-f]* 	{ or r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    3818:	[0-9a-f]* 	{ or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    3820:	[0-9a-f]* 	{ or r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    3828:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    3830:	[0-9a-f]* 	{ ori r15, r16, 5 ; s3a r5, r6, r7 ; lb_u r25, r26 }
+    3838:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    3840:	[0-9a-f]* 	{ ori r5, r6, 5 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    3848:	[0-9a-f]* 	{ ori r5, r6, 5 ; lb_u r25, r26 }
+    3850:	[0-9a-f]* 	{ pcnt r5, r6 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    3858:	[0-9a-f]* 	{ rl r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    3860:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    3868:	[0-9a-f]* 	{ rl r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    3870:	[0-9a-f]* 	{ rl r5, r6, r7 ; lb_u r25, r26 }
+    3878:	[0-9a-f]* 	{ rl r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    3880:	[0-9a-f]* 	{ clz r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    3888:	[0-9a-f]* 	{ rli r15, r16, 5 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    3890:	[0-9a-f]* 	{ rli r15, r16, 5 ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    3898:	[0-9a-f]* 	{ rli r5, r6, 5 ; movei r15, 5 ; lb_u r25, r26 }
+    38a0:	[0-9a-f]* 	{ rli r5, r6, 5 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    38a8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; move r5, r6 ; lb_u r25, r26 }
+    38b0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    38b8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    38c0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    38c8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    38d0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    38d8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    38e0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; lb_u r25, r26 }
+    38e8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    38f0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    38f8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    3900:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    3908:	[0-9a-f]* 	{ s3a r5, r6, r7 ; lb_u r25, r26 }
+    3910:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    3918:	[0-9a-f]* 	{ clz r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    3920:	[0-9a-f]* 	{ seq r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    3928:	[0-9a-f]* 	{ seq r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    3930:	[0-9a-f]* 	{ seq r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    3938:	[0-9a-f]* 	{ seq r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    3940:	[0-9a-f]* 	{ seqi r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 }
+    3948:	[0-9a-f]* 	{ seqi r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    3950:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lb_u r25, r26 }
+    3958:	[0-9a-f]* 	{ seqi r5, r6, 5 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    3960:	[0-9a-f]* 	{ seqi r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    3968:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    3970:	[0-9a-f]* 	{ shl r15, r16, r17 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    3978:	[0-9a-f]* 	{ shl r15, r16, r17 ; lb_u r25, r26 }
+    3980:	[0-9a-f]* 	{ shl r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    3988:	[0-9a-f]* 	{ shli r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    3990:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    3998:	[0-9a-f]* 	{ shli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    39a0:	[0-9a-f]* 	{ shli r5, r6, 5 ; lb_u r25, r26 }
+    39a8:	[0-9a-f]* 	{ shli r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    39b0:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    39b8:	[0-9a-f]* 	{ shr r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    39c0:	[0-9a-f]* 	{ shr r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    39c8:	[0-9a-f]* 	{ shr r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    39d0:	[0-9a-f]* 	{ shr r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    39d8:	[0-9a-f]* 	{ shri r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 }
+    39e0:	[0-9a-f]* 	{ shri r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    39e8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 }
+    39f0:	[0-9a-f]* 	{ shri r5, r6, 5 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    39f8:	[0-9a-f]* 	{ shri r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    3a00:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    3a08:	[0-9a-f]* 	{ slt r15, r16, r17 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    3a10:	[0-9a-f]* 	{ slt r15, r16, r17 ; lb_u r25, r26 }
+    3a18:	[0-9a-f]* 	{ slt r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    3a20:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    3a28:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    3a30:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    3a38:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; lb_u r25, r26 }
+    3a40:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    3a48:	[0-9a-f]* 	{ clz r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    3a50:	[0-9a-f]* 	{ slte r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    3a58:	[0-9a-f]* 	{ slte r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    3a60:	[0-9a-f]* 	{ slte r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    3a68:	[0-9a-f]* 	{ slte r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    3a70:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; move r5, r6 ; lb_u r25, r26 }
+    3a78:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    3a80:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    3a88:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    3a90:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    3a98:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    3aa0:	[0-9a-f]* 	{ slti r15, r16, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    3aa8:	[0-9a-f]* 	{ slti r15, r16, 5 ; lb_u r25, r26 }
+    3ab0:	[0-9a-f]* 	{ slti r5, r6, 5 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    3ab8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    3ac0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    3ac8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    3ad0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; lb_u r25, r26 }
+    3ad8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    3ae0:	[0-9a-f]* 	{ clz r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    3ae8:	[0-9a-f]* 	{ sne r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    3af0:	[0-9a-f]* 	{ sne r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    3af8:	[0-9a-f]* 	{ sne r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    3b00:	[0-9a-f]* 	{ sne r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    3b08:	[0-9a-f]* 	{ sra r15, r16, r17 ; move r5, r6 ; lb_u r25, r26 }
+    3b10:	[0-9a-f]* 	{ sra r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    3b18:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 }
+    3b20:	[0-9a-f]* 	{ sra r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    3b28:	[0-9a-f]* 	{ sra r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    3b30:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    3b38:	[0-9a-f]* 	{ srai r15, r16, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    3b40:	[0-9a-f]* 	{ srai r15, r16, 5 ; lb_u r25, r26 }
+    3b48:	[0-9a-f]* 	{ srai r5, r6, 5 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    3b50:	[0-9a-f]* 	{ sub r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    3b58:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    3b60:	[0-9a-f]* 	{ sub r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    3b68:	[0-9a-f]* 	{ sub r5, r6, r7 ; lb_u r25, r26 }
+    3b70:	[0-9a-f]* 	{ sub r5, r6, r7 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    3b78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; info 19 ; lb_u r25, r26 }
+    3b80:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    3b88:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; lb_u r25, r26 }
+    3b90:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    3b98:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 }
+    3ba0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    3ba8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    3bb0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    3bb8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    3bc0:	[0-9a-f]* 	{ xor r15, r16, r17 ; s3a r5, r6, r7 ; lb_u r25, r26 }
+    3bc8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    3bd0:	[0-9a-f]* 	{ xor r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    3bd8:	[0-9a-f]* 	{ xor r5, r6, r7 ; lb_u r25, r26 }
+    3be0:	[0-9a-f]* 	{ bytex r5, r6 ; lbadd r15, r16, 5 }
+    3be8:	[0-9a-f]* 	{ minih r5, r6, 5 ; lbadd r15, r16, 5 }
+    3bf0:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; lbadd r15, r16, 5 }
+    3bf8:	[0-9a-f]* 	{ ori r5, r6, 5 ; lbadd r15, r16, 5 }
+    3c00:	[0-9a-f]* 	{ seqi r5, r6, 5 ; lbadd r15, r16, 5 }
+    3c08:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; lbadd r15, r16, 5 }
+    3c10:	[0-9a-f]* 	{ sraib r5, r6, 5 ; lbadd r15, r16, 5 }
+    3c18:	[0-9a-f]* 	{ addib r5, r6, 5 ; lbadd_u r15, r16, 5 }
+    3c20:	[0-9a-f]* 	{ info 19 ; lbadd_u r15, r16, 5 }
+    3c28:	[0-9a-f]* 	{ moveli r5, 4660 ; lbadd_u r15, r16, 5 }
+    3c30:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    3c38:	[0-9a-f]* 	{ rli r5, r6, 5 ; lbadd_u r15, r16, 5 }
+    3c40:	[0-9a-f]* 	{ shlib r5, r6, 5 ; lbadd_u r15, r16, 5 }
+    3c48:	[0-9a-f]* 	{ slti r5, r6, 5 ; lbadd_u r15, r16, 5 }
+    3c50:	[0-9a-f]* 	{ subs r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    3c58:	[0-9a-f]* 	{ and r5, r6, r7 ; lh r15, r16 }
+    3c60:	[0-9a-f]* 	{ maxh r5, r6, r7 ; lh r15, r16 }
+    3c68:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lh r15, r16 }
+    3c70:	[0-9a-f]* 	{ mz r5, r6, r7 ; lh r15, r16 }
+    3c78:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; lh r15, r16 }
+    3c80:	[0-9a-f]* 	{ shrih r5, r6, 5 ; lh r15, r16 }
+    3c88:	[0-9a-f]* 	{ sneb r5, r6, r7 ; lh r15, r16 }
+    3c90:	[0-9a-f]* 	{ add r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 }
+    3c98:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    3ca0:	[0-9a-f]* 	{ add r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 }
+    3ca8:	[0-9a-f]* 	{ add r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 }
+    3cb0:	[0-9a-f]* 	{ add r5, r6, r7 ; shli r15, r16, 5 ; lh r25, r26 }
+    3cb8:	[0-9a-f]* 	{ bytex r5, r6 ; addi r15, r16, 5 ; lh r25, r26 }
+    3cc0:	[0-9a-f]* 	{ addi r15, r16, 5 ; nop ; lh r25, r26 }
+    3cc8:	[0-9a-f]* 	{ addi r15, r16, 5 ; slti r5, r6, 5 ; lh r25, r26 }
+    3cd0:	[0-9a-f]* 	{ addi r5, r6, 5 ; move r15, r16 ; lh r25, r26 }
+    3cd8:	[0-9a-f]* 	{ addi r5, r6, 5 ; slte r15, r16, r17 ; lh r25, r26 }
+    3ce0:	[0-9a-f]* 	{ and r15, r16, r17 ; mnz r5, r6, r7 ; lh r25, r26 }
+    3ce8:	[0-9a-f]* 	{ and r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 }
+    3cf0:	[0-9a-f]* 	{ and r15, r16, r17 ; sub r5, r6, r7 ; lh r25, r26 }
+    3cf8:	[0-9a-f]* 	{ and r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    3d00:	[0-9a-f]* 	{ and r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 }
+    3d08:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 }
+    3d10:	[0-9a-f]* 	{ andi r15, r16, 5 ; seq r5, r6, r7 ; lh r25, r26 }
+    3d18:	[0-9a-f]* 	{ andi r15, r16, 5 ; xor r5, r6, r7 ; lh r25, r26 }
+    3d20:	[0-9a-f]* 	{ andi r5, r6, 5 ; s2a r15, r16, r17 ; lh r25, r26 }
+    3d28:	[0-9a-f]* 	{ bitx r5, r6 ; add r15, r16, r17 ; lh r25, r26 }
+    3d30:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; lh r25, r26 }
+    3d38:	[0-9a-f]* 	{ bytex r5, r6 ; and r15, r16, r17 ; lh r25, r26 }
+    3d40:	[0-9a-f]* 	{ bytex r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+    3d48:	[0-9a-f]* 	{ clz r5, r6 ; lh r25, r26 }
+    3d50:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; lh r25, r26 }
+    3d58:	[0-9a-f]* 	{ ctz r5, r6 ; info 19 ; lh r25, r26 }
+    3d60:	[0-9a-f]* 	{ ctz r5, r6 ; slt r15, r16, r17 ; lh r25, r26 }
+    3d68:	[0-9a-f]* 	{ bitx r5, r6 ; lh r25, r26 }
+    3d70:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; lh r25, r26 }
+    3d78:	[0-9a-f]* 	{ s2a r15, r16, r17 ; lh r25, r26 }
+    3d80:	[0-9a-f]* 	{ slte r15, r16, r17 ; lh r25, r26 }
+    3d88:	[0-9a-f]* 	{ xor r15, r16, r17 ; lh r25, r26 }
+    3d90:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ill ; lh r25, r26 }
+    3d98:	[0-9a-f]* 	{ shl r5, r6, r7 ; ill ; lh r25, r26 }
+    3da0:	[0-9a-f]* 	{ info 19 ; add r15, r16, r17 ; lh r25, r26 }
+    3da8:	[0-9a-f]* 	{ info 19 ; movei r5, 5 ; lh r25, r26 }
+    3db0:	[0-9a-f]* 	{ info 19 ; ori r5, r6, 5 ; lh r25, r26 }
+    3db8:	[0-9a-f]* 	{ info 19 ; shr r15, r16, r17 ; lh r25, r26 }
+    3dc0:	[0-9a-f]* 	{ info 19 ; srai r15, r16, 5 ; lh r25, r26 }
+    3dc8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; info 19 ; lh r25, r26 }
+    3dd0:	[0-9a-f]* 	{ pcnt r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 }
+    3dd8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 }
+    3de0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 }
+    3de8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; sne r15, r16, r17 ; lh r25, r26 }
+    3df0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; move r15, r16 ; lh r25, r26 }
+    3df8:	[0-9a-f]* 	{ move r15, r16 ; s3a r5, r6, r7 ; lh r25, r26 }
+    3e00:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; move r15, r16 ; lh r25, r26 }
+    3e08:	[0-9a-f]* 	{ move r5, r6 ; s1a r15, r16, r17 ; lh r25, r26 }
+    3e10:	[0-9a-f]* 	{ move r5, r6 ; lh r25, r26 }
+    3e18:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 }
+    3e20:	[0-9a-f]* 	{ movei r15, 5 ; shr r5, r6, r7 ; lh r25, r26 }
+    3e28:	[0-9a-f]* 	{ movei r5, 5 ; and r15, r16, r17 ; lh r25, r26 }
+    3e30:	[0-9a-f]* 	{ movei r5, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+    3e38:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lh r25, r26 }
+    3e40:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shr r15, r16, r17 ; lh r25, r26 }
+    3e48:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; info 19 ; lh r25, r26 }
+    3e50:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+    3e58:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; move r15, r16 ; lh r25, r26 }
+    3e60:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+    3e68:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    3e70:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    3e78:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 }
+    3e80:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 ; lh r25, r26 }
+    3e88:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 }
+    3e90:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 }
+    3e98:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+    3ea0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+    3ea8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    3eb0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    3eb8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    3ec0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    3ec8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    3ed0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; lh r25, r26 }
+    3ed8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shr r15, r16, r17 ; lh r25, r26 }
+    3ee0:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; lh r25, r26 }
+    3ee8:	[0-9a-f]* 	{ mz r15, r16, r17 ; nor r5, r6, r7 ; lh r25, r26 }
+    3ef0:	[0-9a-f]* 	{ mz r15, r16, r17 ; slti_u r5, r6, 5 ; lh r25, r26 }
+    3ef8:	[0-9a-f]* 	{ mz r5, r6, r7 ; movei r15, 5 ; lh r25, r26 }
+    3f00:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    3f08:	[0-9a-f]* 	{ ctz r5, r6 ; nop ; lh r25, r26 }
+    3f10:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nop ; lh r25, r26 }
+    3f18:	[0-9a-f]* 	{ nop ; s3a r5, r6, r7 ; lh r25, r26 }
+    3f20:	[0-9a-f]* 	{ nop ; slte_u r5, r6, r7 ; lh r25, r26 }
+    3f28:	[0-9a-f]* 	{ nor r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 }
+    3f30:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 }
+    3f38:	[0-9a-f]* 	{ nor r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 }
+    3f40:	[0-9a-f]* 	{ nor r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 }
+    3f48:	[0-9a-f]* 	{ nor r5, r6, r7 ; shli r15, r16, 5 ; lh r25, r26 }
+    3f50:	[0-9a-f]* 	{ bytex r5, r6 ; or r15, r16, r17 ; lh r25, r26 }
+    3f58:	[0-9a-f]* 	{ or r15, r16, r17 ; nop ; lh r25, r26 }
+    3f60:	[0-9a-f]* 	{ or r15, r16, r17 ; slti r5, r6, 5 ; lh r25, r26 }
+    3f68:	[0-9a-f]* 	{ or r5, r6, r7 ; move r15, r16 ; lh r25, r26 }
+    3f70:	[0-9a-f]* 	{ or r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+    3f78:	[0-9a-f]* 	{ ori r15, r16, 5 ; mnz r5, r6, r7 ; lh r25, r26 }
+    3f80:	[0-9a-f]* 	{ ori r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 }
+    3f88:	[0-9a-f]* 	{ ori r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 }
+    3f90:	[0-9a-f]* 	{ ori r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+    3f98:	[0-9a-f]* 	{ ori r5, r6, 5 ; sra r15, r16, r17 ; lh r25, r26 }
+    3fa0:	[0-9a-f]* 	{ pcnt r5, r6 ; rl r15, r16, r17 ; lh r25, r26 }
+    3fa8:	[0-9a-f]* 	{ pcnt r5, r6 ; sub r15, r16, r17 ; lh r25, r26 }
+    3fb0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    3fb8:	[0-9a-f]* 	{ rl r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 }
+    3fc0:	[0-9a-f]* 	{ rl r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    3fc8:	[0-9a-f]* 	{ rl r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    3fd0:	[0-9a-f]* 	{ rli r15, r16, 5 ; and r5, r6, r7 ; lh r25, r26 }
+    3fd8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+    3fe0:	[0-9a-f]* 	{ rli r15, r16, 5 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    3fe8:	[0-9a-f]* 	{ rli r5, r6, 5 ; ill ; lh r25, r26 }
+    3ff0:	[0-9a-f]* 	{ rli r5, r6, 5 ; shri r15, r16, 5 ; lh r25, r26 }
+    3ff8:	[0-9a-f]* 	{ ctz r5, r6 ; s1a r15, r16, r17 ; lh r25, r26 }
+    4000:	[0-9a-f]* 	{ s1a r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    4008:	[0-9a-f]* 	{ s1a r15, r16, r17 ; sne r5, r6, r7 ; lh r25, r26 }
+    4010:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    4018:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    4020:	[0-9a-f]* 	{ s2a r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    4028:	[0-9a-f]* 	{ s2a r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    4030:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s2a r15, r16, r17 ; lh r25, r26 }
+    4038:	[0-9a-f]* 	{ s2a r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    4040:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    4048:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    4050:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 }
+    4058:	[0-9a-f]* 	{ s3a r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    4060:	[0-9a-f]* 	{ s3a r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    4068:	[0-9a-f]* 	{ seq r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 }
+    4070:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    4078:	[0-9a-f]* 	{ seq r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    4080:	[0-9a-f]* 	{ seq r5, r6, r7 ; ill ; lh r25, r26 }
+    4088:	[0-9a-f]* 	{ seq r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    4090:	[0-9a-f]* 	{ ctz r5, r6 ; seqi r15, r16, 5 ; lh r25, r26 }
+    4098:	[0-9a-f]* 	{ seqi r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    40a0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; sne r5, r6, r7 ; lh r25, r26 }
+    40a8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; mz r15, r16, r17 ; lh r25, r26 }
+    40b0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slti r15, r16, 5 ; lh r25, r26 }
+    40b8:	[0-9a-f]* 	{ shl r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    40c0:	[0-9a-f]* 	{ shl r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    40c8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+    40d0:	[0-9a-f]* 	{ shl r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    40d8:	[0-9a-f]* 	{ shl r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    40e0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; lh r25, r26 }
+    40e8:	[0-9a-f]* 	{ shli r15, r16, 5 ; shl r5, r6, r7 ; lh r25, r26 }
+    40f0:	[0-9a-f]* 	{ shli r5, r6, 5 ; add r15, r16, r17 ; lh r25, r26 }
+    40f8:	[0-9a-f]* 	{ shli r5, r6, 5 ; seq r15, r16, r17 ; lh r25, r26 }
+    4100:	[0-9a-f]* 	{ shr r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 }
+    4108:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shr r15, r16, r17 ; lh r25, r26 }
+    4110:	[0-9a-f]* 	{ shr r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    4118:	[0-9a-f]* 	{ shr r5, r6, r7 ; ill ; lh r25, r26 }
+    4120:	[0-9a-f]* 	{ shr r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    4128:	[0-9a-f]* 	{ ctz r5, r6 ; shri r15, r16, 5 ; lh r25, r26 }
+    4130:	[0-9a-f]* 	{ shri r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    4138:	[0-9a-f]* 	{ shri r15, r16, 5 ; sne r5, r6, r7 ; lh r25, r26 }
+    4140:	[0-9a-f]* 	{ shri r5, r6, 5 ; mz r15, r16, r17 ; lh r25, r26 }
+    4148:	[0-9a-f]* 	{ shri r5, r6, 5 ; slti r15, r16, 5 ; lh r25, r26 }
+    4150:	[0-9a-f]* 	{ slt r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    4158:	[0-9a-f]* 	{ slt r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    4160:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; lh r25, r26 }
+    4168:	[0-9a-f]* 	{ slt r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    4170:	[0-9a-f]* 	{ slt r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    4178:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+    4180:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 }
+    4188:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    4190:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    4198:	[0-9a-f]* 	{ slte r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 }
+    41a0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+    41a8:	[0-9a-f]* 	{ slte r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    41b0:	[0-9a-f]* 	{ slte r5, r6, r7 ; ill ; lh r25, r26 }
+    41b8:	[0-9a-f]* 	{ slte r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    41c0:	[0-9a-f]* 	{ ctz r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    41c8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    41d0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; sne r5, r6, r7 ; lh r25, r26 }
+    41d8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    41e0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    41e8:	[0-9a-f]* 	{ slti r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    41f0:	[0-9a-f]* 	{ slti r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    41f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti r15, r16, 5 ; lh r25, r26 }
+    4200:	[0-9a-f]* 	{ slti r5, r6, 5 ; rl r15, r16, r17 ; lh r25, r26 }
+    4208:	[0-9a-f]* 	{ slti r5, r6, 5 ; sub r15, r16, r17 ; lh r25, r26 }
+    4210:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 }
+    4218:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shl r5, r6, r7 ; lh r25, r26 }
+    4220:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; add r15, r16, r17 ; lh r25, r26 }
+    4228:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; seq r15, r16, r17 ; lh r25, r26 }
+    4230:	[0-9a-f]* 	{ sne r15, r16, r17 ; and r5, r6, r7 ; lh r25, r26 }
+    4238:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sne r15, r16, r17 ; lh r25, r26 }
+    4240:	[0-9a-f]* 	{ sne r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    4248:	[0-9a-f]* 	{ sne r5, r6, r7 ; ill ; lh r25, r26 }
+    4250:	[0-9a-f]* 	{ sne r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    4258:	[0-9a-f]* 	{ ctz r5, r6 ; sra r15, r16, r17 ; lh r25, r26 }
+    4260:	[0-9a-f]* 	{ sra r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    4268:	[0-9a-f]* 	{ sra r15, r16, r17 ; sne r5, r6, r7 ; lh r25, r26 }
+    4270:	[0-9a-f]* 	{ sra r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    4278:	[0-9a-f]* 	{ sra r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    4280:	[0-9a-f]* 	{ srai r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    4288:	[0-9a-f]* 	{ srai r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    4290:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; srai r15, r16, 5 ; lh r25, r26 }
+    4298:	[0-9a-f]* 	{ srai r5, r6, 5 ; rl r15, r16, r17 ; lh r25, r26 }
+    42a0:	[0-9a-f]* 	{ srai r5, r6, 5 ; sub r15, r16, r17 ; lh r25, r26 }
+    42a8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    42b0:	[0-9a-f]* 	{ sub r15, r16, r17 ; shl r5, r6, r7 ; lh r25, r26 }
+    42b8:	[0-9a-f]* 	{ sub r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    42c0:	[0-9a-f]* 	{ sub r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    42c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; and r15, r16, r17 ; lh r25, r26 }
+    42d0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+    42d8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; lh r25, r26 }
+    42e0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shr r15, r16, r17 ; lh r25, r26 }
+    42e8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; info 19 ; lh r25, r26 }
+    42f0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slt r15, r16, r17 ; lh r25, r26 }
+    42f8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; move r15, r16 ; lh r25, r26 }
+    4300:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slte r15, r16, r17 ; lh r25, r26 }
+    4308:	[0-9a-f]* 	{ xor r15, r16, r17 ; mnz r5, r6, r7 ; lh r25, r26 }
+    4310:	[0-9a-f]* 	{ xor r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 }
+    4318:	[0-9a-f]* 	{ xor r15, r16, r17 ; sub r5, r6, r7 ; lh r25, r26 }
+    4320:	[0-9a-f]* 	{ xor r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    4328:	[0-9a-f]* 	{ xor r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 }
+    4330:	[0-9a-f]* 	{ auli r5, r6, 4660 ; lh_u r15, r16 }
+    4338:	[0-9a-f]* 	{ maxih r5, r6, 5 ; lh_u r15, r16 }
+    4340:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; lh_u r15, r16 }
+    4348:	[0-9a-f]* 	{ mzh r5, r6, r7 ; lh_u r15, r16 }
+    4350:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; lh_u r15, r16 }
+    4358:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; lh_u r15, r16 }
+    4360:	[0-9a-f]* 	{ sra r5, r6, r7 ; lh_u r15, r16 }
+    4368:	[0-9a-f]* 	{ add r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 }
+    4370:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 }
+    4378:	[0-9a-f]* 	{ add r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 }
+    4380:	[0-9a-f]* 	{ add r5, r6, r7 ; ill ; lh_u r25, r26 }
+    4388:	[0-9a-f]* 	{ add r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    4390:	[0-9a-f]* 	{ ctz r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    4398:	[0-9a-f]* 	{ addi r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 }
+    43a0:	[0-9a-f]* 	{ addi r15, r16, 5 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    43a8:	[0-9a-f]* 	{ addi r5, r6, 5 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    43b0:	[0-9a-f]* 	{ addi r5, r6, 5 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    43b8:	[0-9a-f]* 	{ and r15, r16, r17 ; movei r5, 5 ; lh_u r25, r26 }
+    43c0:	[0-9a-f]* 	{ and r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    43c8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 }
+    43d0:	[0-9a-f]* 	{ and r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    43d8:	[0-9a-f]* 	{ and r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    43e0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    43e8:	[0-9a-f]* 	{ andi r15, r16, 5 ; shl r5, r6, r7 ; lh_u r25, r26 }
+    43f0:	[0-9a-f]* 	{ andi r5, r6, 5 ; add r15, r16, r17 ; lh_u r25, r26 }
+    43f8:	[0-9a-f]* 	{ andi r5, r6, 5 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    4400:	[0-9a-f]* 	{ bitx r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 }
+    4408:	[0-9a-f]* 	{ bitx r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    4410:	[0-9a-f]* 	{ bytex r5, r6 ; lh_u r25, r26 }
+    4418:	[0-9a-f]* 	{ bytex r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    4420:	[0-9a-f]* 	{ clz r5, r6 ; info 19 ; lh_u r25, r26 }
+    4428:	[0-9a-f]* 	{ clz r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    4430:	[0-9a-f]* 	{ ctz r5, r6 ; move r15, r16 ; lh_u r25, r26 }
+    4438:	[0-9a-f]* 	{ ctz r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    4440:	[0-9a-f]* 	{ clz r5, r6 ; lh_u r25, r26 }
+    4448:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; lh_u r25, r26 }
+    4450:	[0-9a-f]* 	{ s3a r15, r16, r17 ; lh_u r25, r26 }
+    4458:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; lh_u r25, r26 }
+    4460:	[0-9a-f]* 	{ lh_u r25, r26 }
+    4468:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ill ; lh_u r25, r26 }
+    4470:	[0-9a-f]* 	{ shr r5, r6, r7 ; ill ; lh_u r25, r26 }
+    4478:	[0-9a-f]* 	{ info 19 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    4480:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+    4488:	[0-9a-f]* 	{ info 19 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    4490:	[0-9a-f]* 	{ info 19 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    4498:	[0-9a-f]* 	{ info 19 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    44a0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 }
+    44a8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; rli r5, r6, 5 ; lh_u r25, r26 }
+    44b0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    44b8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    44c0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    44c8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+    44d0:	[0-9a-f]* 	{ move r15, r16 ; seqi r5, r6, 5 ; lh_u r25, r26 }
+    44d8:	[0-9a-f]* 	{ move r15, r16 ; lh_u r25, r26 }
+    44e0:	[0-9a-f]* 	{ move r5, r6 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    44e8:	[0-9a-f]* 	{ movei r15, 5 ; addi r5, r6, 5 ; lh_u r25, r26 }
+    44f0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+    44f8:	[0-9a-f]* 	{ movei r15, 5 ; slt r5, r6, r7 ; lh_u r25, r26 }
+    4500:	[0-9a-f]* 	{ movei r5, 5 ; lh_u r25, r26 }
+    4508:	[0-9a-f]* 	{ movei r5, 5 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    4510:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+    4518:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    4520:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+    4528:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    4530:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    4538:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    4540:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    4548:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    4550:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    4558:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    4560:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    4568:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    4570:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    4578:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 }
+    4580:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    4588:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    4590:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    4598:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; lh_u r25, r26 }
+    45a0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    45a8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+    45b0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    45b8:	[0-9a-f]* 	{ mz r15, r16, r17 ; lh_u r25, r26 }
+    45c0:	[0-9a-f]* 	{ mz r15, r16, r17 ; ori r5, r6, 5 ; lh_u r25, r26 }
+    45c8:	[0-9a-f]* 	{ mz r15, r16, r17 ; sra r5, r6, r7 ; lh_u r25, r26 }
+    45d0:	[0-9a-f]* 	{ mz r5, r6, r7 ; nop ; lh_u r25, r26 }
+    45d8:	[0-9a-f]* 	{ mz r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 }
+    45e0:	[0-9a-f]* 	{ nop ; ill ; lh_u r25, r26 }
+    45e8:	[0-9a-f]* 	{ nop ; mz r5, r6, r7 ; lh_u r25, r26 }
+    45f0:	[0-9a-f]* 	{ nop ; seq r5, r6, r7 ; lh_u r25, r26 }
+    45f8:	[0-9a-f]* 	{ nop ; slti r5, r6, 5 ; lh_u r25, r26 }
+    4600:	[0-9a-f]* 	{ nor r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 }
+    4608:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    4610:	[0-9a-f]* 	{ nor r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 }
+    4618:	[0-9a-f]* 	{ nor r5, r6, r7 ; ill ; lh_u r25, r26 }
+    4620:	[0-9a-f]* 	{ nor r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    4628:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 }
+    4630:	[0-9a-f]* 	{ or r15, r16, r17 ; or r5, r6, r7 ; lh_u r25, r26 }
+    4638:	[0-9a-f]* 	{ or r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    4640:	[0-9a-f]* 	{ or r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    4648:	[0-9a-f]* 	{ or r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    4650:	[0-9a-f]* 	{ ori r15, r16, 5 ; movei r5, 5 ; lh_u r25, r26 }
+    4658:	[0-9a-f]* 	{ ori r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    4660:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    4668:	[0-9a-f]* 	{ ori r5, r6, 5 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    4670:	[0-9a-f]* 	{ ori r5, r6, 5 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    4678:	[0-9a-f]* 	{ pcnt r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    4680:	[0-9a-f]* 	{ pcnt r5, r6 ; lh_u r25, r26 }
+    4688:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    4690:	[0-9a-f]* 	{ rl r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    4698:	[0-9a-f]* 	{ rl r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    46a0:	[0-9a-f]* 	{ rl r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    46a8:	[0-9a-f]* 	{ bitx r5, r6 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    46b0:	[0-9a-f]* 	{ rli r15, r16, 5 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    46b8:	[0-9a-f]* 	{ rli r15, r16, 5 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    46c0:	[0-9a-f]* 	{ rli r5, r6, 5 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    46c8:	[0-9a-f]* 	{ rli r5, r6, 5 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    46d0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; info 19 ; lh_u r25, r26 }
+    46d8:	[0-9a-f]* 	{ pcnt r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    46e0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; srai r5, r6, 5 ; lh_u r25, r26 }
+    46e8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    46f0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    46f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    4700:	[0-9a-f]* 	{ s2a r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    4708:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    4710:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    4718:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lh_u r25, r26 }
+    4720:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    4728:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    4730:	[0-9a-f]* 	{ s3a r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    4738:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    4740:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    4748:	[0-9a-f]* 	{ seq r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    4750:	[0-9a-f]* 	{ seq r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    4758:	[0-9a-f]* 	{ seq r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    4760:	[0-9a-f]* 	{ seq r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    4768:	[0-9a-f]* 	{ seqi r15, r16, 5 ; info 19 ; lh_u r25, r26 }
+    4770:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 }
+    4778:	[0-9a-f]* 	{ seqi r15, r16, 5 ; srai r5, r6, 5 ; lh_u r25, r26 }
+    4780:	[0-9a-f]* 	{ seqi r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    4788:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    4790:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    4798:	[0-9a-f]* 	{ shl r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    47a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    47a8:	[0-9a-f]* 	{ shl r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    47b0:	[0-9a-f]* 	{ shl r5, r6, r7 ; lh_u r25, r26 }
+    47b8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    47c0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    47c8:	[0-9a-f]* 	{ shli r5, r6, 5 ; and r15, r16, r17 ; lh_u r25, r26 }
+    47d0:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    47d8:	[0-9a-f]* 	{ bitx r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    47e0:	[0-9a-f]* 	{ shr r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    47e8:	[0-9a-f]* 	{ shr r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    47f0:	[0-9a-f]* 	{ shr r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    47f8:	[0-9a-f]* 	{ shr r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    4800:	[0-9a-f]* 	{ shri r15, r16, 5 ; info 19 ; lh_u r25, r26 }
+    4808:	[0-9a-f]* 	{ pcnt r5, r6 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    4810:	[0-9a-f]* 	{ shri r15, r16, 5 ; srai r5, r6, 5 ; lh_u r25, r26 }
+    4818:	[0-9a-f]* 	{ shri r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    4820:	[0-9a-f]* 	{ shri r5, r6, 5 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    4828:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    4830:	[0-9a-f]* 	{ slt r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    4838:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    4840:	[0-9a-f]* 	{ slt r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    4848:	[0-9a-f]* 	{ slt r5, r6, r7 ; lh_u r25, r26 }
+    4850:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    4858:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    4860:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    4868:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    4870:	[0-9a-f]* 	{ bitx r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    4878:	[0-9a-f]* 	{ slte r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    4880:	[0-9a-f]* 	{ slte r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    4888:	[0-9a-f]* 	{ slte r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    4890:	[0-9a-f]* 	{ slte r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    4898:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; info 19 ; lh_u r25, r26 }
+    48a0:	[0-9a-f]* 	{ pcnt r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    48a8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; srai r5, r6, 5 ; lh_u r25, r26 }
+    48b0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    48b8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    48c0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    48c8:	[0-9a-f]* 	{ slti r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    48d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    48d8:	[0-9a-f]* 	{ slti r5, r6, 5 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    48e0:	[0-9a-f]* 	{ slti r5, r6, 5 ; lh_u r25, r26 }
+    48e8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 }
+    48f0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    48f8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; and r15, r16, r17 ; lh_u r25, r26 }
+    4900:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    4908:	[0-9a-f]* 	{ bitx r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    4910:	[0-9a-f]* 	{ sne r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    4918:	[0-9a-f]* 	{ sne r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    4920:	[0-9a-f]* 	{ sne r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    4928:	[0-9a-f]* 	{ sne r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    4930:	[0-9a-f]* 	{ sra r15, r16, r17 ; info 19 ; lh_u r25, r26 }
+    4938:	[0-9a-f]* 	{ pcnt r5, r6 ; sra r15, r16, r17 ; lh_u r25, r26 }
+    4940:	[0-9a-f]* 	{ sra r15, r16, r17 ; srai r5, r6, 5 ; lh_u r25, r26 }
+    4948:	[0-9a-f]* 	{ sra r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    4950:	[0-9a-f]* 	{ sra r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    4958:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    4960:	[0-9a-f]* 	{ srai r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    4968:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    4970:	[0-9a-f]* 	{ srai r5, r6, 5 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    4978:	[0-9a-f]* 	{ srai r5, r6, 5 ; lh_u r25, r26 }
+    4980:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    4988:	[0-9a-f]* 	{ sub r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    4990:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    4998:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    49a0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lh_u r25, r26 }
+    49a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    49b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; lh_u r25, r26 }
+    49b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    49c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; lh_u r25, r26 }
+    49c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    49d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    49d8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    49e0:	[0-9a-f]* 	{ xor r15, r16, r17 ; movei r5, 5 ; lh_u r25, r26 }
+    49e8:	[0-9a-f]* 	{ xor r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    49f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    49f8:	[0-9a-f]* 	{ xor r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    4a00:	[0-9a-f]* 	{ xor r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    4a08:	[0-9a-f]* 	{ avgh r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a10:	[0-9a-f]* 	{ minh r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a18:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a20:	[0-9a-f]* 	{ nor r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a28:	[0-9a-f]* 	{ seqb r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a30:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a38:	[0-9a-f]* 	{ srah r5, r6, r7 ; lhadd r15, r16, 5 }
+    4a40:	[0-9a-f]* 	{ addhs r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    4a48:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    4a50:	[0-9a-f]* 	{ move r5, r6 ; lhadd_u r15, r16, 5 }
+    4a58:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    4a60:	[0-9a-f]* 	{ pcnt r5, r6 ; lhadd_u r15, r16, 5 }
+    4a68:	[0-9a-f]* 	{ shlh r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    4a70:	[0-9a-f]* 	{ slth r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    4a78:	[0-9a-f]* 	{ subh r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    4a80:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; lnk r15 }
+    4a88:	[0-9a-f]* 	{ intlh r5, r6, r7 ; lnk r15 }
+    4a90:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lnk r15 }
+    4a98:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; lnk r15 }
+    4aa0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; lnk r15 }
+    4aa8:	[0-9a-f]* 	{ shri r5, r6, 5 ; lnk r15 }
+    4ab0:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; lnk r15 }
+    4ab8:	[0-9a-f]* 	{ xor r5, r6, r7 ; lnk r15 }
+    4ac0:	[0-9a-f]* 	{ bitx r5, r6 ; lw r15, r16 }
+    4ac8:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; lw r15, r16 }
+    4ad0:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; lw r15, r16 }
+    4ad8:	[0-9a-f]* 	{ or r5, r6, r7 ; lw r15, r16 }
+    4ae0:	[0-9a-f]* 	{ seqh r5, r6, r7 ; lw r15, r16 }
+    4ae8:	[0-9a-f]* 	{ slte r5, r6, r7 ; lw r15, r16 }
+    4af0:	[0-9a-f]* 	{ srai r5, r6, 5 ; lw r15, r16 }
+    4af8:	[0-9a-f]* 	{ bytex r5, r6 ; add r15, r16, r17 ; lw r25, r26 }
+    4b00:	[0-9a-f]* 	{ add r15, r16, r17 ; nop ; lw r25, r26 }
+    4b08:	[0-9a-f]* 	{ add r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 }
+    4b10:	[0-9a-f]* 	{ add r5, r6, r7 ; move r15, r16 ; lw r25, r26 }
+    4b18:	[0-9a-f]* 	{ add r5, r6, r7 ; slte r15, r16, r17 ; lw r25, r26 }
+    4b20:	[0-9a-f]* 	{ addi r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+    4b28:	[0-9a-f]* 	{ addi r15, r16, 5 ; rl r5, r6, r7 ; lw r25, r26 }
+    4b30:	[0-9a-f]* 	{ addi r15, r16, 5 ; sub r5, r6, r7 ; lw r25, r26 }
+    4b38:	[0-9a-f]* 	{ addi r5, r6, 5 ; or r15, r16, r17 ; lw r25, r26 }
+    4b40:	[0-9a-f]* 	{ addi r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+    4b48:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 }
+    4b50:	[0-9a-f]* 	{ and r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+    4b58:	[0-9a-f]* 	{ and r15, r16, r17 ; xor r5, r6, r7 ; lw r25, r26 }
+    4b60:	[0-9a-f]* 	{ and r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    4b68:	[0-9a-f]* 	{ andi r15, r16, 5 ; add r5, r6, r7 ; lw r25, r26 }
+    4b70:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 }
+    4b78:	[0-9a-f]* 	{ andi r15, r16, 5 ; shri r5, r6, 5 ; lw r25, r26 }
+    4b80:	[0-9a-f]* 	{ andi r5, r6, 5 ; andi r15, r16, 5 ; lw r25, r26 }
+    4b88:	[0-9a-f]* 	{ andi r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 }
+    4b90:	[0-9a-f]* 	{ bitx r5, r6 ; ill ; lw r25, r26 }
+    4b98:	[0-9a-f]* 	{ bitx r5, r6 ; shri r15, r16, 5 ; lw r25, r26 }
+    4ba0:	[0-9a-f]* 	{ bytex r5, r6 ; mnz r15, r16, r17 ; lw r25, r26 }
+    4ba8:	[0-9a-f]* 	{ bytex r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    4bb0:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    4bb8:	[0-9a-f]* 	{ clz r5, r6 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    4bc0:	[0-9a-f]* 	{ ctz r5, r6 ; nop ; lw r25, r26 }
+    4bc8:	[0-9a-f]* 	{ ctz r5, r6 ; slti_u r15, r16, 5 ; lw r25, r26 }
+    4bd0:	[0-9a-f]* 	{ ill ; lw r25, r26 }
+    4bd8:	[0-9a-f]* 	{ mz r5, r6, r7 ; lw r25, r26 }
+    4be0:	[0-9a-f]* 	{ seq r5, r6, r7 ; lw r25, r26 }
+    4be8:	[0-9a-f]* 	{ slti r5, r6, 5 ; lw r25, r26 }
+    4bf0:	[0-9a-f]* 	{ and r5, r6, r7 ; ill ; lw r25, r26 }
+    4bf8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; ill ; lw r25, r26 }
+    4c00:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; ill ; lw r25, r26 }
+    4c08:	[0-9a-f]* 	{ info 19 ; and r5, r6, r7 ; lw r25, r26 }
+    4c10:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; info 19 ; lw r25, r26 }
+    4c18:	[0-9a-f]* 	{ info 19 ; rli r5, r6, 5 ; lw r25, r26 }
+    4c20:	[0-9a-f]* 	{ info 19 ; slt r5, r6, r7 ; lw r25, r26 }
+    4c28:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; lw r25, r26 }
+    4c30:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+    4c38:	[0-9a-f]* 	{ mnz r15, r16, r17 ; s3a r5, r6, r7 ; lw r25, r26 }
+    4c40:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lw r25, r26 }
+    4c48:	[0-9a-f]* 	{ mnz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    4c50:	[0-9a-f]* 	{ mnz r5, r6, r7 ; lw r25, r26 }
+    4c58:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; move r15, r16 ; lw r25, r26 }
+    4c60:	[0-9a-f]* 	{ move r15, r16 ; shr r5, r6, r7 ; lw r25, r26 }
+    4c68:	[0-9a-f]* 	{ move r5, r6 ; and r15, r16, r17 ; lw r25, r26 }
+    4c70:	[0-9a-f]* 	{ move r5, r6 ; shl r15, r16, r17 ; lw r25, r26 }
+    4c78:	[0-9a-f]* 	{ bitx r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    4c80:	[0-9a-f]* 	{ movei r15, 5 ; mz r5, r6, r7 ; lw r25, r26 }
+    4c88:	[0-9a-f]* 	{ movei r15, 5 ; slte_u r5, r6, r7 ; lw r25, r26 }
+    4c90:	[0-9a-f]* 	{ movei r5, 5 ; mnz r15, r16, r17 ; lw r25, r26 }
+    4c98:	[0-9a-f]* 	{ movei r5, 5 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    4ca0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+    4ca8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    4cb0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nop ; lw r25, r26 }
+    4cb8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 }
+    4cc0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 }
+    4cc8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    4cd0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    4cd8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    4ce0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    4ce8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; lw r25, r26 }
+    4cf0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+    4cf8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    4d00:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    4d08:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; andi r15, r16, 5 ; lw r25, r26 }
+    4d10:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    4d18:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ill ; lw r25, r26 }
+    4d20:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    4d28:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+    4d30:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    4d38:	[0-9a-f]* 	{ mvz r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+    4d40:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    4d48:	[0-9a-f]* 	{ mz r15, r16, r17 ; move r5, r6 ; lw r25, r26 }
+    4d50:	[0-9a-f]* 	{ mz r15, r16, r17 ; rli r5, r6, 5 ; lw r25, r26 }
+    4d58:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; lw r25, r26 }
+    4d60:	[0-9a-f]* 	{ mz r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    4d68:	[0-9a-f]* 	{ mz r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    4d70:	[0-9a-f]* 	{ nop ; mnz r5, r6, r7 ; lw r25, r26 }
+    4d78:	[0-9a-f]* 	{ nop ; nor r5, r6, r7 ; lw r25, r26 }
+    4d80:	[0-9a-f]* 	{ nop ; shl r15, r16, r17 ; lw r25, r26 }
+    4d88:	[0-9a-f]* 	{ nop ; sne r15, r16, r17 ; lw r25, r26 }
+    4d90:	[0-9a-f]* 	{ bytex r5, r6 ; nor r15, r16, r17 ; lw r25, r26 }
+    4d98:	[0-9a-f]* 	{ nor r15, r16, r17 ; nop ; lw r25, r26 }
+    4da0:	[0-9a-f]* 	{ nor r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 }
+    4da8:	[0-9a-f]* 	{ nor r5, r6, r7 ; move r15, r16 ; lw r25, r26 }
+    4db0:	[0-9a-f]* 	{ nor r5, r6, r7 ; slte r15, r16, r17 ; lw r25, r26 }
+    4db8:	[0-9a-f]* 	{ or r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+    4dc0:	[0-9a-f]* 	{ or r15, r16, r17 ; rl r5, r6, r7 ; lw r25, r26 }
+    4dc8:	[0-9a-f]* 	{ or r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 }
+    4dd0:	[0-9a-f]* 	{ or r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 }
+    4dd8:	[0-9a-f]* 	{ or r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    4de0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    4de8:	[0-9a-f]* 	{ ori r15, r16, 5 ; seq r5, r6, r7 ; lw r25, r26 }
+    4df0:	[0-9a-f]* 	{ ori r15, r16, 5 ; xor r5, r6, r7 ; lw r25, r26 }
+    4df8:	[0-9a-f]* 	{ ori r5, r6, 5 ; s2a r15, r16, r17 ; lw r25, r26 }
+    4e00:	[0-9a-f]* 	{ pcnt r5, r6 ; add r15, r16, r17 ; lw r25, r26 }
+    4e08:	[0-9a-f]* 	{ pcnt r5, r6 ; seq r15, r16, r17 ; lw r25, r26 }
+    4e10:	[0-9a-f]* 	{ rl r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 }
+    4e18:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    4e20:	[0-9a-f]* 	{ rl r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    4e28:	[0-9a-f]* 	{ rl r5, r6, r7 ; ill ; lw r25, r26 }
+    4e30:	[0-9a-f]* 	{ rl r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    4e38:	[0-9a-f]* 	{ ctz r5, r6 ; rli r15, r16, 5 ; lw r25, r26 }
+    4e40:	[0-9a-f]* 	{ rli r15, r16, 5 ; or r5, r6, r7 ; lw r25, r26 }
+    4e48:	[0-9a-f]* 	{ rli r15, r16, 5 ; sne r5, r6, r7 ; lw r25, r26 }
+    4e50:	[0-9a-f]* 	{ rli r5, r6, 5 ; mz r15, r16, r17 ; lw r25, r26 }
+    4e58:	[0-9a-f]* 	{ rli r5, r6, 5 ; slti r15, r16, 5 ; lw r25, r26 }
+    4e60:	[0-9a-f]* 	{ s1a r15, r16, r17 ; movei r5, 5 ; lw r25, r26 }
+    4e68:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s1a r5, r6, r7 ; lw r25, r26 }
+    4e70:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s1a r15, r16, r17 ; lw r25, r26 }
+    4e78:	[0-9a-f]* 	{ s1a r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    4e80:	[0-9a-f]* 	{ s1a r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    4e88:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    4e90:	[0-9a-f]* 	{ s2a r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 }
+    4e98:	[0-9a-f]* 	{ s2a r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+    4ea0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    4ea8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 }
+    4eb0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+    4eb8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    4ec0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; ill ; lw r25, r26 }
+    4ec8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    4ed0:	[0-9a-f]* 	{ ctz r5, r6 ; seq r15, r16, r17 ; lw r25, r26 }
+    4ed8:	[0-9a-f]* 	{ seq r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 }
+    4ee0:	[0-9a-f]* 	{ seq r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 }
+    4ee8:	[0-9a-f]* 	{ seq r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 }
+    4ef0:	[0-9a-f]* 	{ seq r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    4ef8:	[0-9a-f]* 	{ seqi r15, r16, 5 ; movei r5, 5 ; lw r25, r26 }
+    4f00:	[0-9a-f]* 	{ seqi r15, r16, 5 ; s1a r5, r6, r7 ; lw r25, r26 }
+    4f08:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; seqi r15, r16, 5 ; lw r25, r26 }
+    4f10:	[0-9a-f]* 	{ seqi r5, r6, 5 ; rl r15, r16, r17 ; lw r25, r26 }
+    4f18:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 }
+    4f20:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    4f28:	[0-9a-f]* 	{ shl r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 }
+    4f30:	[0-9a-f]* 	{ shl r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+    4f38:	[0-9a-f]* 	{ shl r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    4f40:	[0-9a-f]* 	{ shli r15, r16, 5 ; and r5, r6, r7 ; lw r25, r26 }
+    4f48:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    4f50:	[0-9a-f]* 	{ shli r15, r16, 5 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    4f58:	[0-9a-f]* 	{ shli r5, r6, 5 ; ill ; lw r25, r26 }
+    4f60:	[0-9a-f]* 	{ shli r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 }
+    4f68:	[0-9a-f]* 	{ ctz r5, r6 ; shr r15, r16, r17 ; lw r25, r26 }
+    4f70:	[0-9a-f]* 	{ shr r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 }
+    4f78:	[0-9a-f]* 	{ shr r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 }
+    4f80:	[0-9a-f]* 	{ shr r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 }
+    4f88:	[0-9a-f]* 	{ shr r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    4f90:	[0-9a-f]* 	{ shri r15, r16, 5 ; movei r5, 5 ; lw r25, r26 }
+    4f98:	[0-9a-f]* 	{ shri r15, r16, 5 ; s1a r5, r6, r7 ; lw r25, r26 }
+    4fa0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shri r15, r16, 5 ; lw r25, r26 }
+    4fa8:	[0-9a-f]* 	{ shri r5, r6, 5 ; rl r15, r16, r17 ; lw r25, r26 }
+    4fb0:	[0-9a-f]* 	{ shri r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 }
+    4fb8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+    4fc0:	[0-9a-f]* 	{ slt r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 }
+    4fc8:	[0-9a-f]* 	{ slt r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+    4fd0:	[0-9a-f]* 	{ slt r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    4fd8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 }
+    4fe0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    4fe8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    4ff0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; ill ; lw r25, r26 }
+    4ff8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    5000:	[0-9a-f]* 	{ ctz r5, r6 ; slte r15, r16, r17 ; lw r25, r26 }
+    5008:	[0-9a-f]* 	{ slte r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 }
+    5010:	[0-9a-f]* 	{ slte r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 }
+    5018:	[0-9a-f]* 	{ slte r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 }
+    5020:	[0-9a-f]* 	{ slte r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    5028:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; movei r5, 5 ; lw r25, r26 }
+    5030:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s1a r5, r6, r7 ; lw r25, r26 }
+    5038:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    5040:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    5048:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    5050:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    5058:	[0-9a-f]* 	{ slti r15, r16, 5 ; shl r5, r6, r7 ; lw r25, r26 }
+    5060:	[0-9a-f]* 	{ slti r5, r6, 5 ; add r15, r16, r17 ; lw r25, r26 }
+    5068:	[0-9a-f]* 	{ slti r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 }
+    5070:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; and r5, r6, r7 ; lw r25, r26 }
+    5078:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 }
+    5080:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    5088:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ill ; lw r25, r26 }
+    5090:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 }
+    5098:	[0-9a-f]* 	{ ctz r5, r6 ; sne r15, r16, r17 ; lw r25, r26 }
+    50a0:	[0-9a-f]* 	{ sne r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 }
+    50a8:	[0-9a-f]* 	{ sne r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 }
+    50b0:	[0-9a-f]* 	{ sne r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 }
+    50b8:	[0-9a-f]* 	{ sne r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    50c0:	[0-9a-f]* 	{ sra r15, r16, r17 ; movei r5, 5 ; lw r25, r26 }
+    50c8:	[0-9a-f]* 	{ sra r15, r16, r17 ; s1a r5, r6, r7 ; lw r25, r26 }
+    50d0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sra r15, r16, r17 ; lw r25, r26 }
+    50d8:	[0-9a-f]* 	{ sra r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    50e0:	[0-9a-f]* 	{ sra r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    50e8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    50f0:	[0-9a-f]* 	{ srai r15, r16, 5 ; shl r5, r6, r7 ; lw r25, r26 }
+    50f8:	[0-9a-f]* 	{ srai r5, r6, 5 ; add r15, r16, r17 ; lw r25, r26 }
+    5100:	[0-9a-f]* 	{ srai r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 }
+    5108:	[0-9a-f]* 	{ sub r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 }
+    5110:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    5118:	[0-9a-f]* 	{ sub r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    5120:	[0-9a-f]* 	{ sub r5, r6, r7 ; ill ; lw r25, r26 }
+    5128:	[0-9a-f]* 	{ sub r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    5130:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; lw r25, r26 }
+    5138:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    5140:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    5148:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    5150:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop ; lw r25, r26 }
+    5158:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slti_u r15, r16, 5 ; lw r25, r26 }
+    5160:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; or r15, r16, r17 ; lw r25, r26 }
+    5168:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sra r15, r16, r17 ; lw r25, r26 }
+    5170:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+    5178:	[0-9a-f]* 	{ xor r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+    5180:	[0-9a-f]* 	{ xor r15, r16, r17 ; xor r5, r6, r7 ; lw r25, r26 }
+    5188:	[0-9a-f]* 	{ xor r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    5190:	[0-9a-f]* 	{ add r5, r6, r7 ; lw_na r15, r16 }
+    5198:	[0-9a-f]* 	{ clz r5, r6 ; lw_na r15, r16 }
+    51a0:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; lw_na r15, r16 }
+    51a8:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; lw_na r15, r16 }
+    51b0:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; lw_na r15, r16 }
+    51b8:	[0-9a-f]* 	{ seqib r5, r6, 5 ; lw_na r15, r16 }
+    51c0:	[0-9a-f]* 	{ slteb r5, r6, r7 ; lw_na r15, r16 }
+    51c8:	[0-9a-f]* 	{ sraih r5, r6, 5 ; lw_na r15, r16 }
+    51d0:	[0-9a-f]* 	{ addih r5, r6, 5 ; lwadd r15, r16, 5 }
+    51d8:	[0-9a-f]* 	{ infol 4660 ; lwadd r15, r16, 5 }
+    51e0:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; lwadd r15, r16, 5 }
+    51e8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; lwadd r15, r16, 5 }
+    51f0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; lwadd r15, r16, 5 }
+    51f8:	[0-9a-f]* 	{ shlih r5, r6, 5 ; lwadd r15, r16, 5 }
+    5200:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; lwadd r15, r16, 5 }
+    5208:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; lwadd r15, r16, 5 }
+    5210:	[0-9a-f]* 	{ andi r5, r6, 5 ; lwadd_na r15, r16, 5 }
+    5218:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; lwadd_na r15, r16, 5 }
+    5220:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    5228:	[0-9a-f]* 	{ mzb r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    5230:	[0-9a-f]* 	{ sadh r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    5238:	[0-9a-f]* 	{ slt r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    5240:	[0-9a-f]* 	{ sneh r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    5248:	[0-9a-f]* 	{ maxb_u r15, r16, r17 ; addb r5, r6, r7 }
+    5250:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; maxb_u r15, r16, r17 }
+    5258:	[0-9a-f]* 	{ maxb_u r15, r16, r17 ; mnz r5, r6, r7 }
+    5260:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; maxb_u r15, r16, r17 }
+    5268:	[0-9a-f]* 	{ maxb_u r15, r16, r17 ; packhb r5, r6, r7 }
+    5270:	[0-9a-f]* 	{ maxb_u r15, r16, r17 ; seqih r5, r6, 5 }
+    5278:	[0-9a-f]* 	{ maxb_u r15, r16, r17 ; slteb_u r5, r6, r7 }
+    5280:	[0-9a-f]* 	{ maxb_u r15, r16, r17 ; sub r5, r6, r7 }
+    5288:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; addli r15, r16, 4660 }
+    5290:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; jalr r15 }
+    5298:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; maxih r15, r16, 5 }
+    52a0:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; nor r15, r16, r17 }
+    52a8:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; seqib r15, r16, 5 }
+    52b0:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; slte r15, r16, r17 }
+    52b8:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; srai r15, r16, 5 }
+    52c0:	[0-9a-f]* 	{ maxh r15, r16, r17 ; addi r5, r6, 5 }
+    52c8:	[0-9a-f]* 	{ maxh r15, r16, r17 }
+    52d0:	[0-9a-f]* 	{ maxh r15, r16, r17 ; movei r5, 5 }
+    52d8:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; maxh r15, r16, r17 }
+    52e0:	[0-9a-f]* 	{ maxh r15, r16, r17 ; rl r5, r6, r7 }
+    52e8:	[0-9a-f]* 	{ maxh r15, r16, r17 ; shli r5, r6, 5 }
+    52f0:	[0-9a-f]* 	{ maxh r15, r16, r17 ; slth_u r5, r6, r7 }
+    52f8:	[0-9a-f]* 	{ maxh r15, r16, r17 ; subhs r5, r6, r7 }
+    5300:	[0-9a-f]* 	{ maxh r5, r6, r7 ; andi r15, r16, 5 }
+    5308:	[0-9a-f]* 	{ maxh r5, r6, r7 ; lb r15, r16 }
+    5310:	[0-9a-f]* 	{ maxh r5, r6, r7 ; minh r15, r16, r17 }
+    5318:	[0-9a-f]* 	{ maxh r5, r6, r7 ; packhb r15, r16, r17 }
+    5320:	[0-9a-f]* 	{ maxh r5, r6, r7 ; shl r15, r16, r17 }
+    5328:	[0-9a-f]* 	{ maxh r5, r6, r7 ; slteh r15, r16, r17 }
+    5330:	[0-9a-f]* 	{ maxh r5, r6, r7 ; subb r15, r16, r17 }
+    5338:	[0-9a-f]* 	{ maxib_u r15, r16, 5 ; addli.sn r5, r6, 4660 }
+    5340:	[0-9a-f]* 	{ maxib_u r15, r16, 5 ; inthh r5, r6, r7 }
+    5348:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; maxib_u r15, r16, 5 }
+    5350:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; maxib_u r15, r16, 5 }
+    5358:	[0-9a-f]* 	{ maxib_u r15, r16, 5 ; s3a r5, r6, r7 }
+    5360:	[0-9a-f]* 	{ maxib_u r15, r16, 5 ; shrb r5, r6, r7 }
+    5368:	[0-9a-f]* 	{ maxib_u r15, r16, 5 ; sltib_u r5, r6, 5 }
+    5370:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; maxib_u r15, r16, 5 }
+    5378:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; flush r15 }
+    5380:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; lh r15, r16 }
+    5388:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; mnz r15, r16, r17 }
+    5390:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; raise }
+    5398:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; shlib r15, r16, 5 }
+    53a0:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; slti r15, r16, 5 }
+    53a8:	[0-9a-f]* 	{ maxib_u r5, r6, 5 ; subs r15, r16, r17 }
+    53b0:	[0-9a-f]* 	{ maxih r15, r16, 5 ; and r5, r6, r7 }
+    53b8:	[0-9a-f]* 	{ maxih r15, r16, 5 ; maxh r5, r6, r7 }
+    53c0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; maxih r15, r16, 5 }
+    53c8:	[0-9a-f]* 	{ maxih r15, r16, 5 ; mz r5, r6, r7 }
+    53d0:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; maxih r15, r16, 5 }
+    53d8:	[0-9a-f]* 	{ maxih r15, r16, 5 ; shrih r5, r6, 5 }
+    53e0:	[0-9a-f]* 	{ maxih r15, r16, 5 ; sneb r5, r6, r7 }
+    53e8:	[0-9a-f]* 	{ maxih r5, r6, 5 ; add r15, r16, r17 }
+    53f0:	[0-9a-f]* 	{ maxih r5, r6, 5 ; info 19 }
+    53f8:	[0-9a-f]* 	{ maxih r5, r6, 5 ; lnk r15 }
+    5400:	[0-9a-f]* 	{ maxih r5, r6, 5 ; movei r15, 5 }
+    5408:	[0-9a-f]* 	{ maxih r5, r6, 5 ; s2a r15, r16, r17 }
+    5410:	[0-9a-f]* 	{ maxih r5, r6, 5 ; shrh r15, r16, r17 }
+    5418:	[0-9a-f]* 	{ maxih r5, r6, 5 ; sltih r15, r16, 5 }
+    5420:	[0-9a-f]* 	{ maxih r5, r6, 5 ; wh64 r15 }
+    5428:	[0-9a-f]* 	{ avgh r5, r6, r7 ; mf }
+    5430:	[0-9a-f]* 	{ minh r5, r6, r7 ; mf }
+    5438:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; mf }
+    5440:	[0-9a-f]* 	{ nor r5, r6, r7 ; mf }
+    5448:	[0-9a-f]* 	{ seqb r5, r6, r7 ; mf }
+    5450:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; mf }
+    5458:	[0-9a-f]* 	{ srah r5, r6, r7 ; mf }
+    5460:	[0-9a-f]* 	{ addhs r5, r6, r7 ; mfspr r16, 5 }
+    5468:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; mfspr r16, 5 }
+    5470:	[0-9a-f]* 	{ move r5, r6 ; mfspr r16, 5 }
+    5478:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mfspr r16, 5 }
+    5480:	[0-9a-f]* 	{ pcnt r5, r6 ; mfspr r16, 5 }
+    5488:	[0-9a-f]* 	{ shlh r5, r6, r7 ; mfspr r16, 5 }
+    5490:	[0-9a-f]* 	{ slth r5, r6, r7 ; mfspr r16, 5 }
+    5498:	[0-9a-f]* 	{ subh r5, r6, r7 ; mfspr r16, 5 }
+    54a0:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; minb_u r15, r16, r17 }
+    54a8:	[0-9a-f]* 	{ minb_u r15, r16, r17 ; intlh r5, r6, r7 }
+    54b0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; minb_u r15, r16, r17 }
+    54b8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; minb_u r15, r16, r17 }
+    54c0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; minb_u r15, r16, r17 }
+    54c8:	[0-9a-f]* 	{ minb_u r15, r16, r17 ; shri r5, r6, 5 }
+    54d0:	[0-9a-f]* 	{ minb_u r15, r16, r17 ; sltih_u r5, r6, 5 }
+    54d8:	[0-9a-f]* 	{ minb_u r15, r16, r17 ; xor r5, r6, r7 }
+    54e0:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; icoh r15 }
+    54e8:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; lhadd r15, r16, 5 }
+    54f0:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; mnzh r15, r16, r17 }
+    54f8:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; rli r15, r16, 5 }
+    5500:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; shr r15, r16, r17 }
+    5508:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; sltib r15, r16, 5 }
+    5510:	[0-9a-f]* 	{ minb_u r5, r6, r7 ; swadd r15, r16, 5 }
+    5518:	[0-9a-f]* 	{ minh r15, r16, r17 ; auli r5, r6, 4660 }
+    5520:	[0-9a-f]* 	{ minh r15, r16, r17 ; maxih r5, r6, 5 }
+    5528:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; minh r15, r16, r17 }
+    5530:	[0-9a-f]* 	{ minh r15, r16, r17 ; mzh r5, r6, r7 }
+    5538:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; minh r15, r16, r17 }
+    5540:	[0-9a-f]* 	{ minh r15, r16, r17 ; slt_u r5, r6, r7 }
+    5548:	[0-9a-f]* 	{ minh r15, r16, r17 ; sra r5, r6, r7 }
+    5550:	[0-9a-f]* 	{ minh r5, r6, r7 ; addbs_u r15, r16, r17 }
+    5558:	[0-9a-f]* 	{ minh r5, r6, r7 ; inthb r15, r16, r17 }
+    5560:	[0-9a-f]* 	{ minh r5, r6, r7 ; lw_na r15, r16 }
+    5568:	[0-9a-f]* 	{ minh r5, r6, r7 ; moveli.sn r15, 4660 }
+    5570:	[0-9a-f]* 	{ minh r5, r6, r7 ; sb r15, r16 }
+    5578:	[0-9a-f]* 	{ minh r5, r6, r7 ; shrib r15, r16, 5 }
+    5580:	[0-9a-f]* 	{ minh r5, r6, r7 ; sne r15, r16, r17 }
+    5588:	[0-9a-f]* 	{ minh r5, r6, r7 ; xori r15, r16, 5 }
+    5590:	[0-9a-f]* 	{ bytex r5, r6 ; minib_u r15, r16, 5 }
+    5598:	[0-9a-f]* 	{ minib_u r15, r16, 5 ; minih r5, r6, 5 }
+    55a0:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; minib_u r15, r16, 5 }
+    55a8:	[0-9a-f]* 	{ minib_u r15, r16, 5 ; ori r5, r6, 5 }
+    55b0:	[0-9a-f]* 	{ minib_u r15, r16, 5 ; seqi r5, r6, 5 }
+    55b8:	[0-9a-f]* 	{ minib_u r15, r16, 5 ; slte_u r5, r6, r7 }
+    55c0:	[0-9a-f]* 	{ minib_u r15, r16, 5 ; sraib r5, r6, 5 }
+    55c8:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; addib r15, r16, 5 }
+    55d0:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; inv r15 }
+    55d8:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; maxh r15, r16, r17 }
+    55e0:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; mzh r15, r16, r17 }
+    55e8:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; seqh r15, r16, r17 }
+    55f0:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; sltb r15, r16, r17 }
+    55f8:	[0-9a-f]* 	{ minib_u r5, r6, 5 ; srab r15, r16, r17 }
+    5600:	[0-9a-f]* 	{ minih r15, r16, 5 ; addh r5, r6, r7 }
+    5608:	[0-9a-f]* 	{ ctz r5, r6 ; minih r15, r16, 5 }
+    5610:	[0-9a-f]* 	{ minih r15, r16, 5 ; mnzh r5, r6, r7 }
+    5618:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; minih r15, r16, 5 }
+    5620:	[0-9a-f]* 	{ minih r15, r16, 5 ; packlb r5, r6, r7 }
+    5628:	[0-9a-f]* 	{ minih r15, r16, 5 ; shlb r5, r6, r7 }
+    5630:	[0-9a-f]* 	{ minih r15, r16, 5 ; slteh_u r5, r6, r7 }
+    5638:	[0-9a-f]* 	{ minih r15, r16, 5 ; subbs_u r5, r6, r7 }
+    5640:	[0-9a-f]* 	{ minih r5, r6, 5 ; adds r15, r16, r17 }
+    5648:	[0-9a-f]* 	{ minih r5, r6, 5 ; jr r15 }
+    5650:	[0-9a-f]* 	{ minih r5, r6, 5 ; mfspr r16, 5 }
+    5658:	[0-9a-f]* 	{ minih r5, r6, 5 ; ori r15, r16, 5 }
+    5660:	[0-9a-f]* 	{ minih r5, r6, 5 ; sh r15, r16 }
+    5668:	[0-9a-f]* 	{ minih r5, r6, 5 ; slteb r15, r16, r17 }
+    5670:	[0-9a-f]* 	{ minih r5, r6, 5 ; sraih r15, r16, 5 }
+    5678:	[0-9a-f]* 	{ mm r15, r16, r17, 5, 7 ; addih r5, r6, 5 }
+    5680:	[0-9a-f]* 	{ mm r15, r16, r17, 5, 7 ; infol 4660 }
+    5688:	[0-9a-f]* 	{ mm r15, r16, r17, 5, 7 ; moveli.sn r5, 4660 }
+    5690:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+    5698:	[0-9a-f]* 	{ mm r15, r16, r17, 5, 7 ; s1a r5, r6, r7 }
+    56a0:	[0-9a-f]* 	{ mm r15, r16, r17, 5, 7 ; shlih r5, r6, 5 }
+    56a8:	[0-9a-f]* 	{ mm r15, r16, r17, 5, 7 ; slti_u r5, r6, 5 }
+    56b0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mm r15, r16, r17, 5, 7 }
+    56b8:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; dtlbpr r15 }
+    56c0:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; lbadd r15, r16, 5 }
+    56c8:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; minih r15, r16, 5 }
+    56d0:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; packlb r15, r16, r17 }
+    56d8:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; shlh r15, r16, r17 }
+    56e0:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; slth r15, r16, r17 }
+    56e8:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; subh r15, r16, r17 }
+    56f0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; addbs_u r5, r6, r7 }
+    56f8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 }
+    5700:	[0-9a-f]* 	{ mnz r15, r16, r17 ; auli r5, r6, 4660 }
+    5708:	[0-9a-f]* 	{ bytex r5, r6 ; mnz r15, r16, r17 ; sh r25, r26 }
+    5710:	[0-9a-f]* 	{ ctz r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
+    5718:	[0-9a-f]* 	{ mnz r15, r16, r17 ; info 19 ; lw r25, r26 }
+    5720:	[0-9a-f]* 	{ mnz r15, r16, r17 ; info 19 ; lb r25, r26 }
+    5728:	[0-9a-f]* 	{ pcnt r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 }
+    5730:	[0-9a-f]* 	{ mnz r15, r16, r17 ; srai r5, r6, 5 ; lb r25, r26 }
+    5738:	[0-9a-f]* 	{ mnz r15, r16, r17 ; movei r5, 5 ; lb_u r25, r26 }
+    5740:	[0-9a-f]* 	{ mnz r15, r16, r17 ; s1a r5, r6, r7 ; lb_u r25, r26 }
+    5748:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    5750:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 }
+    5758:	[0-9a-f]* 	{ mnz r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 }
+    5760:	[0-9a-f]* 	{ mnz r15, r16, r17 ; xor r5, r6, r7 ; lh r25, r26 }
+    5768:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    5770:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shli r5, r6, 5 ; lh_u r25, r26 }
+    5778:	[0-9a-f]* 	{ mnz r15, r16, r17 ; addi r5, r6, 5 ; lw r25, r26 }
+    5780:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+    5788:	[0-9a-f]* 	{ mnz r15, r16, r17 ; slt r5, r6, r7 ; lw r25, r26 }
+    5790:	[0-9a-f]* 	{ mnz r15, r16, r17 ; minb_u r5, r6, r7 }
+    5798:	[0-9a-f]* 	{ mnz r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 }
+    57a0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    57a8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    57b0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 }
+    57b8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    57c0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; mnz r15, r16, r17 }
+    57c8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    57d0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 }
+    57d8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; nop ; prefetch r25 }
+    57e0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
+    57e8:	[0-9a-f]* 	{ pcnt r5, r6 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    57f0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; move r5, r6 ; prefetch r25 }
+    57f8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 }
+    5800:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnz r15, r16, r17 ; prefetch r25 }
+    5808:	[0-9a-f]* 	{ mnz r15, r16, r17 ; rli r5, r6, 5 ; lw r25, r26 }
+    5810:	[0-9a-f]* 	{ mnz r15, r16, r17 ; s2a r5, r6, r7 ; lw r25, r26 }
+    5818:	[0-9a-f]* 	{ sadh r5, r6, r7 ; mnz r15, r16, r17 }
+    5820:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    5828:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shli r5, r6, 5 ; sb r25, r26 }
+    5830:	[0-9a-f]* 	{ mnz r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 }
+    5838:	[0-9a-f]* 	{ mnz r15, r16, r17 ; seqi r5, r6, 5 }
+    5840:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 }
+    5848:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl r5, r6, r7 ; sh r25, r26 }
+    5850:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shl r5, r6, r7 ; lb r25, r26 }
+    5858:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 }
+    5860:	[0-9a-f]* 	{ mnz r15, r16, r17 ; shri r5, r6, 5 ; lw r25, r26 }
+    5868:	[0-9a-f]* 	{ mnz r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    5870:	[0-9a-f]* 	{ mnz r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    5878:	[0-9a-f]* 	{ mnz r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 }
+    5880:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sne r5, r6, r7 ; lb r25, r26 }
+    5888:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sra r5, r6, r7 ; sw r25, r26 }
+    5890:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 }
+    5898:	[0-9a-f]* 	{ mnz r15, r16, r17 ; info 19 ; sw r25, r26 }
+    58a0:	[0-9a-f]* 	{ pcnt r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 }
+    58a8:	[0-9a-f]* 	{ mnz r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 }
+    58b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 }
+    58b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 }
+    58c0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 }
+    58c8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 }
+    58d0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 }
+    58d8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; sw r25, r26 }
+    58e0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; sh r25, r26 }
+    58e8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ill ; lb r25, r26 }
+    58f0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    58f8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+    5900:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    5908:	[0-9a-f]* 	{ mnz r5, r6, r7 ; ill ; lh r25, r26 }
+    5910:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    5918:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+    5920:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    5928:	[0-9a-f]* 	{ mnz r5, r6, r7 ; lw r25, r26 }
+    5930:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+    5938:	[0-9a-f]* 	{ mnz r5, r6, r7 ; maxih r15, r16, 5 }
+    5940:	[0-9a-f]* 	{ mnz r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    5948:	[0-9a-f]* 	{ mnz r5, r6, r7 ; moveli r15, 4660 }
+    5950:	[0-9a-f]* 	{ mnz r5, r6, r7 ; nop ; prefetch r25 }
+    5958:	[0-9a-f]* 	{ mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    5960:	[0-9a-f]* 	{ mnz r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+    5968:	[0-9a-f]* 	{ mnz r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+    5970:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    5978:	[0-9a-f]* 	{ mnz r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    5980:	[0-9a-f]* 	{ mnz r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    5988:	[0-9a-f]* 	{ mnz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    5990:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 }
+    5998:	[0-9a-f]* 	{ mnz r5, r6, r7 ; seqh r15, r16, r17 }
+    59a0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; info 19 ; sh r25, r26 }
+    59a8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    59b0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    59b8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    59c0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shrih r15, r16, 5 }
+    59c8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slt_u r15, r16, r17 }
+    59d0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    59d8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    59e0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+    59e8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    59f0:	[0-9a-f]* 	{ mnz r5, r6, r7 ; subbs_u r15, r16, r17 }
+    59f8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; rl r15, r16, r17 ; sw r25, r26 }
+    5a00:	[0-9a-f]* 	{ mnz r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    5a08:	[0-9a-f]* 	{ mnzb r15, r16, r17 ; addh r5, r6, r7 }
+    5a10:	[0-9a-f]* 	{ ctz r5, r6 ; mnzb r15, r16, r17 }
+    5a18:	[0-9a-f]* 	{ mnzb r15, r16, r17 ; mnzh r5, r6, r7 }
+    5a20:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; mnzb r15, r16, r17 }
+    5a28:	[0-9a-f]* 	{ mnzb r15, r16, r17 ; packlb r5, r6, r7 }
+    5a30:	[0-9a-f]* 	{ mnzb r15, r16, r17 ; shlb r5, r6, r7 }
+    5a38:	[0-9a-f]* 	{ mnzb r15, r16, r17 ; slteh_u r5, r6, r7 }
+    5a40:	[0-9a-f]* 	{ mnzb r15, r16, r17 ; subbs_u r5, r6, r7 }
+    5a48:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; adds r15, r16, r17 }
+    5a50:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; jr r15 }
+    5a58:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; mfspr r16, 5 }
+    5a60:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; ori r15, r16, 5 }
+    5a68:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; sh r15, r16 }
+    5a70:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; slteb r15, r16, r17 }
+    5a78:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; sraih r15, r16, 5 }
+    5a80:	[0-9a-f]* 	{ mnzh r15, r16, r17 ; addih r5, r6, 5 }
+    5a88:	[0-9a-f]* 	{ mnzh r15, r16, r17 ; infol 4660 }
+    5a90:	[0-9a-f]* 	{ mnzh r15, r16, r17 ; moveli.sn r5, 4660 }
+    5a98:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mnzh r15, r16, r17 }
+    5aa0:	[0-9a-f]* 	{ mnzh r15, r16, r17 ; s1a r5, r6, r7 }
+    5aa8:	[0-9a-f]* 	{ mnzh r15, r16, r17 ; shlih r5, r6, 5 }
+    5ab0:	[0-9a-f]* 	{ mnzh r15, r16, r17 ; slti_u r5, r6, 5 }
+    5ab8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mnzh r15, r16, r17 }
+    5ac0:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; dtlbpr r15 }
+    5ac8:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; lbadd r15, r16, 5 }
+    5ad0:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; minih r15, r16, 5 }
+    5ad8:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; packlb r15, r16, r17 }
+    5ae0:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; shlh r15, r16, r17 }
+    5ae8:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; slth r15, r16, r17 }
+    5af0:	[0-9a-f]* 	{ mnzh r5, r6, r7 ; subh r15, r16, r17 }
+    5af8:	[0-9a-f]* 	{ move r15, r16 ; addbs_u r5, r6, r7 }
+    5b00:	[0-9a-f]* 	{ move r15, r16 ; and r5, r6, r7 ; lb r25, r26 }
+    5b08:	[0-9a-f]* 	{ move r15, r16 ; auli r5, r6, 4660 }
+    5b10:	[0-9a-f]* 	{ bytex r5, r6 ; move r15, r16 ; sh r25, r26 }
+    5b18:	[0-9a-f]* 	{ ctz r5, r6 ; move r15, r16 ; prefetch r25 }
+    5b20:	[0-9a-f]* 	{ move r15, r16 ; info 19 ; lw r25, r26 }
+    5b28:	[0-9a-f]* 	{ move r15, r16 ; info 19 ; lb r25, r26 }
+    5b30:	[0-9a-f]* 	{ pcnt r5, r6 ; move r15, r16 ; lb r25, r26 }
+    5b38:	[0-9a-f]* 	{ move r15, r16 ; srai r5, r6, 5 ; lb r25, r26 }
+    5b40:	[0-9a-f]* 	{ move r15, r16 ; movei r5, 5 ; lb_u r25, r26 }
+    5b48:	[0-9a-f]* 	{ move r15, r16 ; s1a r5, r6, r7 ; lb_u r25, r26 }
+    5b50:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; lb_u r25, r26 }
+    5b58:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; move r15, r16 ; lh r25, r26 }
+    5b60:	[0-9a-f]* 	{ move r15, r16 ; seq r5, r6, r7 ; lh r25, r26 }
+    5b68:	[0-9a-f]* 	{ move r15, r16 ; xor r5, r6, r7 ; lh r25, r26 }
+    5b70:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+    5b78:	[0-9a-f]* 	{ move r15, r16 ; shli r5, r6, 5 ; lh_u r25, r26 }
+    5b80:	[0-9a-f]* 	{ move r15, r16 ; addi r5, r6, 5 ; lw r25, r26 }
+    5b88:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; move r15, r16 ; lw r25, r26 }
+    5b90:	[0-9a-f]* 	{ move r15, r16 ; slt r5, r6, r7 ; lw r25, r26 }
+    5b98:	[0-9a-f]* 	{ move r15, r16 ; minb_u r5, r6, r7 }
+    5ba0:	[0-9a-f]* 	{ move r15, r16 ; move r5, r6 ; lh_u r25, r26 }
+    5ba8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+    5bb0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    5bb8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; move r15, r16 }
+    5bc0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    5bc8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; move r15, r16 }
+    5bd0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    5bd8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; move r15, r16 ; sh r25, r26 }
+    5be0:	[0-9a-f]* 	{ move r15, r16 ; nop ; prefetch r25 }
+    5be8:	[0-9a-f]* 	{ move r15, r16 ; or r5, r6, r7 ; prefetch r25 }
+    5bf0:	[0-9a-f]* 	{ pcnt r5, r6 ; move r15, r16 ; lb_u r25, r26 }
+    5bf8:	[0-9a-f]* 	{ move r15, r16 ; move r5, r6 ; prefetch r25 }
+    5c00:	[0-9a-f]* 	{ move r15, r16 ; rli r5, r6, 5 ; prefetch r25 }
+    5c08:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 }
+    5c10:	[0-9a-f]* 	{ move r15, r16 ; rli r5, r6, 5 ; lw r25, r26 }
+    5c18:	[0-9a-f]* 	{ move r15, r16 ; s2a r5, r6, r7 ; lw r25, r26 }
+    5c20:	[0-9a-f]* 	{ sadh r5, r6, r7 ; move r15, r16 }
+    5c28:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; move r15, r16 ; sb r25, r26 }
+    5c30:	[0-9a-f]* 	{ move r15, r16 ; shli r5, r6, 5 ; sb r25, r26 }
+    5c38:	[0-9a-f]* 	{ move r15, r16 ; seq r5, r6, r7 ; lb_u r25, r26 }
+    5c40:	[0-9a-f]* 	{ move r15, r16 ; seqi r5, r6, 5 }
+    5c48:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; move r15, r16 ; sh r25, r26 }
+    5c50:	[0-9a-f]* 	{ move r15, r16 ; shl r5, r6, r7 ; sh r25, r26 }
+    5c58:	[0-9a-f]* 	{ move r15, r16 ; shl r5, r6, r7 ; lb r25, r26 }
+    5c60:	[0-9a-f]* 	{ move r15, r16 ; shli r5, r6, 5 ; sw r25, r26 }
+    5c68:	[0-9a-f]* 	{ move r15, r16 ; shri r5, r6, 5 ; lw r25, r26 }
+    5c70:	[0-9a-f]* 	{ move r15, r16 ; slt_u r5, r6, r7 ; lh r25, r26 }
+    5c78:	[0-9a-f]* 	{ move r15, r16 ; slte_u r5, r6, r7 ; lb r25, r26 }
+    5c80:	[0-9a-f]* 	{ move r15, r16 ; slti r5, r6, 5 ; lw r25, r26 }
+    5c88:	[0-9a-f]* 	{ move r15, r16 ; sne r5, r6, r7 ; lb r25, r26 }
+    5c90:	[0-9a-f]* 	{ move r15, r16 ; sra r5, r6, r7 ; sw r25, r26 }
+    5c98:	[0-9a-f]* 	{ move r15, r16 ; sub r5, r6, r7 ; lw r25, r26 }
+    5ca0:	[0-9a-f]* 	{ move r15, r16 ; info 19 ; sw r25, r26 }
+    5ca8:	[0-9a-f]* 	{ pcnt r5, r6 ; move r15, r16 ; sw r25, r26 }
+    5cb0:	[0-9a-f]* 	{ move r15, r16 ; srai r5, r6, 5 ; sw r25, r26 }
+    5cb8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; lh r25, r26 }
+    5cc0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; move r15, r16 ; lh r25, r26 }
+    5cc8:	[0-9a-f]* 	{ move r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 }
+    5cd0:	[0-9a-f]* 	{ move r5, r6 ; addi r15, r16, 5 ; sh r25, r26 }
+    5cd8:	[0-9a-f]* 	{ move r5, r6 ; andi r15, r16, 5 ; lh r25, r26 }
+    5ce0:	[0-9a-f]* 	{ move r5, r6 ; sw r25, r26 }
+    5ce8:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; sh r25, r26 }
+    5cf0:	[0-9a-f]* 	{ move r5, r6 ; ill ; lb r25, r26 }
+    5cf8:	[0-9a-f]* 	{ move r5, r6 ; shri r15, r16, 5 ; lb r25, r26 }
+    5d00:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; lb_u r25, r26 }
+    5d08:	[0-9a-f]* 	{ move r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    5d10:	[0-9a-f]* 	{ move r5, r6 ; ill ; lh r25, r26 }
+    5d18:	[0-9a-f]* 	{ move r5, r6 ; shri r15, r16, 5 ; lh r25, r26 }
+    5d20:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; lh_u r25, r26 }
+    5d28:	[0-9a-f]* 	{ move r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    5d30:	[0-9a-f]* 	{ move r5, r6 ; lw r25, r26 }
+    5d38:	[0-9a-f]* 	{ move r5, r6 ; shr r15, r16, r17 ; lw r25, r26 }
+    5d40:	[0-9a-f]* 	{ move r5, r6 ; maxih r15, r16, 5 }
+    5d48:	[0-9a-f]* 	{ move r5, r6 ; move r15, r16 ; lb r25, r26 }
+    5d50:	[0-9a-f]* 	{ move r5, r6 ; moveli r15, 4660 }
+    5d58:	[0-9a-f]* 	{ move r5, r6 ; nop ; prefetch r25 }
+    5d60:	[0-9a-f]* 	{ move r5, r6 ; or r15, r16, r17 ; prefetch r25 }
+    5d68:	[0-9a-f]* 	{ move r5, r6 ; add r15, r16, r17 ; prefetch r25 }
+    5d70:	[0-9a-f]* 	{ move r5, r6 ; seq r15, r16, r17 ; prefetch r25 }
+    5d78:	[0-9a-f]* 	{ move r5, r6 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    5d80:	[0-9a-f]* 	{ move r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    5d88:	[0-9a-f]* 	{ move r5, r6 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    5d90:	[0-9a-f]* 	{ move r5, r6 ; mz r15, r16, r17 ; sb r25, r26 }
+    5d98:	[0-9a-f]* 	{ move r5, r6 ; slti r15, r16, 5 ; sb r25, r26 }
+    5da0:	[0-9a-f]* 	{ move r5, r6 ; seqh r15, r16, r17 }
+    5da8:	[0-9a-f]* 	{ move r5, r6 ; info 19 ; sh r25, r26 }
+    5db0:	[0-9a-f]* 	{ move r5, r6 ; slt r15, r16, r17 ; sh r25, r26 }
+    5db8:	[0-9a-f]* 	{ move r5, r6 ; shl r15, r16, r17 ; sh r25, r26 }
+    5dc0:	[0-9a-f]* 	{ move r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    5dc8:	[0-9a-f]* 	{ move r5, r6 ; shrih r15, r16, 5 }
+    5dd0:	[0-9a-f]* 	{ move r5, r6 ; slt_u r15, r16, r17 }
+    5dd8:	[0-9a-f]* 	{ move r5, r6 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    5de0:	[0-9a-f]* 	{ move r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    5de8:	[0-9a-f]* 	{ move r5, r6 ; sne r15, r16, r17 ; sh r25, r26 }
+    5df0:	[0-9a-f]* 	{ move r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    5df8:	[0-9a-f]* 	{ move r5, r6 ; subbs_u r15, r16, r17 }
+    5e00:	[0-9a-f]* 	{ move r5, r6 ; rl r15, r16, r17 ; sw r25, r26 }
+    5e08:	[0-9a-f]* 	{ move r5, r6 ; sub r15, r16, r17 ; sw r25, r26 }
+    5e10:	[0-9a-f]* 	{ movei r15, 5 ; add r5, r6, r7 ; lh_u r25, r26 }
+    5e18:	[0-9a-f]* 	{ movei r15, 5 ; addi r5, r6, 5 }
+    5e20:	[0-9a-f]* 	{ movei r15, 5 ; andi r5, r6, 5 ; lh r25, r26 }
+    5e28:	[0-9a-f]* 	{ bitx r5, r6 ; movei r15, 5 }
+    5e30:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 }
+    5e38:	[0-9a-f]* 	{ movei r15, 5 ; sb r25, r26 }
+    5e40:	[0-9a-f]* 	{ movei r15, 5 ; addi r5, r6, 5 ; lb r25, r26 }
+    5e48:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+    5e50:	[0-9a-f]* 	{ movei r15, 5 ; slt r5, r6, r7 ; lb r25, r26 }
+    5e58:	[0-9a-f]* 	{ bitx r5, r6 ; movei r15, 5 ; lb_u r25, r26 }
+    5e60:	[0-9a-f]* 	{ movei r15, 5 ; mz r5, r6, r7 ; lb_u r25, r26 }
+    5e68:	[0-9a-f]* 	{ movei r15, 5 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+    5e70:	[0-9a-f]* 	{ ctz r5, r6 ; movei r15, 5 ; lh r25, r26 }
+    5e78:	[0-9a-f]* 	{ movei r15, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    5e80:	[0-9a-f]* 	{ movei r15, 5 ; sne r5, r6, r7 ; lh r25, r26 }
+    5e88:	[0-9a-f]* 	{ movei r15, 5 ; mnz r5, r6, r7 ; lh_u r25, r26 }
+    5e90:	[0-9a-f]* 	{ movei r15, 5 ; rl r5, r6, r7 ; lh_u r25, r26 }
+    5e98:	[0-9a-f]* 	{ movei r15, 5 ; sub r5, r6, r7 ; lh_u r25, r26 }
+    5ea0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+    5ea8:	[0-9a-f]* 	{ movei r15, 5 ; s2a r5, r6, r7 ; lw r25, r26 }
+    5eb0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    5eb8:	[0-9a-f]* 	{ movei r15, 5 ; mnz r5, r6, r7 ; sh r25, r26 }
+    5ec0:	[0-9a-f]* 	{ movei r15, 5 ; movei r5, 5 ; prefetch r25 }
+    5ec8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 }
+    5ed0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    5ed8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 }
+    5ee0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    5ee8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+    5ef0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; movei r15, 5 }
+    5ef8:	[0-9a-f]* 	{ movei r15, 5 ; mz r5, r6, r7 }
+    5f00:	[0-9a-f]* 	{ movei r15, 5 ; nor r5, r6, r7 ; sh r25, r26 }
+    5f08:	[0-9a-f]* 	{ movei r15, 5 ; ori r5, r6, 5 ; sh r25, r26 }
+    5f10:	[0-9a-f]* 	{ movei r15, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    5f18:	[0-9a-f]* 	{ mvz r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    5f20:	[0-9a-f]* 	{ movei r15, 5 ; slte r5, r6, r7 ; prefetch r25 }
+    5f28:	[0-9a-f]* 	{ movei r15, 5 ; rl r5, r6, r7 ; sb r25, r26 }
+    5f30:	[0-9a-f]* 	{ movei r15, 5 ; s1a r5, r6, r7 ; sb r25, r26 }
+    5f38:	[0-9a-f]* 	{ movei r15, 5 ; s3a r5, r6, r7 ; sb r25, r26 }
+    5f40:	[0-9a-f]* 	{ movei r15, 5 ; mnz r5, r6, r7 ; sb r25, r26 }
+    5f48:	[0-9a-f]* 	{ movei r15, 5 ; rl r5, r6, r7 ; sb r25, r26 }
+    5f50:	[0-9a-f]* 	{ movei r15, 5 ; sub r5, r6, r7 ; sb r25, r26 }
+    5f58:	[0-9a-f]* 	{ movei r15, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+    5f60:	[0-9a-f]* 	{ movei r15, 5 ; info 19 ; sh r25, r26 }
+    5f68:	[0-9a-f]* 	{ pcnt r5, r6 ; movei r15, 5 ; sh r25, r26 }
+    5f70:	[0-9a-f]* 	{ movei r15, 5 ; srai r5, r6, 5 ; sh r25, r26 }
+    5f78:	[0-9a-f]* 	{ movei r15, 5 ; shli r5, r6, 5 ; lb r25, r26 }
+    5f80:	[0-9a-f]* 	{ movei r15, 5 ; shr r5, r6, r7 ; sw r25, r26 }
+    5f88:	[0-9a-f]* 	{ movei r15, 5 ; slt r5, r6, r7 ; lw r25, r26 }
+    5f90:	[0-9a-f]* 	{ movei r15, 5 ; slte r5, r6, r7 ; lh r25, r26 }
+    5f98:	[0-9a-f]* 	{ movei r15, 5 ; slteh r5, r6, r7 }
+    5fa0:	[0-9a-f]* 	{ movei r15, 5 ; slti_u r5, r6, 5 ; sb r25, r26 }
+    5fa8:	[0-9a-f]* 	{ movei r15, 5 ; sra r5, r6, r7 ; lb r25, r26 }
+    5fb0:	[0-9a-f]* 	{ movei r15, 5 ; srai r5, r6, 5 ; sw r25, r26 }
+    5fb8:	[0-9a-f]* 	{ movei r15, 5 ; addi r5, r6, 5 ; sw r25, r26 }
+    5fc0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; sw r25, r26 }
+    5fc8:	[0-9a-f]* 	{ movei r15, 5 ; slt r5, r6, r7 ; sw r25, r26 }
+    5fd0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    5fd8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; movei r15, 5 ; lw r25, r26 }
+    5fe0:	[0-9a-f]* 	{ movei r15, 5 ; xor r5, r6, r7 ; lw r25, r26 }
+    5fe8:	[0-9a-f]* 	{ movei r5, 5 ; addhs r15, r16, r17 }
+    5ff0:	[0-9a-f]* 	{ movei r5, 5 ; and r15, r16, r17 ; lw r25, r26 }
+    5ff8:	[0-9a-f]* 	{ movei r5, 5 ; lb r25, r26 }
+    6000:	[0-9a-f]* 	{ movei r5, 5 ; ill }
+    6008:	[0-9a-f]* 	{ movei r5, 5 ; jr r15 }
+    6010:	[0-9a-f]* 	{ movei r5, 5 ; s1a r15, r16, r17 ; lb r25, r26 }
+    6018:	[0-9a-f]* 	{ movei r5, 5 ; lb r25, r26 }
+    6020:	[0-9a-f]* 	{ movei r5, 5 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    6028:	[0-9a-f]* 	{ movei r5, 5 ; lbadd r15, r16, 5 }
+    6030:	[0-9a-f]* 	{ movei r5, 5 ; s1a r15, r16, r17 ; lh r25, r26 }
+    6038:	[0-9a-f]* 	{ movei r5, 5 ; lh r25, r26 }
+    6040:	[0-9a-f]* 	{ movei r5, 5 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    6048:	[0-9a-f]* 	{ movei r5, 5 ; lhadd r15, r16, 5 }
+    6050:	[0-9a-f]* 	{ movei r5, 5 ; rli r15, r16, 5 ; lw r25, r26 }
+    6058:	[0-9a-f]* 	{ movei r5, 5 ; xor r15, r16, r17 ; lw r25, r26 }
+    6060:	[0-9a-f]* 	{ movei r5, 5 ; mnz r15, r16, r17 ; lw r25, r26 }
+    6068:	[0-9a-f]* 	{ movei r5, 5 ; movei r15, 5 ; lh r25, r26 }
+    6070:	[0-9a-f]* 	{ movei r5, 5 ; mz r15, r16, r17 }
+    6078:	[0-9a-f]* 	{ movei r5, 5 ; nor r15, r16, r17 ; sh r25, r26 }
+    6080:	[0-9a-f]* 	{ movei r5, 5 ; ori r15, r16, 5 ; sh r25, r26 }
+    6088:	[0-9a-f]* 	{ movei r5, 5 ; nor r15, r16, r17 ; prefetch r25 }
+    6090:	[0-9a-f]* 	{ movei r5, 5 ; sne r15, r16, r17 ; prefetch r25 }
+    6098:	[0-9a-f]* 	{ movei r5, 5 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    60a0:	[0-9a-f]* 	{ movei r5, 5 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    60a8:	[0-9a-f]* 	{ movei r5, 5 ; and r15, r16, r17 ; sb r25, r26 }
+    60b0:	[0-9a-f]* 	{ movei r5, 5 ; shl r15, r16, r17 ; sb r25, r26 }
+    60b8:	[0-9a-f]* 	{ movei r5, 5 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    60c0:	[0-9a-f]* 	{ movei r5, 5 ; seqih r15, r16, 5 }
+    60c8:	[0-9a-f]* 	{ movei r5, 5 ; s2a r15, r16, r17 ; sh r25, r26 }
+    60d0:	[0-9a-f]* 	{ movei r5, 5 ; shadd r15, r16, 5 }
+    60d8:	[0-9a-f]* 	{ movei r5, 5 ; shli r15, r16, 5 ; sh r25, r26 }
+    60e0:	[0-9a-f]* 	{ movei r5, 5 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    60e8:	[0-9a-f]* 	{ movei r5, 5 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    60f0:	[0-9a-f]* 	{ movei r5, 5 ; slte r15, r16, r17 }
+    60f8:	[0-9a-f]* 	{ movei r5, 5 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    6100:	[0-9a-f]* 	{ movei r5, 5 ; sltih_u r15, r16, 5 }
+    6108:	[0-9a-f]* 	{ movei r5, 5 ; sra r15, r16, r17 ; sh r25, r26 }
+    6110:	[0-9a-f]* 	{ movei r5, 5 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    6118:	[0-9a-f]* 	{ movei r5, 5 ; mnz r15, r16, r17 ; sw r25, r26 }
+    6120:	[0-9a-f]* 	{ movei r5, 5 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    6128:	[0-9a-f]* 	{ movei r5, 5 ; xor r15, r16, r17 ; sb r25, r26 }
+    6130:	[0-9a-f]* 	{ moveli r15, 4660 ; auli r5, r6, 4660 }
+    6138:	[0-9a-f]* 	{ moveli r15, 4660 ; maxih r5, r6, 5 }
+    6140:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; moveli r15, 4660 }
+    6148:	[0-9a-f]* 	{ moveli r15, 4660 ; mzh r5, r6, r7 }
+    6150:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; moveli r15, 4660 }
+    6158:	[0-9a-f]* 	{ moveli r15, 4660 ; slt_u r5, r6, r7 }
+    6160:	[0-9a-f]* 	{ moveli r15, 4660 ; sra r5, r6, r7 }
+    6168:	[0-9a-f]* 	{ moveli r5, 4660 ; addbs_u r15, r16, r17 }
+    6170:	[0-9a-f]* 	{ moveli r5, 4660 ; inthb r15, r16, r17 }
+    6178:	[0-9a-f]* 	{ moveli r5, 4660 ; lw_na r15, r16 }
+    6180:	[0-9a-f]* 	{ moveli r5, 4660 ; moveli.sn r15, 4660 }
+    6188:	[0-9a-f]* 	{ moveli r5, 4660 ; sb r15, r16 }
+    6190:	[0-9a-f]* 	{ moveli r5, 4660 ; shrib r15, r16, 5 }
+    6198:	[0-9a-f]* 	{ moveli r5, 4660 ; sne r15, r16, r17 }
+    61a0:	[0-9a-f]* 	{ moveli r5, 4660 ; xori r15, r16, 5 }
+    61a8:	[0-9a-f]* 	{ clz r5, r6 ; moveli.sn r15, 4660 }
+    61b0:	[0-9a-f]* 	{ moveli.sn r15, 4660 ; mm r5, r6, r7, 5, 7 }
+    61b8:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; moveli.sn r15, 4660 }
+    61c0:	[0-9a-f]* 	{ moveli.sn r15, 4660 ; packhb r5, r6, r7 }
+    61c8:	[0-9a-f]* 	{ moveli.sn r15, 4660 ; seqih r5, r6, 5 }
+    61d0:	[0-9a-f]* 	{ moveli.sn r15, 4660 ; slteb_u r5, r6, r7 }
+    61d8:	[0-9a-f]* 	{ moveli.sn r15, 4660 ; sub r5, r6, r7 }
+    61e0:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; addli r15, r16, 4660 }
+    61e8:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; jalrp r15 }
+    61f0:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; mf }
+    61f8:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; ori r15, r16, 5 }
+    6200:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; sh r15, r16 }
+    6208:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; slteb r15, r16, r17 }
+    6210:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; sraih r15, r16, 5 }
+    6218:	[0-9a-f]* 	{ addih r5, r6, 5 ; mtspr 5, r16 }
+    6220:	[0-9a-f]* 	{ infol 4660 ; mtspr 5, r16 }
+    6228:	[0-9a-f]* 	{ moveli.sn r5, 4660 ; mtspr 5, r16 }
+    6230:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mtspr 5, r16 }
+    6238:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mtspr 5, r16 }
+    6240:	[0-9a-f]* 	{ shlih r5, r6, 5 ; mtspr 5, r16 }
+    6248:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; mtspr 5, r16 }
+    6250:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mtspr 5, r16 }
+    6258:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+    6260:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    6268:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lb_u r25, r26 }
+    6270:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; info 19 ; lb r25, r26 }
+    6278:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; jrp r15 }
+    6280:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    6288:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lb_u r15, r16 }
+    6290:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    6298:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    62a0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    62a8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lh_u r15, r16 }
+    62b0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    62b8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    62c0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    62c8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; lw r25, r26 }
+    62d0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    62d8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+    62e0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mzb r15, r16, r17 }
+    62e8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    62f0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+    62f8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    6300:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    6308:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+    6310:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    6318:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 }
+    6320:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    6328:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    6330:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sh r15, r16 }
+    6338:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    6340:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    6348:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+    6350:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    6358:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+    6360:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    6368:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    6370:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    6378:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+    6380:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    6388:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    6390:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    6398:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    63a0:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; flush r15 }
+    63a8:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; lh r15, r16 }
+    63b0:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; mnz r15, r16, r17 }
+    63b8:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; raise }
+    63c0:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; shlib r15, r16, 5 }
+    63c8:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; slti r15, r16, 5 }
+    63d0:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; subs r15, r16, r17 }
+    63d8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; addhs r15, r16, r17 }
+    63e0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 }
+    63e8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; lb r25, r26 }
+    63f0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; ill }
+    63f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; jr r15 }
+    6400:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 }
+    6408:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; lb r25, r26 }
+    6410:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    6418:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; lbadd r15, r16, 5 }
+    6420:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+    6428:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; lh r25, r26 }
+    6430:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    6438:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; lhadd r15, r16, 5 }
+    6440:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+    6448:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+    6450:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+    6458:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 }
+    6460:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mz r15, r16, r17 }
+    6468:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 }
+    6470:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    6478:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    6480:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; prefetch r25 }
+    6488:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    6490:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    6498:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    64a0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    64a8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    64b0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; seqih r15, r16, 5 }
+    64b8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 }
+    64c0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shadd r15, r16, 5 }
+    64c8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    64d0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    64d8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    64e0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slte r15, r16, r17 }
+    64e8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    64f0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sltih_u r15, r16, 5 }
+    64f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 }
+    6500:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    6508:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    6510:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    6518:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 }
+    6520:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    6528:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    6530:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lh r25, r26 }
+    6538:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+    6540:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lb r15, r16 }
+    6548:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 }
+    6550:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 }
+    6558:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    6560:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lh r15, r16 }
+    6568:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    6570:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 }
+    6578:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    6580:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lnk r15 }
+    6588:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    6590:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; lw_na r15, r16 }
+    6598:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    65a0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+    65a8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mzh r15, r16, r17 }
+    65b0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; nor r15, r16, r17 }
+    65b8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 }
+    65c0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    65c8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 }
+    65d0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    65d8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+    65e0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sb r25, r26 }
+    65e8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    65f0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+    65f8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 }
+    6600:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 }
+    6608:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    6610:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shli r15, r16, 5 }
+    6618:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+    6620:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    6628:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    6630:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    6638:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    6640:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sra r15, r16, r17 }
+    6648:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    6650:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; movei r15, 5 ; sw r25, r26 }
+    6658:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    6660:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+    6668:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 }
+    6670:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; lh_u r15, r16 }
+    6678:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; mnzb r15, r16, r17 }
+    6680:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; rl r15, r16, r17 }
+    6688:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; shlih r15, r16, 5 }
+    6690:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; slti_u r15, r16, 5 }
+    6698:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; sw r15, r16 }
+    66a0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+    66a8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    66b0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lb_u r25, r26 }
+    66b8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; info 19 ; lb r25, r26 }
+    66c0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; jrp r15 }
+    66c8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    66d0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lb_u r15, r16 }
+    66d8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    66e0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    66e8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    66f0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lh_u r15, r16 }
+    66f8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    6700:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    6708:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    6710:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; lw r25, r26 }
+    6718:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    6720:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+    6728:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; mzb r15, r16, r17 }
+    6730:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    6738:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+    6740:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    6748:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    6750:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+    6758:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    6760:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 }
+    6768:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    6770:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    6778:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sh r15, r16 }
+    6780:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    6788:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    6790:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+    6798:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    67a0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+    67a8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    67b0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    67b8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    67c0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+    67c8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    67d0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    67d8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    67e0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    67e8:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; flush r15 }
+    67f0:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; lh r15, r16 }
+    67f8:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; mnz r15, r16, r17 }
+    6800:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; raise }
+    6808:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; shlib r15, r16, 5 }
+    6810:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; slti r15, r16, 5 }
+    6818:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; subs r15, r16, r17 }
+    6820:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; auli r15, r16, 4660 }
+    6828:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; lb_u r15, r16 }
+    6830:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; minib_u r15, r16, 5 }
+    6838:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; packhs r15, r16, r17 }
+    6840:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; shlb r15, r16, r17 }
+    6848:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; slteh_u r15, r16, r17 }
+    6850:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; subbs_u r15, r16, r17 }
+    6858:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; adds r15, r16, r17 }
+    6860:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; jr r15 }
+    6868:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; mfspr r16, 5 }
+    6870:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; ori r15, r16, 5 }
+    6878:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; sh r15, r16 }
+    6880:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; slteb r15, r16, r17 }
+    6888:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; sraih r15, r16, 5 }
+    6890:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; addih r15, r16, 5 }
+    6898:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; iret }
+    68a0:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; maxib_u r15, r16, 5 }
+    68a8:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; nop }
+    68b0:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; seqi r15, r16, 5 }
+    68b8:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; sltb_u r15, r16, r17 }
+    68c0:	[0-9a-f]* 	{ mulhl_us r5, r6, r7 ; srah r15, r16, r17 }
+    68c8:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; addhs r15, r16, r17 }
+    68d0:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; intlb r15, r16, r17 }
+    68d8:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    68e0:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; mz r15, r16, r17 }
+    68e8:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; seq r15, r16, r17 }
+    68f0:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; slt r15, r16, r17 }
+    68f8:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; sneh r15, r16, r17 }
+    6900:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; addb r15, r16, r17 }
+    6908:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; infol 4660 }
+    6910:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; lw r15, r16 }
+    6918:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; moveli r15, 4660 }
+    6920:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; s3a r15, r16, r17 }
+    6928:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; shri r15, r16, 5 }
+    6930:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; sltih_u r15, r16, 5 }
+    6938:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; xor r15, r16, r17 }
+    6940:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; icoh r15 }
+    6948:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; lhadd r15, r16, 5 }
+    6950:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; mnzh r15, r16, r17 }
+    6958:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; rli r15, r16, 5 }
+    6960:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; shr r15, r16, r17 }
+    6968:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; sltib r15, r16, 5 }
+    6970:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; swadd r15, r16, 5 }
+    6978:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; finv r15 }
+    6980:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    6988:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+    6990:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; prefetch r15 }
+    6998:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; shli r15, r16, 5 }
+    69a0:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; slth_u r15, r16, r17 }
+    69a8:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; subhs r15, r16, r17 }
+    69b0:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; andi r15, r16, 5 }
+    69b8:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; lb r15, r16 }
+    69c0:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; minh r15, r16, r17 }
+    69c8:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; packhb r15, r16, r17 }
+    69d0:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; shl r15, r16, r17 }
+    69d8:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; slteh r15, r16, r17 }
+    69e0:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; subb r15, r16, r17 }
+    69e8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 }
+    69f0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    69f8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; auli r15, r16, 4660 }
+    6a00:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ill ; prefetch r25 }
+    6a08:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; inv r15 }
+    6a10:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; or r15, r16, r17 ; lb r25, r26 }
+    6a18:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 }
+    6a20:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    6a28:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    6a30:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    6a38:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 }
+    6a40:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    6a48:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    6a50:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    6a58:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    6a60:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    6a68:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    6a70:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    6a78:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    6a80:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    6a88:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    6a90:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+    6a98:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 }
+    6aa0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 }
+    6aa8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 }
+    6ab0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; sb r25, r26 }
+    6ab8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sbadd r15, r16, 5 }
+    6ac0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    6ac8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    6ad0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    6ad8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    6ae0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shrh r15, r16, r17 }
+    6ae8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    6af0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+    6af8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slth_u r15, r16, r17 }
+    6b00:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slti_u r15, r16, 5 }
+    6b08:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 }
+    6b10:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sraih r15, r16, 5 }
+    6b18:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 }
+    6b20:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+    6b28:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+    6b30:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; addbs_u r15, r16, r17 }
+    6b38:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    6b40:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; finv r15 }
+    6b48:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ill ; sh r25, r26 }
+    6b50:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; jalr r15 }
+    6b58:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 }
+    6b60:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    6b68:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    6b70:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    6b78:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    6b80:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    6b88:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    6b90:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    6b98:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    6ba0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    6ba8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 }
+    6bb0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+    6bb8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+    6bc0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    6bc8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    6bd0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    6bd8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    6be0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    6be8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    6bf0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+    6bf8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 }
+    6c00:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    6c08:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seqi r15, r16, 5 }
+    6c10:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    6c18:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    6c20:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    6c28:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 }
+    6c30:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt r15, r16, r17 }
+    6c38:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 }
+    6c40:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    6c48:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sltib_u r15, r16, 5 }
+    6c50:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    6c58:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    6c60:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; ill ; sw r25, r26 }
+    6c68:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    6c70:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+    6c78:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; auli r15, r16, 4660 }
+    6c80:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; lb_u r15, r16 }
+    6c88:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; minib_u r15, r16, 5 }
+    6c90:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; packhs r15, r16, r17 }
+    6c98:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; shlb r15, r16, r17 }
+    6ca0:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; slteh_u r15, r16, r17 }
+    6ca8:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; subbs_u r15, r16, r17 }
+    6cb0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; addb r15, r16, r17 }
+    6cb8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    6cc0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; dtlbpr r15 }
+    6cc8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ill ; sb r25, r26 }
+    6cd0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; iret }
+    6cd8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    6ce0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    6ce8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    6cf0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    6cf8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 }
+    6d00:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 }
+    6d08:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    6d10:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    6d18:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 }
+    6d20:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    6d28:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    6d30:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; move r15, r16 }
+    6d38:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    6d40:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    6d48:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    6d50:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    6d58:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    6d60:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    6d68:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    6d70:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sb r15, r16 }
+    6d78:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    6d80:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+    6d88:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    6d90:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    6d98:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    6da0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    6da8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    6db0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    6db8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+    6dc0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    6dc8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sltib r15, r16, 5 }
+    6dd0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    6dd8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    6de0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sw r25, r26 }
+    6de8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+    6df0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    6df8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; addh r15, r16, r17 }
+    6e00:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    6e08:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; flush r15 }
+    6e10:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; ill ; sw r25, r26 }
+    6e18:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; jalrp r15 }
+    6e20:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    6e28:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 }
+    6e30:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    6e38:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; lb_u r25, r26 }
+    6e40:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+    6e48:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+    6e50:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    6e58:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; lh_u r25, r26 }
+    6e60:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    6e68:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    6e70:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    6e78:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    6e80:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+    6e88:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+    6e90:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 }
+    6e98:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; nop ; prefetch r25 }
+    6ea0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    6ea8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+    6eb0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    6eb8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 }
+    6ec0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 }
+    6ec8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    6ed0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seqib r15, r16, 5 }
+    6ed8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 }
+    6ee0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sh r25, r26 }
+    6ee8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    6ef0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    6ef8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    6f00:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    6f08:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    6f10:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sltih r15, r16, 5 }
+    6f18:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    6f20:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    6f28:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; info 19 ; sw r25, r26 }
+    6f30:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    6f38:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    6f40:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; dtlbpr r15 }
+    6f48:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; lbadd r15, r16, 5 }
+    6f50:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; minih r15, r16, 5 }
+    6f58:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; packlb r15, r16, r17 }
+    6f60:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; shlh r15, r16, r17 }
+    6f68:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; slth r15, r16, r17 }
+    6f70:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; subh r15, r16, r17 }
+    6f78:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; addbs_u r15, r16, r17 }
+    6f80:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    6f88:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; finv r15 }
+    6f90:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ill ; sh r25, r26 }
+    6f98:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; jalr r15 }
+    6fa0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; lb r25, r26 }
+    6fa8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    6fb0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    6fb8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    6fc0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    6fc8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    6fd0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    6fd8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    6fe0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    6fe8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    6ff0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 }
+    6ff8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+    7000:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+    7008:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    7010:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    7018:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    7020:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    7028:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    7030:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    7038:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+    7040:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 }
+    7048:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    7050:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; seqi r15, r16, 5 }
+    7058:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    7060:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    7068:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    7070:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 }
+    7078:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt r15, r16, r17 }
+    7080:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 }
+    7088:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    7090:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sltib_u r15, r16, 5 }
+    7098:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    70a0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    70a8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ill ; sw r25, r26 }
+    70b0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    70b8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+    70c0:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; auli r15, r16, 4660 }
+    70c8:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; lb_u r15, r16 }
+    70d0:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; minib_u r15, r16, 5 }
+    70d8:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; packhs r15, r16, r17 }
+    70e0:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; shlb r15, r16, r17 }
+    70e8:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; slteh_u r15, r16, r17 }
+    70f0:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; subbs_u r15, r16, r17 }
+    70f8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; addb r15, r16, r17 }
+    7100:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    7108:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; dtlbpr r15 }
+    7110:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; ill ; sb r25, r26 }
+    7118:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; iret }
+    7120:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    7128:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    7130:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    7138:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    7140:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 }
+    7148:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 }
+    7150:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    7158:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    7160:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 }
+    7168:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    7170:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    7178:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; move r15, r16 }
+    7180:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    7188:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    7190:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    7198:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    71a0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    71a8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    71b0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    71b8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sb r15, r16 }
+    71c0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    71c8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+    71d0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    71d8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    71e0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    71e8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    71f0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    71f8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    7200:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+    7208:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    7210:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sltib r15, r16, 5 }
+    7218:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    7220:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    7228:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; sw r25, r26 }
+    7230:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+    7238:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    7240:	[0-9a-f]* 	{ mvz r5, r6, r7 ; addh r15, r16, r17 }
+    7248:	[0-9a-f]* 	{ mvz r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    7250:	[0-9a-f]* 	{ mvz r5, r6, r7 ; flush r15 }
+    7258:	[0-9a-f]* 	{ mvz r5, r6, r7 ; ill ; sw r25, r26 }
+    7260:	[0-9a-f]* 	{ mvz r5, r6, r7 ; jalrp r15 }
+    7268:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    7270:	[0-9a-f]* 	{ mvz r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 }
+    7278:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    7280:	[0-9a-f]* 	{ mvz r5, r6, r7 ; lb_u r25, r26 }
+    7288:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+    7290:	[0-9a-f]* 	{ mvz r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+    7298:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    72a0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; lh_u r25, r26 }
+    72a8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    72b0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    72b8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    72c0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    72c8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+    72d0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+    72d8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 }
+    72e0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nop ; prefetch r25 }
+    72e8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    72f0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+    72f8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    7300:	[0-9a-f]* 	{ mvz r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 }
+    7308:	[0-9a-f]* 	{ mvz r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 }
+    7310:	[0-9a-f]* 	{ mvz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    7318:	[0-9a-f]* 	{ mvz r5, r6, r7 ; seqib r15, r16, 5 }
+    7320:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 }
+    7328:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sh r25, r26 }
+    7330:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    7338:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+    7340:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    7348:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    7350:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    7358:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sltih r15, r16, 5 }
+    7360:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    7368:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+    7370:	[0-9a-f]* 	{ mvz r5, r6, r7 ; info 19 ; sw r25, r26 }
+    7378:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    7380:	[0-9a-f]* 	{ mvz r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    7388:	[0-9a-f]* 	{ mz r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 }
+    7390:	[0-9a-f]* 	{ mz r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 }
+    7398:	[0-9a-f]* 	{ bitx r5, r6 ; mz r15, r16, r17 ; lb r25, r26 }
+    73a0:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; lb r25, r26 }
+    73a8:	[0-9a-f]* 	{ ctz r5, r6 ; mz r15, r16, r17 ; sw r25, r26 }
+    73b0:	[0-9a-f]* 	{ mz r15, r16, r17 ; info 19 ; sh r25, r26 }
+    73b8:	[0-9a-f]* 	{ mz r15, r16, r17 ; movei r5, 5 ; lb r25, r26 }
+    73c0:	[0-9a-f]* 	{ mz r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 }
+    73c8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; lb r25, r26 }
+    73d0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lb_u r25, r26 }
+    73d8:	[0-9a-f]* 	{ mz r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 }
+    73e0:	[0-9a-f]* 	{ mz r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    73e8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    73f0:	[0-9a-f]* 	{ mz r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 }
+    73f8:	[0-9a-f]* 	{ mz r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 }
+    7400:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    7408:	[0-9a-f]* 	{ mz r15, r16, r17 ; slt r5, r6, r7 ; lh_u r25, r26 }
+    7410:	[0-9a-f]* 	{ bitx r5, r6 ; mz r15, r16, r17 ; lw r25, r26 }
+    7418:	[0-9a-f]* 	{ mz r15, r16, r17 ; mz r5, r6, r7 ; lw r25, r26 }
+    7420:	[0-9a-f]* 	{ mz r15, r16, r17 ; slte_u r5, r6, r7 ; lw r25, r26 }
+    7428:	[0-9a-f]* 	{ mz r15, r16, r17 ; minih r5, r6, 5 }
+    7430:	[0-9a-f]* 	{ mz r15, r16, r17 ; move r5, r6 ; sb r25, r26 }
+    7438:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 }
+    7440:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    7448:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; mz r15, r16, r17 }
+    7450:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    7458:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    7460:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+    7468:	[0-9a-f]* 	{ mz r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+    7470:	[0-9a-f]* 	{ mz r15, r16, r17 ; nop ; sw r25, r26 }
+    7478:	[0-9a-f]* 	{ mz r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 }
+    7480:	[0-9a-f]* 	{ pcnt r5, r6 ; mz r15, r16, r17 ; lw r25, r26 }
+    7488:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    7490:	[0-9a-f]* 	{ mz r15, r16, r17 ; s3a r5, r6, r7 ; prefetch r25 }
+    7498:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    74a0:	[0-9a-f]* 	{ mz r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 }
+    74a8:	[0-9a-f]* 	{ mz r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+    74b0:	[0-9a-f]* 	{ mz r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 }
+    74b8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    74c0:	[0-9a-f]* 	{ mz r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 }
+    74c8:	[0-9a-f]* 	{ mz r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+    74d0:	[0-9a-f]* 	{ mz r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 }
+    74d8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+    74e0:	[0-9a-f]* 	{ mz r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 }
+    74e8:	[0-9a-f]* 	{ mz r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 }
+    74f0:	[0-9a-f]* 	{ mz r15, r16, r17 ; shlih r5, r6, 5 }
+    74f8:	[0-9a-f]* 	{ mz r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 }
+    7500:	[0-9a-f]* 	{ mz r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 }
+    7508:	[0-9a-f]* 	{ mz r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    7510:	[0-9a-f]* 	{ mz r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 }
+    7518:	[0-9a-f]* 	{ mz r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    7520:	[0-9a-f]* 	{ mz r15, r16, r17 ; srah r5, r6, r7 }
+    7528:	[0-9a-f]* 	{ mz r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 }
+    7530:	[0-9a-f]* 	{ mz r15, r16, r17 ; movei r5, 5 ; sw r25, r26 }
+    7538:	[0-9a-f]* 	{ mz r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 }
+    7540:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; sw r25, r26 }
+    7548:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    7550:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    7558:	[0-9a-f]* 	{ mz r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+    7560:	[0-9a-f]* 	{ mz r5, r6, r7 ; addib r15, r16, 5 }
+    7568:	[0-9a-f]* 	{ mz r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    7570:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; lb r25, r26 }
+    7578:	[0-9a-f]* 	{ mz r5, r6, r7 ; infol 4660 }
+    7580:	[0-9a-f]* 	{ mz r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+    7588:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+    7590:	[0-9a-f]* 	{ mz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+    7598:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    75a0:	[0-9a-f]* 	{ mz r5, r6, r7 ; move r15, r16 ; lh r25, r26 }
+    75a8:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+    75b0:	[0-9a-f]* 	{ mz r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+    75b8:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    75c0:	[0-9a-f]* 	{ mz r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+    75c8:	[0-9a-f]* 	{ mz r5, r6, r7 ; slt_u r15, r16, r17 ; lw r25, r26 }
+    75d0:	[0-9a-f]* 	{ mz r5, r6, r7 ; minb_u r15, r16, r17 }
+    75d8:	[0-9a-f]* 	{ mz r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+    75e0:	[0-9a-f]* 	{ mz r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+    75e8:	[0-9a-f]* 	{ mz r5, r6, r7 ; nop ; sw r25, r26 }
+    75f0:	[0-9a-f]* 	{ mz r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 }
+    75f8:	[0-9a-f]* 	{ mz r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    7600:	[0-9a-f]* 	{ mz r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    7608:	[0-9a-f]* 	{ mz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    7610:	[0-9a-f]* 	{ mz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    7618:	[0-9a-f]* 	{ mz r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+    7620:	[0-9a-f]* 	{ mz r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    7628:	[0-9a-f]* 	{ mz r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    7630:	[0-9a-f]* 	{ mz r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 }
+    7638:	[0-9a-f]* 	{ mz r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    7640:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    7648:	[0-9a-f]* 	{ mz r5, r6, r7 ; shlb r15, r16, r17 }
+    7650:	[0-9a-f]* 	{ mz r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    7658:	[0-9a-f]* 	{ mz r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+    7660:	[0-9a-f]* 	{ mz r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+    7668:	[0-9a-f]* 	{ mz r5, r6, r7 ; slteb r15, r16, r17 }
+    7670:	[0-9a-f]* 	{ mz r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 }
+    7678:	[0-9a-f]* 	{ mz r5, r6, r7 ; sneb r15, r16, r17 }
+    7680:	[0-9a-f]* 	{ mz r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+    7688:	[0-9a-f]* 	{ mz r5, r6, r7 ; subs r15, r16, r17 }
+    7690:	[0-9a-f]* 	{ mz r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    7698:	[0-9a-f]* 	{ mz r5, r6, r7 ; swadd r15, r16, 5 }
+    76a0:	[0-9a-f]* 	{ mzb r15, r16, r17 ; addib r5, r6, 5 }
+    76a8:	[0-9a-f]* 	{ mzb r15, r16, r17 ; info 19 }
+    76b0:	[0-9a-f]* 	{ mzb r15, r16, r17 ; moveli r5, 4660 }
+    76b8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; mzb r15, r16, r17 }
+    76c0:	[0-9a-f]* 	{ mzb r15, r16, r17 ; rli r5, r6, 5 }
+    76c8:	[0-9a-f]* 	{ mzb r15, r16, r17 ; shlib r5, r6, 5 }
+    76d0:	[0-9a-f]* 	{ mzb r15, r16, r17 ; slti r5, r6, 5 }
+    76d8:	[0-9a-f]* 	{ mzb r15, r16, r17 ; subs r5, r6, r7 }
+    76e0:	[0-9a-f]* 	{ mzb r5, r6, r7 ; auli r15, r16, 4660 }
+    76e8:	[0-9a-f]* 	{ mzb r5, r6, r7 ; lb_u r15, r16 }
+    76f0:	[0-9a-f]* 	{ mzb r5, r6, r7 ; minib_u r15, r16, 5 }
+    76f8:	[0-9a-f]* 	{ mzb r5, r6, r7 ; packhs r15, r16, r17 }
+    7700:	[0-9a-f]* 	{ mzb r5, r6, r7 ; shlb r15, r16, r17 }
+    7708:	[0-9a-f]* 	{ mzb r5, r6, r7 ; slteh_u r15, r16, r17 }
+    7710:	[0-9a-f]* 	{ mzb r5, r6, r7 ; subbs_u r15, r16, r17 }
+    7718:	[0-9a-f]* 	{ mzh r15, r16, r17 ; adds r5, r6, r7 }
+    7720:	[0-9a-f]* 	{ mzh r15, r16, r17 ; intlb r5, r6, r7 }
+    7728:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; mzh r15, r16, r17 }
+    7730:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; mzh r15, r16, r17 }
+    7738:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; mzh r15, r16, r17 }
+    7740:	[0-9a-f]* 	{ mzh r15, r16, r17 ; shrh r5, r6, r7 }
+    7748:	[0-9a-f]* 	{ mzh r15, r16, r17 ; sltih r5, r6, 5 }
+    7750:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mzh r15, r16, r17 }
+    7758:	[0-9a-f]* 	{ mzh r5, r6, r7 }
+    7760:	[0-9a-f]* 	{ mzh r5, r6, r7 ; lh_u r15, r16 }
+    7768:	[0-9a-f]* 	{ mzh r5, r6, r7 ; mnzb r15, r16, r17 }
+    7770:	[0-9a-f]* 	{ mzh r5, r6, r7 ; rl r15, r16, r17 }
+    7778:	[0-9a-f]* 	{ mzh r5, r6, r7 ; shlih r15, r16, 5 }
+    7780:	[0-9a-f]* 	{ mzh r5, r6, r7 ; slti_u r15, r16, 5 }
+    7788:	[0-9a-f]* 	{ mzh r5, r6, r7 ; sw r15, r16 }
+    7790:	[0-9a-f]* 	{ nop ; add r5, r6, r7 ; lh_u r25, r26 }
+    7798:	[0-9a-f]* 	{ nop ; addi r15, r16, 5 ; prefetch r25 }
+    77a0:	[0-9a-f]* 	{ nop ; addli r5, r6, 4660 }
+    77a8:	[0-9a-f]* 	{ nop ; and r5, r6, r7 ; lh_u r25, r26 }
+    77b0:	[0-9a-f]* 	{ nop ; andi r5, r6, 5 ; lh_u r25, r26 }
+    77b8:	[0-9a-f]* 	{ bitx r5, r6 ; nop }
+    77c0:	[0-9a-f]* 	{ clz r5, r6 ; nop ; sw r25, r26 }
+    77c8:	[0-9a-f]* 	{ nop ; lb_u r25, r26 }
+    77d0:	[0-9a-f]* 	{ nop ; info 19 ; lb r25, r26 }
+    77d8:	[0-9a-f]* 	{ nop ; iret }
+    77e0:	[0-9a-f]* 	{ nop ; info 19 ; lb r25, r26 }
+    77e8:	[0-9a-f]* 	{ nop ; nop ; lb r25, r26 }
+    77f0:	[0-9a-f]* 	{ nop ; seqi r15, r16, 5 ; lb r25, r26 }
+    77f8:	[0-9a-f]* 	{ nop ; slti_u r15, r16, 5 ; lb r25, r26 }
+    7800:	[0-9a-f]* 	{ nop ; addi r15, r16, 5 ; lb_u r25, r26 }
+    7808:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nop ; lb_u r25, r26 }
+    7810:	[0-9a-f]* 	{ nop ; rl r15, r16, r17 ; lb_u r25, r26 }
+    7818:	[0-9a-f]* 	{ nop ; shri r15, r16, 5 ; lb_u r25, r26 }
+    7820:	[0-9a-f]* 	{ nop ; sub r15, r16, r17 ; lb_u r25, r26 }
+    7828:	[0-9a-f]* 	{ bitx r5, r6 ; nop ; lh r25, r26 }
+    7830:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; nop ; lh r25, r26 }
+    7838:	[0-9a-f]* 	{ nop ; s2a r15, r16, r17 ; lh r25, r26 }
+    7840:	[0-9a-f]* 	{ nop ; slte r15, r16, r17 ; lh r25, r26 }
+    7848:	[0-9a-f]* 	{ nop ; xor r15, r16, r17 ; lh r25, r26 }
+    7850:	[0-9a-f]* 	{ nop ; mnz r5, r6, r7 ; lh_u r25, r26 }
+    7858:	[0-9a-f]* 	{ nop ; nor r5, r6, r7 ; lh_u r25, r26 }
+    7860:	[0-9a-f]* 	{ nop ; shl r15, r16, r17 ; lh_u r25, r26 }
+    7868:	[0-9a-f]* 	{ nop ; sne r15, r16, r17 ; lh_u r25, r26 }
+    7870:	[0-9a-f]* 	{ nop ; add r5, r6, r7 ; lw r25, r26 }
+    7878:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; nop ; lw r25, r26 }
+    7880:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; lw r25, r26 }
+    7888:	[0-9a-f]* 	{ nop ; shr r5, r6, r7 ; lw r25, r26 }
+    7890:	[0-9a-f]* 	{ nop ; srai r5, r6, 5 ; lw r25, r26 }
+    7898:	[0-9a-f]* 	{ nop ; maxih r5, r6, 5 }
+    78a0:	[0-9a-f]* 	{ nop ; mnz r15, r16, r17 ; sh r25, r26 }
+    78a8:	[0-9a-f]* 	{ nop ; move r15, r16 ; lh_u r25, r26 }
+    78b0:	[0-9a-f]* 	{ nop ; movei r15, 5 ; lh_u r25, r26 }
+    78b8:	[0-9a-f]* 	{ nop ; moveli.sn r5, 4660 }
+    78c0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nop ; sh r25, r26 }
+    78c8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; nop ; sb r25, r26 }
+    78d0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nop ; sh r25, r26 }
+    78d8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; nop ; sb r25, r26 }
+    78e0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; nop ; prefetch r25 }
+    78e8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nop ; lw r25, r26 }
+    78f0:	[0-9a-f]* 	{ nop ; mz r5, r6, r7 ; lw r25, r26 }
+    78f8:	[0-9a-f]* 	{ nop ; nop }
+    7900:	[0-9a-f]* 	{ nop ; nor r5, r6, r7 }
+    7908:	[0-9a-f]* 	{ nop ; or r5, r6, r7 }
+    7910:	[0-9a-f]* 	{ nop ; ori r5, r6, 5 }
+    7918:	[0-9a-f]* 	{ nop ; add r15, r16, r17 ; prefetch r25 }
+    7920:	[0-9a-f]* 	{ nop ; movei r5, 5 ; prefetch r25 }
+    7928:	[0-9a-f]* 	{ nop ; ori r5, r6, 5 ; prefetch r25 }
+    7930:	[0-9a-f]* 	{ nop ; shr r15, r16, r17 ; prefetch r25 }
+    7938:	[0-9a-f]* 	{ nop ; srai r15, r16, 5 ; prefetch r25 }
+    7940:	[0-9a-f]* 	{ nop ; rl r15, r16, r17 ; sw r25, r26 }
+    7948:	[0-9a-f]* 	{ nop ; rli r15, r16, 5 ; sw r25, r26 }
+    7950:	[0-9a-f]* 	{ nop ; s1a r15, r16, r17 ; sw r25, r26 }
+    7958:	[0-9a-f]* 	{ nop ; s2a r15, r16, r17 ; sw r25, r26 }
+    7960:	[0-9a-f]* 	{ nop ; s3a r15, r16, r17 ; sw r25, r26 }
+    7968:	[0-9a-f]* 	{ nop ; add r5, r6, r7 ; sb r25, r26 }
+    7970:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; nop ; sb r25, r26 }
+    7978:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; sb r25, r26 }
+    7980:	[0-9a-f]* 	{ nop ; shr r5, r6, r7 ; sb r25, r26 }
+    7988:	[0-9a-f]* 	{ nop ; srai r5, r6, 5 ; sb r25, r26 }
+    7990:	[0-9a-f]* 	{ nop ; seq r15, r16, r17 }
+    7998:	[0-9a-f]* 	{ nop ; seqi r15, r16, 5 ; prefetch r25 }
+    79a0:	[0-9a-f]* 	{ nop ; add r15, r16, r17 ; sh r25, r26 }
+    79a8:	[0-9a-f]* 	{ nop ; movei r5, 5 ; sh r25, r26 }
+    79b0:	[0-9a-f]* 	{ nop ; ori r5, r6, 5 ; sh r25, r26 }
+    79b8:	[0-9a-f]* 	{ nop ; shr r15, r16, r17 ; sh r25, r26 }
+    79c0:	[0-9a-f]* 	{ nop ; srai r15, r16, 5 ; sh r25, r26 }
+    79c8:	[0-9a-f]* 	{ nop ; shl r15, r16, r17 ; sw r25, r26 }
+    79d0:	[0-9a-f]* 	{ nop ; shli r15, r16, 5 ; lw r25, r26 }
+    79d8:	[0-9a-f]* 	{ nop ; shr r15, r16, r17 ; lb r25, r26 }
+    79e0:	[0-9a-f]* 	{ nop ; shrb r15, r16, r17 }
+    79e8:	[0-9a-f]* 	{ nop ; shri r5, r6, 5 ; sb r25, r26 }
+    79f0:	[0-9a-f]* 	{ nop ; slt r5, r6, r7 ; lh r25, r26 }
+    79f8:	[0-9a-f]* 	{ nop ; slt_u r5, r6, r7 ; lh r25, r26 }
+    7a00:	[0-9a-f]* 	{ nop ; slte r15, r16, r17 ; sw r25, r26 }
+    7a08:	[0-9a-f]* 	{ nop ; slte_u r15, r16, r17 ; sw r25, r26 }
+    7a10:	[0-9a-f]* 	{ nop ; slth r15, r16, r17 }
+    7a18:	[0-9a-f]* 	{ nop ; slti r5, r6, 5 ; sb r25, r26 }
+    7a20:	[0-9a-f]* 	{ nop ; slti_u r5, r6, 5 ; sb r25, r26 }
+    7a28:	[0-9a-f]* 	{ nop ; sne r15, r16, r17 ; sw r25, r26 }
+    7a30:	[0-9a-f]* 	{ nop ; sra r15, r16, r17 ; lw r25, r26 }
+    7a38:	[0-9a-f]* 	{ nop ; srai r15, r16, 5 ; lb r25, r26 }
+    7a40:	[0-9a-f]* 	{ nop ; sraib r15, r16, 5 }
+    7a48:	[0-9a-f]* 	{ nop ; sub r5, r6, r7 ; sb r25, r26 }
+    7a50:	[0-9a-f]* 	{ nop ; and r5, r6, r7 ; sw r25, r26 }
+    7a58:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nop ; sw r25, r26 }
+    7a60:	[0-9a-f]* 	{ nop ; rli r5, r6, 5 ; sw r25, r26 }
+    7a68:	[0-9a-f]* 	{ nop ; slt r5, r6, r7 ; sw r25, r26 }
+    7a70:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nop ; sw r25, r26 }
+    7a78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nop }
+    7a80:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nop }
+    7a88:	[0-9a-f]* 	{ nop ; xor r15, r16, r17 ; sh r25, r26 }
+    7a90:	[0-9a-f]* 	{ nor r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
+    7a98:	[0-9a-f]* 	{ nor r15, r16, r17 ; addih r5, r6, 5 }
+    7aa0:	[0-9a-f]* 	{ nor r15, r16, r17 ; andi r5, r6, 5 ; lw r25, r26 }
+    7aa8:	[0-9a-f]* 	{ bytex r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    7ab0:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; nor r15, r16, r17 }
+    7ab8:	[0-9a-f]* 	{ nor r15, r16, r17 ; sw r25, r26 }
+    7ac0:	[0-9a-f]* 	{ nor r15, r16, r17 ; andi r5, r6, 5 ; lb r25, r26 }
+    7ac8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    7ad0:	[0-9a-f]* 	{ nor r15, r16, r17 ; slte r5, r6, r7 ; lb r25, r26 }
+    7ad8:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    7ae0:	[0-9a-f]* 	{ nor r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    7ae8:	[0-9a-f]* 	{ nor r15, r16, r17 ; slti_u r5, r6, 5 ; lb_u r25, r26 }
+    7af0:	[0-9a-f]* 	{ nor r15, r16, r17 ; info 19 ; lh r25, r26 }
+    7af8:	[0-9a-f]* 	{ pcnt r5, r6 ; nor r15, r16, r17 ; lh r25, r26 }
+    7b00:	[0-9a-f]* 	{ nor r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 }
+    7b08:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; lh_u r25, r26 }
+    7b10:	[0-9a-f]* 	{ nor r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    7b18:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    7b20:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    7b28:	[0-9a-f]* 	{ nor r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+    7b30:	[0-9a-f]* 	{ nor r15, r16, r17 ; xor r5, r6, r7 ; lw r25, r26 }
+    7b38:	[0-9a-f]* 	{ nor r15, r16, r17 ; mnz r5, r6, r7 }
+    7b40:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; sh r25, r26 }
+    7b48:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    7b50:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    7b58:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    7b60:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    7b68:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; nor r15, r16, r17 ; lh r25, r26 }
+    7b70:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    7b78:	[0-9a-f]* 	{ nor r15, r16, r17 ; mzh r5, r6, r7 }
+    7b80:	[0-9a-f]* 	{ nor r15, r16, r17 ; nor r5, r6, r7 }
+    7b88:	[0-9a-f]* 	{ nor r15, r16, r17 ; ori r5, r6, 5 }
+    7b90:	[0-9a-f]* 	{ bytex r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    7b98:	[0-9a-f]* 	{ nor r15, r16, r17 ; nop ; prefetch r25 }
+    7ba0:	[0-9a-f]* 	{ nor r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 }
+    7ba8:	[0-9a-f]* 	{ nor r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 }
+    7bb0:	[0-9a-f]* 	{ nor r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 }
+    7bb8:	[0-9a-f]* 	{ nor r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+    7bc0:	[0-9a-f]* 	{ nor r15, r16, r17 ; movei r5, 5 ; sb r25, r26 }
+    7bc8:	[0-9a-f]* 	{ nor r15, r16, r17 ; s1a r5, r6, r7 ; sb r25, r26 }
+    7bd0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; sb r25, r26 }
+    7bd8:	[0-9a-f]* 	{ nor r15, r16, r17 ; seqi r5, r6, 5 ; lh_u r25, r26 }
+    7be0:	[0-9a-f]* 	{ nor r15, r16, r17 ; move r5, r6 ; sh r25, r26 }
+    7be8:	[0-9a-f]* 	{ nor r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 }
+    7bf0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; sh r25, r26 }
+    7bf8:	[0-9a-f]* 	{ nor r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 }
+    7c00:	[0-9a-f]* 	{ nor r15, r16, r17 ; shrb r5, r6, r7 }
+    7c08:	[0-9a-f]* 	{ nor r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 }
+    7c10:	[0-9a-f]* 	{ nor r15, r16, r17 ; slte r5, r6, r7 ; lw r25, r26 }
+    7c18:	[0-9a-f]* 	{ nor r15, r16, r17 ; slth r5, r6, r7 }
+    7c20:	[0-9a-f]* 	{ nor r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    7c28:	[0-9a-f]* 	{ nor r15, r16, r17 ; sra r5, r6, r7 ; lh r25, r26 }
+    7c30:	[0-9a-f]* 	{ nor r15, r16, r17 ; sraib r5, r6, 5 }
+    7c38:	[0-9a-f]* 	{ nor r15, r16, r17 ; andi r5, r6, 5 ; sw r25, r26 }
+    7c40:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    7c48:	[0-9a-f]* 	{ nor r15, r16, r17 ; slte r5, r6, r7 ; sw r25, r26 }
+    7c50:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nor r15, r16, r17 ; sb r25, r26 }
+    7c58:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; sb r25, r26 }
+    7c60:	[0-9a-f]* 	{ nor r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    7c68:	[0-9a-f]* 	{ nor r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 }
+    7c70:	[0-9a-f]* 	{ nor r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    7c78:	[0-9a-f]* 	{ nor r5, r6, r7 ; lh r25, r26 }
+    7c80:	[0-9a-f]* 	{ nor r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+    7c88:	[0-9a-f]* 	{ nor r5, r6, r7 ; lb r15, r16 }
+    7c90:	[0-9a-f]* 	{ nor r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 }
+    7c98:	[0-9a-f]* 	{ nor r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 }
+    7ca0:	[0-9a-f]* 	{ nor r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    7ca8:	[0-9a-f]* 	{ nor r5, r6, r7 ; lh r15, r16 }
+    7cb0:	[0-9a-f]* 	{ nor r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    7cb8:	[0-9a-f]* 	{ nor r5, r6, r7 ; add r15, r16, r17 ; lh_u r25, r26 }
+    7cc0:	[0-9a-f]* 	{ nor r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    7cc8:	[0-9a-f]* 	{ nor r5, r6, r7 ; lnk r15 }
+    7cd0:	[0-9a-f]* 	{ nor r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    7cd8:	[0-9a-f]* 	{ nor r5, r6, r7 ; lw_na r15, r16 }
+    7ce0:	[0-9a-f]* 	{ nor r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    7ce8:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+    7cf0:	[0-9a-f]* 	{ nor r5, r6, r7 ; mzh r15, r16, r17 }
+    7cf8:	[0-9a-f]* 	{ nor r5, r6, r7 ; nor r15, r16, r17 }
+    7d00:	[0-9a-f]* 	{ nor r5, r6, r7 ; ori r15, r16, 5 }
+    7d08:	[0-9a-f]* 	{ nor r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    7d10:	[0-9a-f]* 	{ nor r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 }
+    7d18:	[0-9a-f]* 	{ nor r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    7d20:	[0-9a-f]* 	{ nor r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+    7d28:	[0-9a-f]* 	{ nor r5, r6, r7 ; sb r25, r26 }
+    7d30:	[0-9a-f]* 	{ nor r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    7d38:	[0-9a-f]* 	{ nor r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+    7d40:	[0-9a-f]* 	{ nor r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 }
+    7d48:	[0-9a-f]* 	{ nor r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 }
+    7d50:	[0-9a-f]* 	{ nor r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    7d58:	[0-9a-f]* 	{ nor r5, r6, r7 ; shli r15, r16, 5 }
+    7d60:	[0-9a-f]* 	{ nor r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+    7d68:	[0-9a-f]* 	{ nor r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    7d70:	[0-9a-f]* 	{ nor r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    7d78:	[0-9a-f]* 	{ nor r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    7d80:	[0-9a-f]* 	{ nor r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    7d88:	[0-9a-f]* 	{ nor r5, r6, r7 ; sra r15, r16, r17 }
+    7d90:	[0-9a-f]* 	{ nor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    7d98:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; sw r25, r26 }
+    7da0:	[0-9a-f]* 	{ nor r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    7da8:	[0-9a-f]* 	{ nor r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+    7db0:	[0-9a-f]* 	{ or r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 }
+    7db8:	[0-9a-f]* 	{ or r15, r16, r17 ; and r5, r6, r7 ; sb r25, r26 }
+    7dc0:	[0-9a-f]* 	{ bitx r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 }
+    7dc8:	[0-9a-f]* 	{ clz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 }
+    7dd0:	[0-9a-f]* 	{ or r15, r16, r17 ; lb r25, r26 }
+    7dd8:	[0-9a-f]* 	{ or r15, r16, r17 ; infol 4660 }
+    7de0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; lb r25, r26 }
+    7de8:	[0-9a-f]* 	{ or r15, r16, r17 ; seq r5, r6, r7 ; lb r25, r26 }
+    7df0:	[0-9a-f]* 	{ or r15, r16, r17 ; xor r5, r6, r7 ; lb r25, r26 }
+    7df8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 }
+    7e00:	[0-9a-f]* 	{ or r15, r16, r17 ; shli r5, r6, 5 ; lb_u r25, r26 }
+    7e08:	[0-9a-f]* 	{ or r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 }
+    7e10:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    7e18:	[0-9a-f]* 	{ or r15, r16, r17 ; slt r5, r6, r7 ; lh r25, r26 }
+    7e20:	[0-9a-f]* 	{ bitx r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 }
+    7e28:	[0-9a-f]* 	{ or r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    7e30:	[0-9a-f]* 	{ or r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+    7e38:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; lw r25, r26 }
+    7e40:	[0-9a-f]* 	{ or r15, r16, r17 ; or r5, r6, r7 ; lw r25, r26 }
+    7e48:	[0-9a-f]* 	{ or r15, r16, r17 ; sne r5, r6, r7 ; lw r25, r26 }
+    7e50:	[0-9a-f]* 	{ or r15, r16, r17 ; mnz r5, r6, r7 ; lb_u r25, r26 }
+    7e58:	[0-9a-f]* 	{ or r15, r16, r17 ; move r5, r6 }
+    7e60:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; or r15, r16, r17 ; sh r25, r26 }
+    7e68:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    7e70:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; or r15, r16, r17 }
+    7e78:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    7e80:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    7e88:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; or r15, r16, r17 ; lh_u r25, r26 }
+    7e90:	[0-9a-f]* 	{ or r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+    7e98:	[0-9a-f]* 	{ or r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+    7ea0:	[0-9a-f]* 	{ or r15, r16, r17 ; ori r5, r6, 5 ; lb_u r25, r26 }
+    7ea8:	[0-9a-f]* 	{ pcnt r5, r6 ; or r15, r16, r17 ; sh r25, r26 }
+    7eb0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    7eb8:	[0-9a-f]* 	{ or r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+    7ec0:	[0-9a-f]* 	{ or r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 }
+    7ec8:	[0-9a-f]* 	{ or r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 }
+    7ed0:	[0-9a-f]* 	{ or r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+    7ed8:	[0-9a-f]* 	{ bitx r5, r6 ; or r15, r16, r17 ; sb r25, r26 }
+    7ee0:	[0-9a-f]* 	{ or r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+    7ee8:	[0-9a-f]* 	{ or r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    7ef0:	[0-9a-f]* 	{ or r15, r16, r17 ; seq r5, r6, r7 ; sh r25, r26 }
+    7ef8:	[0-9a-f]* 	{ or r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    7f00:	[0-9a-f]* 	{ mvz r5, r6, r7 ; or r15, r16, r17 ; sh r25, r26 }
+    7f08:	[0-9a-f]* 	{ or r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    7f10:	[0-9a-f]* 	{ or r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 }
+    7f18:	[0-9a-f]* 	{ or r15, r16, r17 ; shr r5, r6, r7 ; lh r25, r26 }
+    7f20:	[0-9a-f]* 	{ or r15, r16, r17 ; shrib r5, r6, 5 }
+    7f28:	[0-9a-f]* 	{ or r15, r16, r17 ; slt_u r5, r6, r7 ; sw r25, r26 }
+    7f30:	[0-9a-f]* 	{ or r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    7f38:	[0-9a-f]* 	{ or r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    7f40:	[0-9a-f]* 	{ or r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 }
+    7f48:	[0-9a-f]* 	{ or r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 }
+    7f50:	[0-9a-f]* 	{ or r15, r16, r17 ; subb r5, r6, r7 }
+    7f58:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 }
+    7f60:	[0-9a-f]* 	{ or r15, r16, r17 ; seq r5, r6, r7 ; sw r25, r26 }
+    7f68:	[0-9a-f]* 	{ or r15, r16, r17 ; xor r5, r6, r7 ; sw r25, r26 }
+    7f70:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; or r15, r16, r17 ; sw r25, r26 }
+    7f78:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; or r15, r16, r17 ; sw r25, r26 }
+    7f80:	[0-9a-f]* 	{ or r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 }
+    7f88:	[0-9a-f]* 	{ or r5, r6, r7 ; addli.sn r15, r16, 4660 }
+    7f90:	[0-9a-f]* 	{ or r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 }
+    7f98:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; lh_u r25, r26 }
+    7fa0:	[0-9a-f]* 	{ or r5, r6, r7 ; intlb r15, r16, r17 }
+    7fa8:	[0-9a-f]* 	{ or r5, r6, r7 ; nop ; lb r25, r26 }
+    7fb0:	[0-9a-f]* 	{ or r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 }
+    7fb8:	[0-9a-f]* 	{ or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    7fc0:	[0-9a-f]* 	{ or r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    7fc8:	[0-9a-f]* 	{ or r5, r6, r7 ; nop ; lh r25, r26 }
+    7fd0:	[0-9a-f]* 	{ or r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 }
+    7fd8:	[0-9a-f]* 	{ or r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    7fe0:	[0-9a-f]* 	{ or r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    7fe8:	[0-9a-f]* 	{ or r5, r6, r7 ; mz r15, r16, r17 ; lw r25, r26 }
+    7ff0:	[0-9a-f]* 	{ or r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    7ff8:	[0-9a-f]* 	{ or r5, r6, r7 ; minih r15, r16, 5 }
+    8000:	[0-9a-f]* 	{ or r5, r6, r7 ; move r15, r16 ; sb r25, r26 }
+    8008:	[0-9a-f]* 	{ or r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    8010:	[0-9a-f]* 	{ or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    8018:	[0-9a-f]* 	{ or r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    8020:	[0-9a-f]* 	{ or r5, r6, r7 ; info 19 ; prefetch r25 }
+    8028:	[0-9a-f]* 	{ or r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8030:	[0-9a-f]* 	{ or r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    8038:	[0-9a-f]* 	{ or r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 }
+    8040:	[0-9a-f]* 	{ or r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    8048:	[0-9a-f]* 	{ or r5, r6, r7 ; rli r15, r16, 5 ; sb r25, r26 }
+    8050:	[0-9a-f]* 	{ or r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 }
+    8058:	[0-9a-f]* 	{ or r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    8060:	[0-9a-f]* 	{ or r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 }
+    8068:	[0-9a-f]* 	{ or r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+    8070:	[0-9a-f]* 	{ or r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    8078:	[0-9a-f]* 	{ or r5, r6, r7 ; shr r15, r16, r17 }
+    8080:	[0-9a-f]* 	{ or r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8088:	[0-9a-f]* 	{ or r5, r6, r7 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    8090:	[0-9a-f]* 	{ or r5, r6, r7 ; slteh_u r15, r16, r17 }
+    8098:	[0-9a-f]* 	{ or r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    80a0:	[0-9a-f]* 	{ or r5, r6, r7 ; sra r15, r16, r17 ; lb_u r25, r26 }
+    80a8:	[0-9a-f]* 	{ or r5, r6, r7 ; srai r15, r16, 5 }
+    80b0:	[0-9a-f]* 	{ or r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+    80b8:	[0-9a-f]* 	{ or r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    80c0:	[0-9a-f]* 	{ or r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 }
+    80c8:	[0-9a-f]* 	{ ori r15, r16, 5 ; add r5, r6, r7 }
+    80d0:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; ori r15, r16, 5 }
+    80d8:	[0-9a-f]* 	{ ori r15, r16, 5 ; andi r5, r6, 5 ; sw r25, r26 }
+    80e0:	[0-9a-f]* 	{ bytex r5, r6 ; ori r15, r16, 5 ; prefetch r25 }
+    80e8:	[0-9a-f]* 	{ ctz r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    80f0:	[0-9a-f]* 	{ ori r15, r16, 5 ; info 19 ; lh r25, r26 }
+    80f8:	[0-9a-f]* 	{ ctz r5, r6 ; ori r15, r16, 5 ; lb r25, r26 }
+    8100:	[0-9a-f]* 	{ ori r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 }
+    8108:	[0-9a-f]* 	{ ori r15, r16, 5 ; sne r5, r6, r7 ; lb r25, r26 }
+    8110:	[0-9a-f]* 	{ ori r15, r16, 5 ; mnz r5, r6, r7 ; lb_u r25, r26 }
+    8118:	[0-9a-f]* 	{ ori r15, r16, 5 ; rl r5, r6, r7 ; lb_u r25, r26 }
+    8120:	[0-9a-f]* 	{ ori r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    8128:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 }
+    8130:	[0-9a-f]* 	{ ori r15, r16, 5 ; s2a r5, r6, r7 ; lh r25, r26 }
+    8138:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh r25, r26 }
+    8140:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    8148:	[0-9a-f]* 	{ ori r15, r16, 5 ; seqi r5, r6, 5 ; lh_u r25, r26 }
+    8150:	[0-9a-f]* 	{ ori r15, r16, 5 ; lh_u r25, r26 }
+    8158:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    8160:	[0-9a-f]* 	{ ori r15, r16, 5 ; shr r5, r6, r7 ; lw r25, r26 }
+    8168:	[0-9a-f]* 	{ ori r15, r16, 5 ; maxib_u r5, r6, 5 }
+    8170:	[0-9a-f]* 	{ ori r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 }
+    8178:	[0-9a-f]* 	{ ori r15, r16, 5 ; moveli.sn r5, 4660 }
+    8180:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+    8188:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    8190:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+    8198:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    81a0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 }
+    81a8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    81b0:	[0-9a-f]* 	{ ori r15, r16, 5 ; nop ; lh_u r25, r26 }
+    81b8:	[0-9a-f]* 	{ ori r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 }
+    81c0:	[0-9a-f]* 	{ ori r15, r16, 5 ; packlb r5, r6, r7 }
+    81c8:	[0-9a-f]* 	{ ori r15, r16, 5 ; info 19 ; prefetch r25 }
+    81d0:	[0-9a-f]* 	{ pcnt r5, r6 ; ori r15, r16, 5 ; prefetch r25 }
+    81d8:	[0-9a-f]* 	{ ori r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 }
+    81e0:	[0-9a-f]* 	{ ori r15, r16, 5 ; rli r5, r6, 5 ; lh r25, r26 }
+    81e8:	[0-9a-f]* 	{ ori r15, r16, 5 ; s2a r5, r6, r7 ; lh r25, r26 }
+    81f0:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; ori r15, r16, 5 }
+    81f8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 }
+    8200:	[0-9a-f]* 	{ ori r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+    8208:	[0-9a-f]* 	{ ori r15, r16, 5 ; sb r25, r26 }
+    8210:	[0-9a-f]* 	{ ori r15, r16, 5 ; seqi r5, r6, 5 ; sh r25, r26 }
+    8218:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    8220:	[0-9a-f]* 	{ ori r15, r16, 5 ; seq r5, r6, r7 ; sh r25, r26 }
+    8228:	[0-9a-f]* 	{ ori r15, r16, 5 ; xor r5, r6, r7 ; sh r25, r26 }
+    8230:	[0-9a-f]* 	{ ori r15, r16, 5 ; shli r5, r6, 5 ; sb r25, r26 }
+    8238:	[0-9a-f]* 	{ ori r15, r16, 5 ; shri r5, r6, 5 ; lh r25, r26 }
+    8240:	[0-9a-f]* 	{ ori r15, r16, 5 ; slt_u r5, r6, r7 ; lb r25, r26 }
+    8248:	[0-9a-f]* 	{ ori r15, r16, 5 ; slte r5, r6, r7 ; sw r25, r26 }
+    8250:	[0-9a-f]* 	{ ori r15, r16, 5 ; slti r5, r6, 5 ; lh r25, r26 }
+    8258:	[0-9a-f]* 	{ ori r15, r16, 5 ; sltih r5, r6, 5 }
+    8260:	[0-9a-f]* 	{ ori r15, r16, 5 ; sra r5, r6, r7 ; sb r25, r26 }
+    8268:	[0-9a-f]* 	{ ori r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 }
+    8270:	[0-9a-f]* 	{ ctz r5, r6 ; ori r15, r16, 5 ; sw r25, r26 }
+    8278:	[0-9a-f]* 	{ ori r15, r16, 5 ; or r5, r6, r7 ; sw r25, r26 }
+    8280:	[0-9a-f]* 	{ ori r15, r16, 5 ; sne r5, r6, r7 ; sw r25, r26 }
+    8288:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb r25, r26 }
+    8290:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; lb r25, r26 }
+    8298:	[0-9a-f]* 	{ ori r15, r16, 5 ; xori r5, r6, 5 }
+    82a0:	[0-9a-f]* 	{ ori r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    82a8:	[0-9a-f]* 	{ ori r5, r6, 5 ; andi r15, r16, 5 ; lb r25, r26 }
+    82b0:	[0-9a-f]* 	{ ori r5, r6, 5 ; sb r25, r26 }
+    82b8:	[0-9a-f]* 	{ ori r5, r6, 5 ; info 19 ; prefetch r25 }
+    82c0:	[0-9a-f]* 	{ ori r5, r6, 5 ; andi r15, r16, 5 ; lb r25, r26 }
+    82c8:	[0-9a-f]* 	{ ori r5, r6, 5 ; shli r15, r16, 5 ; lb r25, r26 }
+    82d0:	[0-9a-f]* 	{ ori r5, r6, 5 ; lb_u r25, r26 }
+    82d8:	[0-9a-f]* 	{ ori r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    82e0:	[0-9a-f]* 	{ ori r5, r6, 5 ; andi r15, r16, 5 ; lh r25, r26 }
+    82e8:	[0-9a-f]* 	{ ori r5, r6, 5 ; shli r15, r16, 5 ; lh r25, r26 }
+    82f0:	[0-9a-f]* 	{ ori r5, r6, 5 ; lh_u r25, r26 }
+    82f8:	[0-9a-f]* 	{ ori r5, r6, 5 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    8300:	[0-9a-f]* 	{ ori r5, r6, 5 ; and r15, r16, r17 ; lw r25, r26 }
+    8308:	[0-9a-f]* 	{ ori r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+    8310:	[0-9a-f]* 	{ ori r5, r6, 5 ; maxh r15, r16, r17 }
+    8318:	[0-9a-f]* 	{ ori r5, r6, 5 ; mnzb r15, r16, r17 }
+    8320:	[0-9a-f]* 	{ ori r5, r6, 5 ; movei r15, 5 ; sw r25, r26 }
+    8328:	[0-9a-f]* 	{ ori r5, r6, 5 ; nop ; lh_u r25, r26 }
+    8330:	[0-9a-f]* 	{ ori r5, r6, 5 ; or r15, r16, r17 ; lh_u r25, r26 }
+    8338:	[0-9a-f]* 	{ ori r5, r6, 5 ; packlb r15, r16, r17 }
+    8340:	[0-9a-f]* 	{ ori r5, r6, 5 ; s2a r15, r16, r17 ; prefetch r25 }
+    8348:	[0-9a-f]* 	{ ori r5, r6, 5 ; raise }
+    8350:	[0-9a-f]* 	{ ori r5, r6, 5 ; rli r15, r16, 5 }
+    8358:	[0-9a-f]* 	{ ori r5, r6, 5 ; s2a r15, r16, r17 }
+    8360:	[0-9a-f]* 	{ ori r5, r6, 5 ; move r15, r16 ; sb r25, r26 }
+    8368:	[0-9a-f]* 	{ ori r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 }
+    8370:	[0-9a-f]* 	{ ori r5, r6, 5 ; seq r15, r16, r17 }
+    8378:	[0-9a-f]* 	{ ori r5, r6, 5 ; sh r25, r26 }
+    8380:	[0-9a-f]* 	{ ori r5, r6, 5 ; shr r15, r16, r17 ; sh r25, r26 }
+    8388:	[0-9a-f]* 	{ ori r5, r6, 5 ; shl r15, r16, r17 ; prefetch r25 }
+    8390:	[0-9a-f]* 	{ ori r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    8398:	[0-9a-f]* 	{ ori r5, r6, 5 ; shri r15, r16, 5 }
+    83a0:	[0-9a-f]* 	{ ori r5, r6, 5 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    83a8:	[0-9a-f]* 	{ ori r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 }
+    83b0:	[0-9a-f]* 	{ ori r5, r6, 5 ; slti r15, r16, 5 }
+    83b8:	[0-9a-f]* 	{ ori r5, r6, 5 ; sne r15, r16, r17 ; prefetch r25 }
+    83c0:	[0-9a-f]* 	{ ori r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    83c8:	[0-9a-f]* 	{ ori r5, r6, 5 ; sub r15, r16, r17 }
+    83d0:	[0-9a-f]* 	{ ori r5, r6, 5 ; or r15, r16, r17 ; sw r25, r26 }
+    83d8:	[0-9a-f]* 	{ ori r5, r6, 5 ; sra r15, r16, r17 ; sw r25, r26 }
+    83e0:	[0-9a-f]* 	{ packbs_u r15, r16, r17 ; addb r5, r6, r7 }
+    83e8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; packbs_u r15, r16, r17 }
+    83f0:	[0-9a-f]* 	{ packbs_u r15, r16, r17 ; mnz r5, r6, r7 }
+    83f8:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; packbs_u r15, r16, r17 }
+    8400:	[0-9a-f]* 	{ packbs_u r15, r16, r17 ; packhb r5, r6, r7 }
+    8408:	[0-9a-f]* 	{ packbs_u r15, r16, r17 ; seqih r5, r6, 5 }
+    8410:	[0-9a-f]* 	{ packbs_u r15, r16, r17 ; slteb_u r5, r6, r7 }
+    8418:	[0-9a-f]* 	{ packbs_u r15, r16, r17 ; sub r5, r6, r7 }
+    8420:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; addli r15, r16, 4660 }
+    8428:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; jalr r15 }
+    8430:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; maxih r15, r16, 5 }
+    8438:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; nor r15, r16, r17 }
+    8440:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; seqib r15, r16, 5 }
+    8448:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; slte r15, r16, r17 }
+    8450:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; srai r15, r16, 5 }
+    8458:	[0-9a-f]* 	{ packhb r15, r16, r17 ; addi r5, r6, 5 }
+    8460:	[0-9a-f]* 	{ packhb r15, r16, r17 }
+    8468:	[0-9a-f]* 	{ packhb r15, r16, r17 ; movei r5, 5 }
+    8470:	[0-9a-f]* 	{ mulll_su r5, r6, r7 ; packhb r15, r16, r17 }
+    8478:	[0-9a-f]* 	{ packhb r15, r16, r17 ; rl r5, r6, r7 }
+    8480:	[0-9a-f]* 	{ packhb r15, r16, r17 ; shli r5, r6, 5 }
+    8488:	[0-9a-f]* 	{ packhb r15, r16, r17 ; slth_u r5, r6, r7 }
+    8490:	[0-9a-f]* 	{ packhb r15, r16, r17 ; subhs r5, r6, r7 }
+    8498:	[0-9a-f]* 	{ packhb r5, r6, r7 ; andi r15, r16, 5 }
+    84a0:	[0-9a-f]* 	{ packhb r5, r6, r7 ; lb r15, r16 }
+    84a8:	[0-9a-f]* 	{ packhb r5, r6, r7 ; minh r15, r16, r17 }
+    84b0:	[0-9a-f]* 	{ packhb r5, r6, r7 ; packhb r15, r16, r17 }
+    84b8:	[0-9a-f]* 	{ packhb r5, r6, r7 ; shl r15, r16, r17 }
+    84c0:	[0-9a-f]* 	{ packhb r5, r6, r7 ; slteh r15, r16, r17 }
+    84c8:	[0-9a-f]* 	{ packhb r5, r6, r7 ; subb r15, r16, r17 }
+    84d0:	[0-9a-f]* 	{ packhs r15, r16, r17 ; addli.sn r5, r6, 4660 }
+    84d8:	[0-9a-f]* 	{ packhs r15, r16, r17 ; inthh r5, r6, r7 }
+    84e0:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; packhs r15, r16, r17 }
+    84e8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; packhs r15, r16, r17 }
+    84f0:	[0-9a-f]* 	{ packhs r15, r16, r17 ; s3a r5, r6, r7 }
+    84f8:	[0-9a-f]* 	{ packhs r15, r16, r17 ; shrb r5, r6, r7 }
+    8500:	[0-9a-f]* 	{ packhs r15, r16, r17 ; sltib_u r5, r6, 5 }
+    8508:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; packhs r15, r16, r17 }
+    8510:	[0-9a-f]* 	{ packhs r5, r6, r7 ; flush r15 }
+    8518:	[0-9a-f]* 	{ packhs r5, r6, r7 ; lh r15, r16 }
+    8520:	[0-9a-f]* 	{ packhs r5, r6, r7 ; mnz r15, r16, r17 }
+    8528:	[0-9a-f]* 	{ packhs r5, r6, r7 ; raise }
+    8530:	[0-9a-f]* 	{ packhs r5, r6, r7 ; shlib r15, r16, 5 }
+    8538:	[0-9a-f]* 	{ packhs r5, r6, r7 ; slti r15, r16, 5 }
+    8540:	[0-9a-f]* 	{ packhs r5, r6, r7 ; subs r15, r16, r17 }
+    8548:	[0-9a-f]* 	{ packlb r15, r16, r17 ; and r5, r6, r7 }
+    8550:	[0-9a-f]* 	{ packlb r15, r16, r17 ; maxh r5, r6, r7 }
+    8558:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; packlb r15, r16, r17 }
+    8560:	[0-9a-f]* 	{ packlb r15, r16, r17 ; mz r5, r6, r7 }
+    8568:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; packlb r15, r16, r17 }
+    8570:	[0-9a-f]* 	{ packlb r15, r16, r17 ; shrih r5, r6, 5 }
+    8578:	[0-9a-f]* 	{ packlb r15, r16, r17 ; sneb r5, r6, r7 }
+    8580:	[0-9a-f]* 	{ packlb r5, r6, r7 ; add r15, r16, r17 }
+    8588:	[0-9a-f]* 	{ packlb r5, r6, r7 ; info 19 }
+    8590:	[0-9a-f]* 	{ packlb r5, r6, r7 ; lnk r15 }
+    8598:	[0-9a-f]* 	{ packlb r5, r6, r7 ; movei r15, 5 }
+    85a0:	[0-9a-f]* 	{ packlb r5, r6, r7 ; s2a r15, r16, r17 }
+    85a8:	[0-9a-f]* 	{ packlb r5, r6, r7 ; shrh r15, r16, r17 }
+    85b0:	[0-9a-f]* 	{ packlb r5, r6, r7 ; sltih r15, r16, 5 }
+    85b8:	[0-9a-f]* 	{ packlb r5, r6, r7 ; wh64 r15 }
+    85c0:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    85c8:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+    85d0:	[0-9a-f]* 	{ pcnt r5, r6 ; lw r25, r26 }
+    85d8:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; lh_u r25, r26 }
+    85e0:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; lb r25, r26 }
+    85e8:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 }
+    85f0:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; lb_u r25, r26 }
+    85f8:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    8600:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; lh r25, r26 }
+    8608:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; lh r25, r26 }
+    8610:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; lh_u r25, r26 }
+    8618:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    8620:	[0-9a-f]* 	{ pcnt r5, r6 ; add r15, r16, r17 ; lw r25, r26 }
+    8628:	[0-9a-f]* 	{ pcnt r5, r6 ; seq r15, r16, r17 ; lw r25, r26 }
+    8630:	[0-9a-f]* 	{ pcnt r5, r6 ; lwadd_na r15, r16, 5 }
+    8638:	[0-9a-f]* 	{ pcnt r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 }
+    8640:	[0-9a-f]* 	{ pcnt r5, r6 ; movei r15, 5 ; sb r25, r26 }
+    8648:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; lb_u r25, r26 }
+    8650:	[0-9a-f]* 	{ pcnt r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 }
+    8658:	[0-9a-f]* 	{ pcnt r5, r6 ; packhb r15, r16, r17 }
+    8660:	[0-9a-f]* 	{ pcnt r5, r6 ; rli r15, r16, 5 ; prefetch r25 }
+    8668:	[0-9a-f]* 	{ pcnt r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    8670:	[0-9a-f]* 	{ pcnt r5, r6 ; rli r15, r16, 5 ; sh r25, r26 }
+    8678:	[0-9a-f]* 	{ pcnt r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 }
+    8680:	[0-9a-f]* 	{ pcnt r5, r6 ; info 19 ; sb r25, r26 }
+    8688:	[0-9a-f]* 	{ pcnt r5, r6 ; slt r15, r16, r17 ; sb r25, r26 }
+    8690:	[0-9a-f]* 	{ pcnt r5, r6 ; seq r15, r16, r17 ; sh r25, r26 }
+    8698:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; sh r25, r26 }
+    86a0:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; sh r25, r26 }
+    86a8:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    86b0:	[0-9a-f]* 	{ pcnt r5, r6 ; shlih r15, r16, 5 }
+    86b8:	[0-9a-f]* 	{ pcnt r5, r6 ; shri r15, r16, 5 ; sh r25, r26 }
+    86c0:	[0-9a-f]* 	{ pcnt r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 }
+    86c8:	[0-9a-f]* 	{ pcnt r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    86d0:	[0-9a-f]* 	{ pcnt r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+    86d8:	[0-9a-f]* 	{ pcnt r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    86e0:	[0-9a-f]* 	{ pcnt r5, r6 ; srah r15, r16, r17 }
+    86e8:	[0-9a-f]* 	{ pcnt r5, r6 ; sub r15, r16, r17 ; sh r25, r26 }
+    86f0:	[0-9a-f]* 	{ pcnt r5, r6 ; nop ; sw r25, r26 }
+    86f8:	[0-9a-f]* 	{ pcnt r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    8700:	[0-9a-f]* 	{ pcnt r5, r6 ; xori r15, r16, 5 }
+    8708:	[0-9a-f]* 	{ bytex r5, r6 ; prefetch r15 }
+    8710:	[0-9a-f]* 	{ minih r5, r6, 5 ; prefetch r15 }
+    8718:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; prefetch r15 }
+    8720:	[0-9a-f]* 	{ ori r5, r6, 5 ; prefetch r15 }
+    8728:	[0-9a-f]* 	{ seqi r5, r6, 5 ; prefetch r15 }
+    8730:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; prefetch r15 }
+    8738:	[0-9a-f]* 	{ sraib r5, r6, 5 ; prefetch r15 }
+    8740:	[0-9a-f]* 	{ clz r5, r6 ; add r15, r16, r17 ; prefetch r25 }
+    8748:	[0-9a-f]* 	{ add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
+    8750:	[0-9a-f]* 	{ add r15, r16, r17 ; slti_u r5, r6, 5 ; prefetch r25 }
+    8758:	[0-9a-f]* 	{ add r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    8760:	[0-9a-f]* 	{ add r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    8768:	[0-9a-f]* 	{ addi r15, r16, 5 ; move r5, r6 ; prefetch r25 }
+    8770:	[0-9a-f]* 	{ addi r15, r16, 5 ; rli r5, r6, 5 ; prefetch r25 }
+    8778:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    8780:	[0-9a-f]* 	{ addi r5, r6, 5 ; ori r15, r16, 5 ; prefetch r25 }
+    8788:	[0-9a-f]* 	{ addi r5, r6, 5 ; srai r15, r16, 5 ; prefetch r25 }
+    8790:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    8798:	[0-9a-f]* 	{ and r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
+    87a0:	[0-9a-f]* 	{ and r15, r16, r17 ; prefetch r25 }
+    87a8:	[0-9a-f]* 	{ and r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 }
+    87b0:	[0-9a-f]* 	{ andi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
+    87b8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+    87c0:	[0-9a-f]* 	{ andi r15, r16, 5 ; slt r5, r6, r7 ; prefetch r25 }
+    87c8:	[0-9a-f]* 	{ andi r5, r6, 5 ; prefetch r25 }
+    87d0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shr r15, r16, r17 ; prefetch r25 }
+    87d8:	[0-9a-f]* 	{ bitx r5, r6 ; info 19 ; prefetch r25 }
+    87e0:	[0-9a-f]* 	{ bitx r5, r6 ; slt r15, r16, r17 ; prefetch r25 }
+    87e8:	[0-9a-f]* 	{ bytex r5, r6 ; move r15, r16 ; prefetch r25 }
+    87f0:	[0-9a-f]* 	{ bytex r5, r6 ; slte r15, r16, r17 ; prefetch r25 }
+    87f8:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    8800:	[0-9a-f]* 	{ clz r5, r6 ; slti r15, r16, 5 ; prefetch r25 }
+    8808:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    8810:	[0-9a-f]* 	{ ctz r5, r6 ; sne r15, r16, r17 ; prefetch r25 }
+    8818:	[0-9a-f]* 	{ info 19 ; prefetch r25 }
+    8820:	[0-9a-f]* 	{ nop ; prefetch r25 }
+    8828:	[0-9a-f]* 	{ seqi r15, r16, 5 ; prefetch r25 }
+    8830:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; prefetch r25 }
+    8838:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; prefetch r25 }
+    8840:	[0-9a-f]* 	{ mvz r5, r6, r7 ; ill ; prefetch r25 }
+    8848:	[0-9a-f]* 	{ slte r5, r6, r7 ; ill ; prefetch r25 }
+    8850:	[0-9a-f]* 	{ info 19 ; andi r15, r16, 5 ; prefetch r25 }
+    8858:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; info 19 ; prefetch r25 }
+    8860:	[0-9a-f]* 	{ info 19 ; s1a r15, r16, r17 ; prefetch r25 }
+    8868:	[0-9a-f]* 	{ info 19 ; slt_u r15, r16, r17 ; prefetch r25 }
+    8870:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; info 19 ; prefetch r25 }
+    8878:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    8880:	[0-9a-f]* 	{ mnz r15, r16, r17 ; seq r5, r6, r7 ; prefetch r25 }
+    8888:	[0-9a-f]* 	{ mnz r15, r16, r17 ; xor r5, r6, r7 ; prefetch r25 }
+    8890:	[0-9a-f]* 	{ mnz r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+    8898:	[0-9a-f]* 	{ move r15, r16 ; add r5, r6, r7 ; prefetch r25 }
+    88a0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    88a8:	[0-9a-f]* 	{ move r15, r16 ; shri r5, r6, 5 ; prefetch r25 }
+    88b0:	[0-9a-f]* 	{ move r5, r6 ; andi r15, r16, 5 ; prefetch r25 }
+    88b8:	[0-9a-f]* 	{ move r5, r6 ; shli r15, r16, 5 ; prefetch r25 }
+    88c0:	[0-9a-f]* 	{ bytex r5, r6 ; movei r15, 5 ; prefetch r25 }
+    88c8:	[0-9a-f]* 	{ movei r15, 5 ; nop ; prefetch r25 }
+    88d0:	[0-9a-f]* 	{ movei r15, 5 ; slti r5, r6, 5 ; prefetch r25 }
+    88d8:	[0-9a-f]* 	{ movei r5, 5 ; move r15, r16 ; prefetch r25 }
+    88e0:	[0-9a-f]* 	{ movei r5, 5 ; slte r15, r16, r17 ; prefetch r25 }
+    88e8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    88f0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    88f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+    8900:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; prefetch r25 }
+    8908:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    8910:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 }
+    8918:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    8920:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    8928:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+    8930:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 }
+    8938:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+    8940:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    8948:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    8950:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; prefetch r25 }
+    8958:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shr r15, r16, r17 ; prefetch r25 }
+    8960:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; info 19 ; prefetch r25 }
+    8968:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8970:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    8978:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+    8980:	[0-9a-f]* 	{ mvz r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    8988:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    8990:	[0-9a-f]* 	{ mz r15, r16, r17 ; movei r5, 5 ; prefetch r25 }
+    8998:	[0-9a-f]* 	{ mz r15, r16, r17 ; s1a r5, r6, r7 ; prefetch r25 }
+    89a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    89a8:	[0-9a-f]* 	{ mz r5, r6, r7 ; rl r15, r16, r17 ; prefetch r25 }
+    89b0:	[0-9a-f]* 	{ mz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    89b8:	[0-9a-f]* 	{ nop ; move r15, r16 ; prefetch r25 }
+    89c0:	[0-9a-f]* 	{ nop ; or r15, r16, r17 ; prefetch r25 }
+    89c8:	[0-9a-f]* 	{ nop ; shl r5, r6, r7 ; prefetch r25 }
+    89d0:	[0-9a-f]* 	{ nop ; sne r5, r6, r7 ; prefetch r25 }
+    89d8:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    89e0:	[0-9a-f]* 	{ nor r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 }
+    89e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; slti_u r5, r6, 5 ; prefetch r25 }
+    89f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    89f8:	[0-9a-f]* 	{ nor r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    8a00:	[0-9a-f]* 	{ or r15, r16, r17 ; move r5, r6 ; prefetch r25 }
+    8a08:	[0-9a-f]* 	{ or r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 }
+    8a10:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; or r15, r16, r17 ; prefetch r25 }
+    8a18:	[0-9a-f]* 	{ or r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    8a20:	[0-9a-f]* 	{ or r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 }
+    8a28:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+    8a30:	[0-9a-f]* 	{ ori r15, r16, 5 ; seqi r5, r6, 5 ; prefetch r25 }
+    8a38:	[0-9a-f]* 	{ ori r15, r16, 5 ; prefetch r25 }
+    8a40:	[0-9a-f]* 	{ ori r5, r6, 5 ; s3a r15, r16, r17 ; prefetch r25 }
+    8a48:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+    8a50:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; prefetch r25 }
+    8a58:	[0-9a-f]* 	{ rl r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+    8a60:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rl r15, r16, r17 ; prefetch r25 }
+    8a68:	[0-9a-f]* 	{ rl r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 }
+    8a70:	[0-9a-f]* 	{ rl r5, r6, r7 ; info 19 ; prefetch r25 }
+    8a78:	[0-9a-f]* 	{ rl r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8a80:	[0-9a-f]* 	{ rli r15, r16, 5 ; prefetch r25 }
+    8a88:	[0-9a-f]* 	{ rli r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 }
+    8a90:	[0-9a-f]* 	{ rli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    8a98:	[0-9a-f]* 	{ rli r5, r6, 5 ; nop ; prefetch r25 }
+    8aa0:	[0-9a-f]* 	{ rli r5, r6, 5 ; slti_u r15, r16, 5 ; prefetch r25 }
+    8aa8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    8ab0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+    8ab8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 }
+    8ac0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    8ac8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    8ad0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+    8ad8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    8ae0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    8ae8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    8af0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+    8af8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 }
+    8b00:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 }
+    8b08:	[0-9a-f]* 	{ s3a r5, r6, r7 ; info 19 ; prefetch r25 }
+    8b10:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8b18:	[0-9a-f]* 	{ seq r15, r16, r17 ; prefetch r25 }
+    8b20:	[0-9a-f]* 	{ seq r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    8b28:	[0-9a-f]* 	{ seq r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    8b30:	[0-9a-f]* 	{ seq r5, r6, r7 ; nop ; prefetch r25 }
+    8b38:	[0-9a-f]* 	{ seq r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    8b40:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    8b48:	[0-9a-f]* 	{ seqi r15, r16, 5 ; s2a r5, r6, r7 ; prefetch r25 }
+    8b50:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; seqi r15, r16, 5 ; prefetch r25 }
+    8b58:	[0-9a-f]* 	{ seqi r5, r6, 5 ; rli r15, r16, 5 ; prefetch r25 }
+    8b60:	[0-9a-f]* 	{ seqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 }
+    8b68:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    8b70:	[0-9a-f]* 	{ shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    8b78:	[0-9a-f]* 	{ shl r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    8b80:	[0-9a-f]* 	{ shl r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    8b88:	[0-9a-f]* 	{ shli r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    8b90:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    8b98:	[0-9a-f]* 	{ shli r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 }
+    8ba0:	[0-9a-f]* 	{ shli r5, r6, 5 ; info 19 ; prefetch r25 }
+    8ba8:	[0-9a-f]* 	{ shli r5, r6, 5 ; slt r15, r16, r17 ; prefetch r25 }
+    8bb0:	[0-9a-f]* 	{ shr r15, r16, r17 ; prefetch r25 }
+    8bb8:	[0-9a-f]* 	{ shr r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    8bc0:	[0-9a-f]* 	{ shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    8bc8:	[0-9a-f]* 	{ shr r5, r6, r7 ; nop ; prefetch r25 }
+    8bd0:	[0-9a-f]* 	{ shr r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    8bd8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+    8be0:	[0-9a-f]* 	{ shri r15, r16, 5 ; s2a r5, r6, r7 ; prefetch r25 }
+    8be8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shri r15, r16, 5 ; prefetch r25 }
+    8bf0:	[0-9a-f]* 	{ shri r5, r6, 5 ; rli r15, r16, 5 ; prefetch r25 }
+    8bf8:	[0-9a-f]* 	{ shri r5, r6, 5 ; xor r15, r16, r17 ; prefetch r25 }
+    8c00:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8c08:	[0-9a-f]* 	{ slt r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    8c10:	[0-9a-f]* 	{ slt r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    8c18:	[0-9a-f]* 	{ slt r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    8c20:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+    8c28:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 }
+    8c30:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 }
+    8c38:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; info 19 ; prefetch r25 }
+    8c40:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8c48:	[0-9a-f]* 	{ slte r15, r16, r17 ; prefetch r25 }
+    8c50:	[0-9a-f]* 	{ slte r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    8c58:	[0-9a-f]* 	{ slte r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    8c60:	[0-9a-f]* 	{ slte r5, r6, r7 ; nop ; prefetch r25 }
+    8c68:	[0-9a-f]* 	{ slte r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    8c70:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    8c78:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+    8c80:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 }
+    8c88:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    8c90:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    8c98:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    8ca0:	[0-9a-f]* 	{ slti r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    8ca8:	[0-9a-f]* 	{ slti r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    8cb0:	[0-9a-f]* 	{ slti r5, r6, 5 ; seqi r15, r16, 5 ; prefetch r25 }
+    8cb8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+    8cc0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    8cc8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 }
+    8cd0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; info 19 ; prefetch r25 }
+    8cd8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slt r15, r16, r17 ; prefetch r25 }
+    8ce0:	[0-9a-f]* 	{ sne r15, r16, r17 ; prefetch r25 }
+    8ce8:	[0-9a-f]* 	{ sne r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    8cf0:	[0-9a-f]* 	{ sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    8cf8:	[0-9a-f]* 	{ sne r5, r6, r7 ; nop ; prefetch r25 }
+    8d00:	[0-9a-f]* 	{ sne r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    8d08:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    8d10:	[0-9a-f]* 	{ sra r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+    8d18:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; prefetch r25 }
+    8d20:	[0-9a-f]* 	{ sra r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    8d28:	[0-9a-f]* 	{ sra r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    8d30:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 }
+    8d38:	[0-9a-f]* 	{ srai r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    8d40:	[0-9a-f]* 	{ srai r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+    8d48:	[0-9a-f]* 	{ srai r5, r6, 5 ; seqi r15, r16, 5 ; prefetch r25 }
+    8d50:	[0-9a-f]* 	{ sub r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 }
+    8d58:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    8d60:	[0-9a-f]* 	{ sub r15, r16, r17 ; slte r5, r6, r7 ; prefetch r25 }
+    8d68:	[0-9a-f]* 	{ sub r5, r6, r7 ; info 19 ; prefetch r25 }
+    8d70:	[0-9a-f]* 	{ sub r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    8d78:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; prefetch r25 }
+    8d80:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte r15, r16, r17 ; prefetch r25 }
+    8d88:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    8d90:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti r15, r16, 5 ; prefetch r25 }
+    8d98:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    8da0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sne r15, r16, r17 ; prefetch r25 }
+    8da8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; prefetch r25 }
+    8db0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; srai r15, r16, 5 ; prefetch r25 }
+    8db8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    8dc0:	[0-9a-f]* 	{ xor r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
+    8dc8:	[0-9a-f]* 	{ xor r15, r16, r17 ; prefetch r25 }
+    8dd0:	[0-9a-f]* 	{ xor r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 }
+    8dd8:	[0-9a-f]* 	{ addb r5, r6, r7 ; raise }
+    8de0:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; raise }
+    8de8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; raise }
+    8df0:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; raise }
+    8df8:	[0-9a-f]* 	{ packhb r5, r6, r7 ; raise }
+    8e00:	[0-9a-f]* 	{ seqih r5, r6, 5 ; raise }
+    8e08:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; raise }
+    8e10:	[0-9a-f]* 	{ sub r5, r6, r7 ; raise }
+    8e18:	[0-9a-f]* 	{ rl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    8e20:	[0-9a-f]* 	{ rl r15, r16, r17 ; adds r5, r6, r7 }
+    8e28:	[0-9a-f]* 	{ rl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    8e30:	[0-9a-f]* 	{ bytex r5, r6 ; rl r15, r16, r17 ; lw r25, r26 }
+    8e38:	[0-9a-f]* 	{ ctz r5, r6 ; rl r15, r16, r17 ; lh r25, r26 }
+    8e40:	[0-9a-f]* 	{ rl r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    8e48:	[0-9a-f]* 	{ clz r5, r6 ; rl r15, r16, r17 ; lb r25, r26 }
+    8e50:	[0-9a-f]* 	{ rl r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    8e58:	[0-9a-f]* 	{ rl r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    8e60:	[0-9a-f]* 	{ rl r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    8e68:	[0-9a-f]* 	{ pcnt r5, r6 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    8e70:	[0-9a-f]* 	{ rl r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    8e78:	[0-9a-f]* 	{ rl r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    8e80:	[0-9a-f]* 	{ rl r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    8e88:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rl r15, r16, r17 ; lh r25, r26 }
+    8e90:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    8e98:	[0-9a-f]* 	{ rl r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    8ea0:	[0-9a-f]* 	{ rl r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    8ea8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    8eb0:	[0-9a-f]* 	{ rl r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    8eb8:	[0-9a-f]* 	{ rl r15, r16, r17 ; maxh r5, r6, r7 }
+    8ec0:	[0-9a-f]* 	{ rl r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    8ec8:	[0-9a-f]* 	{ rl r15, r16, r17 ; moveli r5, 4660 }
+    8ed0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    8ed8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    8ee0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    8ee8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    8ef0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rl r15, r16, r17 ; prefetch r25 }
+    8ef8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+    8f00:	[0-9a-f]* 	{ rl r15, r16, r17 ; nop ; lh r25, r26 }
+    8f08:	[0-9a-f]* 	{ rl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    8f10:	[0-9a-f]* 	{ rl r15, r16, r17 ; packhs r5, r6, r7 }
+    8f18:	[0-9a-f]* 	{ rl r15, r16, r17 ; prefetch r25 }
+    8f20:	[0-9a-f]* 	{ rl r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    8f28:	[0-9a-f]* 	{ rl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    8f30:	[0-9a-f]* 	{ rl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    8f38:	[0-9a-f]* 	{ rl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    8f40:	[0-9a-f]* 	{ sadah r5, r6, r7 ; rl r15, r16, r17 }
+    8f48:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    8f50:	[0-9a-f]* 	{ rl r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    8f58:	[0-9a-f]* 	{ rl r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    8f60:	[0-9a-f]* 	{ rl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    8f68:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    8f70:	[0-9a-f]* 	{ rl r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    8f78:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rl r15, r16, r17 ; sh r25, r26 }
+    8f80:	[0-9a-f]* 	{ rl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    8f88:	[0-9a-f]* 	{ rl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    8f90:	[0-9a-f]* 	{ rl r15, r16, r17 ; slt r5, r6, r7 }
+    8f98:	[0-9a-f]* 	{ rl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    8fa0:	[0-9a-f]* 	{ rl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    8fa8:	[0-9a-f]* 	{ rl r15, r16, r17 ; sltib_u r5, r6, 5 }
+    8fb0:	[0-9a-f]* 	{ rl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    8fb8:	[0-9a-f]* 	{ rl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    8fc0:	[0-9a-f]* 	{ clz r5, r6 ; rl r15, r16, r17 ; sw r25, r26 }
+    8fc8:	[0-9a-f]* 	{ rl r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    8fd0:	[0-9a-f]* 	{ rl r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    8fd8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; rl r15, r16, r17 }
+    8fe0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rl r15, r16, r17 }
+    8fe8:	[0-9a-f]* 	{ rl r15, r16, r17 ; xor r5, r6, r7 }
+    8ff0:	[0-9a-f]* 	{ rl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    8ff8:	[0-9a-f]* 	{ rl r5, r6, r7 ; and r15, r16, r17 }
+    9000:	[0-9a-f]* 	{ rl r5, r6, r7 ; prefetch r25 }
+    9008:	[0-9a-f]* 	{ rl r5, r6, r7 ; info 19 ; lw r25, r26 }
+    9010:	[0-9a-f]* 	{ rl r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    9018:	[0-9a-f]* 	{ rl r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    9020:	[0-9a-f]* 	{ rl r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    9028:	[0-9a-f]* 	{ rl r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    9030:	[0-9a-f]* 	{ rl r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    9038:	[0-9a-f]* 	{ rl r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    9040:	[0-9a-f]* 	{ rl r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    9048:	[0-9a-f]* 	{ rl r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    9050:	[0-9a-f]* 	{ rl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    9058:	[0-9a-f]* 	{ rl r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    9060:	[0-9a-f]* 	{ rl r5, r6, r7 ; maxb_u r15, r16, r17 }
+    9068:	[0-9a-f]* 	{ rl r5, r6, r7 ; mnz r15, r16, r17 }
+    9070:	[0-9a-f]* 	{ rl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    9078:	[0-9a-f]* 	{ rl r5, r6, r7 ; nop ; lh r25, r26 }
+    9080:	[0-9a-f]* 	{ rl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    9088:	[0-9a-f]* 	{ rl r5, r6, r7 ; packhs r15, r16, r17 }
+    9090:	[0-9a-f]* 	{ rl r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    9098:	[0-9a-f]* 	{ rl r5, r6, r7 ; prefetch r25 }
+    90a0:	[0-9a-f]* 	{ rl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    90a8:	[0-9a-f]* 	{ rl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    90b0:	[0-9a-f]* 	{ rl r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    90b8:	[0-9a-f]* 	{ rl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    90c0:	[0-9a-f]* 	{ rl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    90c8:	[0-9a-f]* 	{ rl r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    90d0:	[0-9a-f]* 	{ rl r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    90d8:	[0-9a-f]* 	{ rl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    90e0:	[0-9a-f]* 	{ rl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    90e8:	[0-9a-f]* 	{ rl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    90f0:	[0-9a-f]* 	{ rl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    90f8:	[0-9a-f]* 	{ rl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    9100:	[0-9a-f]* 	{ rl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    9108:	[0-9a-f]* 	{ rl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    9110:	[0-9a-f]* 	{ rl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    9118:	[0-9a-f]* 	{ rl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    9120:	[0-9a-f]* 	{ rl r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    9128:	[0-9a-f]* 	{ rl r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    9130:	[0-9a-f]* 	{ rli r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 }
+    9138:	[0-9a-f]* 	{ rli r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 }
+    9140:	[0-9a-f]* 	{ rli r15, r16, 5 ; and r5, r6, r7 }
+    9148:	[0-9a-f]* 	{ bitx r5, r6 ; rli r15, r16, 5 ; sb r25, r26 }
+    9150:	[0-9a-f]* 	{ clz r5, r6 ; rli r15, r16, 5 ; sb r25, r26 }
+    9158:	[0-9a-f]* 	{ rli r15, r16, 5 ; lh_u r25, r26 }
+    9160:	[0-9a-f]* 	{ rli r15, r16, 5 ; intlb r5, r6, r7 }
+    9168:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    9170:	[0-9a-f]* 	{ rli r15, r16, 5 ; shli r5, r6, 5 ; lb r25, r26 }
+    9178:	[0-9a-f]* 	{ rli r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    9180:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    9188:	[0-9a-f]* 	{ rli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    9190:	[0-9a-f]* 	{ bitx r5, r6 ; rli r15, r16, 5 ; lh r25, r26 }
+    9198:	[0-9a-f]* 	{ rli r15, r16, 5 ; mz r5, r6, r7 ; lh r25, r26 }
+    91a0:	[0-9a-f]* 	{ rli r15, r16, 5 ; slte_u r5, r6, r7 ; lh r25, r26 }
+    91a8:	[0-9a-f]* 	{ ctz r5, r6 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    91b0:	[0-9a-f]* 	{ rli r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 }
+    91b8:	[0-9a-f]* 	{ rli r15, r16, 5 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    91c0:	[0-9a-f]* 	{ rli r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+    91c8:	[0-9a-f]* 	{ rli r15, r16, 5 ; rl r5, r6, r7 ; lw r25, r26 }
+    91d0:	[0-9a-f]* 	{ rli r15, r16, 5 ; sub r5, r6, r7 ; lw r25, r26 }
+    91d8:	[0-9a-f]* 	{ rli r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+    91e0:	[0-9a-f]* 	{ rli r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    91e8:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; rli r15, r16, 5 }
+    91f0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; rli r15, r16, 5 }
+    91f8:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; rli r15, r16, 5 }
+    9200:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 }
+    9208:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    9210:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; rli r15, r16, 5 ; sb r25, r26 }
+    9218:	[0-9a-f]* 	{ rli r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 }
+    9220:	[0-9a-f]* 	{ rli r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 }
+    9228:	[0-9a-f]* 	{ rli r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 }
+    9230:	[0-9a-f]* 	{ rli r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 }
+    9238:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    9240:	[0-9a-f]* 	{ rli r15, r16, 5 ; shri r5, r6, 5 ; prefetch r25 }
+    9248:	[0-9a-f]* 	{ rli r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 }
+    9250:	[0-9a-f]* 	{ rli r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    9258:	[0-9a-f]* 	{ rli r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    9260:	[0-9a-f]* 	{ ctz r5, r6 ; rli r15, r16, 5 ; sb r25, r26 }
+    9268:	[0-9a-f]* 	{ rli r15, r16, 5 ; or r5, r6, r7 ; sb r25, r26 }
+    9270:	[0-9a-f]* 	{ rli r15, r16, 5 ; sne r5, r6, r7 ; sb r25, r26 }
+    9278:	[0-9a-f]* 	{ rli r15, r16, 5 ; seqb r5, r6, r7 }
+    9280:	[0-9a-f]* 	{ clz r5, r6 ; rli r15, r16, 5 ; sh r25, r26 }
+    9288:	[0-9a-f]* 	{ rli r15, r16, 5 ; nor r5, r6, r7 ; sh r25, r26 }
+    9290:	[0-9a-f]* 	{ rli r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    9298:	[0-9a-f]* 	{ rli r15, r16, 5 ; shl r5, r6, r7 }
+    92a0:	[0-9a-f]* 	{ rli r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 }
+    92a8:	[0-9a-f]* 	{ rli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    92b0:	[0-9a-f]* 	{ rli r15, r16, 5 ; sltb_u r5, r6, r7 }
+    92b8:	[0-9a-f]* 	{ rli r15, r16, 5 ; slte_u r5, r6, r7 }
+    92c0:	[0-9a-f]* 	{ rli r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    92c8:	[0-9a-f]* 	{ rli r15, r16, 5 ; sne r5, r6, r7 }
+    92d0:	[0-9a-f]* 	{ rli r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 }
+    92d8:	[0-9a-f]* 	{ rli r15, r16, 5 ; subhs r5, r6, r7 }
+    92e0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    92e8:	[0-9a-f]* 	{ rli r15, r16, 5 ; shli r5, r6, 5 ; sw r25, r26 }
+    92f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    92f8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    9300:	[0-9a-f]* 	{ rli r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    9308:	[0-9a-f]* 	{ rli r5, r6, 5 ; addb r15, r16, r17 }
+    9310:	[0-9a-f]* 	{ rli r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 }
+    9318:	[0-9a-f]* 	{ rli r5, r6, 5 ; dtlbpr r15 }
+    9320:	[0-9a-f]* 	{ rli r5, r6, 5 ; ill ; sb r25, r26 }
+    9328:	[0-9a-f]* 	{ rli r5, r6, 5 ; iret }
+    9330:	[0-9a-f]* 	{ rli r5, r6, 5 ; ori r15, r16, 5 ; lb r25, r26 }
+    9338:	[0-9a-f]* 	{ rli r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+    9340:	[0-9a-f]* 	{ rli r5, r6, 5 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    9348:	[0-9a-f]* 	{ rli r5, r6, 5 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    9350:	[0-9a-f]* 	{ rli r5, r6, 5 ; ori r15, r16, 5 ; lh r25, r26 }
+    9358:	[0-9a-f]* 	{ rli r5, r6, 5 ; srai r15, r16, 5 ; lh r25, r26 }
+    9360:	[0-9a-f]* 	{ rli r5, r6, 5 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    9368:	[0-9a-f]* 	{ rli r5, r6, 5 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    9370:	[0-9a-f]* 	{ rli r5, r6, 5 ; or r15, r16, r17 ; lw r25, r26 }
+    9378:	[0-9a-f]* 	{ rli r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+    9380:	[0-9a-f]* 	{ rli r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    9388:	[0-9a-f]* 	{ rli r5, r6, 5 ; move r15, r16 }
+    9390:	[0-9a-f]* 	{ rli r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 }
+    9398:	[0-9a-f]* 	{ rli r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 }
+    93a0:	[0-9a-f]* 	{ rli r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 }
+    93a8:	[0-9a-f]* 	{ rli r5, r6, 5 ; movei r15, 5 ; prefetch r25 }
+    93b0:	[0-9a-f]* 	{ rli r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 }
+    93b8:	[0-9a-f]* 	{ rli r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 }
+    93c0:	[0-9a-f]* 	{ rli r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 }
+    93c8:	[0-9a-f]* 	{ rli r5, r6, 5 ; sb r15, r16 }
+    93d0:	[0-9a-f]* 	{ rli r5, r6, 5 ; s3a r15, r16, r17 ; sb r25, r26 }
+    93d8:	[0-9a-f]* 	{ rli r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 }
+    93e0:	[0-9a-f]* 	{ rli r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 }
+    93e8:	[0-9a-f]* 	{ rli r5, r6, 5 ; rl r15, r16, r17 ; sh r25, r26 }
+    93f0:	[0-9a-f]* 	{ rli r5, r6, 5 ; sub r15, r16, r17 ; sh r25, r26 }
+    93f8:	[0-9a-f]* 	{ rli r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 }
+    9400:	[0-9a-f]* 	{ rli r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 }
+    9408:	[0-9a-f]* 	{ rli r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 }
+    9410:	[0-9a-f]* 	{ rli r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 }
+    9418:	[0-9a-f]* 	{ rli r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 }
+    9420:	[0-9a-f]* 	{ rli r5, r6, 5 ; sltib r15, r16, 5 }
+    9428:	[0-9a-f]* 	{ rli r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+    9430:	[0-9a-f]* 	{ rli r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 }
+    9438:	[0-9a-f]* 	{ rli r5, r6, 5 ; sw r25, r26 }
+    9440:	[0-9a-f]* 	{ rli r5, r6, 5 ; shr r15, r16, r17 ; sw r25, r26 }
+    9448:	[0-9a-f]* 	{ rli r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    9450:	[0-9a-f]* 	{ s1a r15, r16, r17 ; addh r5, r6, r7 }
+    9458:	[0-9a-f]* 	{ s1a r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 }
+    9460:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; s1a r15, r16, r17 }
+    9468:	[0-9a-f]* 	{ bytex r5, r6 ; s1a r15, r16, r17 ; sw r25, r26 }
+    9470:	[0-9a-f]* 	{ ctz r5, r6 ; s1a r15, r16, r17 ; sb r25, r26 }
+    9478:	[0-9a-f]* 	{ s1a r15, r16, r17 ; info 19 ; prefetch r25 }
+    9480:	[0-9a-f]* 	{ s1a r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 }
+    9488:	[0-9a-f]* 	{ s1a r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 }
+    9490:	[0-9a-f]* 	{ s1a r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 }
+    9498:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    94a0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    94a8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    94b0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+    94b8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 }
+    94c0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; lh r25, r26 }
+    94c8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    94d0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    94d8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 }
+    94e0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    94e8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    94f0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; minh r5, r6, r7 }
+    94f8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; move r5, r6 ; lw r25, r26 }
+    9500:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+    9508:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    9510:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; s1a r15, r16, r17 }
+    9518:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+    9520:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s1a r15, r16, r17 ; lb r25, r26 }
+    9528:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; s1a r15, r16, r17 }
+    9530:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 }
+    9538:	[0-9a-f]* 	{ s1a r15, r16, r17 ; nop ; sb r25, r26 }
+    9540:	[0-9a-f]* 	{ s1a r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+    9548:	[0-9a-f]* 	{ pcnt r5, r6 ; s1a r15, r16, r17 ; lh r25, r26 }
+    9550:	[0-9a-f]* 	{ s1a r15, r16, r17 ; movei r5, 5 ; prefetch r25 }
+    9558:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s1a r5, r6, r7 ; prefetch r25 }
+    9560:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 }
+    9568:	[0-9a-f]* 	{ s1a r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 }
+    9570:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+    9578:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; s1a r15, r16, r17 }
+    9580:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    9588:	[0-9a-f]* 	{ s1a r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 }
+    9590:	[0-9a-f]* 	{ s1a r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 }
+    9598:	[0-9a-f]* 	{ s1a r15, r16, r17 ; seqib r5, r6, 5 }
+    95a0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 }
+    95a8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 }
+    95b0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 }
+    95b8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; shli r5, r6, 5 }
+    95c0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 }
+    95c8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 }
+    95d0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+    95d8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 }
+    95e0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 }
+    95e8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; sra r5, r6, r7 }
+    95f0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+    95f8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 }
+    9600:	[0-9a-f]* 	{ s1a r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 }
+    9608:	[0-9a-f]* 	{ s1a r15, r16, r17 ; sub r5, r6, r7 ; sw r25, r26 }
+    9610:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    9618:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s1a r15, r16, r17 ; lh_u r25, r26 }
+    9620:	[0-9a-f]* 	{ s1a r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    9628:	[0-9a-f]* 	{ s1a r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+    9630:	[0-9a-f]* 	{ s1a r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    9638:	[0-9a-f]* 	{ s1a r5, r6, r7 }
+    9640:	[0-9a-f]* 	{ s1a r5, r6, r7 ; info 19 ; sw r25, r26 }
+    9648:	[0-9a-f]* 	{ s1a r5, r6, r7 ; info 19 ; lb r25, r26 }
+    9650:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    9658:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    9660:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    9668:	[0-9a-f]* 	{ s1a r5, r6, r7 ; info 19 ; lh r25, r26 }
+    9670:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+    9678:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    9680:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    9688:	[0-9a-f]* 	{ s1a r5, r6, r7 ; ill ; lw r25, r26 }
+    9690:	[0-9a-f]* 	{ s1a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    9698:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mf }
+    96a0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+    96a8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; moveli.sn r15, 4660 }
+    96b0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; nop ; sb r25, r26 }
+    96b8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    96c0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    96c8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    96d0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    96d8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+    96e0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    96e8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; nop ; sb r25, r26 }
+    96f0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    96f8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 }
+    9700:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 }
+    9708:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    9710:	[0-9a-f]* 	{ s1a r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+    9718:	[0-9a-f]* 	{ s1a r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+    9720:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    9728:	[0-9a-f]* 	{ s1a r5, r6, r7 ; sltb r15, r16, r17 }
+    9730:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    9738:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 }
+    9740:	[0-9a-f]* 	{ s1a r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    9748:	[0-9a-f]* 	{ s1a r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    9750:	[0-9a-f]* 	{ s1a r5, r6, r7 ; subh r15, r16, r17 }
+    9758:	[0-9a-f]* 	{ s1a r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    9760:	[0-9a-f]* 	{ s1a r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+    9768:	[0-9a-f]* 	{ s2a r15, r16, r17 ; add r5, r6, r7 ; lw r25, r26 }
+    9770:	[0-9a-f]* 	{ s2a r15, r16, r17 ; addib r5, r6, 5 }
+    9778:	[0-9a-f]* 	{ s2a r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 }
+    9780:	[0-9a-f]* 	{ bytex r5, r6 ; s2a r15, r16, r17 ; lb r25, r26 }
+    9788:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; s2a r15, r16, r17 }
+    9790:	[0-9a-f]* 	{ s2a r15, r16, r17 ; sh r25, r26 }
+    9798:	[0-9a-f]* 	{ s2a r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 }
+    97a0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    97a8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slt_u r5, r6, r7 ; lb r25, r26 }
+    97b0:	[0-9a-f]* 	{ bytex r5, r6 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    97b8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; nop ; lb_u r25, r26 }
+    97c0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    97c8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; lh r25, r26 }
+    97d0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; ori r5, r6, 5 ; lh r25, r26 }
+    97d8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; sra r5, r6, r7 ; lh r25, r26 }
+    97e0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 }
+    97e8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; rli r5, r6, 5 ; lh_u r25, r26 }
+    97f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    97f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    9800:	[0-9a-f]* 	{ s2a r15, r16, r17 ; s3a r5, r6, r7 ; lw r25, r26 }
+    9808:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lw r25, r26 }
+    9810:	[0-9a-f]* 	{ s2a r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 }
+    9818:	[0-9a-f]* 	{ s2a r15, r16, r17 ; movei r5, 5 ; sb r25, r26 }
+    9820:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    9828:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    9830:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+    9838:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    9840:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    9848:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    9850:	[0-9a-f]* 	{ s2a r15, r16, r17 ; mzb r5, r6, r7 }
+    9858:	[0-9a-f]* 	{ s2a r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    9860:	[0-9a-f]* 	{ s2a r15, r16, r17 ; ori r5, r6, 5 ; sw r25, r26 }
+    9868:	[0-9a-f]* 	{ bitx r5, r6 ; s2a r15, r16, r17 ; prefetch r25 }
+    9870:	[0-9a-f]* 	{ s2a r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    9878:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
+    9880:	[0-9a-f]* 	{ s2a r15, r16, r17 ; rl r5, r6, r7 ; sh r25, r26 }
+    9888:	[0-9a-f]* 	{ s2a r15, r16, r17 ; s1a r5, r6, r7 ; sh r25, r26 }
+    9890:	[0-9a-f]* 	{ s2a r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    9898:	[0-9a-f]* 	{ s2a r15, r16, r17 ; move r5, r6 ; sb r25, r26 }
+    98a0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; rli r5, r6, 5 ; sb r25, r26 }
+    98a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 }
+    98b0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 }
+    98b8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; mnz r5, r6, r7 ; sh r25, r26 }
+    98c0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; rl r5, r6, r7 ; sh r25, r26 }
+    98c8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 }
+    98d0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; shli r5, r6, 5 ; lb_u r25, r26 }
+    98d8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; shr r5, r6, r7 }
+    98e0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slt r5, r6, r7 ; prefetch r25 }
+    98e8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 }
+    98f0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slteh_u r5, r6, r7 }
+    98f8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    9900:	[0-9a-f]* 	{ s2a r15, r16, r17 ; sra r5, r6, r7 ; lb_u r25, r26 }
+    9908:	[0-9a-f]* 	{ s2a r15, r16, r17 ; srai r5, r6, 5 }
+    9910:	[0-9a-f]* 	{ s2a r15, r16, r17 ; and r5, r6, r7 ; sw r25, r26 }
+    9918:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    9920:	[0-9a-f]* 	{ s2a r15, r16, r17 ; slt_u r5, r6, r7 ; sw r25, r26 }
+    9928:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s2a r15, r16, r17 ; prefetch r25 }
+    9930:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s2a r15, r16, r17 ; prefetch r25 }
+    9938:	[0-9a-f]* 	{ s2a r15, r16, r17 ; xor r5, r6, r7 ; prefetch r25 }
+    9940:	[0-9a-f]* 	{ s2a r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+    9948:	[0-9a-f]* 	{ s2a r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+    9950:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lb_u r25, r26 }
+    9958:	[0-9a-f]* 	{ s2a r5, r6, r7 ; info 19 ; lb r25, r26 }
+    9960:	[0-9a-f]* 	{ s2a r5, r6, r7 ; jrp r15 }
+    9968:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    9970:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lb_u r15, r16 }
+    9978:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    9980:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    9988:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+    9990:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lh_u r15, r16 }
+    9998:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    99a0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    99a8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+    99b0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; lw r25, r26 }
+    99b8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+    99c0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+    99c8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; mzb r15, r16, r17 }
+    99d0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    99d8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+    99e0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+    99e8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    99f0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+    99f8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+    9a00:	[0-9a-f]* 	{ s2a r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 }
+    9a08:	[0-9a-f]* 	{ s2a r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    9a10:	[0-9a-f]* 	{ s2a r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    9a18:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sh r15, r16 }
+    9a20:	[0-9a-f]* 	{ s2a r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    9a28:	[0-9a-f]* 	{ s2a r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    9a30:	[0-9a-f]* 	{ s2a r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+    9a38:	[0-9a-f]* 	{ s2a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    9a40:	[0-9a-f]* 	{ s2a r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+    9a48:	[0-9a-f]* 	{ s2a r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    9a50:	[0-9a-f]* 	{ s2a r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    9a58:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+    9a60:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+    9a68:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    9a70:	[0-9a-f]* 	{ s2a r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    9a78:	[0-9a-f]* 	{ s2a r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    9a80:	[0-9a-f]* 	{ s2a r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    9a88:	[0-9a-f]* 	{ s3a r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 }
+    9a90:	[0-9a-f]* 	{ s3a r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+    9a98:	[0-9a-f]* 	{ bitx r5, r6 ; s3a r15, r16, r17 ; lh r25, r26 }
+    9aa0:	[0-9a-f]* 	{ clz r5, r6 ; s3a r15, r16, r17 ; lh r25, r26 }
+    9aa8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; s3a r15, r16, r17 }
+    9ab0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; info 19 }
+    9ab8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb r25, r26 }
+    9ac0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+    9ac8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s3a r15, r16, r17 ; lb r25, r26 }
+    9ad0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+    9ad8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 }
+    9ae0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; add r5, r6, r7 ; lh r25, r26 }
+    9ae8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    9af0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shri r5, r6, 5 ; lh r25, r26 }
+    9af8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 }
+    9b00:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s3a r15, r16, r17 ; lh_u r25, r26 }
+    9b08:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 }
+    9b10:	[0-9a-f]* 	{ clz r5, r6 ; s3a r15, r16, r17 ; lw r25, r26 }
+    9b18:	[0-9a-f]* 	{ s3a r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 }
+    9b20:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slti_u r5, r6, 5 ; lw r25, r26 }
+    9b28:	[0-9a-f]* 	{ s3a r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 }
+    9b30:	[0-9a-f]* 	{ s3a r15, r16, r17 ; move r5, r6 ; sw r25, r26 }
+    9b38:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    9b40:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 }
+    9b48:	[0-9a-f]* 	{ mulhl_uu r5, r6, r7 ; s3a r15, r16, r17 }
+    9b50:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 }
+    9b58:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+    9b60:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    9b68:	[0-9a-f]* 	{ s3a r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 }
+    9b70:	[0-9a-f]* 	{ s3a r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    9b78:	[0-9a-f]* 	{ s3a r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 }
+    9b80:	[0-9a-f]* 	{ pcnt r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 }
+    9b88:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s3a r15, r16, r17 ; prefetch r25 }
+    9b90:	[0-9a-f]* 	{ s3a r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
+    9b98:	[0-9a-f]* 	{ s3a r15, r16, r17 ; prefetch r25 }
+    9ba0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; rli r5, r6, 5 }
+    9ba8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; s2a r5, r6, r7 }
+    9bb0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 }
+    9bb8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    9bc0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 }
+    9bc8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    9bd0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; and r5, r6, r7 ; sh r25, r26 }
+    9bd8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    9be0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 }
+    9be8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+    9bf0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 }
+    9bf8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; shri r5, r6, 5 }
+    9c00:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 }
+    9c08:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
+    9c10:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slti r5, r6, 5 }
+    9c18:	[0-9a-f]* 	{ s3a r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
+    9c20:	[0-9a-f]* 	{ s3a r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    9c28:	[0-9a-f]* 	{ s3a r15, r16, r17 ; sub r5, r6, r7 }
+    9c30:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s3a r15, r16, r17 ; sw r25, r26 }
+    9c38:	[0-9a-f]* 	{ s3a r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+    9c40:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s3a r15, r16, r17 ; sw r25, r26 }
+    9c48:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 }
+    9c50:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 }
+    9c58:	[0-9a-f]* 	{ s3a r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+    9c60:	[0-9a-f]* 	{ s3a r5, r6, r7 ; addli r15, r16, 4660 }
+    9c68:	[0-9a-f]* 	{ s3a r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    9c70:	[0-9a-f]* 	{ s3a r5, r6, r7 ; ill ; lh r25, r26 }
+    9c78:	[0-9a-f]* 	{ s3a r5, r6, r7 ; inthh r15, r16, r17 }
+    9c80:	[0-9a-f]* 	{ s3a r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+    9c88:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    9c90:	[0-9a-f]* 	{ s3a r5, r6, r7 ; nop ; lb_u r25, r26 }
+    9c98:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    9ca0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    9ca8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+    9cb0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; nop ; lh_u r25, r26 }
+    9cb8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slti_u r15, r16, 5 ; lh_u r25, r26 }
+    9cc0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+    9cc8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    9cd0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; minib_u r15, r16, 5 }
+    9cd8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    9ce0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+    9ce8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+    9cf0:	[0-9a-f]* 	{ s3a r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    9cf8:	[0-9a-f]* 	{ s3a r5, r6, r7 ; ill ; prefetch r25 }
+    9d00:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+    9d08:	[0-9a-f]* 	{ s3a r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    9d10:	[0-9a-f]* 	{ s3a r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    9d18:	[0-9a-f]* 	{ s3a r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    9d20:	[0-9a-f]* 	{ s3a r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    9d28:	[0-9a-f]* 	{ s3a r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+    9d30:	[0-9a-f]* 	{ s3a r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    9d38:	[0-9a-f]* 	{ s3a r5, r6, r7 ; nop ; sh r25, r26 }
+    9d40:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    9d48:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 }
+    9d50:	[0-9a-f]* 	{ s3a r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+    9d58:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+    9d60:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+    9d68:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slteh r15, r16, r17 }
+    9d70:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    9d78:	[0-9a-f]* 	{ s3a r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 }
+    9d80:	[0-9a-f]* 	{ s3a r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 }
+    9d88:	[0-9a-f]* 	{ s3a r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 }
+    9d90:	[0-9a-f]* 	{ s3a r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    9d98:	[0-9a-f]* 	{ s3a r5, r6, r7 ; wh64 r15 }
+    9da0:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; addli r15, r16, 4660 }
+    9da8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; jalr r15 }
+    9db0:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; maxih r15, r16, 5 }
+    9db8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; nor r15, r16, r17 }
+    9dc0:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; seqib r15, r16, 5 }
+    9dc8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; slte r15, r16, r17 }
+    9dd0:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; srai r15, r16, 5 }
+    9dd8:	[0-9a-f]* 	{ sadah r5, r6, r7 ; addi r15, r16, 5 }
+    9de0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; intlh r15, r16, r17 }
+    9de8:	[0-9a-f]* 	{ sadah r5, r6, r7 ; maxb_u r15, r16, r17 }
+    9df0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; mzb r15, r16, r17 }
+    9df8:	[0-9a-f]* 	{ sadah r5, r6, r7 ; seqb r15, r16, r17 }
+    9e00:	[0-9a-f]* 	{ sadah r5, r6, r7 ; slt_u r15, r16, r17 }
+    9e08:	[0-9a-f]* 	{ sadah r5, r6, r7 ; sra r15, r16, r17 }
+    9e10:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; addbs_u r15, r16, r17 }
+    9e18:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; inthb r15, r16, r17 }
+    9e20:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; lw_na r15, r16 }
+    9e28:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; moveli.sn r15, 4660 }
+    9e30:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; sb r15, r16 }
+    9e38:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; shrib r15, r16, 5 }
+    9e40:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; sne r15, r16, r17 }
+    9e48:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; xori r15, r16, 5 }
+    9e50:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; ill }
+    9e58:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    9e60:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; move r15, r16 }
+    9e68:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; s1a r15, r16, r17 }
+    9e70:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; shrb r15, r16, r17 }
+    9e78:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; sltib_u r15, r16, 5 }
+    9e80:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; tns r15, r16 }
+    9e88:	[0-9a-f]* 	{ sadh r5, r6, r7 ; flush r15 }
+    9e90:	[0-9a-f]* 	{ sadh r5, r6, r7 ; lh r15, r16 }
+    9e98:	[0-9a-f]* 	{ sadh r5, r6, r7 ; mnz r15, r16, r17 }
+    9ea0:	[0-9a-f]* 	{ sadh r5, r6, r7 ; raise }
+    9ea8:	[0-9a-f]* 	{ sadh r5, r6, r7 ; shlib r15, r16, 5 }
+    9eb0:	[0-9a-f]* 	{ sadh r5, r6, r7 ; slti r15, r16, 5 }
+    9eb8:	[0-9a-f]* 	{ sadh r5, r6, r7 ; subs r15, r16, r17 }
+    9ec0:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; auli r15, r16, 4660 }
+    9ec8:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; lb_u r15, r16 }
+    9ed0:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; minib_u r15, r16, 5 }
+    9ed8:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; packhs r15, r16, r17 }
+    9ee0:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; shlb r15, r16, r17 }
+    9ee8:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; slteh_u r15, r16, r17 }
+    9ef0:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; subbs_u r15, r16, r17 }
+    9ef8:	[0-9a-f]* 	{ adds r5, r6, r7 ; sb r15, r16 }
+    9f00:	[0-9a-f]* 	{ intlb r5, r6, r7 ; sb r15, r16 }
+    9f08:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sb r15, r16 }
+    9f10:	[0-9a-f]* 	{ mulllsa_uu r5, r6, r7 ; sb r15, r16 }
+    9f18:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; sb r15, r16 }
+    9f20:	[0-9a-f]* 	{ shrh r5, r6, r7 ; sb r15, r16 }
+    9f28:	[0-9a-f]* 	{ sltih r5, r6, 5 ; sb r15, r16 }
+    9f30:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sb r15, r16 }
+    9f38:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+    9f40:	[0-9a-f]* 	{ add r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 }
+    9f48:	[0-9a-f]* 	{ add r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+    9f50:	[0-9a-f]* 	{ add r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 }
+    9f58:	[0-9a-f]* 	{ addi r15, r16, 5 ; and r5, r6, r7 ; sb r25, r26 }
+    9f60:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 }
+    9f68:	[0-9a-f]* 	{ addi r15, r16, 5 ; slt_u r5, r6, r7 ; sb r25, r26 }
+    9f70:	[0-9a-f]* 	{ addi r5, r6, 5 ; ill ; sb r25, r26 }
+    9f78:	[0-9a-f]* 	{ addi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 }
+    9f80:	[0-9a-f]* 	{ ctz r5, r6 ; and r15, r16, r17 ; sb r25, r26 }
+    9f88:	[0-9a-f]* 	{ and r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+    9f90:	[0-9a-f]* 	{ and r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 }
+    9f98:	[0-9a-f]* 	{ and r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    9fa0:	[0-9a-f]* 	{ and r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 }
+    9fa8:	[0-9a-f]* 	{ andi r15, r16, 5 ; movei r5, 5 ; sb r25, r26 }
+    9fb0:	[0-9a-f]* 	{ andi r15, r16, 5 ; s1a r5, r6, r7 ; sb r25, r26 }
+    9fb8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 }
+    9fc0:	[0-9a-f]* 	{ andi r5, r6, 5 ; rl r15, r16, r17 ; sb r25, r26 }
+    9fc8:	[0-9a-f]* 	{ andi r5, r6, 5 ; sub r15, r16, r17 ; sb r25, r26 }
+    9fd0:	[0-9a-f]* 	{ bitx r5, r6 ; s1a r15, r16, r17 ; sb r25, r26 }
+    9fd8:	[0-9a-f]* 	{ bitx r5, r6 ; sb r25, r26 }
+    9fe0:	[0-9a-f]* 	{ bytex r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 }
+    9fe8:	[0-9a-f]* 	{ clz r5, r6 ; addi r15, r16, 5 ; sb r25, r26 }
+    9ff0:	[0-9a-f]* 	{ clz r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 }
+    9ff8:	[0-9a-f]* 	{ ctz r5, r6 ; andi r15, r16, 5 ; sb r25, r26 }
+    a000:	[0-9a-f]* 	{ ctz r5, r6 ; shli r15, r16, 5 ; sb r25, r26 }
+    a008:	[0-9a-f]* 	{ and r5, r6, r7 ; sb r25, r26 }
+    a010:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sb r25, r26 }
+    a018:	[0-9a-f]* 	{ rli r5, r6, 5 ; sb r25, r26 }
+    a020:	[0-9a-f]* 	{ slt r5, r6, r7 ; sb r25, r26 }
+    a028:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sb r25, r26 }
+    a030:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; ill ; sb r25, r26 }
+    a038:	[0-9a-f]* 	{ s3a r5, r6, r7 ; ill ; sb r25, r26 }
+    a040:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; sb r25, r26 }
+    a048:	[0-9a-f]* 	{ info 19 ; move r15, r16 ; sb r25, r26 }
+    a050:	[0-9a-f]* 	{ info 19 ; or r15, r16, r17 ; sb r25, r26 }
+    a058:	[0-9a-f]* 	{ info 19 ; shl r5, r6, r7 ; sb r25, r26 }
+    a060:	[0-9a-f]* 	{ info 19 ; sne r5, r6, r7 ; sb r25, r26 }
+    a068:	[0-9a-f]* 	{ clz r5, r6 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a070:	[0-9a-f]* 	{ mnz r15, r16, r17 ; nor r5, r6, r7 ; sb r25, r26 }
+    a078:	[0-9a-f]* 	{ mnz r15, r16, r17 ; slti_u r5, r6, 5 ; sb r25, r26 }
+    a080:	[0-9a-f]* 	{ mnz r5, r6, r7 ; movei r15, 5 ; sb r25, r26 }
+    a088:	[0-9a-f]* 	{ mnz r5, r6, r7 ; slte_u r15, r16, r17 ; sb r25, r26 }
+    a090:	[0-9a-f]* 	{ move r15, r16 ; move r5, r6 ; sb r25, r26 }
+    a098:	[0-9a-f]* 	{ move r15, r16 ; rli r5, r6, 5 ; sb r25, r26 }
+    a0a0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; sb r25, r26 }
+    a0a8:	[0-9a-f]* 	{ move r5, r6 ; ori r15, r16, 5 ; sb r25, r26 }
+    a0b0:	[0-9a-f]* 	{ move r5, r6 ; srai r15, r16, 5 ; sb r25, r26 }
+    a0b8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; movei r15, 5 ; sb r25, r26 }
+    a0c0:	[0-9a-f]* 	{ movei r15, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+    a0c8:	[0-9a-f]* 	{ movei r15, 5 ; sb r25, r26 }
+    a0d0:	[0-9a-f]* 	{ movei r5, 5 ; s3a r15, r16, r17 ; sb r25, r26 }
+    a0d8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 }
+    a0e0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 }
+    a0e8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; andi r15, r16, 5 ; sb r25, r26 }
+    a0f0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    a0f8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ill ; sb r25, r26 }
+    a100:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 }
+    a108:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a110:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a118:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; movei r15, 5 ; sb r25, r26 }
+    a120:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slte_u r15, r16, r17 ; sb r25, r26 }
+    a128:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; nop ; sb r25, r26 }
+    a130:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    a138:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    a140:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    a148:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    a150:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+    a158:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a160:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sb r25, r26 }
+    a168:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    a170:	[0-9a-f]* 	{ mvz r5, r6, r7 ; addi r15, r16, 5 ; sb r25, r26 }
+    a178:	[0-9a-f]* 	{ mvz r5, r6, r7 ; seqi r15, r16, 5 ; sb r25, r26 }
+    a180:	[0-9a-f]* 	{ mz r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 }
+    a188:	[0-9a-f]* 	{ mvz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    a190:	[0-9a-f]* 	{ mz r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 }
+    a198:	[0-9a-f]* 	{ mz r5, r6, r7 ; info 19 ; sb r25, r26 }
+    a1a0:	[0-9a-f]* 	{ mz r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 }
+    a1a8:	[0-9a-f]* 	{ bitx r5, r6 ; nop ; sb r25, r26 }
+    a1b0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; nop ; sb r25, r26 }
+    a1b8:	[0-9a-f]* 	{ nop ; s2a r15, r16, r17 ; sb r25, r26 }
+    a1c0:	[0-9a-f]* 	{ nop ; slte r15, r16, r17 ; sb r25, r26 }
+    a1c8:	[0-9a-f]* 	{ nop ; xor r15, r16, r17 ; sb r25, r26 }
+    a1d0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+    a1d8:	[0-9a-f]* 	{ nor r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 }
+    a1e0:	[0-9a-f]* 	{ nor r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+    a1e8:	[0-9a-f]* 	{ nor r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 }
+    a1f0:	[0-9a-f]* 	{ or r15, r16, r17 ; and r5, r6, r7 ; sb r25, r26 }
+    a1f8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    a200:	[0-9a-f]* 	{ or r15, r16, r17 ; slt_u r5, r6, r7 ; sb r25, r26 }
+    a208:	[0-9a-f]* 	{ or r5, r6, r7 ; ill ; sb r25, r26 }
+    a210:	[0-9a-f]* 	{ or r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 }
+    a218:	[0-9a-f]* 	{ ctz r5, r6 ; ori r15, r16, 5 ; sb r25, r26 }
+    a220:	[0-9a-f]* 	{ ori r15, r16, 5 ; or r5, r6, r7 ; sb r25, r26 }
+    a228:	[0-9a-f]* 	{ ori r15, r16, 5 ; sne r5, r6, r7 ; sb r25, r26 }
+    a230:	[0-9a-f]* 	{ ori r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 }
+    a238:	[0-9a-f]* 	{ ori r5, r6, 5 ; slti r15, r16, 5 ; sb r25, r26 }
+    a240:	[0-9a-f]* 	{ pcnt r5, r6 ; nor r15, r16, r17 ; sb r25, r26 }
+    a248:	[0-9a-f]* 	{ pcnt r5, r6 ; sne r15, r16, r17 ; sb r25, r26 }
+    a250:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+    a258:	[0-9a-f]* 	{ rl r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 }
+    a260:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rl r15, r16, r17 ; sb r25, r26 }
+    a268:	[0-9a-f]* 	{ rl r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a270:	[0-9a-f]* 	{ rl r5, r6, r7 ; sb r25, r26 }
+    a278:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; sb r25, r26 }
+    a280:	[0-9a-f]* 	{ rli r15, r16, 5 ; shr r5, r6, r7 ; sb r25, r26 }
+    a288:	[0-9a-f]* 	{ rli r5, r6, 5 ; and r15, r16, r17 ; sb r25, r26 }
+    a290:	[0-9a-f]* 	{ rli r5, r6, 5 ; shl r15, r16, r17 ; sb r25, r26 }
+    a298:	[0-9a-f]* 	{ bitx r5, r6 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a2a0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+    a2a8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    a2b0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a2b8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a2c0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; info 19 ; sb r25, r26 }
+    a2c8:	[0-9a-f]* 	{ pcnt r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 }
+    a2d0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; srai r5, r6, 5 ; sb r25, r26 }
+    a2d8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+    a2e0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    a2e8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    a2f0:	[0-9a-f]* 	{ s3a r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 }
+    a2f8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 }
+    a300:	[0-9a-f]* 	{ s3a r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a308:	[0-9a-f]* 	{ s3a r5, r6, r7 ; sb r25, r26 }
+    a310:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; sb r25, r26 }
+    a318:	[0-9a-f]* 	{ seq r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 }
+    a320:	[0-9a-f]* 	{ seq r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    a328:	[0-9a-f]* 	{ seq r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    a330:	[0-9a-f]* 	{ bitx r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 }
+    a338:	[0-9a-f]* 	{ seqi r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 }
+    a340:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    a348:	[0-9a-f]* 	{ seqi r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a350:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a358:	[0-9a-f]* 	{ shl r15, r16, r17 ; info 19 ; sb r25, r26 }
+    a360:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; sb r25, r26 }
+    a368:	[0-9a-f]* 	{ shl r15, r16, r17 ; srai r5, r6, 5 ; sb r25, r26 }
+    a370:	[0-9a-f]* 	{ shl r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+    a378:	[0-9a-f]* 	{ shl r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    a380:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    a388:	[0-9a-f]* 	{ shli r15, r16, 5 ; s3a r5, r6, r7 ; sb r25, r26 }
+    a390:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shli r15, r16, 5 ; sb r25, r26 }
+    a398:	[0-9a-f]* 	{ shli r5, r6, 5 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a3a0:	[0-9a-f]* 	{ shli r5, r6, 5 ; sb r25, r26 }
+    a3a8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    a3b0:	[0-9a-f]* 	{ shr r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 }
+    a3b8:	[0-9a-f]* 	{ shr r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    a3c0:	[0-9a-f]* 	{ shr r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    a3c8:	[0-9a-f]* 	{ bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 }
+    a3d0:	[0-9a-f]* 	{ shri r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 }
+    a3d8:	[0-9a-f]* 	{ shri r15, r16, 5 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    a3e0:	[0-9a-f]* 	{ shri r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a3e8:	[0-9a-f]* 	{ shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a3f0:	[0-9a-f]* 	{ slt r15, r16, r17 ; info 19 ; sb r25, r26 }
+    a3f8:	[0-9a-f]* 	{ pcnt r5, r6 ; slt r15, r16, r17 ; sb r25, r26 }
+    a400:	[0-9a-f]* 	{ slt r15, r16, r17 ; srai r5, r6, 5 ; sb r25, r26 }
+    a408:	[0-9a-f]* 	{ slt r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+    a410:	[0-9a-f]* 	{ slt r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    a418:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a420:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 }
+    a428:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a430:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a438:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sb r25, r26 }
+    a440:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+    a448:	[0-9a-f]* 	{ slte r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 }
+    a450:	[0-9a-f]* 	{ slte r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    a458:	[0-9a-f]* 	{ slte r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    a460:	[0-9a-f]* 	{ bitx r5, r6 ; slte_u r15, r16, r17 ; sb r25, r26 }
+    a468:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+    a470:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    a478:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a480:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a488:	[0-9a-f]* 	{ slti r15, r16, 5 ; info 19 ; sb r25, r26 }
+    a490:	[0-9a-f]* 	{ pcnt r5, r6 ; slti r15, r16, 5 ; sb r25, r26 }
+    a498:	[0-9a-f]* 	{ slti r15, r16, 5 ; srai r5, r6, 5 ; sb r25, r26 }
+    a4a0:	[0-9a-f]* 	{ slti r5, r6, 5 ; nor r15, r16, r17 ; sb r25, r26 }
+    a4a8:	[0-9a-f]* 	{ slti r5, r6, 5 ; sne r15, r16, r17 ; sb r25, r26 }
+    a4b0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    a4b8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; s3a r5, r6, r7 ; sb r25, r26 }
+    a4c0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    a4c8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a4d0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sb r25, r26 }
+    a4d8:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    a4e0:	[0-9a-f]* 	{ sne r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 }
+    a4e8:	[0-9a-f]* 	{ sne r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+    a4f0:	[0-9a-f]* 	{ sne r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    a4f8:	[0-9a-f]* 	{ bitx r5, r6 ; sra r15, r16, r17 ; sb r25, r26 }
+    a500:	[0-9a-f]* 	{ sra r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+    a508:	[0-9a-f]* 	{ sra r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 }
+    a510:	[0-9a-f]* 	{ sra r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    a518:	[0-9a-f]* 	{ sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    a520:	[0-9a-f]* 	{ srai r15, r16, 5 ; info 19 ; sb r25, r26 }
+    a528:	[0-9a-f]* 	{ pcnt r5, r6 ; srai r15, r16, 5 ; sb r25, r26 }
+    a530:	[0-9a-f]* 	{ srai r15, r16, 5 ; srai r5, r6, 5 ; sb r25, r26 }
+    a538:	[0-9a-f]* 	{ srai r5, r6, 5 ; nor r15, r16, r17 ; sb r25, r26 }
+    a540:	[0-9a-f]* 	{ srai r5, r6, 5 ; sne r15, r16, r17 ; sb r25, r26 }
+    a548:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+    a550:	[0-9a-f]* 	{ sub r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 }
+    a558:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; sb r25, r26 }
+    a560:	[0-9a-f]* 	{ sub r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+    a568:	[0-9a-f]* 	{ sub r5, r6, r7 ; sb r25, r26 }
+    a570:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s3a r15, r16, r17 ; sb r25, r26 }
+    a578:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; sb r25, r26 }
+    a580:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 }
+    a588:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 }
+    a590:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shli r15, r16, 5 ; sb r25, r26 }
+    a598:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; sb r25, r26 }
+    a5a0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shri r15, r16, 5 ; sb r25, r26 }
+    a5a8:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; sb r25, r26 }
+    a5b0:	[0-9a-f]* 	{ xor r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+    a5b8:	[0-9a-f]* 	{ xor r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 }
+    a5c0:	[0-9a-f]* 	{ xor r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    a5c8:	[0-9a-f]* 	{ xor r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 }
+    a5d0:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; sbadd r15, r16, 5 }
+    a5d8:	[0-9a-f]* 	{ maxb_u r5, r6, r7 ; sbadd r15, r16, 5 }
+    a5e0:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; sbadd r15, r16, 5 }
+    a5e8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sbadd r15, r16, 5 }
+    a5f0:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; sbadd r15, r16, 5 }
+    a5f8:	[0-9a-f]* 	{ shrib r5, r6, 5 ; sbadd r15, r16, 5 }
+    a600:	[0-9a-f]* 	{ sne r5, r6, r7 ; sbadd r15, r16, 5 }
+    a608:	[0-9a-f]* 	{ xori r5, r6, 5 ; sbadd r15, r16, 5 }
+    a610:	[0-9a-f]* 	{ seq r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
+    a618:	[0-9a-f]* 	{ seq r15, r16, r17 ; and r5, r6, r7 ; sw r25, r26 }
+    a620:	[0-9a-f]* 	{ bitx r5, r6 ; seq r15, r16, r17 ; prefetch r25 }
+    a628:	[0-9a-f]* 	{ clz r5, r6 ; seq r15, r16, r17 ; prefetch r25 }
+    a630:	[0-9a-f]* 	{ seq r15, r16, r17 ; lh r25, r26 }
+    a638:	[0-9a-f]* 	{ seq r15, r16, r17 ; inthh r5, r6, r7 }
+    a640:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+    a648:	[0-9a-f]* 	{ seq r15, r16, r17 ; shl r5, r6, r7 ; lb r25, r26 }
+    a650:	[0-9a-f]* 	{ seq r15, r16, r17 ; add r5, r6, r7 ; lb_u r25, r26 }
+    a658:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    a660:	[0-9a-f]* 	{ seq r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    a668:	[0-9a-f]* 	{ seq r15, r16, r17 ; andi r5, r6, 5 ; lh r25, r26 }
+    a670:	[0-9a-f]* 	{ mvz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+    a678:	[0-9a-f]* 	{ seq r15, r16, r17 ; slte r5, r6, r7 ; lh r25, r26 }
+    a680:	[0-9a-f]* 	{ clz r5, r6 ; seq r15, r16, r17 ; lh_u r25, r26 }
+    a688:	[0-9a-f]* 	{ seq r15, r16, r17 ; nor r5, r6, r7 ; lh_u r25, r26 }
+    a690:	[0-9a-f]* 	{ seq r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    a698:	[0-9a-f]* 	{ seq r15, r16, r17 ; info 19 ; lw r25, r26 }
+    a6a0:	[0-9a-f]* 	{ pcnt r5, r6 ; seq r15, r16, r17 ; lw r25, r26 }
+    a6a8:	[0-9a-f]* 	{ seq r15, r16, r17 ; srai r5, r6, 5 ; lw r25, r26 }
+    a6b0:	[0-9a-f]* 	{ seq r15, r16, r17 ; mnz r5, r6, r7 ; lh_u r25, r26 }
+    a6b8:	[0-9a-f]* 	{ seq r15, r16, r17 ; movei r5, 5 ; lb_u r25, r26 }
+    a6c0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; seq r15, r16, r17 }
+    a6c8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    a6d0:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; seq r15, r16, r17 }
+    a6d8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    a6e0:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 }
+    a6e8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+    a6f0:	[0-9a-f]* 	{ seq r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+    a6f8:	[0-9a-f]* 	{ seq r15, r16, r17 ; nor r5, r6, r7 ; lh_u r25, r26 }
+    a700:	[0-9a-f]* 	{ seq r15, r16, r17 ; ori r5, r6, 5 ; lh_u r25, r26 }
+    a708:	[0-9a-f]* 	{ pcnt r5, r6 ; seq r15, r16, r17 }
+    a710:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+    a718:	[0-9a-f]* 	{ seq r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 }
+    a720:	[0-9a-f]* 	{ seq r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 }
+    a728:	[0-9a-f]* 	{ seq r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    a730:	[0-9a-f]* 	{ seq r15, r16, r17 ; s3a r5, r6, r7 ; lh r25, r26 }
+    a738:	[0-9a-f]* 	{ clz r5, r6 ; seq r15, r16, r17 ; sb r25, r26 }
+    a740:	[0-9a-f]* 	{ seq r15, r16, r17 ; nor r5, r6, r7 ; sb r25, r26 }
+    a748:	[0-9a-f]* 	{ seq r15, r16, r17 ; slti_u r5, r6, 5 ; sb r25, r26 }
+    a750:	[0-9a-f]* 	{ seq r15, r16, r17 ; seq r5, r6, r7 }
+    a758:	[0-9a-f]* 	{ bytex r5, r6 ; seq r15, r16, r17 ; sh r25, r26 }
+    a760:	[0-9a-f]* 	{ seq r15, r16, r17 ; nop ; sh r25, r26 }
+    a768:	[0-9a-f]* 	{ seq r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 }
+    a770:	[0-9a-f]* 	{ seq r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 }
+    a778:	[0-9a-f]* 	{ seq r15, r16, r17 ; shr r5, r6, r7 ; lw r25, r26 }
+    a780:	[0-9a-f]* 	{ seq r15, r16, r17 ; slt r5, r6, r7 ; lb r25, r26 }
+    a788:	[0-9a-f]* 	{ seq r15, r16, r17 ; sltb r5, r6, r7 }
+    a790:	[0-9a-f]* 	{ seq r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    a798:	[0-9a-f]* 	{ seq r15, r16, r17 ; slti_u r5, r6, 5 ; lh r25, r26 }
+    a7a0:	[0-9a-f]* 	{ seq r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 }
+    a7a8:	[0-9a-f]* 	{ seq r15, r16, r17 ; srai r5, r6, 5 ; lw r25, r26 }
+    a7b0:	[0-9a-f]* 	{ seq r15, r16, r17 ; subh r5, r6, r7 }
+    a7b8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    a7c0:	[0-9a-f]* 	{ seq r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 }
+    a7c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; seq r15, r16, r17 ; lb r25, r26 }
+    a7d0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; seq r15, r16, r17 ; lb r25, r26 }
+    a7d8:	[0-9a-f]* 	{ seq r15, r16, r17 ; xor r5, r6, r7 ; lb r25, r26 }
+    a7e0:	[0-9a-f]* 	{ seq r5, r6, r7 ; add r15, r16, r17 }
+    a7e8:	[0-9a-f]* 	{ seq r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    a7f0:	[0-9a-f]* 	{ seq r5, r6, r7 ; auli r15, r16, 4660 }
+    a7f8:	[0-9a-f]* 	{ seq r5, r6, r7 ; ill ; prefetch r25 }
+    a800:	[0-9a-f]* 	{ seq r5, r6, r7 ; inv r15 }
+    a808:	[0-9a-f]* 	{ seq r5, r6, r7 ; or r15, r16, r17 ; lb r25, r26 }
+    a810:	[0-9a-f]* 	{ seq r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 }
+    a818:	[0-9a-f]* 	{ seq r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    a820:	[0-9a-f]* 	{ seq r5, r6, r7 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    a828:	[0-9a-f]* 	{ seq r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    a830:	[0-9a-f]* 	{ seq r5, r6, r7 ; sra r15, r16, r17 ; lh r25, r26 }
+    a838:	[0-9a-f]* 	{ seq r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    a840:	[0-9a-f]* 	{ seq r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    a848:	[0-9a-f]* 	{ seq r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    a850:	[0-9a-f]* 	{ seq r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    a858:	[0-9a-f]* 	{ seq r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+    a860:	[0-9a-f]* 	{ seq r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    a868:	[0-9a-f]* 	{ seq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+    a870:	[0-9a-f]* 	{ seq r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    a878:	[0-9a-f]* 	{ seq r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    a880:	[0-9a-f]* 	{ seq r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+    a888:	[0-9a-f]* 	{ seq r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+    a890:	[0-9a-f]* 	{ seq r5, r6, r7 ; rl r15, r16, r17 }
+    a898:	[0-9a-f]* 	{ seq r5, r6, r7 ; s1a r15, r16, r17 }
+    a8a0:	[0-9a-f]* 	{ seq r5, r6, r7 ; s3a r15, r16, r17 }
+    a8a8:	[0-9a-f]* 	{ seq r5, r6, r7 ; s2a r15, r16, r17 ; sb r25, r26 }
+    a8b0:	[0-9a-f]* 	{ seq r5, r6, r7 ; sbadd r15, r16, 5 }
+    a8b8:	[0-9a-f]* 	{ seq r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    a8c0:	[0-9a-f]* 	{ seq r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    a8c8:	[0-9a-f]* 	{ seq r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    a8d0:	[0-9a-f]* 	{ seq r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    a8d8:	[0-9a-f]* 	{ seq r5, r6, r7 ; shrh r15, r16, r17 }
+    a8e0:	[0-9a-f]* 	{ seq r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    a8e8:	[0-9a-f]* 	{ seq r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+    a8f0:	[0-9a-f]* 	{ seq r5, r6, r7 ; slth_u r15, r16, r17 }
+    a8f8:	[0-9a-f]* 	{ seq r5, r6, r7 ; slti_u r15, r16, 5 }
+    a900:	[0-9a-f]* 	{ seq r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 }
+    a908:	[0-9a-f]* 	{ seq r5, r6, r7 ; sraih r15, r16, 5 }
+    a910:	[0-9a-f]* 	{ seq r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 }
+    a918:	[0-9a-f]* 	{ seq r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+    a920:	[0-9a-f]* 	{ seq r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+    a928:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; seqb r15, r16, r17 }
+    a930:	[0-9a-f]* 	{ seqb r15, r16, r17 ; intlh r5, r6, r7 }
+    a938:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seqb r15, r16, r17 }
+    a940:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seqb r15, r16, r17 }
+    a948:	[0-9a-f]* 	{ sadah r5, r6, r7 ; seqb r15, r16, r17 }
+    a950:	[0-9a-f]* 	{ seqb r15, r16, r17 ; shri r5, r6, 5 }
+    a958:	[0-9a-f]* 	{ seqb r15, r16, r17 ; sltih_u r5, r6, 5 }
+    a960:	[0-9a-f]* 	{ seqb r15, r16, r17 ; xor r5, r6, r7 }
+    a968:	[0-9a-f]* 	{ seqb r5, r6, r7 ; icoh r15 }
+    a970:	[0-9a-f]* 	{ seqb r5, r6, r7 ; lhadd r15, r16, 5 }
+    a978:	[0-9a-f]* 	{ seqb r5, r6, r7 ; mnzh r15, r16, r17 }
+    a980:	[0-9a-f]* 	{ seqb r5, r6, r7 ; rli r15, r16, 5 }
+    a988:	[0-9a-f]* 	{ seqb r5, r6, r7 ; shr r15, r16, r17 }
+    a990:	[0-9a-f]* 	{ seqb r5, r6, r7 ; sltib r15, r16, 5 }
+    a998:	[0-9a-f]* 	{ seqb r5, r6, r7 ; swadd r15, r16, 5 }
+    a9a0:	[0-9a-f]* 	{ seqh r15, r16, r17 ; auli r5, r6, 4660 }
+    a9a8:	[0-9a-f]* 	{ seqh r15, r16, r17 ; maxih r5, r6, 5 }
+    a9b0:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; seqh r15, r16, r17 }
+    a9b8:	[0-9a-f]* 	{ seqh r15, r16, r17 ; mzh r5, r6, r7 }
+    a9c0:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; seqh r15, r16, r17 }
+    a9c8:	[0-9a-f]* 	{ seqh r15, r16, r17 ; slt_u r5, r6, r7 }
+    a9d0:	[0-9a-f]* 	{ seqh r15, r16, r17 ; sra r5, r6, r7 }
+    a9d8:	[0-9a-f]* 	{ seqh r5, r6, r7 ; addbs_u r15, r16, r17 }
+    a9e0:	[0-9a-f]* 	{ seqh r5, r6, r7 ; inthb r15, r16, r17 }
+    a9e8:	[0-9a-f]* 	{ seqh r5, r6, r7 ; lw_na r15, r16 }
+    a9f0:	[0-9a-f]* 	{ seqh r5, r6, r7 ; moveli.sn r15, 4660 }
+    a9f8:	[0-9a-f]* 	{ seqh r5, r6, r7 ; sb r15, r16 }
+    aa00:	[0-9a-f]* 	{ seqh r5, r6, r7 ; shrib r15, r16, 5 }
+    aa08:	[0-9a-f]* 	{ seqh r5, r6, r7 ; sne r15, r16, r17 }
+    aa10:	[0-9a-f]* 	{ seqh r5, r6, r7 ; xori r15, r16, 5 }
+    aa18:	[0-9a-f]* 	{ seqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
+    aa20:	[0-9a-f]* 	{ seqi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 }
+    aa28:	[0-9a-f]* 	{ bitx r5, r6 ; seqi r15, r16, 5 ; prefetch r25 }
+    aa30:	[0-9a-f]* 	{ clz r5, r6 ; seqi r15, r16, 5 ; prefetch r25 }
+    aa38:	[0-9a-f]* 	{ seqi r15, r16, 5 ; lh r25, r26 }
+    aa40:	[0-9a-f]* 	{ seqi r15, r16, 5 ; inthh r5, r6, r7 }
+    aa48:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 }
+    aa50:	[0-9a-f]* 	{ seqi r15, r16, 5 ; shl r5, r6, r7 ; lb r25, r26 }
+    aa58:	[0-9a-f]* 	{ seqi r15, r16, 5 ; add r5, r6, r7 ; lb_u r25, r26 }
+    aa60:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seqi r15, r16, 5 ; lb_u r25, r26 }
+    aa68:	[0-9a-f]* 	{ seqi r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    aa70:	[0-9a-f]* 	{ seqi r15, r16, 5 ; andi r5, r6, 5 ; lh r25, r26 }
+    aa78:	[0-9a-f]* 	{ mvz r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 }
+    aa80:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slte r5, r6, r7 ; lh r25, r26 }
+    aa88:	[0-9a-f]* 	{ clz r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 }
+    aa90:	[0-9a-f]* 	{ seqi r15, r16, 5 ; nor r5, r6, r7 ; lh_u r25, r26 }
+    aa98:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    aaa0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; info 19 ; lw r25, r26 }
+    aaa8:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; lw r25, r26 }
+    aab0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; srai r5, r6, 5 ; lw r25, r26 }
+    aab8:	[0-9a-f]* 	{ seqi r15, r16, 5 ; mnz r5, r6, r7 ; lh_u r25, r26 }
+    aac0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; movei r5, 5 ; lb_u r25, r26 }
+    aac8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 }
+    aad0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    aad8:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; seqi r15, r16, 5 }
+    aae0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    aae8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    aaf0:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    aaf8:	[0-9a-f]* 	{ seqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
+    ab00:	[0-9a-f]* 	{ seqi r15, r16, 5 ; nor r5, r6, r7 ; lh_u r25, r26 }
+    ab08:	[0-9a-f]* 	{ seqi r15, r16, 5 ; ori r5, r6, 5 ; lh_u r25, r26 }
+    ab10:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 }
+    ab18:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    ab20:	[0-9a-f]* 	{ seqi r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 }
+    ab28:	[0-9a-f]* 	{ seqi r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 }
+    ab30:	[0-9a-f]* 	{ seqi r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    ab38:	[0-9a-f]* 	{ seqi r15, r16, 5 ; s3a r5, r6, r7 ; lh r25, r26 }
+    ab40:	[0-9a-f]* 	{ clz r5, r6 ; seqi r15, r16, 5 ; sb r25, r26 }
+    ab48:	[0-9a-f]* 	{ seqi r15, r16, 5 ; nor r5, r6, r7 ; sb r25, r26 }
+    ab50:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slti_u r5, r6, 5 ; sb r25, r26 }
+    ab58:	[0-9a-f]* 	{ seqi r15, r16, 5 ; seq r5, r6, r7 }
+    ab60:	[0-9a-f]* 	{ bytex r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 }
+    ab68:	[0-9a-f]* 	{ seqi r15, r16, 5 ; nop ; sh r25, r26 }
+    ab70:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slti r5, r6, 5 ; sh r25, r26 }
+    ab78:	[0-9a-f]* 	{ seqi r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 }
+    ab80:	[0-9a-f]* 	{ seqi r15, r16, 5 ; shr r5, r6, r7 ; lw r25, r26 }
+    ab88:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slt r5, r6, r7 ; lb r25, r26 }
+    ab90:	[0-9a-f]* 	{ seqi r15, r16, 5 ; sltb r5, r6, r7 }
+    ab98:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    aba0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; slti_u r5, r6, 5 ; lh r25, r26 }
+    aba8:	[0-9a-f]* 	{ seqi r15, r16, 5 ; sne r5, r6, r7 ; sw r25, r26 }
+    abb0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; srai r5, r6, 5 ; lw r25, r26 }
+    abb8:	[0-9a-f]* 	{ seqi r15, r16, 5 ; subh r5, r6, r7 }
+    abc0:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    abc8:	[0-9a-f]* 	{ seqi r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 }
+    abd0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 }
+    abd8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; seqi r15, r16, 5 ; lb r25, r26 }
+    abe0:	[0-9a-f]* 	{ seqi r15, r16, 5 ; xor r5, r6, r7 ; lb r25, r26 }
+    abe8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; add r15, r16, r17 }
+    abf0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    abf8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; auli r15, r16, 4660 }
+    ac00:	[0-9a-f]* 	{ seqi r5, r6, 5 ; ill ; prefetch r25 }
+    ac08:	[0-9a-f]* 	{ seqi r5, r6, 5 ; inv r15 }
+    ac10:	[0-9a-f]* 	{ seqi r5, r6, 5 ; or r15, r16, r17 ; lb r25, r26 }
+    ac18:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sra r15, r16, r17 ; lb r25, r26 }
+    ac20:	[0-9a-f]* 	{ seqi r5, r6, 5 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    ac28:	[0-9a-f]* 	{ seqi r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    ac30:	[0-9a-f]* 	{ seqi r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+    ac38:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sra r15, r16, r17 ; lh r25, r26 }
+    ac40:	[0-9a-f]* 	{ seqi r5, r6, 5 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    ac48:	[0-9a-f]* 	{ seqi r5, r6, 5 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    ac50:	[0-9a-f]* 	{ seqi r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 }
+    ac58:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+    ac60:	[0-9a-f]* 	{ seqi r5, r6, 5 ; mnz r15, r16, r17 ; lb r25, r26 }
+    ac68:	[0-9a-f]* 	{ seqi r5, r6, 5 ; move r15, r16 ; sw r25, r26 }
+    ac70:	[0-9a-f]* 	{ seqi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 }
+    ac78:	[0-9a-f]* 	{ seqi r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    ac80:	[0-9a-f]* 	{ seqi r5, r6, 5 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    ac88:	[0-9a-f]* 	{ seqi r5, r6, 5 ; move r15, r16 ; prefetch r25 }
+    ac90:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slte r15, r16, r17 ; prefetch r25 }
+    ac98:	[0-9a-f]* 	{ seqi r5, r6, 5 ; rl r15, r16, r17 }
+    aca0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; s1a r15, r16, r17 }
+    aca8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; s3a r15, r16, r17 }
+    acb0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; s2a r15, r16, r17 ; sb r25, r26 }
+    acb8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sbadd r15, r16, 5 }
+    acc0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 }
+    acc8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; ori r15, r16, 5 ; sh r25, r26 }
+    acd0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; srai r15, r16, 5 ; sh r25, r26 }
+    acd8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    ace0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; shrh r15, r16, r17 }
+    ace8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 }
+    acf0:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slte r15, r16, r17 ; prefetch r25 }
+    acf8:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slth_u r15, r16, r17 }
+    ad00:	[0-9a-f]* 	{ seqi r5, r6, 5 ; slti_u r15, r16, 5 }
+    ad08:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sra r15, r16, r17 ; lh_u r25, r26 }
+    ad10:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sraih r15, r16, 5 }
+    ad18:	[0-9a-f]* 	{ seqi r5, r6, 5 ; andi r15, r16, 5 ; sw r25, r26 }
+    ad20:	[0-9a-f]* 	{ seqi r5, r6, 5 ; shli r15, r16, 5 ; sw r25, r26 }
+    ad28:	[0-9a-f]* 	{ seqi r5, r6, 5 ; xor r15, r16, r17 ; lh r25, r26 }
+    ad30:	[0-9a-f]* 	{ adiffb_u r5, r6, r7 ; seqib r15, r16, 5 }
+    ad38:	[0-9a-f]* 	{ seqib r15, r16, 5 ; intlh r5, r6, r7 }
+    ad40:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; seqib r15, r16, 5 }
+    ad48:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; seqib r15, r16, 5 }
+    ad50:	[0-9a-f]* 	{ sadah r5, r6, r7 ; seqib r15, r16, 5 }
+    ad58:	[0-9a-f]* 	{ seqib r15, r16, 5 ; shri r5, r6, 5 }
+    ad60:	[0-9a-f]* 	{ seqib r15, r16, 5 ; sltih_u r5, r6, 5 }
+    ad68:	[0-9a-f]* 	{ seqib r15, r16, 5 ; xor r5, r6, r7 }
+    ad70:	[0-9a-f]* 	{ seqib r5, r6, 5 ; icoh r15 }
+    ad78:	[0-9a-f]* 	{ seqib r5, r6, 5 ; lhadd r15, r16, 5 }
+    ad80:	[0-9a-f]* 	{ seqib r5, r6, 5 ; mnzh r15, r16, r17 }
+    ad88:	[0-9a-f]* 	{ seqib r5, r6, 5 ; rli r15, r16, 5 }
+    ad90:	[0-9a-f]* 	{ seqib r5, r6, 5 ; shr r15, r16, r17 }
+    ad98:	[0-9a-f]* 	{ seqib r5, r6, 5 ; sltib r15, r16, 5 }
+    ada0:	[0-9a-f]* 	{ seqib r5, r6, 5 ; swadd r15, r16, 5 }
+    ada8:	[0-9a-f]* 	{ seqih r15, r16, 5 ; auli r5, r6, 4660 }
+    adb0:	[0-9a-f]* 	{ seqih r15, r16, 5 ; maxih r5, r6, 5 }
+    adb8:	[0-9a-f]* 	{ mulhl_ss r5, r6, r7 ; seqih r15, r16, 5 }
+    adc0:	[0-9a-f]* 	{ seqih r15, r16, 5 ; mzh r5, r6, r7 }
+    adc8:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; seqih r15, r16, 5 }
+    add0:	[0-9a-f]* 	{ seqih r15, r16, 5 ; slt_u r5, r6, r7 }
+    add8:	[0-9a-f]* 	{ seqih r15, r16, 5 ; sra r5, r6, r7 }
+    ade0:	[0-9a-f]* 	{ seqih r5, r6, 5 ; addbs_u r15, r16, r17 }
+    ade8:	[0-9a-f]* 	{ seqih r5, r6, 5 ; inthb r15, r16, r17 }
+    adf0:	[0-9a-f]* 	{ seqih r5, r6, 5 ; lw_na r15, r16 }
+    adf8:	[0-9a-f]* 	{ seqih r5, r6, 5 ; moveli.sn r15, 4660 }
+    ae00:	[0-9a-f]* 	{ seqih r5, r6, 5 ; sb r15, r16 }
+    ae08:	[0-9a-f]* 	{ seqih r5, r6, 5 ; shrib r15, r16, 5 }
+    ae10:	[0-9a-f]* 	{ seqih r5, r6, 5 ; sne r15, r16, r17 }
+    ae18:	[0-9a-f]* 	{ seqih r5, r6, 5 ; xori r15, r16, 5 }
+    ae20:	[0-9a-f]* 	{ bytex r5, r6 ; sh r15, r16 }
+    ae28:	[0-9a-f]* 	{ minih r5, r6, 5 ; sh r15, r16 }
+    ae30:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; sh r15, r16 }
+    ae38:	[0-9a-f]* 	{ ori r5, r6, 5 ; sh r15, r16 }
+    ae40:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sh r15, r16 }
+    ae48:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sh r15, r16 }
+    ae50:	[0-9a-f]* 	{ sraib r5, r6, 5 ; sh r15, r16 }
+    ae58:	[0-9a-f]* 	{ clz r5, r6 ; add r15, r16, r17 ; sh r25, r26 }
+    ae60:	[0-9a-f]* 	{ add r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 }
+    ae68:	[0-9a-f]* 	{ add r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    ae70:	[0-9a-f]* 	{ add r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    ae78:	[0-9a-f]* 	{ add r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    ae80:	[0-9a-f]* 	{ addi r15, r16, 5 ; move r5, r6 ; sh r25, r26 }
+    ae88:	[0-9a-f]* 	{ addi r15, r16, 5 ; rli r5, r6, 5 ; sh r25, r26 }
+    ae90:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addi r15, r16, 5 ; sh r25, r26 }
+    ae98:	[0-9a-f]* 	{ addi r5, r6, 5 ; ori r15, r16, 5 ; sh r25, r26 }
+    aea0:	[0-9a-f]* 	{ addi r5, r6, 5 ; srai r15, r16, 5 ; sh r25, r26 }
+    aea8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 }
+    aeb0:	[0-9a-f]* 	{ and r15, r16, r17 ; seqi r5, r6, 5 ; sh r25, r26 }
+    aeb8:	[0-9a-f]* 	{ and r15, r16, r17 ; sh r25, r26 }
+    aec0:	[0-9a-f]* 	{ and r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    aec8:	[0-9a-f]* 	{ andi r15, r16, 5 ; addi r5, r6, 5 ; sh r25, r26 }
+    aed0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    aed8:	[0-9a-f]* 	{ andi r15, r16, 5 ; slt r5, r6, r7 ; sh r25, r26 }
+    aee0:	[0-9a-f]* 	{ andi r5, r6, 5 ; sh r25, r26 }
+    aee8:	[0-9a-f]* 	{ andi r5, r6, 5 ; shr r15, r16, r17 ; sh r25, r26 }
+    aef0:	[0-9a-f]* 	{ bitx r5, r6 ; info 19 ; sh r25, r26 }
+    aef8:	[0-9a-f]* 	{ bitx r5, r6 ; slt r15, r16, r17 ; sh r25, r26 }
+    af00:	[0-9a-f]* 	{ bytex r5, r6 ; move r15, r16 ; sh r25, r26 }
+    af08:	[0-9a-f]* 	{ bytex r5, r6 ; slte r15, r16, r17 ; sh r25, r26 }
+    af10:	[0-9a-f]* 	{ clz r5, r6 ; mz r15, r16, r17 ; sh r25, r26 }
+    af18:	[0-9a-f]* 	{ clz r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+    af20:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 ; sh r25, r26 }
+    af28:	[0-9a-f]* 	{ ctz r5, r6 ; sne r15, r16, r17 ; sh r25, r26 }
+    af30:	[0-9a-f]* 	{ info 19 ; sh r25, r26 }
+    af38:	[0-9a-f]* 	{ nop ; sh r25, r26 }
+    af40:	[0-9a-f]* 	{ seqi r15, r16, 5 ; sh r25, r26 }
+    af48:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; sh r25, r26 }
+    af50:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; sh r25, r26 }
+    af58:	[0-9a-f]* 	{ mvz r5, r6, r7 ; ill ; sh r25, r26 }
+    af60:	[0-9a-f]* 	{ slte r5, r6, r7 ; ill ; sh r25, r26 }
+    af68:	[0-9a-f]* 	{ info 19 ; andi r15, r16, 5 ; sh r25, r26 }
+    af70:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; info 19 ; sh r25, r26 }
+    af78:	[0-9a-f]* 	{ info 19 ; s1a r15, r16, r17 ; sh r25, r26 }
+    af80:	[0-9a-f]* 	{ info 19 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    af88:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; info 19 ; sh r25, r26 }
+    af90:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 }
+    af98:	[0-9a-f]* 	{ mnz r15, r16, r17 ; seq r5, r6, r7 ; sh r25, r26 }
+    afa0:	[0-9a-f]* 	{ mnz r15, r16, r17 ; xor r5, r6, r7 ; sh r25, r26 }
+    afa8:	[0-9a-f]* 	{ mnz r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 }
+    afb0:	[0-9a-f]* 	{ move r15, r16 ; add r5, r6, r7 ; sh r25, r26 }
+    afb8:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; move r15, r16 ; sh r25, r26 }
+    afc0:	[0-9a-f]* 	{ move r15, r16 ; shri r5, r6, 5 ; sh r25, r26 }
+    afc8:	[0-9a-f]* 	{ move r5, r6 ; andi r15, r16, 5 ; sh r25, r26 }
+    afd0:	[0-9a-f]* 	{ move r5, r6 ; shli r15, r16, 5 ; sh r25, r26 }
+    afd8:	[0-9a-f]* 	{ bytex r5, r6 ; movei r15, 5 ; sh r25, r26 }
+    afe0:	[0-9a-f]* 	{ movei r15, 5 ; nop ; sh r25, r26 }
+    afe8:	[0-9a-f]* 	{ movei r15, 5 ; slti r5, r6, 5 ; sh r25, r26 }
+    aff0:	[0-9a-f]* 	{ movei r5, 5 ; move r15, r16 ; sh r25, r26 }
+    aff8:	[0-9a-f]* 	{ movei r5, 5 ; slte r15, r16, r17 ; sh r25, r26 }
+    b000:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+    b008:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    b010:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 }
+    b018:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+    b020:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    b028:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    b030:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    b038:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    b040:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 }
+    b048:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 }
+    b050:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 }
+    b058:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 }
+    b060:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    b068:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; sh r25, r26 }
+    b070:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 }
+    b078:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; info 19 ; sh r25, r26 }
+    b080:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    b088:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; move r15, r16 ; sh r25, r26 }
+    b090:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 }
+    b098:	[0-9a-f]* 	{ mvz r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+    b0a0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    b0a8:	[0-9a-f]* 	{ mz r15, r16, r17 ; movei r5, 5 ; sh r25, r26 }
+    b0b0:	[0-9a-f]* 	{ mz r15, r16, r17 ; s1a r5, r6, r7 ; sh r25, r26 }
+    b0b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 }
+    b0c0:	[0-9a-f]* 	{ mz r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    b0c8:	[0-9a-f]* 	{ mz r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    b0d0:	[0-9a-f]* 	{ nop ; move r15, r16 ; sh r25, r26 }
+    b0d8:	[0-9a-f]* 	{ nop ; or r15, r16, r17 ; sh r25, r26 }
+    b0e0:	[0-9a-f]* 	{ nop ; shl r5, r6, r7 ; sh r25, r26 }
+    b0e8:	[0-9a-f]* 	{ nop ; sne r5, r6, r7 ; sh r25, r26 }
+    b0f0:	[0-9a-f]* 	{ clz r5, r6 ; nor r15, r16, r17 ; sh r25, r26 }
+    b0f8:	[0-9a-f]* 	{ nor r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 }
+    b100:	[0-9a-f]* 	{ nor r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    b108:	[0-9a-f]* 	{ nor r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    b110:	[0-9a-f]* 	{ nor r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    b118:	[0-9a-f]* 	{ or r15, r16, r17 ; move r5, r6 ; sh r25, r26 }
+    b120:	[0-9a-f]* 	{ or r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 }
+    b128:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; or r15, r16, r17 ; sh r25, r26 }
+    b130:	[0-9a-f]* 	{ or r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    b138:	[0-9a-f]* 	{ or r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    b140:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+    b148:	[0-9a-f]* 	{ ori r15, r16, 5 ; seqi r5, r6, 5 ; sh r25, r26 }
+    b150:	[0-9a-f]* 	{ ori r15, r16, 5 ; sh r25, r26 }
+    b158:	[0-9a-f]* 	{ ori r5, r6, 5 ; s3a r15, r16, r17 ; sh r25, r26 }
+    b160:	[0-9a-f]* 	{ pcnt r5, r6 ; addi r15, r16, 5 ; sh r25, r26 }
+    b168:	[0-9a-f]* 	{ pcnt r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b170:	[0-9a-f]* 	{ rl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    b178:	[0-9a-f]* 	{ mvz r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    b180:	[0-9a-f]* 	{ rl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    b188:	[0-9a-f]* 	{ rl r5, r6, r7 ; info 19 ; sh r25, r26 }
+    b190:	[0-9a-f]* 	{ rl r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    b198:	[0-9a-f]* 	{ rli r15, r16, 5 ; sh r25, r26 }
+    b1a0:	[0-9a-f]* 	{ rli r15, r16, 5 ; ori r5, r6, 5 ; sh r25, r26 }
+    b1a8:	[0-9a-f]* 	{ rli r15, r16, 5 ; sra r5, r6, r7 ; sh r25, r26 }
+    b1b0:	[0-9a-f]* 	{ rli r5, r6, 5 ; nop ; sh r25, r26 }
+    b1b8:	[0-9a-f]* 	{ rli r5, r6, 5 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    b1c0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 }
+    b1c8:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+    b1d0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s1a r15, r16, r17 ; sh r25, r26 }
+    b1d8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    b1e0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    b1e8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 }
+    b1f0:	[0-9a-f]* 	{ s2a r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 }
+    b1f8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 }
+    b200:	[0-9a-f]* 	{ s2a r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b208:	[0-9a-f]* 	{ s3a r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    b210:	[0-9a-f]* 	{ mvz r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    b218:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    b220:	[0-9a-f]* 	{ s3a r5, r6, r7 ; info 19 ; sh r25, r26 }
+    b228:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    b230:	[0-9a-f]* 	{ seq r15, r16, r17 ; sh r25, r26 }
+    b238:	[0-9a-f]* 	{ seq r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 }
+    b240:	[0-9a-f]* 	{ seq r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 }
+    b248:	[0-9a-f]* 	{ seq r5, r6, r7 ; nop ; sh r25, r26 }
+    b250:	[0-9a-f]* 	{ seq r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    b258:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b260:	[0-9a-f]* 	{ seqi r15, r16, 5 ; s2a r5, r6, r7 ; sh r25, r26 }
+    b268:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b270:	[0-9a-f]* 	{ seqi r5, r6, 5 ; rli r15, r16, 5 ; sh r25, r26 }
+    b278:	[0-9a-f]* 	{ seqi r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 }
+    b280:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    b288:	[0-9a-f]* 	{ shl r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 }
+    b290:	[0-9a-f]* 	{ shl r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 }
+    b298:	[0-9a-f]* 	{ shl r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b2a0:	[0-9a-f]* 	{ shli r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+    b2a8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    b2b0:	[0-9a-f]* 	{ shli r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+    b2b8:	[0-9a-f]* 	{ shli r5, r6, 5 ; info 19 ; sh r25, r26 }
+    b2c0:	[0-9a-f]* 	{ shli r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 }
+    b2c8:	[0-9a-f]* 	{ shr r15, r16, r17 ; sh r25, r26 }
+    b2d0:	[0-9a-f]* 	{ shr r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 }
+    b2d8:	[0-9a-f]* 	{ shr r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 }
+    b2e0:	[0-9a-f]* 	{ shr r5, r6, r7 ; nop ; sh r25, r26 }
+    b2e8:	[0-9a-f]* 	{ shr r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    b2f0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 }
+    b2f8:	[0-9a-f]* 	{ shri r15, r16, 5 ; s2a r5, r6, r7 ; sh r25, r26 }
+    b300:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shri r15, r16, 5 ; sh r25, r26 }
+    b308:	[0-9a-f]* 	{ shri r5, r6, 5 ; rli r15, r16, 5 ; sh r25, r26 }
+    b310:	[0-9a-f]* 	{ shri r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 }
+    b318:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    b320:	[0-9a-f]* 	{ slt r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 }
+    b328:	[0-9a-f]* 	{ slt r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 }
+    b330:	[0-9a-f]* 	{ slt r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b338:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    b340:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    b348:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    b350:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; info 19 ; sh r25, r26 }
+    b358:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    b360:	[0-9a-f]* 	{ slte r15, r16, r17 ; sh r25, r26 }
+    b368:	[0-9a-f]* 	{ slte r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 }
+    b370:	[0-9a-f]* 	{ slte r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 }
+    b378:	[0-9a-f]* 	{ slte r5, r6, r7 ; nop ; sh r25, r26 }
+    b380:	[0-9a-f]* 	{ slte r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    b388:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    b390:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+    b398:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    b3a0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    b3a8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    b3b0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    b3b8:	[0-9a-f]* 	{ slti r15, r16, 5 ; shli r5, r6, 5 ; sh r25, r26 }
+    b3c0:	[0-9a-f]* 	{ slti r5, r6, 5 ; addi r15, r16, 5 ; sh r25, r26 }
+    b3c8:	[0-9a-f]* 	{ slti r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b3d0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+    b3d8:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    b3e0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+    b3e8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; info 19 ; sh r25, r26 }
+    b3f0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 }
+    b3f8:	[0-9a-f]* 	{ sne r15, r16, r17 ; sh r25, r26 }
+    b400:	[0-9a-f]* 	{ sne r15, r16, r17 ; ori r5, r6, 5 ; sh r25, r26 }
+    b408:	[0-9a-f]* 	{ sne r15, r16, r17 ; sra r5, r6, r7 ; sh r25, r26 }
+    b410:	[0-9a-f]* 	{ sne r5, r6, r7 ; nop ; sh r25, r26 }
+    b418:	[0-9a-f]* 	{ sne r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    b420:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 }
+    b428:	[0-9a-f]* 	{ sra r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+    b430:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; sh r25, r26 }
+    b438:	[0-9a-f]* 	{ sra r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    b440:	[0-9a-f]* 	{ sra r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    b448:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    b450:	[0-9a-f]* 	{ srai r15, r16, 5 ; shli r5, r6, 5 ; sh r25, r26 }
+    b458:	[0-9a-f]* 	{ srai r5, r6, 5 ; addi r15, r16, 5 ; sh r25, r26 }
+    b460:	[0-9a-f]* 	{ srai r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 }
+    b468:	[0-9a-f]* 	{ sub r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    b470:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    b478:	[0-9a-f]* 	{ sub r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    b480:	[0-9a-f]* 	{ sub r5, r6, r7 ; info 19 ; sh r25, r26 }
+    b488:	[0-9a-f]* 	{ sub r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    b490:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; sh r25, r26 }
+    b498:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte r15, r16, r17 ; sh r25, r26 }
+    b4a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 }
+    b4a8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+    b4b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; sh r25, r26 }
+    b4b8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sne r15, r16, r17 ; sh r25, r26 }
+    b4c0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; sh r25, r26 }
+    b4c8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 }
+    b4d0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    b4d8:	[0-9a-f]* 	{ xor r15, r16, r17 ; seqi r5, r6, 5 ; sh r25, r26 }
+    b4e0:	[0-9a-f]* 	{ xor r15, r16, r17 ; sh r25, r26 }
+    b4e8:	[0-9a-f]* 	{ xor r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+    b4f0:	[0-9a-f]* 	{ addb r5, r6, r7 ; shadd r15, r16, 5 }
+    b4f8:	[0-9a-f]* 	{ crc32_32 r5, r6, r7 ; shadd r15, r16, 5 }
+    b500:	[0-9a-f]* 	{ mnz r5, r6, r7 ; shadd r15, r16, 5 }
+    b508:	[0-9a-f]* 	{ mulhla_us r5, r6, r7 ; shadd r15, r16, 5 }
+    b510:	[0-9a-f]* 	{ packhb r5, r6, r7 ; shadd r15, r16, 5 }
+    b518:	[0-9a-f]* 	{ seqih r5, r6, 5 ; shadd r15, r16, 5 }
+    b520:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; shadd r15, r16, 5 }
+    b528:	[0-9a-f]* 	{ sub r5, r6, r7 ; shadd r15, r16, 5 }
+    b530:	[0-9a-f]* 	{ shl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    b538:	[0-9a-f]* 	{ shl r15, r16, r17 ; adds r5, r6, r7 }
+    b540:	[0-9a-f]* 	{ shl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    b548:	[0-9a-f]* 	{ bytex r5, r6 ; shl r15, r16, r17 ; lw r25, r26 }
+    b550:	[0-9a-f]* 	{ ctz r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+    b558:	[0-9a-f]* 	{ shl r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    b560:	[0-9a-f]* 	{ clz r5, r6 ; shl r15, r16, r17 ; lb r25, r26 }
+    b568:	[0-9a-f]* 	{ shl r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    b570:	[0-9a-f]* 	{ shl r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    b578:	[0-9a-f]* 	{ shl r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    b580:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    b588:	[0-9a-f]* 	{ shl r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    b590:	[0-9a-f]* 	{ shl r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    b598:	[0-9a-f]* 	{ shl r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    b5a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+    b5a8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    b5b0:	[0-9a-f]* 	{ shl r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    b5b8:	[0-9a-f]* 	{ shl r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    b5c0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    b5c8:	[0-9a-f]* 	{ shl r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    b5d0:	[0-9a-f]* 	{ shl r15, r16, r17 ; maxh r5, r6, r7 }
+    b5d8:	[0-9a-f]* 	{ shl r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    b5e0:	[0-9a-f]* 	{ shl r15, r16, r17 ; moveli r5, 4660 }
+    b5e8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    b5f0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    b5f8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    b600:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    b608:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 }
+    b610:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    b618:	[0-9a-f]* 	{ shl r15, r16, r17 ; nop ; lh r25, r26 }
+    b620:	[0-9a-f]* 	{ shl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    b628:	[0-9a-f]* 	{ shl r15, r16, r17 ; packhs r5, r6, r7 }
+    b630:	[0-9a-f]* 	{ shl r15, r16, r17 ; prefetch r25 }
+    b638:	[0-9a-f]* 	{ shl r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    b640:	[0-9a-f]* 	{ shl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    b648:	[0-9a-f]* 	{ shl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    b650:	[0-9a-f]* 	{ shl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    b658:	[0-9a-f]* 	{ sadah r5, r6, r7 ; shl r15, r16, r17 }
+    b660:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; sb r25, r26 }
+    b668:	[0-9a-f]* 	{ shl r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    b670:	[0-9a-f]* 	{ shl r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    b678:	[0-9a-f]* 	{ shl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    b680:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    b688:	[0-9a-f]* 	{ shl r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    b690:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shl r15, r16, r17 ; sh r25, r26 }
+    b698:	[0-9a-f]* 	{ shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    b6a0:	[0-9a-f]* 	{ shl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    b6a8:	[0-9a-f]* 	{ shl r15, r16, r17 ; slt r5, r6, r7 }
+    b6b0:	[0-9a-f]* 	{ shl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    b6b8:	[0-9a-f]* 	{ shl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    b6c0:	[0-9a-f]* 	{ shl r15, r16, r17 ; sltib_u r5, r6, 5 }
+    b6c8:	[0-9a-f]* 	{ shl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    b6d0:	[0-9a-f]* 	{ shl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    b6d8:	[0-9a-f]* 	{ clz r5, r6 ; shl r15, r16, r17 ; sw r25, r26 }
+    b6e0:	[0-9a-f]* 	{ shl r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    b6e8:	[0-9a-f]* 	{ shl r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    b6f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shl r15, r16, r17 }
+    b6f8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shl r15, r16, r17 }
+    b700:	[0-9a-f]* 	{ shl r15, r16, r17 ; xor r5, r6, r7 }
+    b708:	[0-9a-f]* 	{ shl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    b710:	[0-9a-f]* 	{ shl r5, r6, r7 ; and r15, r16, r17 }
+    b718:	[0-9a-f]* 	{ shl r5, r6, r7 ; prefetch r25 }
+    b720:	[0-9a-f]* 	{ shl r5, r6, r7 ; info 19 ; lw r25, r26 }
+    b728:	[0-9a-f]* 	{ shl r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    b730:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    b738:	[0-9a-f]* 	{ shl r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    b740:	[0-9a-f]* 	{ shl r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    b748:	[0-9a-f]* 	{ shl r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    b750:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    b758:	[0-9a-f]* 	{ shl r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    b760:	[0-9a-f]* 	{ shl r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    b768:	[0-9a-f]* 	{ shl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    b770:	[0-9a-f]* 	{ shl r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    b778:	[0-9a-f]* 	{ shl r5, r6, r7 ; maxb_u r15, r16, r17 }
+    b780:	[0-9a-f]* 	{ shl r5, r6, r7 ; mnz r15, r16, r17 }
+    b788:	[0-9a-f]* 	{ shl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    b790:	[0-9a-f]* 	{ shl r5, r6, r7 ; nop ; lh r25, r26 }
+    b798:	[0-9a-f]* 	{ shl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    b7a0:	[0-9a-f]* 	{ shl r5, r6, r7 ; packhs r15, r16, r17 }
+    b7a8:	[0-9a-f]* 	{ shl r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    b7b0:	[0-9a-f]* 	{ shl r5, r6, r7 ; prefetch r25 }
+    b7b8:	[0-9a-f]* 	{ shl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    b7c0:	[0-9a-f]* 	{ shl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    b7c8:	[0-9a-f]* 	{ shl r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    b7d0:	[0-9a-f]* 	{ shl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    b7d8:	[0-9a-f]* 	{ shl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    b7e0:	[0-9a-f]* 	{ shl r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    b7e8:	[0-9a-f]* 	{ shl r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    b7f0:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    b7f8:	[0-9a-f]* 	{ shl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    b800:	[0-9a-f]* 	{ shl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    b808:	[0-9a-f]* 	{ shl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    b810:	[0-9a-f]* 	{ shl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    b818:	[0-9a-f]* 	{ shl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    b820:	[0-9a-f]* 	{ shl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    b828:	[0-9a-f]* 	{ shl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    b830:	[0-9a-f]* 	{ shl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    b838:	[0-9a-f]* 	{ shl r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    b840:	[0-9a-f]* 	{ shl r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    b848:	[0-9a-f]* 	{ shlb r15, r16, r17 ; add r5, r6, r7 }
+    b850:	[0-9a-f]* 	{ clz r5, r6 ; shlb r15, r16, r17 }
+    b858:	[0-9a-f]* 	{ shlb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+    b860:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; shlb r15, r16, r17 }
+    b868:	[0-9a-f]* 	{ shlb r15, r16, r17 ; packbs_u r5, r6, r7 }
+    b870:	[0-9a-f]* 	{ shlb r15, r16, r17 ; seqib r5, r6, 5 }
+    b878:	[0-9a-f]* 	{ shlb r15, r16, r17 ; slteb r5, r6, r7 }
+    b880:	[0-9a-f]* 	{ shlb r15, r16, r17 ; sraih r5, r6, 5 }
+    b888:	[0-9a-f]* 	{ shlb r5, r6, r7 ; addih r15, r16, 5 }
+    b890:	[0-9a-f]* 	{ shlb r5, r6, r7 ; iret }
+    b898:	[0-9a-f]* 	{ shlb r5, r6, r7 ; maxib_u r15, r16, 5 }
+    b8a0:	[0-9a-f]* 	{ shlb r5, r6, r7 ; nop }
+    b8a8:	[0-9a-f]* 	{ shlb r5, r6, r7 ; seqi r15, r16, 5 }
+    b8b0:	[0-9a-f]* 	{ shlb r5, r6, r7 ; sltb_u r15, r16, r17 }
+    b8b8:	[0-9a-f]* 	{ shlb r5, r6, r7 ; srah r15, r16, r17 }
+    b8c0:	[0-9a-f]* 	{ shlh r15, r16, r17 ; addhs r5, r6, r7 }
+    b8c8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; shlh r15, r16, r17 }
+    b8d0:	[0-9a-f]* 	{ shlh r15, r16, r17 ; move r5, r6 }
+    b8d8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shlh r15, r16, r17 }
+    b8e0:	[0-9a-f]* 	{ pcnt r5, r6 ; shlh r15, r16, r17 }
+    b8e8:	[0-9a-f]* 	{ shlh r15, r16, r17 ; shlh r5, r6, r7 }
+    b8f0:	[0-9a-f]* 	{ shlh r15, r16, r17 ; slth r5, r6, r7 }
+    b8f8:	[0-9a-f]* 	{ shlh r15, r16, r17 ; subh r5, r6, r7 }
+    b900:	[0-9a-f]* 	{ shlh r5, r6, r7 ; and r15, r16, r17 }
+    b908:	[0-9a-f]* 	{ shlh r5, r6, r7 ; jrp r15 }
+    b910:	[0-9a-f]* 	{ shlh r5, r6, r7 ; minb_u r15, r16, r17 }
+    b918:	[0-9a-f]* 	{ shlh r5, r6, r7 ; packbs_u r15, r16, r17 }
+    b920:	[0-9a-f]* 	{ shlh r5, r6, r7 ; shadd r15, r16, 5 }
+    b928:	[0-9a-f]* 	{ shlh r5, r6, r7 ; slteb_u r15, r16, r17 }
+    b930:	[0-9a-f]* 	{ shlh r5, r6, r7 ; sub r15, r16, r17 }
+    b938:	[0-9a-f]* 	{ shli r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+    b940:	[0-9a-f]* 	{ shli r15, r16, 5 ; adds r5, r6, r7 }
+    b948:	[0-9a-f]* 	{ shli r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+    b950:	[0-9a-f]* 	{ bytex r5, r6 ; shli r15, r16, 5 ; lw r25, r26 }
+    b958:	[0-9a-f]* 	{ ctz r5, r6 ; shli r15, r16, 5 ; lh r25, r26 }
+    b960:	[0-9a-f]* 	{ shli r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    b968:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; lb r25, r26 }
+    b970:	[0-9a-f]* 	{ shli r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 }
+    b978:	[0-9a-f]* 	{ shli r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    b980:	[0-9a-f]* 	{ shli r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    b988:	[0-9a-f]* 	{ pcnt r5, r6 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    b990:	[0-9a-f]* 	{ shli r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    b998:	[0-9a-f]* 	{ shli r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    b9a0:	[0-9a-f]* 	{ shli r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    b9a8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; lh r25, r26 }
+    b9b0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    b9b8:	[0-9a-f]* 	{ shli r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    b9c0:	[0-9a-f]* 	{ shli r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    b9c8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    b9d0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 }
+    b9d8:	[0-9a-f]* 	{ shli r15, r16, 5 ; maxh r5, r6, r7 }
+    b9e0:	[0-9a-f]* 	{ shli r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+    b9e8:	[0-9a-f]* 	{ shli r15, r16, 5 ; moveli r5, 4660 }
+    b9f0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    b9f8:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    ba00:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    ba08:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    ba10:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+    ba18:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    ba20:	[0-9a-f]* 	{ shli r15, r16, 5 ; nop ; lh r25, r26 }
+    ba28:	[0-9a-f]* 	{ shli r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    ba30:	[0-9a-f]* 	{ shli r15, r16, 5 ; packhs r5, r6, r7 }
+    ba38:	[0-9a-f]* 	{ shli r15, r16, 5 ; prefetch r25 }
+    ba40:	[0-9a-f]* 	{ shli r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 }
+    ba48:	[0-9a-f]* 	{ shli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    ba50:	[0-9a-f]* 	{ shli r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    ba58:	[0-9a-f]* 	{ shli r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    ba60:	[0-9a-f]* 	{ sadah r5, r6, r7 ; shli r15, r16, 5 }
+    ba68:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+    ba70:	[0-9a-f]* 	{ shli r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 }
+    ba78:	[0-9a-f]* 	{ shli r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 }
+    ba80:	[0-9a-f]* 	{ shli r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+    ba88:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    ba90:	[0-9a-f]* 	{ shli r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 }
+    ba98:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shli r15, r16, 5 ; sh r25, r26 }
+    baa0:	[0-9a-f]* 	{ shli r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    baa8:	[0-9a-f]* 	{ shli r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    bab0:	[0-9a-f]* 	{ shli r15, r16, 5 ; slt r5, r6, r7 }
+    bab8:	[0-9a-f]* 	{ shli r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+    bac0:	[0-9a-f]* 	{ shli r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    bac8:	[0-9a-f]* 	{ shli r15, r16, 5 ; sltib_u r5, r6, 5 }
+    bad0:	[0-9a-f]* 	{ shli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    bad8:	[0-9a-f]* 	{ shli r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    bae0:	[0-9a-f]* 	{ clz r5, r6 ; shli r15, r16, 5 ; sw r25, r26 }
+    bae8:	[0-9a-f]* 	{ shli r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+    baf0:	[0-9a-f]* 	{ shli r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    baf8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shli r15, r16, 5 }
+    bb00:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shli r15, r16, 5 }
+    bb08:	[0-9a-f]* 	{ shli r15, r16, 5 ; xor r5, r6, r7 }
+    bb10:	[0-9a-f]* 	{ shli r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    bb18:	[0-9a-f]* 	{ shli r5, r6, 5 ; and r15, r16, r17 }
+    bb20:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch r25 }
+    bb28:	[0-9a-f]* 	{ shli r5, r6, 5 ; info 19 ; lw r25, r26 }
+    bb30:	[0-9a-f]* 	{ shli r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    bb38:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    bb40:	[0-9a-f]* 	{ shli r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    bb48:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    bb50:	[0-9a-f]* 	{ shli r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 }
+    bb58:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+    bb60:	[0-9a-f]* 	{ shli r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    bb68:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    bb70:	[0-9a-f]* 	{ shli r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    bb78:	[0-9a-f]* 	{ shli r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 }
+    bb80:	[0-9a-f]* 	{ shli r5, r6, 5 ; maxb_u r15, r16, r17 }
+    bb88:	[0-9a-f]* 	{ shli r5, r6, 5 ; mnz r15, r16, r17 }
+    bb90:	[0-9a-f]* 	{ shli r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+    bb98:	[0-9a-f]* 	{ shli r5, r6, 5 ; nop ; lh r25, r26 }
+    bba0:	[0-9a-f]* 	{ shli r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+    bba8:	[0-9a-f]* 	{ shli r5, r6, 5 ; packhs r15, r16, r17 }
+    bbb0:	[0-9a-f]* 	{ shli r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 }
+    bbb8:	[0-9a-f]* 	{ shli r5, r6, 5 ; prefetch r25 }
+    bbc0:	[0-9a-f]* 	{ shli r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+    bbc8:	[0-9a-f]* 	{ shli r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+    bbd0:	[0-9a-f]* 	{ shli r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 }
+    bbd8:	[0-9a-f]* 	{ shli r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    bbe0:	[0-9a-f]* 	{ shli r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+    bbe8:	[0-9a-f]* 	{ shli r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 }
+    bbf0:	[0-9a-f]* 	{ shli r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 }
+    bbf8:	[0-9a-f]* 	{ shli r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+    bc00:	[0-9a-f]* 	{ shli r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+    bc08:	[0-9a-f]* 	{ shli r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+    bc10:	[0-9a-f]* 	{ shli r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    bc18:	[0-9a-f]* 	{ shli r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    bc20:	[0-9a-f]* 	{ shli r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+    bc28:	[0-9a-f]* 	{ shli r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+    bc30:	[0-9a-f]* 	{ shli r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+    bc38:	[0-9a-f]* 	{ shli r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+    bc40:	[0-9a-f]* 	{ shli r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+    bc48:	[0-9a-f]* 	{ shli r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 }
+    bc50:	[0-9a-f]* 	{ shlib r15, r16, 5 ; add r5, r6, r7 }
+    bc58:	[0-9a-f]* 	{ clz r5, r6 ; shlib r15, r16, 5 }
+    bc60:	[0-9a-f]* 	{ shlib r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+    bc68:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; shlib r15, r16, 5 }
+    bc70:	[0-9a-f]* 	{ shlib r15, r16, 5 ; packbs_u r5, r6, r7 }
+    bc78:	[0-9a-f]* 	{ shlib r15, r16, 5 ; seqib r5, r6, 5 }
+    bc80:	[0-9a-f]* 	{ shlib r15, r16, 5 ; slteb r5, r6, r7 }
+    bc88:	[0-9a-f]* 	{ shlib r15, r16, 5 ; sraih r5, r6, 5 }
+    bc90:	[0-9a-f]* 	{ shlib r5, r6, 5 ; addih r15, r16, 5 }
+    bc98:	[0-9a-f]* 	{ shlib r5, r6, 5 ; iret }
+    bca0:	[0-9a-f]* 	{ shlib r5, r6, 5 ; maxib_u r15, r16, 5 }
+    bca8:	[0-9a-f]* 	{ shlib r5, r6, 5 ; nop }
+    bcb0:	[0-9a-f]* 	{ shlib r5, r6, 5 ; seqi r15, r16, 5 }
+    bcb8:	[0-9a-f]* 	{ shlib r5, r6, 5 ; sltb_u r15, r16, r17 }
+    bcc0:	[0-9a-f]* 	{ shlib r5, r6, 5 ; srah r15, r16, r17 }
+    bcc8:	[0-9a-f]* 	{ shlih r15, r16, 5 ; addhs r5, r6, r7 }
+    bcd0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; shlih r15, r16, 5 }
+    bcd8:	[0-9a-f]* 	{ shlih r15, r16, 5 ; move r5, r6 }
+    bce0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shlih r15, r16, 5 }
+    bce8:	[0-9a-f]* 	{ pcnt r5, r6 ; shlih r15, r16, 5 }
+    bcf0:	[0-9a-f]* 	{ shlih r15, r16, 5 ; shlh r5, r6, r7 }
+    bcf8:	[0-9a-f]* 	{ shlih r15, r16, 5 ; slth r5, r6, r7 }
+    bd00:	[0-9a-f]* 	{ shlih r15, r16, 5 ; subh r5, r6, r7 }
+    bd08:	[0-9a-f]* 	{ shlih r5, r6, 5 ; and r15, r16, r17 }
+    bd10:	[0-9a-f]* 	{ shlih r5, r6, 5 ; jrp r15 }
+    bd18:	[0-9a-f]* 	{ shlih r5, r6, 5 ; minb_u r15, r16, r17 }
+    bd20:	[0-9a-f]* 	{ shlih r5, r6, 5 ; packbs_u r15, r16, r17 }
+    bd28:	[0-9a-f]* 	{ shlih r5, r6, 5 ; shadd r15, r16, 5 }
+    bd30:	[0-9a-f]* 	{ shlih r5, r6, 5 ; slteb_u r15, r16, r17 }
+    bd38:	[0-9a-f]* 	{ shlih r5, r6, 5 ; sub r15, r16, r17 }
+    bd40:	[0-9a-f]* 	{ shr r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    bd48:	[0-9a-f]* 	{ shr r15, r16, r17 ; adds r5, r6, r7 }
+    bd50:	[0-9a-f]* 	{ shr r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    bd58:	[0-9a-f]* 	{ bytex r5, r6 ; shr r15, r16, r17 ; lw r25, r26 }
+    bd60:	[0-9a-f]* 	{ ctz r5, r6 ; shr r15, r16, r17 ; lh r25, r26 }
+    bd68:	[0-9a-f]* 	{ shr r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    bd70:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; lb r25, r26 }
+    bd78:	[0-9a-f]* 	{ shr r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    bd80:	[0-9a-f]* 	{ shr r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    bd88:	[0-9a-f]* 	{ shr r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    bd90:	[0-9a-f]* 	{ pcnt r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 }
+    bd98:	[0-9a-f]* 	{ shr r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    bda0:	[0-9a-f]* 	{ shr r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    bda8:	[0-9a-f]* 	{ shr r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    bdb0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shr r15, r16, r17 ; lh r25, r26 }
+    bdb8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 }
+    bdc0:	[0-9a-f]* 	{ shr r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    bdc8:	[0-9a-f]* 	{ shr r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    bdd0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+    bdd8:	[0-9a-f]* 	{ shr r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    bde0:	[0-9a-f]* 	{ shr r15, r16, r17 ; maxh r5, r6, r7 }
+    bde8:	[0-9a-f]* 	{ shr r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    bdf0:	[0-9a-f]* 	{ shr r15, r16, r17 ; moveli r5, 4660 }
+    bdf8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 }
+    be00:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    be08:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 }
+    be10:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    be18:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shr r15, r16, r17 ; prefetch r25 }
+    be20:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+    be28:	[0-9a-f]* 	{ shr r15, r16, r17 ; nop ; lh r25, r26 }
+    be30:	[0-9a-f]* 	{ shr r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    be38:	[0-9a-f]* 	{ shr r15, r16, r17 ; packhs r5, r6, r7 }
+    be40:	[0-9a-f]* 	{ shr r15, r16, r17 ; prefetch r25 }
+    be48:	[0-9a-f]* 	{ shr r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    be50:	[0-9a-f]* 	{ shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    be58:	[0-9a-f]* 	{ shr r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    be60:	[0-9a-f]* 	{ shr r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    be68:	[0-9a-f]* 	{ sadah r5, r6, r7 ; shr r15, r16, r17 }
+    be70:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+    be78:	[0-9a-f]* 	{ shr r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    be80:	[0-9a-f]* 	{ shr r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    be88:	[0-9a-f]* 	{ shr r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    be90:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shr r15, r16, r17 ; sh r25, r26 }
+    be98:	[0-9a-f]* 	{ shr r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    bea0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shr r15, r16, r17 ; sh r25, r26 }
+    bea8:	[0-9a-f]* 	{ shr r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    beb0:	[0-9a-f]* 	{ shr r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    beb8:	[0-9a-f]* 	{ shr r15, r16, r17 ; slt r5, r6, r7 }
+    bec0:	[0-9a-f]* 	{ shr r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    bec8:	[0-9a-f]* 	{ shr r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    bed0:	[0-9a-f]* 	{ shr r15, r16, r17 ; sltib_u r5, r6, 5 }
+    bed8:	[0-9a-f]* 	{ shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    bee0:	[0-9a-f]* 	{ shr r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    bee8:	[0-9a-f]* 	{ clz r5, r6 ; shr r15, r16, r17 ; sw r25, r26 }
+    bef0:	[0-9a-f]* 	{ shr r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    bef8:	[0-9a-f]* 	{ shr r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    bf00:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shr r15, r16, r17 }
+    bf08:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shr r15, r16, r17 }
+    bf10:	[0-9a-f]* 	{ shr r15, r16, r17 ; xor r5, r6, r7 }
+    bf18:	[0-9a-f]* 	{ shr r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    bf20:	[0-9a-f]* 	{ shr r5, r6, r7 ; and r15, r16, r17 }
+    bf28:	[0-9a-f]* 	{ shr r5, r6, r7 ; prefetch r25 }
+    bf30:	[0-9a-f]* 	{ shr r5, r6, r7 ; info 19 ; lw r25, r26 }
+    bf38:	[0-9a-f]* 	{ shr r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    bf40:	[0-9a-f]* 	{ shr r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    bf48:	[0-9a-f]* 	{ shr r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    bf50:	[0-9a-f]* 	{ shr r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    bf58:	[0-9a-f]* 	{ shr r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    bf60:	[0-9a-f]* 	{ shr r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    bf68:	[0-9a-f]* 	{ shr r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    bf70:	[0-9a-f]* 	{ shr r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    bf78:	[0-9a-f]* 	{ shr r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    bf80:	[0-9a-f]* 	{ shr r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    bf88:	[0-9a-f]* 	{ shr r5, r6, r7 ; maxb_u r15, r16, r17 }
+    bf90:	[0-9a-f]* 	{ shr r5, r6, r7 ; mnz r15, r16, r17 }
+    bf98:	[0-9a-f]* 	{ shr r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    bfa0:	[0-9a-f]* 	{ shr r5, r6, r7 ; nop ; lh r25, r26 }
+    bfa8:	[0-9a-f]* 	{ shr r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    bfb0:	[0-9a-f]* 	{ shr r5, r6, r7 ; packhs r15, r16, r17 }
+    bfb8:	[0-9a-f]* 	{ shr r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    bfc0:	[0-9a-f]* 	{ shr r5, r6, r7 ; prefetch r25 }
+    bfc8:	[0-9a-f]* 	{ shr r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    bfd0:	[0-9a-f]* 	{ shr r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    bfd8:	[0-9a-f]* 	{ shr r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    bfe0:	[0-9a-f]* 	{ shr r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    bfe8:	[0-9a-f]* 	{ shr r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    bff0:	[0-9a-f]* 	{ shr r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    bff8:	[0-9a-f]* 	{ shr r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    c000:	[0-9a-f]* 	{ shr r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    c008:	[0-9a-f]* 	{ shr r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    c010:	[0-9a-f]* 	{ shr r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    c018:	[0-9a-f]* 	{ shr r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c020:	[0-9a-f]* 	{ shr r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    c028:	[0-9a-f]* 	{ shr r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    c030:	[0-9a-f]* 	{ shr r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    c038:	[0-9a-f]* 	{ shr r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    c040:	[0-9a-f]* 	{ shr r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    c048:	[0-9a-f]* 	{ shr r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    c050:	[0-9a-f]* 	{ shr r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    c058:	[0-9a-f]* 	{ shrb r15, r16, r17 ; add r5, r6, r7 }
+    c060:	[0-9a-f]* 	{ clz r5, r6 ; shrb r15, r16, r17 }
+    c068:	[0-9a-f]* 	{ shrb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+    c070:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; shrb r15, r16, r17 }
+    c078:	[0-9a-f]* 	{ shrb r15, r16, r17 ; packbs_u r5, r6, r7 }
+    c080:	[0-9a-f]* 	{ shrb r15, r16, r17 ; seqib r5, r6, 5 }
+    c088:	[0-9a-f]* 	{ shrb r15, r16, r17 ; slteb r5, r6, r7 }
+    c090:	[0-9a-f]* 	{ shrb r15, r16, r17 ; sraih r5, r6, 5 }
+    c098:	[0-9a-f]* 	{ shrb r5, r6, r7 ; addih r15, r16, 5 }
+    c0a0:	[0-9a-f]* 	{ shrb r5, r6, r7 ; iret }
+    c0a8:	[0-9a-f]* 	{ shrb r5, r6, r7 ; maxib_u r15, r16, 5 }
+    c0b0:	[0-9a-f]* 	{ shrb r5, r6, r7 ; nop }
+    c0b8:	[0-9a-f]* 	{ shrb r5, r6, r7 ; seqi r15, r16, 5 }
+    c0c0:	[0-9a-f]* 	{ shrb r5, r6, r7 ; sltb_u r15, r16, r17 }
+    c0c8:	[0-9a-f]* 	{ shrb r5, r6, r7 ; srah r15, r16, r17 }
+    c0d0:	[0-9a-f]* 	{ shrh r15, r16, r17 ; addhs r5, r6, r7 }
+    c0d8:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; shrh r15, r16, r17 }
+    c0e0:	[0-9a-f]* 	{ shrh r15, r16, r17 ; move r5, r6 }
+    c0e8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shrh r15, r16, r17 }
+    c0f0:	[0-9a-f]* 	{ pcnt r5, r6 ; shrh r15, r16, r17 }
+    c0f8:	[0-9a-f]* 	{ shrh r15, r16, r17 ; shlh r5, r6, r7 }
+    c100:	[0-9a-f]* 	{ shrh r15, r16, r17 ; slth r5, r6, r7 }
+    c108:	[0-9a-f]* 	{ shrh r15, r16, r17 ; subh r5, r6, r7 }
+    c110:	[0-9a-f]* 	{ shrh r5, r6, r7 ; and r15, r16, r17 }
+    c118:	[0-9a-f]* 	{ shrh r5, r6, r7 ; jrp r15 }
+    c120:	[0-9a-f]* 	{ shrh r5, r6, r7 ; minb_u r15, r16, r17 }
+    c128:	[0-9a-f]* 	{ shrh r5, r6, r7 ; packbs_u r15, r16, r17 }
+    c130:	[0-9a-f]* 	{ shrh r5, r6, r7 ; shadd r15, r16, 5 }
+    c138:	[0-9a-f]* 	{ shrh r5, r6, r7 ; slteb_u r15, r16, r17 }
+    c140:	[0-9a-f]* 	{ shrh r5, r6, r7 ; sub r15, r16, r17 }
+    c148:	[0-9a-f]* 	{ shri r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+    c150:	[0-9a-f]* 	{ shri r15, r16, 5 ; adds r5, r6, r7 }
+    c158:	[0-9a-f]* 	{ shri r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+    c160:	[0-9a-f]* 	{ bytex r5, r6 ; shri r15, r16, 5 ; lw r25, r26 }
+    c168:	[0-9a-f]* 	{ ctz r5, r6 ; shri r15, r16, 5 ; lh r25, r26 }
+    c170:	[0-9a-f]* 	{ shri r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    c178:	[0-9a-f]* 	{ clz r5, r6 ; shri r15, r16, 5 ; lb r25, r26 }
+    c180:	[0-9a-f]* 	{ shri r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 }
+    c188:	[0-9a-f]* 	{ shri r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    c190:	[0-9a-f]* 	{ shri r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    c198:	[0-9a-f]* 	{ pcnt r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 }
+    c1a0:	[0-9a-f]* 	{ shri r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    c1a8:	[0-9a-f]* 	{ shri r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    c1b0:	[0-9a-f]* 	{ shri r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    c1b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shri r15, r16, 5 ; lh r25, r26 }
+    c1c0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 }
+    c1c8:	[0-9a-f]* 	{ shri r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    c1d0:	[0-9a-f]* 	{ shri r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    c1d8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    c1e0:	[0-9a-f]* 	{ shri r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 }
+    c1e8:	[0-9a-f]* 	{ shri r15, r16, 5 ; maxh r5, r6, r7 }
+    c1f0:	[0-9a-f]* 	{ shri r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+    c1f8:	[0-9a-f]* 	{ shri r15, r16, 5 ; moveli r5, 4660 }
+    c200:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 }
+    c208:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 }
+    c210:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 }
+    c218:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 }
+    c220:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+    c228:	[0-9a-f]* 	{ mvz r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    c230:	[0-9a-f]* 	{ shri r15, r16, 5 ; nop ; lh r25, r26 }
+    c238:	[0-9a-f]* 	{ shri r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    c240:	[0-9a-f]* 	{ shri r15, r16, 5 ; packhs r5, r6, r7 }
+    c248:	[0-9a-f]* 	{ shri r15, r16, 5 ; prefetch r25 }
+    c250:	[0-9a-f]* 	{ shri r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 }
+    c258:	[0-9a-f]* 	{ shri r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    c260:	[0-9a-f]* 	{ shri r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    c268:	[0-9a-f]* 	{ shri r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    c270:	[0-9a-f]* 	{ sadah r5, r6, r7 ; shri r15, r16, 5 }
+    c278:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; sb r25, r26 }
+    c280:	[0-9a-f]* 	{ shri r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 }
+    c288:	[0-9a-f]* 	{ shri r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 }
+    c290:	[0-9a-f]* 	{ shri r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+    c298:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 }
+    c2a0:	[0-9a-f]* 	{ shri r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 }
+    c2a8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shri r15, r16, 5 ; sh r25, r26 }
+    c2b0:	[0-9a-f]* 	{ shri r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    c2b8:	[0-9a-f]* 	{ shri r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    c2c0:	[0-9a-f]* 	{ shri r15, r16, 5 ; slt r5, r6, r7 }
+    c2c8:	[0-9a-f]* 	{ shri r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+    c2d0:	[0-9a-f]* 	{ shri r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    c2d8:	[0-9a-f]* 	{ shri r15, r16, 5 ; sltib_u r5, r6, 5 }
+    c2e0:	[0-9a-f]* 	{ shri r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    c2e8:	[0-9a-f]* 	{ shri r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    c2f0:	[0-9a-f]* 	{ clz r5, r6 ; shri r15, r16, 5 ; sw r25, r26 }
+    c2f8:	[0-9a-f]* 	{ shri r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+    c300:	[0-9a-f]* 	{ shri r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    c308:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shri r15, r16, 5 }
+    c310:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shri r15, r16, 5 }
+    c318:	[0-9a-f]* 	{ shri r15, r16, 5 ; xor r5, r6, r7 }
+    c320:	[0-9a-f]* 	{ shri r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    c328:	[0-9a-f]* 	{ shri r5, r6, 5 ; and r15, r16, r17 }
+    c330:	[0-9a-f]* 	{ shri r5, r6, 5 ; prefetch r25 }
+    c338:	[0-9a-f]* 	{ shri r5, r6, 5 ; info 19 ; lw r25, r26 }
+    c340:	[0-9a-f]* 	{ shri r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    c348:	[0-9a-f]* 	{ shri r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    c350:	[0-9a-f]* 	{ shri r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    c358:	[0-9a-f]* 	{ shri r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    c360:	[0-9a-f]* 	{ shri r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 }
+    c368:	[0-9a-f]* 	{ shri r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+    c370:	[0-9a-f]* 	{ shri r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    c378:	[0-9a-f]* 	{ shri r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    c380:	[0-9a-f]* 	{ shri r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    c388:	[0-9a-f]* 	{ shri r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 }
+    c390:	[0-9a-f]* 	{ shri r5, r6, 5 ; maxb_u r15, r16, r17 }
+    c398:	[0-9a-f]* 	{ shri r5, r6, 5 ; mnz r15, r16, r17 }
+    c3a0:	[0-9a-f]* 	{ shri r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+    c3a8:	[0-9a-f]* 	{ shri r5, r6, 5 ; nop ; lh r25, r26 }
+    c3b0:	[0-9a-f]* 	{ shri r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+    c3b8:	[0-9a-f]* 	{ shri r5, r6, 5 ; packhs r15, r16, r17 }
+    c3c0:	[0-9a-f]* 	{ shri r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 }
+    c3c8:	[0-9a-f]* 	{ shri r5, r6, 5 ; prefetch r25 }
+    c3d0:	[0-9a-f]* 	{ shri r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+    c3d8:	[0-9a-f]* 	{ shri r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+    c3e0:	[0-9a-f]* 	{ shri r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 }
+    c3e8:	[0-9a-f]* 	{ shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c3f0:	[0-9a-f]* 	{ shri r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+    c3f8:	[0-9a-f]* 	{ shri r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 }
+    c400:	[0-9a-f]* 	{ shri r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 }
+    c408:	[0-9a-f]* 	{ shri r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+    c410:	[0-9a-f]* 	{ shri r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+    c418:	[0-9a-f]* 	{ shri r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+    c420:	[0-9a-f]* 	{ shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c428:	[0-9a-f]* 	{ shri r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    c430:	[0-9a-f]* 	{ shri r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+    c438:	[0-9a-f]* 	{ shri r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+    c440:	[0-9a-f]* 	{ shri r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+    c448:	[0-9a-f]* 	{ shri r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+    c450:	[0-9a-f]* 	{ shri r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+    c458:	[0-9a-f]* 	{ shri r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 }
+    c460:	[0-9a-f]* 	{ shrib r15, r16, 5 ; add r5, r6, r7 }
+    c468:	[0-9a-f]* 	{ clz r5, r6 ; shrib r15, r16, 5 }
+    c470:	[0-9a-f]* 	{ shrib r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+    c478:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; shrib r15, r16, 5 }
+    c480:	[0-9a-f]* 	{ shrib r15, r16, 5 ; packbs_u r5, r6, r7 }
+    c488:	[0-9a-f]* 	{ shrib r15, r16, 5 ; seqib r5, r6, 5 }
+    c490:	[0-9a-f]* 	{ shrib r15, r16, 5 ; slteb r5, r6, r7 }
+    c498:	[0-9a-f]* 	{ shrib r15, r16, 5 ; sraih r5, r6, 5 }
+    c4a0:	[0-9a-f]* 	{ shrib r5, r6, 5 ; addih r15, r16, 5 }
+    c4a8:	[0-9a-f]* 	{ shrib r5, r6, 5 ; iret }
+    c4b0:	[0-9a-f]* 	{ shrib r5, r6, 5 ; maxib_u r15, r16, 5 }
+    c4b8:	[0-9a-f]* 	{ shrib r5, r6, 5 ; nop }
+    c4c0:	[0-9a-f]* 	{ shrib r5, r6, 5 ; seqi r15, r16, 5 }
+    c4c8:	[0-9a-f]* 	{ shrib r5, r6, 5 ; sltb_u r15, r16, r17 }
+    c4d0:	[0-9a-f]* 	{ shrib r5, r6, 5 ; srah r15, r16, r17 }
+    c4d8:	[0-9a-f]* 	{ shrih r15, r16, 5 ; addhs r5, r6, r7 }
+    c4e0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; shrih r15, r16, 5 }
+    c4e8:	[0-9a-f]* 	{ shrih r15, r16, 5 ; move r5, r6 }
+    c4f0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; shrih r15, r16, 5 }
+    c4f8:	[0-9a-f]* 	{ pcnt r5, r6 ; shrih r15, r16, 5 }
+    c500:	[0-9a-f]* 	{ shrih r15, r16, 5 ; shlh r5, r6, r7 }
+    c508:	[0-9a-f]* 	{ shrih r15, r16, 5 ; slth r5, r6, r7 }
+    c510:	[0-9a-f]* 	{ shrih r15, r16, 5 ; subh r5, r6, r7 }
+    c518:	[0-9a-f]* 	{ shrih r5, r6, 5 ; and r15, r16, r17 }
+    c520:	[0-9a-f]* 	{ shrih r5, r6, 5 ; jrp r15 }
+    c528:	[0-9a-f]* 	{ shrih r5, r6, 5 ; minb_u r15, r16, r17 }
+    c530:	[0-9a-f]* 	{ shrih r5, r6, 5 ; packbs_u r15, r16, r17 }
+    c538:	[0-9a-f]* 	{ shrih r5, r6, 5 ; shadd r15, r16, 5 }
+    c540:	[0-9a-f]* 	{ shrih r5, r6, 5 ; slteb_u r15, r16, r17 }
+    c548:	[0-9a-f]* 	{ shrih r5, r6, 5 ; sub r15, r16, r17 }
+    c550:	[0-9a-f]* 	{ slt r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    c558:	[0-9a-f]* 	{ slt r15, r16, r17 ; adds r5, r6, r7 }
+    c560:	[0-9a-f]* 	{ slt r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    c568:	[0-9a-f]* 	{ bytex r5, r6 ; slt r15, r16, r17 ; lw r25, r26 }
+    c570:	[0-9a-f]* 	{ ctz r5, r6 ; slt r15, r16, r17 ; lh r25, r26 }
+    c578:	[0-9a-f]* 	{ slt r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    c580:	[0-9a-f]* 	{ clz r5, r6 ; slt r15, r16, r17 ; lb r25, r26 }
+    c588:	[0-9a-f]* 	{ slt r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    c590:	[0-9a-f]* 	{ slt r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    c598:	[0-9a-f]* 	{ slt r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    c5a0:	[0-9a-f]* 	{ pcnt r5, r6 ; slt r15, r16, r17 ; lb_u r25, r26 }
+    c5a8:	[0-9a-f]* 	{ slt r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    c5b0:	[0-9a-f]* 	{ slt r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    c5b8:	[0-9a-f]* 	{ slt r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    c5c0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; lh r25, r26 }
+    c5c8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    c5d0:	[0-9a-f]* 	{ slt r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    c5d8:	[0-9a-f]* 	{ slt r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    c5e0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+    c5e8:	[0-9a-f]* 	{ slt r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    c5f0:	[0-9a-f]* 	{ slt r15, r16, r17 ; maxh r5, r6, r7 }
+    c5f8:	[0-9a-f]* 	{ slt r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    c600:	[0-9a-f]* 	{ slt r15, r16, r17 ; moveli r5, 4660 }
+    c608:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    c610:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 }
+    c618:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    c620:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 }
+    c628:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+    c630:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+    c638:	[0-9a-f]* 	{ slt r15, r16, r17 ; nop ; lh r25, r26 }
+    c640:	[0-9a-f]* 	{ slt r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    c648:	[0-9a-f]* 	{ slt r15, r16, r17 ; packhs r5, r6, r7 }
+    c650:	[0-9a-f]* 	{ slt r15, r16, r17 ; prefetch r25 }
+    c658:	[0-9a-f]* 	{ slt r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    c660:	[0-9a-f]* 	{ slt r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    c668:	[0-9a-f]* 	{ slt r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    c670:	[0-9a-f]* 	{ slt r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    c678:	[0-9a-f]* 	{ sadah r5, r6, r7 ; slt r15, r16, r17 }
+    c680:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 }
+    c688:	[0-9a-f]* 	{ slt r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    c690:	[0-9a-f]* 	{ slt r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    c698:	[0-9a-f]* 	{ slt r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    c6a0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+    c6a8:	[0-9a-f]* 	{ slt r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    c6b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slt r15, r16, r17 ; sh r25, r26 }
+    c6b8:	[0-9a-f]* 	{ slt r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    c6c0:	[0-9a-f]* 	{ slt r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    c6c8:	[0-9a-f]* 	{ slt r15, r16, r17 ; slt r5, r6, r7 }
+    c6d0:	[0-9a-f]* 	{ slt r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    c6d8:	[0-9a-f]* 	{ slt r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    c6e0:	[0-9a-f]* 	{ slt r15, r16, r17 ; sltib_u r5, r6, 5 }
+    c6e8:	[0-9a-f]* 	{ slt r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    c6f0:	[0-9a-f]* 	{ slt r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    c6f8:	[0-9a-f]* 	{ clz r5, r6 ; slt r15, r16, r17 ; sw r25, r26 }
+    c700:	[0-9a-f]* 	{ slt r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    c708:	[0-9a-f]* 	{ slt r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    c710:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slt r15, r16, r17 }
+    c718:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slt r15, r16, r17 }
+    c720:	[0-9a-f]* 	{ slt r15, r16, r17 ; xor r5, r6, r7 }
+    c728:	[0-9a-f]* 	{ slt r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    c730:	[0-9a-f]* 	{ slt r5, r6, r7 ; and r15, r16, r17 }
+    c738:	[0-9a-f]* 	{ slt r5, r6, r7 ; prefetch r25 }
+    c740:	[0-9a-f]* 	{ slt r5, r6, r7 ; info 19 ; lw r25, r26 }
+    c748:	[0-9a-f]* 	{ slt r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    c750:	[0-9a-f]* 	{ slt r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    c758:	[0-9a-f]* 	{ slt r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    c760:	[0-9a-f]* 	{ slt r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    c768:	[0-9a-f]* 	{ slt r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    c770:	[0-9a-f]* 	{ slt r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    c778:	[0-9a-f]* 	{ slt r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    c780:	[0-9a-f]* 	{ slt r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    c788:	[0-9a-f]* 	{ slt r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    c790:	[0-9a-f]* 	{ slt r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    c798:	[0-9a-f]* 	{ slt r5, r6, r7 ; maxb_u r15, r16, r17 }
+    c7a0:	[0-9a-f]* 	{ slt r5, r6, r7 ; mnz r15, r16, r17 }
+    c7a8:	[0-9a-f]* 	{ slt r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    c7b0:	[0-9a-f]* 	{ slt r5, r6, r7 ; nop ; lh r25, r26 }
+    c7b8:	[0-9a-f]* 	{ slt r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    c7c0:	[0-9a-f]* 	{ slt r5, r6, r7 ; packhs r15, r16, r17 }
+    c7c8:	[0-9a-f]* 	{ slt r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    c7d0:	[0-9a-f]* 	{ slt r5, r6, r7 ; prefetch r25 }
+    c7d8:	[0-9a-f]* 	{ slt r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    c7e0:	[0-9a-f]* 	{ slt r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    c7e8:	[0-9a-f]* 	{ slt r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    c7f0:	[0-9a-f]* 	{ slt r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c7f8:	[0-9a-f]* 	{ slt r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    c800:	[0-9a-f]* 	{ slt r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    c808:	[0-9a-f]* 	{ slt r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    c810:	[0-9a-f]* 	{ slt r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    c818:	[0-9a-f]* 	{ slt r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    c820:	[0-9a-f]* 	{ slt r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    c828:	[0-9a-f]* 	{ slt r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c830:	[0-9a-f]* 	{ slt r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    c838:	[0-9a-f]* 	{ slt r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    c840:	[0-9a-f]* 	{ slt r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    c848:	[0-9a-f]* 	{ slt r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    c850:	[0-9a-f]* 	{ slt r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    c858:	[0-9a-f]* 	{ slt r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    c860:	[0-9a-f]* 	{ slt r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    c868:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 }
+    c870:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 }
+    c878:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; and r5, r6, r7 }
+    c880:	[0-9a-f]* 	{ bitx r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c888:	[0-9a-f]* 	{ clz r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c890:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; lh_u r25, r26 }
+    c898:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; intlb r5, r6, r7 }
+    c8a0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+    c8a8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shli r5, r6, 5 ; lb r25, r26 }
+    c8b0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    c8b8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    c8c0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    c8c8:	[0-9a-f]* 	{ bitx r5, r6 ; slt_u r15, r16, r17 ; lh r25, r26 }
+    c8d0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 }
+    c8d8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slte_u r5, r6, r7 ; lh r25, r26 }
+    c8e0:	[0-9a-f]* 	{ ctz r5, r6 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    c8e8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; or r5, r6, r7 ; lh_u r25, r26 }
+    c8f0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    c8f8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+    c900:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; rl r5, r6, r7 ; lw r25, r26 }
+    c908:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 }
+    c910:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+    c918:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    c920:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; slt_u r15, r16, r17 }
+    c928:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slt_u r15, r16, r17 }
+    c930:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; slt_u r15, r16, r17 }
+    c938:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt_u r15, r16, r17 }
+    c940:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    c948:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c950:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+    c958:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 }
+    c960:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 }
+    c968:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
+    c970:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 }
+    c978:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 }
+    c980:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 }
+    c988:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    c990:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    c998:	[0-9a-f]* 	{ ctz r5, r6 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    c9a0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+    c9a8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 }
+    c9b0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; seqb r5, r6, r7 }
+    c9b8:	[0-9a-f]* 	{ clz r5, r6 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    c9c0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 }
+    c9c8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    c9d0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shl r5, r6, r7 }
+    c9d8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 }
+    c9e0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    c9e8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; sltb_u r5, r6, r7 }
+    c9f0:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slte_u r5, r6, r7 }
+    c9f8:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    ca00:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; sne r5, r6, r7 }
+    ca08:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 }
+    ca10:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; subhs r5, r6, r7 }
+    ca18:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    ca20:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 }
+    ca28:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    ca30:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    ca38:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    ca40:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; addb r15, r16, r17 }
+    ca48:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    ca50:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; dtlbpr r15 }
+    ca58:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; ill ; sb r25, r26 }
+    ca60:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; iret }
+    ca68:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    ca70:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    ca78:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    ca80:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    ca88:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 }
+    ca90:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 }
+    ca98:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    caa0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    caa8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 }
+    cab0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    cab8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    cac0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; move r15, r16 }
+    cac8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    cad0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    cad8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    cae0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    cae8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    caf0:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    caf8:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    cb00:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sb r15, r16 }
+    cb08:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    cb10:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+    cb18:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    cb20:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    cb28:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    cb30:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    cb38:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    cb40:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    cb48:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+    cb50:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    cb58:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sltib r15, r16, 5 }
+    cb60:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    cb68:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    cb70:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; sw r25, r26 }
+    cb78:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+    cb80:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    cb88:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; sltb r15, r16, r17 }
+    cb90:	[0-9a-f]* 	{ sltb r15, r16, r17 ; maxb_u r5, r6, r7 }
+    cb98:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; sltb r15, r16, r17 }
+    cba0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sltb r15, r16, r17 }
+    cba8:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; sltb r15, r16, r17 }
+    cbb0:	[0-9a-f]* 	{ sltb r15, r16, r17 ; shrib r5, r6, 5 }
+    cbb8:	[0-9a-f]* 	{ sltb r15, r16, r17 ; sne r5, r6, r7 }
+    cbc0:	[0-9a-f]* 	{ sltb r15, r16, r17 ; xori r5, r6, 5 }
+    cbc8:	[0-9a-f]* 	{ sltb r5, r6, r7 ; ill }
+    cbd0:	[0-9a-f]* 	{ sltb r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    cbd8:	[0-9a-f]* 	{ sltb r5, r6, r7 ; move r15, r16 }
+    cbe0:	[0-9a-f]* 	{ sltb r5, r6, r7 ; s1a r15, r16, r17 }
+    cbe8:	[0-9a-f]* 	{ sltb r5, r6, r7 ; shrb r15, r16, r17 }
+    cbf0:	[0-9a-f]* 	{ sltb r5, r6, r7 ; sltib_u r15, r16, 5 }
+    cbf8:	[0-9a-f]* 	{ sltb r5, r6, r7 ; tns r15, r16 }
+    cc00:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; sltb_u r15, r16, r17 }
+    cc08:	[0-9a-f]* 	{ sltb_u r15, r16, r17 ; minb_u r5, r6, r7 }
+    cc10:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; sltb_u r15, r16, r17 }
+    cc18:	[0-9a-f]* 	{ sltb_u r15, r16, r17 ; nop }
+    cc20:	[0-9a-f]* 	{ sltb_u r15, r16, r17 ; seq r5, r6, r7 }
+    cc28:	[0-9a-f]* 	{ sltb_u r15, r16, r17 ; sltb r5, r6, r7 }
+    cc30:	[0-9a-f]* 	{ sltb_u r15, r16, r17 ; srab r5, r6, r7 }
+    cc38:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; addh r15, r16, r17 }
+    cc40:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; inthh r15, r16, r17 }
+    cc48:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; lwadd r15, r16, 5 }
+    cc50:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; mtspr 5, r16 }
+    cc58:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; sbadd r15, r16, 5 }
+    cc60:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; shrih r15, r16, 5 }
+    cc68:	[0-9a-f]* 	{ sltb_u r5, r6, r7 ; sneb r15, r16, r17 }
+    cc70:	[0-9a-f]* 	{ slte r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 }
+    cc78:	[0-9a-f]* 	{ slte r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 }
+    cc80:	[0-9a-f]* 	{ slte r15, r16, r17 ; and r5, r6, r7 }
+    cc88:	[0-9a-f]* 	{ bitx r5, r6 ; slte r15, r16, r17 ; sb r25, r26 }
+    cc90:	[0-9a-f]* 	{ clz r5, r6 ; slte r15, r16, r17 ; sb r25, r26 }
+    cc98:	[0-9a-f]* 	{ slte r15, r16, r17 ; lh_u r25, r26 }
+    cca0:	[0-9a-f]* 	{ slte r15, r16, r17 ; intlb r5, r6, r7 }
+    cca8:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+    ccb0:	[0-9a-f]* 	{ slte r15, r16, r17 ; shli r5, r6, 5 ; lb r25, r26 }
+    ccb8:	[0-9a-f]* 	{ slte r15, r16, r17 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    ccc0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    ccc8:	[0-9a-f]* 	{ slte r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    ccd0:	[0-9a-f]* 	{ bitx r5, r6 ; slte r15, r16, r17 ; lh r25, r26 }
+    ccd8:	[0-9a-f]* 	{ slte r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 }
+    cce0:	[0-9a-f]* 	{ slte r15, r16, r17 ; slte_u r5, r6, r7 ; lh r25, r26 }
+    cce8:	[0-9a-f]* 	{ ctz r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    ccf0:	[0-9a-f]* 	{ slte r15, r16, r17 ; or r5, r6, r7 ; lh_u r25, r26 }
+    ccf8:	[0-9a-f]* 	{ slte r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    cd00:	[0-9a-f]* 	{ slte r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+    cd08:	[0-9a-f]* 	{ slte r15, r16, r17 ; rl r5, r6, r7 ; lw r25, r26 }
+    cd10:	[0-9a-f]* 	{ slte r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 }
+    cd18:	[0-9a-f]* 	{ slte r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+    cd20:	[0-9a-f]* 	{ slte r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    cd28:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; slte r15, r16, r17 }
+    cd30:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slte r15, r16, r17 }
+    cd38:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; slte r15, r16, r17 }
+    cd40:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slte r15, r16, r17 }
+    cd48:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    cd50:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+    cd58:	[0-9a-f]* 	{ slte r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+    cd60:	[0-9a-f]* 	{ slte r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 }
+    cd68:	[0-9a-f]* 	{ slte r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 }
+    cd70:	[0-9a-f]* 	{ slte r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
+    cd78:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+    cd80:	[0-9a-f]* 	{ slte r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 }
+    cd88:	[0-9a-f]* 	{ slte r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 }
+    cd90:	[0-9a-f]* 	{ slte r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    cd98:	[0-9a-f]* 	{ slte r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    cda0:	[0-9a-f]* 	{ ctz r5, r6 ; slte r15, r16, r17 ; sb r25, r26 }
+    cda8:	[0-9a-f]* 	{ slte r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+    cdb0:	[0-9a-f]* 	{ slte r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 }
+    cdb8:	[0-9a-f]* 	{ slte r15, r16, r17 ; seqb r5, r6, r7 }
+    cdc0:	[0-9a-f]* 	{ clz r5, r6 ; slte r15, r16, r17 ; sh r25, r26 }
+    cdc8:	[0-9a-f]* 	{ slte r15, r16, r17 ; nor r5, r6, r7 ; sh r25, r26 }
+    cdd0:	[0-9a-f]* 	{ slte r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    cdd8:	[0-9a-f]* 	{ slte r15, r16, r17 ; shl r5, r6, r7 }
+    cde0:	[0-9a-f]* 	{ slte r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 }
+    cde8:	[0-9a-f]* 	{ slte r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    cdf0:	[0-9a-f]* 	{ slte r15, r16, r17 ; sltb_u r5, r6, r7 }
+    cdf8:	[0-9a-f]* 	{ slte r15, r16, r17 ; slte_u r5, r6, r7 }
+    ce00:	[0-9a-f]* 	{ slte r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    ce08:	[0-9a-f]* 	{ slte r15, r16, r17 ; sne r5, r6, r7 }
+    ce10:	[0-9a-f]* 	{ slte r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 }
+    ce18:	[0-9a-f]* 	{ slte r15, r16, r17 ; subhs r5, r6, r7 }
+    ce20:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+    ce28:	[0-9a-f]* 	{ slte r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 }
+    ce30:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    ce38:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    ce40:	[0-9a-f]* 	{ slte r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    ce48:	[0-9a-f]* 	{ slte r5, r6, r7 ; addb r15, r16, r17 }
+    ce50:	[0-9a-f]* 	{ slte r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    ce58:	[0-9a-f]* 	{ slte r5, r6, r7 ; dtlbpr r15 }
+    ce60:	[0-9a-f]* 	{ slte r5, r6, r7 ; ill ; sb r25, r26 }
+    ce68:	[0-9a-f]* 	{ slte r5, r6, r7 ; iret }
+    ce70:	[0-9a-f]* 	{ slte r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+    ce78:	[0-9a-f]* 	{ slte r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    ce80:	[0-9a-f]* 	{ slte r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    ce88:	[0-9a-f]* 	{ slte r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    ce90:	[0-9a-f]* 	{ slte r5, r6, r7 ; ori r15, r16, 5 ; lh r25, r26 }
+    ce98:	[0-9a-f]* 	{ slte r5, r6, r7 ; srai r15, r16, 5 ; lh r25, r26 }
+    cea0:	[0-9a-f]* 	{ slte r5, r6, r7 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    cea8:	[0-9a-f]* 	{ slte r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    ceb0:	[0-9a-f]* 	{ slte r5, r6, r7 ; or r15, r16, r17 ; lw r25, r26 }
+    ceb8:	[0-9a-f]* 	{ slte r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    cec0:	[0-9a-f]* 	{ slte r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    cec8:	[0-9a-f]* 	{ slte r5, r6, r7 ; move r15, r16 }
+    ced0:	[0-9a-f]* 	{ slte r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+    ced8:	[0-9a-f]* 	{ slte r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+    cee0:	[0-9a-f]* 	{ slte r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+    cee8:	[0-9a-f]* 	{ slte r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
+    cef0:	[0-9a-f]* 	{ slte r5, r6, r7 ; slte_u r15, r16, r17 ; prefetch r25 }
+    cef8:	[0-9a-f]* 	{ slte r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+    cf00:	[0-9a-f]* 	{ slte r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+    cf08:	[0-9a-f]* 	{ slte r5, r6, r7 ; sb r15, r16 }
+    cf10:	[0-9a-f]* 	{ slte r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+    cf18:	[0-9a-f]* 	{ slte r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+    cf20:	[0-9a-f]* 	{ slte r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    cf28:	[0-9a-f]* 	{ slte r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+    cf30:	[0-9a-f]* 	{ slte r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    cf38:	[0-9a-f]* 	{ slte r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+    cf40:	[0-9a-f]* 	{ slte r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+    cf48:	[0-9a-f]* 	{ slte r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    cf50:	[0-9a-f]* 	{ slte r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+    cf58:	[0-9a-f]* 	{ slte r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+    cf60:	[0-9a-f]* 	{ slte r5, r6, r7 ; sltib r15, r16, 5 }
+    cf68:	[0-9a-f]* 	{ slte r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    cf70:	[0-9a-f]* 	{ slte r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+    cf78:	[0-9a-f]* 	{ slte r5, r6, r7 ; sw r25, r26 }
+    cf80:	[0-9a-f]* 	{ slte r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+    cf88:	[0-9a-f]* 	{ slte r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    cf90:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; addh r5, r6, r7 }
+    cf98:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 }
+    cfa0:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; slte_u r15, r16, r17 }
+    cfa8:	[0-9a-f]* 	{ bytex r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    cfb0:	[0-9a-f]* 	{ ctz r5, r6 ; slte_u r15, r16, r17 ; sb r25, r26 }
+    cfb8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; info 19 ; prefetch r25 }
+    cfc0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 }
+    cfc8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 }
+    cfd0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 }
+    cfd8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    cfe0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    cfe8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    cff0:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    cff8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 }
+    d000:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; lh r25, r26 }
+    d008:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    d010:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; shr r5, r6, r7 ; lh_u r25, r26 }
+    d018:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; and r5, r6, r7 ; lw r25, r26 }
+    d020:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    d028:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; slt_u r5, r6, r7 ; lw r25, r26 }
+    d030:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; minh r5, r6, r7 }
+    d038:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; move r5, r6 ; lw r25, r26 }
+    d040:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    d048:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    d050:	[0-9a-f]* 	{ mulhhsa_uu r5, r6, r7 ; slte_u r15, r16, r17 }
+    d058:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+    d060:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    d068:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slte_u r15, r16, r17 }
+    d070:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    d078:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; nop ; sb r25, r26 }
+    d080:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+    d088:	[0-9a-f]* 	{ pcnt r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    d090:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; movei r5, 5 ; prefetch r25 }
+    d098:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s1a r5, r6, r7 ; prefetch r25 }
+    d0a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 }
+    d0a8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 }
+    d0b0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+    d0b8:	[0-9a-f]* 	{ sadh_u r5, r6, r7 ; slte_u r15, r16, r17 }
+    d0c0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slte_u r15, r16, r17 ; sb r25, r26 }
+    d0c8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; shr r5, r6, r7 ; sb r25, r26 }
+    d0d0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 }
+    d0d8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; seqib r5, r6, 5 }
+    d0e0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+    d0e8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; shli r5, r6, 5 ; sh r25, r26 }
+    d0f0:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 }
+    d0f8:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; shli r5, r6, 5 }
+    d100:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 }
+    d108:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 }
+    d110:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+    d118:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 }
+    d120:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 }
+    d128:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; sra r5, r6, r7 }
+    d130:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+    d138:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 }
+    d140:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 }
+    d148:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; sub r5, r6, r7 ; sw r25, r26 }
+    d150:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    d158:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    d160:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+    d168:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+    d170:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    d178:	[0-9a-f]* 	{ slte_u r5, r6, r7 }
+    d180:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; info 19 ; sw r25, r26 }
+    d188:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; info 19 ; lb r25, r26 }
+    d190:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    d198:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    d1a0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+    d1a8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; info 19 ; lh r25, r26 }
+    d1b0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+    d1b8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+    d1c0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+    d1c8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; ill ; lw r25, r26 }
+    d1d0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+    d1d8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; mf }
+    d1e0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+    d1e8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; moveli.sn r15, 4660 }
+    d1f0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; nop ; sb r25, r26 }
+    d1f8:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+    d200:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 }
+    d208:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+    d210:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+    d218:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+    d220:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+    d228:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; nop ; sb r25, r26 }
+    d230:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    d238:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 }
+    d240:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; mnz r15, r16, r17 ; sh r25, r26 }
+    d248:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt_u r15, r16, r17 ; sh r25, r26 }
+    d250:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+    d258:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+    d260:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+    d268:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sltb r15, r16, r17 }
+    d270:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    d278:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 }
+    d280:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    d288:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    d290:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; subh r15, r16, r17 }
+    d298:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    d2a0:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+    d2a8:	[0-9a-f]* 	{ slteb r15, r16, r17 ; addhs r5, r6, r7 }
+    d2b0:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; slteb r15, r16, r17 }
+    d2b8:	[0-9a-f]* 	{ slteb r15, r16, r17 ; move r5, r6 }
+    d2c0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slteb r15, r16, r17 }
+    d2c8:	[0-9a-f]* 	{ pcnt r5, r6 ; slteb r15, r16, r17 }
+    d2d0:	[0-9a-f]* 	{ slteb r15, r16, r17 ; shlh r5, r6, r7 }
+    d2d8:	[0-9a-f]* 	{ slteb r15, r16, r17 ; slth r5, r6, r7 }
+    d2e0:	[0-9a-f]* 	{ slteb r15, r16, r17 ; subh r5, r6, r7 }
+    d2e8:	[0-9a-f]* 	{ slteb r5, r6, r7 ; and r15, r16, r17 }
+    d2f0:	[0-9a-f]* 	{ slteb r5, r6, r7 ; jrp r15 }
+    d2f8:	[0-9a-f]* 	{ slteb r5, r6, r7 ; minb_u r15, r16, r17 }
+    d300:	[0-9a-f]* 	{ slteb r5, r6, r7 ; packbs_u r15, r16, r17 }
+    d308:	[0-9a-f]* 	{ slteb r5, r6, r7 ; shadd r15, r16, 5 }
+    d310:	[0-9a-f]* 	{ slteb r5, r6, r7 ; slteb_u r15, r16, r17 }
+    d318:	[0-9a-f]* 	{ slteb r5, r6, r7 ; sub r15, r16, r17 }
+    d320:	[0-9a-f]* 	{ slteb_u r15, r16, r17 ; addli r5, r6, 4660 }
+    d328:	[0-9a-f]* 	{ slteb_u r15, r16, r17 ; inthb r5, r6, r7 }
+    d330:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slteb_u r15, r16, r17 }
+    d338:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; slteb_u r15, r16, r17 }
+    d340:	[0-9a-f]* 	{ slteb_u r15, r16, r17 ; s2a r5, r6, r7 }
+    d348:	[0-9a-f]* 	{ slteb_u r15, r16, r17 ; shr r5, r6, r7 }
+    d350:	[0-9a-f]* 	{ slteb_u r15, r16, r17 ; sltib r5, r6, 5 }
+    d358:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slteb_u r15, r16, r17 }
+    d360:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; finv r15 }
+    d368:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    d370:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+    d378:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; prefetch r15 }
+    d380:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; shli r15, r16, 5 }
+    d388:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; slth_u r15, r16, r17 }
+    d390:	[0-9a-f]* 	{ slteb_u r5, r6, r7 ; subhs r15, r16, r17 }
+    d398:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; slteh r15, r16, r17 }
+    d3a0:	[0-9a-f]* 	{ slteh r15, r16, r17 ; maxb_u r5, r6, r7 }
+    d3a8:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; slteh r15, r16, r17 }
+    d3b0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slteh r15, r16, r17 }
+    d3b8:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; slteh r15, r16, r17 }
+    d3c0:	[0-9a-f]* 	{ slteh r15, r16, r17 ; shrib r5, r6, 5 }
+    d3c8:	[0-9a-f]* 	{ slteh r15, r16, r17 ; sne r5, r6, r7 }
+    d3d0:	[0-9a-f]* 	{ slteh r15, r16, r17 ; xori r5, r6, 5 }
+    d3d8:	[0-9a-f]* 	{ slteh r5, r6, r7 ; ill }
+    d3e0:	[0-9a-f]* 	{ slteh r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    d3e8:	[0-9a-f]* 	{ slteh r5, r6, r7 ; move r15, r16 }
+    d3f0:	[0-9a-f]* 	{ slteh r5, r6, r7 ; s1a r15, r16, r17 }
+    d3f8:	[0-9a-f]* 	{ slteh r5, r6, r7 ; shrb r15, r16, r17 }
+    d400:	[0-9a-f]* 	{ slteh r5, r6, r7 ; sltib_u r15, r16, 5 }
+    d408:	[0-9a-f]* 	{ slteh r5, r6, r7 ; tns r15, r16 }
+    d410:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; slteh_u r15, r16, r17 }
+    d418:	[0-9a-f]* 	{ slteh_u r15, r16, r17 ; minb_u r5, r6, r7 }
+    d420:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; slteh_u r15, r16, r17 }
+    d428:	[0-9a-f]* 	{ slteh_u r15, r16, r17 ; nop }
+    d430:	[0-9a-f]* 	{ slteh_u r15, r16, r17 ; seq r5, r6, r7 }
+    d438:	[0-9a-f]* 	{ slteh_u r15, r16, r17 ; sltb r5, r6, r7 }
+    d440:	[0-9a-f]* 	{ slteh_u r15, r16, r17 ; srab r5, r6, r7 }
+    d448:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; addh r15, r16, r17 }
+    d450:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; inthh r15, r16, r17 }
+    d458:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; lwadd r15, r16, 5 }
+    d460:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; mtspr 5, r16 }
+    d468:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; sbadd r15, r16, 5 }
+    d470:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; shrih r15, r16, 5 }
+    d478:	[0-9a-f]* 	{ slteh_u r5, r6, r7 ; sneb r15, r16, r17 }
+    d480:	[0-9a-f]* 	{ slth r15, r16, r17 ; add r5, r6, r7 }
+    d488:	[0-9a-f]* 	{ clz r5, r6 ; slth r15, r16, r17 }
+    d490:	[0-9a-f]* 	{ slth r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+    d498:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; slth r15, r16, r17 }
+    d4a0:	[0-9a-f]* 	{ slth r15, r16, r17 ; packbs_u r5, r6, r7 }
+    d4a8:	[0-9a-f]* 	{ slth r15, r16, r17 ; seqib r5, r6, 5 }
+    d4b0:	[0-9a-f]* 	{ slth r15, r16, r17 ; slteb r5, r6, r7 }
+    d4b8:	[0-9a-f]* 	{ slth r15, r16, r17 ; sraih r5, r6, 5 }
+    d4c0:	[0-9a-f]* 	{ slth r5, r6, r7 ; addih r15, r16, 5 }
+    d4c8:	[0-9a-f]* 	{ slth r5, r6, r7 ; iret }
+    d4d0:	[0-9a-f]* 	{ slth r5, r6, r7 ; maxib_u r15, r16, 5 }
+    d4d8:	[0-9a-f]* 	{ slth r5, r6, r7 ; nop }
+    d4e0:	[0-9a-f]* 	{ slth r5, r6, r7 ; seqi r15, r16, 5 }
+    d4e8:	[0-9a-f]* 	{ slth r5, r6, r7 ; sltb_u r15, r16, r17 }
+    d4f0:	[0-9a-f]* 	{ slth r5, r6, r7 ; srah r15, r16, r17 }
+    d4f8:	[0-9a-f]* 	{ slth_u r15, r16, r17 ; addhs r5, r6, r7 }
+    d500:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; slth_u r15, r16, r17 }
+    d508:	[0-9a-f]* 	{ slth_u r15, r16, r17 ; move r5, r6 }
+    d510:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slth_u r15, r16, r17 }
+    d518:	[0-9a-f]* 	{ pcnt r5, r6 ; slth_u r15, r16, r17 }
+    d520:	[0-9a-f]* 	{ slth_u r15, r16, r17 ; shlh r5, r6, r7 }
+    d528:	[0-9a-f]* 	{ slth_u r15, r16, r17 ; slth r5, r6, r7 }
+    d530:	[0-9a-f]* 	{ slth_u r15, r16, r17 ; subh r5, r6, r7 }
+    d538:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; and r15, r16, r17 }
+    d540:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; jrp r15 }
+    d548:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; minb_u r15, r16, r17 }
+    d550:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; packbs_u r15, r16, r17 }
+    d558:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; shadd r15, r16, 5 }
+    d560:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; slteb_u r15, r16, r17 }
+    d568:	[0-9a-f]* 	{ slth_u r5, r6, r7 ; sub r15, r16, r17 }
+    d570:	[0-9a-f]* 	{ slti r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+    d578:	[0-9a-f]* 	{ slti r15, r16, 5 ; adds r5, r6, r7 }
+    d580:	[0-9a-f]* 	{ slti r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+    d588:	[0-9a-f]* 	{ bytex r5, r6 ; slti r15, r16, 5 ; lw r25, r26 }
+    d590:	[0-9a-f]* 	{ ctz r5, r6 ; slti r15, r16, 5 ; lh r25, r26 }
+    d598:	[0-9a-f]* 	{ slti r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    d5a0:	[0-9a-f]* 	{ clz r5, r6 ; slti r15, r16, 5 ; lb r25, r26 }
+    d5a8:	[0-9a-f]* 	{ slti r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 }
+    d5b0:	[0-9a-f]* 	{ slti r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    d5b8:	[0-9a-f]* 	{ slti r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    d5c0:	[0-9a-f]* 	{ pcnt r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    d5c8:	[0-9a-f]* 	{ slti r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    d5d0:	[0-9a-f]* 	{ slti r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    d5d8:	[0-9a-f]* 	{ slti r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    d5e0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti r15, r16, 5 ; lh r25, r26 }
+    d5e8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    d5f0:	[0-9a-f]* 	{ slti r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    d5f8:	[0-9a-f]* 	{ slti r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    d600:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    d608:	[0-9a-f]* 	{ slti r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 }
+    d610:	[0-9a-f]* 	{ slti r15, r16, 5 ; maxh r5, r6, r7 }
+    d618:	[0-9a-f]* 	{ slti r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+    d620:	[0-9a-f]* 	{ slti r15, r16, 5 ; moveli r5, 4660 }
+    d628:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    d630:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 }
+    d638:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    d640:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 }
+    d648:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+    d650:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+    d658:	[0-9a-f]* 	{ slti r15, r16, 5 ; nop ; lh r25, r26 }
+    d660:	[0-9a-f]* 	{ slti r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    d668:	[0-9a-f]* 	{ slti r15, r16, 5 ; packhs r5, r6, r7 }
+    d670:	[0-9a-f]* 	{ slti r15, r16, 5 ; prefetch r25 }
+    d678:	[0-9a-f]* 	{ slti r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 }
+    d680:	[0-9a-f]* 	{ slti r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    d688:	[0-9a-f]* 	{ slti r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    d690:	[0-9a-f]* 	{ slti r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    d698:	[0-9a-f]* 	{ sadah r5, r6, r7 ; slti r15, r16, 5 }
+    d6a0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; sb r25, r26 }
+    d6a8:	[0-9a-f]* 	{ slti r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 }
+    d6b0:	[0-9a-f]* 	{ slti r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 }
+    d6b8:	[0-9a-f]* 	{ slti r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+    d6c0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    d6c8:	[0-9a-f]* 	{ slti r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 }
+    d6d0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+    d6d8:	[0-9a-f]* 	{ slti r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    d6e0:	[0-9a-f]* 	{ slti r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    d6e8:	[0-9a-f]* 	{ slti r15, r16, 5 ; slt r5, r6, r7 }
+    d6f0:	[0-9a-f]* 	{ slti r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+    d6f8:	[0-9a-f]* 	{ slti r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    d700:	[0-9a-f]* 	{ slti r15, r16, 5 ; sltib_u r5, r6, 5 }
+    d708:	[0-9a-f]* 	{ slti r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    d710:	[0-9a-f]* 	{ slti r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    d718:	[0-9a-f]* 	{ clz r5, r6 ; slti r15, r16, 5 ; sw r25, r26 }
+    d720:	[0-9a-f]* 	{ slti r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+    d728:	[0-9a-f]* 	{ slti r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    d730:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slti r15, r16, 5 }
+    d738:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slti r15, r16, 5 }
+    d740:	[0-9a-f]* 	{ slti r15, r16, 5 ; xor r5, r6, r7 }
+    d748:	[0-9a-f]* 	{ slti r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    d750:	[0-9a-f]* 	{ slti r5, r6, 5 ; and r15, r16, r17 }
+    d758:	[0-9a-f]* 	{ slti r5, r6, 5 ; prefetch r25 }
+    d760:	[0-9a-f]* 	{ slti r5, r6, 5 ; info 19 ; lw r25, r26 }
+    d768:	[0-9a-f]* 	{ slti r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    d770:	[0-9a-f]* 	{ slti r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    d778:	[0-9a-f]* 	{ slti r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    d780:	[0-9a-f]* 	{ slti r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    d788:	[0-9a-f]* 	{ slti r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 }
+    d790:	[0-9a-f]* 	{ slti r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+    d798:	[0-9a-f]* 	{ slti r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    d7a0:	[0-9a-f]* 	{ slti r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    d7a8:	[0-9a-f]* 	{ slti r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    d7b0:	[0-9a-f]* 	{ slti r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 }
+    d7b8:	[0-9a-f]* 	{ slti r5, r6, 5 ; maxb_u r15, r16, r17 }
+    d7c0:	[0-9a-f]* 	{ slti r5, r6, 5 ; mnz r15, r16, r17 }
+    d7c8:	[0-9a-f]* 	{ slti r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+    d7d0:	[0-9a-f]* 	{ slti r5, r6, 5 ; nop ; lh r25, r26 }
+    d7d8:	[0-9a-f]* 	{ slti r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+    d7e0:	[0-9a-f]* 	{ slti r5, r6, 5 ; packhs r15, r16, r17 }
+    d7e8:	[0-9a-f]* 	{ slti r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 }
+    d7f0:	[0-9a-f]* 	{ slti r5, r6, 5 ; prefetch r25 }
+    d7f8:	[0-9a-f]* 	{ slti r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+    d800:	[0-9a-f]* 	{ slti r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+    d808:	[0-9a-f]* 	{ slti r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 }
+    d810:	[0-9a-f]* 	{ slti r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    d818:	[0-9a-f]* 	{ slti r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+    d820:	[0-9a-f]* 	{ slti r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 }
+    d828:	[0-9a-f]* 	{ slti r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 }
+    d830:	[0-9a-f]* 	{ slti r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+    d838:	[0-9a-f]* 	{ slti r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+    d840:	[0-9a-f]* 	{ slti r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+    d848:	[0-9a-f]* 	{ slti r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    d850:	[0-9a-f]* 	{ slti r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    d858:	[0-9a-f]* 	{ slti r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+    d860:	[0-9a-f]* 	{ slti r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+    d868:	[0-9a-f]* 	{ slti r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+    d870:	[0-9a-f]* 	{ slti r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+    d878:	[0-9a-f]* 	{ slti r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+    d880:	[0-9a-f]* 	{ slti r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 }
+    d888:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 }
+    d890:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 }
+    d898:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; and r5, r6, r7 }
+    d8a0:	[0-9a-f]* 	{ bitx r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    d8a8:	[0-9a-f]* 	{ clz r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    d8b0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; lh_u r25, r26 }
+    d8b8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; intlb r5, r6, r7 }
+    d8c0:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 ; lb r25, r26 }
+    d8c8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shli r5, r6, 5 ; lb r25, r26 }
+    d8d0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; addi r5, r6, 5 ; lb_u r25, r26 }
+    d8d8:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    d8e0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    d8e8:	[0-9a-f]* 	{ bitx r5, r6 ; slti_u r15, r16, 5 ; lh r25, r26 }
+    d8f0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; mz r5, r6, r7 ; lh r25, r26 }
+    d8f8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slte_u r5, r6, r7 ; lh r25, r26 }
+    d900:	[0-9a-f]* 	{ ctz r5, r6 ; slti_u r15, r16, 5 ; lh_u r25, r26 }
+    d908:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 }
+    d910:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; sne r5, r6, r7 ; lh_u r25, r26 }
+    d918:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+    d920:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; rl r5, r6, r7 ; lw r25, r26 }
+    d928:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; sub r5, r6, r7 ; lw r25, r26 }
+    d930:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+    d938:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    d940:	[0-9a-f]* 	{ mulhh_su r5, r6, r7 ; slti_u r15, r16, 5 }
+    d948:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; slti_u r15, r16, 5 }
+    d950:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; slti_u r15, r16, 5 }
+    d958:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 }
+    d960:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    d968:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    d970:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 }
+    d978:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 }
+    d980:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 }
+    d988:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; add r5, r6, r7 ; prefetch r25 }
+    d990:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; slti_u r15, r16, 5 ; prefetch r25 }
+    d998:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shri r5, r6, 5 ; prefetch r25 }
+    d9a0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 }
+    d9a8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+    d9b0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    d9b8:	[0-9a-f]* 	{ ctz r5, r6 ; slti_u r15, r16, 5 ; sb r25, r26 }
+    d9c0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; or r5, r6, r7 ; sb r25, r26 }
+    d9c8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; sne r5, r6, r7 ; sb r25, r26 }
+    d9d0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; seqb r5, r6, r7 }
+    d9d8:	[0-9a-f]* 	{ clz r5, r6 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    d9e0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; nor r5, r6, r7 ; sh r25, r26 }
+    d9e8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 }
+    d9f0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shl r5, r6, r7 }
+    d9f8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 }
+    da00:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+    da08:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; sltb_u r5, r6, r7 }
+    da10:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slte_u r5, r6, r7 }
+    da18:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+    da20:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; sne r5, r6, r7 }
+    da28:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 }
+    da30:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; subhs r5, r6, r7 }
+    da38:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    da40:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; shli r5, r6, 5 ; sw r25, r26 }
+    da48:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    da50:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+    da58:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 }
+    da60:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; addb r15, r16, r17 }
+    da68:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 }
+    da70:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; dtlbpr r15 }
+    da78:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ill ; sb r25, r26 }
+    da80:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; iret }
+    da88:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ori r15, r16, 5 ; lb r25, r26 }
+    da90:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+    da98:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; rl r15, r16, r17 ; lb_u r25, r26 }
+    daa0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    daa8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ori r15, r16, 5 ; lh r25, r26 }
+    dab0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; srai r15, r16, 5 ; lh r25, r26 }
+    dab8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; rl r15, r16, r17 ; lh_u r25, r26 }
+    dac0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    dac8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; or r15, r16, r17 ; lw r25, r26 }
+    dad0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+    dad8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+    dae0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; move r15, r16 }
+    dae8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 }
+    daf0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 }
+    daf8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 }
+    db00:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; movei r15, 5 ; prefetch r25 }
+    db08:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 }
+    db10:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 }
+    db18:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 }
+    db20:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sb r15, r16 }
+    db28:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; s3a r15, r16, r17 ; sb r25, r26 }
+    db30:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 }
+    db38:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 }
+    db40:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; rl r15, r16, r17 ; sh r25, r26 }
+    db48:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sub r15, r16, r17 ; sh r25, r26 }
+    db50:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 }
+    db58:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 }
+    db60:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 }
+    db68:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 }
+    db70:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 }
+    db78:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sltib r15, r16, 5 }
+    db80:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+    db88:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 }
+    db90:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sw r25, r26 }
+    db98:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; shr r15, r16, r17 ; sw r25, r26 }
+    dba0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    dba8:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; sltib r15, r16, 5 }
+    dbb0:	[0-9a-f]* 	{ sltib r15, r16, 5 ; maxb_u r5, r6, r7 }
+    dbb8:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; sltib r15, r16, 5 }
+    dbc0:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sltib r15, r16, 5 }
+    dbc8:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; sltib r15, r16, 5 }
+    dbd0:	[0-9a-f]* 	{ sltib r15, r16, 5 ; shrib r5, r6, 5 }
+    dbd8:	[0-9a-f]* 	{ sltib r15, r16, 5 ; sne r5, r6, r7 }
+    dbe0:	[0-9a-f]* 	{ sltib r15, r16, 5 ; xori r5, r6, 5 }
+    dbe8:	[0-9a-f]* 	{ sltib r5, r6, 5 ; ill }
+    dbf0:	[0-9a-f]* 	{ sltib r5, r6, 5 ; lhadd_u r15, r16, 5 }
+    dbf8:	[0-9a-f]* 	{ sltib r5, r6, 5 ; move r15, r16 }
+    dc00:	[0-9a-f]* 	{ sltib r5, r6, 5 ; s1a r15, r16, r17 }
+    dc08:	[0-9a-f]* 	{ sltib r5, r6, 5 ; shrb r15, r16, r17 }
+    dc10:	[0-9a-f]* 	{ sltib r5, r6, 5 ; sltib_u r15, r16, 5 }
+    dc18:	[0-9a-f]* 	{ sltib r5, r6, 5 ; tns r15, r16 }
+    dc20:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; sltib_u r15, r16, 5 }
+    dc28:	[0-9a-f]* 	{ sltib_u r15, r16, 5 ; minb_u r5, r6, r7 }
+    dc30:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; sltib_u r15, r16, 5 }
+    dc38:	[0-9a-f]* 	{ sltib_u r15, r16, 5 ; nop }
+    dc40:	[0-9a-f]* 	{ sltib_u r15, r16, 5 ; seq r5, r6, r7 }
+    dc48:	[0-9a-f]* 	{ sltib_u r15, r16, 5 ; sltb r5, r6, r7 }
+    dc50:	[0-9a-f]* 	{ sltib_u r15, r16, 5 ; srab r5, r6, r7 }
+    dc58:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; addh r15, r16, r17 }
+    dc60:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; inthh r15, r16, r17 }
+    dc68:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; lwadd r15, r16, 5 }
+    dc70:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; mtspr 5, r16 }
+    dc78:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; sbadd r15, r16, 5 }
+    dc80:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; shrih r15, r16, 5 }
+    dc88:	[0-9a-f]* 	{ sltib_u r5, r6, 5 ; sneb r15, r16, r17 }
+    dc90:	[0-9a-f]* 	{ sltih r15, r16, 5 ; add r5, r6, r7 }
+    dc98:	[0-9a-f]* 	{ clz r5, r6 ; sltih r15, r16, 5 }
+    dca0:	[0-9a-f]* 	{ sltih r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+    dca8:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; sltih r15, r16, 5 }
+    dcb0:	[0-9a-f]* 	{ sltih r15, r16, 5 ; packbs_u r5, r6, r7 }
+    dcb8:	[0-9a-f]* 	{ sltih r15, r16, 5 ; seqib r5, r6, 5 }
+    dcc0:	[0-9a-f]* 	{ sltih r15, r16, 5 ; slteb r5, r6, r7 }
+    dcc8:	[0-9a-f]* 	{ sltih r15, r16, 5 ; sraih r5, r6, 5 }
+    dcd0:	[0-9a-f]* 	{ sltih r5, r6, 5 ; addih r15, r16, 5 }
+    dcd8:	[0-9a-f]* 	{ sltih r5, r6, 5 ; iret }
+    dce0:	[0-9a-f]* 	{ sltih r5, r6, 5 ; maxib_u r15, r16, 5 }
+    dce8:	[0-9a-f]* 	{ sltih r5, r6, 5 ; nop }
+    dcf0:	[0-9a-f]* 	{ sltih r5, r6, 5 ; seqi r15, r16, 5 }
+    dcf8:	[0-9a-f]* 	{ sltih r5, r6, 5 ; sltb_u r15, r16, r17 }
+    dd00:	[0-9a-f]* 	{ sltih r5, r6, 5 ; srah r15, r16, r17 }
+    dd08:	[0-9a-f]* 	{ sltih_u r15, r16, 5 ; addhs r5, r6, r7 }
+    dd10:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; sltih_u r15, r16, 5 }
+    dd18:	[0-9a-f]* 	{ sltih_u r15, r16, 5 ; move r5, r6 }
+    dd20:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sltih_u r15, r16, 5 }
+    dd28:	[0-9a-f]* 	{ pcnt r5, r6 ; sltih_u r15, r16, 5 }
+    dd30:	[0-9a-f]* 	{ sltih_u r15, r16, 5 ; shlh r5, r6, r7 }
+    dd38:	[0-9a-f]* 	{ sltih_u r15, r16, 5 ; slth r5, r6, r7 }
+    dd40:	[0-9a-f]* 	{ sltih_u r15, r16, 5 ; subh r5, r6, r7 }
+    dd48:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; and r15, r16, r17 }
+    dd50:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; jrp r15 }
+    dd58:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; minb_u r15, r16, r17 }
+    dd60:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; packbs_u r15, r16, r17 }
+    dd68:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; shadd r15, r16, 5 }
+    dd70:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; slteb_u r15, r16, r17 }
+    dd78:	[0-9a-f]* 	{ sltih_u r5, r6, 5 ; sub r15, r16, r17 }
+    dd80:	[0-9a-f]* 	{ sne r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    dd88:	[0-9a-f]* 	{ sne r15, r16, r17 ; adds r5, r6, r7 }
+    dd90:	[0-9a-f]* 	{ sne r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    dd98:	[0-9a-f]* 	{ bytex r5, r6 ; sne r15, r16, r17 ; lw r25, r26 }
+    dda0:	[0-9a-f]* 	{ ctz r5, r6 ; sne r15, r16, r17 ; lh r25, r26 }
+    dda8:	[0-9a-f]* 	{ sne r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    ddb0:	[0-9a-f]* 	{ clz r5, r6 ; sne r15, r16, r17 ; lb r25, r26 }
+    ddb8:	[0-9a-f]* 	{ sne r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    ddc0:	[0-9a-f]* 	{ sne r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    ddc8:	[0-9a-f]* 	{ sne r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    ddd0:	[0-9a-f]* 	{ pcnt r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    ddd8:	[0-9a-f]* 	{ sne r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    dde0:	[0-9a-f]* 	{ sne r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    dde8:	[0-9a-f]* 	{ sne r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    ddf0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sne r15, r16, r17 ; lh r25, r26 }
+    ddf8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    de00:	[0-9a-f]* 	{ sne r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    de08:	[0-9a-f]* 	{ sne r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    de10:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    de18:	[0-9a-f]* 	{ sne r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    de20:	[0-9a-f]* 	{ sne r15, r16, r17 ; maxh r5, r6, r7 }
+    de28:	[0-9a-f]* 	{ sne r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    de30:	[0-9a-f]* 	{ sne r15, r16, r17 ; moveli r5, 4660 }
+    de38:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+    de40:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    de48:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+    de50:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    de58:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sne r15, r16, r17 ; prefetch r25 }
+    de60:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    de68:	[0-9a-f]* 	{ sne r15, r16, r17 ; nop ; lh r25, r26 }
+    de70:	[0-9a-f]* 	{ sne r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    de78:	[0-9a-f]* 	{ sne r15, r16, r17 ; packhs r5, r6, r7 }
+    de80:	[0-9a-f]* 	{ sne r15, r16, r17 ; prefetch r25 }
+    de88:	[0-9a-f]* 	{ sne r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    de90:	[0-9a-f]* 	{ sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    de98:	[0-9a-f]* 	{ sne r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    dea0:	[0-9a-f]* 	{ sne r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    dea8:	[0-9a-f]* 	{ sadah r5, r6, r7 ; sne r15, r16, r17 }
+    deb0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; sb r25, r26 }
+    deb8:	[0-9a-f]* 	{ sne r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    dec0:	[0-9a-f]* 	{ sne r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    dec8:	[0-9a-f]* 	{ sne r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    ded0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+    ded8:	[0-9a-f]* 	{ sne r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    dee0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sne r15, r16, r17 ; sh r25, r26 }
+    dee8:	[0-9a-f]* 	{ sne r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    def0:	[0-9a-f]* 	{ sne r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    def8:	[0-9a-f]* 	{ sne r15, r16, r17 ; slt r5, r6, r7 }
+    df00:	[0-9a-f]* 	{ sne r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    df08:	[0-9a-f]* 	{ sne r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    df10:	[0-9a-f]* 	{ sne r15, r16, r17 ; sltib_u r5, r6, 5 }
+    df18:	[0-9a-f]* 	{ sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    df20:	[0-9a-f]* 	{ sne r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    df28:	[0-9a-f]* 	{ clz r5, r6 ; sne r15, r16, r17 ; sw r25, r26 }
+    df30:	[0-9a-f]* 	{ sne r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    df38:	[0-9a-f]* 	{ sne r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    df40:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sne r15, r16, r17 }
+    df48:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sne r15, r16, r17 }
+    df50:	[0-9a-f]* 	{ sne r15, r16, r17 ; xor r5, r6, r7 }
+    df58:	[0-9a-f]* 	{ sne r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    df60:	[0-9a-f]* 	{ sne r5, r6, r7 ; and r15, r16, r17 }
+    df68:	[0-9a-f]* 	{ sne r5, r6, r7 ; prefetch r25 }
+    df70:	[0-9a-f]* 	{ sne r5, r6, r7 ; info 19 ; lw r25, r26 }
+    df78:	[0-9a-f]* 	{ sne r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    df80:	[0-9a-f]* 	{ sne r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    df88:	[0-9a-f]* 	{ sne r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    df90:	[0-9a-f]* 	{ sne r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    df98:	[0-9a-f]* 	{ sne r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    dfa0:	[0-9a-f]* 	{ sne r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    dfa8:	[0-9a-f]* 	{ sne r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    dfb0:	[0-9a-f]* 	{ sne r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    dfb8:	[0-9a-f]* 	{ sne r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    dfc0:	[0-9a-f]* 	{ sne r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    dfc8:	[0-9a-f]* 	{ sne r5, r6, r7 ; maxb_u r15, r16, r17 }
+    dfd0:	[0-9a-f]* 	{ sne r5, r6, r7 ; mnz r15, r16, r17 }
+    dfd8:	[0-9a-f]* 	{ sne r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    dfe0:	[0-9a-f]* 	{ sne r5, r6, r7 ; nop ; lh r25, r26 }
+    dfe8:	[0-9a-f]* 	{ sne r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    dff0:	[0-9a-f]* 	{ sne r5, r6, r7 ; packhs r15, r16, r17 }
+    dff8:	[0-9a-f]* 	{ sne r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    e000:	[0-9a-f]* 	{ sne r5, r6, r7 ; prefetch r25 }
+    e008:	[0-9a-f]* 	{ sne r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    e010:	[0-9a-f]* 	{ sne r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    e018:	[0-9a-f]* 	{ sne r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    e020:	[0-9a-f]* 	{ sne r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    e028:	[0-9a-f]* 	{ sne r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    e030:	[0-9a-f]* 	{ sne r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    e038:	[0-9a-f]* 	{ sne r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    e040:	[0-9a-f]* 	{ sne r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    e048:	[0-9a-f]* 	{ sne r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    e050:	[0-9a-f]* 	{ sne r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    e058:	[0-9a-f]* 	{ sne r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    e060:	[0-9a-f]* 	{ sne r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    e068:	[0-9a-f]* 	{ sne r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    e070:	[0-9a-f]* 	{ sne r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    e078:	[0-9a-f]* 	{ sne r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    e080:	[0-9a-f]* 	{ sne r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    e088:	[0-9a-f]* 	{ sne r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    e090:	[0-9a-f]* 	{ sne r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    e098:	[0-9a-f]* 	{ sneb r15, r16, r17 ; add r5, r6, r7 }
+    e0a0:	[0-9a-f]* 	{ clz r5, r6 ; sneb r15, r16, r17 }
+    e0a8:	[0-9a-f]* 	{ sneb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+    e0b0:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; sneb r15, r16, r17 }
+    e0b8:	[0-9a-f]* 	{ sneb r15, r16, r17 ; packbs_u r5, r6, r7 }
+    e0c0:	[0-9a-f]* 	{ sneb r15, r16, r17 ; seqib r5, r6, 5 }
+    e0c8:	[0-9a-f]* 	{ sneb r15, r16, r17 ; slteb r5, r6, r7 }
+    e0d0:	[0-9a-f]* 	{ sneb r15, r16, r17 ; sraih r5, r6, 5 }
+    e0d8:	[0-9a-f]* 	{ sneb r5, r6, r7 ; addih r15, r16, 5 }
+    e0e0:	[0-9a-f]* 	{ sneb r5, r6, r7 ; iret }
+    e0e8:	[0-9a-f]* 	{ sneb r5, r6, r7 ; maxib_u r15, r16, 5 }
+    e0f0:	[0-9a-f]* 	{ sneb r5, r6, r7 ; nop }
+    e0f8:	[0-9a-f]* 	{ sneb r5, r6, r7 ; seqi r15, r16, 5 }
+    e100:	[0-9a-f]* 	{ sneb r5, r6, r7 ; sltb_u r15, r16, r17 }
+    e108:	[0-9a-f]* 	{ sneb r5, r6, r7 ; srah r15, r16, r17 }
+    e110:	[0-9a-f]* 	{ sneh r15, r16, r17 ; addhs r5, r6, r7 }
+    e118:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; sneh r15, r16, r17 }
+    e120:	[0-9a-f]* 	{ sneh r15, r16, r17 ; move r5, r6 }
+    e128:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sneh r15, r16, r17 }
+    e130:	[0-9a-f]* 	{ pcnt r5, r6 ; sneh r15, r16, r17 }
+    e138:	[0-9a-f]* 	{ sneh r15, r16, r17 ; shlh r5, r6, r7 }
+    e140:	[0-9a-f]* 	{ sneh r15, r16, r17 ; slth r5, r6, r7 }
+    e148:	[0-9a-f]* 	{ sneh r15, r16, r17 ; subh r5, r6, r7 }
+    e150:	[0-9a-f]* 	{ sneh r5, r6, r7 ; and r15, r16, r17 }
+    e158:	[0-9a-f]* 	{ sneh r5, r6, r7 ; jrp r15 }
+    e160:	[0-9a-f]* 	{ sneh r5, r6, r7 ; minb_u r15, r16, r17 }
+    e168:	[0-9a-f]* 	{ sneh r5, r6, r7 ; packbs_u r15, r16, r17 }
+    e170:	[0-9a-f]* 	{ sneh r5, r6, r7 ; shadd r15, r16, 5 }
+    e178:	[0-9a-f]* 	{ sneh r5, r6, r7 ; slteb_u r15, r16, r17 }
+    e180:	[0-9a-f]* 	{ sneh r5, r6, r7 ; sub r15, r16, r17 }
+    e188:	[0-9a-f]* 	{ sra r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    e190:	[0-9a-f]* 	{ sra r15, r16, r17 ; adds r5, r6, r7 }
+    e198:	[0-9a-f]* 	{ sra r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    e1a0:	[0-9a-f]* 	{ bytex r5, r6 ; sra r15, r16, r17 ; lw r25, r26 }
+    e1a8:	[0-9a-f]* 	{ ctz r5, r6 ; sra r15, r16, r17 ; lh r25, r26 }
+    e1b0:	[0-9a-f]* 	{ sra r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    e1b8:	[0-9a-f]* 	{ clz r5, r6 ; sra r15, r16, r17 ; lb r25, r26 }
+    e1c0:	[0-9a-f]* 	{ sra r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    e1c8:	[0-9a-f]* 	{ sra r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    e1d0:	[0-9a-f]* 	{ sra r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    e1d8:	[0-9a-f]* 	{ pcnt r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 }
+    e1e0:	[0-9a-f]* 	{ sra r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    e1e8:	[0-9a-f]* 	{ sra r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    e1f0:	[0-9a-f]* 	{ sra r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    e1f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sra r15, r16, r17 ; lh r25, r26 }
+    e200:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 }
+    e208:	[0-9a-f]* 	{ sra r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    e210:	[0-9a-f]* 	{ sra r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    e218:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    e220:	[0-9a-f]* 	{ sra r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    e228:	[0-9a-f]* 	{ sra r15, r16, r17 ; maxh r5, r6, r7 }
+    e230:	[0-9a-f]* 	{ sra r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    e238:	[0-9a-f]* 	{ sra r15, r16, r17 ; moveli r5, 4660 }
+    e240:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 }
+    e248:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    e250:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 }
+    e258:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    e260:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+    e268:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+    e270:	[0-9a-f]* 	{ sra r15, r16, r17 ; nop ; lh r25, r26 }
+    e278:	[0-9a-f]* 	{ sra r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    e280:	[0-9a-f]* 	{ sra r15, r16, r17 ; packhs r5, r6, r7 }
+    e288:	[0-9a-f]* 	{ sra r15, r16, r17 ; prefetch r25 }
+    e290:	[0-9a-f]* 	{ sra r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    e298:	[0-9a-f]* 	{ sra r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    e2a0:	[0-9a-f]* 	{ sra r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    e2a8:	[0-9a-f]* 	{ sra r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    e2b0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; sra r15, r16, r17 }
+    e2b8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+    e2c0:	[0-9a-f]* 	{ sra r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    e2c8:	[0-9a-f]* 	{ sra r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    e2d0:	[0-9a-f]* 	{ sra r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    e2d8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 }
+    e2e0:	[0-9a-f]* 	{ sra r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    e2e8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sra r15, r16, r17 ; sh r25, r26 }
+    e2f0:	[0-9a-f]* 	{ sra r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    e2f8:	[0-9a-f]* 	{ sra r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    e300:	[0-9a-f]* 	{ sra r15, r16, r17 ; slt r5, r6, r7 }
+    e308:	[0-9a-f]* 	{ sra r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    e310:	[0-9a-f]* 	{ sra r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    e318:	[0-9a-f]* 	{ sra r15, r16, r17 ; sltib_u r5, r6, 5 }
+    e320:	[0-9a-f]* 	{ sra r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    e328:	[0-9a-f]* 	{ sra r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    e330:	[0-9a-f]* 	{ clz r5, r6 ; sra r15, r16, r17 ; sw r25, r26 }
+    e338:	[0-9a-f]* 	{ sra r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    e340:	[0-9a-f]* 	{ sra r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    e348:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sra r15, r16, r17 }
+    e350:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 }
+    e358:	[0-9a-f]* 	{ sra r15, r16, r17 ; xor r5, r6, r7 }
+    e360:	[0-9a-f]* 	{ sra r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    e368:	[0-9a-f]* 	{ sra r5, r6, r7 ; and r15, r16, r17 }
+    e370:	[0-9a-f]* 	{ sra r5, r6, r7 ; prefetch r25 }
+    e378:	[0-9a-f]* 	{ sra r5, r6, r7 ; info 19 ; lw r25, r26 }
+    e380:	[0-9a-f]* 	{ sra r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    e388:	[0-9a-f]* 	{ sra r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    e390:	[0-9a-f]* 	{ sra r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    e398:	[0-9a-f]* 	{ sra r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    e3a0:	[0-9a-f]* 	{ sra r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    e3a8:	[0-9a-f]* 	{ sra r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    e3b0:	[0-9a-f]* 	{ sra r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    e3b8:	[0-9a-f]* 	{ sra r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    e3c0:	[0-9a-f]* 	{ sra r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    e3c8:	[0-9a-f]* 	{ sra r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    e3d0:	[0-9a-f]* 	{ sra r5, r6, r7 ; maxb_u r15, r16, r17 }
+    e3d8:	[0-9a-f]* 	{ sra r5, r6, r7 ; mnz r15, r16, r17 }
+    e3e0:	[0-9a-f]* 	{ sra r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    e3e8:	[0-9a-f]* 	{ sra r5, r6, r7 ; nop ; lh r25, r26 }
+    e3f0:	[0-9a-f]* 	{ sra r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    e3f8:	[0-9a-f]* 	{ sra r5, r6, r7 ; packhs r15, r16, r17 }
+    e400:	[0-9a-f]* 	{ sra r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    e408:	[0-9a-f]* 	{ sra r5, r6, r7 ; prefetch r25 }
+    e410:	[0-9a-f]* 	{ sra r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    e418:	[0-9a-f]* 	{ sra r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    e420:	[0-9a-f]* 	{ sra r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    e428:	[0-9a-f]* 	{ sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    e430:	[0-9a-f]* 	{ sra r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    e438:	[0-9a-f]* 	{ sra r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    e440:	[0-9a-f]* 	{ sra r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    e448:	[0-9a-f]* 	{ sra r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    e450:	[0-9a-f]* 	{ sra r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    e458:	[0-9a-f]* 	{ sra r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    e460:	[0-9a-f]* 	{ sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    e468:	[0-9a-f]* 	{ sra r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    e470:	[0-9a-f]* 	{ sra r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    e478:	[0-9a-f]* 	{ sra r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    e480:	[0-9a-f]* 	{ sra r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    e488:	[0-9a-f]* 	{ sra r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    e490:	[0-9a-f]* 	{ sra r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    e498:	[0-9a-f]* 	{ sra r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    e4a0:	[0-9a-f]* 	{ srab r15, r16, r17 ; add r5, r6, r7 }
+    e4a8:	[0-9a-f]* 	{ clz r5, r6 ; srab r15, r16, r17 }
+    e4b0:	[0-9a-f]* 	{ srab r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+    e4b8:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; srab r15, r16, r17 }
+    e4c0:	[0-9a-f]* 	{ srab r15, r16, r17 ; packbs_u r5, r6, r7 }
+    e4c8:	[0-9a-f]* 	{ srab r15, r16, r17 ; seqib r5, r6, 5 }
+    e4d0:	[0-9a-f]* 	{ srab r15, r16, r17 ; slteb r5, r6, r7 }
+    e4d8:	[0-9a-f]* 	{ srab r15, r16, r17 ; sraih r5, r6, 5 }
+    e4e0:	[0-9a-f]* 	{ srab r5, r6, r7 ; addih r15, r16, 5 }
+    e4e8:	[0-9a-f]* 	{ srab r5, r6, r7 ; iret }
+    e4f0:	[0-9a-f]* 	{ srab r5, r6, r7 ; maxib_u r15, r16, 5 }
+    e4f8:	[0-9a-f]* 	{ srab r5, r6, r7 ; nop }
+    e500:	[0-9a-f]* 	{ srab r5, r6, r7 ; seqi r15, r16, 5 }
+    e508:	[0-9a-f]* 	{ srab r5, r6, r7 ; sltb_u r15, r16, r17 }
+    e510:	[0-9a-f]* 	{ srab r5, r6, r7 ; srah r15, r16, r17 }
+    e518:	[0-9a-f]* 	{ srah r15, r16, r17 ; addhs r5, r6, r7 }
+    e520:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; srah r15, r16, r17 }
+    e528:	[0-9a-f]* 	{ srah r15, r16, r17 ; move r5, r6 }
+    e530:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; srah r15, r16, r17 }
+    e538:	[0-9a-f]* 	{ pcnt r5, r6 ; srah r15, r16, r17 }
+    e540:	[0-9a-f]* 	{ srah r15, r16, r17 ; shlh r5, r6, r7 }
+    e548:	[0-9a-f]* 	{ srah r15, r16, r17 ; slth r5, r6, r7 }
+    e550:	[0-9a-f]* 	{ srah r15, r16, r17 ; subh r5, r6, r7 }
+    e558:	[0-9a-f]* 	{ srah r5, r6, r7 ; and r15, r16, r17 }
+    e560:	[0-9a-f]* 	{ srah r5, r6, r7 ; jrp r15 }
+    e568:	[0-9a-f]* 	{ srah r5, r6, r7 ; minb_u r15, r16, r17 }
+    e570:	[0-9a-f]* 	{ srah r5, r6, r7 ; packbs_u r15, r16, r17 }
+    e578:	[0-9a-f]* 	{ srah r5, r6, r7 ; shadd r15, r16, 5 }
+    e580:	[0-9a-f]* 	{ srah r5, r6, r7 ; slteb_u r15, r16, r17 }
+    e588:	[0-9a-f]* 	{ srah r5, r6, r7 ; sub r15, r16, r17 }
+    e590:	[0-9a-f]* 	{ srai r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+    e598:	[0-9a-f]* 	{ srai r15, r16, 5 ; adds r5, r6, r7 }
+    e5a0:	[0-9a-f]* 	{ srai r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+    e5a8:	[0-9a-f]* 	{ bytex r5, r6 ; srai r15, r16, 5 ; lw r25, r26 }
+    e5b0:	[0-9a-f]* 	{ ctz r5, r6 ; srai r15, r16, 5 ; lh r25, r26 }
+    e5b8:	[0-9a-f]* 	{ srai r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    e5c0:	[0-9a-f]* 	{ clz r5, r6 ; srai r15, r16, 5 ; lb r25, r26 }
+    e5c8:	[0-9a-f]* 	{ srai r15, r16, 5 ; nor r5, r6, r7 ; lb r25, r26 }
+    e5d0:	[0-9a-f]* 	{ srai r15, r16, 5 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    e5d8:	[0-9a-f]* 	{ srai r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+    e5e0:	[0-9a-f]* 	{ pcnt r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    e5e8:	[0-9a-f]* 	{ srai r15, r16, 5 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    e5f0:	[0-9a-f]* 	{ srai r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+    e5f8:	[0-9a-f]* 	{ srai r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+    e600:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; srai r15, r16, 5 ; lh r25, r26 }
+    e608:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    e610:	[0-9a-f]* 	{ srai r15, r16, 5 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    e618:	[0-9a-f]* 	{ srai r15, r16, 5 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    e620:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    e628:	[0-9a-f]* 	{ srai r15, r16, 5 ; shli r5, r6, 5 ; lw r25, r26 }
+    e630:	[0-9a-f]* 	{ srai r15, r16, 5 ; maxh r5, r6, r7 }
+    e638:	[0-9a-f]* 	{ srai r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+    e640:	[0-9a-f]* 	{ srai r15, r16, 5 ; moveli r5, 4660 }
+    e648:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    e650:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+    e658:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    e660:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+    e668:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; srai r15, r16, 5 ; prefetch r25 }
+    e670:	[0-9a-f]* 	{ mvz r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+    e678:	[0-9a-f]* 	{ srai r15, r16, 5 ; nop ; lh r25, r26 }
+    e680:	[0-9a-f]* 	{ srai r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+    e688:	[0-9a-f]* 	{ srai r15, r16, 5 ; packhs r5, r6, r7 }
+    e690:	[0-9a-f]* 	{ srai r15, r16, 5 ; prefetch r25 }
+    e698:	[0-9a-f]* 	{ srai r15, r16, 5 ; ori r5, r6, 5 ; prefetch r25 }
+    e6a0:	[0-9a-f]* 	{ srai r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    e6a8:	[0-9a-f]* 	{ srai r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    e6b0:	[0-9a-f]* 	{ srai r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    e6b8:	[0-9a-f]* 	{ sadah r5, r6, r7 ; srai r15, r16, 5 }
+    e6c0:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+    e6c8:	[0-9a-f]* 	{ srai r15, r16, 5 ; seq r5, r6, r7 ; sb r25, r26 }
+    e6d0:	[0-9a-f]* 	{ srai r15, r16, 5 ; xor r5, r6, r7 ; sb r25, r26 }
+    e6d8:	[0-9a-f]* 	{ srai r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+    e6e0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; srai r15, r16, 5 ; sh r25, r26 }
+    e6e8:	[0-9a-f]* 	{ srai r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 }
+    e6f0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 }
+    e6f8:	[0-9a-f]* 	{ srai r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+    e700:	[0-9a-f]* 	{ srai r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    e708:	[0-9a-f]* 	{ srai r15, r16, 5 ; slt r5, r6, r7 }
+    e710:	[0-9a-f]* 	{ srai r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+    e718:	[0-9a-f]* 	{ srai r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    e720:	[0-9a-f]* 	{ srai r15, r16, 5 ; sltib_u r5, r6, 5 }
+    e728:	[0-9a-f]* 	{ srai r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+    e730:	[0-9a-f]* 	{ srai r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    e738:	[0-9a-f]* 	{ clz r5, r6 ; srai r15, r16, 5 ; sw r25, r26 }
+    e740:	[0-9a-f]* 	{ srai r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+    e748:	[0-9a-f]* 	{ srai r15, r16, 5 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    e750:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; srai r15, r16, 5 }
+    e758:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; srai r15, r16, 5 }
+    e760:	[0-9a-f]* 	{ srai r15, r16, 5 ; xor r5, r6, r7 }
+    e768:	[0-9a-f]* 	{ srai r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    e770:	[0-9a-f]* 	{ srai r5, r6, 5 ; and r15, r16, r17 }
+    e778:	[0-9a-f]* 	{ srai r5, r6, 5 ; prefetch r25 }
+    e780:	[0-9a-f]* 	{ srai r5, r6, 5 ; info 19 ; lw r25, r26 }
+    e788:	[0-9a-f]* 	{ srai r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+    e790:	[0-9a-f]* 	{ srai r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+    e798:	[0-9a-f]* 	{ srai r5, r6, 5 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    e7a0:	[0-9a-f]* 	{ srai r5, r6, 5 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    e7a8:	[0-9a-f]* 	{ srai r5, r6, 5 ; and r15, r16, r17 ; lh r25, r26 }
+    e7b0:	[0-9a-f]* 	{ srai r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+    e7b8:	[0-9a-f]* 	{ srai r5, r6, 5 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    e7c0:	[0-9a-f]* 	{ srai r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    e7c8:	[0-9a-f]* 	{ srai r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+    e7d0:	[0-9a-f]* 	{ srai r5, r6, 5 ; seqi r15, r16, 5 ; lw r25, r26 }
+    e7d8:	[0-9a-f]* 	{ srai r5, r6, 5 ; maxb_u r15, r16, r17 }
+    e7e0:	[0-9a-f]* 	{ srai r5, r6, 5 ; mnz r15, r16, r17 }
+    e7e8:	[0-9a-f]* 	{ srai r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+    e7f0:	[0-9a-f]* 	{ srai r5, r6, 5 ; nop ; lh r25, r26 }
+    e7f8:	[0-9a-f]* 	{ srai r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+    e800:	[0-9a-f]* 	{ srai r5, r6, 5 ; packhs r15, r16, r17 }
+    e808:	[0-9a-f]* 	{ srai r5, r6, 5 ; s1a r15, r16, r17 ; prefetch r25 }
+    e810:	[0-9a-f]* 	{ srai r5, r6, 5 ; prefetch r25 }
+    e818:	[0-9a-f]* 	{ srai r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+    e820:	[0-9a-f]* 	{ srai r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+    e828:	[0-9a-f]* 	{ srai r5, r6, 5 ; mnz r15, r16, r17 ; sb r25, r26 }
+    e830:	[0-9a-f]* 	{ srai r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    e838:	[0-9a-f]* 	{ srai r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+    e840:	[0-9a-f]* 	{ srai r5, r6, 5 ; andi r15, r16, 5 ; sh r25, r26 }
+    e848:	[0-9a-f]* 	{ srai r5, r6, 5 ; shli r15, r16, 5 ; sh r25, r26 }
+    e850:	[0-9a-f]* 	{ srai r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+    e858:	[0-9a-f]* 	{ srai r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+    e860:	[0-9a-f]* 	{ srai r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+    e868:	[0-9a-f]* 	{ srai r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    e870:	[0-9a-f]* 	{ srai r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    e878:	[0-9a-f]* 	{ srai r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+    e880:	[0-9a-f]* 	{ srai r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+    e888:	[0-9a-f]* 	{ srai r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+    e890:	[0-9a-f]* 	{ srai r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+    e898:	[0-9a-f]* 	{ srai r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+    e8a0:	[0-9a-f]* 	{ srai r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 }
+    e8a8:	[0-9a-f]* 	{ sraib r15, r16, 5 ; add r5, r6, r7 }
+    e8b0:	[0-9a-f]* 	{ clz r5, r6 ; sraib r15, r16, 5 }
+    e8b8:	[0-9a-f]* 	{ sraib r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+    e8c0:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; sraib r15, r16, 5 }
+    e8c8:	[0-9a-f]* 	{ sraib r15, r16, 5 ; packbs_u r5, r6, r7 }
+    e8d0:	[0-9a-f]* 	{ sraib r15, r16, 5 ; seqib r5, r6, 5 }
+    e8d8:	[0-9a-f]* 	{ sraib r15, r16, 5 ; slteb r5, r6, r7 }
+    e8e0:	[0-9a-f]* 	{ sraib r15, r16, 5 ; sraih r5, r6, 5 }
+    e8e8:	[0-9a-f]* 	{ sraib r5, r6, 5 ; addih r15, r16, 5 }
+    e8f0:	[0-9a-f]* 	{ sraib r5, r6, 5 ; iret }
+    e8f8:	[0-9a-f]* 	{ sraib r5, r6, 5 ; maxib_u r15, r16, 5 }
+    e900:	[0-9a-f]* 	{ sraib r5, r6, 5 ; nop }
+    e908:	[0-9a-f]* 	{ sraib r5, r6, 5 ; seqi r15, r16, 5 }
+    e910:	[0-9a-f]* 	{ sraib r5, r6, 5 ; sltb_u r15, r16, r17 }
+    e918:	[0-9a-f]* 	{ sraib r5, r6, 5 ; srah r15, r16, r17 }
+    e920:	[0-9a-f]* 	{ sraih r15, r16, 5 ; addhs r5, r6, r7 }
+    e928:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; sraih r15, r16, 5 }
+    e930:	[0-9a-f]* 	{ sraih r15, r16, 5 ; move r5, r6 }
+    e938:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sraih r15, r16, 5 }
+    e940:	[0-9a-f]* 	{ pcnt r5, r6 ; sraih r15, r16, 5 }
+    e948:	[0-9a-f]* 	{ sraih r15, r16, 5 ; shlh r5, r6, r7 }
+    e950:	[0-9a-f]* 	{ sraih r15, r16, 5 ; slth r5, r6, r7 }
+    e958:	[0-9a-f]* 	{ sraih r15, r16, 5 ; subh r5, r6, r7 }
+    e960:	[0-9a-f]* 	{ sraih r5, r6, 5 ; and r15, r16, r17 }
+    e968:	[0-9a-f]* 	{ sraih r5, r6, 5 ; jrp r15 }
+    e970:	[0-9a-f]* 	{ sraih r5, r6, 5 ; minb_u r15, r16, r17 }
+    e978:	[0-9a-f]* 	{ sraih r5, r6, 5 ; packbs_u r15, r16, r17 }
+    e980:	[0-9a-f]* 	{ sraih r5, r6, 5 ; shadd r15, r16, 5 }
+    e988:	[0-9a-f]* 	{ sraih r5, r6, 5 ; slteb_u r15, r16, r17 }
+    e990:	[0-9a-f]* 	{ sraih r5, r6, 5 ; sub r15, r16, r17 }
+    e998:	[0-9a-f]* 	{ sub r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+    e9a0:	[0-9a-f]* 	{ sub r15, r16, r17 ; adds r5, r6, r7 }
+    e9a8:	[0-9a-f]* 	{ sub r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+    e9b0:	[0-9a-f]* 	{ bytex r5, r6 ; sub r15, r16, r17 ; lw r25, r26 }
+    e9b8:	[0-9a-f]* 	{ ctz r5, r6 ; sub r15, r16, r17 ; lh r25, r26 }
+    e9c0:	[0-9a-f]* 	{ sub r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    e9c8:	[0-9a-f]* 	{ clz r5, r6 ; sub r15, r16, r17 ; lb r25, r26 }
+    e9d0:	[0-9a-f]* 	{ sub r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+    e9d8:	[0-9a-f]* 	{ sub r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+    e9e0:	[0-9a-f]* 	{ sub r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+    e9e8:	[0-9a-f]* 	{ pcnt r5, r6 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    e9f0:	[0-9a-f]* 	{ sub r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+    e9f8:	[0-9a-f]* 	{ sub r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+    ea00:	[0-9a-f]* 	{ sub r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+    ea08:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sub r15, r16, r17 ; lh r25, r26 }
+    ea10:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+    ea18:	[0-9a-f]* 	{ sub r15, r16, r17 ; seq r5, r6, r7 ; lh_u r25, r26 }
+    ea20:	[0-9a-f]* 	{ sub r15, r16, r17 ; xor r5, r6, r7 ; lh_u r25, r26 }
+    ea28:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    ea30:	[0-9a-f]* 	{ sub r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    ea38:	[0-9a-f]* 	{ sub r15, r16, r17 ; maxh r5, r6, r7 }
+    ea40:	[0-9a-f]* 	{ sub r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+    ea48:	[0-9a-f]* 	{ sub r15, r16, r17 ; moveli r5, 4660 }
+    ea50:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    ea58:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+    ea60:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    ea68:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+    ea70:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+    ea78:	[0-9a-f]* 	{ mvz r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+    ea80:	[0-9a-f]* 	{ sub r15, r16, r17 ; nop ; lh r25, r26 }
+    ea88:	[0-9a-f]* 	{ sub r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+    ea90:	[0-9a-f]* 	{ sub r15, r16, r17 ; packhs r5, r6, r7 }
+    ea98:	[0-9a-f]* 	{ sub r15, r16, r17 ; prefetch r25 }
+    eaa0:	[0-9a-f]* 	{ sub r15, r16, r17 ; ori r5, r6, 5 ; prefetch r25 }
+    eaa8:	[0-9a-f]* 	{ sub r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    eab0:	[0-9a-f]* 	{ sub r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+    eab8:	[0-9a-f]* 	{ sub r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+    eac0:	[0-9a-f]* 	{ sadah r5, r6, r7 ; sub r15, r16, r17 }
+    eac8:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; sb r25, r26 }
+    ead0:	[0-9a-f]* 	{ sub r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+    ead8:	[0-9a-f]* 	{ sub r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+    eae0:	[0-9a-f]* 	{ sub r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+    eae8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    eaf0:	[0-9a-f]* 	{ sub r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+    eaf8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; sh r25, r26 }
+    eb00:	[0-9a-f]* 	{ sub r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+    eb08:	[0-9a-f]* 	{ sub r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+    eb10:	[0-9a-f]* 	{ sub r15, r16, r17 ; slt r5, r6, r7 }
+    eb18:	[0-9a-f]* 	{ sub r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+    eb20:	[0-9a-f]* 	{ sub r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+    eb28:	[0-9a-f]* 	{ sub r15, r16, r17 ; sltib_u r5, r6, 5 }
+    eb30:	[0-9a-f]* 	{ sub r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+    eb38:	[0-9a-f]* 	{ sub r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+    eb40:	[0-9a-f]* 	{ clz r5, r6 ; sub r15, r16, r17 ; sw r25, r26 }
+    eb48:	[0-9a-f]* 	{ sub r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+    eb50:	[0-9a-f]* 	{ sub r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    eb58:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sub r15, r16, r17 }
+    eb60:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sub r15, r16, r17 }
+    eb68:	[0-9a-f]* 	{ sub r15, r16, r17 ; xor r5, r6, r7 }
+    eb70:	[0-9a-f]* 	{ sub r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    eb78:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 }
+    eb80:	[0-9a-f]* 	{ sub r5, r6, r7 ; prefetch r25 }
+    eb88:	[0-9a-f]* 	{ sub r5, r6, r7 ; info 19 ; lw r25, r26 }
+    eb90:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+    eb98:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+    eba0:	[0-9a-f]* 	{ sub r5, r6, r7 ; andi r15, r16, 5 ; lb_u r25, r26 }
+    eba8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    ebb0:	[0-9a-f]* 	{ sub r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+    ebb8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl r15, r16, r17 ; lh r25, r26 }
+    ebc0:	[0-9a-f]* 	{ sub r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+    ebc8:	[0-9a-f]* 	{ sub r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    ebd0:	[0-9a-f]* 	{ sub r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+    ebd8:	[0-9a-f]* 	{ sub r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+    ebe0:	[0-9a-f]* 	{ sub r5, r6, r7 ; maxb_u r15, r16, r17 }
+    ebe8:	[0-9a-f]* 	{ sub r5, r6, r7 ; mnz r15, r16, r17 }
+    ebf0:	[0-9a-f]* 	{ sub r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+    ebf8:	[0-9a-f]* 	{ sub r5, r6, r7 ; nop ; lh r25, r26 }
+    ec00:	[0-9a-f]* 	{ sub r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+    ec08:	[0-9a-f]* 	{ sub r5, r6, r7 ; packhs r15, r16, r17 }
+    ec10:	[0-9a-f]* 	{ sub r5, r6, r7 ; s1a r15, r16, r17 ; prefetch r25 }
+    ec18:	[0-9a-f]* 	{ sub r5, r6, r7 ; prefetch r25 }
+    ec20:	[0-9a-f]* 	{ sub r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    ec28:	[0-9a-f]* 	{ sub r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    ec30:	[0-9a-f]* 	{ sub r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+    ec38:	[0-9a-f]* 	{ sub r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    ec40:	[0-9a-f]* 	{ sub r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    ec48:	[0-9a-f]* 	{ sub r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+    ec50:	[0-9a-f]* 	{ sub r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+    ec58:	[0-9a-f]* 	{ sub r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+    ec60:	[0-9a-f]* 	{ sub r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+    ec68:	[0-9a-f]* 	{ sub r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    ec70:	[0-9a-f]* 	{ sub r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+    ec78:	[0-9a-f]* 	{ sub r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+    ec80:	[0-9a-f]* 	{ sub r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    ec88:	[0-9a-f]* 	{ sub r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+    ec90:	[0-9a-f]* 	{ sub r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+    ec98:	[0-9a-f]* 	{ sub r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    eca0:	[0-9a-f]* 	{ sub r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    eca8:	[0-9a-f]* 	{ sub r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    ecb0:	[0-9a-f]* 	{ subb r15, r16, r17 ; add r5, r6, r7 }
+    ecb8:	[0-9a-f]* 	{ clz r5, r6 ; subb r15, r16, r17 }
+    ecc0:	[0-9a-f]* 	{ subb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+    ecc8:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; subb r15, r16, r17 }
+    ecd0:	[0-9a-f]* 	{ subb r15, r16, r17 ; packbs_u r5, r6, r7 }
+    ecd8:	[0-9a-f]* 	{ subb r15, r16, r17 ; seqib r5, r6, 5 }
+    ece0:	[0-9a-f]* 	{ subb r15, r16, r17 ; slteb r5, r6, r7 }
+    ece8:	[0-9a-f]* 	{ subb r15, r16, r17 ; sraih r5, r6, 5 }
+    ecf0:	[0-9a-f]* 	{ subb r5, r6, r7 ; addih r15, r16, 5 }
+    ecf8:	[0-9a-f]* 	{ subb r5, r6, r7 ; iret }
+    ed00:	[0-9a-f]* 	{ subb r5, r6, r7 ; maxib_u r15, r16, 5 }
+    ed08:	[0-9a-f]* 	{ subb r5, r6, r7 ; nop }
+    ed10:	[0-9a-f]* 	{ subb r5, r6, r7 ; seqi r15, r16, 5 }
+    ed18:	[0-9a-f]* 	{ subb r5, r6, r7 ; sltb_u r15, r16, r17 }
+    ed20:	[0-9a-f]* 	{ subb r5, r6, r7 ; srah r15, r16, r17 }
+    ed28:	[0-9a-f]* 	{ subbs_u r15, r16, r17 ; addhs r5, r6, r7 }
+    ed30:	[0-9a-f]* 	{ dword_align r5, r6, r7 ; subbs_u r15, r16, r17 }
+    ed38:	[0-9a-f]* 	{ subbs_u r15, r16, r17 ; move r5, r6 }
+    ed40:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; subbs_u r15, r16, r17 }
+    ed48:	[0-9a-f]* 	{ pcnt r5, r6 ; subbs_u r15, r16, r17 }
+    ed50:	[0-9a-f]* 	{ subbs_u r15, r16, r17 ; shlh r5, r6, r7 }
+    ed58:	[0-9a-f]* 	{ subbs_u r15, r16, r17 ; slth r5, r6, r7 }
+    ed60:	[0-9a-f]* 	{ subbs_u r15, r16, r17 ; subh r5, r6, r7 }
+    ed68:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; and r15, r16, r17 }
+    ed70:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; jrp r15 }
+    ed78:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; minb_u r15, r16, r17 }
+    ed80:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; packbs_u r15, r16, r17 }
+    ed88:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; shadd r15, r16, 5 }
+    ed90:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; slteb_u r15, r16, r17 }
+    ed98:	[0-9a-f]* 	{ subbs_u r5, r6, r7 ; sub r15, r16, r17 }
+    eda0:	[0-9a-f]* 	{ subh r15, r16, r17 ; addli r5, r6, 4660 }
+    eda8:	[0-9a-f]* 	{ subh r15, r16, r17 ; inthb r5, r6, r7 }
+    edb0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; subh r15, r16, r17 }
+    edb8:	[0-9a-f]* 	{ mullla_su r5, r6, r7 ; subh r15, r16, r17 }
+    edc0:	[0-9a-f]* 	{ subh r15, r16, r17 ; s2a r5, r6, r7 }
+    edc8:	[0-9a-f]* 	{ subh r15, r16, r17 ; shr r5, r6, r7 }
+    edd0:	[0-9a-f]* 	{ subh r15, r16, r17 ; sltib r5, r6, 5 }
+    edd8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; subh r15, r16, r17 }
+    ede0:	[0-9a-f]* 	{ subh r5, r6, r7 ; finv r15 }
+    ede8:	[0-9a-f]* 	{ subh r5, r6, r7 ; lbadd_u r15, r16, 5 }
+    edf0:	[0-9a-f]* 	{ subh r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+    edf8:	[0-9a-f]* 	{ subh r5, r6, r7 ; prefetch r15 }
+    ee00:	[0-9a-f]* 	{ subh r5, r6, r7 ; shli r15, r16, 5 }
+    ee08:	[0-9a-f]* 	{ subh r5, r6, r7 ; slth_u r15, r16, r17 }
+    ee10:	[0-9a-f]* 	{ subh r5, r6, r7 ; subhs r15, r16, r17 }
+    ee18:	[0-9a-f]* 	{ adiffh r5, r6, r7 ; subhs r15, r16, r17 }
+    ee20:	[0-9a-f]* 	{ subhs r15, r16, r17 ; maxb_u r5, r6, r7 }
+    ee28:	[0-9a-f]* 	{ mulhha_su r5, r6, r7 ; subhs r15, r16, r17 }
+    ee30:	[0-9a-f]* 	{ mvz r5, r6, r7 ; subhs r15, r16, r17 }
+    ee38:	[0-9a-f]* 	{ sadah_u r5, r6, r7 ; subhs r15, r16, r17 }
+    ee40:	[0-9a-f]* 	{ subhs r15, r16, r17 ; shrib r5, r6, 5 }
+    ee48:	[0-9a-f]* 	{ subhs r15, r16, r17 ; sne r5, r6, r7 }
+    ee50:	[0-9a-f]* 	{ subhs r15, r16, r17 ; xori r5, r6, 5 }
+    ee58:	[0-9a-f]* 	{ subhs r5, r6, r7 ; ill }
+    ee60:	[0-9a-f]* 	{ subhs r5, r6, r7 ; lhadd_u r15, r16, 5 }
+    ee68:	[0-9a-f]* 	{ subhs r5, r6, r7 ; move r15, r16 }
+    ee70:	[0-9a-f]* 	{ subhs r5, r6, r7 ; s1a r15, r16, r17 }
+    ee78:	[0-9a-f]* 	{ subhs r5, r6, r7 ; shrb r15, r16, r17 }
+    ee80:	[0-9a-f]* 	{ subhs r5, r6, r7 ; sltib_u r15, r16, 5 }
+    ee88:	[0-9a-f]* 	{ subhs r5, r6, r7 ; tns r15, r16 }
+    ee90:	[0-9a-f]* 	{ avgb_u r5, r6, r7 ; subs r15, r16, r17 }
+    ee98:	[0-9a-f]* 	{ subs r15, r16, r17 ; minb_u r5, r6, r7 }
+    eea0:	[0-9a-f]* 	{ mulhl_su r5, r6, r7 ; subs r15, r16, r17 }
+    eea8:	[0-9a-f]* 	{ subs r15, r16, r17 ; nop }
+    eeb0:	[0-9a-f]* 	{ subs r15, r16, r17 ; seq r5, r6, r7 }
+    eeb8:	[0-9a-f]* 	{ subs r15, r16, r17 ; sltb r5, r6, r7 }
+    eec0:	[0-9a-f]* 	{ subs r15, r16, r17 ; srab r5, r6, r7 }
+    eec8:	[0-9a-f]* 	{ subs r5, r6, r7 ; addh r15, r16, r17 }
+    eed0:	[0-9a-f]* 	{ subs r5, r6, r7 ; inthh r15, r16, r17 }
+    eed8:	[0-9a-f]* 	{ subs r5, r6, r7 ; lwadd r15, r16, 5 }
+    eee0:	[0-9a-f]* 	{ subs r5, r6, r7 ; mtspr 5, r16 }
+    eee8:	[0-9a-f]* 	{ subs r5, r6, r7 ; sbadd r15, r16, 5 }
+    eef0:	[0-9a-f]* 	{ subs r5, r6, r7 ; shrih r15, r16, 5 }
+    eef8:	[0-9a-f]* 	{ subs r5, r6, r7 ; sneb r15, r16, r17 }
+    ef00:	[0-9a-f]* 	{ add r5, r6, r7 ; sw r15, r16 }
+    ef08:	[0-9a-f]* 	{ clz r5, r6 ; sw r15, r16 }
+    ef10:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; sw r15, r16 }
+    ef18:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; sw r15, r16 }
+    ef20:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; sw r15, r16 }
+    ef28:	[0-9a-f]* 	{ seqib r5, r6, 5 ; sw r15, r16 }
+    ef30:	[0-9a-f]* 	{ slteb r5, r6, r7 ; sw r15, r16 }
+    ef38:	[0-9a-f]* 	{ sraih r5, r6, 5 ; sw r15, r16 }
+    ef40:	[0-9a-f]* 	{ ctz r5, r6 ; add r15, r16, r17 ; sw r25, r26 }
+    ef48:	[0-9a-f]* 	{ add r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 }
+    ef50:	[0-9a-f]* 	{ add r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 }
+    ef58:	[0-9a-f]* 	{ add r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+    ef60:	[0-9a-f]* 	{ add r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    ef68:	[0-9a-f]* 	{ addi r15, r16, 5 ; movei r5, 5 ; sw r25, r26 }
+    ef70:	[0-9a-f]* 	{ addi r15, r16, 5 ; s1a r5, r6, r7 ; sw r25, r26 }
+    ef78:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; sw r25, r26 }
+    ef80:	[0-9a-f]* 	{ addi r5, r6, 5 ; rl r15, r16, r17 ; sw r25, r26 }
+    ef88:	[0-9a-f]* 	{ addi r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+    ef90:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 }
+    ef98:	[0-9a-f]* 	{ and r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 }
+    efa0:	[0-9a-f]* 	{ and r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 }
+    efa8:	[0-9a-f]* 	{ and r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    efb0:	[0-9a-f]* 	{ andi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 }
+    efb8:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 }
+    efc0:	[0-9a-f]* 	{ andi r15, r16, 5 ; slt_u r5, r6, r7 ; sw r25, r26 }
+    efc8:	[0-9a-f]* 	{ andi r5, r6, 5 ; ill ; sw r25, r26 }
+    efd0:	[0-9a-f]* 	{ andi r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+    efd8:	[0-9a-f]* 	{ bitx r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 }
+    efe0:	[0-9a-f]* 	{ bitx r5, r6 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    efe8:	[0-9a-f]* 	{ bytex r5, r6 ; movei r15, 5 ; sw r25, r26 }
+    eff0:	[0-9a-f]* 	{ bytex r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    eff8:	[0-9a-f]* 	{ clz r5, r6 ; nop ; sw r25, r26 }
+    f000:	[0-9a-f]* 	{ clz r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    f008:	[0-9a-f]* 	{ ctz r5, r6 ; or r15, r16, r17 ; sw r25, r26 }
+    f010:	[0-9a-f]* 	{ ctz r5, r6 ; sra r15, r16, r17 ; sw r25, r26 }
+    f018:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sw r25, r26 }
+    f020:	[0-9a-f]* 	{ nor r15, r16, r17 ; sw r25, r26 }
+    f028:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sw r25, r26 }
+    f030:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; sw r25, r26 }
+    f038:	[0-9a-f]* 	{ bitx r5, r6 ; ill ; sw r25, r26 }
+    f040:	[0-9a-f]* 	{ mz r5, r6, r7 ; ill ; sw r25, r26 }
+    f048:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; ill ; sw r25, r26 }
+    f050:	[0-9a-f]* 	{ info 19 ; andi r5, r6, 5 ; sw r25, r26 }
+    f058:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; info 19 ; sw r25, r26 }
+    f060:	[0-9a-f]* 	{ info 19 ; s1a r5, r6, r7 ; sw r25, r26 }
+    f068:	[0-9a-f]* 	{ info 19 ; slt_u r5, r6, r7 ; sw r25, r26 }
+    f070:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; info 19 ; sw r25, r26 }
+    f078:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f080:	[0-9a-f]* 	{ mnz r15, r16, r17 ; seqi r5, r6, 5 ; sw r25, r26 }
+    f088:	[0-9a-f]* 	{ mnz r15, r16, r17 ; sw r25, r26 }
+    f090:	[0-9a-f]* 	{ mnz r5, r6, r7 ; s3a r15, r16, r17 ; sw r25, r26 }
+    f098:	[0-9a-f]* 	{ move r15, r16 ; addi r5, r6, 5 ; sw r25, r26 }
+    f0a0:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+    f0a8:	[0-9a-f]* 	{ move r15, r16 ; slt r5, r6, r7 ; sw r25, r26 }
+    f0b0:	[0-9a-f]* 	{ move r5, r6 ; sw r25, r26 }
+    f0b8:	[0-9a-f]* 	{ move r5, r6 ; shr r15, r16, r17 ; sw r25, r26 }
+    f0c0:	[0-9a-f]* 	{ clz r5, r6 ; movei r15, 5 ; sw r25, r26 }
+    f0c8:	[0-9a-f]* 	{ movei r15, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+    f0d0:	[0-9a-f]* 	{ movei r15, 5 ; slti_u r5, r6, 5 ; sw r25, r26 }
+    f0d8:	[0-9a-f]* 	{ movei r5, 5 ; movei r15, 5 ; sw r25, r26 }
+    f0e0:	[0-9a-f]* 	{ movei r5, 5 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    f0e8:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; nop ; sw r25, r26 }
+    f0f0:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    f0f8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 }
+    f100:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+    f108:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; rl r15, r16, r17 ; sw r25, r26 }
+    f110:	[0-9a-f]* 	{ mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    f118:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f120:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; sw r25, r26 }
+    f128:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 ; sw r25, r26 }
+    f130:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+    f138:	[0-9a-f]* 	{ mulll_ss r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    f140:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 }
+    f148:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+    f150:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; ill ; sw r25, r26 }
+    f158:	[0-9a-f]* 	{ mullla_ss r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    f160:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f168:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f170:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; movei r15, 5 ; sw r25, r26 }
+    f178:	[0-9a-f]* 	{ mvnz r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    f180:	[0-9a-f]* 	{ mvz r5, r6, r7 ; nop ; sw r25, r26 }
+    f188:	[0-9a-f]* 	{ mvz r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    f190:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+    f198:	[0-9a-f]* 	{ mz r15, r16, r17 ; s2a r5, r6, r7 ; sw r25, r26 }
+    f1a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; sw r25, r26 }
+    f1a8:	[0-9a-f]* 	{ mz r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+    f1b0:	[0-9a-f]* 	{ mz r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+    f1b8:	[0-9a-f]* 	{ nop ; move r5, r6 ; sw r25, r26 }
+    f1c0:	[0-9a-f]* 	{ nop ; or r5, r6, r7 ; sw r25, r26 }
+    f1c8:	[0-9a-f]* 	{ nop ; shli r15, r16, 5 ; sw r25, r26 }
+    f1d0:	[0-9a-f]* 	{ nop ; sra r15, r16, r17 ; sw r25, r26 }
+    f1d8:	[0-9a-f]* 	{ ctz r5, r6 ; nor r15, r16, r17 ; sw r25, r26 }
+    f1e0:	[0-9a-f]* 	{ nor r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 }
+    f1e8:	[0-9a-f]* 	{ nor r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 }
+    f1f0:	[0-9a-f]* 	{ nor r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+    f1f8:	[0-9a-f]* 	{ nor r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    f200:	[0-9a-f]* 	{ or r15, r16, r17 ; movei r5, 5 ; sw r25, r26 }
+    f208:	[0-9a-f]* 	{ or r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 }
+    f210:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; or r15, r16, r17 ; sw r25, r26 }
+    f218:	[0-9a-f]* 	{ or r5, r6, r7 ; rl r15, r16, r17 ; sw r25, r26 }
+    f220:	[0-9a-f]* 	{ or r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+    f228:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+    f230:	[0-9a-f]* 	{ ori r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 }
+    f238:	[0-9a-f]* 	{ ori r5, r6, 5 ; add r15, r16, r17 ; sw r25, r26 }
+    f240:	[0-9a-f]* 	{ ori r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+    f248:	[0-9a-f]* 	{ pcnt r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+    f250:	[0-9a-f]* 	{ pcnt r5, r6 ; shl r15, r16, r17 ; sw r25, r26 }
+    f258:	[0-9a-f]* 	{ bitx r5, r6 ; rl r15, r16, r17 ; sw r25, r26 }
+    f260:	[0-9a-f]* 	{ rl r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 }
+    f268:	[0-9a-f]* 	{ rl r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    f270:	[0-9a-f]* 	{ rl r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f278:	[0-9a-f]* 	{ rl r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f280:	[0-9a-f]* 	{ rli r15, r16, 5 ; info 19 ; sw r25, r26 }
+    f288:	[0-9a-f]* 	{ pcnt r5, r6 ; rli r15, r16, 5 ; sw r25, r26 }
+    f290:	[0-9a-f]* 	{ rli r15, r16, 5 ; srai r5, r6, 5 ; sw r25, r26 }
+    f298:	[0-9a-f]* 	{ rli r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+    f2a0:	[0-9a-f]* 	{ rli r5, r6, 5 ; sne r15, r16, r17 ; sw r25, r26 }
+    f2a8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f2b0:	[0-9a-f]* 	{ s1a r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+    f2b8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f2c0:	[0-9a-f]* 	{ s1a r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f2c8:	[0-9a-f]* 	{ s1a r5, r6, r7 ; sw r25, r26 }
+    f2d0:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+    f2d8:	[0-9a-f]* 	{ s2a r15, r16, r17 ; shr r5, r6, r7 ; sw r25, r26 }
+    f2e0:	[0-9a-f]* 	{ s2a r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 }
+    f2e8:	[0-9a-f]* 	{ s2a r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+    f2f0:	[0-9a-f]* 	{ bitx r5, r6 ; s3a r15, r16, r17 ; sw r25, r26 }
+    f2f8:	[0-9a-f]* 	{ s3a r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 }
+    f300:	[0-9a-f]* 	{ s3a r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    f308:	[0-9a-f]* 	{ s3a r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f310:	[0-9a-f]* 	{ s3a r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f318:	[0-9a-f]* 	{ seq r15, r16, r17 ; info 19 ; sw r25, r26 }
+    f320:	[0-9a-f]* 	{ pcnt r5, r6 ; seq r15, r16, r17 ; sw r25, r26 }
+    f328:	[0-9a-f]* 	{ seq r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 }
+    f330:	[0-9a-f]* 	{ seq r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    f338:	[0-9a-f]* 	{ seq r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    f340:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+    f348:	[0-9a-f]* 	{ seqi r15, r16, 5 ; s3a r5, r6, r7 ; sw r25, r26 }
+    f350:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; seqi r15, r16, 5 ; sw r25, r26 }
+    f358:	[0-9a-f]* 	{ seqi r5, r6, 5 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f360:	[0-9a-f]* 	{ seqi r5, r6, 5 ; sw r25, r26 }
+    f368:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+    f370:	[0-9a-f]* 	{ shl r15, r16, r17 ; shr r5, r6, r7 ; sw r25, r26 }
+    f378:	[0-9a-f]* 	{ shl r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 }
+    f380:	[0-9a-f]* 	{ shl r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+    f388:	[0-9a-f]* 	{ bitx r5, r6 ; shli r15, r16, 5 ; sw r25, r26 }
+    f390:	[0-9a-f]* 	{ shli r15, r16, 5 ; mz r5, r6, r7 ; sw r25, r26 }
+    f398:	[0-9a-f]* 	{ shli r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    f3a0:	[0-9a-f]* 	{ shli r5, r6, 5 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f3a8:	[0-9a-f]* 	{ shli r5, r6, 5 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f3b0:	[0-9a-f]* 	{ shr r15, r16, r17 ; info 19 ; sw r25, r26 }
+    f3b8:	[0-9a-f]* 	{ pcnt r5, r6 ; shr r15, r16, r17 ; sw r25, r26 }
+    f3c0:	[0-9a-f]* 	{ shr r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 }
+    f3c8:	[0-9a-f]* 	{ shr r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    f3d0:	[0-9a-f]* 	{ shr r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    f3d8:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+    f3e0:	[0-9a-f]* 	{ shri r15, r16, 5 ; s3a r5, r6, r7 ; sw r25, r26 }
+    f3e8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shri r15, r16, 5 ; sw r25, r26 }
+    f3f0:	[0-9a-f]* 	{ shri r5, r6, 5 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f3f8:	[0-9a-f]* 	{ shri r5, r6, 5 ; sw r25, r26 }
+    f400:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+    f408:	[0-9a-f]* 	{ slt r15, r16, r17 ; shr r5, r6, r7 ; sw r25, r26 }
+    f410:	[0-9a-f]* 	{ slt r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 }
+    f418:	[0-9a-f]* 	{ slt r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+    f420:	[0-9a-f]* 	{ bitx r5, r6 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f428:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 }
+    f430:	[0-9a-f]* 	{ slt_u r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    f438:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f440:	[0-9a-f]* 	{ slt_u r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f448:	[0-9a-f]* 	{ slte r15, r16, r17 ; info 19 ; sw r25, r26 }
+    f450:	[0-9a-f]* 	{ pcnt r5, r6 ; slte r15, r16, r17 ; sw r25, r26 }
+    f458:	[0-9a-f]* 	{ slte r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 }
+    f460:	[0-9a-f]* 	{ slte r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    f468:	[0-9a-f]* 	{ slte r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    f470:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    f478:	[0-9a-f]* 	{ slte_u r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+    f480:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    f488:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f490:	[0-9a-f]* 	{ slte_u r5, r6, r7 ; sw r25, r26 }
+    f498:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+    f4a0:	[0-9a-f]* 	{ slti r15, r16, 5 ; shr r5, r6, r7 ; sw r25, r26 }
+    f4a8:	[0-9a-f]* 	{ slti r5, r6, 5 ; and r15, r16, r17 ; sw r25, r26 }
+    f4b0:	[0-9a-f]* 	{ slti r5, r6, 5 ; shl r15, r16, r17 ; sw r25, r26 }
+    f4b8:	[0-9a-f]* 	{ bitx r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    f4c0:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; mz r5, r6, r7 ; sw r25, r26 }
+    f4c8:	[0-9a-f]* 	{ slti_u r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    f4d0:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f4d8:	[0-9a-f]* 	{ slti_u r5, r6, 5 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f4e0:	[0-9a-f]* 	{ sne r15, r16, r17 ; info 19 ; sw r25, r26 }
+    f4e8:	[0-9a-f]* 	{ pcnt r5, r6 ; sne r15, r16, r17 ; sw r25, r26 }
+    f4f0:	[0-9a-f]* 	{ sne r15, r16, r17 ; srai r5, r6, 5 ; sw r25, r26 }
+    f4f8:	[0-9a-f]* 	{ sne r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+    f500:	[0-9a-f]* 	{ sne r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+    f508:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+    f510:	[0-9a-f]* 	{ sra r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+    f518:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sra r15, r16, r17 ; sw r25, r26 }
+    f520:	[0-9a-f]* 	{ sra r5, r6, r7 ; s1a r15, r16, r17 ; sw r25, r26 }
+    f528:	[0-9a-f]* 	{ sra r5, r6, r7 ; sw r25, r26 }
+    f530:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 }
+    f538:	[0-9a-f]* 	{ srai r15, r16, 5 ; shr r5, r6, r7 ; sw r25, r26 }
+    f540:	[0-9a-f]* 	{ srai r5, r6, 5 ; and r15, r16, r17 ; sw r25, r26 }
+    f548:	[0-9a-f]* 	{ srai r5, r6, 5 ; shl r15, r16, r17 ; sw r25, r26 }
+    f550:	[0-9a-f]* 	{ bitx r5, r6 ; sub r15, r16, r17 ; sw r25, r26 }
+    f558:	[0-9a-f]* 	{ sub r15, r16, r17 ; mz r5, r6, r7 ; sw r25, r26 }
+    f560:	[0-9a-f]* 	{ sub r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 }
+    f568:	[0-9a-f]* 	{ sub r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    f570:	[0-9a-f]* 	{ sub r5, r6, r7 ; slt_u r15, r16, r17 ; sw r25, r26 }
+    f578:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; movei r15, 5 ; sw r25, r26 }
+    f580:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; sw r25, r26 }
+    f588:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nop ; sw r25, r26 }
+    f590:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    f598:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; sw r25, r26 }
+    f5a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; sw r25, r26 }
+    f5a8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rl r15, r16, r17 ; sw r25, r26 }
+    f5b0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; sw r25, r26 }
+    f5b8:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+    f5c0:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 }
+    f5c8:	[0-9a-f]* 	{ xor r5, r6, r7 ; add r15, r16, r17 ; sw r25, r26 }
+    f5d0:	[0-9a-f]* 	{ xor r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+    f5d8:	[0-9a-f]* 	{ addbs_u r5, r6, r7 ; swadd r15, r16, 5 }
+    f5e0:	[0-9a-f]* 	{ crc32_8 r5, r6, r7 ; swadd r15, r16, 5 }
+    f5e8:	[0-9a-f]* 	{ mnzb r5, r6, r7 ; swadd r15, r16, 5 }
+    f5f0:	[0-9a-f]* 	{ mulhla_uu r5, r6, r7 ; swadd r15, r16, 5 }
+    f5f8:	[0-9a-f]* 	{ packhs r5, r6, r7 ; swadd r15, r16, 5 }
+    f600:	[0-9a-f]* 	{ shl r5, r6, r7 ; swadd r15, r16, 5 }
+    f608:	[0-9a-f]* 	{ slteh r5, r6, r7 ; swadd r15, r16, 5 }
+    f610:	[0-9a-f]* 	{ subb r5, r6, r7 ; swadd r15, r16, 5 }
+    f618:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch r25 }
+    f620:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; addih r15, r16, 5 }
+    f628:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 }
+    f630:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ill ; lb_u r25, r26 }
+    f638:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; inthb r15, r16, r17 }
+    f640:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; movei r15, 5 ; lb r25, r26 }
+    f648:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; lb r25, r26 }
+    f650:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 }
+    f658:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    f660:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; movei r15, 5 ; lh r25, r26 }
+    f668:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 }
+    f670:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    f678:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slti r15, r16, 5 ; lh_u r25, r26 }
+    f680:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; lw r25, r26 }
+    f688:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte r15, r16, r17 ; lw r25, r26 }
+    f690:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; minh r15, r16, r17 }
+    f698:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; move r15, r16 ; lw r25, r26 }
+    f6a0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 }
+    f6a8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; nop }
+    f6b0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; or r15, r16, r17 }
+    f6b8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; prefetch r25 }
+    f6c0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shr r15, r16, r17 ; prefetch r25 }
+    f6c8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; rl r15, r16, r17 ; prefetch r25 }
+    f6d0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 }
+    f6d8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s3a r15, r16, r17 ; prefetch r25 }
+    f6e0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; ori r15, r16, 5 ; sb r25, r26 }
+    f6e8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; srai r15, r16, 5 ; sb r25, r26 }
+    f6f0:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 }
+    f6f8:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 }
+    f700:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+    f708:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shlh r15, r16, r17 }
+    f710:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; shr r15, r16, r17 ; sh r25, r26 }
+    f718:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 }
+    f720:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+    f728:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slteb_u r15, r16, r17 }
+    f730:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; slti_u r15, r16, 5 ; prefetch r25 }
+    f738:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sneh r15, r16, r17 }
+    f740:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 }
+    f748:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; sw r15, r16 }
+    f750:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; s3a r15, r16, r17 ; sw r25, r26 }
+    f758:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; tns r15, r16 }
+    f760:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; sh r25, r26 }
+    f768:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addli.sn r15, r16, 4660 }
+    f770:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; sw r25, r26 }
+    f778:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ill ; lh_u r25, r26 }
+    f780:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; intlb r15, r16, r17 }
+    f788:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nop ; lb r25, r26 }
+    f790:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; lb r25, r26 }
+    f798:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    f7a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 }
+    f7a8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nop ; lh r25, r26 }
+    f7b0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; lh r25, r26 }
+    f7b8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    f7c0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    f7c8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; lw r25, r26 }
+    f7d0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti r15, r16, 5 ; lw r25, r26 }
+    f7d8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; minih r15, r16, 5 }
+    f7e0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; move r15, r16 ; sb r25, r26 }
+    f7e8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 }
+    f7f0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+    f7f8:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    f800:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; info 19 ; prefetch r25 }
+    f808:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; prefetch r25 }
+    f810:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rl r15, r16, r17 ; sh r25, r26 }
+    f818:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s1a r15, r16, r17 ; sh r25, r26 }
+    f820:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 }
+    f828:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; rli r15, r16, 5 ; sb r25, r26 }
+    f830:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; sb r25, r26 }
+    f838:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; seqi r15, r16, 5 ; prefetch r25 }
+    f840:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; sh r25, r26 }
+    f848:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sne r15, r16, r17 ; sh r25, r26 }
+    f850:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; lb_u r25, r26 }
+    f858:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; shr r15, r16, r17 }
+    f860:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; prefetch r25 }
+    f868:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 }
+    f870:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slteh_u r15, r16, r17 }
+    f878:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; sh r25, r26 }
+    f880:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 }
+    f888:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; srai r15, r16, 5 }
+    f890:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; addi r15, r16, 5 ; sw r25, r26 }
+    f898:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; seqi r15, r16, 5 ; sw r25, r26 }
+    f8a0:	[0-9a-f]* 	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; lb r25, r26 }
+    f8a8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; add r15, r16, r17 }
+    f8b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+    f8b8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; auli r15, r16, 4660 }
+    f8c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ill ; prefetch r25 }
+    f8c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; inv r15 }
+    f8d0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; lb r25, r26 }
+    f8d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; lb r25, r26 }
+    f8e0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 }
+    f8e8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 }
+    f8f0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; or r15, r16, r17 ; lh r25, r26 }
+    f8f8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; lh r25, r26 }
+    f900:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    f908:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 }
+    f910:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; lw r25, r26 }
+    f918:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sne r15, r16, r17 ; lw r25, r26 }
+    f920:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 }
+    f928:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; sw r25, r26 }
+    f930:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    f938:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 }
+    f940:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 }
+    f948:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; move r15, r16 ; prefetch r25 }
+    f950:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte r15, r16, r17 ; prefetch r25 }
+    f958:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; rl r15, r16, r17 }
+    f960:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s1a r15, r16, r17 }
+    f968:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s3a r15, r16, r17 }
+    f970:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 }
+    f978:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sbadd r15, r16, 5 }
+    f980:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 }
+    f988:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; ori r15, r16, 5 ; sh r25, r26 }
+    f990:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 }
+    f998:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shli r15, r16, 5 ; lh_u r25, r26 }
+    f9a0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shrh r15, r16, r17 }
+    f9a8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slt r15, r16, r17 ; sh r25, r26 }
+    f9b0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slte r15, r16, r17 ; prefetch r25 }
+    f9b8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slth_u r15, r16, r17 }
+    f9c0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; slti_u r15, r16, 5 }
+    f9c8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; lh_u r25, r26 }
+    f9d0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; sraih r15, r16, 5 }
+    f9d8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; andi r15, r16, 5 ; sw r25, r26 }
+    f9e0:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; shli r15, r16, 5 ; sw r25, r26 }
+    f9e8:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; xor r15, r16, r17 ; lh r25, r26 }
+    f9f0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; addbs_u r15, r16, r17 }
+    f9f8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; lh r25, r26 }
+    fa00:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; finv r15 }
+    fa08:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; sh r25, r26 }
+    fa10:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; jalr r15 }
+    fa18:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rl r15, r16, r17 ; lb r25, r26 }
+    fa20:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; lb r25, r26 }
+    fa28:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    fa30:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    fa38:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rl r15, r16, r17 ; lh r25, r26 }
+    fa40:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; lh r25, r26 }
+    fa48:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rli r15, r16, 5 ; lh_u r25, r26 }
+    fa50:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    fa58:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; lw r25, r26 }
+    fa60:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; srai r15, r16, 5 ; lw r25, r26 }
+    fa68:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 }
+    fa70:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; movei r15, 5 ; lb r25, r26 }
+    fa78:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 }
+    fa80:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+    fa88:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; prefetch r25 }
+    fa90:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+    fa98:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; prefetch r25 }
+    faa0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 }
+    faa8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+    fab0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; add r15, r16, r17 ; sb r25, r26 }
+    fab8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; seq r15, r16, r17 ; sb r25, r26 }
+    fac0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 }
+    fac8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; seqi r15, r16, 5 }
+    fad0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; rli r15, r16, 5 ; sh r25, r26 }
+    fad8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; sh r25, r26 }
+    fae0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch r25 }
+    fae8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 }
+    faf0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slt r15, r16, r17 }
+    faf8:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slte r15, r16, r17 ; sh r25, r26 }
+    fb00:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 }
+    fb08:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sltib_u r15, r16, 5 }
+    fb10:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sra r15, r16, r17 ; prefetch r25 }
+    fb18:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; lb_u r25, r26 }
+    fb20:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; ill ; sw r25, r26 }
+    fb28:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; shri r15, r16, 5 ; sw r25, r26 }
+    fb30:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; lw r25, r26 }
+    fb38:	[0-9a-f]* 	{ and r5, r6, r7 ; tns r15, r16 }
+    fb40:	[0-9a-f]* 	{ maxh r5, r6, r7 ; tns r15, r16 }
+    fb48:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; tns r15, r16 }
+    fb50:	[0-9a-f]* 	{ mz r5, r6, r7 ; tns r15, r16 }
+    fb58:	[0-9a-f]* 	{ sadb_u r5, r6, r7 ; tns r15, r16 }
+    fb60:	[0-9a-f]* 	{ shrih r5, r6, 5 ; tns r15, r16 }
+    fb68:	[0-9a-f]* 	{ sneb r5, r6, r7 ; tns r15, r16 }
+    fb70:	[0-9a-f]* 	{ add r5, r6, r7 ; wh64 r15 }
+    fb78:	[0-9a-f]* 	{ clz r5, r6 ; wh64 r15 }
+    fb80:	[0-9a-f]* 	{ mm r5, r6, r7, 5, 7 ; wh64 r15 }
+    fb88:	[0-9a-f]* 	{ mulhla_su r5, r6, r7 ; wh64 r15 }
+    fb90:	[0-9a-f]* 	{ packbs_u r5, r6, r7 ; wh64 r15 }
+    fb98:	[0-9a-f]* 	{ seqib r5, r6, 5 ; wh64 r15 }
+    fba0:	[0-9a-f]* 	{ slteb r5, r6, r7 ; wh64 r15 }
+    fba8:	[0-9a-f]* 	{ sraih r5, r6, 5 ; wh64 r15 }
+    fbb0:	[0-9a-f]* 	{ xor r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 }
+    fbb8:	[0-9a-f]* 	{ xor r15, r16, r17 ; addli.sn r5, r6, 4660 }
+    fbc0:	[0-9a-f]* 	{ xor r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 }
+    fbc8:	[0-9a-f]* 	{ bytex r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    fbd0:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; lb_u r25, r26 }
+    fbd8:	[0-9a-f]* 	{ xor r15, r16, r17 ; info 19 ; lb r25, r26 }
+    fbe0:	[0-9a-f]* 	{ bytex r5, r6 ; xor r15, r16, r17 ; lb r25, r26 }
+    fbe8:	[0-9a-f]* 	{ xor r15, r16, r17 ; nop ; lb r25, r26 }
+    fbf0:	[0-9a-f]* 	{ xor r15, r16, r17 ; slti r5, r6, 5 ; lb r25, r26 }
+    fbf8:	[0-9a-f]* 	{ xor r15, r16, r17 ; lb_u r25, r26 }
+    fc00:	[0-9a-f]* 	{ xor r15, r16, r17 ; ori r5, r6, 5 ; lb_u r25, r26 }
+    fc08:	[0-9a-f]* 	{ xor r15, r16, r17 ; sra r5, r6, r7 ; lb_u r25, r26 }
+    fc10:	[0-9a-f]* 	{ xor r15, r16, r17 ; move r5, r6 ; lh r25, r26 }
+    fc18:	[0-9a-f]* 	{ xor r15, r16, r17 ; rli r5, r6, 5 ; lh r25, r26 }
+    fc20:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; xor r15, r16, r17 ; lh r25, r26 }
+    fc28:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    fc30:	[0-9a-f]* 	{ xor r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+    fc38:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    fc40:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+    fc48:	[0-9a-f]* 	{ xor r15, r16, r17 ; shl r5, r6, r7 ; lw r25, r26 }
+    fc50:	[0-9a-f]* 	{ xor r15, r16, r17 ; maxb_u r5, r6, r7 }
+    fc58:	[0-9a-f]* 	{ xor r15, r16, r17 ; mnzh r5, r6, r7 }
+    fc60:	[0-9a-f]* 	{ xor r15, r16, r17 ; movei r5, 5 }
+    fc68:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 }
+    fc70:	[0-9a-f]* 	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    fc78:	[0-9a-f]* 	{ mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 }
+    fc80:	[0-9a-f]* 	{ mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    fc88:	[0-9a-f]* 	{ mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+    fc90:	[0-9a-f]* 	{ mvz r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+    fc98:	[0-9a-f]* 	{ xor r15, r16, r17 ; nop ; lb_u r25, r26 }
+    fca0:	[0-9a-f]* 	{ xor r15, r16, r17 ; or r5, r6, r7 ; lb_u r25, r26 }
+    fca8:	[0-9a-f]* 	{ xor r15, r16, r17 ; packhb r5, r6, r7 }
+    fcb0:	[0-9a-f]* 	{ ctz r5, r6 ; xor r15, r16, r17 ; prefetch r25 }
+    fcb8:	[0-9a-f]* 	{ xor r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
+    fcc0:	[0-9a-f]* 	{ xor r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
+    fcc8:	[0-9a-f]* 	{ xor r15, r16, r17 ; rli r5, r6, 5 ; lb r25, r26 }
+    fcd0:	[0-9a-f]* 	{ xor r15, r16, r17 ; s2a r5, r6, r7 ; lb r25, r26 }
+    fcd8:	[0-9a-f]* 	{ sadab_u r5, r6, r7 ; xor r15, r16, r17 }
+    fce0:	[0-9a-f]* 	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 }
+    fce8:	[0-9a-f]* 	{ xor r15, r16, r17 ; s3a r5, r6, r7 ; sb r25, r26 }
+    fcf0:	[0-9a-f]* 	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; sb r25, r26 }
+    fcf8:	[0-9a-f]* 	{ xor r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
+    fd00:	[0-9a-f]* 	{ mulhh_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+    fd08:	[0-9a-f]* 	{ xor r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+    fd10:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; xor r15, r16, r17 ; sh r25, r26 }
+    fd18:	[0-9a-f]* 	{ xor r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+    fd20:	[0-9a-f]* 	{ xor r15, r16, r17 ; shri r5, r6, 5 ; lb r25, r26 }
+    fd28:	[0-9a-f]* 	{ xor r15, r16, r17 ; slt r5, r6, r7 ; sw r25, r26 }
+    fd30:	[0-9a-f]* 	{ xor r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 }
+    fd38:	[0-9a-f]* 	{ xor r15, r16, r17 ; slti r5, r6, 5 ; lb r25, r26 }
+    fd40:	[0-9a-f]* 	{ xor r15, r16, r17 ; sltib r5, r6, 5 }
+    fd48:	[0-9a-f]* 	{ xor r15, r16, r17 ; sra r5, r6, r7 ; lw r25, r26 }
+    fd50:	[0-9a-f]* 	{ xor r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 }
+    fd58:	[0-9a-f]* 	{ bytex r5, r6 ; xor r15, r16, r17 ; sw r25, r26 }
+    fd60:	[0-9a-f]* 	{ xor r15, r16, r17 ; nop ; sw r25, r26 }
+    fd68:	[0-9a-f]* 	{ xor r15, r16, r17 ; slti r5, r6, 5 ; sw r25, r26 }
+    fd70:	[0-9a-f]* 	{ tblidxb0 r5, r6 ; xor r15, r16, r17 ; sw r25, r26 }
+    fd78:	[0-9a-f]* 	{ tblidxb2 r5, r6 ; xor r15, r16, r17 ; sw r25, r26 }
+    fd80:	[0-9a-f]* 	{ xor r15, r16, r17 ; xor r5, r6, r7 ; sw r25, r26 }
+    fd88:	[0-9a-f]* 	{ xor r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 }
+    fd90:	[0-9a-f]* 	{ xor r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 }
+    fd98:	[0-9a-f]* 	{ xor r5, r6, r7 ; lw r25, r26 }
+    fda0:	[0-9a-f]* 	{ xor r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+    fda8:	[0-9a-f]* 	{ xor r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+    fdb0:	[0-9a-f]* 	{ xor r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 }
+    fdb8:	[0-9a-f]* 	{ xor r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+    fdc0:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+    fdc8:	[0-9a-f]* 	{ xor r5, r6, r7 ; addi r15, r16, 5 ; lh r25, r26 }
+    fdd0:	[0-9a-f]* 	{ xor r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 }
+    fdd8:	[0-9a-f]* 	{ xor r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+    fde0:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    fde8:	[0-9a-f]* 	{ xor r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+    fdf0:	[0-9a-f]* 	{ xor r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+    fdf8:	[0-9a-f]* 	{ xor r5, r6, r7 ; lwadd_na r15, r16, 5 }
+    fe00:	[0-9a-f]* 	{ xor r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+    fe08:	[0-9a-f]* 	{ xor r5, r6, r7 ; movei r15, 5 ; sb r25, r26 }
+    fe10:	[0-9a-f]* 	{ xor r5, r6, r7 ; nop ; lb_u r25, r26 }
+    fe18:	[0-9a-f]* 	{ xor r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 }
+    fe20:	[0-9a-f]* 	{ xor r5, r6, r7 ; packhb r15, r16, r17 }
+    fe28:	[0-9a-f]* 	{ xor r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+    fe30:	[0-9a-f]* 	{ xor r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+    fe38:	[0-9a-f]* 	{ xor r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+    fe40:	[0-9a-f]* 	{ xor r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 }
+    fe48:	[0-9a-f]* 	{ xor r5, r6, r7 ; info 19 ; sb r25, r26 }
+    fe50:	[0-9a-f]* 	{ xor r5, r6, r7 ; slt r15, r16, r17 ; sb r25, r26 }
+    fe58:	[0-9a-f]* 	{ xor r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 }
+    fe60:	[0-9a-f]* 	{ xor r5, r6, r7 ; and r15, r16, r17 ; sh r25, r26 }
+    fe68:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+    fe70:	[0-9a-f]* 	{ xor r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+    fe78:	[0-9a-f]* 	{ xor r5, r6, r7 ; shlih r15, r16, 5 }
+    fe80:	[0-9a-f]* 	{ xor r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 }
+    fe88:	[0-9a-f]* 	{ xor r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 }
+    fe90:	[0-9a-f]* 	{ xor r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+    fe98:	[0-9a-f]* 	{ xor r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+    fea0:	[0-9a-f]* 	{ xor r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+    fea8:	[0-9a-f]* 	{ xor r5, r6, r7 ; srah r15, r16, r17 }
+    feb0:	[0-9a-f]* 	{ xor r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+    feb8:	[0-9a-f]* 	{ xor r5, r6, r7 ; nop ; sw r25, r26 }
+    fec0:	[0-9a-f]* 	{ xor r5, r6, r7 ; slti_u r15, r16, 5 ; sw r25, r26 }
+    fec8:	[0-9a-f]* 	{ xor r5, r6, r7 ; xori r15, r16, 5 }
+    fed0:	[0-9a-f]* 	{ bytex r5, r6 ; xori r15, r16, 5 }
+    fed8:	[0-9a-f]* 	{ xori r15, r16, 5 ; minih r5, r6, 5 }
+    fee0:	[0-9a-f]* 	{ mulhla_ss r5, r6, r7 ; xori r15, r16, 5 }
+    fee8:	[0-9a-f]* 	{ xori r15, r16, 5 ; ori r5, r6, 5 }
+    fef0:	[0-9a-f]* 	{ xori r15, r16, 5 ; seqi r5, r6, 5 }
+    fef8:	[0-9a-f]* 	{ xori r15, r16, 5 ; slte_u r5, r6, r7 }
+    ff00:	[0-9a-f]* 	{ xori r15, r16, 5 ; sraib r5, r6, 5 }
+    ff08:	[0-9a-f]* 	{ xori r5, r6, 5 ; addib r15, r16, 5 }
+    ff10:	[0-9a-f]* 	{ xori r5, r6, 5 ; inv r15 }
+    ff18:	[0-9a-f]* 	{ xori r5, r6, 5 ; maxh r15, r16, r17 }
+    ff20:	[0-9a-f]* 	{ xori r5, r6, 5 ; mzh r15, r16, r17 }
+    ff28:	[0-9a-f]* 	{ xori r5, r6, 5 ; seqh r15, r16, r17 }
+    ff30:	[0-9a-f]* 	{ xori r5, r6, 5 ; sltb r15, r16, r17 }
+    ff38:	[0-9a-f]* 	{ xori r5, r6, 5 ; srab r15, r16, r17 }
diff --git a/gas/testsuite/gas/tilepro/t_insns.s b/gas/testsuite/gas/tilepro/t_insns.s
new file mode 100644
index 0000000..97bec32
--- /dev/null
+++ b/gas/testsuite/gas/tilepro/t_insns.s
@@ -0,0 +1,8202 @@
+target:
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	nop
+
+	{ mulllsa_uu r5, r6, r7 ; bbnst r15, target }
+	{ mulhha_ss r5, r6, r7 ; blezt r15, target }
+	{ mulhla_us r5, r6, r7 ; bbnst r15, target }
+	{ mullla_uu r5, r6, r7 ; bgezt r15, target }
+	{ addlis r5, r6, 0x1234 ; bzt r15, target }
+	{ mulhh_uu r5, r6, r7 ; bbnst r15, target }
+	{ mulhha_uu r5, r6, r7 ; bgzt r15, target }
+	{ mulhl_uu r5, r6, r7 ; blezt r15, target }
+	{ mulhla_us r5, r6, r7 ; blzt r15, target }
+	{ mulll_uu r5, r6, r7 ; bbnst r15, target }
+	{ mullla_uu r5, r6, r7 ; bgzt r15, target }
+	{ addlis r5, r6, 0x1234 ; bz r15, target }
+	{ crc32_32 r5, r6, r7 ; blzt r15, target }
+	{ mulhh_ss r5, r6, r7 ; blzt r15, target }
+	{ mulhha_ss r5, r6, r7 ; bzt r15, target }
+	{ mulhl_su r5, r6, r7 ; bbst r15, target }
+	{ mulhla_ss r5, r6, r7 ; bbs r15, target }
+	{ mulhlsa_uu r5, r6, r7 ; bz r15, target }
+	{ mulll_uu r5, r6, r7 ; blzt r15, target }
+	{ packbs_u r5, r6, r7 ; bgez r15, target }
+	{ addbs_u r5, r6, r7 ; bbns r15, target }
+	{ auli r5, r6, 0x1234 ; bzt r15, target }
+	{ maxib_u r5, r6, 5 ; bgezt r15, target }
+	{ movelis r5, 0x1234 ; blez r15, target }
+	{ mulhha_uu r5, r6, r7 ; bz r15, target }
+	{ mulhl_uu r5, r6, r7 ; bzt r15, target }
+	{ mullla_ss r5, r6, r7 ; bz r15, target }
+	{ sadab_u r5, r6, r7 ; bgzt r15, target }
+	{ slte_u r5, r6, r7 ; bbnst r15, target }
+	{ sltib_u r5, r6, 5 ; bbnst r15, target }
+	{ addhs r5, r6, r7 ; blezt r15, target }
+	{ crc32_8 r5, r6, r7 ; blz r15, target }
+	{ maxb_u r5, r6, r7 ; blzt r15, target }
+	{ minib_u r5, r6, 5 ; blez r15, target }
+	{ mulhl_su r5, r6, r7 ; bz r15, target }
+	{ packhs r5, r6, r7 ; bnzt r15, target }
+	{ sadah_u r5, r6, r7 ; bzt r15, target }
+	{ sltb_u r5, r6, r7 ; bgez r15, target }
+	{ slteh r5, r6, r7 ; bbnst r15, target }
+	{ sltib_u r5, r6, 5 ; bgez r15, target }
+	{ addb r5, r6, r7 ; bbnst r15, target }
+	{ adds r5, r6, r7 ; bbnst r15, target }
+	{ inthb r5, r6, r7 ; bgez r15, target }
+	{ intlh r5, r6, r7 ; bbst r15, target }
+	{ maxih r5, r6, 5 ; bgezt r15, target }
+	{ mnzb r5, r6, r7 ; blezt r15, target }
+	{ packhs r5, r6, r7 ; blz r15, target }
+	{ sadb_u r5, r6, r7 ; bnz r15, target }
+	{ seqih r5, r6, 5 ; bgezt r15, target }
+	{ shrib r5, r6, 5 ; bbnst r15, target }
+	{ sltb_u r5, r6, r7 ; bzt r15, target }
+	{ slteh r5, r6, r7 ; bgzt r15, target }
+	{ sltib r5, r6, 5 ; bbnst r15, target }
+	{ sneh r5, r6, r7 ; bgezt r15, target }
+	{ subh r5, r6, r7 ; blezt r15, target }
+	{ tblidxb3 r5, r6 ; bbnst r15, target }
+	{ addhs r5, r6, r7 ; bbs r15, target }
+	{ addih r5, r6, 5 ; blzt r15, target }
+	{ avgh r5, r6, r7 ; bgez r15, target }
+	{ intlh r5, r6, r7 ; bbs r15, target }
+	{ maxih r5, r6, 5 ; bnzt r15, target }
+	{ mnzb r5, r6, r7 ; bbns r15, target }
+	{ mvnz r5, r6, r7 ; bgez r15, target }
+	{ s1a r5, r6, r7 ; bbnst r15, target }
+	{ sadh r5, r6, r7 ; blzt r15, target }
+	{ seqi r5, r6, 5 ; bbnst r15, target }
+	{ shlb r5, r6, r7 ; bbns r15, target }
+	{ shlib r5, r6, 5 ; bgzt r15, target }
+	{ shrb r5, r6, r7 ; bnzt r15, target }
+	{ shrih r5, r6, 5 ; bgez r15, target }
+	{ sltb_u r5, r6, r7 ; bz r15, target }
+	{ slth r5, r6, r7 ; bbst r15, target }
+	{ sltib r5, r6, 5 ; blzt r15, target }
+	{ sneb r5, r6, r7 ; bnzt r15, target }
+	{ srah r5, r6, r7 ; bgez r15, target }
+	{ sraih r5, r6, 5 ; blzt r15, target }
+	{ subhs r5, r6, r7 ; bgz r15, target }
+	{ tblidxb1 r5, r6 ; bgez r15, target }
+	{ xor r5, r6, r7 ; bgezt r15, target }
+	{ addh r5, r6, r7 ; bnz r15, target }
+	{ addli r5, r6, 0x1234 ; jal target }
+	{ avgh r5, r6, r7 ; bbs r15, target }
+	{ minh r5, r6, r7 ; bbs r15, target }
+	{ mnzb r5, r6, r7 ; bnz r15, target }
+	{ mvnz r5, r6, r7 ; bnz r15, target }
+	{ mzh r5, r6, r7 ; bbst r15, target }
+	{ rl r5, r6, r7 ; bgezt r15, target }
+	{ s3a r5, r6, r7 ; bbst r15, target }
+	{ seqb r5, r6, r7 ; bgz r15, target }
+	{ seqib r5, r6, 5 ; bzt r15, target }
+	{ shlh r5, r6, r7 ; blz r15, target }
+	{ shr r5, r6, r7 ; bbns r15, target }
+	{ shri r5, r6, 5 ; bgzt r15, target }
+	{ slt r5, r6, r7 ; bnzt r15, target }
+	{ slti r5, r6, 5 ; bbst r15, target }
+	{ sne r5, r6, r7 ; bgzt r15, target }
+	{ sra r5, r6, r7 ; bnzt r15, target }
+	{ sraib r5, r6, 5 ; blz r15, target }
+	{ subh r5, r6, r7 ; bbs r15, target }
+	{ tblidxb1 r5, r6 ; bzt r15, target }
+	{ xori r5, r6, 5 ; bgez r15, target }
+	{ adds r5, r6, r7 ; bz r15, target }
+	{ infol 0x1234 ; blezt r15, target }
+	{ mulhl_uu r5, r6, r7 ; jal target }
+	{ mzb r5, r6, r7 ; bgz r15, target }
+	{ or r5, r6, r7 ; bnzt r15, target }
+	{ rli r5, r6, 5 ; blez r15, target }
+	{ seq r5, r6, r7 ; bgz r15, target }
+	{ shli r5, r6, 5 ; bbs r15, target }
+	{ shrih r5, r6, 5 ; bz r15, target }
+	{ sne r5, r6, r7 ; bzt r15, target }
+	{ sub r5, r6, r7 ; bnz r15, target }
+	{ addbs_u r5, r6, r7 ; jal target }
+	{ infol 0x1234 ; blez r15, target }
+	{ mullla_uu r5, r6, r7 ; j target }
+	{ pcnt r5, r6 ; bbnst r15, target }
+	{ shl r5, r6, r7 ; bz r15, target }
+	{ bitx r5, r6 ; bbst r15, target }
+	{ infol 0x1234 ; blz r15, target }
+	{ movei r5, 5 ; blzt r15, target }
+	{ pcnt r5, r6 ; bbns r15, target }
+	{ bitx r5, r6 ; blz r15, target }
+	{ inthb r5, r6, r7 ; jal target }
+	{ sadab_u r5, r6, r7 ; j target }
+	{ clz r5, r6 ; bbs r15, target }
+	{ move r5, r6 ; bz r15, target }
+	{ shrh r5, r6, r7 ; jal target }
+	{ subh r5, r6, r7 ; jal target }
+	{ mnz r5, r6, r7 ; jal target }
+	{ slti_u r5, r6, 5 ; j target }
+	{ info 19 ; bnzt r15, target }
+	{ shlib r5, r6, 5 ; j target }
+	{ tblidxb0 r5, r6 ; j target }
+	{ s1a r5, r6, r7 ; j target }
+	{ fnop ; blezt r15, target }
+	{ infol 0x1234 ; j target }
+	{ clz r5, r6 ; j target }
+	{ bbnst r15, target ; addlis r5, r6, 0x1234 }
+	{ bbnst r15, target ; inthh r5, r6, r7 }
+	{ bbnst r15, target ; mulhh_su r5, r6, r7 }
+	{ bbnst r15, target ; mullla_uu r5, r6, r7 }
+	{ bbnst r15, target ; s3a r5, r6, r7 }
+	{ bbnst r15, target ; shrb r5, r6, r7 }
+	{ bbnst r15, target ; sltib_u r5, r6, 5 }
+	{ bbnst r15, target ; tblidxb2 r5, r6 }
+	{ bgezt r15, target ; avgb_u r5, r6, r7 }
+	{ bgezt r15, target ; minb_u r5, r6, r7 }
+	{ bgezt r15, target ; mulhl_su r5, r6, r7 }
+	{ bgezt r15, target ; nop }
+	{ bgezt r15, target ; seq r5, r6, r7 }
+	{ bgezt r15, target ; sltb r5, r6, r7 }
+	{ bgezt r15, target ; srab r5, r6, r7 }
+	{ blezt r15, target ; addh r5, r6, r7 }
+	{ blezt r15, target ; ctz r5, r6 }
+	{ blezt r15, target ; mnzh r5, r6, r7 }
+	{ blezt r15, target ; mulhlsa_uu r5, r6, r7 }
+	{ blezt r15, target ; packlb r5, r6, r7 }
+	{ blezt r15, target ; shlb r5, r6, r7 }
+	{ blezt r15, target ; slteh_u r5, r6, r7 }
+	{ blezt r15, target ; subbs_u r5, r6, r7 }
+	{ bbns r15, target ; addlis r5, r6, 0x1234 }
+	{ bbns r15, target ; inthh r5, r6, r7 }
+	{ bbns r15, target ; mulhh_su r5, r6, r7 }
+	{ bbns r15, target ; mullla_uu r5, r6, r7 }
+	{ bbns r15, target ; s3a r5, r6, r7 }
+	{ bbns r15, target ; shrb r5, r6, r7 }
+	{ bbns r15, target ; sltib_u r5, r6, 5 }
+	{ bbns r15, target ; tblidxb2 r5, r6 }
+	{ bbst r15, target ; avgb_u r5, r6, r7 }
+	{ bbst r15, target ; minb_u r5, r6, r7 }
+	{ bbst r15, target ; mulhl_su r5, r6, r7 }
+	{ bbst r15, target ; nop }
+	{ bbst r15, target ; seq r5, r6, r7 }
+	{ bbst r15, target ; sltb r5, r6, r7 }
+	{ bbst r15, target ; srab r5, r6, r7 }
+	{ bgez r15, target ; addh r5, r6, r7 }
+	{ bgez r15, target ; ctz r5, r6 }
+	{ bgez r15, target ; mnzh r5, r6, r7 }
+	{ bgez r15, target ; mulhlsa_uu r5, r6, r7 }
+	{ bgez r15, target ; packlb r5, r6, r7 }
+	{ bgez r15, target ; shlb r5, r6, r7 }
+	{ bgez r15, target ; slteh_u r5, r6, r7 }
+	{ bgez r15, target ; subbs_u r5, r6, r7 }
+	{ bgzt r15, target ; adds r5, r6, r7 }
+	{ bgzt r15, target ; intlb r5, r6, r7 }
+	{ bgzt r15, target ; mulhh_uu r5, r6, r7 }
+	{ bgzt r15, target ; mulllsa_uu r5, r6, r7 }
+	{ bgzt r15, target ; sadab_u r5, r6, r7 }
+	{ bgzt r15, target ; shrh r5, r6, r7 }
+	{ bgzt r15, target ; sltih r5, r6, 5 }
+	{ bgzt r15, target ; tblidxb3 r5, r6 }
+	{ blez r15, target ; avgh r5, r6, r7 }
+	{ blez r15, target ; minh r5, r6, r7 }
+	{ blez r15, target ; mulhl_us r5, r6, r7 }
+	{ blez r15, target ; nor r5, r6, r7 }
+	{ blez r15, target ; seqb r5, r6, r7 }
+	{ blez r15, target ; sltb_u r5, r6, r7 }
+	{ blez r15, target ; srah r5, r6, r7 }
+	{ blzt r15, target ; addhs r5, r6, r7 }
+	{ blzt r15, target ; dword_align r5, r6, r7 }
+	{ blzt r15, target ; move r5, r6 }
+	{ blzt r15, target ; mulll_ss r5, r6, r7 }
+	{ blzt r15, target ; pcnt r5, r6 }
+	{ blzt r15, target ; shlh r5, r6, r7 }
+	{ blzt r15, target ; slth r5, r6, r7 }
+	{ blzt r15, target ; subh r5, r6, r7 }
+	{ bnzt r15, target ; adiffb_u r5, r6, r7 }
+	{ bnzt r15, target ; intlh r5, r6, r7 }
+	{ bnzt r15, target ; mulhha_ss r5, r6, r7 }
+	{ bnzt r15, target ; mvnz r5, r6, r7 }
+	{ bnzt r15, target ; sadah r5, r6, r7 }
+	{ bnzt r15, target ; shri r5, r6, 5 }
+	{ bnzt r15, target ; sltih_u r5, r6, 5 }
+	{ bnzt r15, target ; xor r5, r6, r7 }
+	{ bbs r15, target ; avgh r5, r6, r7 }
+	{ bbs r15, target ; minh r5, r6, r7 }
+	{ bbs r15, target ; mulhl_us r5, r6, r7 }
+	{ bbs r15, target ; nor r5, r6, r7 }
+	{ bbs r15, target ; seqb r5, r6, r7 }
+	{ bbs r15, target ; sltb_u r5, r6, r7 }
+	{ bbs r15, target ; srah r5, r6, r7 }
+	{ bgz r15, target ; addhs r5, r6, r7 }
+	{ bgz r15, target ; dword_align r5, r6, r7 }
+	{ bgz r15, target ; move r5, r6 }
+	{ bgz r15, target ; mulll_ss r5, r6, r7 }
+	{ bgz r15, target ; pcnt r5, r6 }
+	{ bgz r15, target ; shlh r5, r6, r7 }
+	{ bgz r15, target ; slth r5, r6, r7 }
+	{ bgz r15, target ; subh r5, r6, r7 }
+	{ blz r15, target ; adiffb_u r5, r6, r7 }
+	{ blz r15, target ; intlh r5, r6, r7 }
+	{ blz r15, target ; mulhha_ss r5, r6, r7 }
+	{ blz r15, target ; mvnz r5, r6, r7 }
+	{ blz r15, target ; sadah r5, r6, r7 }
+	{ blz r15, target ; shri r5, r6, 5 }
+	{ blz r15, target ; sltih_u r5, r6, 5 }
+	{ blz r15, target ; xor r5, r6, r7 }
+	{ bnz r15, target ; bitx r5, r6 }
+	{ bnz r15, target ; minib_u r5, r6, 5 }
+	{ bnz r15, target ; mulhl_uu r5, r6, r7 }
+	{ bnz r15, target ; or r5, r6, r7 }
+	{ bnz r15, target ; seqh r5, r6, r7 }
+	{ bnz r15, target ; slte r5, r6, r7 }
+	{ bnz r15, target ; srai r5, r6, 5 }
+	{ bzt r15, target ; addi r5, r6, 5 }
+	{ bzt r15, target ; fnop }
+	{ bzt r15, target ; movei r5, 5 }
+	{ bzt r15, target ; mulll_su r5, r6, r7 }
+	{ bzt r15, target ; rl r5, r6, r7 }
+	{ bzt r15, target ; shli r5, r6, 5 }
+	{ bzt r15, target ; slth_u r5, r6, r7 }
+	{ bzt r15, target ; subhs r5, r6, r7 }
+	{ bz r15, target ; addli r5, r6, 0x1234 }
+	{ bz r15, target ; inthb r5, r6, r7 }
+	{ bz r15, target ; mulhh_ss r5, r6, r7 }
+	{ bz r15, target ; mullla_su r5, r6, r7 }
+	{ bz r15, target ; s2a r5, r6, r7 }
+	{ bz r15, target ; shr r5, r6, r7 }
+	{ bz r15, target ; sltib r5, r6, 5 }
+	{ bz r15, target ; tblidxb1 r5, r6 }
+	{ jal target ; addb r5, r6, r7 }
+	{ jal target ; crc32_32 r5, r6, r7 }
+	{ jal target ; mnz r5, r6, r7 }
+	{ jal target ; mulhla_us r5, r6, r7 }
+	{ jal target ; packhb r5, r6, r7 }
+	{ jal target ; seqih r5, r6, 5 }
+	{ jal target ; slteb_u r5, r6, r7 }
+	{ jal target ; sub r5, r6, r7 }
+	{ j target ; addih r5, r6, 5 }
+	{ j target ; infol 0x1234 }
+	{ j target ; movelis r5, 0x1234 }
+	{ j target ; mullla_ss r5, r6, r7 }
+	{ j target ; s1a r5, r6, r7 }
+	{ j target ; shlih r5, r6, 5 }
+	{ j target ; slti_u r5, r6, 5 }
+	{ j target ; tblidxb0 r5, r6 }
+	and r5, r6, r7
+	info 19
+	lnk r5
+	movei r5, 5
+	mulll_ss r5, r6, r7
+	packlb r5, r6, r7
+	seqi r5, r6, 5
+	sltb_u r5, r6, r7
+	srah r5, r6, r7
+	tns r5, r6
+	{ add r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 }
+	{ add r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; bitx r5, r6 ; lh r25, r26 }
+	{ add r15, r16, r17 ; clz r5, r6 ; lh r25, r26 }
+	{ add r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ add r15, r16, r17 ; info 19 }
+	{ add r15, r16, r17 ; lb r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ add r15, r16, r17 ; lb r25, r26 ; s3a r5, r6, r7 }
+	{ add r15, r16, r17 ; lb r25, r26 ; tblidxb3 r5, r6 }
+	{ add r15, r16, r17 ; lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ add r15, r16, r17 ; lb_u r25, r26 ; shl r5, r6, r7 }
+	{ add r15, r16, r17 ; lh r25, r26 ; add r5, r6, r7 }
+	{ add r15, r16, r17 ; lh r25, r26 ; mullla_ss r5, r6, r7 }
+	{ add r15, r16, r17 ; lh r25, r26 ; shri r5, r6, 5 }
+	{ add r15, r16, r17 ; lh_u r25, r26 ; andi r5, r6, 5 }
+	{ add r15, r16, r17 ; lh_u r25, r26 ; mvz r5, r6, r7 }
+	{ add r15, r16, r17 ; lh_u r25, r26 ; slte r5, r6, r7 }
+	{ add r15, r16, r17 ; lw r25, r26 ; clz r5, r6 }
+	{ add r15, r16, r17 ; lw r25, r26 ; nor r5, r6, r7 }
+	{ add r15, r16, r17 ; lw r25, r26 ; slti_u r5, r6, 5 }
+	{ add r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 }
+	{ add r15, r16, r17 ; move r5, r6 ; sw r25, r26 }
+	{ add r15, r16, r17 ; mulhh_ss r5, r6, r7 ; sb r25, r26 }
+	{ add r15, r16, r17 ; mulhha_ss r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; mulhl_uu r5, r6, r7 }
+	{ add r15, r16, r17 ; mulll_ss r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; mullla_ss r5, r6, r7 ; lw r25, r26 }
+	{ add r15, r16, r17 ; mvnz r5, r6, r7 ; lh r25, r26 }
+	{ add r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 }
+	{ add r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+	{ add r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 }
+	{ add r15, r16, r17 ; pcnt r5, r6 ; sb r25, r26 }
+	{ add r15, r16, r17 ; prefetch r25 ; mulhha_uu r5, r6, r7 }
+	{ add r15, r16, r17 ; prefetch r25 ; seqi r5, r6, 5 }
+	{ add r15, r16, r17 ; prefetch r25 }
+	{ add r15, r16, r17 ; rli r5, r6, 5 }
+	{ add r15, r16, r17 ; s2a r5, r6, r7 }
+	{ add r15, r16, r17 ; sb r25, r26 ; andi r5, r6, 5 }
+	{ add r15, r16, r17 ; sb r25, r26 ; mvz r5, r6, r7 }
+	{ add r15, r16, r17 ; sb r25, r26 ; slte r5, r6, r7 }
+	{ add r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+	{ add r15, r16, r17 ; sh r25, r26 ; and r5, r6, r7 }
+	{ add r15, r16, r17 ; sh r25, r26 ; mvnz r5, r6, r7 }
+	{ add r15, r16, r17 ; sh r25, r26 ; slt_u r5, r6, r7 }
+	{ add r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 }
+	{ add r15, r16, r17 ; shri r5, r6, 5 }
+	{ add r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 }
+	{ add r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; slti r5, r6, 5 }
+	{ add r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
+	{ add r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+	{ add r15, r16, r17 ; sub r5, r6, r7 }
+	{ add r15, r16, r17 ; sw r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ add r15, r16, r17 ; sw r25, r26 ; s3a r5, r6, r7 }
+	{ add r15, r16, r17 ; sw r25, r26 ; tblidxb3 r5, r6 }
+	{ add r15, r16, r17 ; tblidxb1 r5, r6 ; sh r25, r26 }
+	{ add r15, r16, r17 ; tblidxb3 r5, r6 ; sh r25, r26 }
+	{ add r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+	{ add r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ add r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+	{ add r5, r6, r7 ; ill ; lh r25, r26 }
+	{ add r5, r6, r7 ; inthh r15, r16, r17 }
+	{ add r5, r6, r7 ; lb r25, r26 ; mz r15, r16, r17 }
+	{ add r5, r6, r7 ; lb r25, r26 ; slti r15, r16, 5 }
+	{ add r5, r6, r7 ; lb_u r25, r26 ; nop }
+	{ add r5, r6, r7 ; lb_u r25, r26 ; slti_u r15, r16, 5 }
+	{ add r5, r6, r7 ; lh r25, r26 ; mz r15, r16, r17 }
+	{ add r5, r6, r7 ; lh r25, r26 ; slti r15, r16, 5 }
+	{ add r5, r6, r7 ; lh_u r25, r26 ; nop }
+	{ add r5, r6, r7 ; lh_u r25, r26 ; slti_u r15, r16, 5 }
+	{ add r5, r6, r7 ; lw r25, r26 ; movei r15, 5 }
+	{ add r5, r6, r7 ; lw r25, r26 ; slte_u r15, r16, r17 }
+	{ add r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ add r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+	{ add r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+	{ add r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+	{ add r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+	{ add r5, r6, r7 ; prefetch r25 ; ill }
+	{ add r5, r6, r7 ; prefetch r25 ; shri r15, r16, 5 }
+	{ add r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+	{ add r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+	{ add r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+	{ add r5, r6, r7 ; sb r25, r26 ; rl r15, r16, r17 }
+	{ add r5, r6, r7 ; sb r25, r26 ; sub r15, r16, r17 }
+	{ add r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+	{ add r5, r6, r7 ; sh r25, r26 ; nop }
+	{ add r5, r6, r7 ; sh r25, r26 ; slti_u r15, r16, 5 }
+	{ add r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 }
+	{ add r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+	{ add r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+	{ add r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+	{ add r5, r6, r7 ; slteh r15, r16, r17 }
+	{ add r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+	{ add r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 }
+	{ add r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 }
+	{ add r5, r6, r7 ; sw r25, r26 ; add r15, r16, r17 }
+	{ add r5, r6, r7 ; sw r25, r26 ; seq r15, r16, r17 }
+	{ add r5, r6, r7 ; wh64 r15 }
+	{ addb r15, r16, r17 ; addli r5, r6, 0x1234 }
+	{ addb r15, r16, r17 ; inthb r5, r6, r7 }
+	{ addb r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ addb r15, r16, r17 ; mullla_su r5, r6, r7 }
+	{ addb r15, r16, r17 ; s2a r5, r6, r7 }
+	{ addb r15, r16, r17 ; shr r5, r6, r7 }
+	{ addb r15, r16, r17 ; sltib r5, r6, 5 }
+	{ addb r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ addb r5, r6, r7 ; finv r15 }
+	{ addb r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ addb r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+	{ addb r5, r6, r7 ; prefetch r15 }
+	{ addb r5, r6, r7 ; shli r15, r16, 5 }
+	{ addb r5, r6, r7 ; slth_u r15, r16, r17 }
+	{ addb r5, r6, r7 ; subhs r15, r16, r17 }
+	{ addbs_u r15, r16, r17 ; adiffh r5, r6, r7 }
+	{ addbs_u r15, r16, r17 ; maxb_u r5, r6, r7 }
+	{ addbs_u r15, r16, r17 ; mulhha_su r5, r6, r7 }
+	{ addbs_u r15, r16, r17 ; mvz r5, r6, r7 }
+	{ addbs_u r15, r16, r17 ; sadah_u r5, r6, r7 }
+	{ addbs_u r15, r16, r17 ; shrib r5, r6, 5 }
+	{ addbs_u r15, r16, r17 ; sne r5, r6, r7 }
+	{ addbs_u r15, r16, r17 ; xori r5, r6, 5 }
+	{ addbs_u r5, r6, r7 ; ill }
+	{ addbs_u r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ addbs_u r5, r6, r7 ; move r15, r16 }
+	{ addbs_u r5, r6, r7 ; s1a r15, r16, r17 }
+	{ addbs_u r5, r6, r7 ; shrb r15, r16, r17 }
+	{ addbs_u r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ addbs_u r5, r6, r7 ; tns r15, r16 }
+	{ addh r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ addh r15, r16, r17 ; minb_u r5, r6, r7 }
+	{ addh r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ addh r15, r16, r17 ; nop }
+	{ addh r15, r16, r17 ; seq r5, r6, r7 }
+	{ addh r15, r16, r17 ; sltb r5, r6, r7 }
+	{ addh r15, r16, r17 ; srab r5, r6, r7 }
+	{ addh r5, r6, r7 ; addh r15, r16, r17 }
+	{ addh r5, r6, r7 ; inthh r15, r16, r17 }
+	{ addh r5, r6, r7 ; lwadd r15, r16, 5 }
+	{ addh r5, r6, r7 ; mtspr 0x5, r16 }
+	{ addh r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ addh r5, r6, r7 ; shrih r15, r16, 5 }
+	{ addh r5, r6, r7 ; sneb r15, r16, r17 }
+	{ addhs r15, r16, r17 ; add r5, r6, r7 }
+	{ addhs r15, r16, r17 ; clz r5, r6 }
+	{ addhs r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ addhs r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ addhs r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ addhs r15, r16, r17 ; seqib r5, r6, 5 }
+	{ addhs r15, r16, r17 ; slteb r5, r6, r7 }
+	{ addhs r15, r16, r17 ; sraih r5, r6, 5 }
+	{ addhs r5, r6, r7 ; addih r15, r16, 5 }
+	{ addhs r5, r6, r7 ; iret }
+	{ addhs r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ addhs r5, r6, r7 ; nop }
+	{ addhs r5, r6, r7 ; seqi r15, r16, 5 }
+	{ addhs r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ addhs r5, r6, r7 ; srah r15, r16, r17 }
+	{ addi r15, r16, 5 ; add r5, r6, r7 ; lw r25, r26 }
+	{ addi r15, r16, 5 ; addib r5, r6, 5 }
+	{ addi r15, r16, 5 ; andi r5, r6, 5 ; lh_u r25, r26 }
+	{ addi r15, r16, 5 ; bytex r5, r6 ; lb r25, r26 }
+	{ addi r15, r16, 5 ; crc32_32 r5, r6, r7 }
+	{ addi r15, r16, 5 ; fnop ; sh r25, r26 }
+	{ addi r15, r16, 5 ; lb r25, r26 ; and r5, r6, r7 }
+	{ addi r15, r16, 5 ; lb r25, r26 ; mvnz r5, r6, r7 }
+	{ addi r15, r16, 5 ; lb r25, r26 ; slt_u r5, r6, r7 }
+	{ addi r15, r16, 5 ; lb_u r25, r26 ; bytex r5, r6 }
+	{ addi r15, r16, 5 ; lb_u r25, r26 ; nop }
+	{ addi r15, r16, 5 ; lb_u r25, r26 ; slti r5, r6, 5 }
+	{ addi r15, r16, 5 ; lh r25, r26 ; fnop }
+	{ addi r15, r16, 5 ; lh r25, r26 ; ori r5, r6, 5 }
+	{ addi r15, r16, 5 ; lh r25, r26 ; sra r5, r6, r7 }
+	{ addi r15, r16, 5 ; lh_u r25, r26 ; move r5, r6 }
+	{ addi r15, r16, 5 ; lh_u r25, r26 ; rli r5, r6, 5 }
+	{ addi r15, r16, 5 ; lh_u r25, r26 ; tblidxb0 r5, r6 }
+	{ addi r15, r16, 5 ; lw r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ addi r15, r16, 5 ; lw r25, r26 ; s3a r5, r6, r7 }
+	{ addi r15, r16, 5 ; lw r25, r26 ; tblidxb3 r5, r6 }
+	{ addi r15, r16, 5 ; mnz r5, r6, r7 ; sw r25, r26 }
+	{ addi r15, r16, 5 ; movei r5, 5 ; sb r25, r26 }
+	{ addi r15, r16, 5 ; mulhh_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ addi r15, r16, 5 ; mulhha_uu r5, r6, r7 ; lh r25, r26 }
+	{ addi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ addi r15, r16, 5 ; mulll_uu r5, r6, r7 ; lh r25, r26 }
+	{ addi r15, r16, 5 ; mullla_uu r5, r6, r7 ; lb_u r25, r26 }
+	{ addi r15, r16, 5 ; mvz r5, r6, r7 ; lb r25, r26 }
+	{ addi r15, r16, 5 ; mzb r5, r6, r7 }
+	{ addi r15, r16, 5 ; nor r5, r6, r7 ; sw r25, r26 }
+	{ addi r15, r16, 5 ; ori r5, r6, 5 ; sw r25, r26 }
+	{ addi r15, r16, 5 ; prefetch r25 ; bitx r5, r6 }
+	{ addi r15, r16, 5 ; prefetch r25 ; mz r5, r6, r7 }
+	{ addi r15, r16, 5 ; prefetch r25 ; slte_u r5, r6, r7 }
+	{ addi r15, r16, 5 ; rl r5, r6, r7 ; sh r25, r26 }
+	{ addi r15, r16, 5 ; s1a r5, r6, r7 ; sh r25, r26 }
+	{ addi r15, r16, 5 ; s3a r5, r6, r7 ; sh r25, r26 }
+	{ addi r15, r16, 5 ; sb r25, r26 ; move r5, r6 }
+	{ addi r15, r16, 5 ; sb r25, r26 ; rli r5, r6, 5 }
+	{ addi r15, r16, 5 ; sb r25, r26 ; tblidxb0 r5, r6 }
+	{ addi r15, r16, 5 ; seqi r5, r6, 5 ; lh r25, r26 }
+	{ addi r15, r16, 5 ; sh r25, r26 ; mnz r5, r6, r7 }
+	{ addi r15, r16, 5 ; sh r25, r26 ; rl r5, r6, r7 }
+	{ addi r15, r16, 5 ; sh r25, r26 ; sub r5, r6, r7 }
+	{ addi r15, r16, 5 ; shli r5, r6, 5 ; lb_u r25, r26 }
+	{ addi r15, r16, 5 ; shr r5, r6, r7 }
+	{ addi r15, r16, 5 ; slt r5, r6, r7 ; prefetch r25 }
+	{ addi r15, r16, 5 ; slte r5, r6, r7 ; lh_u r25, r26 }
+	{ addi r15, r16, 5 ; slteh_u r5, r6, r7 }
+	{ addi r15, r16, 5 ; slti_u r5, r6, 5 ; sh r25, r26 }
+	{ addi r15, r16, 5 ; sra r5, r6, r7 ; lb_u r25, r26 }
+	{ addi r15, r16, 5 ; srai r5, r6, 5 }
+	{ addi r15, r16, 5 ; sw r25, r26 ; and r5, r6, r7 }
+	{ addi r15, r16, 5 ; sw r25, r26 ; mvnz r5, r6, r7 }
+	{ addi r15, r16, 5 ; sw r25, r26 ; slt_u r5, r6, r7 }
+	{ addi r15, r16, 5 ; tblidxb0 r5, r6 ; prefetch r25 }
+	{ addi r15, r16, 5 ; tblidxb2 r5, r6 ; prefetch r25 }
+	{ addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch r25 }
+	{ addi r5, r6, 5 ; addi r15, r16, 5 ; lb r25, r26 }
+	{ addi r5, r6, 5 ; and r15, r16, r17 ; prefetch r25 }
+	{ addi r5, r6, 5 ; fnop ; lb_u r25, r26 }
+	{ addi r5, r6, 5 ; info 19 ; lb r25, r26 }
+	{ addi r5, r6, 5 ; jrp r15 }
+	{ addi r5, r6, 5 ; lb r25, r26 ; s2a r15, r16, r17 }
+	{ addi r5, r6, 5 ; lb_u r15, r16 }
+	{ addi r5, r6, 5 ; lb_u r25, r26 ; s3a r15, r16, r17 }
+	{ addi r5, r6, 5 ; lbadd_u r15, r16, 5 }
+	{ addi r5, r6, 5 ; lh r25, r26 ; s2a r15, r16, r17 }
+	{ addi r5, r6, 5 ; lh_u r15, r16 }
+	{ addi r5, r6, 5 ; lh_u r25, r26 ; s3a r15, r16, r17 }
+	{ addi r5, r6, 5 ; lhadd_u r15, r16, 5 }
+	{ addi r5, r6, 5 ; lw r25, r26 ; s1a r15, r16, r17 }
+	{ addi r5, r6, 5 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ addi r5, r6, 5 ; movei r15, 5 ; lh_u r25, r26 }
+	{ addi r5, r6, 5 ; mzb r15, r16, r17 }
+	{ addi r5, r6, 5 ; nor r15, r16, r17 ; sw r25, r26 }
+	{ addi r5, r6, 5 ; ori r15, r16, 5 ; sw r25, r26 }
+	{ addi r5, r6, 5 ; prefetch r25 ; or r15, r16, r17 }
+	{ addi r5, r6, 5 ; prefetch r25 ; sra r15, r16, r17 }
+	{ addi r5, r6, 5 ; rli r15, r16, 5 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; s2a r15, r16, r17 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; sb r25, r26 ; andi r15, r16, 5 }
+	{ addi r5, r6, 5 ; sb r25, r26 ; shli r15, r16, 5 }
+	{ addi r5, r6, 5 ; seq r15, r16, r17 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; sh r15, r16 }
+	{ addi r5, r6, 5 ; sh r25, r26 ; s3a r15, r16, r17 }
+	{ addi r5, r6, 5 ; shl r15, r16, r17 ; lb r25, r26 }
+	{ addi r5, r6, 5 ; shli r15, r16, 5 ; sw r25, r26 }
+	{ addi r5, r6, 5 ; shri r15, r16, 5 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; slt_u r15, r16, r17 ; lh r25, r26 }
+	{ addi r5, r6, 5 ; slte_u r15, r16, r17 ; lb r25, r26 }
+	{ addi r5, r6, 5 ; slti r15, r16, 5 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; sne r15, r16, r17 ; lb r25, r26 }
+	{ addi r5, r6, 5 ; sra r15, r16, r17 ; sw r25, r26 }
+	{ addi r5, r6, 5 ; sub r15, r16, r17 ; lw r25, r26 }
+	{ addi r5, r6, 5 ; sw r25, r26 ; move r15, r16 }
+	{ addi r5, r6, 5 ; sw r25, r26 ; slte r15, r16, r17 }
+	{ addi r5, r6, 5 ; xor r15, r16, r17 ; sh r25, r26 }
+	{ addib r15, r16, 5 ; avgb_u r5, r6, r7 }
+	{ addib r15, r16, 5 ; minb_u r5, r6, r7 }
+	{ addib r15, r16, 5 ; mulhl_su r5, r6, r7 }
+	{ addib r15, r16, 5 ; nop }
+	{ addib r15, r16, 5 ; seq r5, r6, r7 }
+	{ addib r15, r16, 5 ; sltb r5, r6, r7 }
+	{ addib r15, r16, 5 ; srab r5, r6, r7 }
+	{ addib r5, r6, 5 ; addh r15, r16, r17 }
+	{ addib r5, r6, 5 ; inthh r15, r16, r17 }
+	{ addib r5, r6, 5 ; lwadd r15, r16, 5 }
+	{ addib r5, r6, 5 ; mtspr 0x5, r16 }
+	{ addib r5, r6, 5 ; sbadd r15, r16, 5 }
+	{ addib r5, r6, 5 ; shrih r15, r16, 5 }
+	{ addib r5, r6, 5 ; sneb r15, r16, r17 }
+	{ addih r15, r16, 5 ; add r5, r6, r7 }
+	{ addih r15, r16, 5 ; clz r5, r6 }
+	{ addih r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+	{ addih r15, r16, 5 ; mulhla_su r5, r6, r7 }
+	{ addih r15, r16, 5 ; packbs_u r5, r6, r7 }
+	{ addih r15, r16, 5 ; seqib r5, r6, 5 }
+	{ addih r15, r16, 5 ; slteb r5, r6, r7 }
+	{ addih r15, r16, 5 ; sraih r5, r6, 5 }
+	{ addih r5, r6, 5 ; addih r15, r16, 5 }
+	{ addih r5, r6, 5 ; iret }
+	{ addih r5, r6, 5 ; maxib_u r15, r16, 5 }
+	{ addih r5, r6, 5 ; nop }
+	{ addih r5, r6, 5 ; seqi r15, r16, 5 }
+	{ addih r5, r6, 5 ; sltb_u r15, r16, r17 }
+	{ addih r5, r6, 5 ; srah r15, r16, r17 }
+	{ addli r15, r16, 0x1234 ; addhs r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; dword_align r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; move r5, r6 }
+	{ addli r15, r16, 0x1234 ; mulll_ss r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; pcnt r5, r6 }
+	{ addli r15, r16, 0x1234 ; shlh r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; slth r5, r6, r7 }
+	{ addli r15, r16, 0x1234 ; subh r5, r6, r7 }
+	{ addli r5, r6, 0x1234 ; and r15, r16, r17 }
+	{ addli r5, r6, 0x1234 ; jrp r15 }
+	{ addli r5, r6, 0x1234 ; minb_u r15, r16, r17 }
+	{ addli r5, r6, 0x1234 ; packbs_u r15, r16, r17 }
+	{ addli r5, r6, 0x1234 ; shadd r15, r16, 5 }
+	{ addli r5, r6, 0x1234 ; slteb_u r15, r16, r17 }
+	{ addli r5, r6, 0x1234 ; sub r15, r16, r17 }
+	{ addlis r15, r16, 0x1234 ; addli r5, r6, 0x1234 }
+	{ addlis r15, r16, 0x1234 ; inthh r5, r6, r7 }
+	{ addlis r15, r16, 0x1234 ; mulhh_uu r5, r6, r7 }
+	{ addlis r15, r16, 0x1234 ; mulllsa_uu r5, r6, r7 }
+	{ addlis r15, r16, 0x1234 ; sadab_u r5, r6, r7 }
+	{ addlis r15, r16, 0x1234 ; shrh r5, r6, r7 }
+	{ addlis r15, r16, 0x1234 ; sltih r5, r6, 5 }
+	{ addlis r15, r16, 0x1234 ; tblidxb3 r5, r6 }
+	{ addlis r5, r6, 0x1234 ; icoh r15 }
+	{ addlis r5, r6, 0x1234 ; lhadd r15, r16, 5 }
+	{ addlis r5, r6, 0x1234 ; mnzh r15, r16, r17 }
+	{ addlis r5, r6, 0x1234 ; s1a r15, r16, r17 }
+	{ addlis r5, r6, 0x1234 ; shrb r15, r16, r17 }
+	{ addlis r5, r6, 0x1234 ; sltib_u r15, r16, 5 }
+	{ addlis r5, r6, 0x1234 ; tns r15, r16 }
+	{ adds r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ adds r15, r16, r17 ; minb_u r5, r6, r7 }
+	{ adds r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ adds r15, r16, r17 ; nop }
+	{ adds r15, r16, r17 ; seq r5, r6, r7 }
+	{ adds r15, r16, r17 ; sltb r5, r6, r7 }
+	{ adds r15, r16, r17 ; srab r5, r6, r7 }
+	{ adds r5, r6, r7 ; addh r15, r16, r17 }
+	{ adds r5, r6, r7 ; inthh r15, r16, r17 }
+	{ adds r5, r6, r7 ; lwadd r15, r16, 5 }
+	{ adds r5, r6, r7 ; mtspr 0x5, r16 }
+	{ adds r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ adds r5, r6, r7 ; shrih r15, r16, 5 }
+	{ adds r5, r6, r7 ; sneb r15, r16, r17 }
+	{ adiffb_u r5, r6, r7 ; add r15, r16, r17 }
+	{ adiffb_u r5, r6, r7 ; info 19 }
+	{ adiffb_u r5, r6, r7 ; lnk r15 }
+	{ adiffb_u r5, r6, r7 ; movei r15, 5 }
+	{ adiffb_u r5, r6, r7 ; s2a r15, r16, r17 }
+	{ adiffb_u r5, r6, r7 ; shrh r15, r16, r17 }
+	{ adiffb_u r5, r6, r7 ; sltih r15, r16, 5 }
+	{ adiffb_u r5, r6, r7 ; wh64 r15 }
+	{ adiffh r5, r6, r7 ; fnop }
+	{ adiffh r5, r6, r7 ; lh_u r15, r16 }
+	{ adiffh r5, r6, r7 ; mnzb r15, r16, r17 }
+	{ adiffh r5, r6, r7 ; rl r15, r16, r17 }
+	{ adiffh r5, r6, r7 ; shlih r15, r16, 5 }
+	{ adiffh r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ adiffh r5, r6, r7 ; sw r15, r16 }
+	{ and r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 }
+	{ and r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 }
+	{ and r15, r16, r17 ; bitx r5, r6 ; lb r25, r26 }
+	{ and r15, r16, r17 ; clz r5, r6 ; lb r25, r26 }
+	{ and r15, r16, r17 ; ctz r5, r6 ; sw r25, r26 }
+	{ and r15, r16, r17 ; info 19 ; sh r25, r26 }
+	{ and r15, r16, r17 ; lb r25, r26 ; movei r5, 5 }
+	{ and r15, r16, r17 ; lb r25, r26 ; s1a r5, r6, r7 }
+	{ and r15, r16, r17 ; lb r25, r26 ; tblidxb1 r5, r6 }
+	{ and r15, r16, r17 ; lb_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ and r15, r16, r17 ; lb_u r25, r26 ; seq r5, r6, r7 }
+	{ and r15, r16, r17 ; lb_u r25, r26 ; xor r5, r6, r7 }
+	{ and r15, r16, r17 ; lh r25, r26 ; mulll_ss r5, r6, r7 }
+	{ and r15, r16, r17 ; lh r25, r26 ; shli r5, r6, 5 }
+	{ and r15, r16, r17 ; lh_u r25, r26 ; addi r5, r6, 5 }
+	{ and r15, r16, r17 ; lh_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ and r15, r16, r17 ; lh_u r25, r26 ; slt r5, r6, r7 }
+	{ and r15, r16, r17 ; lw r25, r26 ; bitx r5, r6 }
+	{ and r15, r16, r17 ; lw r25, r26 ; mz r5, r6, r7 }
+	{ and r15, r16, r17 ; lw r25, r26 ; slte_u r5, r6, r7 }
+	{ and r15, r16, r17 ; minih r5, r6, 5 }
+	{ and r15, r16, r17 ; move r5, r6 ; sb r25, r26 }
+	{ and r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lw r25, r26 }
+	{ and r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lh_u r25, r26 }
+	{ and r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ and r15, r16, r17 ; mulll_ss r5, r6, r7 ; lh_u r25, r26 }
+	{ and r15, r16, r17 ; mullla_ss r5, r6, r7 ; lh r25, r26 }
+	{ and r15, r16, r17 ; mvnz r5, r6, r7 ; lb r25, r26 }
+	{ and r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+	{ and r15, r16, r17 ; nop ; sw r25, r26 }
+	{ and r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 }
+	{ and r15, r16, r17 ; pcnt r5, r6 ; lw r25, r26 }
+	{ and r15, r16, r17 ; prefetch r25 ; mulhh_uu r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch r25 ; s3a r5, r6, r7 }
+	{ and r15, r16, r17 ; prefetch r25 ; tblidxb3 r5, r6 }
+	{ and r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 }
+	{ and r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+	{ and r15, r16, r17 ; sb r25, r26 ; addi r5, r6, 5 }
+	{ and r15, r16, r17 ; sb r25, r26 ; mullla_uu r5, r6, r7 }
+	{ and r15, r16, r17 ; sb r25, r26 ; slt r5, r6, r7 }
+	{ and r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+	{ and r15, r16, r17 ; sh r25, r26 ; add r5, r6, r7 }
+	{ and r15, r16, r17 ; sh r25, r26 ; mullla_ss r5, r6, r7 }
+	{ and r15, r16, r17 ; sh r25, r26 ; shri r5, r6, 5 }
+	{ and r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 }
+	{ and r15, r16, r17 ; shlih r5, r6, 5 }
+	{ and r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 }
+	{ and r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 }
+	{ and r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+	{ and r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 }
+	{ and r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+	{ and r15, r16, r17 ; srah r5, r6, r7 }
+	{ and r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 }
+	{ and r15, r16, r17 ; sw r25, r26 ; movei r5, 5 }
+	{ and r15, r16, r17 ; sw r25, r26 ; s1a r5, r6, r7 }
+	{ and r15, r16, r17 ; sw r25, r26 ; tblidxb1 r5, r6 }
+	{ and r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 }
+	{ and r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch r25 }
+	{ and r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+	{ and r5, r6, r7 ; addib r15, r16, 5 }
+	{ and r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+	{ and r5, r6, r7 ; ill ; lb r25, r26 }
+	{ and r5, r6, r7 ; infol 0x1234 }
+	{ and r5, r6, r7 ; lb r25, r26 ; move r15, r16 }
+	{ and r5, r6, r7 ; lb r25, r26 ; slte r15, r16, r17 }
+	{ and r5, r6, r7 ; lb_u r25, r26 ; movei r15, 5 }
+	{ and r5, r6, r7 ; lb_u r25, r26 ; slte_u r15, r16, r17 }
+	{ and r5, r6, r7 ; lh r25, r26 ; move r15, r16 }
+	{ and r5, r6, r7 ; lh r25, r26 ; slte r15, r16, r17 }
+	{ and r5, r6, r7 ; lh_u r25, r26 ; movei r15, 5 }
+	{ and r5, r6, r7 ; lh_u r25, r26 ; slte_u r15, r16, r17 }
+	{ and r5, r6, r7 ; lw r25, r26 ; mnz r15, r16, r17 }
+	{ and r5, r6, r7 ; lw r25, r26 ; slt_u r15, r16, r17 }
+	{ and r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ and r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+	{ and r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+	{ and r5, r6, r7 ; nop ; sw r25, r26 }
+	{ and r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 }
+	{ and r5, r6, r7 ; prefetch r25 ; andi r15, r16, 5 }
+	{ and r5, r6, r7 ; prefetch r25 ; shli r15, r16, 5 }
+	{ and r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+	{ and r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+	{ and r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+	{ and r5, r6, r7 ; sb r25, r26 ; or r15, r16, r17 }
+	{ and r5, r6, r7 ; sb r25, r26 ; sra r15, r16, r17 }
+	{ and r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 }
+	{ and r5, r6, r7 ; sh r25, r26 ; movei r15, 5 }
+	{ and r5, r6, r7 ; sh r25, r26 ; slte_u r15, r16, r17 }
+	{ and r5, r6, r7 ; shlb r15, r16, r17 }
+	{ and r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+	{ and r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+	{ and r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+	{ and r5, r6, r7 ; slteb r15, r16, r17 }
+	{ and r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 }
+	{ and r5, r6, r7 ; sneb r15, r16, r17 }
+	{ and r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+	{ and r5, r6, r7 ; subs r15, r16, r17 }
+	{ and r5, r6, r7 ; sw r25, r26 ; s2a r15, r16, r17 }
+	{ and r5, r6, r7 ; swadd r15, r16, 5 }
+	{ andi r15, r16, 5 ; add r5, r6, r7 ; sb r25, r26 }
+	{ andi r15, r16, 5 ; addli r5, r6, 0x1234 }
+	{ andi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 }
+	{ andi r15, r16, 5 ; bytex r5, r6 ; lh r25, r26 }
+	{ andi r15, r16, 5 ; ctz r5, r6 ; lb r25, r26 }
+	{ andi r15, r16, 5 ; fnop }
+	{ andi r15, r16, 5 ; lb r25, r26 ; bitx r5, r6 }
+	{ andi r15, r16, 5 ; lb r25, r26 ; mz r5, r6, r7 }
+	{ andi r15, r16, 5 ; lb r25, r26 ; slte_u r5, r6, r7 }
+	{ andi r15, r16, 5 ; lb_u r25, r26 ; ctz r5, r6 }
+	{ andi r15, r16, 5 ; lb_u r25, r26 ; or r5, r6, r7 }
+	{ andi r15, r16, 5 ; lb_u r25, r26 ; sne r5, r6, r7 }
+	{ andi r15, r16, 5 ; lh r25, r26 ; mnz r5, r6, r7 }
+	{ andi r15, r16, 5 ; lh r25, r26 ; rl r5, r6, r7 }
+	{ andi r15, r16, 5 ; lh r25, r26 ; sub r5, r6, r7 }
+	{ andi r15, r16, 5 ; lh_u r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ andi r15, r16, 5 ; lh_u r25, r26 ; s2a r5, r6, r7 }
+	{ andi r15, r16, 5 ; lh_u r25, r26 ; tblidxb2 r5, r6 }
+	{ andi r15, r16, 5 ; lw r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ andi r15, r16, 5 ; lw r25, r26 ; seqi r5, r6, 5 }
+	{ andi r15, r16, 5 ; lw r25, r26 }
+	{ andi r15, r16, 5 ; mnzb r5, r6, r7 }
+	{ andi r15, r16, 5 ; movei r5, 5 ; sw r25, r26 }
+	{ andi r15, r16, 5 ; mulhh_uu r5, r6, r7 ; prefetch r25 }
+	{ andi r15, r16, 5 ; mulhha_uu r5, r6, r7 ; lw r25, r26 }
+	{ andi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; prefetch r25 }
+	{ andi r15, r16, 5 ; mulll_uu r5, r6, r7 ; lw r25, r26 }
+	{ andi r15, r16, 5 ; mullla_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ andi r15, r16, 5 ; mvz r5, r6, r7 ; lh r25, r26 }
+	{ andi r15, r16, 5 ; nop ; lb r25, r26 }
+	{ andi r15, r16, 5 ; or r5, r6, r7 ; lb r25, r26 }
+	{ andi r15, r16, 5 ; packbs_u r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch r25 ; clz r5, r6 }
+	{ andi r15, r16, 5 ; prefetch r25 ; nor r5, r6, r7 }
+	{ andi r15, r16, 5 ; prefetch r25 ; slti_u r5, r6, 5 }
+	{ andi r15, r16, 5 ; rl r5, r6, r7 }
+	{ andi r15, r16, 5 ; s1a r5, r6, r7 }
+	{ andi r15, r16, 5 ; s3a r5, r6, r7 }
+	{ andi r15, r16, 5 ; sb r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ andi r15, r16, 5 ; sb r25, r26 ; s2a r5, r6, r7 }
+	{ andi r15, r16, 5 ; sb r25, r26 ; tblidxb2 r5, r6 }
+	{ andi r15, r16, 5 ; seqi r5, r6, 5 ; lw r25, r26 }
+	{ andi r15, r16, 5 ; sh r25, r26 ; movei r5, 5 }
+	{ andi r15, r16, 5 ; sh r25, r26 ; s1a r5, r6, r7 }
+	{ andi r15, r16, 5 ; sh r25, r26 ; tblidxb1 r5, r6 }
+	{ andi r15, r16, 5 ; shli r5, r6, 5 ; lh_u r25, r26 }
+	{ andi r15, r16, 5 ; shrh r5, r6, r7 }
+	{ andi r15, r16, 5 ; slt r5, r6, r7 ; sh r25, r26 }
+	{ andi r15, r16, 5 ; slte r5, r6, r7 ; prefetch r25 }
+	{ andi r15, r16, 5 ; slth_u r5, r6, r7 }
+	{ andi r15, r16, 5 ; slti_u r5, r6, 5 }
+	{ andi r15, r16, 5 ; sra r5, r6, r7 ; lh_u r25, r26 }
+	{ andi r15, r16, 5 ; sraih r5, r6, 5 }
+	{ andi r15, r16, 5 ; sw r25, r26 ; bitx r5, r6 }
+	{ andi r15, r16, 5 ; sw r25, r26 ; mz r5, r6, r7 }
+	{ andi r15, r16, 5 ; sw r25, r26 ; slte_u r5, r6, r7 }
+	{ andi r15, r16, 5 ; tblidxb0 r5, r6 ; sh r25, r26 }
+	{ andi r15, r16, 5 ; tblidxb2 r5, r6 ; sh r25, r26 }
+	{ andi r15, r16, 5 ; xor r5, r6, r7 ; sh r25, r26 }
+	{ andi r5, r6, 5 ; addi r15, r16, 5 ; lh r25, r26 }
+	{ andi r5, r6, 5 ; and r15, r16, r17 ; sh r25, r26 }
+	{ andi r5, r6, 5 ; fnop ; lh_u r25, r26 }
+	{ andi r5, r6, 5 ; info 19 ; lh r25, r26 }
+	{ andi r5, r6, 5 ; lb r25, r26 ; add r15, r16, r17 }
+	{ andi r5, r6, 5 ; lb r25, r26 ; seq r15, r16, r17 }
+	{ andi r5, r6, 5 ; lb_u r25, r26 ; addi r15, r16, 5 }
+	{ andi r5, r6, 5 ; lb_u r25, r26 ; seqi r15, r16, 5 }
+	{ andi r5, r6, 5 ; lh r25, r26 ; add r15, r16, r17 }
+	{ andi r5, r6, 5 ; lh r25, r26 ; seq r15, r16, r17 }
+	{ andi r5, r6, 5 ; lh_u r25, r26 ; addi r15, r16, 5 }
+	{ andi r5, r6, 5 ; lh_u r25, r26 ; seqi r15, r16, 5 }
+	{ andi r5, r6, 5 ; lw r15, r16 }
+	{ andi r5, r6, 5 ; lw r25, r26 ; s3a r15, r16, r17 }
+	{ andi r5, r6, 5 ; lwadd r15, r16, 5 }
+	{ andi r5, r6, 5 ; mnz r15, r16, r17 ; sh r25, r26 }
+	{ andi r5, r6, 5 ; movei r15, 5 ; prefetch r25 }
+	{ andi r5, r6, 5 ; nop ; lb r25, r26 }
+	{ andi r5, r6, 5 ; or r15, r16, r17 ; lb r25, r26 }
+	{ andi r5, r6, 5 ; packbs_u r15, r16, r17 }
+	{ andi r5, r6, 5 ; prefetch r25 ; rl r15, r16, r17 }
+	{ andi r5, r6, 5 ; prefetch r25 ; sub r15, r16, r17 }
+	{ andi r5, r6, 5 ; rli r15, r16, 5 ; sb r25, r26 }
+	{ andi r5, r6, 5 ; s2a r15, r16, r17 ; sb r25, r26 }
+	{ andi r5, r6, 5 ; sb r25, r26 ; ill }
+	{ andi r5, r6, 5 ; sb r25, r26 ; shri r15, r16, 5 }
+	{ andi r5, r6, 5 ; seq r15, r16, r17 ; sb r25, r26 }
+	{ andi r5, r6, 5 ; sh r25, r26 ; addi r15, r16, 5 }
+	{ andi r5, r6, 5 ; sh r25, r26 ; seqi r15, r16, 5 }
+	{ andi r5, r6, 5 ; shl r15, r16, r17 ; lh r25, r26 }
+	{ andi r5, r6, 5 ; shlib r15, r16, 5 }
+	{ andi r5, r6, 5 ; shri r15, r16, 5 ; sb r25, r26 }
+	{ andi r5, r6, 5 ; slt_u r15, r16, r17 ; lw r25, r26 }
+	{ andi r5, r6, 5 ; slte_u r15, r16, r17 ; lh r25, r26 }
+	{ andi r5, r6, 5 ; slti r15, r16, 5 ; sb r25, r26 }
+	{ andi r5, r6, 5 ; sne r15, r16, r17 ; lh r25, r26 }
+	{ andi r5, r6, 5 ; srab r15, r16, r17 }
+	{ andi r5, r6, 5 ; sub r15, r16, r17 ; sb r25, r26 }
+	{ andi r5, r6, 5 ; sw r25, r26 ; mz r15, r16, r17 }
+	{ andi r5, r6, 5 ; sw r25, r26 ; slti r15, r16, 5 }
+	{ andi r5, r6, 5 ; xor r15, r16, r17 }
+	{ auli r15, r16, 0x1234 ; bitx r5, r6 }
+	{ auli r15, r16, 0x1234 ; minib_u r5, r6, 5 }
+	{ auli r15, r16, 0x1234 ; mulhl_uu r5, r6, r7 }
+	{ auli r15, r16, 0x1234 ; or r5, r6, r7 }
+	{ auli r15, r16, 0x1234 ; seqh r5, r6, r7 }
+	{ auli r15, r16, 0x1234 ; slte r5, r6, r7 }
+	{ auli r15, r16, 0x1234 ; srai r5, r6, 5 }
+	{ auli r5, r6, 0x1234 ; addi r15, r16, 5 }
+	{ auli r5, r6, 0x1234 ; intlh r15, r16, r17 }
+	{ auli r5, r6, 0x1234 ; maxb_u r15, r16, r17 }
+	{ auli r5, r6, 0x1234 ; mzb r15, r16, r17 }
+	{ auli r5, r6, 0x1234 ; seqb r15, r16, r17 }
+	{ auli r5, r6, 0x1234 ; slt_u r15, r16, r17 }
+	{ auli r5, r6, 0x1234 ; sra r15, r16, r17 }
+	{ avgb_u r5, r6, r7 ; addbs_u r15, r16, r17 }
+	{ avgb_u r5, r6, r7 ; inthb r15, r16, r17 }
+	{ avgb_u r5, r6, r7 ; lw_na r15, r16 }
+	{ avgb_u r5, r6, r7 ; movelis r15, 0x1234 }
+	{ avgb_u r5, r6, r7 ; sb r15, r16 }
+	{ avgb_u r5, r6, r7 ; shrib r15, r16, 5 }
+	{ avgb_u r5, r6, r7 ; sne r15, r16, r17 }
+	{ avgb_u r5, r6, r7 ; xori r15, r16, 5 }
+	{ avgh r5, r6, r7 ; ill }
+	{ avgh r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ avgh r5, r6, r7 ; move r15, r16 }
+	{ avgh r5, r6, r7 ; s1a r15, r16, r17 }
+	{ avgh r5, r6, r7 ; shrb r15, r16, r17 }
+	{ avgh r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ avgh r5, r6, r7 ; tns r15, r16 }
+	{ bitx r5, r6 ; addi r15, r16, 5 ; lh r25, r26 }
+	{ bitx r5, r6 ; and r15, r16, r17 ; sh r25, r26 }
+	{ bitx r5, r6 ; fnop ; lh_u r25, r26 }
+	{ bitx r5, r6 ; info 19 ; lh r25, r26 }
+	{ bitx r5, r6 ; lb r25, r26 ; add r15, r16, r17 }
+	{ bitx r5, r6 ; lb r25, r26 ; seq r15, r16, r17 }
+	{ bitx r5, r6 ; lb_u r25, r26 ; addi r15, r16, 5 }
+	{ bitx r5, r6 ; lb_u r25, r26 ; seqi r15, r16, 5 }
+	{ bitx r5, r6 ; lh r25, r26 ; add r15, r16, r17 }
+	{ bitx r5, r6 ; lh r25, r26 ; seq r15, r16, r17 }
+	{ bitx r5, r6 ; lh_u r25, r26 ; addi r15, r16, 5 }
+	{ bitx r5, r6 ; lh_u r25, r26 ; seqi r15, r16, 5 }
+	{ bitx r5, r6 ; lw r15, r16 }
+	{ bitx r5, r6 ; lw r25, r26 ; s3a r15, r16, r17 }
+	{ bitx r5, r6 ; lwadd r15, r16, 5 }
+	{ bitx r5, r6 ; mnz r15, r16, r17 ; sh r25, r26 }
+	{ bitx r5, r6 ; movei r15, 5 ; prefetch r25 }
+	{ bitx r5, r6 ; nop ; lb r25, r26 }
+	{ bitx r5, r6 ; or r15, r16, r17 ; lb r25, r26 }
+	{ bitx r5, r6 ; packbs_u r15, r16, r17 }
+	{ bitx r5, r6 ; prefetch r25 ; rl r15, r16, r17 }
+	{ bitx r5, r6 ; prefetch r25 ; sub r15, r16, r17 }
+	{ bitx r5, r6 ; rli r15, r16, 5 ; sb r25, r26 }
+	{ bitx r5, r6 ; s2a r15, r16, r17 ; sb r25, r26 }
+	{ bitx r5, r6 ; sb r25, r26 ; ill }
+	{ bitx r5, r6 ; sb r25, r26 ; shri r15, r16, 5 }
+	{ bitx r5, r6 ; seq r15, r16, r17 ; sb r25, r26 }
+	{ bitx r5, r6 ; sh r25, r26 ; addi r15, r16, 5 }
+	{ bitx r5, r6 ; sh r25, r26 ; seqi r15, r16, 5 }
+	{ bitx r5, r6 ; shl r15, r16, r17 ; lh r25, r26 }
+	{ bitx r5, r6 ; shlib r15, r16, 5 }
+	{ bitx r5, r6 ; shri r15, r16, 5 ; sb r25, r26 }
+	{ bitx r5, r6 ; slt_u r15, r16, r17 ; lw r25, r26 }
+	{ bitx r5, r6 ; slte_u r15, r16, r17 ; lh r25, r26 }
+	{ bitx r5, r6 ; slti r15, r16, 5 ; sb r25, r26 }
+	{ bitx r5, r6 ; sne r15, r16, r17 ; lh r25, r26 }
+	{ bitx r5, r6 ; srab r15, r16, r17 }
+	{ bitx r5, r6 ; sub r15, r16, r17 ; sb r25, r26 }
+	{ bitx r5, r6 ; sw r25, r26 ; mz r15, r16, r17 }
+	{ bitx r5, r6 ; sw r25, r26 ; slti r15, r16, 5 }
+	{ bitx r5, r6 ; xor r15, r16, r17 }
+	{ bytex r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+	{ bytex r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+	{ bytex r5, r6 ; fnop ; lw r25, r26 }
+	{ bytex r5, r6 ; info 19 ; lh_u r25, r26 }
+	{ bytex r5, r6 ; lb r25, r26 ; addi r15, r16, 5 }
+	{ bytex r5, r6 ; lb r25, r26 ; seqi r15, r16, 5 }
+	{ bytex r5, r6 ; lb_u r25, r26 ; and r15, r16, r17 }
+	{ bytex r5, r6 ; lb_u r25, r26 ; shl r15, r16, r17 }
+	{ bytex r5, r6 ; lh r25, r26 ; addi r15, r16, 5 }
+	{ bytex r5, r6 ; lh r25, r26 ; seqi r15, r16, 5 }
+	{ bytex r5, r6 ; lh_u r25, r26 ; and r15, r16, r17 }
+	{ bytex r5, r6 ; lh_u r25, r26 ; shl r15, r16, r17 }
+	{ bytex r5, r6 ; lw r25, r26 ; add r15, r16, r17 }
+	{ bytex r5, r6 ; lw r25, r26 ; seq r15, r16, r17 }
+	{ bytex r5, r6 ; lwadd_na r15, r16, 5 }
+	{ bytex r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 }
+	{ bytex r5, r6 ; movei r15, 5 ; sb r25, r26 }
+	{ bytex r5, r6 ; nop ; lb_u r25, r26 }
+	{ bytex r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 }
+	{ bytex r5, r6 ; packhb r15, r16, r17 }
+	{ bytex r5, r6 ; prefetch r25 ; rli r15, r16, 5 }
+	{ bytex r5, r6 ; prefetch r25 ; xor r15, r16, r17 }
+	{ bytex r5, r6 ; rli r15, r16, 5 ; sh r25, r26 }
+	{ bytex r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 }
+	{ bytex r5, r6 ; sb r25, r26 ; info 19 }
+	{ bytex r5, r6 ; sb r25, r26 ; slt r15, r16, r17 }
+	{ bytex r5, r6 ; seq r15, r16, r17 ; sh r25, r26 }
+	{ bytex r5, r6 ; sh r25, r26 ; and r15, r16, r17 }
+	{ bytex r5, r6 ; sh r25, r26 ; shl r15, r16, r17 }
+	{ bytex r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+	{ bytex r5, r6 ; shlih r15, r16, 5 }
+	{ bytex r5, r6 ; shri r15, r16, 5 ; sh r25, r26 }
+	{ bytex r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 }
+	{ bytex r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+	{ bytex r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+	{ bytex r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 }
+	{ bytex r5, r6 ; srah r15, r16, r17 }
+	{ bytex r5, r6 ; sub r15, r16, r17 ; sh r25, r26 }
+	{ bytex r5, r6 ; sw r25, r26 ; nop }
+	{ bytex r5, r6 ; sw r25, r26 ; slti_u r15, r16, 5 }
+	{ bytex r5, r6 ; xori r15, r16, 5 }
+	{ clz r5, r6 ; addi r15, r16, 5 ; prefetch r25 }
+	{ clz r5, r6 ; andi r15, r16, 5 ; lb r25, r26 }
+	{ clz r5, r6 ; fnop ; sb r25, r26 }
+	{ clz r5, r6 ; info 19 ; prefetch r25 }
+	{ clz r5, r6 ; lb r25, r26 ; andi r15, r16, 5 }
+	{ clz r5, r6 ; lb r25, r26 ; shli r15, r16, 5 }
+	{ clz r5, r6 ; lb_u r25, r26 ; fnop }
+	{ clz r5, r6 ; lb_u r25, r26 ; shr r15, r16, r17 }
+	{ clz r5, r6 ; lh r25, r26 ; andi r15, r16, 5 }
+	{ clz r5, r6 ; lh r25, r26 ; shli r15, r16, 5 }
+	{ clz r5, r6 ; lh_u r25, r26 ; fnop }
+	{ clz r5, r6 ; lh_u r25, r26 ; shr r15, r16, r17 }
+	{ clz r5, r6 ; lw r25, r26 ; and r15, r16, r17 }
+	{ clz r5, r6 ; lw r25, r26 ; shl r15, r16, r17 }
+	{ clz r5, r6 ; maxh r15, r16, r17 }
+	{ clz r5, r6 ; mnzb r15, r16, r17 }
+	{ clz r5, r6 ; movei r15, 5 ; sw r25, r26 }
+	{ clz r5, r6 ; nop ; lh_u r25, r26 }
+	{ clz r5, r6 ; or r15, r16, r17 ; lh_u r25, r26 }
+	{ clz r5, r6 ; packlb r15, r16, r17 }
+	{ clz r5, r6 ; prefetch r25 ; s2a r15, r16, r17 }
+	{ clz r5, r6 ; raise }
+	{ clz r5, r6 ; rli r15, r16, 5 }
+	{ clz r5, r6 ; s2a r15, r16, r17 }
+	{ clz r5, r6 ; sb r25, r26 ; move r15, r16 }
+	{ clz r5, r6 ; sb r25, r26 ; slte r15, r16, r17 }
+	{ clz r5, r6 ; seq r15, r16, r17 }
+	{ clz r5, r6 ; sh r25, r26 ; fnop }
+	{ clz r5, r6 ; sh r25, r26 ; shr r15, r16, r17 }
+	{ clz r5, r6 ; shl r15, r16, r17 ; prefetch r25 }
+	{ clz r5, r6 ; shr r15, r16, r17 ; lb_u r25, r26 }
+	{ clz r5, r6 ; shri r15, r16, 5 }
+	{ clz r5, r6 ; slt_u r15, r16, r17 ; sh r25, r26 }
+	{ clz r5, r6 ; slte_u r15, r16, r17 ; prefetch r25 }
+	{ clz r5, r6 ; slti r15, r16, 5 }
+	{ clz r5, r6 ; sne r15, r16, r17 ; prefetch r25 }
+	{ clz r5, r6 ; srai r15, r16, 5 ; lb_u r25, r26 }
+	{ clz r5, r6 ; sub r15, r16, r17 }
+	{ clz r5, r6 ; sw r25, r26 ; or r15, r16, r17 }
+	{ clz r5, r6 ; sw r25, r26 ; sra r15, r16, r17 }
+	{ crc32_32 r5, r6, r7 ; addb r15, r16, r17 }
+	{ crc32_32 r5, r6, r7 ; infol 0x1234 }
+	{ crc32_32 r5, r6, r7 ; lw r15, r16 }
+	{ crc32_32 r5, r6, r7 ; moveli r15, 0x1234 }
+	{ crc32_32 r5, r6, r7 ; s3a r15, r16, r17 }
+	{ crc32_32 r5, r6, r7 ; shri r15, r16, 5 }
+	{ crc32_32 r5, r6, r7 ; sltih_u r15, r16, 5 }
+	{ crc32_32 r5, r6, r7 ; xor r15, r16, r17 }
+	{ crc32_8 r5, r6, r7 ; icoh r15 }
+	{ crc32_8 r5, r6, r7 ; lhadd r15, r16, 5 }
+	{ crc32_8 r5, r6, r7 ; mnzh r15, r16, r17 }
+	{ crc32_8 r5, r6, r7 ; rli r15, r16, 5 }
+	{ crc32_8 r5, r6, r7 ; shr r15, r16, r17 }
+	{ crc32_8 r5, r6, r7 ; sltib r15, r16, 5 }
+	{ crc32_8 r5, r6, r7 ; swadd r15, r16, 5 }
+	{ ctz r5, r6 ; addi r15, r16, 5 ; lb_u r25, r26 }
+	{ ctz r5, r6 ; and r15, r16, r17 ; sb r25, r26 }
+	{ ctz r5, r6 ; fnop ; lh r25, r26 }
+	{ ctz r5, r6 ; info 19 ; lb_u r25, r26 }
+	{ ctz r5, r6 ; lb r15, r16 }
+	{ ctz r5, r6 ; lb r25, r26 ; s3a r15, r16, r17 }
+	{ ctz r5, r6 ; lb_u r25, r26 ; add r15, r16, r17 }
+	{ ctz r5, r6 ; lb_u r25, r26 ; seq r15, r16, r17 }
+	{ ctz r5, r6 ; lh r15, r16 }
+	{ ctz r5, r6 ; lh r25, r26 ; s3a r15, r16, r17 }
+	{ ctz r5, r6 ; lh_u r25, r26 ; add r15, r16, r17 }
+	{ ctz r5, r6 ; lh_u r25, r26 ; seq r15, r16, r17 }
+	{ ctz r5, r6 ; lnk r15 }
+	{ ctz r5, r6 ; lw r25, r26 ; s2a r15, r16, r17 }
+	{ ctz r5, r6 ; lw_na r15, r16 }
+	{ ctz r5, r6 ; mnz r15, r16, r17 ; sb r25, r26 }
+	{ ctz r5, r6 ; movei r15, 5 ; lw r25, r26 }
+	{ ctz r5, r6 ; mzh r15, r16, r17 }
+	{ ctz r5, r6 ; nor r15, r16, r17 }
+	{ ctz r5, r6 ; ori r15, r16, 5 }
+	{ ctz r5, r6 ; prefetch r25 ; ori r15, r16, 5 }
+	{ ctz r5, r6 ; prefetch r25 ; srai r15, r16, 5 }
+	{ ctz r5, r6 ; rli r15, r16, 5 ; prefetch r25 }
+	{ ctz r5, r6 ; s2a r15, r16, r17 ; prefetch r25 }
+	{ ctz r5, r6 ; sb r25, r26 ; fnop }
+	{ ctz r5, r6 ; sb r25, r26 ; shr r15, r16, r17 }
+	{ ctz r5, r6 ; seq r15, r16, r17 ; prefetch r25 }
+	{ ctz r5, r6 ; sh r25, r26 ; add r15, r16, r17 }
+	{ ctz r5, r6 ; sh r25, r26 ; seq r15, r16, r17 }
+	{ ctz r5, r6 ; shl r15, r16, r17 ; lb_u r25, r26 }
+	{ ctz r5, r6 ; shli r15, r16, 5 }
+	{ ctz r5, r6 ; shri r15, r16, 5 ; prefetch r25 }
+	{ ctz r5, r6 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+	{ ctz r5, r6 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+	{ ctz r5, r6 ; slti r15, r16, 5 ; prefetch r25 }
+	{ ctz r5, r6 ; sne r15, r16, r17 ; lb_u r25, r26 }
+	{ ctz r5, r6 ; sra r15, r16, r17 }
+	{ ctz r5, r6 ; sub r15, r16, r17 ; prefetch r25 }
+	{ ctz r5, r6 ; sw r25, r26 ; movei r15, 5 }
+	{ ctz r5, r6 ; sw r25, r26 ; slte_u r15, r16, r17 }
+	{ ctz r5, r6 ; xor r15, r16, r17 ; sw r25, r26 }
+	{ dtlbpr r15 ; avgb_u r5, r6, r7 }
+	{ dtlbpr r15 ; minb_u r5, r6, r7 }
+	{ dtlbpr r15 ; mulhl_su r5, r6, r7 }
+	{ dtlbpr r15 ; nop }
+	{ dtlbpr r15 ; seq r5, r6, r7 }
+	{ dtlbpr r15 ; sltb r5, r6, r7 }
+	{ dtlbpr r15 ; srab r5, r6, r7 }
+	{ dword_align r5, r6, r7 ; addh r15, r16, r17 }
+	{ dword_align r5, r6, r7 ; inthh r15, r16, r17 }
+	{ dword_align r5, r6, r7 ; lwadd r15, r16, 5 }
+	{ dword_align r5, r6, r7 ; mtspr 0x5, r16 }
+	{ dword_align r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ dword_align r5, r6, r7 ; shrih r15, r16, 5 }
+	{ dword_align r5, r6, r7 ; sneb r15, r16, r17 }
+	{ finv r15 ; add r5, r6, r7 }
+	{ finv r15 ; clz r5, r6 }
+	{ finv r15 ; mm r5, r6, r7, 5, 7 }
+	{ finv r15 ; mulhla_su r5, r6, r7 }
+	{ finv r15 ; packbs_u r5, r6, r7 }
+	{ finv r15 ; seqib r5, r6, 5 }
+	{ finv r15 ; slteb r5, r6, r7 }
+	{ finv r15 ; sraih r5, r6, 5 }
+	{ flush r15 ; addih r5, r6, 5 }
+	{ flush r15 ; infol 0x1234 }
+	{ flush r15 ; movelis r5, 0x1234 }
+	{ flush r15 ; mullla_ss r5, r6, r7 }
+	{ flush r15 ; s1a r5, r6, r7 }
+	{ flush r15 ; shlih r5, r6, 5 }
+	{ flush r15 ; slti_u r5, r6, 5 }
+	{ flush r15 ; tblidxb0 r5, r6 }
+	{ fnop ; add r5, r6, r7 ; lw r25, r26 }
+	{ fnop ; addi r15, r16, 5 ; sb r25, r26 }
+	{ fnop ; addlis r15, r16, 0x1234 }
+	{ fnop ; and r5, r6, r7 ; lw r25, r26 }
+	{ fnop ; andi r5, r6, 5 ; lw r25, r26 }
+	{ fnop ; bytex r5, r6 ; lb r25, r26 }
+	{ fnop ; crc32_32 r5, r6, r7 }
+	{ fnop ; fnop ; lw r25, r26 }
+	{ fnop ; info 19 ; lh_u r25, r26 }
+	{ fnop ; jr r15 }
+	{ fnop ; lb r25, r26 ; move r15, r16 }
+	{ fnop ; lb r25, r26 ; or r15, r16, r17 }
+	{ fnop ; lb r25, r26 ; shl r5, r6, r7 }
+	{ fnop ; lb r25, r26 ; sne r5, r6, r7 }
+	{ fnop ; lb_u r25, r26 ; and r5, r6, r7 }
+	{ fnop ; lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ fnop ; lb_u r25, r26 ; rli r5, r6, 5 }
+	{ fnop ; lb_u r25, r26 ; slt r5, r6, r7 }
+	{ fnop ; lb_u r25, r26 ; tblidxb1 r5, r6 }
+	{ fnop ; lh r25, r26 ; ctz r5, r6 }
+	{ fnop ; lh r25, r26 ; mvz r5, r6, r7 }
+	{ fnop ; lh r25, r26 ; s3a r5, r6, r7 }
+	{ fnop ; lh r25, r26 ; slte_u r5, r6, r7 }
+	{ fnop ; lh_u r15, r16 }
+	{ fnop ; lh_u r25, r26 ; movei r15, 5 }
+	{ fnop ; lh_u r25, r26 ; ori r15, r16, 5 }
+	{ fnop ; lh_u r25, r26 ; shli r5, r6, 5 }
+	{ fnop ; lh_u r25, r26 ; sra r5, r6, r7 }
+	{ fnop ; lw r25, r26 ; and r15, r16, r17 }
+	{ fnop ; lw r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ fnop ; lw r25, r26 ; rli r15, r16, 5 }
+	{ fnop ; lw r25, r26 ; slt r15, r16, r17 }
+	{ fnop ; lw r25, r26 ; tblidxb0 r5, r6 }
+	{ fnop ; minb_u r15, r16, r17 }
+	{ fnop ; mnz r5, r6, r7 ; lb r25, r26 }
+	{ fnop ; move r15, r16 ; sb r25, r26 }
+	{ fnop ; movei r15, 5 ; sb r25, r26 }
+	{ fnop ; mulhh_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ fnop ; mulhha_ss r5, r6, r7 ; lb r25, r26 }
+	{ fnop ; mulhha_uu r5, r6, r7 }
+	{ fnop ; mulll_ss r5, r6, r7 ; lb r25, r26 }
+	{ fnop ; mulll_uu r5, r6, r7 }
+	{ fnop ; mullla_uu r5, r6, r7 ; sw r25, r26 }
+	{ fnop ; mvz r5, r6, r7 ; sh r25, r26 }
+	{ fnop ; mz r5, r6, r7 ; sh r25, r26 }
+	{ fnop ; nor r15, r16, r17 ; lh_u r25, r26 }
+	{ fnop ; or r15, r16, r17 ; lh_u r25, r26 }
+	{ fnop ; ori r15, r16, 5 ; lh_u r25, r26 }
+	{ fnop ; packhb r5, r6, r7 }
+	{ fnop ; prefetch r25 ; and r15, r16, r17 }
+	{ fnop ; prefetch r25 ; mulhha_uu r5, r6, r7 }
+	{ fnop ; prefetch r25 ; rli r15, r16, 5 }
+	{ fnop ; prefetch r25 ; slt r15, r16, r17 }
+	{ fnop ; prefetch r25 ; tblidxb0 r5, r6 }
+	{ fnop ; rl r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; rli r5, r6, 5 ; lh r25, r26 }
+	{ fnop ; s1a r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; s2a r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; s3a r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; sb r25, r26 ; and r5, r6, r7 }
+	{ fnop ; sb r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ fnop ; sb r25, r26 ; rli r5, r6, 5 }
+	{ fnop ; sb r25, r26 ; slt r5, r6, r7 }
+	{ fnop ; sb r25, r26 ; tblidxb1 r5, r6 }
+	{ fnop ; seq r5, r6, r7 ; lh_u r25, r26 }
+	{ fnop ; seqi r15, r16, 5 }
+	{ fnop ; sh r25, r26 ; and r15, r16, r17 }
+	{ fnop ; sh r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ fnop ; sh r25, r26 ; rli r15, r16, 5 }
+	{ fnop ; sh r25, r26 ; slt r15, r16, r17 }
+	{ fnop ; sh r25, r26 ; tblidxb0 r5, r6 }
+	{ fnop ; shl r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; shli r15, r16, 5 ; sw r25, r26 }
+	{ fnop ; shr r15, r16, r17 ; lw r25, r26 }
+	{ fnop ; shri r15, r16, 5 ; lb r25, r26 }
+	{ fnop ; shrib r15, r16, 5 }
+	{ fnop ; slt r5, r6, r7 ; sb r25, r26 }
+	{ fnop ; slt_u r5, r6, r7 ; sb r25, r26 }
+	{ fnop ; slte r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; slte_u r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; slti r15, r16, 5 ; lb r25, r26 }
+	{ fnop ; slti_u r15, r16, 5 ; lb r25, r26 }
+	{ fnop ; sltib r15, r16, 5 }
+	{ fnop ; sne r5, r6, r7 ; lh r25, r26 }
+	{ fnop ; sra r15, r16, r17 ; sw r25, r26 }
+	{ fnop ; srai r15, r16, 5 ; lw r25, r26 }
+	{ fnop ; sub r15, r16, r17 ; lb r25, r26 }
+	{ fnop ; subb r15, r16, r17 }
+	{ fnop ; sw r25, r26 ; bytex r5, r6 }
+	{ fnop ; sw r25, r26 ; mullla_uu r5, r6, r7 }
+	{ fnop ; sw r25, r26 ; s2a r5, r6, r7 }
+	{ fnop ; sw r25, r26 ; slte r5, r6, r7 }
+	{ fnop ; sw r25, r26 ; xor r5, r6, r7 }
+	{ fnop ; tblidxb1 r5, r6 ; sh r25, r26 }
+	{ fnop ; tblidxb3 r5, r6 ; sh r25, r26 }
+	{ fnop ; xor r5, r6, r7 ; prefetch r25 }
+	{ icoh r15 ; and r5, r6, r7 }
+	{ icoh r15 ; maxh r5, r6, r7 }
+	{ icoh r15 ; mulhha_uu r5, r6, r7 }
+	{ icoh r15 ; mz r5, r6, r7 }
+	{ icoh r15 ; sadb_u r5, r6, r7 }
+	{ icoh r15 ; shrih r5, r6, 5 }
+	{ icoh r15 ; sneb r5, r6, r7 }
+	{ ill ; add r5, r6, r7 ; lb r25, r26 }
+	{ ill ; addi r5, r6, 5 ; sb r25, r26 }
+	{ ill ; and r5, r6, r7 }
+	{ ill ; bitx r5, r6 ; sb r25, r26 }
+	{ ill ; clz r5, r6 ; sb r25, r26 }
+	{ ill ; fnop ; lh_u r25, r26 }
+	{ ill ; intlb r5, r6, r7 }
+	{ ill ; lb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ ill ; lb r25, r26 ; shli r5, r6, 5 }
+	{ ill ; lb_u r25, r26 ; addi r5, r6, 5 }
+	{ ill ; lb_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ ill ; lb_u r25, r26 ; slt r5, r6, r7 }
+	{ ill ; lh r25, r26 ; bitx r5, r6 }
+	{ ill ; lh r25, r26 ; mz r5, r6, r7 }
+	{ ill ; lh r25, r26 ; slte_u r5, r6, r7 }
+	{ ill ; lh_u r25, r26 ; ctz r5, r6 }
+	{ ill ; lh_u r25, r26 ; or r5, r6, r7 }
+	{ ill ; lh_u r25, r26 ; sne r5, r6, r7 }
+	{ ill ; lw r25, r26 ; mnz r5, r6, r7 }
+	{ ill ; lw r25, r26 ; rl r5, r6, r7 }
+	{ ill ; lw r25, r26 ; sub r5, r6, r7 }
+	{ ill ; mnz r5, r6, r7 ; lw r25, r26 }
+	{ ill ; movei r5, 5 ; lh r25, r26 }
+	{ ill ; mulhh_su r5, r6, r7 }
+	{ ill ; mulhha_ss r5, r6, r7 }
+	{ ill ; mulhla_uu r5, r6, r7 }
+	{ ill ; mulll_ss r5, r6, r7 }
+	{ ill ; mullla_ss r5, r6, r7 ; sw r25, r26 }
+	{ ill ; mvnz r5, r6, r7 ; sb r25, r26 }
+	{ ill ; mz r5, r6, r7 ; sb r25, r26 }
+	{ ill ; nor r5, r6, r7 ; lw r25, r26 }
+	{ ill ; ori r5, r6, 5 ; lw r25, r26 }
+	{ ill ; prefetch r25 ; add r5, r6, r7 }
+	{ ill ; prefetch r25 ; mullla_ss r5, r6, r7 }
+	{ ill ; prefetch r25 ; shri r5, r6, 5 }
+	{ ill ; rl r5, r6, r7 ; lh_u r25, r26 }
+	{ ill ; s1a r5, r6, r7 ; lh_u r25, r26 }
+	{ ill ; s3a r5, r6, r7 ; lh_u r25, r26 }
+	{ ill ; sb r25, r26 ; ctz r5, r6 }
+	{ ill ; sb r25, r26 ; or r5, r6, r7 }
+	{ ill ; sb r25, r26 ; sne r5, r6, r7 }
+	{ ill ; seqb r5, r6, r7 }
+	{ ill ; sh r25, r26 ; clz r5, r6 }
+	{ ill ; sh r25, r26 ; nor r5, r6, r7 }
+	{ ill ; sh r25, r26 ; slti_u r5, r6, 5 }
+	{ ill ; shl r5, r6, r7 }
+	{ ill ; shr r5, r6, r7 ; prefetch r25 }
+	{ ill ; slt r5, r6, r7 ; lb_u r25, r26 }
+	{ ill ; sltb_u r5, r6, r7 }
+	{ ill ; slte_u r5, r6, r7 }
+	{ ill ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+	{ ill ; sne r5, r6, r7 }
+	{ ill ; srai r5, r6, 5 ; prefetch r25 }
+	{ ill ; subhs r5, r6, r7 }
+	{ ill ; sw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ ill ; sw r25, r26 ; shli r5, r6, 5 }
+	{ ill ; tblidxb0 r5, r6 ; lb_u r25, r26 }
+	{ ill ; tblidxb2 r5, r6 ; lb_u r25, r26 }
+	{ ill ; xor r5, r6, r7 ; lb_u r25, r26 }
+	{ info 19 ; add r5, r6, r7 ; lb r25, r26 }
+	{ info 19 ; addi r15, r16, 5 ; lh r25, r26 }
+	{ info 19 ; addih r15, r16, 5 }
+	{ info 19 ; and r5, r6, r7 ; lb r25, r26 }
+	{ info 19 ; andi r5, r6, 5 ; lb r25, r26 }
+	{ info 19 ; bitx r5, r6 ; sb r25, r26 }
+	{ info 19 ; clz r5, r6 ; sb r25, r26 }
+	{ info 19 ; fnop ; lb r25, r26 }
+	{ info 19 ; ill }
+	{ info 19 ; inv r15 }
+	{ info 19 ; lb r25, r26 ; ill }
+	{ info 19 ; lb r25, r26 ; mz r5, r6, r7 }
+	{ info 19 ; lb r25, r26 ; seq r5, r6, r7 }
+	{ info 19 ; lb r25, r26 ; slti r5, r6, 5 }
+	{ info 19 ; lb_u r25, r26 ; add r5, r6, r7 }
+	{ info 19 ; lb_u r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ info 19 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ info 19 ; lb_u r25, r26 ; shr r5, r6, r7 }
+	{ info 19 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ info 19 ; lh r25, r26 ; andi r5, r6, 5 }
+	{ info 19 ; lh r25, r26 ; mulll_uu r5, r6, r7 }
+	{ info 19 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ info 19 ; lh r25, r26 ; slt_u r5, r6, r7 }
+	{ info 19 ; lh r25, r26 ; tblidxb3 r5, r6 }
+	{ info 19 ; lh_u r25, r26 ; mnz r15, r16, r17 }
+	{ info 19 ; lh_u r25, r26 ; nor r15, r16, r17 }
+	{ info 19 ; lh_u r25, r26 ; seqi r5, r6, 5 }
+	{ info 19 ; lh_u r25, r26 ; slti_u r5, r6, 5 }
+	{ info 19 ; lw r25, r26 ; add r15, r16, r17 }
+	{ info 19 ; lw r25, r26 ; movei r5, 5 }
+	{ info 19 ; lw r25, r26 ; ori r5, r6, 5 }
+	{ info 19 ; lw r25, r26 ; shr r15, r16, r17 }
+	{ info 19 ; lw r25, r26 ; srai r15, r16, 5 }
+	{ info 19 ; maxih r15, r16, 5 }
+	{ info 19 ; mnz r15, r16, r17 ; sb r25, r26 }
+	{ info 19 ; move r15, r16 ; lh r25, r26 }
+	{ info 19 ; movei r15, 5 ; lh r25, r26 }
+	{ info 19 ; movelis r15, 0x1234 }
+	{ info 19 ; mulhh_uu r5, r6, r7 ; sb r25, r26 }
+	{ info 19 ; mulhha_uu r5, r6, r7 ; prefetch r25 }
+	{ info 19 ; mulhlsa_uu r5, r6, r7 ; sb r25, r26 }
+	{ info 19 ; mulll_uu r5, r6, r7 ; prefetch r25 }
+	{ info 19 ; mullla_uu r5, r6, r7 ; lw r25, r26 }
+	{ info 19 ; mvz r5, r6, r7 ; lh_u r25, r26 }
+	{ info 19 ; mz r5, r6, r7 ; lh_u r25, r26 }
+	{ info 19 ; nop }
+	{ info 19 ; nor r5, r6, r7 }
+	{ info 19 ; or r5, r6, r7 }
+	{ info 19 ; ori r5, r6, 5 }
+	{ info 19 ; prefetch r25 ; add r15, r16, r17 }
+	{ info 19 ; prefetch r25 ; movei r5, 5 }
+	{ info 19 ; prefetch r25 ; ori r5, r6, 5 }
+	{ info 19 ; prefetch r25 ; shr r15, r16, r17 }
+	{ info 19 ; prefetch r25 ; srai r15, r16, 5 }
+	{ info 19 ; rl r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ info 19 ; s1a r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; s3a r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; sb r25, r26 ; add r5, r6, r7 }
+	{ info 19 ; sb r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ info 19 ; sb r25, r26 ; pcnt r5, r6 }
+	{ info 19 ; sb r25, r26 ; shr r5, r6, r7 }
+	{ info 19 ; sb r25, r26 ; srai r5, r6, 5 }
+	{ info 19 ; seq r15, r16, r17 }
+	{ info 19 ; seqi r15, r16, 5 ; prefetch r25 }
+	{ info 19 ; sh r25, r26 ; add r15, r16, r17 }
+	{ info 19 ; sh r25, r26 ; movei r5, 5 }
+	{ info 19 ; sh r25, r26 ; ori r5, r6, 5 }
+	{ info 19 ; sh r25, r26 ; shr r15, r16, r17 }
+	{ info 19 ; sh r25, r26 ; srai r15, r16, 5 }
+	{ info 19 ; shl r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ info 19 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ info 19 ; shrb r15, r16, r17 }
+	{ info 19 ; shri r5, r6, 5 ; sb r25, r26 }
+	{ info 19 ; slt r5, r6, r7 ; lh r25, r26 }
+	{ info 19 ; slt_u r5, r6, r7 ; lh r25, r26 }
+	{ info 19 ; slte r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; slte_u r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; slth r15, r16, r17 }
+	{ info 19 ; slti r5, r6, 5 ; sb r25, r26 }
+	{ info 19 ; slti_u r5, r6, 5 ; sb r25, r26 }
+	{ info 19 ; sne r15, r16, r17 ; sw r25, r26 }
+	{ info 19 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ info 19 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ info 19 ; sraib r15, r16, 5 }
+	{ info 19 ; sub r5, r6, r7 ; sb r25, r26 }
+	{ info 19 ; sw r25, r26 ; and r5, r6, r7 }
+	{ info 19 ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ info 19 ; sw r25, r26 ; rli r5, r6, 5 }
+	{ info 19 ; sw r25, r26 ; slt r5, r6, r7 }
+	{ info 19 ; sw r25, r26 ; tblidxb1 r5, r6 }
+	{ info 19 ; tblidxb1 r5, r6 ; lh_u r25, r26 }
+	{ info 19 ; tblidxb3 r5, r6 ; lh_u r25, r26 }
+	{ info 19 ; xor r5, r6, r7 ; lb_u r25, r26 }
+	{ infol 0x1234 ; addhs r5, r6, r7 }
+	{ infol 0x1234 ; auli r5, r6, 0x1234 }
+	{ infol 0x1234 ; inthh r15, r16, r17 }
+	{ infol 0x1234 ; lnk r15 }
+	{ infol 0x1234 ; minib_u r5, r6, 5 }
+	{ infol 0x1234 ; mulhh_ss r5, r6, r7 }
+	{ infol 0x1234 ; mullla_su r5, r6, r7 }
+	{ infol 0x1234 ; packhb r15, r16, r17 }
+	{ infol 0x1234 ; sadah r5, r6, r7 }
+	{ infol 0x1234 ; shadd r15, r16, 5 }
+	{ infol 0x1234 ; shri r5, r6, 5 }
+	{ infol 0x1234 ; slteb_u r5, r6, r7 }
+	{ infol 0x1234 ; sltih_u r5, r6, 5 }
+	{ infol 0x1234 ; sub r5, r6, r7 }
+	{ infol 0x1234 ; xor r5, r6, r7 }
+	{ inthb r15, r16, r17 ; avgh r5, r6, r7 }
+	{ inthb r15, r16, r17 ; minh r5, r6, r7 }
+	{ inthb r15, r16, r17 ; mulhl_us r5, r6, r7 }
+	{ inthb r15, r16, r17 ; nor r5, r6, r7 }
+	{ inthb r15, r16, r17 ; seqb r5, r6, r7 }
+	{ inthb r15, r16, r17 ; sltb_u r5, r6, r7 }
+	{ inthb r15, r16, r17 ; srah r5, r6, r7 }
+	{ inthb r5, r6, r7 ; addhs r15, r16, r17 }
+	{ inthb r5, r6, r7 ; intlb r15, r16, r17 }
+	{ inthb r5, r6, r7 ; lwadd_na r15, r16, 5 }
+	{ inthb r5, r6, r7 ; mz r15, r16, r17 }
+	{ inthb r5, r6, r7 ; seq r15, r16, r17 }
+	{ inthb r5, r6, r7 ; slt r15, r16, r17 }
+	{ inthb r5, r6, r7 ; sneh r15, r16, r17 }
+	{ inthh r15, r16, r17 ; addb r5, r6, r7 }
+	{ inthh r15, r16, r17 ; crc32_32 r5, r6, r7 }
+	{ inthh r15, r16, r17 ; mnz r5, r6, r7 }
+	{ inthh r15, r16, r17 ; mulhla_us r5, r6, r7 }
+	{ inthh r15, r16, r17 ; packhb r5, r6, r7 }
+	{ inthh r15, r16, r17 ; seqih r5, r6, 5 }
+	{ inthh r15, r16, r17 ; slteb_u r5, r6, r7 }
+	{ inthh r15, r16, r17 ; sub r5, r6, r7 }
+	{ inthh r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ inthh r5, r6, r7 ; jalr r15 }
+	{ inthh r5, r6, r7 ; maxih r15, r16, 5 }
+	{ inthh r5, r6, r7 ; nor r15, r16, r17 }
+	{ inthh r5, r6, r7 ; seqib r15, r16, 5 }
+	{ inthh r5, r6, r7 ; slte r15, r16, r17 }
+	{ inthh r5, r6, r7 ; srai r15, r16, 5 }
+	{ intlb r15, r16, r17 ; addi r5, r6, 5 }
+	{ intlb r15, r16, r17 ; fnop }
+	{ intlb r15, r16, r17 ; movei r5, 5 }
+	{ intlb r15, r16, r17 ; mulll_su r5, r6, r7 }
+	{ intlb r15, r16, r17 ; rl r5, r6, r7 }
+	{ intlb r15, r16, r17 ; shli r5, r6, 5 }
+	{ intlb r15, r16, r17 ; slth_u r5, r6, r7 }
+	{ intlb r15, r16, r17 ; subhs r5, r6, r7 }
+	{ intlb r5, r6, r7 ; andi r15, r16, 5 }
+	{ intlb r5, r6, r7 ; lb r15, r16 }
+	{ intlb r5, r6, r7 ; minh r15, r16, r17 }
+	{ intlb r5, r6, r7 ; packhb r15, r16, r17 }
+	{ intlb r5, r6, r7 ; shl r15, r16, r17 }
+	{ intlb r5, r6, r7 ; slteh r15, r16, r17 }
+	{ intlb r5, r6, r7 ; subb r15, r16, r17 }
+	{ intlh r15, r16, r17 ; addlis r5, r6, 0x1234 }
+	{ intlh r15, r16, r17 ; inthh r5, r6, r7 }
+	{ intlh r15, r16, r17 ; mulhh_su r5, r6, r7 }
+	{ intlh r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ intlh r15, r16, r17 ; s3a r5, r6, r7 }
+	{ intlh r15, r16, r17 ; shrb r5, r6, r7 }
+	{ intlh r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ intlh r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ intlh r5, r6, r7 ; flush r15 }
+	{ intlh r5, r6, r7 ; lh r15, r16 }
+	{ intlh r5, r6, r7 ; mnz r15, r16, r17 }
+	{ intlh r5, r6, r7 ; raise }
+	{ intlh r5, r6, r7 ; shlib r15, r16, 5 }
+	{ intlh r5, r6, r7 ; slti r15, r16, 5 }
+	{ intlh r5, r6, r7 ; subs r15, r16, r17 }
+	{ inv r15 ; and r5, r6, r7 }
+	{ inv r15 ; maxh r5, r6, r7 }
+	{ inv r15 ; mulhha_uu r5, r6, r7 }
+	{ inv r15 ; mz r5, r6, r7 }
+	{ inv r15 ; sadb_u r5, r6, r7 }
+	{ inv r15 ; shrih r5, r6, 5 }
+	{ inv r15 ; sneb r5, r6, r7 }
+	{ iret ; add r5, r6, r7 }
+	{ iret ; clz r5, r6 }
+	{ iret ; mm r5, r6, r7, 5, 7 }
+	{ iret ; mulhla_su r5, r6, r7 }
+	{ iret ; packbs_u r5, r6, r7 }
+	{ iret ; seqib r5, r6, 5 }
+	{ iret ; slteb r5, r6, r7 }
+	{ iret ; sraih r5, r6, 5 }
+	{ jalr r15 ; addih r5, r6, 5 }
+	{ jalr r15 ; infol 0x1234 }
+	{ jalr r15 ; movelis r5, 0x1234 }
+	{ jalr r15 ; mullla_ss r5, r6, r7 }
+	{ jalr r15 ; s1a r5, r6, r7 }
+	{ jalr r15 ; shlih r5, r6, 5 }
+	{ jalr r15 ; slti_u r5, r6, 5 }
+	{ jalr r15 ; tblidxb0 r5, r6 }
+	{ jalrp r15 ; andi r5, r6, 5 }
+	{ jalrp r15 ; maxib_u r5, r6, 5 }
+	{ jalrp r15 ; mulhhsa_uu r5, r6, r7 }
+	{ jalrp r15 ; mzb r5, r6, r7 }
+	{ jalrp r15 ; sadh r5, r6, r7 }
+	{ jalrp r15 ; slt r5, r6, r7 }
+	{ jalrp r15 ; sneh r5, r6, r7 }
+	{ jr r15 ; addb r5, r6, r7 }
+	{ jr r15 ; crc32_32 r5, r6, r7 }
+	{ jr r15 ; mnz r5, r6, r7 }
+	{ jr r15 ; mulhla_us r5, r6, r7 }
+	{ jr r15 ; packhb r5, r6, r7 }
+	{ jr r15 ; seqih r5, r6, 5 }
+	{ jr r15 ; slteb_u r5, r6, r7 }
+	{ jr r15 ; sub r5, r6, r7 }
+	{ jrp r15 ; addli r5, r6, 0x1234 }
+	{ jrp r15 ; inthb r5, r6, r7 }
+	{ jrp r15 ; mulhh_ss r5, r6, r7 }
+	{ jrp r15 ; mullla_su r5, r6, r7 }
+	{ jrp r15 ; s2a r5, r6, r7 }
+	{ jrp r15 ; shr r5, r6, r7 }
+	{ jrp r15 ; sltib r5, r6, 5 }
+	{ jrp r15 ; tblidxb1 r5, r6 }
+	{ lb r15, r16 ; auli r5, r6, 0x1234 }
+	{ lb r15, r16 ; maxih r5, r6, 5 }
+	{ lb r15, r16 ; mulhl_ss r5, r6, r7 }
+	{ lb r15, r16 ; mzh r5, r6, r7 }
+	{ lb r15, r16 ; sadh_u r5, r6, r7 }
+	{ lb r15, r16 ; slt_u r5, r6, r7 }
+	{ lb r15, r16 ; sra r5, r6, r7 }
+	{ lb r25, r26 ; add r15, r16, r17 ; and r5, r6, r7 }
+	{ lb r25, r26 ; add r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lb r25, r26 ; add r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lb r25, r26 ; add r5, r6, r7 ; ill }
+	{ lb r25, r26 ; add r5, r6, r7 ; shri r15, r16, 5 }
+	{ lb r25, r26 ; addi r15, r16, 5 ; ctz r5, r6 }
+	{ lb r25, r26 ; addi r15, r16, 5 ; or r5, r6, r7 }
+	{ lb r25, r26 ; addi r15, r16, 5 ; sne r5, r6, r7 }
+	{ lb r25, r26 ; addi r5, r6, 5 ; mz r15, r16, r17 }
+	{ lb r25, r26 ; addi r5, r6, 5 ; slti r15, r16, 5 }
+	{ lb r25, r26 ; and r15, r16, r17 ; movei r5, 5 }
+	{ lb r25, r26 ; and r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lb r25, r26 ; and r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lb r25, r26 ; and r5, r6, r7 ; rl r15, r16, r17 }
+	{ lb r25, r26 ; and r5, r6, r7 ; sub r15, r16, r17 }
+	{ lb r25, r26 ; andi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ lb r25, r26 ; andi r15, r16, 5 ; shl r5, r6, r7 }
+	{ lb r25, r26 ; andi r5, r6, 5 ; add r15, r16, r17 }
+	{ lb r25, r26 ; andi r5, r6, 5 ; seq r15, r16, r17 }
+	{ lb r25, r26 ; bitx r5, r6 ; and r15, r16, r17 }
+	{ lb r25, r26 ; bitx r5, r6 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; bytex r5, r6 ; fnop }
+	{ lb r25, r26 ; bytex r5, r6 ; shr r15, r16, r17 }
+	{ lb r25, r26 ; clz r5, r6 ; info 19 }
+	{ lb r25, r26 ; clz r5, r6 ; slt r15, r16, r17 }
+	{ lb r25, r26 ; ctz r5, r6 ; move r15, r16 }
+	{ lb r25, r26 ; ctz r5, r6 ; slte r15, r16, r17 }
+	{ lb r25, r26 ; fnop ; clz r5, r6 }
+	{ lb r25, r26 ; fnop ; mvnz r5, r6, r7 }
+	{ lb r25, r26 ; fnop ; s3a r15, r16, r17 }
+	{ lb r25, r26 ; fnop ; slte_u r15, r16, r17 }
+	{ lb r25, r26 ; fnop }
+	{ lb r25, r26 ; ill ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; ill ; shr r5, r6, r7 }
+	{ lb r25, r26 ; info 19 ; addi r15, r16, 5 }
+	{ lb r25, r26 ; info 19 ; mulhh_uu r5, r6, r7 }
+	{ lb r25, r26 ; info 19 ; rl r15, r16, r17 }
+	{ lb r25, r26 ; info 19 ; shri r15, r16, 5 }
+	{ lb r25, r26 ; info 19 ; sub r15, r16, r17 }
+	{ lb r25, r26 ; mnz r15, r16, r17 ; move r5, r6 }
+	{ lb r25, r26 ; mnz r15, r16, r17 ; rli r5, r6, 5 }
+	{ lb r25, r26 ; mnz r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ lb r25, r26 ; mnz r5, r6, r7 ; ori r15, r16, 5 }
+	{ lb r25, r26 ; mnz r5, r6, r7 ; srai r15, r16, 5 }
+	{ lb r25, r26 ; move r15, r16 ; mulhha_uu r5, r6, r7 }
+	{ lb r25, r26 ; move r15, r16 ; seqi r5, r6, 5 }
+	{ lb r25, r26 ; move r15, r16 }
+	{ lb r25, r26 ; move r5, r6 ; s3a r15, r16, r17 }
+	{ lb r25, r26 ; movei r15, 5 ; addi r5, r6, 5 }
+	{ lb r25, r26 ; movei r15, 5 ; mullla_uu r5, r6, r7 }
+	{ lb r25, r26 ; movei r15, 5 ; slt r5, r6, r7 }
+	{ lb r25, r26 ; movei r5, 5 ; fnop }
+	{ lb r25, r26 ; movei r5, 5 ; shr r15, r16, r17 }
+	{ lb r25, r26 ; mulhh_ss r5, r6, r7 ; info 19 }
+	{ lb r25, r26 ; mulhh_ss r5, r6, r7 ; slt r15, r16, r17 }
+	{ lb r25, r26 ; mulhh_uu r5, r6, r7 ; move r15, r16 }
+	{ lb r25, r26 ; mulhh_uu r5, r6, r7 ; slte r15, r16, r17 }
+	{ lb r25, r26 ; mulhha_ss r5, r6, r7 ; mz r15, r16, r17 }
+	{ lb r25, r26 ; mulhha_ss r5, r6, r7 ; slti r15, r16, 5 }
+	{ lb r25, r26 ; mulhha_uu r5, r6, r7 ; nor r15, r16, r17 }
+	{ lb r25, r26 ; mulhha_uu r5, r6, r7 ; sne r15, r16, r17 }
+	{ lb r25, r26 ; mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 }
+	{ lb r25, r26 ; mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 }
+	{ lb r25, r26 ; mulll_ss r5, r6, r7 ; rli r15, r16, 5 }
+	{ lb r25, r26 ; mulll_ss r5, r6, r7 ; xor r15, r16, r17 }
+	{ lb r25, r26 ; mulll_uu r5, r6, r7 ; s2a r15, r16, r17 }
+	{ lb r25, r26 ; mullla_ss r5, r6, r7 ; add r15, r16, r17 }
+	{ lb r25, r26 ; mullla_ss r5, r6, r7 ; seq r15, r16, r17 }
+	{ lb r25, r26 ; mullla_uu r5, r6, r7 ; and r15, r16, r17 }
+	{ lb r25, r26 ; mullla_uu r5, r6, r7 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; mvnz r5, r6, r7 ; fnop }
+	{ lb r25, r26 ; mvnz r5, r6, r7 ; shr r15, r16, r17 }
+	{ lb r25, r26 ; mvz r5, r6, r7 ; info 19 }
+	{ lb r25, r26 ; mvz r5, r6, r7 ; slt r15, r16, r17 }
+	{ lb r25, r26 ; mz r15, r16, r17 ; fnop }
+	{ lb r25, r26 ; mz r15, r16, r17 ; ori r5, r6, 5 }
+	{ lb r25, r26 ; mz r15, r16, r17 ; sra r5, r6, r7 }
+	{ lb r25, r26 ; mz r5, r6, r7 ; nop }
+	{ lb r25, r26 ; mz r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ lb r25, r26 ; nop ; ill }
+	{ lb r25, r26 ; nop ; mz r5, r6, r7 }
+	{ lb r25, r26 ; nop ; seq r5, r6, r7 }
+	{ lb r25, r26 ; nop ; slti r5, r6, 5 }
+	{ lb r25, r26 ; nor r15, r16, r17 ; and r5, r6, r7 }
+	{ lb r25, r26 ; nor r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lb r25, r26 ; nor r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lb r25, r26 ; nor r5, r6, r7 ; ill }
+	{ lb r25, r26 ; nor r5, r6, r7 ; shri r15, r16, 5 }
+	{ lb r25, r26 ; or r15, r16, r17 ; ctz r5, r6 }
+	{ lb r25, r26 ; or r15, r16, r17 ; or r5, r6, r7 }
+	{ lb r25, r26 ; or r15, r16, r17 ; sne r5, r6, r7 }
+	{ lb r25, r26 ; or r5, r6, r7 ; mz r15, r16, r17 }
+	{ lb r25, r26 ; or r5, r6, r7 ; slti r15, r16, 5 }
+	{ lb r25, r26 ; ori r15, r16, 5 ; movei r5, 5 }
+	{ lb r25, r26 ; ori r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lb r25, r26 ; ori r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ lb r25, r26 ; ori r5, r6, 5 ; rl r15, r16, r17 }
+	{ lb r25, r26 ; ori r5, r6, 5 ; sub r15, r16, r17 }
+	{ lb r25, r26 ; pcnt r5, r6 ; s1a r15, r16, r17 }
+	{ lb r25, r26 ; pcnt r5, r6 }
+	{ lb r25, r26 ; rl r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; rl r15, r16, r17 ; shr r5, r6, r7 }
+	{ lb r25, r26 ; rl r5, r6, r7 ; and r15, r16, r17 }
+	{ lb r25, r26 ; rl r5, r6, r7 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; rli r15, r16, 5 ; bitx r5, r6 }
+	{ lb r25, r26 ; rli r15, r16, 5 ; mz r5, r6, r7 }
+	{ lb r25, r26 ; rli r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ lb r25, r26 ; rli r5, r6, 5 ; mnz r15, r16, r17 }
+	{ lb r25, r26 ; rli r5, r6, 5 ; slt_u r15, r16, r17 }
+	{ lb r25, r26 ; s1a r15, r16, r17 ; info 19 }
+	{ lb r25, r26 ; s1a r15, r16, r17 ; pcnt r5, r6 }
+	{ lb r25, r26 ; s1a r15, r16, r17 ; srai r5, r6, 5 }
+	{ lb r25, r26 ; s1a r5, r6, r7 ; nor r15, r16, r17 }
+	{ lb r25, r26 ; s1a r5, r6, r7 ; sne r15, r16, r17 }
+	{ lb r25, r26 ; s2a r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lb r25, r26 ; s2a r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lb r25, r26 ; s2a r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lb r25, r26 ; s2a r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lb r25, r26 ; s2a r5, r6, r7 }
+	{ lb r25, r26 ; s3a r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; s3a r15, r16, r17 ; shr r5, r6, r7 }
+	{ lb r25, r26 ; s3a r5, r6, r7 ; and r15, r16, r17 }
+	{ lb r25, r26 ; s3a r5, r6, r7 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; seq r15, r16, r17 ; bitx r5, r6 }
+	{ lb r25, r26 ; seq r15, r16, r17 ; mz r5, r6, r7 }
+	{ lb r25, r26 ; seq r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lb r25, r26 ; seq r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lb r25, r26 ; seq r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lb r25, r26 ; seqi r15, r16, 5 ; info 19 }
+	{ lb r25, r26 ; seqi r15, r16, 5 ; pcnt r5, r6 }
+	{ lb r25, r26 ; seqi r15, r16, 5 ; srai r5, r6, 5 }
+	{ lb r25, r26 ; seqi r5, r6, 5 ; nor r15, r16, r17 }
+	{ lb r25, r26 ; seqi r5, r6, 5 ; sne r15, r16, r17 }
+	{ lb r25, r26 ; shl r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lb r25, r26 ; shl r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lb r25, r26 ; shl r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lb r25, r26 ; shl r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lb r25, r26 ; shl r5, r6, r7 }
+	{ lb r25, r26 ; shli r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; shli r15, r16, 5 ; shr r5, r6, r7 }
+	{ lb r25, r26 ; shli r5, r6, 5 ; and r15, r16, r17 }
+	{ lb r25, r26 ; shli r5, r6, 5 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; shr r15, r16, r17 ; bitx r5, r6 }
+	{ lb r25, r26 ; shr r15, r16, r17 ; mz r5, r6, r7 }
+	{ lb r25, r26 ; shr r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lb r25, r26 ; shr r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lb r25, r26 ; shr r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lb r25, r26 ; shri r15, r16, 5 ; info 19 }
+	{ lb r25, r26 ; shri r15, r16, 5 ; pcnt r5, r6 }
+	{ lb r25, r26 ; shri r15, r16, 5 ; srai r5, r6, 5 }
+	{ lb r25, r26 ; shri r5, r6, 5 ; nor r15, r16, r17 }
+	{ lb r25, r26 ; shri r5, r6, 5 ; sne r15, r16, r17 }
+	{ lb r25, r26 ; slt r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lb r25, r26 ; slt r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lb r25, r26 ; slt r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lb r25, r26 ; slt r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lb r25, r26 ; slt r5, r6, r7 }
+	{ lb r25, r26 ; slt_u r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; slt_u r15, r16, r17 ; shr r5, r6, r7 }
+	{ lb r25, r26 ; slt_u r5, r6, r7 ; and r15, r16, r17 }
+	{ lb r25, r26 ; slt_u r5, r6, r7 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; slte r15, r16, r17 ; bitx r5, r6 }
+	{ lb r25, r26 ; slte r15, r16, r17 ; mz r5, r6, r7 }
+	{ lb r25, r26 ; slte r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lb r25, r26 ; slte r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lb r25, r26 ; slte r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lb r25, r26 ; slte_u r15, r16, r17 ; info 19 }
+	{ lb r25, r26 ; slte_u r15, r16, r17 ; pcnt r5, r6 }
+	{ lb r25, r26 ; slte_u r15, r16, r17 ; srai r5, r6, 5 }
+	{ lb r25, r26 ; slte_u r5, r6, r7 ; nor r15, r16, r17 }
+	{ lb r25, r26 ; slte_u r5, r6, r7 ; sne r15, r16, r17 }
+	{ lb r25, r26 ; slti r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ lb r25, r26 ; slti r15, r16, 5 ; s3a r5, r6, r7 }
+	{ lb r25, r26 ; slti r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ lb r25, r26 ; slti r5, r6, 5 ; s1a r15, r16, r17 }
+	{ lb r25, r26 ; slti r5, r6, 5 }
+	{ lb r25, r26 ; slti_u r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; slti_u r15, r16, 5 ; shr r5, r6, r7 }
+	{ lb r25, r26 ; slti_u r5, r6, 5 ; and r15, r16, r17 }
+	{ lb r25, r26 ; slti_u r5, r6, 5 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; sne r15, r16, r17 ; bitx r5, r6 }
+	{ lb r25, r26 ; sne r15, r16, r17 ; mz r5, r6, r7 }
+	{ lb r25, r26 ; sne r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lb r25, r26 ; sne r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lb r25, r26 ; sne r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lb r25, r26 ; sra r15, r16, r17 ; info 19 }
+	{ lb r25, r26 ; sra r15, r16, r17 ; pcnt r5, r6 }
+	{ lb r25, r26 ; sra r15, r16, r17 ; srai r5, r6, 5 }
+	{ lb r25, r26 ; sra r5, r6, r7 ; nor r15, r16, r17 }
+	{ lb r25, r26 ; sra r5, r6, r7 ; sne r15, r16, r17 }
+	{ lb r25, r26 ; srai r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ lb r25, r26 ; srai r15, r16, 5 ; s3a r5, r6, r7 }
+	{ lb r25, r26 ; srai r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ lb r25, r26 ; srai r5, r6, 5 ; s1a r15, r16, r17 }
+	{ lb r25, r26 ; srai r5, r6, 5 }
+	{ lb r25, r26 ; sub r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lb r25, r26 ; sub r15, r16, r17 ; shr r5, r6, r7 }
+	{ lb r25, r26 ; sub r5, r6, r7 ; and r15, r16, r17 }
+	{ lb r25, r26 ; sub r5, r6, r7 ; shl r15, r16, r17 }
+	{ lb r25, r26 ; tblidxb0 r5, r6 ; fnop }
+	{ lb r25, r26 ; tblidxb0 r5, r6 ; shr r15, r16, r17 }
+	{ lb r25, r26 ; tblidxb1 r5, r6 ; info 19 }
+	{ lb r25, r26 ; tblidxb1 r5, r6 ; slt r15, r16, r17 }
+	{ lb r25, r26 ; tblidxb2 r5, r6 ; move r15, r16 }
+	{ lb r25, r26 ; tblidxb2 r5, r6 ; slte r15, r16, r17 }
+	{ lb r25, r26 ; tblidxb3 r5, r6 ; mz r15, r16, r17 }
+	{ lb r25, r26 ; tblidxb3 r5, r6 ; slti r15, r16, 5 }
+	{ lb r25, r26 ; xor r15, r16, r17 ; movei r5, 5 }
+	{ lb r25, r26 ; xor r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lb r25, r26 ; xor r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lb r25, r26 ; xor r5, r6, r7 ; rl r15, r16, r17 }
+	{ lb r25, r26 ; xor r5, r6, r7 ; sub r15, r16, r17 }
+	{ lb_u r15, r16 ; avgh r5, r6, r7 }
+	{ lb_u r15, r16 ; minh r5, r6, r7 }
+	{ lb_u r15, r16 ; mulhl_us r5, r6, r7 }
+	{ lb_u r15, r16 ; nor r5, r6, r7 }
+	{ lb_u r15, r16 ; seqb r5, r6, r7 }
+	{ lb_u r15, r16 ; sltb_u r5, r6, r7 }
+	{ lb_u r15, r16 ; srah r5, r6, r7 }
+	{ lb_u r25, r26 ; add r15, r16, r17 ; bitx r5, r6 }
+	{ lb_u r25, r26 ; add r15, r16, r17 ; mz r5, r6, r7 }
+	{ lb_u r25, r26 ; add r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lb_u r25, r26 ; add r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lb_u r25, r26 ; add r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lb_u r25, r26 ; addi r15, r16, 5 ; info 19 }
+	{ lb_u r25, r26 ; addi r15, r16, 5 ; pcnt r5, r6 }
+	{ lb_u r25, r26 ; addi r15, r16, 5 ; srai r5, r6, 5 }
+	{ lb_u r25, r26 ; addi r5, r6, 5 ; nor r15, r16, r17 }
+	{ lb_u r25, r26 ; addi r5, r6, 5 ; sne r15, r16, r17 }
+	{ lb_u r25, r26 ; and r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; and r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lb_u r25, r26 ; and r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lb_u r25, r26 ; and r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lb_u r25, r26 ; and r5, r6, r7 }
+	{ lb_u r25, r26 ; andi r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; andi r15, r16, 5 ; shr r5, r6, r7 }
+	{ lb_u r25, r26 ; andi r5, r6, 5 ; and r15, r16, r17 }
+	{ lb_u r25, r26 ; andi r5, r6, 5 ; shl r15, r16, r17 }
+	{ lb_u r25, r26 ; bitx r5, r6 ; fnop }
+	{ lb_u r25, r26 ; bitx r5, r6 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; bytex r5, r6 ; info 19 }
+	{ lb_u r25, r26 ; bytex r5, r6 ; slt r15, r16, r17 }
+	{ lb_u r25, r26 ; clz r5, r6 ; move r15, r16 }
+	{ lb_u r25, r26 ; clz r5, r6 ; slte r15, r16, r17 }
+	{ lb_u r25, r26 ; ctz r5, r6 ; mz r15, r16, r17 }
+	{ lb_u r25, r26 ; ctz r5, r6 ; slti r15, r16, 5 }
+	{ lb_u r25, r26 ; fnop ; fnop }
+	{ lb_u r25, r26 ; fnop ; mz r15, r16, r17 }
+	{ lb_u r25, r26 ; fnop ; seq r15, r16, r17 }
+	{ lb_u r25, r26 ; fnop ; slti r15, r16, 5 }
+	{ lb_u r25, r26 ; ill ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; ill ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; ill ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; info 19 ; and r15, r16, r17 }
+	{ lb_u r25, r26 ; info 19 ; mulhha_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; info 19 ; rli r15, r16, 5 }
+	{ lb_u r25, r26 ; info 19 ; slt r15, r16, r17 }
+	{ lb_u r25, r26 ; info 19 ; tblidxb0 r5, r6 }
+	{ lb_u r25, r26 ; mnz r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ lb_u r25, r26 ; mnz r15, r16, r17 ; s2a r5, r6, r7 }
+	{ lb_u r25, r26 ; mnz r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ lb_u r25, r26 ; mnz r5, r6, r7 ; rli r15, r16, 5 }
+	{ lb_u r25, r26 ; mnz r5, r6, r7 ; xor r15, r16, r17 }
+	{ lb_u r25, r26 ; move r15, r16 ; mulll_ss r5, r6, r7 }
+	{ lb_u r25, r26 ; move r15, r16 ; shli r5, r6, 5 }
+	{ lb_u r25, r26 ; move r5, r6 ; addi r15, r16, 5 }
+	{ lb_u r25, r26 ; move r5, r6 ; seqi r15, r16, 5 }
+	{ lb_u r25, r26 ; movei r15, 5 ; andi r5, r6, 5 }
+	{ lb_u r25, r26 ; movei r15, 5 ; mvz r5, r6, r7 }
+	{ lb_u r25, r26 ; movei r15, 5 ; slte r5, r6, r7 }
+	{ lb_u r25, r26 ; movei r5, 5 ; info 19 }
+	{ lb_u r25, r26 ; movei r5, 5 ; slt r15, r16, r17 }
+	{ lb_u r25, r26 ; mulhh_ss r5, r6, r7 ; move r15, r16 }
+	{ lb_u r25, r26 ; mulhh_ss r5, r6, r7 ; slte r15, r16, r17 }
+	{ lb_u r25, r26 ; mulhh_uu r5, r6, r7 ; mz r15, r16, r17 }
+	{ lb_u r25, r26 ; mulhh_uu r5, r6, r7 ; slti r15, r16, 5 }
+	{ lb_u r25, r26 ; mulhha_ss r5, r6, r7 ; nor r15, r16, r17 }
+	{ lb_u r25, r26 ; mulhha_ss r5, r6, r7 ; sne r15, r16, r17 }
+	{ lb_u r25, r26 ; mulhha_uu r5, r6, r7 ; ori r15, r16, 5 }
+	{ lb_u r25, r26 ; mulhha_uu r5, r6, r7 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; rli r15, r16, 5 }
+	{ lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 }
+	{ lb_u r25, r26 ; mulll_ss r5, r6, r7 ; s2a r15, r16, r17 }
+	{ lb_u r25, r26 ; mulll_uu r5, r6, r7 ; add r15, r16, r17 }
+	{ lb_u r25, r26 ; mulll_uu r5, r6, r7 ; seq r15, r16, r17 }
+	{ lb_u r25, r26 ; mullla_ss r5, r6, r7 ; and r15, r16, r17 }
+	{ lb_u r25, r26 ; mullla_ss r5, r6, r7 ; shl r15, r16, r17 }
+	{ lb_u r25, r26 ; mullla_uu r5, r6, r7 ; fnop }
+	{ lb_u r25, r26 ; mullla_uu r5, r6, r7 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; mvnz r5, r6, r7 ; info 19 }
+	{ lb_u r25, r26 ; mvnz r5, r6, r7 ; slt r15, r16, r17 }
+	{ lb_u r25, r26 ; mvz r5, r6, r7 ; move r15, r16 }
+	{ lb_u r25, r26 ; mvz r5, r6, r7 ; slte r15, r16, r17 }
+	{ lb_u r25, r26 ; mz r15, r16, r17 ; mnz r5, r6, r7 }
+	{ lb_u r25, r26 ; mz r15, r16, r17 ; rl r5, r6, r7 }
+	{ lb_u r25, r26 ; mz r15, r16, r17 ; sub r5, r6, r7 }
+	{ lb_u r25, r26 ; mz r5, r6, r7 ; or r15, r16, r17 }
+	{ lb_u r25, r26 ; mz r5, r6, r7 ; sra r15, r16, r17 }
+	{ lb_u r25, r26 ; nop ; mnz r15, r16, r17 }
+	{ lb_u r25, r26 ; nop ; nor r15, r16, r17 }
+	{ lb_u r25, r26 ; nop ; seqi r5, r6, 5 }
+	{ lb_u r25, r26 ; nop ; slti_u r5, r6, 5 }
+	{ lb_u r25, r26 ; nor r15, r16, r17 ; bitx r5, r6 }
+	{ lb_u r25, r26 ; nor r15, r16, r17 ; mz r5, r6, r7 }
+	{ lb_u r25, r26 ; nor r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lb_u r25, r26 ; nor r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lb_u r25, r26 ; nor r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lb_u r25, r26 ; or r15, r16, r17 ; info 19 }
+	{ lb_u r25, r26 ; or r15, r16, r17 ; pcnt r5, r6 }
+	{ lb_u r25, r26 ; or r15, r16, r17 ; srai r5, r6, 5 }
+	{ lb_u r25, r26 ; or r5, r6, r7 ; nor r15, r16, r17 }
+	{ lb_u r25, r26 ; or r5, r6, r7 ; sne r15, r16, r17 }
+	{ lb_u r25, r26 ; ori r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; ori r15, r16, 5 ; s3a r5, r6, r7 }
+	{ lb_u r25, r26 ; ori r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ lb_u r25, r26 ; ori r5, r6, 5 ; s1a r15, r16, r17 }
+	{ lb_u r25, r26 ; ori r5, r6, 5 }
+	{ lb_u r25, r26 ; pcnt r5, r6 ; s3a r15, r16, r17 }
+	{ lb_u r25, r26 ; rl r15, r16, r17 ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; rl r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; rl r15, r16, r17 ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; rl r5, r6, r7 ; fnop }
+	{ lb_u r25, r26 ; rl r5, r6, r7 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; rli r15, r16, 5 ; clz r5, r6 }
+	{ lb_u r25, r26 ; rli r15, r16, 5 ; nor r5, r6, r7 }
+	{ lb_u r25, r26 ; rli r15, r16, 5 ; slti_u r5, r6, 5 }
+	{ lb_u r25, r26 ; rli r5, r6, 5 ; movei r15, 5 }
+	{ lb_u r25, r26 ; rli r5, r6, 5 ; slte_u r15, r16, r17 }
+	{ lb_u r25, r26 ; s1a r15, r16, r17 ; move r5, r6 }
+	{ lb_u r25, r26 ; s1a r15, r16, r17 ; rli r5, r6, 5 }
+	{ lb_u r25, r26 ; s1a r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ lb_u r25, r26 ; s1a r5, r6, r7 ; ori r15, r16, 5 }
+	{ lb_u r25, r26 ; s1a r5, r6, r7 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; s2a r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; s2a r15, r16, r17 ; seqi r5, r6, 5 }
+	{ lb_u r25, r26 ; s2a r15, r16, r17 }
+	{ lb_u r25, r26 ; s2a r5, r6, r7 ; s3a r15, r16, r17 }
+	{ lb_u r25, r26 ; s3a r15, r16, r17 ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; s3a r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; s3a r15, r16, r17 ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; s3a r5, r6, r7 ; fnop }
+	{ lb_u r25, r26 ; s3a r5, r6, r7 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; seq r15, r16, r17 ; clz r5, r6 }
+	{ lb_u r25, r26 ; seq r15, r16, r17 ; nor r5, r6, r7 }
+	{ lb_u r25, r26 ; seq r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ lb_u r25, r26 ; seq r5, r6, r7 ; movei r15, 5 }
+	{ lb_u r25, r26 ; seq r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lb_u r25, r26 ; seqi r15, r16, 5 ; move r5, r6 }
+	{ lb_u r25, r26 ; seqi r15, r16, 5 ; rli r5, r6, 5 }
+	{ lb_u r25, r26 ; seqi r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ lb_u r25, r26 ; seqi r5, r6, 5 ; ori r15, r16, 5 }
+	{ lb_u r25, r26 ; seqi r5, r6, 5 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; shl r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; shl r15, r16, r17 ; seqi r5, r6, 5 }
+	{ lb_u r25, r26 ; shl r15, r16, r17 }
+	{ lb_u r25, r26 ; shl r5, r6, r7 ; s3a r15, r16, r17 }
+	{ lb_u r25, r26 ; shli r15, r16, 5 ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; shli r15, r16, 5 ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; shli r15, r16, 5 ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; shli r5, r6, 5 ; fnop }
+	{ lb_u r25, r26 ; shli r5, r6, 5 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; shr r15, r16, r17 ; clz r5, r6 }
+	{ lb_u r25, r26 ; shr r15, r16, r17 ; nor r5, r6, r7 }
+	{ lb_u r25, r26 ; shr r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ lb_u r25, r26 ; shr r5, r6, r7 ; movei r15, 5 }
+	{ lb_u r25, r26 ; shr r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lb_u r25, r26 ; shri r15, r16, 5 ; move r5, r6 }
+	{ lb_u r25, r26 ; shri r15, r16, 5 ; rli r5, r6, 5 }
+	{ lb_u r25, r26 ; shri r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ lb_u r25, r26 ; shri r5, r6, 5 ; ori r15, r16, 5 }
+	{ lb_u r25, r26 ; shri r5, r6, 5 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; slt r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; slt r15, r16, r17 ; seqi r5, r6, 5 }
+	{ lb_u r25, r26 ; slt r15, r16, r17 }
+	{ lb_u r25, r26 ; slt r5, r6, r7 ; s3a r15, r16, r17 }
+	{ lb_u r25, r26 ; slt_u r15, r16, r17 ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; slt_u r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; slt_u r15, r16, r17 ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; slt_u r5, r6, r7 ; fnop }
+	{ lb_u r25, r26 ; slt_u r5, r6, r7 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; slte r15, r16, r17 ; clz r5, r6 }
+	{ lb_u r25, r26 ; slte r15, r16, r17 ; nor r5, r6, r7 }
+	{ lb_u r25, r26 ; slte r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ lb_u r25, r26 ; slte r5, r6, r7 ; movei r15, 5 }
+	{ lb_u r25, r26 ; slte r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lb_u r25, r26 ; slte_u r15, r16, r17 ; move r5, r6 }
+	{ lb_u r25, r26 ; slte_u r15, r16, r17 ; rli r5, r6, 5 }
+	{ lb_u r25, r26 ; slte_u r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ lb_u r25, r26 ; slte_u r5, r6, r7 ; ori r15, r16, 5 }
+	{ lb_u r25, r26 ; slte_u r5, r6, r7 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; slti r15, r16, 5 ; mulhha_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; slti r15, r16, 5 ; seqi r5, r6, 5 }
+	{ lb_u r25, r26 ; slti r15, r16, 5 }
+	{ lb_u r25, r26 ; slti r5, r6, 5 ; s3a r15, r16, r17 }
+	{ lb_u r25, r26 ; slti_u r15, r16, 5 ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; slti_u r15, r16, 5 ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; slti_u r15, r16, 5 ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; slti_u r5, r6, 5 ; fnop }
+	{ lb_u r25, r26 ; slti_u r5, r6, 5 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; sne r15, r16, r17 ; clz r5, r6 }
+	{ lb_u r25, r26 ; sne r15, r16, r17 ; nor r5, r6, r7 }
+	{ lb_u r25, r26 ; sne r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ lb_u r25, r26 ; sne r5, r6, r7 ; movei r15, 5 }
+	{ lb_u r25, r26 ; sne r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lb_u r25, r26 ; sra r15, r16, r17 ; move r5, r6 }
+	{ lb_u r25, r26 ; sra r15, r16, r17 ; rli r5, r6, 5 }
+	{ lb_u r25, r26 ; sra r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ lb_u r25, r26 ; sra r5, r6, r7 ; ori r15, r16, 5 }
+	{ lb_u r25, r26 ; sra r5, r6, r7 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; srai r15, r16, 5 ; mulhha_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; srai r15, r16, 5 ; seqi r5, r6, 5 }
+	{ lb_u r25, r26 ; srai r15, r16, 5 }
+	{ lb_u r25, r26 ; srai r5, r6, 5 ; s3a r15, r16, r17 }
+	{ lb_u r25, r26 ; sub r15, r16, r17 ; addi r5, r6, 5 }
+	{ lb_u r25, r26 ; sub r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; sub r15, r16, r17 ; slt r5, r6, r7 }
+	{ lb_u r25, r26 ; sub r5, r6, r7 ; fnop }
+	{ lb_u r25, r26 ; sub r5, r6, r7 ; shr r15, r16, r17 }
+	{ lb_u r25, r26 ; tblidxb0 r5, r6 ; info 19 }
+	{ lb_u r25, r26 ; tblidxb0 r5, r6 ; slt r15, r16, r17 }
+	{ lb_u r25, r26 ; tblidxb1 r5, r6 ; move r15, r16 }
+	{ lb_u r25, r26 ; tblidxb1 r5, r6 ; slte r15, r16, r17 }
+	{ lb_u r25, r26 ; tblidxb2 r5, r6 ; mz r15, r16, r17 }
+	{ lb_u r25, r26 ; tblidxb2 r5, r6 ; slti r15, r16, 5 }
+	{ lb_u r25, r26 ; tblidxb3 r5, r6 ; nor r15, r16, r17 }
+	{ lb_u r25, r26 ; tblidxb3 r5, r6 ; sne r15, r16, r17 }
+	{ lb_u r25, r26 ; xor r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lb_u r25, r26 ; xor r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lb_u r25, r26 ; xor r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lb_u r25, r26 ; xor r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lb_u r25, r26 ; xor r5, r6, r7 }
+	{ lbadd r15, r16, 5 ; bytex r5, r6 }
+	{ lbadd r15, r16, 5 ; minih r5, r6, 5 }
+	{ lbadd r15, r16, 5 ; mulhla_ss r5, r6, r7 }
+	{ lbadd r15, r16, 5 ; ori r5, r6, 5 }
+	{ lbadd r15, r16, 5 ; seqi r5, r6, 5 }
+	{ lbadd r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ lbadd r15, r16, 5 ; sraib r5, r6, 5 }
+	{ lbadd_u r15, r16, 5 ; addib r5, r6, 5 }
+	{ lbadd_u r15, r16, 5 ; info 19 }
+	{ lbadd_u r15, r16, 5 ; moveli r5, 0x1234 }
+	{ lbadd_u r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ lbadd_u r15, r16, 5 ; rli r5, r6, 5 }
+	{ lbadd_u r15, r16, 5 ; shlib r5, r6, 5 }
+	{ lbadd_u r15, r16, 5 ; slti r5, r6, 5 }
+	{ lbadd_u r15, r16, 5 ; subs r5, r6, r7 }
+	{ lh r15, r16 ; and r5, r6, r7 }
+	{ lh r15, r16 ; maxh r5, r6, r7 }
+	{ lh r15, r16 ; mulhha_uu r5, r6, r7 }
+	{ lh r15, r16 ; mz r5, r6, r7 }
+	{ lh r15, r16 ; sadb_u r5, r6, r7 }
+	{ lh r15, r16 ; shrih r5, r6, 5 }
+	{ lh r15, r16 ; sneb r5, r6, r7 }
+	{ lh r25, r26 ; add r15, r16, r17 ; add r5, r6, r7 }
+	{ lh r25, r26 ; add r15, r16, r17 ; mullla_ss r5, r6, r7 }
+	{ lh r25, r26 ; add r15, r16, r17 ; shri r5, r6, 5 }
+	{ lh r25, r26 ; add r5, r6, r7 ; andi r15, r16, 5 }
+	{ lh r25, r26 ; add r5, r6, r7 ; shli r15, r16, 5 }
+	{ lh r25, r26 ; addi r15, r16, 5 ; bytex r5, r6 }
+	{ lh r25, r26 ; addi r15, r16, 5 ; nop }
+	{ lh r25, r26 ; addi r15, r16, 5 ; slti r5, r6, 5 }
+	{ lh r25, r26 ; addi r5, r6, 5 ; move r15, r16 }
+	{ lh r25, r26 ; addi r5, r6, 5 ; slte r15, r16, r17 }
+	{ lh r25, r26 ; and r15, r16, r17 ; mnz r5, r6, r7 }
+	{ lh r25, r26 ; and r15, r16, r17 ; rl r5, r6, r7 }
+	{ lh r25, r26 ; and r15, r16, r17 ; sub r5, r6, r7 }
+	{ lh r25, r26 ; and r5, r6, r7 ; or r15, r16, r17 }
+	{ lh r25, r26 ; and r5, r6, r7 ; sra r15, r16, r17 }
+	{ lh r25, r26 ; andi r15, r16, 5 ; mulhha_ss r5, r6, r7 }
+	{ lh r25, r26 ; andi r15, r16, 5 ; seq r5, r6, r7 }
+	{ lh r25, r26 ; andi r15, r16, 5 ; xor r5, r6, r7 }
+	{ lh r25, r26 ; andi r5, r6, 5 ; s2a r15, r16, r17 }
+	{ lh r25, r26 ; bitx r5, r6 ; add r15, r16, r17 }
+	{ lh r25, r26 ; bitx r5, r6 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; bytex r5, r6 ; and r15, r16, r17 }
+	{ lh r25, r26 ; bytex r5, r6 ; shl r15, r16, r17 }
+	{ lh r25, r26 ; clz r5, r6 ; fnop }
+	{ lh r25, r26 ; clz r5, r6 ; shr r15, r16, r17 }
+	{ lh r25, r26 ; ctz r5, r6 ; info 19 }
+	{ lh r25, r26 ; ctz r5, r6 ; slt r15, r16, r17 }
+	{ lh r25, r26 ; fnop ; bitx r5, r6 }
+	{ lh r25, r26 ; fnop ; mullla_ss r5, r6, r7 }
+	{ lh r25, r26 ; fnop ; s2a r15, r16, r17 }
+	{ lh r25, r26 ; fnop ; slte r15, r16, r17 }
+	{ lh r25, r26 ; fnop ; xor r15, r16, r17 }
+	{ lh r25, r26 ; ill ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; ill ; shl r5, r6, r7 }
+	{ lh r25, r26 ; info 19 ; add r15, r16, r17 }
+	{ lh r25, r26 ; info 19 ; movei r5, 5 }
+	{ lh r25, r26 ; info 19 ; ori r5, r6, 5 }
+	{ lh r25, r26 ; info 19 ; shr r15, r16, r17 }
+	{ lh r25, r26 ; info 19 ; srai r15, r16, 5 }
+	{ lh r25, r26 ; mnz r15, r16, r17 ; info 19 }
+	{ lh r25, r26 ; mnz r15, r16, r17 ; pcnt r5, r6 }
+	{ lh r25, r26 ; mnz r15, r16, r17 ; srai r5, r6, 5 }
+	{ lh r25, r26 ; mnz r5, r6, r7 ; nor r15, r16, r17 }
+	{ lh r25, r26 ; mnz r5, r6, r7 ; sne r15, r16, r17 }
+	{ lh r25, r26 ; move r15, r16 ; mulhh_uu r5, r6, r7 }
+	{ lh r25, r26 ; move r15, r16 ; s3a r5, r6, r7 }
+	{ lh r25, r26 ; move r15, r16 ; tblidxb3 r5, r6 }
+	{ lh r25, r26 ; move r5, r6 ; s1a r15, r16, r17 }
+	{ lh r25, r26 ; move r5, r6 }
+	{ lh r25, r26 ; movei r15, 5 ; mulll_uu r5, r6, r7 }
+	{ lh r25, r26 ; movei r15, 5 ; shr r5, r6, r7 }
+	{ lh r25, r26 ; movei r5, 5 ; and r15, r16, r17 }
+	{ lh r25, r26 ; movei r5, 5 ; shl r15, r16, r17 }
+	{ lh r25, r26 ; mulhh_ss r5, r6, r7 ; fnop }
+	{ lh r25, r26 ; mulhh_ss r5, r6, r7 ; shr r15, r16, r17 }
+	{ lh r25, r26 ; mulhh_uu r5, r6, r7 ; info 19 }
+	{ lh r25, r26 ; mulhh_uu r5, r6, r7 ; slt r15, r16, r17 }
+	{ lh r25, r26 ; mulhha_ss r5, r6, r7 ; move r15, r16 }
+	{ lh r25, r26 ; mulhha_ss r5, r6, r7 ; slte r15, r16, r17 }
+	{ lh r25, r26 ; mulhha_uu r5, r6, r7 ; mz r15, r16, r17 }
+	{ lh r25, r26 ; mulhha_uu r5, r6, r7 ; slti r15, r16, 5 }
+	{ lh r25, r26 ; mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 }
+	{ lh r25, r26 ; mulhlsa_uu r5, r6, r7 ; sne r15, r16, r17 }
+	{ lh r25, r26 ; mulll_ss r5, r6, r7 ; ori r15, r16, 5 }
+	{ lh r25, r26 ; mulll_ss r5, r6, r7 ; srai r15, r16, 5 }
+	{ lh r25, r26 ; mulll_uu r5, r6, r7 ; rli r15, r16, 5 }
+	{ lh r25, r26 ; mulll_uu r5, r6, r7 ; xor r15, r16, r17 }
+	{ lh r25, r26 ; mullla_ss r5, r6, r7 ; s2a r15, r16, r17 }
+	{ lh r25, r26 ; mullla_uu r5, r6, r7 ; add r15, r16, r17 }
+	{ lh r25, r26 ; mullla_uu r5, r6, r7 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; mvnz r5, r6, r7 ; and r15, r16, r17 }
+	{ lh r25, r26 ; mvnz r5, r6, r7 ; shl r15, r16, r17 }
+	{ lh r25, r26 ; mvz r5, r6, r7 ; fnop }
+	{ lh r25, r26 ; mvz r5, r6, r7 ; shr r15, r16, r17 }
+	{ lh r25, r26 ; mz r15, r16, r17 ; clz r5, r6 }
+	{ lh r25, r26 ; mz r15, r16, r17 ; nor r5, r6, r7 }
+	{ lh r25, r26 ; mz r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ lh r25, r26 ; mz r5, r6, r7 ; movei r15, 5 }
+	{ lh r25, r26 ; mz r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lh r25, r26 ; nop ; ctz r5, r6 }
+	{ lh r25, r26 ; nop ; mvz r5, r6, r7 }
+	{ lh r25, r26 ; nop ; s3a r5, r6, r7 }
+	{ lh r25, r26 ; nop ; slte_u r5, r6, r7 }
+	{ lh r25, r26 ; nor r15, r16, r17 ; add r5, r6, r7 }
+	{ lh r25, r26 ; nor r15, r16, r17 ; mullla_ss r5, r6, r7 }
+	{ lh r25, r26 ; nor r15, r16, r17 ; shri r5, r6, 5 }
+	{ lh r25, r26 ; nor r5, r6, r7 ; andi r15, r16, 5 }
+	{ lh r25, r26 ; nor r5, r6, r7 ; shli r15, r16, 5 }
+	{ lh r25, r26 ; or r15, r16, r17 ; bytex r5, r6 }
+	{ lh r25, r26 ; or r15, r16, r17 ; nop }
+	{ lh r25, r26 ; or r15, r16, r17 ; slti r5, r6, 5 }
+	{ lh r25, r26 ; or r5, r6, r7 ; move r15, r16 }
+	{ lh r25, r26 ; or r5, r6, r7 ; slte r15, r16, r17 }
+	{ lh r25, r26 ; ori r15, r16, 5 ; mnz r5, r6, r7 }
+	{ lh r25, r26 ; ori r15, r16, 5 ; rl r5, r6, r7 }
+	{ lh r25, r26 ; ori r15, r16, 5 ; sub r5, r6, r7 }
+	{ lh r25, r26 ; ori r5, r6, 5 ; or r15, r16, r17 }
+	{ lh r25, r26 ; ori r5, r6, 5 ; sra r15, r16, r17 }
+	{ lh r25, r26 ; pcnt r5, r6 ; rl r15, r16, r17 }
+	{ lh r25, r26 ; pcnt r5, r6 ; sub r15, r16, r17 }
+	{ lh r25, r26 ; rl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; rl r15, r16, r17 ; shl r5, r6, r7 }
+	{ lh r25, r26 ; rl r5, r6, r7 ; add r15, r16, r17 }
+	{ lh r25, r26 ; rl r5, r6, r7 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; rli r15, r16, 5 ; and r5, r6, r7 }
+	{ lh r25, r26 ; rli r15, r16, 5 ; mvnz r5, r6, r7 }
+	{ lh r25, r26 ; rli r15, r16, 5 ; slt_u r5, r6, r7 }
+	{ lh r25, r26 ; rli r5, r6, 5 ; ill }
+	{ lh r25, r26 ; rli r5, r6, 5 ; shri r15, r16, 5 }
+	{ lh r25, r26 ; s1a r15, r16, r17 ; ctz r5, r6 }
+	{ lh r25, r26 ; s1a r15, r16, r17 ; or r5, r6, r7 }
+	{ lh r25, r26 ; s1a r15, r16, r17 ; sne r5, r6, r7 }
+	{ lh r25, r26 ; s1a r5, r6, r7 ; mz r15, r16, r17 }
+	{ lh r25, r26 ; s1a r5, r6, r7 ; slti r15, r16, 5 }
+	{ lh r25, r26 ; s2a r15, r16, r17 ; movei r5, 5 }
+	{ lh r25, r26 ; s2a r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lh r25, r26 ; s2a r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lh r25, r26 ; s2a r5, r6, r7 ; rl r15, r16, r17 }
+	{ lh r25, r26 ; s2a r5, r6, r7 ; sub r15, r16, r17 }
+	{ lh r25, r26 ; s3a r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; s3a r15, r16, r17 ; shl r5, r6, r7 }
+	{ lh r25, r26 ; s3a r5, r6, r7 ; add r15, r16, r17 }
+	{ lh r25, r26 ; s3a r5, r6, r7 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; seq r15, r16, r17 ; and r5, r6, r7 }
+	{ lh r25, r26 ; seq r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lh r25, r26 ; seq r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lh r25, r26 ; seq r5, r6, r7 ; ill }
+	{ lh r25, r26 ; seq r5, r6, r7 ; shri r15, r16, 5 }
+	{ lh r25, r26 ; seqi r15, r16, 5 ; ctz r5, r6 }
+	{ lh r25, r26 ; seqi r15, r16, 5 ; or r5, r6, r7 }
+	{ lh r25, r26 ; seqi r15, r16, 5 ; sne r5, r6, r7 }
+	{ lh r25, r26 ; seqi r5, r6, 5 ; mz r15, r16, r17 }
+	{ lh r25, r26 ; seqi r5, r6, 5 ; slti r15, r16, 5 }
+	{ lh r25, r26 ; shl r15, r16, r17 ; movei r5, 5 }
+	{ lh r25, r26 ; shl r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lh r25, r26 ; shl r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lh r25, r26 ; shl r5, r6, r7 ; rl r15, r16, r17 }
+	{ lh r25, r26 ; shl r5, r6, r7 ; sub r15, r16, r17 }
+	{ lh r25, r26 ; shli r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; shli r15, r16, 5 ; shl r5, r6, r7 }
+	{ lh r25, r26 ; shli r5, r6, 5 ; add r15, r16, r17 }
+	{ lh r25, r26 ; shli r5, r6, 5 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; shr r15, r16, r17 ; and r5, r6, r7 }
+	{ lh r25, r26 ; shr r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lh r25, r26 ; shr r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lh r25, r26 ; shr r5, r6, r7 ; ill }
+	{ lh r25, r26 ; shr r5, r6, r7 ; shri r15, r16, 5 }
+	{ lh r25, r26 ; shri r15, r16, 5 ; ctz r5, r6 }
+	{ lh r25, r26 ; shri r15, r16, 5 ; or r5, r6, r7 }
+	{ lh r25, r26 ; shri r15, r16, 5 ; sne r5, r6, r7 }
+	{ lh r25, r26 ; shri r5, r6, 5 ; mz r15, r16, r17 }
+	{ lh r25, r26 ; shri r5, r6, 5 ; slti r15, r16, 5 }
+	{ lh r25, r26 ; slt r15, r16, r17 ; movei r5, 5 }
+	{ lh r25, r26 ; slt r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lh r25, r26 ; slt r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lh r25, r26 ; slt r5, r6, r7 ; rl r15, r16, r17 }
+	{ lh r25, r26 ; slt r5, r6, r7 ; sub r15, r16, r17 }
+	{ lh r25, r26 ; slt_u r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; slt_u r15, r16, r17 ; shl r5, r6, r7 }
+	{ lh r25, r26 ; slt_u r5, r6, r7 ; add r15, r16, r17 }
+	{ lh r25, r26 ; slt_u r5, r6, r7 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; slte r15, r16, r17 ; and r5, r6, r7 }
+	{ lh r25, r26 ; slte r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lh r25, r26 ; slte r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lh r25, r26 ; slte r5, r6, r7 ; ill }
+	{ lh r25, r26 ; slte r5, r6, r7 ; shri r15, r16, 5 }
+	{ lh r25, r26 ; slte_u r15, r16, r17 ; ctz r5, r6 }
+	{ lh r25, r26 ; slte_u r15, r16, r17 ; or r5, r6, r7 }
+	{ lh r25, r26 ; slte_u r15, r16, r17 ; sne r5, r6, r7 }
+	{ lh r25, r26 ; slte_u r5, r6, r7 ; mz r15, r16, r17 }
+	{ lh r25, r26 ; slte_u r5, r6, r7 ; slti r15, r16, 5 }
+	{ lh r25, r26 ; slti r15, r16, 5 ; movei r5, 5 }
+	{ lh r25, r26 ; slti r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lh r25, r26 ; slti r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ lh r25, r26 ; slti r5, r6, 5 ; rl r15, r16, r17 }
+	{ lh r25, r26 ; slti r5, r6, 5 ; sub r15, r16, r17 }
+	{ lh r25, r26 ; slti_u r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; slti_u r15, r16, 5 ; shl r5, r6, r7 }
+	{ lh r25, r26 ; slti_u r5, r6, 5 ; add r15, r16, r17 }
+	{ lh r25, r26 ; slti_u r5, r6, 5 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; sne r15, r16, r17 ; and r5, r6, r7 }
+	{ lh r25, r26 ; sne r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lh r25, r26 ; sne r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lh r25, r26 ; sne r5, r6, r7 ; ill }
+	{ lh r25, r26 ; sne r5, r6, r7 ; shri r15, r16, 5 }
+	{ lh r25, r26 ; sra r15, r16, r17 ; ctz r5, r6 }
+	{ lh r25, r26 ; sra r15, r16, r17 ; or r5, r6, r7 }
+	{ lh r25, r26 ; sra r15, r16, r17 ; sne r5, r6, r7 }
+	{ lh r25, r26 ; sra r5, r6, r7 ; mz r15, r16, r17 }
+	{ lh r25, r26 ; sra r5, r6, r7 ; slti r15, r16, 5 }
+	{ lh r25, r26 ; srai r15, r16, 5 ; movei r5, 5 }
+	{ lh r25, r26 ; srai r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lh r25, r26 ; srai r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ lh r25, r26 ; srai r5, r6, 5 ; rl r15, r16, r17 }
+	{ lh r25, r26 ; srai r5, r6, 5 ; sub r15, r16, r17 }
+	{ lh r25, r26 ; sub r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lh r25, r26 ; sub r15, r16, r17 ; shl r5, r6, r7 }
+	{ lh r25, r26 ; sub r5, r6, r7 ; add r15, r16, r17 }
+	{ lh r25, r26 ; sub r5, r6, r7 ; seq r15, r16, r17 }
+	{ lh r25, r26 ; tblidxb0 r5, r6 ; and r15, r16, r17 }
+	{ lh r25, r26 ; tblidxb0 r5, r6 ; shl r15, r16, r17 }
+	{ lh r25, r26 ; tblidxb1 r5, r6 ; fnop }
+	{ lh r25, r26 ; tblidxb1 r5, r6 ; shr r15, r16, r17 }
+	{ lh r25, r26 ; tblidxb2 r5, r6 ; info 19 }
+	{ lh r25, r26 ; tblidxb2 r5, r6 ; slt r15, r16, r17 }
+	{ lh r25, r26 ; tblidxb3 r5, r6 ; move r15, r16 }
+	{ lh r25, r26 ; tblidxb3 r5, r6 ; slte r15, r16, r17 }
+	{ lh r25, r26 ; xor r15, r16, r17 ; mnz r5, r6, r7 }
+	{ lh r25, r26 ; xor r15, r16, r17 ; rl r5, r6, r7 }
+	{ lh r25, r26 ; xor r15, r16, r17 ; sub r5, r6, r7 }
+	{ lh r25, r26 ; xor r5, r6, r7 ; or r15, r16, r17 }
+	{ lh r25, r26 ; xor r5, r6, r7 ; sra r15, r16, r17 }
+	{ lh_u r15, r16 ; auli r5, r6, 0x1234 }
+	{ lh_u r15, r16 ; maxih r5, r6, 5 }
+	{ lh_u r15, r16 ; mulhl_ss r5, r6, r7 }
+	{ lh_u r15, r16 ; mzh r5, r6, r7 }
+	{ lh_u r15, r16 ; sadh_u r5, r6, r7 }
+	{ lh_u r15, r16 ; slt_u r5, r6, r7 }
+	{ lh_u r15, r16 ; sra r5, r6, r7 }
+	{ lh_u r25, r26 ; add r15, r16, r17 ; and r5, r6, r7 }
+	{ lh_u r25, r26 ; add r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lh_u r25, r26 ; add r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lh_u r25, r26 ; add r5, r6, r7 ; ill }
+	{ lh_u r25, r26 ; add r5, r6, r7 ; shri r15, r16, 5 }
+	{ lh_u r25, r26 ; addi r15, r16, 5 ; ctz r5, r6 }
+	{ lh_u r25, r26 ; addi r15, r16, 5 ; or r5, r6, r7 }
+	{ lh_u r25, r26 ; addi r15, r16, 5 ; sne r5, r6, r7 }
+	{ lh_u r25, r26 ; addi r5, r6, 5 ; mz r15, r16, r17 }
+	{ lh_u r25, r26 ; addi r5, r6, 5 ; slti r15, r16, 5 }
+	{ lh_u r25, r26 ; and r15, r16, r17 ; movei r5, 5 }
+	{ lh_u r25, r26 ; and r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lh_u r25, r26 ; and r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lh_u r25, r26 ; and r5, r6, r7 ; rl r15, r16, r17 }
+	{ lh_u r25, r26 ; and r5, r6, r7 ; sub r15, r16, r17 }
+	{ lh_u r25, r26 ; andi r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; andi r15, r16, 5 ; shl r5, r6, r7 }
+	{ lh_u r25, r26 ; andi r5, r6, 5 ; add r15, r16, r17 }
+	{ lh_u r25, r26 ; andi r5, r6, 5 ; seq r15, r16, r17 }
+	{ lh_u r25, r26 ; bitx r5, r6 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; bitx r5, r6 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; bytex r5, r6 ; fnop }
+	{ lh_u r25, r26 ; bytex r5, r6 ; shr r15, r16, r17 }
+	{ lh_u r25, r26 ; clz r5, r6 ; info 19 }
+	{ lh_u r25, r26 ; clz r5, r6 ; slt r15, r16, r17 }
+	{ lh_u r25, r26 ; ctz r5, r6 ; move r15, r16 }
+	{ lh_u r25, r26 ; ctz r5, r6 ; slte r15, r16, r17 }
+	{ lh_u r25, r26 ; fnop ; clz r5, r6 }
+	{ lh_u r25, r26 ; fnop ; mvnz r5, r6, r7 }
+	{ lh_u r25, r26 ; fnop ; s3a r15, r16, r17 }
+	{ lh_u r25, r26 ; fnop ; slte_u r15, r16, r17 }
+	{ lh_u r25, r26 ; fnop }
+	{ lh_u r25, r26 ; ill ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; ill ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; info 19 ; addi r15, r16, 5 }
+	{ lh_u r25, r26 ; info 19 ; mulhh_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; info 19 ; rl r15, r16, r17 }
+	{ lh_u r25, r26 ; info 19 ; shri r15, r16, 5 }
+	{ lh_u r25, r26 ; info 19 ; sub r15, r16, r17 }
+	{ lh_u r25, r26 ; mnz r15, r16, r17 ; move r5, r6 }
+	{ lh_u r25, r26 ; mnz r15, r16, r17 ; rli r5, r6, 5 }
+	{ lh_u r25, r26 ; mnz r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ lh_u r25, r26 ; mnz r5, r6, r7 ; ori r15, r16, 5 }
+	{ lh_u r25, r26 ; mnz r5, r6, r7 ; srai r15, r16, 5 }
+	{ lh_u r25, r26 ; move r15, r16 ; mulhha_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; move r15, r16 ; seqi r5, r6, 5 }
+	{ lh_u r25, r26 ; move r15, r16 }
+	{ lh_u r25, r26 ; move r5, r6 ; s3a r15, r16, r17 }
+	{ lh_u r25, r26 ; movei r15, 5 ; addi r5, r6, 5 }
+	{ lh_u r25, r26 ; movei r15, 5 ; mullla_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; movei r15, 5 ; slt r5, r6, r7 }
+	{ lh_u r25, r26 ; movei r5, 5 ; fnop }
+	{ lh_u r25, r26 ; movei r5, 5 ; shr r15, r16, r17 }
+	{ lh_u r25, r26 ; mulhh_ss r5, r6, r7 ; info 19 }
+	{ lh_u r25, r26 ; mulhh_ss r5, r6, r7 ; slt r15, r16, r17 }
+	{ lh_u r25, r26 ; mulhh_uu r5, r6, r7 ; move r15, r16 }
+	{ lh_u r25, r26 ; mulhh_uu r5, r6, r7 ; slte r15, r16, r17 }
+	{ lh_u r25, r26 ; mulhha_ss r5, r6, r7 ; mz r15, r16, r17 }
+	{ lh_u r25, r26 ; mulhha_ss r5, r6, r7 ; slti r15, r16, 5 }
+	{ lh_u r25, r26 ; mulhha_uu r5, r6, r7 ; nor r15, r16, r17 }
+	{ lh_u r25, r26 ; mulhha_uu r5, r6, r7 ; sne r15, r16, r17 }
+	{ lh_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 }
+	{ lh_u r25, r26 ; mulhlsa_uu r5, r6, r7 ; srai r15, r16, 5 }
+	{ lh_u r25, r26 ; mulll_ss r5, r6, r7 ; rli r15, r16, 5 }
+	{ lh_u r25, r26 ; mulll_ss r5, r6, r7 ; xor r15, r16, r17 }
+	{ lh_u r25, r26 ; mulll_uu r5, r6, r7 ; s2a r15, r16, r17 }
+	{ lh_u r25, r26 ; mullla_ss r5, r6, r7 ; add r15, r16, r17 }
+	{ lh_u r25, r26 ; mullla_ss r5, r6, r7 ; seq r15, r16, r17 }
+	{ lh_u r25, r26 ; mullla_uu r5, r6, r7 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; mullla_uu r5, r6, r7 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; mvnz r5, r6, r7 ; fnop }
+	{ lh_u r25, r26 ; mvnz r5, r6, r7 ; shr r15, r16, r17 }
+	{ lh_u r25, r26 ; mvz r5, r6, r7 ; info 19 }
+	{ lh_u r25, r26 ; mvz r5, r6, r7 ; slt r15, r16, r17 }
+	{ lh_u r25, r26 ; mz r15, r16, r17 ; fnop }
+	{ lh_u r25, r26 ; mz r15, r16, r17 ; ori r5, r6, 5 }
+	{ lh_u r25, r26 ; mz r15, r16, r17 ; sra r5, r6, r7 }
+	{ lh_u r25, r26 ; mz r5, r6, r7 ; nop }
+	{ lh_u r25, r26 ; mz r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ lh_u r25, r26 ; nop ; ill }
+	{ lh_u r25, r26 ; nop ; mz r5, r6, r7 }
+	{ lh_u r25, r26 ; nop ; seq r5, r6, r7 }
+	{ lh_u r25, r26 ; nop ; slti r5, r6, 5 }
+	{ lh_u r25, r26 ; nor r15, r16, r17 ; and r5, r6, r7 }
+	{ lh_u r25, r26 ; nor r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lh_u r25, r26 ; nor r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lh_u r25, r26 ; nor r5, r6, r7 ; ill }
+	{ lh_u r25, r26 ; nor r5, r6, r7 ; shri r15, r16, 5 }
+	{ lh_u r25, r26 ; or r15, r16, r17 ; ctz r5, r6 }
+	{ lh_u r25, r26 ; or r15, r16, r17 ; or r5, r6, r7 }
+	{ lh_u r25, r26 ; or r15, r16, r17 ; sne r5, r6, r7 }
+	{ lh_u r25, r26 ; or r5, r6, r7 ; mz r15, r16, r17 }
+	{ lh_u r25, r26 ; or r5, r6, r7 ; slti r15, r16, 5 }
+	{ lh_u r25, r26 ; ori r15, r16, 5 ; movei r5, 5 }
+	{ lh_u r25, r26 ; ori r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lh_u r25, r26 ; ori r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ lh_u r25, r26 ; ori r5, r6, 5 ; rl r15, r16, r17 }
+	{ lh_u r25, r26 ; ori r5, r6, 5 ; sub r15, r16, r17 }
+	{ lh_u r25, r26 ; pcnt r5, r6 ; s1a r15, r16, r17 }
+	{ lh_u r25, r26 ; pcnt r5, r6 }
+	{ lh_u r25, r26 ; rl r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; rl r15, r16, r17 ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; rl r5, r6, r7 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; rl r5, r6, r7 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; rli r15, r16, 5 ; bitx r5, r6 }
+	{ lh_u r25, r26 ; rli r15, r16, 5 ; mz r5, r6, r7 }
+	{ lh_u r25, r26 ; rli r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ lh_u r25, r26 ; rli r5, r6, 5 ; mnz r15, r16, r17 }
+	{ lh_u r25, r26 ; rli r5, r6, 5 ; slt_u r15, r16, r17 }
+	{ lh_u r25, r26 ; s1a r15, r16, r17 ; info 19 }
+	{ lh_u r25, r26 ; s1a r15, r16, r17 ; pcnt r5, r6 }
+	{ lh_u r25, r26 ; s1a r15, r16, r17 ; srai r5, r6, 5 }
+	{ lh_u r25, r26 ; s1a r5, r6, r7 ; nor r15, r16, r17 }
+	{ lh_u r25, r26 ; s1a r5, r6, r7 ; sne r15, r16, r17 }
+	{ lh_u r25, r26 ; s2a r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; s2a r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lh_u r25, r26 ; s2a r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lh_u r25, r26 ; s2a r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lh_u r25, r26 ; s2a r5, r6, r7 }
+	{ lh_u r25, r26 ; s3a r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; s3a r15, r16, r17 ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; s3a r5, r6, r7 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; s3a r5, r6, r7 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; seq r15, r16, r17 ; bitx r5, r6 }
+	{ lh_u r25, r26 ; seq r15, r16, r17 ; mz r5, r6, r7 }
+	{ lh_u r25, r26 ; seq r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lh_u r25, r26 ; seq r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lh_u r25, r26 ; seq r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lh_u r25, r26 ; seqi r15, r16, 5 ; info 19 }
+	{ lh_u r25, r26 ; seqi r15, r16, 5 ; pcnt r5, r6 }
+	{ lh_u r25, r26 ; seqi r15, r16, 5 ; srai r5, r6, 5 }
+	{ lh_u r25, r26 ; seqi r5, r6, 5 ; nor r15, r16, r17 }
+	{ lh_u r25, r26 ; seqi r5, r6, 5 ; sne r15, r16, r17 }
+	{ lh_u r25, r26 ; shl r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; shl r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lh_u r25, r26 ; shl r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lh_u r25, r26 ; shl r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lh_u r25, r26 ; shl r5, r6, r7 }
+	{ lh_u r25, r26 ; shli r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; shli r15, r16, 5 ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; shli r5, r6, 5 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; shli r5, r6, 5 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; shr r15, r16, r17 ; bitx r5, r6 }
+	{ lh_u r25, r26 ; shr r15, r16, r17 ; mz r5, r6, r7 }
+	{ lh_u r25, r26 ; shr r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lh_u r25, r26 ; shr r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lh_u r25, r26 ; shr r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lh_u r25, r26 ; shri r15, r16, 5 ; info 19 }
+	{ lh_u r25, r26 ; shri r15, r16, 5 ; pcnt r5, r6 }
+	{ lh_u r25, r26 ; shri r15, r16, 5 ; srai r5, r6, 5 }
+	{ lh_u r25, r26 ; shri r5, r6, 5 ; nor r15, r16, r17 }
+	{ lh_u r25, r26 ; shri r5, r6, 5 ; sne r15, r16, r17 }
+	{ lh_u r25, r26 ; slt r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; slt r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lh_u r25, r26 ; slt r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lh_u r25, r26 ; slt r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lh_u r25, r26 ; slt r5, r6, r7 }
+	{ lh_u r25, r26 ; slt_u r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; slt_u r15, r16, r17 ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; slt_u r5, r6, r7 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; slt_u r5, r6, r7 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; slte r15, r16, r17 ; bitx r5, r6 }
+	{ lh_u r25, r26 ; slte r15, r16, r17 ; mz r5, r6, r7 }
+	{ lh_u r25, r26 ; slte r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lh_u r25, r26 ; slte r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lh_u r25, r26 ; slte r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lh_u r25, r26 ; slte_u r15, r16, r17 ; info 19 }
+	{ lh_u r25, r26 ; slte_u r15, r16, r17 ; pcnt r5, r6 }
+	{ lh_u r25, r26 ; slte_u r15, r16, r17 ; srai r5, r6, 5 }
+	{ lh_u r25, r26 ; slte_u r5, r6, r7 ; nor r15, r16, r17 }
+	{ lh_u r25, r26 ; slte_u r5, r6, r7 ; sne r15, r16, r17 }
+	{ lh_u r25, r26 ; slti r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; slti r15, r16, 5 ; s3a r5, r6, r7 }
+	{ lh_u r25, r26 ; slti r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ lh_u r25, r26 ; slti r5, r6, 5 ; s1a r15, r16, r17 }
+	{ lh_u r25, r26 ; slti r5, r6, 5 }
+	{ lh_u r25, r26 ; slti_u r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; slti_u r15, r16, 5 ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; slti_u r5, r6, 5 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; slti_u r5, r6, 5 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; sne r15, r16, r17 ; bitx r5, r6 }
+	{ lh_u r25, r26 ; sne r15, r16, r17 ; mz r5, r6, r7 }
+	{ lh_u r25, r26 ; sne r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ lh_u r25, r26 ; sne r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lh_u r25, r26 ; sne r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lh_u r25, r26 ; sra r15, r16, r17 ; info 19 }
+	{ lh_u r25, r26 ; sra r15, r16, r17 ; pcnt r5, r6 }
+	{ lh_u r25, r26 ; sra r15, r16, r17 ; srai r5, r6, 5 }
+	{ lh_u r25, r26 ; sra r5, r6, r7 ; nor r15, r16, r17 }
+	{ lh_u r25, r26 ; sra r5, r6, r7 ; sne r15, r16, r17 }
+	{ lh_u r25, r26 ; srai r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; srai r15, r16, 5 ; s3a r5, r6, r7 }
+	{ lh_u r25, r26 ; srai r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ lh_u r25, r26 ; srai r5, r6, 5 ; s1a r15, r16, r17 }
+	{ lh_u r25, r26 ; srai r5, r6, 5 }
+	{ lh_u r25, r26 ; sub r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ lh_u r25, r26 ; sub r15, r16, r17 ; shr r5, r6, r7 }
+	{ lh_u r25, r26 ; sub r5, r6, r7 ; and r15, r16, r17 }
+	{ lh_u r25, r26 ; sub r5, r6, r7 ; shl r15, r16, r17 }
+	{ lh_u r25, r26 ; tblidxb0 r5, r6 ; fnop }
+	{ lh_u r25, r26 ; tblidxb0 r5, r6 ; shr r15, r16, r17 }
+	{ lh_u r25, r26 ; tblidxb1 r5, r6 ; info 19 }
+	{ lh_u r25, r26 ; tblidxb1 r5, r6 ; slt r15, r16, r17 }
+	{ lh_u r25, r26 ; tblidxb2 r5, r6 ; move r15, r16 }
+	{ lh_u r25, r26 ; tblidxb2 r5, r6 ; slte r15, r16, r17 }
+	{ lh_u r25, r26 ; tblidxb3 r5, r6 ; mz r15, r16, r17 }
+	{ lh_u r25, r26 ; tblidxb3 r5, r6 ; slti r15, r16, 5 }
+	{ lh_u r25, r26 ; xor r15, r16, r17 ; movei r5, 5 }
+	{ lh_u r25, r26 ; xor r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lh_u r25, r26 ; xor r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lh_u r25, r26 ; xor r5, r6, r7 ; rl r15, r16, r17 }
+	{ lh_u r25, r26 ; xor r5, r6, r7 ; sub r15, r16, r17 }
+	{ lhadd r15, r16, 5 ; avgh r5, r6, r7 }
+	{ lhadd r15, r16, 5 ; minh r5, r6, r7 }
+	{ lhadd r15, r16, 5 ; mulhl_us r5, r6, r7 }
+	{ lhadd r15, r16, 5 ; nor r5, r6, r7 }
+	{ lhadd r15, r16, 5 ; seqb r5, r6, r7 }
+	{ lhadd r15, r16, 5 ; sltb_u r5, r6, r7 }
+	{ lhadd r15, r16, 5 ; srah r5, r6, r7 }
+	{ lhadd_u r15, r16, 5 ; addhs r5, r6, r7 }
+	{ lhadd_u r15, r16, 5 ; dword_align r5, r6, r7 }
+	{ lhadd_u r15, r16, 5 ; move r5, r6 }
+	{ lhadd_u r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ lhadd_u r15, r16, 5 ; pcnt r5, r6 }
+	{ lhadd_u r15, r16, 5 ; shlh r5, r6, r7 }
+	{ lhadd_u r15, r16, 5 ; slth r5, r6, r7 }
+	{ lhadd_u r15, r16, 5 ; subh r5, r6, r7 }
+	{ lnk r15 ; adiffb_u r5, r6, r7 }
+	{ lnk r15 ; intlh r5, r6, r7 }
+	{ lnk r15 ; mulhha_ss r5, r6, r7 }
+	{ lnk r15 ; mvnz r5, r6, r7 }
+	{ lnk r15 ; sadah r5, r6, r7 }
+	{ lnk r15 ; shri r5, r6, 5 }
+	{ lnk r15 ; sltih_u r5, r6, 5 }
+	{ lnk r15 ; xor r5, r6, r7 }
+	{ lw r15, r16 ; bitx r5, r6 }
+	{ lw r15, r16 ; minib_u r5, r6, 5 }
+	{ lw r15, r16 ; mulhl_uu r5, r6, r7 }
+	{ lw r15, r16 ; or r5, r6, r7 }
+	{ lw r15, r16 ; seqh r5, r6, r7 }
+	{ lw r15, r16 ; slte r5, r6, r7 }
+	{ lw r15, r16 ; srai r5, r6, 5 }
+	{ lw r25, r26 ; add r15, r16, r17 ; bytex r5, r6 }
+	{ lw r25, r26 ; add r15, r16, r17 ; nop }
+	{ lw r25, r26 ; add r15, r16, r17 ; slti r5, r6, 5 }
+	{ lw r25, r26 ; add r5, r6, r7 ; move r15, r16 }
+	{ lw r25, r26 ; add r5, r6, r7 ; slte r15, r16, r17 }
+	{ lw r25, r26 ; addi r15, r16, 5 ; mnz r5, r6, r7 }
+	{ lw r25, r26 ; addi r15, r16, 5 ; rl r5, r6, r7 }
+	{ lw r25, r26 ; addi r15, r16, 5 ; sub r5, r6, r7 }
+	{ lw r25, r26 ; addi r5, r6, 5 ; or r15, r16, r17 }
+	{ lw r25, r26 ; addi r5, r6, 5 ; sra r15, r16, r17 }
+	{ lw r25, r26 ; and r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ lw r25, r26 ; and r15, r16, r17 ; seq r5, r6, r7 }
+	{ lw r25, r26 ; and r15, r16, r17 ; xor r5, r6, r7 }
+	{ lw r25, r26 ; and r5, r6, r7 ; s2a r15, r16, r17 }
+	{ lw r25, r26 ; andi r15, r16, 5 ; add r5, r6, r7 }
+	{ lw r25, r26 ; andi r15, r16, 5 ; mullla_ss r5, r6, r7 }
+	{ lw r25, r26 ; andi r15, r16, 5 ; shri r5, r6, 5 }
+	{ lw r25, r26 ; andi r5, r6, 5 ; andi r15, r16, 5 }
+	{ lw r25, r26 ; andi r5, r6, 5 ; shli r15, r16, 5 }
+	{ lw r25, r26 ; bitx r5, r6 ; ill }
+	{ lw r25, r26 ; bitx r5, r6 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; bytex r5, r6 ; mnz r15, r16, r17 }
+	{ lw r25, r26 ; bytex r5, r6 ; slt_u r15, r16, r17 }
+	{ lw r25, r26 ; clz r5, r6 ; movei r15, 5 }
+	{ lw r25, r26 ; clz r5, r6 ; slte_u r15, r16, r17 }
+	{ lw r25, r26 ; ctz r5, r6 ; nop }
+	{ lw r25, r26 ; ctz r5, r6 ; slti_u r15, r16, 5 }
+	{ lw r25, r26 ; fnop ; ill }
+	{ lw r25, r26 ; fnop ; mz r5, r6, r7 }
+	{ lw r25, r26 ; fnop ; seq r5, r6, r7 }
+	{ lw r25, r26 ; fnop ; slti r5, r6, 5 }
+	{ lw r25, r26 ; ill ; and r5, r6, r7 }
+	{ lw r25, r26 ; ill ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; ill ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; info 19 ; and r5, r6, r7 }
+	{ lw r25, r26 ; info 19 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; info 19 ; rli r5, r6, 5 }
+	{ lw r25, r26 ; info 19 ; slt r5, r6, r7 }
+	{ lw r25, r26 ; info 19 ; tblidxb1 r5, r6 }
+	{ lw r25, r26 ; mnz r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ lw r25, r26 ; mnz r15, r16, r17 ; s3a r5, r6, r7 }
+	{ lw r25, r26 ; mnz r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ lw r25, r26 ; mnz r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lw r25, r26 ; mnz r5, r6, r7 }
+	{ lw r25, r26 ; move r15, r16 ; mulll_uu r5, r6, r7 }
+	{ lw r25, r26 ; move r15, r16 ; shr r5, r6, r7 }
+	{ lw r25, r26 ; move r5, r6 ; and r15, r16, r17 }
+	{ lw r25, r26 ; move r5, r6 ; shl r15, r16, r17 }
+	{ lw r25, r26 ; movei r15, 5 ; bitx r5, r6 }
+	{ lw r25, r26 ; movei r15, 5 ; mz r5, r6, r7 }
+	{ lw r25, r26 ; movei r15, 5 ; slte_u r5, r6, r7 }
+	{ lw r25, r26 ; movei r5, 5 ; mnz r15, r16, r17 }
+	{ lw r25, r26 ; movei r5, 5 ; slt_u r15, r16, r17 }
+	{ lw r25, r26 ; mulhh_ss r5, r6, r7 ; movei r15, 5 }
+	{ lw r25, r26 ; mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lw r25, r26 ; mulhh_uu r5, r6, r7 ; nop }
+	{ lw r25, r26 ; mulhh_uu r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ lw r25, r26 ; mulhha_ss r5, r6, r7 ; or r15, r16, r17 }
+	{ lw r25, r26 ; mulhha_ss r5, r6, r7 ; sra r15, r16, r17 }
+	{ lw r25, r26 ; mulhha_uu r5, r6, r7 ; rl r15, r16, r17 }
+	{ lw r25, r26 ; mulhha_uu r5, r6, r7 ; sub r15, r16, r17 }
+	{ lw r25, r26 ; mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 }
+	{ lw r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; mulll_ss r5, r6, r7 ; s3a r15, r16, r17 }
+	{ lw r25, r26 ; mulll_uu r5, r6, r7 ; addi r15, r16, 5 }
+	{ lw r25, r26 ; mulll_uu r5, r6, r7 ; seqi r15, r16, 5 }
+	{ lw r25, r26 ; mullla_ss r5, r6, r7 ; andi r15, r16, 5 }
+	{ lw r25, r26 ; mullla_ss r5, r6, r7 ; shli r15, r16, 5 }
+	{ lw r25, r26 ; mullla_uu r5, r6, r7 ; ill }
+	{ lw r25, r26 ; mullla_uu r5, r6, r7 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; mvnz r5, r6, r7 ; mnz r15, r16, r17 }
+	{ lw r25, r26 ; mvnz r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ lw r25, r26 ; mvz r5, r6, r7 ; movei r15, 5 }
+	{ lw r25, r26 ; mvz r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ lw r25, r26 ; mz r15, r16, r17 ; move r5, r6 }
+	{ lw r25, r26 ; mz r15, r16, r17 ; rli r5, r6, 5 }
+	{ lw r25, r26 ; mz r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ lw r25, r26 ; mz r5, r6, r7 ; ori r15, r16, 5 }
+	{ lw r25, r26 ; mz r5, r6, r7 ; srai r15, r16, 5 }
+	{ lw r25, r26 ; nop ; mnz r5, r6, r7 }
+	{ lw r25, r26 ; nop ; nor r5, r6, r7 }
+	{ lw r25, r26 ; nop ; shl r15, r16, r17 }
+	{ lw r25, r26 ; nop ; sne r15, r16, r17 }
+	{ lw r25, r26 ; nor r15, r16, r17 ; bytex r5, r6 }
+	{ lw r25, r26 ; nor r15, r16, r17 ; nop }
+	{ lw r25, r26 ; nor r15, r16, r17 ; slti r5, r6, 5 }
+	{ lw r25, r26 ; nor r5, r6, r7 ; move r15, r16 }
+	{ lw r25, r26 ; nor r5, r6, r7 ; slte r15, r16, r17 }
+	{ lw r25, r26 ; or r15, r16, r17 ; mnz r5, r6, r7 }
+	{ lw r25, r26 ; or r15, r16, r17 ; rl r5, r6, r7 }
+	{ lw r25, r26 ; or r15, r16, r17 ; sub r5, r6, r7 }
+	{ lw r25, r26 ; or r5, r6, r7 ; or r15, r16, r17 }
+	{ lw r25, r26 ; or r5, r6, r7 ; sra r15, r16, r17 }
+	{ lw r25, r26 ; ori r15, r16, 5 ; mulhha_ss r5, r6, r7 }
+	{ lw r25, r26 ; ori r15, r16, 5 ; seq r5, r6, r7 }
+	{ lw r25, r26 ; ori r15, r16, 5 ; xor r5, r6, r7 }
+	{ lw r25, r26 ; ori r5, r6, 5 ; s2a r15, r16, r17 }
+	{ lw r25, r26 ; pcnt r5, r6 ; add r15, r16, r17 }
+	{ lw r25, r26 ; pcnt r5, r6 ; seq r15, r16, r17 }
+	{ lw r25, r26 ; rl r15, r16, r17 ; and r5, r6, r7 }
+	{ lw r25, r26 ; rl r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; rl r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; rl r5, r6, r7 ; ill }
+	{ lw r25, r26 ; rl r5, r6, r7 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; rli r15, r16, 5 ; ctz r5, r6 }
+	{ lw r25, r26 ; rli r15, r16, 5 ; or r5, r6, r7 }
+	{ lw r25, r26 ; rli r15, r16, 5 ; sne r5, r6, r7 }
+	{ lw r25, r26 ; rli r5, r6, 5 ; mz r15, r16, r17 }
+	{ lw r25, r26 ; rli r5, r6, 5 ; slti r15, r16, 5 }
+	{ lw r25, r26 ; s1a r15, r16, r17 ; movei r5, 5 }
+	{ lw r25, r26 ; s1a r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lw r25, r26 ; s1a r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lw r25, r26 ; s1a r5, r6, r7 ; rl r15, r16, r17 }
+	{ lw r25, r26 ; s1a r5, r6, r7 ; sub r15, r16, r17 }
+	{ lw r25, r26 ; s2a r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; s2a r15, r16, r17 ; shl r5, r6, r7 }
+	{ lw r25, r26 ; s2a r5, r6, r7 ; add r15, r16, r17 }
+	{ lw r25, r26 ; s2a r5, r6, r7 ; seq r15, r16, r17 }
+	{ lw r25, r26 ; s3a r15, r16, r17 ; and r5, r6, r7 }
+	{ lw r25, r26 ; s3a r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; s3a r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; s3a r5, r6, r7 ; ill }
+	{ lw r25, r26 ; s3a r5, r6, r7 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; seq r15, r16, r17 ; ctz r5, r6 }
+	{ lw r25, r26 ; seq r15, r16, r17 ; or r5, r6, r7 }
+	{ lw r25, r26 ; seq r15, r16, r17 ; sne r5, r6, r7 }
+	{ lw r25, r26 ; seq r5, r6, r7 ; mz r15, r16, r17 }
+	{ lw r25, r26 ; seq r5, r6, r7 ; slti r15, r16, 5 }
+	{ lw r25, r26 ; seqi r15, r16, 5 ; movei r5, 5 }
+	{ lw r25, r26 ; seqi r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lw r25, r26 ; seqi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ lw r25, r26 ; seqi r5, r6, 5 ; rl r15, r16, r17 }
+	{ lw r25, r26 ; seqi r5, r6, 5 ; sub r15, r16, r17 }
+	{ lw r25, r26 ; shl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; shl r15, r16, r17 ; shl r5, r6, r7 }
+	{ lw r25, r26 ; shl r5, r6, r7 ; add r15, r16, r17 }
+	{ lw r25, r26 ; shl r5, r6, r7 ; seq r15, r16, r17 }
+	{ lw r25, r26 ; shli r15, r16, 5 ; and r5, r6, r7 }
+	{ lw r25, r26 ; shli r15, r16, 5 ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; shli r15, r16, 5 ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; shli r5, r6, 5 ; ill }
+	{ lw r25, r26 ; shli r5, r6, 5 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; shr r15, r16, r17 ; ctz r5, r6 }
+	{ lw r25, r26 ; shr r15, r16, r17 ; or r5, r6, r7 }
+	{ lw r25, r26 ; shr r15, r16, r17 ; sne r5, r6, r7 }
+	{ lw r25, r26 ; shr r5, r6, r7 ; mz r15, r16, r17 }
+	{ lw r25, r26 ; shr r5, r6, r7 ; slti r15, r16, 5 }
+	{ lw r25, r26 ; shri r15, r16, 5 ; movei r5, 5 }
+	{ lw r25, r26 ; shri r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lw r25, r26 ; shri r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ lw r25, r26 ; shri r5, r6, 5 ; rl r15, r16, r17 }
+	{ lw r25, r26 ; shri r5, r6, 5 ; sub r15, r16, r17 }
+	{ lw r25, r26 ; slt r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; slt r15, r16, r17 ; shl r5, r6, r7 }
+	{ lw r25, r26 ; slt r5, r6, r7 ; add r15, r16, r17 }
+	{ lw r25, r26 ; slt r5, r6, r7 ; seq r15, r16, r17 }
+	{ lw r25, r26 ; slt_u r15, r16, r17 ; and r5, r6, r7 }
+	{ lw r25, r26 ; slt_u r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; slt_u r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; slt_u r5, r6, r7 ; ill }
+	{ lw r25, r26 ; slt_u r5, r6, r7 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; slte r15, r16, r17 ; ctz r5, r6 }
+	{ lw r25, r26 ; slte r15, r16, r17 ; or r5, r6, r7 }
+	{ lw r25, r26 ; slte r15, r16, r17 ; sne r5, r6, r7 }
+	{ lw r25, r26 ; slte r5, r6, r7 ; mz r15, r16, r17 }
+	{ lw r25, r26 ; slte r5, r6, r7 ; slti r15, r16, 5 }
+	{ lw r25, r26 ; slte_u r15, r16, r17 ; movei r5, 5 }
+	{ lw r25, r26 ; slte_u r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lw r25, r26 ; slte_u r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lw r25, r26 ; slte_u r5, r6, r7 ; rl r15, r16, r17 }
+	{ lw r25, r26 ; slte_u r5, r6, r7 ; sub r15, r16, r17 }
+	{ lw r25, r26 ; slti r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; slti r15, r16, 5 ; shl r5, r6, r7 }
+	{ lw r25, r26 ; slti r5, r6, 5 ; add r15, r16, r17 }
+	{ lw r25, r26 ; slti r5, r6, 5 ; seq r15, r16, r17 }
+	{ lw r25, r26 ; slti_u r15, r16, 5 ; and r5, r6, r7 }
+	{ lw r25, r26 ; slti_u r15, r16, 5 ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; slti_u r15, r16, 5 ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; slti_u r5, r6, 5 ; ill }
+	{ lw r25, r26 ; slti_u r5, r6, 5 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; sne r15, r16, r17 ; ctz r5, r6 }
+	{ lw r25, r26 ; sne r15, r16, r17 ; or r5, r6, r7 }
+	{ lw r25, r26 ; sne r15, r16, r17 ; sne r5, r6, r7 }
+	{ lw r25, r26 ; sne r5, r6, r7 ; mz r15, r16, r17 }
+	{ lw r25, r26 ; sne r5, r6, r7 ; slti r15, r16, 5 }
+	{ lw r25, r26 ; sra r15, r16, r17 ; movei r5, 5 }
+	{ lw r25, r26 ; sra r15, r16, r17 ; s1a r5, r6, r7 }
+	{ lw r25, r26 ; sra r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ lw r25, r26 ; sra r5, r6, r7 ; rl r15, r16, r17 }
+	{ lw r25, r26 ; sra r5, r6, r7 ; sub r15, r16, r17 }
+	{ lw r25, r26 ; srai r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ lw r25, r26 ; srai r15, r16, 5 ; shl r5, r6, r7 }
+	{ lw r25, r26 ; srai r5, r6, 5 ; add r15, r16, r17 }
+	{ lw r25, r26 ; srai r5, r6, 5 ; seq r15, r16, r17 }
+	{ lw r25, r26 ; sub r15, r16, r17 ; and r5, r6, r7 }
+	{ lw r25, r26 ; sub r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ lw r25, r26 ; sub r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ lw r25, r26 ; sub r5, r6, r7 ; ill }
+	{ lw r25, r26 ; sub r5, r6, r7 ; shri r15, r16, 5 }
+	{ lw r25, r26 ; tblidxb0 r5, r6 ; mnz r15, r16, r17 }
+	{ lw r25, r26 ; tblidxb0 r5, r6 ; slt_u r15, r16, r17 }
+	{ lw r25, r26 ; tblidxb1 r5, r6 ; movei r15, 5 }
+	{ lw r25, r26 ; tblidxb1 r5, r6 ; slte_u r15, r16, r17 }
+	{ lw r25, r26 ; tblidxb2 r5, r6 ; nop }
+	{ lw r25, r26 ; tblidxb2 r5, r6 ; slti_u r15, r16, 5 }
+	{ lw r25, r26 ; tblidxb3 r5, r6 ; or r15, r16, r17 }
+	{ lw r25, r26 ; tblidxb3 r5, r6 ; sra r15, r16, r17 }
+	{ lw r25, r26 ; xor r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ lw r25, r26 ; xor r15, r16, r17 ; seq r5, r6, r7 }
+	{ lw r25, r26 ; xor r15, r16, r17 ; xor r5, r6, r7 }
+	{ lw r25, r26 ; xor r5, r6, r7 ; s2a r15, r16, r17 }
+	{ lw_na r15, r16 ; add r5, r6, r7 }
+	{ lw_na r15, r16 ; clz r5, r6 }
+	{ lw_na r15, r16 ; mm r5, r6, r7, 5, 7 }
+	{ lw_na r15, r16 ; mulhla_su r5, r6, r7 }
+	{ lw_na r15, r16 ; packbs_u r5, r6, r7 }
+	{ lw_na r15, r16 ; seqib r5, r6, 5 }
+	{ lw_na r15, r16 ; slteb r5, r6, r7 }
+	{ lw_na r15, r16 ; sraih r5, r6, 5 }
+	{ lwadd r15, r16, 5 ; addih r5, r6, 5 }
+	{ lwadd r15, r16, 5 ; infol 0x1234 }
+	{ lwadd r15, r16, 5 ; movelis r5, 0x1234 }
+	{ lwadd r15, r16, 5 ; mullla_ss r5, r6, r7 }
+	{ lwadd r15, r16, 5 ; s1a r5, r6, r7 }
+	{ lwadd r15, r16, 5 ; shlih r5, r6, 5 }
+	{ lwadd r15, r16, 5 ; slti_u r5, r6, 5 }
+	{ lwadd r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ lwadd_na r15, r16, 5 ; andi r5, r6, 5 }
+	{ lwadd_na r15, r16, 5 ; maxib_u r5, r6, 5 }
+	{ lwadd_na r15, r16, 5 ; mulhhsa_uu r5, r6, r7 }
+	{ lwadd_na r15, r16, 5 ; mzb r5, r6, r7 }
+	{ lwadd_na r15, r16, 5 ; sadh r5, r6, r7 }
+	{ lwadd_na r15, r16, 5 ; slt r5, r6, r7 }
+	{ lwadd_na r15, r16, 5 ; sneh r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; addb r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; crc32_32 r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; mnz r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; mulhla_us r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; packhb r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; seqih r5, r6, 5 }
+	{ maxb_u r15, r16, r17 ; slteb_u r5, r6, r7 }
+	{ maxb_u r15, r16, r17 ; sub r5, r6, r7 }
+	{ maxb_u r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ maxb_u r5, r6, r7 ; jalr r15 }
+	{ maxb_u r5, r6, r7 ; maxih r15, r16, 5 }
+	{ maxb_u r5, r6, r7 ; nor r15, r16, r17 }
+	{ maxb_u r5, r6, r7 ; seqib r15, r16, 5 }
+	{ maxb_u r5, r6, r7 ; slte r15, r16, r17 }
+	{ maxb_u r5, r6, r7 ; srai r15, r16, 5 }
+	{ maxh r15, r16, r17 ; addi r5, r6, 5 }
+	{ maxh r15, r16, r17 ; fnop }
+	{ maxh r15, r16, r17 ; movei r5, 5 }
+	{ maxh r15, r16, r17 ; mulll_su r5, r6, r7 }
+	{ maxh r15, r16, r17 ; rl r5, r6, r7 }
+	{ maxh r15, r16, r17 ; shli r5, r6, 5 }
+	{ maxh r15, r16, r17 ; slth_u r5, r6, r7 }
+	{ maxh r15, r16, r17 ; subhs r5, r6, r7 }
+	{ maxh r5, r6, r7 ; andi r15, r16, 5 }
+	{ maxh r5, r6, r7 ; lb r15, r16 }
+	{ maxh r5, r6, r7 ; minh r15, r16, r17 }
+	{ maxh r5, r6, r7 ; packhb r15, r16, r17 }
+	{ maxh r5, r6, r7 ; shl r15, r16, r17 }
+	{ maxh r5, r6, r7 ; slteh r15, r16, r17 }
+	{ maxh r5, r6, r7 ; subb r15, r16, r17 }
+	{ maxib_u r15, r16, 5 ; addlis r5, r6, 0x1234 }
+	{ maxib_u r15, r16, 5 ; inthh r5, r6, r7 }
+	{ maxib_u r15, r16, 5 ; mulhh_su r5, r6, r7 }
+	{ maxib_u r15, r16, 5 ; mullla_uu r5, r6, r7 }
+	{ maxib_u r15, r16, 5 ; s3a r5, r6, r7 }
+	{ maxib_u r15, r16, 5 ; shrb r5, r6, r7 }
+	{ maxib_u r15, r16, 5 ; sltib_u r5, r6, 5 }
+	{ maxib_u r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ maxib_u r5, r6, 5 ; flush r15 }
+	{ maxib_u r5, r6, 5 ; lh r15, r16 }
+	{ maxib_u r5, r6, 5 ; mnz r15, r16, r17 }
+	{ maxib_u r5, r6, 5 ; raise }
+	{ maxib_u r5, r6, 5 ; shlib r15, r16, 5 }
+	{ maxib_u r5, r6, 5 ; slti r15, r16, 5 }
+	{ maxib_u r5, r6, 5 ; subs r15, r16, r17 }
+	{ maxih r15, r16, 5 ; and r5, r6, r7 }
+	{ maxih r15, r16, 5 ; maxh r5, r6, r7 }
+	{ maxih r15, r16, 5 ; mulhha_uu r5, r6, r7 }
+	{ maxih r15, r16, 5 ; mz r5, r6, r7 }
+	{ maxih r15, r16, 5 ; sadb_u r5, r6, r7 }
+	{ maxih r15, r16, 5 ; shrih r5, r6, 5 }
+	{ maxih r15, r16, 5 ; sneb r5, r6, r7 }
+	{ maxih r5, r6, 5 ; add r15, r16, r17 }
+	{ maxih r5, r6, 5 ; info 19 }
+	{ maxih r5, r6, 5 ; lnk r15 }
+	{ maxih r5, r6, 5 ; movei r15, 5 }
+	{ maxih r5, r6, 5 ; s2a r15, r16, r17 }
+	{ maxih r5, r6, 5 ; shrh r15, r16, r17 }
+	{ maxih r5, r6, 5 ; sltih r15, r16, 5 }
+	{ maxih r5, r6, 5 ; wh64 r15 }
+	{ mf ; avgh r5, r6, r7 }
+	{ mf ; minh r5, r6, r7 }
+	{ mf ; mulhl_us r5, r6, r7 }
+	{ mf ; nor r5, r6, r7 }
+	{ mf ; seqb r5, r6, r7 }
+	{ mf ; sltb_u r5, r6, r7 }
+	{ mf ; srah r5, r6, r7 }
+	{ mfspr r16, 0x5 ; addhs r5, r6, r7 }
+	{ mfspr r16, 0x5 ; dword_align r5, r6, r7 }
+	{ mfspr r16, 0x5 ; move r5, r6 }
+	{ mfspr r16, 0x5 ; mulll_ss r5, r6, r7 }
+	{ mfspr r16, 0x5 ; pcnt r5, r6 }
+	{ mfspr r16, 0x5 ; shlh r5, r6, r7 }
+	{ mfspr r16, 0x5 ; slth r5, r6, r7 }
+	{ mfspr r16, 0x5 ; subh r5, r6, r7 }
+	{ minb_u r15, r16, r17 ; adiffb_u r5, r6, r7 }
+	{ minb_u r15, r16, r17 ; intlh r5, r6, r7 }
+	{ minb_u r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ minb_u r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ minb_u r15, r16, r17 ; sadah r5, r6, r7 }
+	{ minb_u r15, r16, r17 ; shri r5, r6, 5 }
+	{ minb_u r15, r16, r17 ; sltih_u r5, r6, 5 }
+	{ minb_u r15, r16, r17 ; xor r5, r6, r7 }
+	{ minb_u r5, r6, r7 ; icoh r15 }
+	{ minb_u r5, r6, r7 ; lhadd r15, r16, 5 }
+	{ minb_u r5, r6, r7 ; mnzh r15, r16, r17 }
+	{ minb_u r5, r6, r7 ; rli r15, r16, 5 }
+	{ minb_u r5, r6, r7 ; shr r15, r16, r17 }
+	{ minb_u r5, r6, r7 ; sltib r15, r16, 5 }
+	{ minb_u r5, r6, r7 ; swadd r15, r16, 5 }
+	{ minh r15, r16, r17 ; auli r5, r6, 0x1234 }
+	{ minh r15, r16, r17 ; maxih r5, r6, 5 }
+	{ minh r15, r16, r17 ; mulhl_ss r5, r6, r7 }
+	{ minh r15, r16, r17 ; mzh r5, r6, r7 }
+	{ minh r15, r16, r17 ; sadh_u r5, r6, r7 }
+	{ minh r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ minh r15, r16, r17 ; sra r5, r6, r7 }
+	{ minh r5, r6, r7 ; addbs_u r15, r16, r17 }
+	{ minh r5, r6, r7 ; inthb r15, r16, r17 }
+	{ minh r5, r6, r7 ; lw_na r15, r16 }
+	{ minh r5, r6, r7 ; movelis r15, 0x1234 }
+	{ minh r5, r6, r7 ; sb r15, r16 }
+	{ minh r5, r6, r7 ; shrib r15, r16, 5 }
+	{ minh r5, r6, r7 ; sne r15, r16, r17 }
+	{ minh r5, r6, r7 ; xori r15, r16, 5 }
+	{ minib_u r15, r16, 5 ; bytex r5, r6 }
+	{ minib_u r15, r16, 5 ; minih r5, r6, 5 }
+	{ minib_u r15, r16, 5 ; mulhla_ss r5, r6, r7 }
+	{ minib_u r15, r16, 5 ; ori r5, r6, 5 }
+	{ minib_u r15, r16, 5 ; seqi r5, r6, 5 }
+	{ minib_u r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ minib_u r15, r16, 5 ; sraib r5, r6, 5 }
+	{ minib_u r5, r6, 5 ; addib r15, r16, 5 }
+	{ minib_u r5, r6, 5 ; inv r15 }
+	{ minib_u r5, r6, 5 ; maxh r15, r16, r17 }
+	{ minib_u r5, r6, 5 ; mzh r15, r16, r17 }
+	{ minib_u r5, r6, 5 ; seqh r15, r16, r17 }
+	{ minib_u r5, r6, 5 ; sltb r15, r16, r17 }
+	{ minib_u r5, r6, 5 ; srab r15, r16, r17 }
+	{ minih r15, r16, 5 ; addh r5, r6, r7 }
+	{ minih r15, r16, 5 ; ctz r5, r6 }
+	{ minih r15, r16, 5 ; mnzh r5, r6, r7 }
+	{ minih r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ minih r15, r16, 5 ; packlb r5, r6, r7 }
+	{ minih r15, r16, 5 ; shlb r5, r6, r7 }
+	{ minih r15, r16, 5 ; slteh_u r5, r6, r7 }
+	{ minih r15, r16, 5 ; subbs_u r5, r6, r7 }
+	{ minih r5, r6, 5 ; adds r15, r16, r17 }
+	{ minih r5, r6, 5 ; jr r15 }
+	{ minih r5, r6, 5 ; mfspr r16, 0x5 }
+	{ minih r5, r6, 5 ; ori r15, r16, 5 }
+	{ minih r5, r6, 5 ; sh r15, r16 }
+	{ minih r5, r6, 5 ; slteb r15, r16, r17 }
+	{ minih r5, r6, 5 ; sraih r15, r16, 5 }
+	{ mm r15, r16, r17, 5, 7 ; addih r5, r6, 5 }
+	{ mm r15, r16, r17, 5, 7 ; infol 0x1234 }
+	{ mm r15, r16, r17, 5, 7 ; movelis r5, 0x1234 }
+	{ mm r15, r16, r17, 5, 7 ; mullla_ss r5, r6, r7 }
+	{ mm r15, r16, r17, 5, 7 ; s1a r5, r6, r7 }
+	{ mm r15, r16, r17, 5, 7 ; shlih r5, r6, 5 }
+	{ mm r15, r16, r17, 5, 7 ; slti_u r5, r6, 5 }
+	{ mm r15, r16, r17, 5, 7 ; tblidxb0 r5, r6 }
+	{ mm r5, r6, r7, 5, 7 ; dtlbpr r15 }
+	{ mm r5, r6, r7, 5, 7 ; lbadd r15, r16, 5 }
+	{ mm r5, r6, r7, 5, 7 ; minih r15, r16, 5 }
+	{ mm r5, r6, r7, 5, 7 ; packlb r15, r16, r17 }
+	{ mm r5, r6, r7, 5, 7 ; shlh r15, r16, r17 }
+	{ mm r5, r6, r7, 5, 7 ; slth r15, r16, r17 }
+	{ mm r5, r6, r7, 5, 7 ; subh r15, r16, r17 }
+	{ mnz r15, r16, r17 ; addbs_u r5, r6, r7 }
+	{ mnz r15, r16, r17 ; and r5, r6, r7 ; lb r25, r26 }
+	{ mnz r15, r16, r17 ; auli r5, r6, 0x1234 }
+	{ mnz r15, r16, r17 ; bytex r5, r6 ; sh r25, r26 }
+	{ mnz r15, r16, r17 ; ctz r5, r6 ; prefetch r25 }
+	{ mnz r15, r16, r17 ; info 19 ; lw r25, r26 }
+	{ mnz r15, r16, r17 ; lb r25, r26 ; info 19 }
+	{ mnz r15, r16, r17 ; lb r25, r26 ; pcnt r5, r6 }
+	{ mnz r15, r16, r17 ; lb r25, r26 ; srai r5, r6, 5 }
+	{ mnz r15, r16, r17 ; lb_u r25, r26 ; movei r5, 5 }
+	{ mnz r15, r16, r17 ; lb_u r25, r26 ; s1a r5, r6, r7 }
+	{ mnz r15, r16, r17 ; lb_u r25, r26 ; tblidxb1 r5, r6 }
+	{ mnz r15, r16, r17 ; lh r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ mnz r15, r16, r17 ; lh r25, r26 ; seq r5, r6, r7 }
+	{ mnz r15, r16, r17 ; lh r25, r26 ; xor r5, r6, r7 }
+	{ mnz r15, r16, r17 ; lh_u r25, r26 ; mulll_ss r5, r6, r7 }
+	{ mnz r15, r16, r17 ; lh_u r25, r26 ; shli r5, r6, 5 }
+	{ mnz r15, r16, r17 ; lw r25, r26 ; addi r5, r6, 5 }
+	{ mnz r15, r16, r17 ; lw r25, r26 ; mullla_uu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; lw r25, r26 ; slt r5, r6, r7 }
+	{ mnz r15, r16, r17 ; minb_u r5, r6, r7 }
+	{ mnz r15, r16, r17 ; move r5, r6 ; lh_u r25, r26 }
+	{ mnz r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ mnz r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lb r25, r26 }
+	{ mnz r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; mulll_ss r5, r6, r7 ; lb r25, r26 }
+	{ mnz r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; mullla_uu r5, r6, r7 ; sw r25, r26 }
+	{ mnz r15, r16, r17 ; mvz r5, r6, r7 ; sh r25, r26 }
+	{ mnz r15, r16, r17 ; nop ; prefetch r25 }
+	{ mnz r15, r16, r17 ; or r5, r6, r7 ; prefetch r25 }
+	{ mnz r15, r16, r17 ; pcnt r5, r6 ; lb_u r25, r26 }
+	{ mnz r15, r16, r17 ; prefetch r25 ; move r5, r6 }
+	{ mnz r15, r16, r17 ; prefetch r25 ; rli r5, r6, 5 }
+	{ mnz r15, r16, r17 ; prefetch r25 ; tblidxb0 r5, r6 }
+	{ mnz r15, r16, r17 ; rli r5, r6, 5 ; lw r25, r26 }
+	{ mnz r15, r16, r17 ; s2a r5, r6, r7 ; lw r25, r26 }
+	{ mnz r15, r16, r17 ; sadh r5, r6, r7 }
+	{ mnz r15, r16, r17 ; sb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ mnz r15, r16, r17 ; sb r25, r26 ; shli r5, r6, 5 }
+	{ mnz r15, r16, r17 ; seq r5, r6, r7 ; lb_u r25, r26 }
+	{ mnz r15, r16, r17 ; seqi r5, r6, 5 }
+	{ mnz r15, r16, r17 ; sh r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ mnz r15, r16, r17 ; sh r25, r26 ; shl r5, r6, r7 }
+	{ mnz r15, r16, r17 ; shl r5, r6, r7 ; lb r25, r26 }
+	{ mnz r15, r16, r17 ; shli r5, r6, 5 ; sw r25, r26 }
+	{ mnz r15, r16, r17 ; shri r5, r6, 5 ; lw r25, r26 }
+	{ mnz r15, r16, r17 ; slt_u r5, r6, r7 ; lh r25, r26 }
+	{ mnz r15, r16, r17 ; slte_u r5, r6, r7 ; lb r25, r26 }
+	{ mnz r15, r16, r17 ; slti r5, r6, 5 ; lw r25, r26 }
+	{ mnz r15, r16, r17 ; sne r5, r6, r7 ; lb r25, r26 }
+	{ mnz r15, r16, r17 ; sra r5, r6, r7 ; sw r25, r26 }
+	{ mnz r15, r16, r17 ; sub r5, r6, r7 ; lw r25, r26 }
+	{ mnz r15, r16, r17 ; sw r25, r26 ; info 19 }
+	{ mnz r15, r16, r17 ; sw r25, r26 ; pcnt r5, r6 }
+	{ mnz r15, r16, r17 ; sw r25, r26 ; srai r5, r6, 5 }
+	{ mnz r15, r16, r17 ; tblidxb1 r5, r6 ; lh r25, r26 }
+	{ mnz r15, r16, r17 ; tblidxb3 r5, r6 ; lh r25, r26 }
+	{ mnz r5, r6, r7 ; add r15, r16, r17 ; lb_u r25, r26 }
+	{ mnz r5, r6, r7 ; addi r15, r16, 5 ; sh r25, r26 }
+	{ mnz r5, r6, r7 ; andi r15, r16, 5 ; lh r25, r26 }
+	{ mnz r5, r6, r7 ; fnop ; sw r25, r26 }
+	{ mnz r5, r6, r7 ; info 19 ; sh r25, r26 }
+	{ mnz r5, r6, r7 ; lb r25, r26 ; ill }
+	{ mnz r5, r6, r7 ; lb r25, r26 ; shri r15, r16, 5 }
+	{ mnz r5, r6, r7 ; lb_u r25, r26 ; info 19 }
+	{ mnz r5, r6, r7 ; lb_u r25, r26 ; slt r15, r16, r17 }
+	{ mnz r5, r6, r7 ; lh r25, r26 ; ill }
+	{ mnz r5, r6, r7 ; lh r25, r26 ; shri r15, r16, 5 }
+	{ mnz r5, r6, r7 ; lh_u r25, r26 ; info 19 }
+	{ mnz r5, r6, r7 ; lh_u r25, r26 ; slt r15, r16, r17 }
+	{ mnz r5, r6, r7 ; lw r25, r26 ; fnop }
+	{ mnz r5, r6, r7 ; lw r25, r26 ; shr r15, r16, r17 }
+	{ mnz r5, r6, r7 ; maxih r15, r16, 5 }
+	{ mnz r5, r6, r7 ; move r15, r16 ; lb r25, r26 }
+	{ mnz r5, r6, r7 ; moveli r15, 0x1234 }
+	{ mnz r5, r6, r7 ; nop ; prefetch r25 }
+	{ mnz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 }
+	{ mnz r5, r6, r7 ; prefetch r25 ; add r15, r16, r17 }
+	{ mnz r5, r6, r7 ; prefetch r25 ; seq r15, r16, r17 }
+	{ mnz r5, r6, r7 ; rl r15, r16, r17 ; lb_u r25, r26 }
+	{ mnz r5, r6, r7 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+	{ mnz r5, r6, r7 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+	{ mnz r5, r6, r7 ; sb r25, r26 ; mz r15, r16, r17 }
+	{ mnz r5, r6, r7 ; sb r25, r26 ; slti r15, r16, 5 }
+	{ mnz r5, r6, r7 ; seqh r15, r16, r17 }
+	{ mnz r5, r6, r7 ; sh r25, r26 ; info 19 }
+	{ mnz r5, r6, r7 ; sh r25, r26 ; slt r15, r16, r17 }
+	{ mnz r5, r6, r7 ; shl r15, r16, r17 ; sh r25, r26 }
+	{ mnz r5, r6, r7 ; shr r15, r16, r17 ; lh_u r25, r26 }
+	{ mnz r5, r6, r7 ; shrih r15, r16, 5 }
+	{ mnz r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ mnz r5, r6, r7 ; slte_u r15, r16, r17 ; sh r25, r26 }
+	{ mnz r5, r6, r7 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+	{ mnz r5, r6, r7 ; sne r15, r16, r17 ; sh r25, r26 }
+	{ mnz r5, r6, r7 ; srai r15, r16, 5 ; lh_u r25, r26 }
+	{ mnz r5, r6, r7 ; subbs_u r15, r16, r17 }
+	{ mnz r5, r6, r7 ; sw r25, r26 ; rl r15, r16, r17 }
+	{ mnz r5, r6, r7 ; sw r25, r26 ; sub r15, r16, r17 }
+	{ mnzb r15, r16, r17 ; addh r5, r6, r7 }
+	{ mnzb r15, r16, r17 ; ctz r5, r6 }
+	{ mnzb r15, r16, r17 ; mnzh r5, r6, r7 }
+	{ mnzb r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ mnzb r15, r16, r17 ; packlb r5, r6, r7 }
+	{ mnzb r15, r16, r17 ; shlb r5, r6, r7 }
+	{ mnzb r15, r16, r17 ; slteh_u r5, r6, r7 }
+	{ mnzb r15, r16, r17 ; subbs_u r5, r6, r7 }
+	{ mnzb r5, r6, r7 ; adds r15, r16, r17 }
+	{ mnzb r5, r6, r7 ; jr r15 }
+	{ mnzb r5, r6, r7 ; mfspr r16, 0x5 }
+	{ mnzb r5, r6, r7 ; ori r15, r16, 5 }
+	{ mnzb r5, r6, r7 ; sh r15, r16 }
+	{ mnzb r5, r6, r7 ; slteb r15, r16, r17 }
+	{ mnzb r5, r6, r7 ; sraih r15, r16, 5 }
+	{ mnzh r15, r16, r17 ; addih r5, r6, 5 }
+	{ mnzh r15, r16, r17 ; infol 0x1234 }
+	{ mnzh r15, r16, r17 ; movelis r5, 0x1234 }
+	{ mnzh r15, r16, r17 ; mullla_ss r5, r6, r7 }
+	{ mnzh r15, r16, r17 ; s1a r5, r6, r7 }
+	{ mnzh r15, r16, r17 ; shlih r5, r6, 5 }
+	{ mnzh r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ mnzh r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ mnzh r5, r6, r7 ; dtlbpr r15 }
+	{ mnzh r5, r6, r7 ; lbadd r15, r16, 5 }
+	{ mnzh r5, r6, r7 ; minih r15, r16, 5 }
+	{ mnzh r5, r6, r7 ; packlb r15, r16, r17 }
+	{ mnzh r5, r6, r7 ; shlh r15, r16, r17 }
+	{ mnzh r5, r6, r7 ; slth r15, r16, r17 }
+	{ mnzh r5, r6, r7 ; subh r15, r16, r17 }
+	{ move r15, r16 ; addbs_u r5, r6, r7 }
+	{ move r15, r16 ; and r5, r6, r7 ; lb r25, r26 }
+	{ move r15, r16 ; auli r5, r6, 0x1234 }
+	{ move r15, r16 ; bytex r5, r6 ; sh r25, r26 }
+	{ move r15, r16 ; ctz r5, r6 ; prefetch r25 }
+	{ move r15, r16 ; info 19 ; lw r25, r26 }
+	{ move r15, r16 ; lb r25, r26 ; info 19 }
+	{ move r15, r16 ; lb r25, r26 ; pcnt r5, r6 }
+	{ move r15, r16 ; lb r25, r26 ; srai r5, r6, 5 }
+	{ move r15, r16 ; lb_u r25, r26 ; movei r5, 5 }
+	{ move r15, r16 ; lb_u r25, r26 ; s1a r5, r6, r7 }
+	{ move r15, r16 ; lb_u r25, r26 ; tblidxb1 r5, r6 }
+	{ move r15, r16 ; lh r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ move r15, r16 ; lh r25, r26 ; seq r5, r6, r7 }
+	{ move r15, r16 ; lh r25, r26 ; xor r5, r6, r7 }
+	{ move r15, r16 ; lh_u r25, r26 ; mulll_ss r5, r6, r7 }
+	{ move r15, r16 ; lh_u r25, r26 ; shli r5, r6, 5 }
+	{ move r15, r16 ; lw r25, r26 ; addi r5, r6, 5 }
+	{ move r15, r16 ; lw r25, r26 ; mullla_uu r5, r6, r7 }
+	{ move r15, r16 ; lw r25, r26 ; slt r5, r6, r7 }
+	{ move r15, r16 ; minb_u r5, r6, r7 }
+	{ move r15, r16 ; move r5, r6 ; lh_u r25, r26 }
+	{ move r15, r16 ; mulhh_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ move r15, r16 ; mulhha_ss r5, r6, r7 ; lb r25, r26 }
+	{ move r15, r16 ; mulhha_uu r5, r6, r7 }
+	{ move r15, r16 ; mulll_ss r5, r6, r7 ; lb r25, r26 }
+	{ move r15, r16 ; mulll_uu r5, r6, r7 }
+	{ move r15, r16 ; mullla_uu r5, r6, r7 ; sw r25, r26 }
+	{ move r15, r16 ; mvz r5, r6, r7 ; sh r25, r26 }
+	{ move r15, r16 ; nop ; prefetch r25 }
+	{ move r15, r16 ; or r5, r6, r7 ; prefetch r25 }
+	{ move r15, r16 ; pcnt r5, r6 ; lb_u r25, r26 }
+	{ move r15, r16 ; prefetch r25 ; move r5, r6 }
+	{ move r15, r16 ; prefetch r25 ; rli r5, r6, 5 }
+	{ move r15, r16 ; prefetch r25 ; tblidxb0 r5, r6 }
+	{ move r15, r16 ; rli r5, r6, 5 ; lw r25, r26 }
+	{ move r15, r16 ; s2a r5, r6, r7 ; lw r25, r26 }
+	{ move r15, r16 ; sadh r5, r6, r7 }
+	{ move r15, r16 ; sb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ move r15, r16 ; sb r25, r26 ; shli r5, r6, 5 }
+	{ move r15, r16 ; seq r5, r6, r7 ; lb_u r25, r26 }
+	{ move r15, r16 ; seqi r5, r6, 5 }
+	{ move r15, r16 ; sh r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ move r15, r16 ; sh r25, r26 ; shl r5, r6, r7 }
+	{ move r15, r16 ; shl r5, r6, r7 ; lb r25, r26 }
+	{ move r15, r16 ; shli r5, r6, 5 ; sw r25, r26 }
+	{ move r15, r16 ; shri r5, r6, 5 ; lw r25, r26 }
+	{ move r15, r16 ; slt_u r5, r6, r7 ; lh r25, r26 }
+	{ move r15, r16 ; slte_u r5, r6, r7 ; lb r25, r26 }
+	{ move r15, r16 ; slti r5, r6, 5 ; lw r25, r26 }
+	{ move r15, r16 ; sne r5, r6, r7 ; lb r25, r26 }
+	{ move r15, r16 ; sra r5, r6, r7 ; sw r25, r26 }
+	{ move r15, r16 ; sub r5, r6, r7 ; lw r25, r26 }
+	{ move r15, r16 ; sw r25, r26 ; info 19 }
+	{ move r15, r16 ; sw r25, r26 ; pcnt r5, r6 }
+	{ move r15, r16 ; sw r25, r26 ; srai r5, r6, 5 }
+	{ move r15, r16 ; tblidxb1 r5, r6 ; lh r25, r26 }
+	{ move r15, r16 ; tblidxb3 r5, r6 ; lh r25, r26 }
+	{ move r5, r6 ; add r15, r16, r17 ; lb_u r25, r26 }
+	{ move r5, r6 ; addi r15, r16, 5 ; sh r25, r26 }
+	{ move r5, r6 ; andi r15, r16, 5 ; lh r25, r26 }
+	{ move r5, r6 ; fnop ; sw r25, r26 }
+	{ move r5, r6 ; info 19 ; sh r25, r26 }
+	{ move r5, r6 ; lb r25, r26 ; ill }
+	{ move r5, r6 ; lb r25, r26 ; shri r15, r16, 5 }
+	{ move r5, r6 ; lb_u r25, r26 ; info 19 }
+	{ move r5, r6 ; lb_u r25, r26 ; slt r15, r16, r17 }
+	{ move r5, r6 ; lh r25, r26 ; ill }
+	{ move r5, r6 ; lh r25, r26 ; shri r15, r16, 5 }
+	{ move r5, r6 ; lh_u r25, r26 ; info 19 }
+	{ move r5, r6 ; lh_u r25, r26 ; slt r15, r16, r17 }
+	{ move r5, r6 ; lw r25, r26 ; fnop }
+	{ move r5, r6 ; lw r25, r26 ; shr r15, r16, r17 }
+	{ move r5, r6 ; maxih r15, r16, 5 }
+	{ move r5, r6 ; move r15, r16 ; lb r25, r26 }
+	{ move r5, r6 ; moveli r15, 0x1234 }
+	{ move r5, r6 ; nop ; prefetch r25 }
+	{ move r5, r6 ; or r15, r16, r17 ; prefetch r25 }
+	{ move r5, r6 ; prefetch r25 ; add r15, r16, r17 }
+	{ move r5, r6 ; prefetch r25 ; seq r15, r16, r17 }
+	{ move r5, r6 ; rl r15, r16, r17 ; lb_u r25, r26 }
+	{ move r5, r6 ; s1a r15, r16, r17 ; lb_u r25, r26 }
+	{ move r5, r6 ; s3a r15, r16, r17 ; lb_u r25, r26 }
+	{ move r5, r6 ; sb r25, r26 ; mz r15, r16, r17 }
+	{ move r5, r6 ; sb r25, r26 ; slti r15, r16, 5 }
+	{ move r5, r6 ; seqh r15, r16, r17 }
+	{ move r5, r6 ; sh r25, r26 ; info 19 }
+	{ move r5, r6 ; sh r25, r26 ; slt r15, r16, r17 }
+	{ move r5, r6 ; shl r15, r16, r17 ; sh r25, r26 }
+	{ move r5, r6 ; shr r15, r16, r17 ; lh_u r25, r26 }
+	{ move r5, r6 ; shrih r15, r16, 5 }
+	{ move r5, r6 ; slt_u r15, r16, r17 }
+	{ move r5, r6 ; slte_u r15, r16, r17 ; sh r25, r26 }
+	{ move r5, r6 ; slti_u r15, r16, 5 ; lb_u r25, r26 }
+	{ move r5, r6 ; sne r15, r16, r17 ; sh r25, r26 }
+	{ move r5, r6 ; srai r15, r16, 5 ; lh_u r25, r26 }
+	{ move r5, r6 ; subbs_u r15, r16, r17 }
+	{ move r5, r6 ; sw r25, r26 ; rl r15, r16, r17 }
+	{ move r5, r6 ; sw r25, r26 ; sub r15, r16, r17 }
+	{ movei r15, 5 ; add r5, r6, r7 ; lh_u r25, r26 }
+	{ movei r15, 5 ; addi r5, r6, 5 }
+	{ movei r15, 5 ; andi r5, r6, 5 ; lh r25, r26 }
+	{ movei r15, 5 ; bitx r5, r6 }
+	{ movei r15, 5 ; clz r5, r6 }
+	{ movei r15, 5 ; fnop ; sb r25, r26 }
+	{ movei r15, 5 ; lb r25, r26 ; addi r5, r6, 5 }
+	{ movei r15, 5 ; lb r25, r26 ; mullla_uu r5, r6, r7 }
+	{ movei r15, 5 ; lb r25, r26 ; slt r5, r6, r7 }
+	{ movei r15, 5 ; lb_u r25, r26 ; bitx r5, r6 }
+	{ movei r15, 5 ; lb_u r25, r26 ; mz r5, r6, r7 }
+	{ movei r15, 5 ; lb_u r25, r26 ; slte_u r5, r6, r7 }
+	{ movei r15, 5 ; lh r25, r26 ; ctz r5, r6 }
+	{ movei r15, 5 ; lh r25, r26 ; or r5, r6, r7 }
+	{ movei r15, 5 ; lh r25, r26 ; sne r5, r6, r7 }
+	{ movei r15, 5 ; lh_u r25, r26 ; mnz r5, r6, r7 }
+	{ movei r15, 5 ; lh_u r25, r26 ; rl r5, r6, r7 }
+	{ movei r15, 5 ; lh_u r25, r26 ; sub r5, r6, r7 }
+	{ movei r15, 5 ; lw r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ movei r15, 5 ; lw r25, r26 ; s2a r5, r6, r7 }
+	{ movei r15, 5 ; lw r25, r26 ; tblidxb2 r5, r6 }
+	{ movei r15, 5 ; mnz r5, r6, r7 ; sh r25, r26 }
+	{ movei r15, 5 ; movei r5, 5 ; prefetch r25 }
+	{ movei r15, 5 ; mulhh_uu r5, r6, r7 ; lh r25, r26 }
+	{ movei r15, 5 ; mulhha_uu r5, r6, r7 ; lb_u r25, r26 }
+	{ movei r15, 5 ; mulhlsa_uu r5, r6, r7 ; lh r25, r26 }
+	{ movei r15, 5 ; mulll_uu r5, r6, r7 ; lb_u r25, r26 }
+	{ movei r15, 5 ; mullla_uu r5, r6, r7 ; lb r25, r26 }
+	{ movei r15, 5 ; mvnz r5, r6, r7 }
+	{ movei r15, 5 ; mz r5, r6, r7 }
+	{ movei r15, 5 ; nor r5, r6, r7 ; sh r25, r26 }
+	{ movei r15, 5 ; ori r5, r6, 5 ; sh r25, r26 }
+	{ movei r15, 5 ; prefetch r25 ; andi r5, r6, 5 }
+	{ movei r15, 5 ; prefetch r25 ; mvz r5, r6, r7 }
+	{ movei r15, 5 ; prefetch r25 ; slte r5, r6, r7 }
+	{ movei r15, 5 ; rl r5, r6, r7 ; sb r25, r26 }
+	{ movei r15, 5 ; s1a r5, r6, r7 ; sb r25, r26 }
+	{ movei r15, 5 ; s3a r5, r6, r7 ; sb r25, r26 }
+	{ movei r15, 5 ; sb r25, r26 ; mnz r5, r6, r7 }
+	{ movei r15, 5 ; sb r25, r26 ; rl r5, r6, r7 }
+	{ movei r15, 5 ; sb r25, r26 ; sub r5, r6, r7 }
+	{ movei r15, 5 ; seqi r5, r6, 5 ; lb_u r25, r26 }
+	{ movei r15, 5 ; sh r25, r26 ; info 19 }
+	{ movei r15, 5 ; sh r25, r26 ; pcnt r5, r6 }
+	{ movei r15, 5 ; sh r25, r26 ; srai r5, r6, 5 }
+	{ movei r15, 5 ; shli r5, r6, 5 ; lb r25, r26 }
+	{ movei r15, 5 ; shr r5, r6, r7 ; sw r25, r26 }
+	{ movei r15, 5 ; slt r5, r6, r7 ; lw r25, r26 }
+	{ movei r15, 5 ; slte r5, r6, r7 ; lh r25, r26 }
+	{ movei r15, 5 ; slteh r5, r6, r7 }
+	{ movei r15, 5 ; slti_u r5, r6, 5 ; sb r25, r26 }
+	{ movei r15, 5 ; sra r5, r6, r7 ; lb r25, r26 }
+	{ movei r15, 5 ; srai r5, r6, 5 ; sw r25, r26 }
+	{ movei r15, 5 ; sw r25, r26 ; addi r5, r6, 5 }
+	{ movei r15, 5 ; sw r25, r26 ; mullla_uu r5, r6, r7 }
+	{ movei r15, 5 ; sw r25, r26 ; slt r5, r6, r7 }
+	{ movei r15, 5 ; tblidxb0 r5, r6 ; lw r25, r26 }
+	{ movei r15, 5 ; tblidxb2 r5, r6 ; lw r25, r26 }
+	{ movei r15, 5 ; xor r5, r6, r7 ; lw r25, r26 }
+	{ movei r5, 5 ; addhs r15, r16, r17 }
+	{ movei r5, 5 ; and r15, r16, r17 ; lw r25, r26 }
+	{ movei r5, 5 ; fnop ; lb r25, r26 }
+	{ movei r5, 5 ; ill }
+	{ movei r5, 5 ; jr r15 }
+	{ movei r5, 5 ; lb r25, r26 ; s1a r15, r16, r17 }
+	{ movei r5, 5 ; lb r25, r26 }
+	{ movei r5, 5 ; lb_u r25, r26 ; s2a r15, r16, r17 }
+	{ movei r5, 5 ; lbadd r15, r16, 5 }
+	{ movei r5, 5 ; lh r25, r26 ; s1a r15, r16, r17 }
+	{ movei r5, 5 ; lh r25, r26 }
+	{ movei r5, 5 ; lh_u r25, r26 ; s2a r15, r16, r17 }
+	{ movei r5, 5 ; lhadd r15, r16, 5 }
+	{ movei r5, 5 ; lw r25, r26 ; rli r15, r16, 5 }
+	{ movei r5, 5 ; lw r25, r26 ; xor r15, r16, r17 }
+	{ movei r5, 5 ; mnz r15, r16, r17 ; lw r25, r26 }
+	{ movei r5, 5 ; movei r15, 5 ; lh r25, r26 }
+	{ movei r5, 5 ; mz r15, r16, r17 }
+	{ movei r5, 5 ; nor r15, r16, r17 ; sh r25, r26 }
+	{ movei r5, 5 ; ori r15, r16, 5 ; sh r25, r26 }
+	{ movei r5, 5 ; prefetch r25 ; nor r15, r16, r17 }
+	{ movei r5, 5 ; prefetch r25 ; sne r15, r16, r17 }
+	{ movei r5, 5 ; rli r15, r16, 5 ; lh_u r25, r26 }
+	{ movei r5, 5 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+	{ movei r5, 5 ; sb r25, r26 ; and r15, r16, r17 }
+	{ movei r5, 5 ; sb r25, r26 ; shl r15, r16, r17 }
+	{ movei r5, 5 ; seq r15, r16, r17 ; lh_u r25, r26 }
+	{ movei r5, 5 ; seqih r15, r16, 5 }
+	{ movei r5, 5 ; sh r25, r26 ; s2a r15, r16, r17 }
+	{ movei r5, 5 ; shadd r15, r16, 5 }
+	{ movei r5, 5 ; shli r15, r16, 5 ; sh r25, r26 }
+	{ movei r5, 5 ; shri r15, r16, 5 ; lh_u r25, r26 }
+	{ movei r5, 5 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+	{ movei r5, 5 ; slte r15, r16, r17 }
+	{ movei r5, 5 ; slti r15, r16, 5 ; lh_u r25, r26 }
+	{ movei r5, 5 ; sltih_u r15, r16, 5 }
+	{ movei r5, 5 ; sra r15, r16, r17 ; sh r25, r26 }
+	{ movei r5, 5 ; sub r15, r16, r17 ; lh_u r25, r26 }
+	{ movei r5, 5 ; sw r25, r26 ; mnz r15, r16, r17 }
+	{ movei r5, 5 ; sw r25, r26 ; slt_u r15, r16, r17 }
+	{ movei r5, 5 ; xor r15, r16, r17 ; sb r25, r26 }
+	{ moveli r15, 0x1234 ; auli r5, r6, 0x1234 }
+	{ moveli r15, 0x1234 ; maxih r5, r6, 5 }
+	{ moveli r15, 0x1234 ; mulhl_ss r5, r6, r7 }
+	{ moveli r15, 0x1234 ; mzh r5, r6, r7 }
+	{ moveli r15, 0x1234 ; sadh_u r5, r6, r7 }
+	{ moveli r15, 0x1234 ; slt_u r5, r6, r7 }
+	{ moveli r15, 0x1234 ; sra r5, r6, r7 }
+	{ moveli r5, 0x1234 ; addbs_u r15, r16, r17 }
+	{ moveli r5, 0x1234 ; inthb r15, r16, r17 }
+	{ moveli r5, 0x1234 ; lw_na r15, r16 }
+	{ moveli r5, 0x1234 ; movelis r15, 0x1234 }
+	{ moveli r5, 0x1234 ; sb r15, r16 }
+	{ moveli r5, 0x1234 ; shrib r15, r16, 5 }
+	{ moveli r5, 0x1234 ; sne r15, r16, r17 }
+	{ moveli r5, 0x1234 ; xori r15, r16, 5 }
+	{ movelis r15, 0x1234 ; clz r5, r6 }
+	{ movelis r15, 0x1234 ; mm r5, r6, r7, 5, 7 }
+	{ movelis r15, 0x1234 ; mulhla_us r5, r6, r7 }
+	{ movelis r15, 0x1234 ; packhb r5, r6, r7 }
+	{ movelis r15, 0x1234 ; seqih r5, r6, 5 }
+	{ movelis r15, 0x1234 ; slteb_u r5, r6, r7 }
+	{ movelis r15, 0x1234 ; sub r5, r6, r7 }
+	{ movelis r5, 0x1234 ; addli r15, r16, 0x1234 }
+	{ movelis r5, 0x1234 ; jalrp r15 }
+	{ movelis r5, 0x1234 ; mf }
+	{ movelis r5, 0x1234 ; ori r15, r16, 5 }
+	{ movelis r5, 0x1234 ; sh r15, r16 }
+	{ movelis r5, 0x1234 ; slteb r15, r16, r17 }
+	{ movelis r5, 0x1234 ; sraih r15, r16, 5 }
+	{ mtspr 0x5, r16 ; addih r5, r6, 5 }
+	{ mtspr 0x5, r16 ; infol 0x1234 }
+	{ mtspr 0x5, r16 ; movelis r5, 0x1234 }
+	{ mtspr 0x5, r16 ; mullla_ss r5, r6, r7 }
+	{ mtspr 0x5, r16 ; s1a r5, r6, r7 }
+	{ mtspr 0x5, r16 ; shlih r5, r6, 5 }
+	{ mtspr 0x5, r16 ; slti_u r5, r6, 5 }
+	{ mtspr 0x5, r16 ; tblidxb0 r5, r6 }
+	{ mulhh_ss r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+	{ mulhh_ss r5, r6, r7 ; fnop ; lb_u r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; info 19 ; lb r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; jrp r15 }
+	{ mulhh_ss r5, r6, r7 ; lb r25, r26 ; s2a r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; lb_u r15, r16 }
+	{ mulhh_ss r5, r6, r7 ; lb_u r25, r26 ; s3a r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ mulhh_ss r5, r6, r7 ; lh r25, r26 ; s2a r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; lh_u r15, r16 }
+	{ mulhh_ss r5, r6, r7 ; lh_u r25, r26 ; s3a r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ mulhh_ss r5, r6, r7 ; lw r25, r26 ; s1a r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ mulhh_ss r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; mzb r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; prefetch r25 ; sra r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; sb r25, r26 ; andi r15, r16, 5 }
+	{ mulhh_ss r5, r6, r7 ; sb r25, r26 ; shli r15, r16, 5 }
+	{ mulhh_ss r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; sh r15, r16 }
+	{ mulhh_ss r5, r6, r7 ; sh r25, r26 ; s3a r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+	{ mulhh_ss r5, r6, r7 ; sw r25, r26 ; move r15, r16 }
+	{ mulhh_ss r5, r6, r7 ; sw r25, r26 ; slte r15, r16, r17 }
+	{ mulhh_ss r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+	{ mulhh_su r5, r6, r7 ; flush r15 }
+	{ mulhh_su r5, r6, r7 ; lh r15, r16 }
+	{ mulhh_su r5, r6, r7 ; mnz r15, r16, r17 }
+	{ mulhh_su r5, r6, r7 ; raise }
+	{ mulhh_su r5, r6, r7 ; shlib r15, r16, 5 }
+	{ mulhh_su r5, r6, r7 ; slti r15, r16, 5 }
+	{ mulhh_su r5, r6, r7 ; subs r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; addhs r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; and r15, r16, r17 ; lw r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; fnop ; lb r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; ill }
+	{ mulhh_uu r5, r6, r7 ; jr r15 }
+	{ mulhh_uu r5, r6, r7 ; lb r25, r26 ; s1a r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; lb r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; lb_u r25, r26 ; s2a r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; lbadd r15, r16, 5 }
+	{ mulhh_uu r5, r6, r7 ; lh r25, r26 ; s1a r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; lh r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; lh_u r25, r26 ; s2a r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; lhadd r15, r16, 5 }
+	{ mulhh_uu r5, r6, r7 ; lw r25, r26 ; rli r15, r16, 5 }
+	{ mulhh_uu r5, r6, r7 ; lw r25, r26 ; xor r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; mnz r15, r16, r17 ; lw r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; movei r15, 5 ; lh r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; mz r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; nor r15, r16, r17 ; sh r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; ori r15, r16, 5 ; sh r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; prefetch r25 ; nor r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; prefetch r25 ; sne r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; rli r15, r16, 5 ; lh_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; s2a r15, r16, r17 ; lh_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; sb r25, r26 ; and r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; sb r25, r26 ; shl r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; seq r15, r16, r17 ; lh_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; seqih r15, r16, 5 }
+	{ mulhh_uu r5, r6, r7 ; sh r25, r26 ; s2a r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; shadd r15, r16, 5 }
+	{ mulhh_uu r5, r6, r7 ; shli r15, r16, 5 ; sh r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; shri r15, r16, 5 ; lh_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lb_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; slte r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; slti r15, r16, 5 ; lh_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; sltih_u r15, r16, 5 }
+	{ mulhh_uu r5, r6, r7 ; sra r15, r16, r17 ; sh r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; sub r15, r16, r17 ; lh_u r25, r26 }
+	{ mulhh_uu r5, r6, r7 ; sw r25, r26 ; mnz r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; sw r25, r26 ; slt_u r15, r16, r17 }
+	{ mulhh_uu r5, r6, r7 ; xor r15, r16, r17 ; sb r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; fnop ; lh r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; lb r15, r16 }
+	{ mulhha_ss r5, r6, r7 ; lb r25, r26 ; s3a r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lb_u r25, r26 ; add r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lb_u r25, r26 ; seq r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lh r15, r16 }
+	{ mulhha_ss r5, r6, r7 ; lh r25, r26 ; s3a r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lh_u r25, r26 ; add r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lh_u r25, r26 ; seq r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lnk r15 }
+	{ mulhha_ss r5, r6, r7 ; lw r25, r26 ; s2a r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; lw_na r15, r16 }
+	{ mulhha_ss r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; mzh r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; nor r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; ori r15, r16, 5 }
+	{ mulhha_ss r5, r6, r7 ; prefetch r25 ; ori r15, r16, 5 }
+	{ mulhha_ss r5, r6, r7 ; prefetch r25 ; srai r15, r16, 5 }
+	{ mulhha_ss r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+	{ mulhha_ss r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+	{ mulhha_ss r5, r6, r7 ; sb r25, r26 ; fnop }
+	{ mulhha_ss r5, r6, r7 ; sb r25, r26 ; shr r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+	{ mulhha_ss r5, r6, r7 ; sh r25, r26 ; add r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; sh r25, r26 ; seq r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; shli r15, r16, 5 }
+	{ mulhha_ss r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+	{ mulhha_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+	{ mulhha_ss r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+	{ mulhha_ss r5, r6, r7 ; sra r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+	{ mulhha_ss r5, r6, r7 ; sw r25, r26 ; movei r15, 5 }
+	{ mulhha_ss r5, r6, r7 ; sw r25, r26 ; slte_u r15, r16, r17 }
+	{ mulhha_ss r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+	{ mulhha_su r5, r6, r7 ; fnop }
+	{ mulhha_su r5, r6, r7 ; lh_u r15, r16 }
+	{ mulhha_su r5, r6, r7 ; mnzb r15, r16, r17 }
+	{ mulhha_su r5, r6, r7 ; rl r15, r16, r17 }
+	{ mulhha_su r5, r6, r7 ; shlih r15, r16, 5 }
+	{ mulhha_su r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ mulhha_su r5, r6, r7 ; sw r15, r16 }
+	{ mulhha_uu r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+	{ mulhha_uu r5, r6, r7 ; fnop ; lb_u r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; info 19 ; lb r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; jrp r15 }
+	{ mulhha_uu r5, r6, r7 ; lb r25, r26 ; s2a r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; lb_u r15, r16 }
+	{ mulhha_uu r5, r6, r7 ; lb_u r25, r26 ; s3a r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ mulhha_uu r5, r6, r7 ; lh r25, r26 ; s2a r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; lh_u r15, r16 }
+	{ mulhha_uu r5, r6, r7 ; lh_u r25, r26 ; s3a r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ mulhha_uu r5, r6, r7 ; lw r25, r26 ; s1a r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ mulhha_uu r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; mzb r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; prefetch r25 ; sra r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; sb r25, r26 ; andi r15, r16, 5 }
+	{ mulhha_uu r5, r6, r7 ; sb r25, r26 ; shli r15, r16, 5 }
+	{ mulhha_uu r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; sh r15, r16 }
+	{ mulhha_uu r5, r6, r7 ; sh r25, r26 ; s3a r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+	{ mulhha_uu r5, r6, r7 ; sw r25, r26 ; move r15, r16 }
+	{ mulhha_uu r5, r6, r7 ; sw r25, r26 ; slte r15, r16, r17 }
+	{ mulhha_uu r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+	{ mulhhsa_uu r5, r6, r7 ; flush r15 }
+	{ mulhhsa_uu r5, r6, r7 ; lh r15, r16 }
+	{ mulhhsa_uu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ mulhhsa_uu r5, r6, r7 ; raise }
+	{ mulhhsa_uu r5, r6, r7 ; shlib r15, r16, 5 }
+	{ mulhhsa_uu r5, r6, r7 ; slti r15, r16, 5 }
+	{ mulhhsa_uu r5, r6, r7 ; subs r15, r16, r17 }
+	{ mulhl_ss r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ mulhl_ss r5, r6, r7 ; lb_u r15, r16 }
+	{ mulhl_ss r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ mulhl_ss r5, r6, r7 ; packhs r15, r16, r17 }
+	{ mulhl_ss r5, r6, r7 ; shlb r15, r16, r17 }
+	{ mulhl_ss r5, r6, r7 ; slteh_u r15, r16, r17 }
+	{ mulhl_ss r5, r6, r7 ; subbs_u r15, r16, r17 }
+	{ mulhl_su r5, r6, r7 ; adds r15, r16, r17 }
+	{ mulhl_su r5, r6, r7 ; jr r15 }
+	{ mulhl_su r5, r6, r7 ; mfspr r16, 0x5 }
+	{ mulhl_su r5, r6, r7 ; ori r15, r16, 5 }
+	{ mulhl_su r5, r6, r7 ; sh r15, r16 }
+	{ mulhl_su r5, r6, r7 ; slteb r15, r16, r17 }
+	{ mulhl_su r5, r6, r7 ; sraih r15, r16, 5 }
+	{ mulhl_us r5, r6, r7 ; addih r15, r16, 5 }
+	{ mulhl_us r5, r6, r7 ; iret }
+	{ mulhl_us r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ mulhl_us r5, r6, r7 ; nop }
+	{ mulhl_us r5, r6, r7 ; seqi r15, r16, 5 }
+	{ mulhl_us r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ mulhl_us r5, r6, r7 ; srah r15, r16, r17 }
+	{ mulhl_uu r5, r6, r7 ; addhs r15, r16, r17 }
+	{ mulhl_uu r5, r6, r7 ; intlb r15, r16, r17 }
+	{ mulhl_uu r5, r6, r7 ; lwadd_na r15, r16, 5 }
+	{ mulhl_uu r5, r6, r7 ; mz r15, r16, r17 }
+	{ mulhl_uu r5, r6, r7 ; seq r15, r16, r17 }
+	{ mulhl_uu r5, r6, r7 ; slt r15, r16, r17 }
+	{ mulhl_uu r5, r6, r7 ; sneh r15, r16, r17 }
+	{ mulhla_ss r5, r6, r7 ; addb r15, r16, r17 }
+	{ mulhla_ss r5, r6, r7 ; infol 0x1234 }
+	{ mulhla_ss r5, r6, r7 ; lw r15, r16 }
+	{ mulhla_ss r5, r6, r7 ; moveli r15, 0x1234 }
+	{ mulhla_ss r5, r6, r7 ; s3a r15, r16, r17 }
+	{ mulhla_ss r5, r6, r7 ; shri r15, r16, 5 }
+	{ mulhla_ss r5, r6, r7 ; sltih_u r15, r16, 5 }
+	{ mulhla_ss r5, r6, r7 ; xor r15, r16, r17 }
+	{ mulhla_su r5, r6, r7 ; icoh r15 }
+	{ mulhla_su r5, r6, r7 ; lhadd r15, r16, 5 }
+	{ mulhla_su r5, r6, r7 ; mnzh r15, r16, r17 }
+	{ mulhla_su r5, r6, r7 ; rli r15, r16, 5 }
+	{ mulhla_su r5, r6, r7 ; shr r15, r16, r17 }
+	{ mulhla_su r5, r6, r7 ; sltib r15, r16, 5 }
+	{ mulhla_su r5, r6, r7 ; swadd r15, r16, 5 }
+	{ mulhla_us r5, r6, r7 ; finv r15 }
+	{ mulhla_us r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ mulhla_us r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+	{ mulhla_us r5, r6, r7 ; prefetch r15 }
+	{ mulhla_us r5, r6, r7 ; shli r15, r16, 5 }
+	{ mulhla_us r5, r6, r7 ; slth_u r15, r16, r17 }
+	{ mulhla_us r5, r6, r7 ; subhs r15, r16, r17 }
+	{ mulhla_uu r5, r6, r7 ; andi r15, r16, 5 }
+	{ mulhla_uu r5, r6, r7 ; lb r15, r16 }
+	{ mulhla_uu r5, r6, r7 ; minh r15, r16, r17 }
+	{ mulhla_uu r5, r6, r7 ; packhb r15, r16, r17 }
+	{ mulhla_uu r5, r6, r7 ; shl r15, r16, r17 }
+	{ mulhla_uu r5, r6, r7 ; slteh r15, r16, r17 }
+	{ mulhla_uu r5, r6, r7 ; subb r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; add r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ mulhlsa_uu r5, r6, r7 ; ill ; prefetch r25 }
+	{ mulhlsa_uu r5, r6, r7 ; inv r15 }
+	{ mulhlsa_uu r5, r6, r7 ; lb r25, r26 ; or r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; lb r25, r26 ; sra r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; lb_u r25, r26 ; ori r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; lb_u r25, r26 ; srai r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; lh r25, r26 ; or r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; lh r25, r26 ; sra r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 ; ori r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 ; srai r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; lw r25, r26 ; nor r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; lw r25, r26 ; sne r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+	{ mulhlsa_uu r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; prefetch r25 ; move r15, r16 }
+	{ mulhlsa_uu r5, r6, r7 ; prefetch r25 ; slte r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; rl r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; s1a r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; sb r25, r26 ; s2a r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; sh r25, r26 ; ori r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; sh r25, r26 ; srai r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; shrh r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+	{ mulhlsa_uu r5, r6, r7 ; slth_u r15, r16, r17 }
+	{ mulhlsa_uu r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 }
+	{ mulhlsa_uu r5, r6, r7 ; sraih r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; sw r25, r26 ; andi r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; sw r25, r26 ; shli r15, r16, 5 }
+	{ mulhlsa_uu r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+	{ mulll_ss r5, r6, r7 ; addbs_u r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+	{ mulll_ss r5, r6, r7 ; finv r15 }
+	{ mulll_ss r5, r6, r7 ; ill ; sh r25, r26 }
+	{ mulll_ss r5, r6, r7 ; jalr r15 }
+	{ mulll_ss r5, r6, r7 ; lb r25, r26 ; rl r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; lb r25, r26 ; sub r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; lb_u r25, r26 ; rli r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; lb_u r25, r26 ; xor r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; lh r25, r26 ; rl r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; lh r25, r26 ; sub r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; lh_u r25, r26 ; rli r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; lh_u r25, r26 ; xor r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; lw r25, r26 ; ori r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; lw r25, r26 ; srai r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 }
+	{ mulll_ss r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+	{ mulll_ss r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+	{ mulll_ss r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+	{ mulll_ss r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+	{ mulll_ss r5, r6, r7 ; prefetch r25 ; mz r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; prefetch r25 ; slti r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+	{ mulll_ss r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+	{ mulll_ss r5, r6, r7 ; sb r25, r26 ; add r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; sb r25, r26 ; seq r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+	{ mulll_ss r5, r6, r7 ; seqi r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; sh r25, r26 ; rli r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; sh r25, r26 ; xor r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+	{ mulll_ss r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 }
+	{ mulll_ss r5, r6, r7 ; slt r15, r16, r17 }
+	{ mulll_ss r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 }
+	{ mulll_ss r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 }
+	{ mulll_ss r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+	{ mulll_ss r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+	{ mulll_ss r5, r6, r7 ; sw r25, r26 ; ill }
+	{ mulll_ss r5, r6, r7 ; sw r25, r26 ; shri r15, r16, 5 }
+	{ mulll_ss r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+	{ mulll_su r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ mulll_su r5, r6, r7 ; lb_u r15, r16 }
+	{ mulll_su r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ mulll_su r5, r6, r7 ; packhs r15, r16, r17 }
+	{ mulll_su r5, r6, r7 ; shlb r15, r16, r17 }
+	{ mulll_su r5, r6, r7 ; slteh_u r15, r16, r17 }
+	{ mulll_su r5, r6, r7 ; subbs_u r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; addb r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+	{ mulll_uu r5, r6, r7 ; dtlbpr r15 }
+	{ mulll_uu r5, r6, r7 ; ill ; sb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; iret }
+	{ mulll_uu r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 }
+	{ mulll_uu r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 }
+	{ mulll_uu r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 }
+	{ mulll_uu r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 }
+	{ mulll_uu r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+	{ mulll_uu r5, r6, r7 ; move r15, r16 }
+	{ mulll_uu r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+	{ mulll_uu r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+	{ mulll_uu r5, r6, r7 ; prefetch r25 ; movei r15, 5 }
+	{ mulll_uu r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; sb r15, r16 }
+	{ mulll_uu r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+	{ mulll_uu r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ mulll_uu r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+	{ mulll_uu r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; sltib r15, r16, 5 }
+	{ mulll_uu r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ mulll_uu r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+	{ mulll_uu r5, r6, r7 ; sw r25, r26 ; fnop }
+	{ mulll_uu r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 }
+	{ mulll_uu r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+	{ mullla_ss r5, r6, r7 ; addh r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+	{ mullla_ss r5, r6, r7 ; flush r15 }
+	{ mullla_ss r5, r6, r7 ; ill ; sw r25, r26 }
+	{ mullla_ss r5, r6, r7 ; jalrp r15 }
+	{ mullla_ss r5, r6, r7 ; lb r25, r26 ; rli r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; lb r25, r26 ; xor r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; lb_u r25, r26 ; s1a r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ mullla_ss r5, r6, r7 ; lh r25, r26 ; rli r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; lh r25, r26 ; xor r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; lh_u r25, r26 ; s1a r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; lh_u r25, r26 }
+	{ mullla_ss r5, r6, r7 ; lw r25, r26 ; rl r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; lw r25, r26 ; sub r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+	{ mullla_ss r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+	{ mullla_ss r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+	{ mullla_ss r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+	{ mullla_ss r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 }
+	{ mullla_ss r5, r6, r7 ; prefetch r25 ; nop }
+	{ mullla_ss r5, r6, r7 ; prefetch r25 ; slti_u r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; sb r25, r26 ; addi r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; sb r25, r26 ; seqi r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; seqib r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; sh r25, r26 ; s1a r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; sh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+	{ mullla_ss r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+	{ mullla_ss r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+	{ mullla_ss r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; sltih r15, r16, 5 }
+	{ mullla_ss r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+	{ mullla_ss r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+	{ mullla_ss r5, r6, r7 ; sw r25, r26 ; info 19 }
+	{ mullla_ss r5, r6, r7 ; sw r25, r26 ; slt r15, r16, r17 }
+	{ mullla_ss r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+	{ mullla_su r5, r6, r7 ; dtlbpr r15 }
+	{ mullla_su r5, r6, r7 ; lbadd r15, r16, 5 }
+	{ mullla_su r5, r6, r7 ; minih r15, r16, 5 }
+	{ mullla_su r5, r6, r7 ; packlb r15, r16, r17 }
+	{ mullla_su r5, r6, r7 ; shlh r15, r16, r17 }
+	{ mullla_su r5, r6, r7 ; slth r15, r16, r17 }
+	{ mullla_su r5, r6, r7 ; subh r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; addbs_u r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; and r15, r16, r17 ; lh r25, r26 }
+	{ mullla_uu r5, r6, r7 ; finv r15 }
+	{ mullla_uu r5, r6, r7 ; ill ; sh r25, r26 }
+	{ mullla_uu r5, r6, r7 ; jalr r15 }
+	{ mullla_uu r5, r6, r7 ; lb r25, r26 ; rl r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; lb r25, r26 ; sub r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; lb_u r25, r26 ; rli r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; lb_u r25, r26 ; xor r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; lh r25, r26 ; rl r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; lh r25, r26 ; sub r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; lh_u r25, r26 ; rli r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; lh_u r25, r26 ; xor r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; lw r25, r26 ; ori r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; lw r25, r26 ; srai r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; mnz r15, r16, r17 ; lh r25, r26 }
+	{ mullla_uu r5, r6, r7 ; movei r15, 5 ; lb r25, r26 }
+	{ mullla_uu r5, r6, r7 ; mz r15, r16, r17 ; sh r25, r26 }
+	{ mullla_uu r5, r6, r7 ; nor r15, r16, r17 ; prefetch r25 }
+	{ mullla_uu r5, r6, r7 ; ori r15, r16, 5 ; prefetch r25 }
+	{ mullla_uu r5, r6, r7 ; prefetch r25 ; mz r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; prefetch r25 ; slti r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; rli r15, r16, 5 ; lb_u r25, r26 }
+	{ mullla_uu r5, r6, r7 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+	{ mullla_uu r5, r6, r7 ; sb r25, r26 ; add r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; sb r25, r26 ; seq r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; seq r15, r16, r17 ; lb_u r25, r26 }
+	{ mullla_uu r5, r6, r7 ; seqi r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; sh r25, r26 ; rli r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; sh r25, r26 ; xor r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; shli r15, r16, 5 ; prefetch r25 }
+	{ mullla_uu r5, r6, r7 ; shri r15, r16, 5 ; lb_u r25, r26 }
+	{ mullla_uu r5, r6, r7 ; slt r15, r16, r17 }
+	{ mullla_uu r5, r6, r7 ; slte r15, r16, r17 ; sh r25, r26 }
+	{ mullla_uu r5, r6, r7 ; slti r15, r16, 5 ; lb_u r25, r26 }
+	{ mullla_uu r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; sra r15, r16, r17 ; prefetch r25 }
+	{ mullla_uu r5, r6, r7 ; sub r15, r16, r17 ; lb_u r25, r26 }
+	{ mullla_uu r5, r6, r7 ; sw r25, r26 ; ill }
+	{ mullla_uu r5, r6, r7 ; sw r25, r26 ; shri r15, r16, 5 }
+	{ mullla_uu r5, r6, r7 ; xor r15, r16, r17 ; lw r25, r26 }
+	{ mulllsa_uu r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ mulllsa_uu r5, r6, r7 ; lb_u r15, r16 }
+	{ mulllsa_uu r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ mulllsa_uu r5, r6, r7 ; packhs r15, r16, r17 }
+	{ mulllsa_uu r5, r6, r7 ; shlb r15, r16, r17 }
+	{ mulllsa_uu r5, r6, r7 ; slteh_u r15, r16, r17 }
+	{ mulllsa_uu r5, r6, r7 ; subbs_u r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; addb r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+	{ mvnz r5, r6, r7 ; dtlbpr r15 }
+	{ mvnz r5, r6, r7 ; ill ; sb r25, r26 }
+	{ mvnz r5, r6, r7 ; iret }
+	{ mvnz r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 }
+	{ mvnz r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 }
+	{ mvnz r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 }
+	{ mvnz r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 }
+	{ mvnz r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+	{ mvnz r5, r6, r7 ; move r15, r16 }
+	{ mvnz r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+	{ mvnz r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+	{ mvnz r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+	{ mvnz r5, r6, r7 ; prefetch r25 ; movei r15, 5 }
+	{ mvnz r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+	{ mvnz r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+	{ mvnz r5, r6, r7 ; sb r15, r16 }
+	{ mvnz r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+	{ mvnz r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+	{ mvnz r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ mvnz r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+	{ mvnz r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+	{ mvnz r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+	{ mvnz r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+	{ mvnz r5, r6, r7 ; sltib r15, r16, 5 }
+	{ mvnz r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ mvnz r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+	{ mvnz r5, r6, r7 ; sw r25, r26 ; fnop }
+	{ mvnz r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 }
+	{ mvnz r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+	{ mvz r5, r6, r7 ; addh r15, r16, r17 }
+	{ mvz r5, r6, r7 ; and r15, r16, r17 ; lh_u r25, r26 }
+	{ mvz r5, r6, r7 ; flush r15 }
+	{ mvz r5, r6, r7 ; ill ; sw r25, r26 }
+	{ mvz r5, r6, r7 ; jalrp r15 }
+	{ mvz r5, r6, r7 ; lb r25, r26 ; rli r15, r16, 5 }
+	{ mvz r5, r6, r7 ; lb r25, r26 ; xor r15, r16, r17 }
+	{ mvz r5, r6, r7 ; lb_u r25, r26 ; s1a r15, r16, r17 }
+	{ mvz r5, r6, r7 ; lb_u r25, r26 }
+	{ mvz r5, r6, r7 ; lh r25, r26 ; rli r15, r16, 5 }
+	{ mvz r5, r6, r7 ; lh r25, r26 ; xor r15, r16, r17 }
+	{ mvz r5, r6, r7 ; lh_u r25, r26 ; s1a r15, r16, r17 }
+	{ mvz r5, r6, r7 ; lh_u r25, r26 }
+	{ mvz r5, r6, r7 ; lw r25, r26 ; rl r15, r16, r17 }
+	{ mvz r5, r6, r7 ; lw r25, r26 ; sub r15, r16, r17 }
+	{ mvz r5, r6, r7 ; mnz r15, r16, r17 ; lh_u r25, r26 }
+	{ mvz r5, r6, r7 ; movei r15, 5 ; lb_u r25, r26 }
+	{ mvz r5, r6, r7 ; mz r15, r16, r17 ; sw r25, r26 }
+	{ mvz r5, r6, r7 ; nor r15, r16, r17 ; sb r25, r26 }
+	{ mvz r5, r6, r7 ; ori r15, r16, 5 ; sb r25, r26 }
+	{ mvz r5, r6, r7 ; prefetch r25 ; nop }
+	{ mvz r5, r6, r7 ; prefetch r25 ; slti_u r15, r16, 5 }
+	{ mvz r5, r6, r7 ; rli r15, r16, 5 ; lh r25, r26 }
+	{ mvz r5, r6, r7 ; s2a r15, r16, r17 ; lh r25, r26 }
+	{ mvz r5, r6, r7 ; sb r25, r26 ; addi r15, r16, 5 }
+	{ mvz r5, r6, r7 ; sb r25, r26 ; seqi r15, r16, 5 }
+	{ mvz r5, r6, r7 ; seq r15, r16, r17 ; lh r25, r26 }
+	{ mvz r5, r6, r7 ; seqib r15, r16, 5 }
+	{ mvz r5, r6, r7 ; sh r25, r26 ; s1a r15, r16, r17 }
+	{ mvz r5, r6, r7 ; sh r25, r26 }
+	{ mvz r5, r6, r7 ; shli r15, r16, 5 ; sb r25, r26 }
+	{ mvz r5, r6, r7 ; shri r15, r16, 5 ; lh r25, r26 }
+	{ mvz r5, r6, r7 ; slt_u r15, r16, r17 ; lb r25, r26 }
+	{ mvz r5, r6, r7 ; slte r15, r16, r17 ; sw r25, r26 }
+	{ mvz r5, r6, r7 ; slti r15, r16, 5 ; lh r25, r26 }
+	{ mvz r5, r6, r7 ; sltih r15, r16, 5 }
+	{ mvz r5, r6, r7 ; sra r15, r16, r17 ; sb r25, r26 }
+	{ mvz r5, r6, r7 ; sub r15, r16, r17 ; lh r25, r26 }
+	{ mvz r5, r6, r7 ; sw r25, r26 ; info 19 }
+	{ mvz r5, r6, r7 ; sw r25, r26 ; slt r15, r16, r17 }
+	{ mvz r5, r6, r7 ; xor r15, r16, r17 ; prefetch r25 }
+	{ mz r15, r16, r17 ; addi r5, r6, 5 ; lb r25, r26 }
+	{ mz r15, r16, r17 ; and r5, r6, r7 ; lh_u r25, r26 }
+	{ mz r15, r16, r17 ; bitx r5, r6 ; lb r25, r26 }
+	{ mz r15, r16, r17 ; clz r5, r6 ; lb r25, r26 }
+	{ mz r15, r16, r17 ; ctz r5, r6 ; sw r25, r26 }
+	{ mz r15, r16, r17 ; info 19 ; sh r25, r26 }
+	{ mz r15, r16, r17 ; lb r25, r26 ; movei r5, 5 }
+	{ mz r15, r16, r17 ; lb r25, r26 ; s1a r5, r6, r7 }
+	{ mz r15, r16, r17 ; lb r25, r26 ; tblidxb1 r5, r6 }
+	{ mz r15, r16, r17 ; lb_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ mz r15, r16, r17 ; lb_u r25, r26 ; seq r5, r6, r7 }
+	{ mz r15, r16, r17 ; lb_u r25, r26 ; xor r5, r6, r7 }
+	{ mz r15, r16, r17 ; lh r25, r26 ; mulll_ss r5, r6, r7 }
+	{ mz r15, r16, r17 ; lh r25, r26 ; shli r5, r6, 5 }
+	{ mz r15, r16, r17 ; lh_u r25, r26 ; addi r5, r6, 5 }
+	{ mz r15, r16, r17 ; lh_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ mz r15, r16, r17 ; lh_u r25, r26 ; slt r5, r6, r7 }
+	{ mz r15, r16, r17 ; lw r25, r26 ; bitx r5, r6 }
+	{ mz r15, r16, r17 ; lw r25, r26 ; mz r5, r6, r7 }
+	{ mz r15, r16, r17 ; lw r25, r26 ; slte_u r5, r6, r7 }
+	{ mz r15, r16, r17 ; minih r5, r6, 5 }
+	{ mz r15, r16, r17 ; move r5, r6 ; sb r25, r26 }
+	{ mz r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lw r25, r26 }
+	{ mz r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lh_u r25, r26 }
+	{ mz r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ mz r15, r16, r17 ; mulll_ss r5, r6, r7 ; lh_u r25, r26 }
+	{ mz r15, r16, r17 ; mullla_ss r5, r6, r7 ; lh r25, r26 }
+	{ mz r15, r16, r17 ; mvnz r5, r6, r7 ; lb r25, r26 }
+	{ mz r15, r16, r17 ; mz r5, r6, r7 ; lb r25, r26 }
+	{ mz r15, r16, r17 ; nop ; sw r25, r26 }
+	{ mz r15, r16, r17 ; or r5, r6, r7 ; sw r25, r26 }
+	{ mz r15, r16, r17 ; pcnt r5, r6 ; lw r25, r26 }
+	{ mz r15, r16, r17 ; prefetch r25 ; mulhh_uu r5, r6, r7 }
+	{ mz r15, r16, r17 ; prefetch r25 ; s3a r5, r6, r7 }
+	{ mz r15, r16, r17 ; prefetch r25 ; tblidxb3 r5, r6 }
+	{ mz r15, r16, r17 ; rli r5, r6, 5 ; sh r25, r26 }
+	{ mz r15, r16, r17 ; s2a r5, r6, r7 ; sh r25, r26 }
+	{ mz r15, r16, r17 ; sb r25, r26 ; addi r5, r6, 5 }
+	{ mz r15, r16, r17 ; sb r25, r26 ; mullla_uu r5, r6, r7 }
+	{ mz r15, r16, r17 ; sb r25, r26 ; slt r5, r6, r7 }
+	{ mz r15, r16, r17 ; seq r5, r6, r7 ; lw r25, r26 }
+	{ mz r15, r16, r17 ; sh r25, r26 ; add r5, r6, r7 }
+	{ mz r15, r16, r17 ; sh r25, r26 ; mullla_ss r5, r6, r7 }
+	{ mz r15, r16, r17 ; sh r25, r26 ; shri r5, r6, 5 }
+	{ mz r15, r16, r17 ; shl r5, r6, r7 ; lh_u r25, r26 }
+	{ mz r15, r16, r17 ; shlih r5, r6, 5 }
+	{ mz r15, r16, r17 ; shri r5, r6, 5 ; sh r25, r26 }
+	{ mz r15, r16, r17 ; slt_u r5, r6, r7 ; prefetch r25 }
+	{ mz r15, r16, r17 ; slte_u r5, r6, r7 ; lh_u r25, r26 }
+	{ mz r15, r16, r17 ; slti r5, r6, 5 ; sh r25, r26 }
+	{ mz r15, r16, r17 ; sne r5, r6, r7 ; lh_u r25, r26 }
+	{ mz r15, r16, r17 ; srah r5, r6, r7 }
+	{ mz r15, r16, r17 ; sub r5, r6, r7 ; sh r25, r26 }
+	{ mz r15, r16, r17 ; sw r25, r26 ; movei r5, 5 }
+	{ mz r15, r16, r17 ; sw r25, r26 ; s1a r5, r6, r7 }
+	{ mz r15, r16, r17 ; sw r25, r26 ; tblidxb1 r5, r6 }
+	{ mz r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch r25 }
+	{ mz r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch r25 }
+	{ mz r5, r6, r7 ; add r15, r16, r17 ; lw r25, r26 }
+	{ mz r5, r6, r7 ; addib r15, r16, 5 }
+	{ mz r5, r6, r7 ; andi r15, r16, 5 ; prefetch r25 }
+	{ mz r5, r6, r7 ; ill ; lb r25, r26 }
+	{ mz r5, r6, r7 ; infol 0x1234 }
+	{ mz r5, r6, r7 ; lb r25, r26 ; move r15, r16 }
+	{ mz r5, r6, r7 ; lb r25, r26 ; slte r15, r16, r17 }
+	{ mz r5, r6, r7 ; lb_u r25, r26 ; movei r15, 5 }
+	{ mz r5, r6, r7 ; lb_u r25, r26 ; slte_u r15, r16, r17 }
+	{ mz r5, r6, r7 ; lh r25, r26 ; move r15, r16 }
+	{ mz r5, r6, r7 ; lh r25, r26 ; slte r15, r16, r17 }
+	{ mz r5, r6, r7 ; lh_u r25, r26 ; movei r15, 5 }
+	{ mz r5, r6, r7 ; lh_u r25, r26 ; slte_u r15, r16, r17 }
+	{ mz r5, r6, r7 ; lw r25, r26 ; mnz r15, r16, r17 }
+	{ mz r5, r6, r7 ; lw r25, r26 ; slt_u r15, r16, r17 }
+	{ mz r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ mz r5, r6, r7 ; move r15, r16 ; lh_u r25, r26 }
+	{ mz r5, r6, r7 ; mz r15, r16, r17 ; lb r25, r26 }
+	{ mz r5, r6, r7 ; nop ; sw r25, r26 }
+	{ mz r5, r6, r7 ; or r15, r16, r17 ; sw r25, r26 }
+	{ mz r5, r6, r7 ; prefetch r25 ; andi r15, r16, 5 }
+	{ mz r5, r6, r7 ; prefetch r25 ; shli r15, r16, 5 }
+	{ mz r5, r6, r7 ; rl r15, r16, r17 ; lw r25, r26 }
+	{ mz r5, r6, r7 ; s1a r15, r16, r17 ; lw r25, r26 }
+	{ mz r5, r6, r7 ; s3a r15, r16, r17 ; lw r25, r26 }
+	{ mz r5, r6, r7 ; sb r25, r26 ; or r15, r16, r17 }
+	{ mz r5, r6, r7 ; sb r25, r26 ; sra r15, r16, r17 }
+	{ mz r5, r6, r7 ; seqi r15, r16, 5 ; lh r25, r26 }
+	{ mz r5, r6, r7 ; sh r25, r26 ; movei r15, 5 }
+	{ mz r5, r6, r7 ; sh r25, r26 ; slte_u r15, r16, r17 }
+	{ mz r5, r6, r7 ; shlb r15, r16, r17 }
+	{ mz r5, r6, r7 ; shr r15, r16, r17 ; sb r25, r26 }
+	{ mz r5, r6, r7 ; slt r15, r16, r17 ; lh r25, r26 }
+	{ mz r5, r6, r7 ; slte r15, r16, r17 ; lb r25, r26 }
+	{ mz r5, r6, r7 ; slteb r15, r16, r17 }
+	{ mz r5, r6, r7 ; slti_u r15, r16, 5 ; lw r25, r26 }
+	{ mz r5, r6, r7 ; sneb r15, r16, r17 }
+	{ mz r5, r6, r7 ; srai r15, r16, 5 ; sb r25, r26 }
+	{ mz r5, r6, r7 ; subs r15, r16, r17 }
+	{ mz r5, r6, r7 ; sw r25, r26 ; s2a r15, r16, r17 }
+	{ mz r5, r6, r7 ; swadd r15, r16, 5 }
+	{ mzb r15, r16, r17 ; addib r5, r6, 5 }
+	{ mzb r15, r16, r17 ; info 19 }
+	{ mzb r15, r16, r17 ; moveli r5, 0x1234 }
+	{ mzb r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ mzb r15, r16, r17 ; rli r5, r6, 5 }
+	{ mzb r15, r16, r17 ; shlib r5, r6, 5 }
+	{ mzb r15, r16, r17 ; slti r5, r6, 5 }
+	{ mzb r15, r16, r17 ; subs r5, r6, r7 }
+	{ mzb r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ mzb r5, r6, r7 ; lb_u r15, r16 }
+	{ mzb r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ mzb r5, r6, r7 ; packhs r15, r16, r17 }
+	{ mzb r5, r6, r7 ; shlb r15, r16, r17 }
+	{ mzb r5, r6, r7 ; slteh_u r15, r16, r17 }
+	{ mzb r5, r6, r7 ; subbs_u r15, r16, r17 }
+	{ mzh r15, r16, r17 ; adds r5, r6, r7 }
+	{ mzh r15, r16, r17 ; intlb r5, r6, r7 }
+	{ mzh r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ mzh r15, r16, r17 ; mulllsa_uu r5, r6, r7 }
+	{ mzh r15, r16, r17 ; sadab_u r5, r6, r7 }
+	{ mzh r15, r16, r17 ; shrh r5, r6, r7 }
+	{ mzh r15, r16, r17 ; sltih r5, r6, 5 }
+	{ mzh r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ mzh r5, r6, r7 ; fnop }
+	{ mzh r5, r6, r7 ; lh_u r15, r16 }
+	{ mzh r5, r6, r7 ; mnzb r15, r16, r17 }
+	{ mzh r5, r6, r7 ; rl r15, r16, r17 }
+	{ mzh r5, r6, r7 ; shlih r15, r16, 5 }
+	{ mzh r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ mzh r5, r6, r7 ; sw r15, r16 }
+	{ nop ; add r5, r6, r7 ; lh_u r25, r26 }
+	{ nop ; addi r15, r16, 5 ; prefetch r25 }
+	{ nop ; addli r5, r6, 0x1234 }
+	{ nop ; and r5, r6, r7 ; lh_u r25, r26 }
+	{ nop ; andi r5, r6, 5 ; lh_u r25, r26 }
+	{ nop ; bitx r5, r6 }
+	{ nop ; clz r5, r6 ; sw r25, r26 }
+	{ nop ; fnop ; lb_u r25, r26 }
+	{ nop ; info 19 ; lb r25, r26 }
+	{ nop ; iret }
+	{ nop ; lb r25, r26 ; info 19 }
+	{ nop ; lb r25, r26 ; nop }
+	{ nop ; lb r25, r26 ; seqi r15, r16, 5 }
+	{ nop ; lb r25, r26 ; slti_u r15, r16, 5 }
+	{ nop ; lb_u r25, r26 ; addi r15, r16, 5 }
+	{ nop ; lb_u r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ nop ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ nop ; lb_u r25, r26 ; shri r15, r16, 5 }
+	{ nop ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ nop ; lh r25, r26 ; bitx r5, r6 }
+	{ nop ; lh r25, r26 ; mullla_ss r5, r6, r7 }
+	{ nop ; lh r25, r26 ; s2a r15, r16, r17 }
+	{ nop ; lh r25, r26 ; slte r15, r16, r17 }
+	{ nop ; lh r25, r26 ; xor r15, r16, r17 }
+	{ nop ; lh_u r25, r26 ; mnz r5, r6, r7 }
+	{ nop ; lh_u r25, r26 ; nor r5, r6, r7 }
+	{ nop ; lh_u r25, r26 ; shl r15, r16, r17 }
+	{ nop ; lh_u r25, r26 ; sne r15, r16, r17 }
+	{ nop ; lw r25, r26 ; add r5, r6, r7 }
+	{ nop ; lw r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ nop ; lw r25, r26 ; pcnt r5, r6 }
+	{ nop ; lw r25, r26 ; shr r5, r6, r7 }
+	{ nop ; lw r25, r26 ; srai r5, r6, 5 }
+	{ nop ; maxih r5, r6, 5 }
+	{ nop ; mnz r15, r16, r17 ; sh r25, r26 }
+	{ nop ; move r15, r16 ; lh_u r25, r26 }
+	{ nop ; movei r15, 5 ; lh_u r25, r26 }
+	{ nop ; movelis r5, 0x1234 }
+	{ nop ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ nop ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ nop ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ nop ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ nop ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ nop ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ nop ; mz r5, r6, r7 ; lw r25, r26 }
+	{ nop ; nop }
+	{ nop ; nor r5, r6, r7 }
+	{ nop ; or r5, r6, r7 }
+	{ nop ; ori r5, r6, 5 }
+	{ nop ; prefetch r25 ; add r15, r16, r17 }
+	{ nop ; prefetch r25 ; movei r5, 5 }
+	{ nop ; prefetch r25 ; ori r5, r6, 5 }
+	{ nop ; prefetch r25 ; shr r15, r16, r17 }
+	{ nop ; prefetch r25 ; srai r15, r16, 5 }
+	{ nop ; rl r15, r16, r17 ; sw r25, r26 }
+	{ nop ; rli r15, r16, 5 ; sw r25, r26 }
+	{ nop ; s1a r15, r16, r17 ; sw r25, r26 }
+	{ nop ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ nop ; s3a r15, r16, r17 ; sw r25, r26 }
+	{ nop ; sb r25, r26 ; add r5, r6, r7 }
+	{ nop ; sb r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ nop ; sb r25, r26 ; pcnt r5, r6 }
+	{ nop ; sb r25, r26 ; shr r5, r6, r7 }
+	{ nop ; sb r25, r26 ; srai r5, r6, 5 }
+	{ nop ; seq r15, r16, r17 }
+	{ nop ; seqi r15, r16, 5 ; prefetch r25 }
+	{ nop ; sh r25, r26 ; add r15, r16, r17 }
+	{ nop ; sh r25, r26 ; movei r5, 5 }
+	{ nop ; sh r25, r26 ; ori r5, r6, 5 }
+	{ nop ; sh r25, r26 ; shr r15, r16, r17 }
+	{ nop ; sh r25, r26 ; srai r15, r16, 5 }
+	{ nop ; shl r15, r16, r17 ; sw r25, r26 }
+	{ nop ; shli r15, r16, 5 ; lw r25, r26 }
+	{ nop ; shr r15, r16, r17 ; lb r25, r26 }
+	{ nop ; shrb r15, r16, r17 }
+	{ nop ; shri r5, r6, 5 ; sb r25, r26 }
+	{ nop ; slt r5, r6, r7 ; lh r25, r26 }
+	{ nop ; slt_u r5, r6, r7 ; lh r25, r26 }
+	{ nop ; slte r15, r16, r17 ; sw r25, r26 }
+	{ nop ; slte_u r15, r16, r17 ; sw r25, r26 }
+	{ nop ; slth r15, r16, r17 }
+	{ nop ; slti r5, r6, 5 ; sb r25, r26 }
+	{ nop ; slti_u r5, r6, 5 ; sb r25, r26 }
+	{ nop ; sne r15, r16, r17 ; sw r25, r26 }
+	{ nop ; sra r15, r16, r17 ; lw r25, r26 }
+	{ nop ; srai r15, r16, 5 ; lb r25, r26 }
+	{ nop ; sraib r15, r16, 5 }
+	{ nop ; sub r5, r6, r7 ; sb r25, r26 }
+	{ nop ; sw r25, r26 ; and r5, r6, r7 }
+	{ nop ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ nop ; sw r25, r26 ; rli r5, r6, 5 }
+	{ nop ; sw r25, r26 ; slt r5, r6, r7 }
+	{ nop ; sw r25, r26 ; tblidxb1 r5, r6 }
+	{ nop ; tblidxb0 r5, r6 }
+	{ nop ; tblidxb2 r5, r6 }
+	{ nop ; xor r15, r16, r17 ; sh r25, r26 }
+	{ nor r15, r16, r17 ; add r5, r6, r7 ; prefetch r25 }
+	{ nor r15, r16, r17 ; addih r5, r6, 5 }
+	{ nor r15, r16, r17 ; andi r5, r6, 5 ; lw r25, r26 }
+	{ nor r15, r16, r17 ; bytex r5, r6 ; lb_u r25, r26 }
+	{ nor r15, r16, r17 ; crc32_8 r5, r6, r7 }
+	{ nor r15, r16, r17 ; fnop ; sw r25, r26 }
+	{ nor r15, r16, r17 ; lb r25, r26 ; andi r5, r6, 5 }
+	{ nor r15, r16, r17 ; lb r25, r26 ; mvz r5, r6, r7 }
+	{ nor r15, r16, r17 ; lb r25, r26 ; slte r5, r6, r7 }
+	{ nor r15, r16, r17 ; lb_u r25, r26 ; clz r5, r6 }
+	{ nor r15, r16, r17 ; lb_u r25, r26 ; nor r5, r6, r7 }
+	{ nor r15, r16, r17 ; lb_u r25, r26 ; slti_u r5, r6, 5 }
+	{ nor r15, r16, r17 ; lh r25, r26 ; info 19 }
+	{ nor r15, r16, r17 ; lh r25, r26 ; pcnt r5, r6 }
+	{ nor r15, r16, r17 ; lh r25, r26 ; srai r5, r6, 5 }
+	{ nor r15, r16, r17 ; lh_u r25, r26 ; movei r5, 5 }
+	{ nor r15, r16, r17 ; lh_u r25, r26 ; s1a r5, r6, r7 }
+	{ nor r15, r16, r17 ; lh_u r25, r26 ; tblidxb1 r5, r6 }
+	{ nor r15, r16, r17 ; lw r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ nor r15, r16, r17 ; lw r25, r26 ; seq r5, r6, r7 }
+	{ nor r15, r16, r17 ; lw r25, r26 ; xor r5, r6, r7 }
+	{ nor r15, r16, r17 ; mnz r5, r6, r7 }
+	{ nor r15, r16, r17 ; movei r5, 5 ; sh r25, r26 }
+	{ nor r15, r16, r17 ; mulhh_uu r5, r6, r7 ; lw r25, r26 }
+	{ nor r15, r16, r17 ; mulhha_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ nor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; lw r25, r26 }
+	{ nor r15, r16, r17 ; mulll_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ nor r15, r16, r17 ; mullla_uu r5, r6, r7 ; lh r25, r26 }
+	{ nor r15, r16, r17 ; mvz r5, r6, r7 ; lb_u r25, r26 }
+	{ nor r15, r16, r17 ; mzh r5, r6, r7 }
+	{ nor r15, r16, r17 ; nor r5, r6, r7 }
+	{ nor r15, r16, r17 ; ori r5, r6, 5 }
+	{ nor r15, r16, r17 ; prefetch r25 ; bytex r5, r6 }
+	{ nor r15, r16, r17 ; prefetch r25 ; nop }
+	{ nor r15, r16, r17 ; prefetch r25 ; slti r5, r6, 5 }
+	{ nor r15, r16, r17 ; rl r5, r6, r7 ; sw r25, r26 }
+	{ nor r15, r16, r17 ; s1a r5, r6, r7 ; sw r25, r26 }
+	{ nor r15, r16, r17 ; s3a r5, r6, r7 ; sw r25, r26 }
+	{ nor r15, r16, r17 ; sb r25, r26 ; movei r5, 5 }
+	{ nor r15, r16, r17 ; sb r25, r26 ; s1a r5, r6, r7 }
+	{ nor r15, r16, r17 ; sb r25, r26 ; tblidxb1 r5, r6 }
+	{ nor r15, r16, r17 ; seqi r5, r6, 5 ; lh_u r25, r26 }
+	{ nor r15, r16, r17 ; sh r25, r26 ; move r5, r6 }
+	{ nor r15, r16, r17 ; sh r25, r26 ; rli r5, r6, 5 }
+	{ nor r15, r16, r17 ; sh r25, r26 ; tblidxb0 r5, r6 }
+	{ nor r15, r16, r17 ; shli r5, r6, 5 ; lh r25, r26 }
+	{ nor r15, r16, r17 ; shrb r5, r6, r7 }
+	{ nor r15, r16, r17 ; slt r5, r6, r7 ; sb r25, r26 }
+	{ nor r15, r16, r17 ; slte r5, r6, r7 ; lw r25, r26 }
+	{ nor r15, r16, r17 ; slth r5, r6, r7 }
+	{ nor r15, r16, r17 ; slti_u r5, r6, 5 ; sw r25, r26 }
+	{ nor r15, r16, r17 ; sra r5, r6, r7 ; lh r25, r26 }
+	{ nor r15, r16, r17 ; sraib r5, r6, 5 }
+	{ nor r15, r16, r17 ; sw r25, r26 ; andi r5, r6, 5 }
+	{ nor r15, r16, r17 ; sw r25, r26 ; mvz r5, r6, r7 }
+	{ nor r15, r16, r17 ; sw r25, r26 ; slte r5, r6, r7 }
+	{ nor r15, r16, r17 ; tblidxb0 r5, r6 ; sb r25, r26 }
+	{ nor r15, r16, r17 ; tblidxb2 r5, r6 ; sb r25, r26 }
+	{ nor r15, r16, r17 ; xor r5, r6, r7 ; sb r25, r26 }
+	{ nor r5, r6, r7 ; addi r15, r16, 5 ; lb_u r25, r26 }
+	{ nor r5, r6, r7 ; and r15, r16, r17 ; sb r25, r26 }
+	{ nor r5, r6, r7 ; fnop ; lh r25, r26 }
+	{ nor r5, r6, r7 ; info 19 ; lb_u r25, r26 }
+	{ nor r5, r6, r7 ; lb r15, r16 }
+	{ nor r5, r6, r7 ; lb r25, r26 ; s3a r15, r16, r17 }
+	{ nor r5, r6, r7 ; lb_u r25, r26 ; add r15, r16, r17 }
+	{ nor r5, r6, r7 ; lb_u r25, r26 ; seq r15, r16, r17 }
+	{ nor r5, r6, r7 ; lh r15, r16 }
+	{ nor r5, r6, r7 ; lh r25, r26 ; s3a r15, r16, r17 }
+	{ nor r5, r6, r7 ; lh_u r25, r26 ; add r15, r16, r17 }
+	{ nor r5, r6, r7 ; lh_u r25, r26 ; seq r15, r16, r17 }
+	{ nor r5, r6, r7 ; lnk r15 }
+	{ nor r5, r6, r7 ; lw r25, r26 ; s2a r15, r16, r17 }
+	{ nor r5, r6, r7 ; lw_na r15, r16 }
+	{ nor r5, r6, r7 ; mnz r15, r16, r17 ; sb r25, r26 }
+	{ nor r5, r6, r7 ; movei r15, 5 ; lw r25, r26 }
+	{ nor r5, r6, r7 ; mzh r15, r16, r17 }
+	{ nor r5, r6, r7 ; nor r15, r16, r17 }
+	{ nor r5, r6, r7 ; ori r15, r16, 5 }
+	{ nor r5, r6, r7 ; prefetch r25 ; ori r15, r16, 5 }
+	{ nor r5, r6, r7 ; prefetch r25 ; srai r15, r16, 5 }
+	{ nor r5, r6, r7 ; rli r15, r16, 5 ; prefetch r25 }
+	{ nor r5, r6, r7 ; s2a r15, r16, r17 ; prefetch r25 }
+	{ nor r5, r6, r7 ; sb r25, r26 ; fnop }
+	{ nor r5, r6, r7 ; sb r25, r26 ; shr r15, r16, r17 }
+	{ nor r5, r6, r7 ; seq r15, r16, r17 ; prefetch r25 }
+	{ nor r5, r6, r7 ; sh r25, r26 ; add r15, r16, r17 }
+	{ nor r5, r6, r7 ; sh r25, r26 ; seq r15, r16, r17 }
+	{ nor r5, r6, r7 ; shl r15, r16, r17 ; lb_u r25, r26 }
+	{ nor r5, r6, r7 ; shli r15, r16, 5 }
+	{ nor r5, r6, r7 ; shri r15, r16, 5 ; prefetch r25 }
+	{ nor r5, r6, r7 ; slt_u r15, r16, r17 ; lh_u r25, r26 }
+	{ nor r5, r6, r7 ; slte_u r15, r16, r17 ; lb_u r25, r26 }
+	{ nor r5, r6, r7 ; slti r15, r16, 5 ; prefetch r25 }
+	{ nor r5, r6, r7 ; sne r15, r16, r17 ; lb_u r25, r26 }
+	{ nor r5, r6, r7 ; sra r15, r16, r17 }
+	{ nor r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 }
+	{ nor r5, r6, r7 ; sw r25, r26 ; movei r15, 5 }
+	{ nor r5, r6, r7 ; sw r25, r26 ; slte_u r15, r16, r17 }
+	{ nor r5, r6, r7 ; xor r15, r16, r17 ; sw r25, r26 }
+	{ or r15, r16, r17 ; addi r5, r6, 5 ; lh_u r25, r26 }
+	{ or r15, r16, r17 ; and r5, r6, r7 ; sb r25, r26 }
+	{ or r15, r16, r17 ; bitx r5, r6 ; lh_u r25, r26 }
+	{ or r15, r16, r17 ; clz r5, r6 ; lh_u r25, r26 }
+	{ or r15, r16, r17 ; fnop ; lb r25, r26 }
+	{ or r15, r16, r17 ; infol 0x1234 }
+	{ or r15, r16, r17 ; lb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ or r15, r16, r17 ; lb r25, r26 ; seq r5, r6, r7 }
+	{ or r15, r16, r17 ; lb r25, r26 ; xor r5, r6, r7 }
+	{ or r15, r16, r17 ; lb_u r25, r26 ; mulll_ss r5, r6, r7 }
+	{ or r15, r16, r17 ; lb_u r25, r26 ; shli r5, r6, 5 }
+	{ or r15, r16, r17 ; lh r25, r26 ; addi r5, r6, 5 }
+	{ or r15, r16, r17 ; lh r25, r26 ; mullla_uu r5, r6, r7 }
+	{ or r15, r16, r17 ; lh r25, r26 ; slt r5, r6, r7 }
+	{ or r15, r16, r17 ; lh_u r25, r26 ; bitx r5, r6 }
+	{ or r15, r16, r17 ; lh_u r25, r26 ; mz r5, r6, r7 }
+	{ or r15, r16, r17 ; lh_u r25, r26 ; slte_u r5, r6, r7 }
+	{ or r15, r16, r17 ; lw r25, r26 ; ctz r5, r6 }
+	{ or r15, r16, r17 ; lw r25, r26 ; or r5, r6, r7 }
+	{ or r15, r16, r17 ; lw r25, r26 ; sne r5, r6, r7 }
+	{ or r15, r16, r17 ; mnz r5, r6, r7 ; lb_u r25, r26 }
+	{ or r15, r16, r17 ; move r5, r6 }
+	{ or r15, r16, r17 ; mulhh_ss r5, r6, r7 ; sh r25, r26 }
+	{ or r15, r16, r17 ; mulhha_ss r5, r6, r7 ; sb r25, r26 }
+	{ or r15, r16, r17 ; mulhla_ss r5, r6, r7 }
+	{ or r15, r16, r17 ; mulll_ss r5, r6, r7 ; sb r25, r26 }
+	{ or r15, r16, r17 ; mullla_ss r5, r6, r7 ; prefetch r25 }
+	{ or r15, r16, r17 ; mvnz r5, r6, r7 ; lh_u r25, r26 }
+	{ or r15, r16, r17 ; mz r5, r6, r7 ; lh_u r25, r26 }
+	{ or r15, r16, r17 ; nor r5, r6, r7 ; lb_u r25, r26 }
+	{ or r15, r16, r17 ; ori r5, r6, 5 ; lb_u r25, r26 }
+	{ or r15, r16, r17 ; pcnt r5, r6 ; sh r25, r26 }
+	{ or r15, r16, r17 ; prefetch r25 ; mulhlsa_uu r5, r6, r7 }
+	{ or r15, r16, r17 ; prefetch r25 ; shl r5, r6, r7 }
+	{ or r15, r16, r17 ; rl r5, r6, r7 ; lb r25, r26 }
+	{ or r15, r16, r17 ; s1a r5, r6, r7 ; lb r25, r26 }
+	{ or r15, r16, r17 ; s3a r5, r6, r7 ; lb r25, r26 }
+	{ or r15, r16, r17 ; sb r25, r26 ; bitx r5, r6 }
+	{ or r15, r16, r17 ; sb r25, r26 ; mz r5, r6, r7 }
+	{ or r15, r16, r17 ; sb r25, r26 ; slte_u r5, r6, r7 }
+	{ or r15, r16, r17 ; seq r5, r6, r7 ; sh r25, r26 }
+	{ or r15, r16, r17 ; sh r25, r26 ; andi r5, r6, 5 }
+	{ or r15, r16, r17 ; sh r25, r26 ; mvz r5, r6, r7 }
+	{ or r15, r16, r17 ; sh r25, r26 ; slte r5, r6, r7 }
+	{ or r15, r16, r17 ; shl r5, r6, r7 ; sb r25, r26 }
+	{ or r15, r16, r17 ; shr r5, r6, r7 ; lh r25, r26 }
+	{ or r15, r16, r17 ; shrib r5, r6, 5 }
+	{ or r15, r16, r17 ; slt_u r5, r6, r7 ; sw r25, r26 }
+	{ or r15, r16, r17 ; slte_u r5, r6, r7 ; sb r25, r26 }
+	{ or r15, r16, r17 ; slti_u r5, r6, 5 ; lb r25, r26 }
+	{ or r15, r16, r17 ; sne r5, r6, r7 ; sb r25, r26 }
+	{ or r15, r16, r17 ; srai r5, r6, 5 ; lh r25, r26 }
+	{ or r15, r16, r17 ; subb r5, r6, r7 }
+	{ or r15, r16, r17 ; sw r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ or r15, r16, r17 ; sw r25, r26 ; seq r5, r6, r7 }
+	{ or r15, r16, r17 ; sw r25, r26 ; xor r5, r6, r7 }
+	{ or r15, r16, r17 ; tblidxb1 r5, r6 ; sw r25, r26 }
+	{ or r15, r16, r17 ; tblidxb3 r5, r6 ; sw r25, r26 }
+	{ or r5, r6, r7 ; add r15, r16, r17 ; sh r25, r26 }
+	{ or r5, r6, r7 ; addlis r15, r16, 0x1234 }
+	{ or r5, r6, r7 ; andi r15, r16, 5 ; sw r25, r26 }
+	{ or r5, r6, r7 ; ill ; lh_u r25, r26 }
+	{ or r5, r6, r7 ; intlb r15, r16, r17 }
+	{ or r5, r6, r7 ; lb r25, r26 ; nop }
+	{ or r5, r6, r7 ; lb r25, r26 ; slti_u r15, r16, 5 }
+	{ or r5, r6, r7 ; lb_u r25, r26 ; nor r15, r16, r17 }
+	{ or r5, r6, r7 ; lb_u r25, r26 ; sne r15, r16, r17 }
+	{ or r5, r6, r7 ; lh r25, r26 ; nop }
+	{ or r5, r6, r7 ; lh r25, r26 ; slti_u r15, r16, 5 }
+	{ or r5, r6, r7 ; lh_u r25, r26 ; nor r15, r16, r17 }
+	{ or r5, r6, r7 ; lh_u r25, r26 ; sne r15, r16, r17 }
+	{ or r5, r6, r7 ; lw r25, r26 ; mz r15, r16, r17 }
+	{ or r5, r6, r7 ; lw r25, r26 ; slti r15, r16, 5 }
+	{ or r5, r6, r7 ; minih r15, r16, 5 }
+	{ or r5, r6, r7 ; move r15, r16 ; sb r25, r26 }
+	{ or r5, r6, r7 ; mz r15, r16, r17 ; lh_u r25, r26 }
+	{ or r5, r6, r7 ; nor r15, r16, r17 ; lb_u r25, r26 }
+	{ or r5, r6, r7 ; ori r15, r16, 5 ; lb_u r25, r26 }
+	{ or r5, r6, r7 ; prefetch r25 ; info 19 }
+	{ or r5, r6, r7 ; prefetch r25 ; slt r15, r16, r17 }
+	{ or r5, r6, r7 ; rl r15, r16, r17 ; sh r25, r26 }
+	{ or r5, r6, r7 ; s1a r15, r16, r17 ; sh r25, r26 }
+	{ or r5, r6, r7 ; s3a r15, r16, r17 ; sh r25, r26 }
+	{ or r5, r6, r7 ; sb r25, r26 ; rli r15, r16, 5 }
+	{ or r5, r6, r7 ; sb r25, r26 ; xor r15, r16, r17 }
+	{ or r5, r6, r7 ; seqi r15, r16, 5 ; prefetch r25 }
+	{ or r5, r6, r7 ; sh r25, r26 ; nor r15, r16, r17 }
+	{ or r5, r6, r7 ; sh r25, r26 ; sne r15, r16, r17 }
+	{ or r5, r6, r7 ; shli r15, r16, 5 ; lb_u r25, r26 }
+	{ or r5, r6, r7 ; shr r15, r16, r17 }
+	{ or r5, r6, r7 ; slt r15, r16, r17 ; prefetch r25 }
+	{ or r5, r6, r7 ; slte r15, r16, r17 ; lh_u r25, r26 }
+	{ or r5, r6, r7 ; slteh_u r15, r16, r17 }
+	{ or r5, r6, r7 ; slti_u r15, r16, 5 ; sh r25, r26 }
+	{ or r5, r6, r7 ; sra r15, r16, r17 ; lb_u r25, r26 }
+	{ or r5, r6, r7 ; srai r15, r16, 5 }
+	{ or r5, r6, r7 ; sw r25, r26 ; addi r15, r16, 5 }
+	{ or r5, r6, r7 ; sw r25, r26 ; seqi r15, r16, 5 }
+	{ or r5, r6, r7 ; xor r15, r16, r17 ; lb r25, r26 }
+	{ ori r15, r16, 5 ; add r5, r6, r7 }
+	{ ori r15, r16, 5 ; adiffb_u r5, r6, r7 }
+	{ ori r15, r16, 5 ; andi r5, r6, 5 ; sw r25, r26 }
+	{ ori r15, r16, 5 ; bytex r5, r6 ; prefetch r25 }
+	{ ori r15, r16, 5 ; ctz r5, r6 ; lh_u r25, r26 }
+	{ ori r15, r16, 5 ; info 19 ; lh r25, r26 }
+	{ ori r15, r16, 5 ; lb r25, r26 ; ctz r5, r6 }
+	{ ori r15, r16, 5 ; lb r25, r26 ; or r5, r6, r7 }
+	{ ori r15, r16, 5 ; lb r25, r26 ; sne r5, r6, r7 }
+	{ ori r15, r16, 5 ; lb_u r25, r26 ; mnz r5, r6, r7 }
+	{ ori r15, r16, 5 ; lb_u r25, r26 ; rl r5, r6, r7 }
+	{ ori r15, r16, 5 ; lb_u r25, r26 ; sub r5, r6, r7 }
+	{ ori r15, r16, 5 ; lh r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ ori r15, r16, 5 ; lh r25, r26 ; s2a r5, r6, r7 }
+	{ ori r15, r16, 5 ; lh r25, r26 ; tblidxb2 r5, r6 }
+	{ ori r15, r16, 5 ; lh_u r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ ori r15, r16, 5 ; lh_u r25, r26 ; seqi r5, r6, 5 }
+	{ ori r15, r16, 5 ; lh_u r25, r26 }
+	{ ori r15, r16, 5 ; lw r25, r26 ; mulll_uu r5, r6, r7 }
+	{ ori r15, r16, 5 ; lw r25, r26 ; shr r5, r6, r7 }
+	{ ori r15, r16, 5 ; maxib_u r5, r6, 5 }
+	{ ori r15, r16, 5 ; move r5, r6 ; lb_u r25, r26 }
+	{ ori r15, r16, 5 ; movelis r5, 0x1234 }
+	{ ori r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sw r25, r26 }
+	{ ori r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sh r25, r26 }
+	{ ori r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sw r25, r26 }
+	{ ori r15, r16, 5 ; mulll_uu r5, r6, r7 ; sh r25, r26 }
+	{ ori r15, r16, 5 ; mullla_uu r5, r6, r7 ; sb r25, r26 }
+	{ ori r15, r16, 5 ; mvz r5, r6, r7 ; prefetch r25 }
+	{ ori r15, r16, 5 ; nop ; lh_u r25, r26 }
+	{ ori r15, r16, 5 ; or r5, r6, r7 ; lh_u r25, r26 }
+	{ ori r15, r16, 5 ; packlb r5, r6, r7 }
+	{ ori r15, r16, 5 ; prefetch r25 ; info 19 }
+	{ ori r15, r16, 5 ; prefetch r25 ; pcnt r5, r6 }
+	{ ori r15, r16, 5 ; prefetch r25 ; srai r5, r6, 5 }
+	{ ori r15, r16, 5 ; rli r5, r6, 5 ; lh r25, r26 }
+	{ ori r15, r16, 5 ; s2a r5, r6, r7 ; lh r25, r26 }
+	{ ori r15, r16, 5 ; sadah_u r5, r6, r7 }
+	{ ori r15, r16, 5 ; sb r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ ori r15, r16, 5 ; sb r25, r26 ; seqi r5, r6, 5 }
+	{ ori r15, r16, 5 ; sb r25, r26 }
+	{ ori r15, r16, 5 ; seqi r5, r6, 5 ; sh r25, r26 }
+	{ ori r15, r16, 5 ; sh r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ ori r15, r16, 5 ; sh r25, r26 ; seq r5, r6, r7 }
+	{ ori r15, r16, 5 ; sh r25, r26 ; xor r5, r6, r7 }
+	{ ori r15, r16, 5 ; shli r5, r6, 5 ; sb r25, r26 }
+	{ ori r15, r16, 5 ; shri r5, r6, 5 ; lh r25, r26 }
+	{ ori r15, r16, 5 ; slt_u r5, r6, r7 ; lb r25, r26 }
+	{ ori r15, r16, 5 ; slte r5, r6, r7 ; sw r25, r26 }
+	{ ori r15, r16, 5 ; slti r5, r6, 5 ; lh r25, r26 }
+	{ ori r15, r16, 5 ; sltih r5, r6, 5 }
+	{ ori r15, r16, 5 ; sra r5, r6, r7 ; sb r25, r26 }
+	{ ori r15, r16, 5 ; sub r5, r6, r7 ; lh r25, r26 }
+	{ ori r15, r16, 5 ; sw r25, r26 ; ctz r5, r6 }
+	{ ori r15, r16, 5 ; sw r25, r26 ; or r5, r6, r7 }
+	{ ori r15, r16, 5 ; sw r25, r26 ; sne r5, r6, r7 }
+	{ ori r15, r16, 5 ; tblidxb1 r5, r6 ; lb r25, r26 }
+	{ ori r15, r16, 5 ; tblidxb3 r5, r6 ; lb r25, r26 }
+	{ ori r15, r16, 5 ; xori r5, r6, 5 }
+	{ ori r5, r6, 5 ; addi r15, r16, 5 ; prefetch r25 }
+	{ ori r5, r6, 5 ; andi r15, r16, 5 ; lb r25, r26 }
+	{ ori r5, r6, 5 ; fnop ; sb r25, r26 }
+	{ ori r5, r6, 5 ; info 19 ; prefetch r25 }
+	{ ori r5, r6, 5 ; lb r25, r26 ; andi r15, r16, 5 }
+	{ ori r5, r6, 5 ; lb r25, r26 ; shli r15, r16, 5 }
+	{ ori r5, r6, 5 ; lb_u r25, r26 ; fnop }
+	{ ori r5, r6, 5 ; lb_u r25, r26 ; shr r15, r16, r17 }
+	{ ori r5, r6, 5 ; lh r25, r26 ; andi r15, r16, 5 }
+	{ ori r5, r6, 5 ; lh r25, r26 ; shli r15, r16, 5 }
+	{ ori r5, r6, 5 ; lh_u r25, r26 ; fnop }
+	{ ori r5, r6, 5 ; lh_u r25, r26 ; shr r15, r16, r17 }
+	{ ori r5, r6, 5 ; lw r25, r26 ; and r15, r16, r17 }
+	{ ori r5, r6, 5 ; lw r25, r26 ; shl r15, r16, r17 }
+	{ ori r5, r6, 5 ; maxh r15, r16, r17 }
+	{ ori r5, r6, 5 ; mnzb r15, r16, r17 }
+	{ ori r5, r6, 5 ; movei r15, 5 ; sw r25, r26 }
+	{ ori r5, r6, 5 ; nop ; lh_u r25, r26 }
+	{ ori r5, r6, 5 ; or r15, r16, r17 ; lh_u r25, r26 }
+	{ ori r5, r6, 5 ; packlb r15, r16, r17 }
+	{ ori r5, r6, 5 ; prefetch r25 ; s2a r15, r16, r17 }
+	{ ori r5, r6, 5 ; raise }
+	{ ori r5, r6, 5 ; rli r15, r16, 5 }
+	{ ori r5, r6, 5 ; s2a r15, r16, r17 }
+	{ ori r5, r6, 5 ; sb r25, r26 ; move r15, r16 }
+	{ ori r5, r6, 5 ; sb r25, r26 ; slte r15, r16, r17 }
+	{ ori r5, r6, 5 ; seq r15, r16, r17 }
+	{ ori r5, r6, 5 ; sh r25, r26 ; fnop }
+	{ ori r5, r6, 5 ; sh r25, r26 ; shr r15, r16, r17 }
+	{ ori r5, r6, 5 ; shl r15, r16, r17 ; prefetch r25 }
+	{ ori r5, r6, 5 ; shr r15, r16, r17 ; lb_u r25, r26 }
+	{ ori r5, r6, 5 ; shri r15, r16, 5 }
+	{ ori r5, r6, 5 ; slt_u r15, r16, r17 ; sh r25, r26 }
+	{ ori r5, r6, 5 ; slte_u r15, r16, r17 ; prefetch r25 }
+	{ ori r5, r6, 5 ; slti r15, r16, 5 }
+	{ ori r5, r6, 5 ; sne r15, r16, r17 ; prefetch r25 }
+	{ ori r5, r6, 5 ; srai r15, r16, 5 ; lb_u r25, r26 }
+	{ ori r5, r6, 5 ; sub r15, r16, r17 }
+	{ ori r5, r6, 5 ; sw r25, r26 ; or r15, r16, r17 }
+	{ ori r5, r6, 5 ; sw r25, r26 ; sra r15, r16, r17 }
+	{ packbs_u r15, r16, r17 ; addb r5, r6, r7 }
+	{ packbs_u r15, r16, r17 ; crc32_32 r5, r6, r7 }
+	{ packbs_u r15, r16, r17 ; mnz r5, r6, r7 }
+	{ packbs_u r15, r16, r17 ; mulhla_us r5, r6, r7 }
+	{ packbs_u r15, r16, r17 ; packhb r5, r6, r7 }
+	{ packbs_u r15, r16, r17 ; seqih r5, r6, 5 }
+	{ packbs_u r15, r16, r17 ; slteb_u r5, r6, r7 }
+	{ packbs_u r15, r16, r17 ; sub r5, r6, r7 }
+	{ packbs_u r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ packbs_u r5, r6, r7 ; jalr r15 }
+	{ packbs_u r5, r6, r7 ; maxih r15, r16, 5 }
+	{ packbs_u r5, r6, r7 ; nor r15, r16, r17 }
+	{ packbs_u r5, r6, r7 ; seqib r15, r16, 5 }
+	{ packbs_u r5, r6, r7 ; slte r15, r16, r17 }
+	{ packbs_u r5, r6, r7 ; srai r15, r16, 5 }
+	{ packhb r15, r16, r17 ; addi r5, r6, 5 }
+	{ packhb r15, r16, r17 ; fnop }
+	{ packhb r15, r16, r17 ; movei r5, 5 }
+	{ packhb r15, r16, r17 ; mulll_su r5, r6, r7 }
+	{ packhb r15, r16, r17 ; rl r5, r6, r7 }
+	{ packhb r15, r16, r17 ; shli r5, r6, 5 }
+	{ packhb r15, r16, r17 ; slth_u r5, r6, r7 }
+	{ packhb r15, r16, r17 ; subhs r5, r6, r7 }
+	{ packhb r5, r6, r7 ; andi r15, r16, 5 }
+	{ packhb r5, r6, r7 ; lb r15, r16 }
+	{ packhb r5, r6, r7 ; minh r15, r16, r17 }
+	{ packhb r5, r6, r7 ; packhb r15, r16, r17 }
+	{ packhb r5, r6, r7 ; shl r15, r16, r17 }
+	{ packhb r5, r6, r7 ; slteh r15, r16, r17 }
+	{ packhb r5, r6, r7 ; subb r15, r16, r17 }
+	{ packhs r15, r16, r17 ; addlis r5, r6, 0x1234 }
+	{ packhs r15, r16, r17 ; inthh r5, r6, r7 }
+	{ packhs r15, r16, r17 ; mulhh_su r5, r6, r7 }
+	{ packhs r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ packhs r15, r16, r17 ; s3a r5, r6, r7 }
+	{ packhs r15, r16, r17 ; shrb r5, r6, r7 }
+	{ packhs r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ packhs r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ packhs r5, r6, r7 ; flush r15 }
+	{ packhs r5, r6, r7 ; lh r15, r16 }
+	{ packhs r5, r6, r7 ; mnz r15, r16, r17 }
+	{ packhs r5, r6, r7 ; raise }
+	{ packhs r5, r6, r7 ; shlib r15, r16, 5 }
+	{ packhs r5, r6, r7 ; slti r15, r16, 5 }
+	{ packhs r5, r6, r7 ; subs r15, r16, r17 }
+	{ packlb r15, r16, r17 ; and r5, r6, r7 }
+	{ packlb r15, r16, r17 ; maxh r5, r6, r7 }
+	{ packlb r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ packlb r15, r16, r17 ; mz r5, r6, r7 }
+	{ packlb r15, r16, r17 ; sadb_u r5, r6, r7 }
+	{ packlb r15, r16, r17 ; shrih r5, r6, 5 }
+	{ packlb r15, r16, r17 ; sneb r5, r6, r7 }
+	{ packlb r5, r6, r7 ; add r15, r16, r17 }
+	{ packlb r5, r6, r7 ; info 19 }
+	{ packlb r5, r6, r7 ; lnk r15 }
+	{ packlb r5, r6, r7 ; movei r15, 5 }
+	{ packlb r5, r6, r7 ; s2a r15, r16, r17 }
+	{ packlb r5, r6, r7 ; shrh r15, r16, r17 }
+	{ packlb r5, r6, r7 ; sltih r15, r16, 5 }
+	{ packlb r5, r6, r7 ; wh64 r15 }
+	{ pcnt r5, r6 ; addi r15, r16, 5 ; lh_u r25, r26 }
+	{ pcnt r5, r6 ; and r15, r16, r17 ; sw r25, r26 }
+	{ pcnt r5, r6 ; fnop ; lw r25, r26 }
+	{ pcnt r5, r6 ; info 19 ; lh_u r25, r26 }
+	{ pcnt r5, r6 ; lb r25, r26 ; addi r15, r16, 5 }
+	{ pcnt r5, r6 ; lb r25, r26 ; seqi r15, r16, 5 }
+	{ pcnt r5, r6 ; lb_u r25, r26 ; and r15, r16, r17 }
+	{ pcnt r5, r6 ; lb_u r25, r26 ; shl r15, r16, r17 }
+	{ pcnt r5, r6 ; lh r25, r26 ; addi r15, r16, 5 }
+	{ pcnt r5, r6 ; lh r25, r26 ; seqi r15, r16, 5 }
+	{ pcnt r5, r6 ; lh_u r25, r26 ; and r15, r16, r17 }
+	{ pcnt r5, r6 ; lh_u r25, r26 ; shl r15, r16, r17 }
+	{ pcnt r5, r6 ; lw r25, r26 ; add r15, r16, r17 }
+	{ pcnt r5, r6 ; lw r25, r26 ; seq r15, r16, r17 }
+	{ pcnt r5, r6 ; lwadd_na r15, r16, 5 }
+	{ pcnt r5, r6 ; mnz r15, r16, r17 ; sw r25, r26 }
+	{ pcnt r5, r6 ; movei r15, 5 ; sb r25, r26 }
+	{ pcnt r5, r6 ; nop ; lb_u r25, r26 }
+	{ pcnt r5, r6 ; or r15, r16, r17 ; lb_u r25, r26 }
+	{ pcnt r5, r6 ; packhb r15, r16, r17 }
+	{ pcnt r5, r6 ; prefetch r25 ; rli r15, r16, 5 }
+	{ pcnt r5, r6 ; prefetch r25 ; xor r15, r16, r17 }
+	{ pcnt r5, r6 ; rli r15, r16, 5 ; sh r25, r26 }
+	{ pcnt r5, r6 ; s2a r15, r16, r17 ; sh r25, r26 }
+	{ pcnt r5, r6 ; sb r25, r26 ; info 19 }
+	{ pcnt r5, r6 ; sb r25, r26 ; slt r15, r16, r17 }
+	{ pcnt r5, r6 ; seq r15, r16, r17 ; sh r25, r26 }
+	{ pcnt r5, r6 ; sh r25, r26 ; and r15, r16, r17 }
+	{ pcnt r5, r6 ; sh r25, r26 ; shl r15, r16, r17 }
+	{ pcnt r5, r6 ; shl r15, r16, r17 ; lh_u r25, r26 }
+	{ pcnt r5, r6 ; shlih r15, r16, 5 }
+	{ pcnt r5, r6 ; shri r15, r16, 5 ; sh r25, r26 }
+	{ pcnt r5, r6 ; slt_u r15, r16, r17 ; prefetch r25 }
+	{ pcnt r5, r6 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+	{ pcnt r5, r6 ; slti r15, r16, 5 ; sh r25, r26 }
+	{ pcnt r5, r6 ; sne r15, r16, r17 ; lh_u r25, r26 }
+	{ pcnt r5, r6 ; srah r15, r16, r17 }
+	{ pcnt r5, r6 ; sub r15, r16, r17 ; sh r25, r26 }
+	{ pcnt r5, r6 ; sw r25, r26 ; nop }
+	{ pcnt r5, r6 ; sw r25, r26 ; slti_u r15, r16, 5 }
+	{ pcnt r5, r6 ; xori r15, r16, 5 }
+	{ prefetch r15 ; bytex r5, r6 }
+	{ prefetch r15 ; minih r5, r6, 5 }
+	{ prefetch r15 ; mulhla_ss r5, r6, r7 }
+	{ prefetch r15 ; ori r5, r6, 5 }
+	{ prefetch r15 ; seqi r5, r6, 5 }
+	{ prefetch r15 ; slte_u r5, r6, r7 }
+	{ prefetch r15 ; sraib r5, r6, 5 }
+	{ prefetch r25 ; add r15, r16, r17 ; clz r5, r6 }
+	{ prefetch r25 ; add r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch r25 ; add r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ prefetch r25 ; add r5, r6, r7 ; movei r15, 5 }
+	{ prefetch r25 ; add r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ prefetch r25 ; addi r15, r16, 5 ; move r5, r6 }
+	{ prefetch r25 ; addi r15, r16, 5 ; rli r5, r6, 5 }
+	{ prefetch r25 ; addi r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ prefetch r25 ; addi r5, r6, 5 ; ori r15, r16, 5 }
+	{ prefetch r25 ; addi r5, r6, 5 ; srai r15, r16, 5 }
+	{ prefetch r25 ; and r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ prefetch r25 ; and r15, r16, r17 ; seqi r5, r6, 5 }
+	{ prefetch r25 ; and r15, r16, r17 }
+	{ prefetch r25 ; and r5, r6, r7 ; s3a r15, r16, r17 }
+	{ prefetch r25 ; andi r15, r16, 5 ; addi r5, r6, 5 }
+	{ prefetch r25 ; andi r15, r16, 5 ; mullla_uu r5, r6, r7 }
+	{ prefetch r25 ; andi r15, r16, 5 ; slt r5, r6, r7 }
+	{ prefetch r25 ; andi r5, r6, 5 ; fnop }
+	{ prefetch r25 ; andi r5, r6, 5 ; shr r15, r16, r17 }
+	{ prefetch r25 ; bitx r5, r6 ; info 19 }
+	{ prefetch r25 ; bitx r5, r6 ; slt r15, r16, r17 }
+	{ prefetch r25 ; bytex r5, r6 ; move r15, r16 }
+	{ prefetch r25 ; bytex r5, r6 ; slte r15, r16, r17 }
+	{ prefetch r25 ; clz r5, r6 ; mz r15, r16, r17 }
+	{ prefetch r25 ; clz r5, r6 ; slti r15, r16, 5 }
+	{ prefetch r25 ; ctz r5, r6 ; nor r15, r16, r17 }
+	{ prefetch r25 ; ctz r5, r6 ; sne r15, r16, r17 }
+	{ prefetch r25 ; fnop ; info 19 }
+	{ prefetch r25 ; fnop ; nop }
+	{ prefetch r25 ; fnop ; seqi r15, r16, 5 }
+	{ prefetch r25 ; fnop ; slti_u r15, r16, 5 }
+	{ prefetch r25 ; ill ; andi r5, r6, 5 }
+	{ prefetch r25 ; ill ; mvz r5, r6, r7 }
+	{ prefetch r25 ; ill ; slte r5, r6, r7 }
+	{ prefetch r25 ; info 19 ; andi r15, r16, 5 }
+	{ prefetch r25 ; info 19 ; mulll_ss r5, r6, r7 }
+	{ prefetch r25 ; info 19 ; s1a r15, r16, r17 }
+	{ prefetch r25 ; info 19 ; slt_u r15, r16, r17 }
+	{ prefetch r25 ; info 19 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; mnz r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ prefetch r25 ; mnz r15, r16, r17 ; seq r5, r6, r7 }
+	{ prefetch r25 ; mnz r15, r16, r17 ; xor r5, r6, r7 }
+	{ prefetch r25 ; mnz r5, r6, r7 ; s2a r15, r16, r17 }
+	{ prefetch r25 ; move r15, r16 ; add r5, r6, r7 }
+	{ prefetch r25 ; move r15, r16 ; mullla_ss r5, r6, r7 }
+	{ prefetch r25 ; move r15, r16 ; shri r5, r6, 5 }
+	{ prefetch r25 ; move r5, r6 ; andi r15, r16, 5 }
+	{ prefetch r25 ; move r5, r6 ; shli r15, r16, 5 }
+	{ prefetch r25 ; movei r15, 5 ; bytex r5, r6 }
+	{ prefetch r25 ; movei r15, 5 ; nop }
+	{ prefetch r25 ; movei r15, 5 ; slti r5, r6, 5 }
+	{ prefetch r25 ; movei r5, 5 ; move r15, r16 }
+	{ prefetch r25 ; movei r5, 5 ; slte r15, r16, r17 }
+	{ prefetch r25 ; mulhh_ss r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch r25 ; mulhh_ss r5, r6, r7 ; slti r15, r16, 5 }
+	{ prefetch r25 ; mulhh_uu r5, r6, r7 ; nor r15, r16, r17 }
+	{ prefetch r25 ; mulhh_uu r5, r6, r7 ; sne r15, r16, r17 }
+	{ prefetch r25 ; mulhha_ss r5, r6, r7 ; ori r15, r16, 5 }
+	{ prefetch r25 ; mulhha_ss r5, r6, r7 ; srai r15, r16, 5 }
+	{ prefetch r25 ; mulhha_uu r5, r6, r7 ; rli r15, r16, 5 }
+	{ prefetch r25 ; mulhha_uu r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 }
+	{ prefetch r25 ; mulll_ss r5, r6, r7 ; add r15, r16, r17 }
+	{ prefetch r25 ; mulll_ss r5, r6, r7 ; seq r15, r16, r17 }
+	{ prefetch r25 ; mulll_uu r5, r6, r7 ; and r15, r16, r17 }
+	{ prefetch r25 ; mulll_uu r5, r6, r7 ; shl r15, r16, r17 }
+	{ prefetch r25 ; mullla_ss r5, r6, r7 ; fnop }
+	{ prefetch r25 ; mullla_ss r5, r6, r7 ; shr r15, r16, r17 }
+	{ prefetch r25 ; mullla_uu r5, r6, r7 ; info 19 }
+	{ prefetch r25 ; mullla_uu r5, r6, r7 ; slt r15, r16, r17 }
+	{ prefetch r25 ; mvnz r5, r6, r7 ; move r15, r16 }
+	{ prefetch r25 ; mvnz r5, r6, r7 ; slte r15, r16, r17 }
+	{ prefetch r25 ; mvz r5, r6, r7 ; mz r15, r16, r17 }
+	{ prefetch r25 ; mvz r5, r6, r7 ; slti r15, r16, 5 }
+	{ prefetch r25 ; mz r15, r16, r17 ; movei r5, 5 }
+	{ prefetch r25 ; mz r15, r16, r17 ; s1a r5, r6, r7 }
+	{ prefetch r25 ; mz r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ prefetch r25 ; mz r5, r6, r7 ; rl r15, r16, r17 }
+	{ prefetch r25 ; mz r5, r6, r7 ; sub r15, r16, r17 }
+	{ prefetch r25 ; nop ; move r15, r16 }
+	{ prefetch r25 ; nop ; or r15, r16, r17 }
+	{ prefetch r25 ; nop ; shl r5, r6, r7 }
+	{ prefetch r25 ; nop ; sne r5, r6, r7 }
+	{ prefetch r25 ; nor r15, r16, r17 ; clz r5, r6 }
+	{ prefetch r25 ; nor r15, r16, r17 ; nor r5, r6, r7 }
+	{ prefetch r25 ; nor r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ prefetch r25 ; nor r5, r6, r7 ; movei r15, 5 }
+	{ prefetch r25 ; nor r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ prefetch r25 ; or r15, r16, r17 ; move r5, r6 }
+	{ prefetch r25 ; or r15, r16, r17 ; rli r5, r6, 5 }
+	{ prefetch r25 ; or r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ prefetch r25 ; or r5, r6, r7 ; ori r15, r16, 5 }
+	{ prefetch r25 ; or r5, r6, r7 ; srai r15, r16, 5 }
+	{ prefetch r25 ; ori r15, r16, 5 ; mulhha_uu r5, r6, r7 }
+	{ prefetch r25 ; ori r15, r16, 5 ; seqi r5, r6, 5 }
+	{ prefetch r25 ; ori r15, r16, 5 }
+	{ prefetch r25 ; ori r5, r6, 5 ; s3a r15, r16, r17 }
+	{ prefetch r25 ; pcnt r5, r6 ; addi r15, r16, 5 }
+	{ prefetch r25 ; pcnt r5, r6 ; seqi r15, r16, 5 }
+	{ prefetch r25 ; rl r15, r16, r17 ; andi r5, r6, 5 }
+	{ prefetch r25 ; rl r15, r16, r17 ; mvz r5, r6, r7 }
+	{ prefetch r25 ; rl r15, r16, r17 ; slte r5, r6, r7 }
+	{ prefetch r25 ; rl r5, r6, r7 ; info 19 }
+	{ prefetch r25 ; rl r5, r6, r7 ; slt r15, r16, r17 }
+	{ prefetch r25 ; rli r15, r16, 5 ; fnop }
+	{ prefetch r25 ; rli r15, r16, 5 ; ori r5, r6, 5 }
+	{ prefetch r25 ; rli r15, r16, 5 ; sra r5, r6, r7 }
+	{ prefetch r25 ; rli r5, r6, 5 ; nop }
+	{ prefetch r25 ; rli r5, r6, 5 ; slti_u r15, r16, 5 }
+	{ prefetch r25 ; s1a r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ prefetch r25 ; s1a r15, r16, r17 ; s2a r5, r6, r7 }
+	{ prefetch r25 ; s1a r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; s1a r5, r6, r7 ; rli r15, r16, 5 }
+	{ prefetch r25 ; s1a r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; s2a r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ prefetch r25 ; s2a r15, r16, r17 ; shli r5, r6, 5 }
+	{ prefetch r25 ; s2a r5, r6, r7 ; addi r15, r16, 5 }
+	{ prefetch r25 ; s2a r5, r6, r7 ; seqi r15, r16, 5 }
+	{ prefetch r25 ; s3a r15, r16, r17 ; andi r5, r6, 5 }
+	{ prefetch r25 ; s3a r15, r16, r17 ; mvz r5, r6, r7 }
+	{ prefetch r25 ; s3a r15, r16, r17 ; slte r5, r6, r7 }
+	{ prefetch r25 ; s3a r5, r6, r7 ; info 19 }
+	{ prefetch r25 ; s3a r5, r6, r7 ; slt r15, r16, r17 }
+	{ prefetch r25 ; seq r15, r16, r17 ; fnop }
+	{ prefetch r25 ; seq r15, r16, r17 ; ori r5, r6, 5 }
+	{ prefetch r25 ; seq r15, r16, r17 ; sra r5, r6, r7 }
+	{ prefetch r25 ; seq r5, r6, r7 ; nop }
+	{ prefetch r25 ; seq r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ prefetch r25 ; seqi r15, r16, 5 ; mulhh_ss r5, r6, r7 }
+	{ prefetch r25 ; seqi r15, r16, 5 ; s2a r5, r6, r7 }
+	{ prefetch r25 ; seqi r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; seqi r5, r6, 5 ; rli r15, r16, 5 }
+	{ prefetch r25 ; seqi r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch r25 ; shl r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ prefetch r25 ; shl r15, r16, r17 ; shli r5, r6, 5 }
+	{ prefetch r25 ; shl r5, r6, r7 ; addi r15, r16, 5 }
+	{ prefetch r25 ; shl r5, r6, r7 ; seqi r15, r16, 5 }
+	{ prefetch r25 ; shli r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch r25 ; shli r15, r16, 5 ; mvz r5, r6, r7 }
+	{ prefetch r25 ; shli r15, r16, 5 ; slte r5, r6, r7 }
+	{ prefetch r25 ; shli r5, r6, 5 ; info 19 }
+	{ prefetch r25 ; shli r5, r6, 5 ; slt r15, r16, r17 }
+	{ prefetch r25 ; shr r15, r16, r17 ; fnop }
+	{ prefetch r25 ; shr r15, r16, r17 ; ori r5, r6, 5 }
+	{ prefetch r25 ; shr r15, r16, r17 ; sra r5, r6, r7 }
+	{ prefetch r25 ; shr r5, r6, r7 ; nop }
+	{ prefetch r25 ; shr r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ prefetch r25 ; shri r15, r16, 5 ; mulhh_ss r5, r6, r7 }
+	{ prefetch r25 ; shri r15, r16, 5 ; s2a r5, r6, r7 }
+	{ prefetch r25 ; shri r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; shri r5, r6, 5 ; rli r15, r16, 5 }
+	{ prefetch r25 ; shri r5, r6, 5 ; xor r15, r16, r17 }
+	{ prefetch r25 ; slt r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ prefetch r25 ; slt r15, r16, r17 ; shli r5, r6, 5 }
+	{ prefetch r25 ; slt r5, r6, r7 ; addi r15, r16, 5 }
+	{ prefetch r25 ; slt r5, r6, r7 ; seqi r15, r16, 5 }
+	{ prefetch r25 ; slt_u r15, r16, r17 ; andi r5, r6, 5 }
+	{ prefetch r25 ; slt_u r15, r16, r17 ; mvz r5, r6, r7 }
+	{ prefetch r25 ; slt_u r15, r16, r17 ; slte r5, r6, r7 }
+	{ prefetch r25 ; slt_u r5, r6, r7 ; info 19 }
+	{ prefetch r25 ; slt_u r5, r6, r7 ; slt r15, r16, r17 }
+	{ prefetch r25 ; slte r15, r16, r17 ; fnop }
+	{ prefetch r25 ; slte r15, r16, r17 ; ori r5, r6, 5 }
+	{ prefetch r25 ; slte r15, r16, r17 ; sra r5, r6, r7 }
+	{ prefetch r25 ; slte r5, r6, r7 ; nop }
+	{ prefetch r25 ; slte r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ prefetch r25 ; slte_u r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ prefetch r25 ; slte_u r15, r16, r17 ; s2a r5, r6, r7 }
+	{ prefetch r25 ; slte_u r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; slte_u r5, r6, r7 ; rli r15, r16, 5 }
+	{ prefetch r25 ; slte_u r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; slti r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ prefetch r25 ; slti r15, r16, 5 ; shli r5, r6, 5 }
+	{ prefetch r25 ; slti r5, r6, 5 ; addi r15, r16, 5 }
+	{ prefetch r25 ; slti r5, r6, 5 ; seqi r15, r16, 5 }
+	{ prefetch r25 ; slti_u r15, r16, 5 ; andi r5, r6, 5 }
+	{ prefetch r25 ; slti_u r15, r16, 5 ; mvz r5, r6, r7 }
+	{ prefetch r25 ; slti_u r15, r16, 5 ; slte r5, r6, r7 }
+	{ prefetch r25 ; slti_u r5, r6, 5 ; info 19 }
+	{ prefetch r25 ; slti_u r5, r6, 5 ; slt r15, r16, r17 }
+	{ prefetch r25 ; sne r15, r16, r17 ; fnop }
+	{ prefetch r25 ; sne r15, r16, r17 ; ori r5, r6, 5 }
+	{ prefetch r25 ; sne r15, r16, r17 ; sra r5, r6, r7 }
+	{ prefetch r25 ; sne r5, r6, r7 ; nop }
+	{ prefetch r25 ; sne r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ prefetch r25 ; sra r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ prefetch r25 ; sra r15, r16, r17 ; s2a r5, r6, r7 }
+	{ prefetch r25 ; sra r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ prefetch r25 ; sra r5, r6, r7 ; rli r15, r16, 5 }
+	{ prefetch r25 ; sra r5, r6, r7 ; xor r15, r16, r17 }
+	{ prefetch r25 ; srai r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ prefetch r25 ; srai r15, r16, 5 ; shli r5, r6, 5 }
+	{ prefetch r25 ; srai r5, r6, 5 ; addi r15, r16, 5 }
+	{ prefetch r25 ; srai r5, r6, 5 ; seqi r15, r16, 5 }
+	{ prefetch r25 ; sub r15, r16, r17 ; andi r5, r6, 5 }
+	{ prefetch r25 ; sub r15, r16, r17 ; mvz r5, r6, r7 }
+	{ prefetch r25 ; sub r15, r16, r17 ; slte r5, r6, r7 }
+	{ prefetch r25 ; sub r5, r6, r7 ; info 19 }
+	{ prefetch r25 ; sub r5, r6, r7 ; slt r15, r16, r17 }
+	{ prefetch r25 ; tblidxb0 r5, r6 ; move r15, r16 }
+	{ prefetch r25 ; tblidxb0 r5, r6 ; slte r15, r16, r17 }
+	{ prefetch r25 ; tblidxb1 r5, r6 ; mz r15, r16, r17 }
+	{ prefetch r25 ; tblidxb1 r5, r6 ; slti r15, r16, 5 }
+	{ prefetch r25 ; tblidxb2 r5, r6 ; nor r15, r16, r17 }
+	{ prefetch r25 ; tblidxb2 r5, r6 ; sne r15, r16, r17 }
+	{ prefetch r25 ; tblidxb3 r5, r6 ; ori r15, r16, 5 }
+	{ prefetch r25 ; tblidxb3 r5, r6 ; srai r15, r16, 5 }
+	{ prefetch r25 ; xor r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ prefetch r25 ; xor r15, r16, r17 ; seqi r5, r6, 5 }
+	{ prefetch r25 ; xor r15, r16, r17 }
+	{ prefetch r25 ; xor r5, r6, r7 ; s3a r15, r16, r17 }
+	{ raise ; addb r5, r6, r7 }
+	{ raise ; crc32_32 r5, r6, r7 }
+	{ raise ; mnz r5, r6, r7 }
+	{ raise ; mulhla_us r5, r6, r7 }
+	{ raise ; packhb r5, r6, r7 }
+	{ raise ; seqih r5, r6, 5 }
+	{ raise ; slteb_u r5, r6, r7 }
+	{ raise ; sub r5, r6, r7 }
+	{ rl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ rl r15, r16, r17 ; adds r5, r6, r7 }
+	{ rl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ rl r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ rl r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ rl r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ rl r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ rl r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ rl r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ rl r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ rl r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ rl r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ rl r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ rl r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ rl r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ rl r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ rl r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ rl r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ rl r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ rl r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ rl r15, r16, r17 ; maxh r5, r6, r7 }
+	{ rl r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ rl r15, r16, r17 ; moveli r5, 0x1234 }
+	{ rl r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ rl r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ rl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ rl r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ rl r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ rl r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ rl r15, r16, r17 ; nop ; lh r25, r26 }
+	{ rl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ rl r15, r16, r17 ; packhs r5, r6, r7 }
+	{ rl r15, r16, r17 ; prefetch r25 ; fnop }
+	{ rl r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ rl r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ rl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ rl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ rl r15, r16, r17 ; sadah r5, r6, r7 }
+	{ rl r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ rl r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ rl r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ rl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ rl r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ rl r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ rl r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ rl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ rl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ rl r15, r16, r17 ; slt r5, r6, r7 }
+	{ rl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ rl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ rl r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ rl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ rl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ rl r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ rl r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ rl r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ rl r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ rl r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ rl r15, r16, r17 ; xor r5, r6, r7 }
+	{ rl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ rl r5, r6, r7 ; and r15, r16, r17 }
+	{ rl r5, r6, r7 ; fnop ; prefetch r25 }
+	{ rl r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ rl r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ rl r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ rl r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ rl r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ rl r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ rl r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ rl r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ rl r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ rl r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ rl r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ rl r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ rl r5, r6, r7 ; mnz r15, r16, r17 }
+	{ rl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ rl r5, r6, r7 ; nop ; lh r25, r26 }
+	{ rl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ rl r5, r6, r7 ; packhs r15, r16, r17 }
+	{ rl r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ rl r5, r6, r7 ; prefetch r25 }
+	{ rl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ rl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ rl r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ rl r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ rl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ rl r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ rl r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ rl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ rl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ rl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ rl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ rl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ rl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ rl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ rl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ rl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ rl r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ rl r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ rli r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 }
+	{ rli r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 }
+	{ rli r15, r16, 5 ; and r5, r6, r7 }
+	{ rli r15, r16, 5 ; bitx r5, r6 ; sb r25, r26 }
+	{ rli r15, r16, 5 ; clz r5, r6 ; sb r25, r26 }
+	{ rli r15, r16, 5 ; fnop ; lh_u r25, r26 }
+	{ rli r15, r16, 5 ; intlb r5, r6, r7 }
+	{ rli r15, r16, 5 ; lb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ rli r15, r16, 5 ; lb r25, r26 ; shli r5, r6, 5 }
+	{ rli r15, r16, 5 ; lb_u r25, r26 ; addi r5, r6, 5 }
+	{ rli r15, r16, 5 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ rli r15, r16, 5 ; lb_u r25, r26 ; slt r5, r6, r7 }
+	{ rli r15, r16, 5 ; lh r25, r26 ; bitx r5, r6 }
+	{ rli r15, r16, 5 ; lh r25, r26 ; mz r5, r6, r7 }
+	{ rli r15, r16, 5 ; lh r25, r26 ; slte_u r5, r6, r7 }
+	{ rli r15, r16, 5 ; lh_u r25, r26 ; ctz r5, r6 }
+	{ rli r15, r16, 5 ; lh_u r25, r26 ; or r5, r6, r7 }
+	{ rli r15, r16, 5 ; lh_u r25, r26 ; sne r5, r6, r7 }
+	{ rli r15, r16, 5 ; lw r25, r26 ; mnz r5, r6, r7 }
+	{ rli r15, r16, 5 ; lw r25, r26 ; rl r5, r6, r7 }
+	{ rli r15, r16, 5 ; lw r25, r26 ; sub r5, r6, r7 }
+	{ rli r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+	{ rli r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+	{ rli r15, r16, 5 ; mulhh_su r5, r6, r7 }
+	{ rli r15, r16, 5 ; mulhha_ss r5, r6, r7 }
+	{ rli r15, r16, 5 ; mulhla_uu r5, r6, r7 }
+	{ rli r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ rli r15, r16, 5 ; mullla_ss r5, r6, r7 ; sw r25, r26 }
+	{ rli r15, r16, 5 ; mvnz r5, r6, r7 ; sb r25, r26 }
+	{ rli r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 }
+	{ rli r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 }
+	{ rli r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 }
+	{ rli r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 }
+	{ rli r15, r16, 5 ; prefetch r25 ; mullla_ss r5, r6, r7 }
+	{ rli r15, r16, 5 ; prefetch r25 ; shri r5, r6, 5 }
+	{ rli r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 }
+	{ rli r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+	{ rli r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+	{ rli r15, r16, 5 ; sb r25, r26 ; ctz r5, r6 }
+	{ rli r15, r16, 5 ; sb r25, r26 ; or r5, r6, r7 }
+	{ rli r15, r16, 5 ; sb r25, r26 ; sne r5, r6, r7 }
+	{ rli r15, r16, 5 ; seqb r5, r6, r7 }
+	{ rli r15, r16, 5 ; sh r25, r26 ; clz r5, r6 }
+	{ rli r15, r16, 5 ; sh r25, r26 ; nor r5, r6, r7 }
+	{ rli r15, r16, 5 ; sh r25, r26 ; slti_u r5, r6, 5 }
+	{ rli r15, r16, 5 ; shl r5, r6, r7 }
+	{ rli r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 }
+	{ rli r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+	{ rli r15, r16, 5 ; sltb_u r5, r6, r7 }
+	{ rli r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ rli r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+	{ rli r15, r16, 5 ; sne r5, r6, r7 }
+	{ rli r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 }
+	{ rli r15, r16, 5 ; subhs r5, r6, r7 }
+	{ rli r15, r16, 5 ; sw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ rli r15, r16, 5 ; sw r25, r26 ; shli r5, r6, 5 }
+	{ rli r15, r16, 5 ; tblidxb0 r5, r6 ; lb_u r25, r26 }
+	{ rli r15, r16, 5 ; tblidxb2 r5, r6 ; lb_u r25, r26 }
+	{ rli r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 }
+	{ rli r5, r6, 5 ; addb r15, r16, r17 }
+	{ rli r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 }
+	{ rli r5, r6, 5 ; dtlbpr r15 }
+	{ rli r5, r6, 5 ; ill ; sb r25, r26 }
+	{ rli r5, r6, 5 ; iret }
+	{ rli r5, r6, 5 ; lb r25, r26 ; ori r15, r16, 5 }
+	{ rli r5, r6, 5 ; lb r25, r26 ; srai r15, r16, 5 }
+	{ rli r5, r6, 5 ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ rli r5, r6, 5 ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ rli r5, r6, 5 ; lh r25, r26 ; ori r15, r16, 5 }
+	{ rli r5, r6, 5 ; lh r25, r26 ; srai r15, r16, 5 }
+	{ rli r5, r6, 5 ; lh_u r25, r26 ; rl r15, r16, r17 }
+	{ rli r5, r6, 5 ; lh_u r25, r26 ; sub r15, r16, r17 }
+	{ rli r5, r6, 5 ; lw r25, r26 ; or r15, r16, r17 }
+	{ rli r5, r6, 5 ; lw r25, r26 ; sra r15, r16, r17 }
+	{ rli r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+	{ rli r5, r6, 5 ; move r15, r16 }
+	{ rli r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 }
+	{ rli r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 }
+	{ rli r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 }
+	{ rli r5, r6, 5 ; prefetch r25 ; movei r15, 5 }
+	{ rli r5, r6, 5 ; prefetch r25 ; slte_u r15, r16, r17 }
+	{ rli r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 }
+	{ rli r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 }
+	{ rli r5, r6, 5 ; sb r15, r16 }
+	{ rli r5, r6, 5 ; sb r25, r26 ; s3a r15, r16, r17 }
+	{ rli r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 }
+	{ rli r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 }
+	{ rli r5, r6, 5 ; sh r25, r26 ; rl r15, r16, r17 }
+	{ rli r5, r6, 5 ; sh r25, r26 ; sub r15, r16, r17 }
+	{ rli r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ rli r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 }
+	{ rli r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 }
+	{ rli r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 }
+	{ rli r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 }
+	{ rli r5, r6, 5 ; sltib r15, r16, 5 }
+	{ rli r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ rli r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 }
+	{ rli r5, r6, 5 ; sw r25, r26 ; fnop }
+	{ rli r5, r6, 5 ; sw r25, r26 ; shr r15, r16, r17 }
+	{ rli r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 }
+	{ s1a r15, r16, r17 ; addh r5, r6, r7 }
+	{ s1a r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 }
+	{ s1a r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ s1a r15, r16, r17 ; bytex r5, r6 ; sw r25, r26 }
+	{ s1a r15, r16, r17 ; ctz r5, r6 ; sb r25, r26 }
+	{ s1a r15, r16, r17 ; info 19 ; prefetch r25 }
+	{ s1a r15, r16, r17 ; lb r25, r26 ; mnz r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lb r25, r26 ; rl r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lb r25, r26 ; sub r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lb_u r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lb_u r25, r26 ; s2a r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lb_u r25, r26 ; tblidxb2 r5, r6 }
+	{ s1a r15, r16, r17 ; lh r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lh r25, r26 ; seqi r5, r6, 5 }
+	{ s1a r15, r16, r17 ; lh r25, r26 }
+	{ s1a r15, r16, r17 ; lh_u r25, r26 ; mulll_uu r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lh_u r25, r26 ; shr r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lw r25, r26 ; and r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lw r25, r26 ; mvnz r5, r6, r7 }
+	{ s1a r15, r16, r17 ; lw r25, r26 ; slt_u r5, r6, r7 }
+	{ s1a r15, r16, r17 ; minh r5, r6, r7 }
+	{ s1a r15, r16, r17 ; move r5, r6 ; lw r25, r26 }
+	{ s1a r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lh r25, r26 }
+	{ s1a r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ s1a r15, r16, r17 ; mulhhsa_uu r5, r6, r7 }
+	{ s1a r15, r16, r17 ; mulll_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ s1a r15, r16, r17 ; mullla_ss r5, r6, r7 ; lb r25, r26 }
+	{ s1a r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ s1a r15, r16, r17 ; mvz r5, r6, r7 ; sw r25, r26 }
+	{ s1a r15, r16, r17 ; nop ; sb r25, r26 }
+	{ s1a r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+	{ s1a r15, r16, r17 ; pcnt r5, r6 ; lh r25, r26 }
+	{ s1a r15, r16, r17 ; prefetch r25 ; movei r5, 5 }
+	{ s1a r15, r16, r17 ; prefetch r25 ; s1a r5, r6, r7 }
+	{ s1a r15, r16, r17 ; prefetch r25 ; tblidxb1 r5, r6 }
+	{ s1a r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 }
+	{ s1a r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+	{ s1a r15, r16, r17 ; sadh_u r5, r6, r7 }
+	{ s1a r15, r16, r17 ; sb r25, r26 ; mulll_uu r5, r6, r7 }
+	{ s1a r15, r16, r17 ; sb r25, r26 ; shr r5, r6, r7 }
+	{ s1a r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 }
+	{ s1a r15, r16, r17 ; seqib r5, r6, 5 }
+	{ s1a r15, r16, r17 ; sh r25, r26 ; mulll_ss r5, r6, r7 }
+	{ s1a r15, r16, r17 ; sh r25, r26 ; shli r5, r6, 5 }
+	{ s1a r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 }
+	{ s1a r15, r16, r17 ; shli r5, r6, 5 }
+	{ s1a r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 }
+	{ s1a r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 }
+	{ s1a r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+	{ s1a r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 }
+	{ s1a r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 }
+	{ s1a r15, r16, r17 ; sra r5, r6, r7 }
+	{ s1a r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+	{ s1a r15, r16, r17 ; sw r25, r26 ; mnz r5, r6, r7 }
+	{ s1a r15, r16, r17 ; sw r25, r26 ; rl r5, r6, r7 }
+	{ s1a r15, r16, r17 ; sw r25, r26 ; sub r5, r6, r7 }
+	{ s1a r15, r16, r17 ; tblidxb1 r5, r6 ; lh_u r25, r26 }
+	{ s1a r15, r16, r17 ; tblidxb3 r5, r6 ; lh_u r25, r26 }
+	{ s1a r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+	{ s1a r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+	{ s1a r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+	{ s1a r5, r6, r7 ; fnop }
+	{ s1a r5, r6, r7 ; info 19 ; sw r25, r26 }
+	{ s1a r5, r6, r7 ; lb r25, r26 ; info 19 }
+	{ s1a r5, r6, r7 ; lb r25, r26 ; slt r15, r16, r17 }
+	{ s1a r5, r6, r7 ; lb_u r25, r26 ; mnz r15, r16, r17 }
+	{ s1a r5, r6, r7 ; lb_u r25, r26 ; slt_u r15, r16, r17 }
+	{ s1a r5, r6, r7 ; lh r25, r26 ; info 19 }
+	{ s1a r5, r6, r7 ; lh r25, r26 ; slt r15, r16, r17 }
+	{ s1a r5, r6, r7 ; lh_u r25, r26 ; mnz r15, r16, r17 }
+	{ s1a r5, r6, r7 ; lh_u r25, r26 ; slt_u r15, r16, r17 }
+	{ s1a r5, r6, r7 ; lw r25, r26 ; ill }
+	{ s1a r5, r6, r7 ; lw r25, r26 ; shri r15, r16, 5 }
+	{ s1a r5, r6, r7 ; mf }
+	{ s1a r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+	{ s1a r5, r6, r7 ; movelis r15, 0x1234 }
+	{ s1a r5, r6, r7 ; nop ; sb r25, r26 }
+	{ s1a r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+	{ s1a r5, r6, r7 ; prefetch r25 ; addi r15, r16, 5 }
+	{ s1a r5, r6, r7 ; prefetch r25 ; seqi r15, r16, 5 }
+	{ s1a r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+	{ s1a r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+	{ s1a r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+	{ s1a r5, r6, r7 ; sb r25, r26 ; nop }
+	{ s1a r5, r6, r7 ; sb r25, r26 ; slti_u r15, r16, 5 }
+	{ s1a r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 }
+	{ s1a r5, r6, r7 ; sh r25, r26 ; mnz r15, r16, r17 }
+	{ s1a r5, r6, r7 ; sh r25, r26 ; slt_u r15, r16, r17 }
+	{ s1a r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+	{ s1a r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+	{ s1a r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+	{ s1a r5, r6, r7 ; sltb r15, r16, r17 }
+	{ s1a r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+	{ s1a r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 }
+	{ s1a r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+	{ s1a r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+	{ s1a r5, r6, r7 ; subh r15, r16, r17 }
+	{ s1a r5, r6, r7 ; sw r25, r26 ; rli r15, r16, 5 }
+	{ s1a r5, r6, r7 ; sw r25, r26 ; xor r15, r16, r17 }
+	{ s2a r15, r16, r17 ; add r5, r6, r7 ; lw r25, r26 }
+	{ s2a r15, r16, r17 ; addib r5, r6, 5 }
+	{ s2a r15, r16, r17 ; andi r5, r6, 5 ; lh_u r25, r26 }
+	{ s2a r15, r16, r17 ; bytex r5, r6 ; lb r25, r26 }
+	{ s2a r15, r16, r17 ; crc32_32 r5, r6, r7 }
+	{ s2a r15, r16, r17 ; fnop ; sh r25, r26 }
+	{ s2a r15, r16, r17 ; lb r25, r26 ; and r5, r6, r7 }
+	{ s2a r15, r16, r17 ; lb r25, r26 ; mvnz r5, r6, r7 }
+	{ s2a r15, r16, r17 ; lb r25, r26 ; slt_u r5, r6, r7 }
+	{ s2a r15, r16, r17 ; lb_u r25, r26 ; bytex r5, r6 }
+	{ s2a r15, r16, r17 ; lb_u r25, r26 ; nop }
+	{ s2a r15, r16, r17 ; lb_u r25, r26 ; slti r5, r6, 5 }
+	{ s2a r15, r16, r17 ; lh r25, r26 ; fnop }
+	{ s2a r15, r16, r17 ; lh r25, r26 ; ori r5, r6, 5 }
+	{ s2a r15, r16, r17 ; lh r25, r26 ; sra r5, r6, r7 }
+	{ s2a r15, r16, r17 ; lh_u r25, r26 ; move r5, r6 }
+	{ s2a r15, r16, r17 ; lh_u r25, r26 ; rli r5, r6, 5 }
+	{ s2a r15, r16, r17 ; lh_u r25, r26 ; tblidxb0 r5, r6 }
+	{ s2a r15, r16, r17 ; lw r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ s2a r15, r16, r17 ; lw r25, r26 ; s3a r5, r6, r7 }
+	{ s2a r15, r16, r17 ; lw r25, r26 ; tblidxb3 r5, r6 }
+	{ s2a r15, r16, r17 ; mnz r5, r6, r7 ; sw r25, r26 }
+	{ s2a r15, r16, r17 ; movei r5, 5 ; sb r25, r26 }
+	{ s2a r15, r16, r17 ; mulhh_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ s2a r15, r16, r17 ; mulhha_uu r5, r6, r7 ; lh r25, r26 }
+	{ s2a r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; lh_u r25, r26 }
+	{ s2a r15, r16, r17 ; mulll_uu r5, r6, r7 ; lh r25, r26 }
+	{ s2a r15, r16, r17 ; mullla_uu r5, r6, r7 ; lb_u r25, r26 }
+	{ s2a r15, r16, r17 ; mvz r5, r6, r7 ; lb r25, r26 }
+	{ s2a r15, r16, r17 ; mzb r5, r6, r7 }
+	{ s2a r15, r16, r17 ; nor r5, r6, r7 ; sw r25, r26 }
+	{ s2a r15, r16, r17 ; ori r5, r6, 5 ; sw r25, r26 }
+	{ s2a r15, r16, r17 ; prefetch r25 ; bitx r5, r6 }
+	{ s2a r15, r16, r17 ; prefetch r25 ; mz r5, r6, r7 }
+	{ s2a r15, r16, r17 ; prefetch r25 ; slte_u r5, r6, r7 }
+	{ s2a r15, r16, r17 ; rl r5, r6, r7 ; sh r25, r26 }
+	{ s2a r15, r16, r17 ; s1a r5, r6, r7 ; sh r25, r26 }
+	{ s2a r15, r16, r17 ; s3a r5, r6, r7 ; sh r25, r26 }
+	{ s2a r15, r16, r17 ; sb r25, r26 ; move r5, r6 }
+	{ s2a r15, r16, r17 ; sb r25, r26 ; rli r5, r6, 5 }
+	{ s2a r15, r16, r17 ; sb r25, r26 ; tblidxb0 r5, r6 }
+	{ s2a r15, r16, r17 ; seqi r5, r6, 5 ; lh r25, r26 }
+	{ s2a r15, r16, r17 ; sh r25, r26 ; mnz r5, r6, r7 }
+	{ s2a r15, r16, r17 ; sh r25, r26 ; rl r5, r6, r7 }
+	{ s2a r15, r16, r17 ; sh r25, r26 ; sub r5, r6, r7 }
+	{ s2a r15, r16, r17 ; shli r5, r6, 5 ; lb_u r25, r26 }
+	{ s2a r15, r16, r17 ; shr r5, r6, r7 }
+	{ s2a r15, r16, r17 ; slt r5, r6, r7 ; prefetch r25 }
+	{ s2a r15, r16, r17 ; slte r5, r6, r7 ; lh_u r25, r26 }
+	{ s2a r15, r16, r17 ; slteh_u r5, r6, r7 }
+	{ s2a r15, r16, r17 ; slti_u r5, r6, 5 ; sh r25, r26 }
+	{ s2a r15, r16, r17 ; sra r5, r6, r7 ; lb_u r25, r26 }
+	{ s2a r15, r16, r17 ; srai r5, r6, 5 }
+	{ s2a r15, r16, r17 ; sw r25, r26 ; and r5, r6, r7 }
+	{ s2a r15, r16, r17 ; sw r25, r26 ; mvnz r5, r6, r7 }
+	{ s2a r15, r16, r17 ; sw r25, r26 ; slt_u r5, r6, r7 }
+	{ s2a r15, r16, r17 ; tblidxb0 r5, r6 ; prefetch r25 }
+	{ s2a r15, r16, r17 ; tblidxb2 r5, r6 ; prefetch r25 }
+	{ s2a r15, r16, r17 ; xor r5, r6, r7 ; prefetch r25 }
+	{ s2a r5, r6, r7 ; addi r15, r16, 5 ; lb r25, r26 }
+	{ s2a r5, r6, r7 ; and r15, r16, r17 ; prefetch r25 }
+	{ s2a r5, r6, r7 ; fnop ; lb_u r25, r26 }
+	{ s2a r5, r6, r7 ; info 19 ; lb r25, r26 }
+	{ s2a r5, r6, r7 ; jrp r15 }
+	{ s2a r5, r6, r7 ; lb r25, r26 ; s2a r15, r16, r17 }
+	{ s2a r5, r6, r7 ; lb_u r15, r16 }
+	{ s2a r5, r6, r7 ; lb_u r25, r26 ; s3a r15, r16, r17 }
+	{ s2a r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ s2a r5, r6, r7 ; lh r25, r26 ; s2a r15, r16, r17 }
+	{ s2a r5, r6, r7 ; lh_u r15, r16 }
+	{ s2a r5, r6, r7 ; lh_u r25, r26 ; s3a r15, r16, r17 }
+	{ s2a r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ s2a r5, r6, r7 ; lw r25, r26 ; s1a r15, r16, r17 }
+	{ s2a r5, r6, r7 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 }
+	{ s2a r5, r6, r7 ; movei r15, 5 ; lh_u r25, r26 }
+	{ s2a r5, r6, r7 ; mzb r15, r16, r17 }
+	{ s2a r5, r6, r7 ; nor r15, r16, r17 ; sw r25, r26 }
+	{ s2a r5, r6, r7 ; ori r15, r16, 5 ; sw r25, r26 }
+	{ s2a r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 }
+	{ s2a r5, r6, r7 ; prefetch r25 ; sra r15, r16, r17 }
+	{ s2a r5, r6, r7 ; rli r15, r16, 5 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; s2a r15, r16, r17 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; sb r25, r26 ; andi r15, r16, 5 }
+	{ s2a r5, r6, r7 ; sb r25, r26 ; shli r15, r16, 5 }
+	{ s2a r5, r6, r7 ; seq r15, r16, r17 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; sh r15, r16 }
+	{ s2a r5, r6, r7 ; sh r25, r26 ; s3a r15, r16, r17 }
+	{ s2a r5, r6, r7 ; shl r15, r16, r17 ; lb r25, r26 }
+	{ s2a r5, r6, r7 ; shli r15, r16, 5 ; sw r25, r26 }
+	{ s2a r5, r6, r7 ; shri r15, r16, 5 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; slt_u r15, r16, r17 ; lh r25, r26 }
+	{ s2a r5, r6, r7 ; slte_u r15, r16, r17 ; lb r25, r26 }
+	{ s2a r5, r6, r7 ; slti r15, r16, 5 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; sne r15, r16, r17 ; lb r25, r26 }
+	{ s2a r5, r6, r7 ; sra r15, r16, r17 ; sw r25, r26 }
+	{ s2a r5, r6, r7 ; sub r15, r16, r17 ; lw r25, r26 }
+	{ s2a r5, r6, r7 ; sw r25, r26 ; move r15, r16 }
+	{ s2a r5, r6, r7 ; sw r25, r26 ; slte r15, r16, r17 }
+	{ s2a r5, r6, r7 ; xor r15, r16, r17 ; sh r25, r26 }
+	{ s3a r15, r16, r17 ; addi r5, r6, 5 ; lh r25, r26 }
+	{ s3a r15, r16, r17 ; and r5, r6, r7 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; bitx r5, r6 ; lh r25, r26 }
+	{ s3a r15, r16, r17 ; clz r5, r6 ; lh r25, r26 }
+	{ s3a r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ s3a r15, r16, r17 ; info 19 }
+	{ s3a r15, r16, r17 ; lb r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lb r25, r26 ; s3a r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lb r25, r26 ; tblidxb3 r5, r6 }
+	{ s3a r15, r16, r17 ; lb_u r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lb_u r25, r26 ; shl r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lh r25, r26 ; add r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lh r25, r26 ; mullla_ss r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lh r25, r26 ; shri r5, r6, 5 }
+	{ s3a r15, r16, r17 ; lh_u r25, r26 ; andi r5, r6, 5 }
+	{ s3a r15, r16, r17 ; lh_u r25, r26 ; mvz r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lh_u r25, r26 ; slte r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lw r25, r26 ; clz r5, r6 }
+	{ s3a r15, r16, r17 ; lw r25, r26 ; nor r5, r6, r7 }
+	{ s3a r15, r16, r17 ; lw r25, r26 ; slti_u r5, r6, 5 }
+	{ s3a r15, r16, r17 ; mnz r5, r6, r7 ; lb r25, r26 }
+	{ s3a r15, r16, r17 ; move r5, r6 ; sw r25, r26 }
+	{ s3a r15, r16, r17 ; mulhh_ss r5, r6, r7 ; sb r25, r26 }
+	{ s3a r15, r16, r17 ; mulhha_ss r5, r6, r7 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; mulhl_uu r5, r6, r7 }
+	{ s3a r15, r16, r17 ; mulll_ss r5, r6, r7 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; mullla_ss r5, r6, r7 ; lw r25, r26 }
+	{ s3a r15, r16, r17 ; mvnz r5, r6, r7 ; lh r25, r26 }
+	{ s3a r15, r16, r17 ; mz r5, r6, r7 ; lh r25, r26 }
+	{ s3a r15, r16, r17 ; nor r5, r6, r7 ; lb r25, r26 }
+	{ s3a r15, r16, r17 ; ori r5, r6, 5 ; lb r25, r26 }
+	{ s3a r15, r16, r17 ; pcnt r5, r6 ; sb r25, r26 }
+	{ s3a r15, r16, r17 ; prefetch r25 ; mulhha_uu r5, r6, r7 }
+	{ s3a r15, r16, r17 ; prefetch r25 ; seqi r5, r6, 5 }
+	{ s3a r15, r16, r17 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; rli r5, r6, 5 }
+	{ s3a r15, r16, r17 ; s2a r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sb r25, r26 ; andi r5, r6, 5 }
+	{ s3a r15, r16, r17 ; sb r25, r26 ; mvz r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sb r25, r26 ; slte r5, r6, r7 }
+	{ s3a r15, r16, r17 ; seq r5, r6, r7 ; sb r25, r26 }
+	{ s3a r15, r16, r17 ; sh r25, r26 ; and r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sh r25, r26 ; mvnz r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sh r25, r26 ; slt_u r5, r6, r7 }
+	{ s3a r15, r16, r17 ; shl r5, r6, r7 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; shr r5, r6, r7 ; lb_u r25, r26 }
+	{ s3a r15, r16, r17 ; shri r5, r6, 5 }
+	{ s3a r15, r16, r17 ; slt_u r5, r6, r7 ; sh r25, r26 }
+	{ s3a r15, r16, r17 ; slte_u r5, r6, r7 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; slti r5, r6, 5 }
+	{ s3a r15, r16, r17 ; sne r5, r6, r7 ; prefetch r25 }
+	{ s3a r15, r16, r17 ; srai r5, r6, 5 ; lb_u r25, r26 }
+	{ s3a r15, r16, r17 ; sub r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sw r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sw r25, r26 ; s3a r5, r6, r7 }
+	{ s3a r15, r16, r17 ; sw r25, r26 ; tblidxb3 r5, r6 }
+	{ s3a r15, r16, r17 ; tblidxb1 r5, r6 ; sh r25, r26 }
+	{ s3a r15, r16, r17 ; tblidxb3 r5, r6 ; sh r25, r26 }
+	{ s3a r5, r6, r7 ; add r15, r16, r17 ; sb r25, r26 }
+	{ s3a r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ s3a r5, r6, r7 ; andi r15, r16, 5 ; sh r25, r26 }
+	{ s3a r5, r6, r7 ; ill ; lh r25, r26 }
+	{ s3a r5, r6, r7 ; inthh r15, r16, r17 }
+	{ s3a r5, r6, r7 ; lb r25, r26 ; mz r15, r16, r17 }
+	{ s3a r5, r6, r7 ; lb r25, r26 ; slti r15, r16, 5 }
+	{ s3a r5, r6, r7 ; lb_u r25, r26 ; nop }
+	{ s3a r5, r6, r7 ; lb_u r25, r26 ; slti_u r15, r16, 5 }
+	{ s3a r5, r6, r7 ; lh r25, r26 ; mz r15, r16, r17 }
+	{ s3a r5, r6, r7 ; lh r25, r26 ; slti r15, r16, 5 }
+	{ s3a r5, r6, r7 ; lh_u r25, r26 ; nop }
+	{ s3a r5, r6, r7 ; lh_u r25, r26 ; slti_u r15, r16, 5 }
+	{ s3a r5, r6, r7 ; lw r25, r26 ; movei r15, 5 }
+	{ s3a r5, r6, r7 ; lw r25, r26 ; slte_u r15, r16, r17 }
+	{ s3a r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ s3a r5, r6, r7 ; move r15, r16 ; prefetch r25 }
+	{ s3a r5, r6, r7 ; mz r15, r16, r17 ; lh r25, r26 }
+	{ s3a r5, r6, r7 ; nor r15, r16, r17 ; lb r25, r26 }
+	{ s3a r5, r6, r7 ; ori r15, r16, 5 ; lb r25, r26 }
+	{ s3a r5, r6, r7 ; prefetch r25 ; ill }
+	{ s3a r5, r6, r7 ; prefetch r25 ; shri r15, r16, 5 }
+	{ s3a r5, r6, r7 ; rl r15, r16, r17 ; sb r25, r26 }
+	{ s3a r5, r6, r7 ; s1a r15, r16, r17 ; sb r25, r26 }
+	{ s3a r5, r6, r7 ; s3a r15, r16, r17 ; sb r25, r26 }
+	{ s3a r5, r6, r7 ; sb r25, r26 ; rl r15, r16, r17 }
+	{ s3a r5, r6, r7 ; sb r25, r26 ; sub r15, r16, r17 }
+	{ s3a r5, r6, r7 ; seqi r15, r16, 5 ; lw r25, r26 }
+	{ s3a r5, r6, r7 ; sh r25, r26 ; nop }
+	{ s3a r5, r6, r7 ; sh r25, r26 ; slti_u r15, r16, 5 }
+	{ s3a r5, r6, r7 ; shli r15, r16, 5 ; lb r25, r26 }
+	{ s3a r5, r6, r7 ; shr r15, r16, r17 ; sw r25, r26 }
+	{ s3a r5, r6, r7 ; slt r15, r16, r17 ; lw r25, r26 }
+	{ s3a r5, r6, r7 ; slte r15, r16, r17 ; lh r25, r26 }
+	{ s3a r5, r6, r7 ; slteh r15, r16, r17 }
+	{ s3a r5, r6, r7 ; slti_u r15, r16, 5 ; sb r25, r26 }
+	{ s3a r5, r6, r7 ; sra r15, r16, r17 ; lb r25, r26 }
+	{ s3a r5, r6, r7 ; srai r15, r16, 5 ; sw r25, r26 }
+	{ s3a r5, r6, r7 ; sw r25, r26 ; add r15, r16, r17 }
+	{ s3a r5, r6, r7 ; sw r25, r26 ; seq r15, r16, r17 }
+	{ s3a r5, r6, r7 ; wh64 r15 }
+	{ sadab_u r5, r6, r7 ; addli r15, r16, 0x1234 }
+	{ sadab_u r5, r6, r7 ; jalr r15 }
+	{ sadab_u r5, r6, r7 ; maxih r15, r16, 5 }
+	{ sadab_u r5, r6, r7 ; nor r15, r16, r17 }
+	{ sadab_u r5, r6, r7 ; seqib r15, r16, 5 }
+	{ sadab_u r5, r6, r7 ; slte r15, r16, r17 }
+	{ sadab_u r5, r6, r7 ; srai r15, r16, 5 }
+	{ sadah r5, r6, r7 ; addi r15, r16, 5 }
+	{ sadah r5, r6, r7 ; intlh r15, r16, r17 }
+	{ sadah r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ sadah r5, r6, r7 ; mzb r15, r16, r17 }
+	{ sadah r5, r6, r7 ; seqb r15, r16, r17 }
+	{ sadah r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sadah r5, r6, r7 ; sra r15, r16, r17 }
+	{ sadah_u r5, r6, r7 ; addbs_u r15, r16, r17 }
+	{ sadah_u r5, r6, r7 ; inthb r15, r16, r17 }
+	{ sadah_u r5, r6, r7 ; lw_na r15, r16 }
+	{ sadah_u r5, r6, r7 ; movelis r15, 0x1234 }
+	{ sadah_u r5, r6, r7 ; sb r15, r16 }
+	{ sadah_u r5, r6, r7 ; shrib r15, r16, 5 }
+	{ sadah_u r5, r6, r7 ; sne r15, r16, r17 }
+	{ sadah_u r5, r6, r7 ; xori r15, r16, 5 }
+	{ sadb_u r5, r6, r7 ; ill }
+	{ sadb_u r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ sadb_u r5, r6, r7 ; move r15, r16 }
+	{ sadb_u r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sadb_u r5, r6, r7 ; shrb r15, r16, r17 }
+	{ sadb_u r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ sadb_u r5, r6, r7 ; tns r15, r16 }
+	{ sadh r5, r6, r7 ; flush r15 }
+	{ sadh r5, r6, r7 ; lh r15, r16 }
+	{ sadh r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sadh r5, r6, r7 ; raise }
+	{ sadh r5, r6, r7 ; shlib r15, r16, 5 }
+	{ sadh r5, r6, r7 ; slti r15, r16, 5 }
+	{ sadh r5, r6, r7 ; subs r15, r16, r17 }
+	{ sadh_u r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ sadh_u r5, r6, r7 ; lb_u r15, r16 }
+	{ sadh_u r5, r6, r7 ; minib_u r15, r16, 5 }
+	{ sadh_u r5, r6, r7 ; packhs r15, r16, r17 }
+	{ sadh_u r5, r6, r7 ; shlb r15, r16, r17 }
+	{ sadh_u r5, r6, r7 ; slteh_u r15, r16, r17 }
+	{ sadh_u r5, r6, r7 ; subbs_u r15, r16, r17 }
+	{ sb r15, r16 ; adds r5, r6, r7 }
+	{ sb r15, r16 ; intlb r5, r6, r7 }
+	{ sb r15, r16 ; mulhh_uu r5, r6, r7 }
+	{ sb r15, r16 ; mulllsa_uu r5, r6, r7 }
+	{ sb r15, r16 ; sadab_u r5, r6, r7 }
+	{ sb r15, r16 ; shrh r5, r6, r7 }
+	{ sb r15, r16 ; sltih r5, r6, 5 }
+	{ sb r15, r16 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; add r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ sb r25, r26 ; add r15, r16, r17 ; shl r5, r6, r7 }
+	{ sb r25, r26 ; add r5, r6, r7 ; add r15, r16, r17 }
+	{ sb r25, r26 ; add r5, r6, r7 ; seq r15, r16, r17 }
+	{ sb r25, r26 ; addi r15, r16, 5 ; and r5, r6, r7 }
+	{ sb r25, r26 ; addi r15, r16, 5 ; mvnz r5, r6, r7 }
+	{ sb r25, r26 ; addi r15, r16, 5 ; slt_u r5, r6, r7 }
+	{ sb r25, r26 ; addi r5, r6, 5 ; ill }
+	{ sb r25, r26 ; addi r5, r6, 5 ; shri r15, r16, 5 }
+	{ sb r25, r26 ; and r15, r16, r17 ; ctz r5, r6 }
+	{ sb r25, r26 ; and r15, r16, r17 ; or r5, r6, r7 }
+	{ sb r25, r26 ; and r15, r16, r17 ; sne r5, r6, r7 }
+	{ sb r25, r26 ; and r5, r6, r7 ; mz r15, r16, r17 }
+	{ sb r25, r26 ; and r5, r6, r7 ; slti r15, r16, 5 }
+	{ sb r25, r26 ; andi r15, r16, 5 ; movei r5, 5 }
+	{ sb r25, r26 ; andi r15, r16, 5 ; s1a r5, r6, r7 }
+	{ sb r25, r26 ; andi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ sb r25, r26 ; andi r5, r6, 5 ; rl r15, r16, r17 }
+	{ sb r25, r26 ; andi r5, r6, 5 ; sub r15, r16, r17 }
+	{ sb r25, r26 ; bitx r5, r6 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; bitx r5, r6 }
+	{ sb r25, r26 ; bytex r5, r6 ; s3a r15, r16, r17 }
+	{ sb r25, r26 ; clz r5, r6 ; addi r15, r16, 5 }
+	{ sb r25, r26 ; clz r5, r6 ; seqi r15, r16, 5 }
+	{ sb r25, r26 ; ctz r5, r6 ; andi r15, r16, 5 }
+	{ sb r25, r26 ; ctz r5, r6 ; shli r15, r16, 5 }
+	{ sb r25, r26 ; fnop ; and r5, r6, r7 }
+	{ sb r25, r26 ; fnop ; mulhlsa_uu r5, r6, r7 }
+	{ sb r25, r26 ; fnop ; rli r5, r6, 5 }
+	{ sb r25, r26 ; fnop ; slt r5, r6, r7 }
+	{ sb r25, r26 ; fnop ; tblidxb1 r5, r6 }
+	{ sb r25, r26 ; ill ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; ill ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; ill ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; info 19 ; move r15, r16 }
+	{ sb r25, r26 ; info 19 ; or r15, r16, r17 }
+	{ sb r25, r26 ; info 19 ; shl r5, r6, r7 }
+	{ sb r25, r26 ; info 19 ; sne r5, r6, r7 }
+	{ sb r25, r26 ; mnz r15, r16, r17 ; clz r5, r6 }
+	{ sb r25, r26 ; mnz r15, r16, r17 ; nor r5, r6, r7 }
+	{ sb r25, r26 ; mnz r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ sb r25, r26 ; mnz r5, r6, r7 ; movei r15, 5 }
+	{ sb r25, r26 ; mnz r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ sb r25, r26 ; move r15, r16 ; move r5, r6 }
+	{ sb r25, r26 ; move r15, r16 ; rli r5, r6, 5 }
+	{ sb r25, r26 ; move r15, r16 ; tblidxb0 r5, r6 }
+	{ sb r25, r26 ; move r5, r6 ; ori r15, r16, 5 }
+	{ sb r25, r26 ; move r5, r6 ; srai r15, r16, 5 }
+	{ sb r25, r26 ; movei r15, 5 ; mulhha_uu r5, r6, r7 }
+	{ sb r25, r26 ; movei r15, 5 ; seqi r5, r6, 5 }
+	{ sb r25, r26 ; movei r15, 5 }
+	{ sb r25, r26 ; movei r5, 5 ; s3a r15, r16, r17 }
+	{ sb r25, r26 ; mulhh_ss r5, r6, r7 ; addi r15, r16, 5 }
+	{ sb r25, r26 ; mulhh_ss r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sb r25, r26 ; mulhh_uu r5, r6, r7 ; andi r15, r16, 5 }
+	{ sb r25, r26 ; mulhh_uu r5, r6, r7 ; shli r15, r16, 5 }
+	{ sb r25, r26 ; mulhha_ss r5, r6, r7 ; ill }
+	{ sb r25, r26 ; mulhha_ss r5, r6, r7 ; shri r15, r16, 5 }
+	{ sb r25, r26 ; mulhha_uu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sb r25, r26 ; mulhha_uu r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sb r25, r26 ; mulhlsa_uu r5, r6, r7 ; movei r15, 5 }
+	{ sb r25, r26 ; mulhlsa_uu r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ sb r25, r26 ; mulll_ss r5, r6, r7 ; nop }
+	{ sb r25, r26 ; mulll_ss r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sb r25, r26 ; mulll_uu r5, r6, r7 ; or r15, r16, r17 }
+	{ sb r25, r26 ; mulll_uu r5, r6, r7 ; sra r15, r16, r17 }
+	{ sb r25, r26 ; mullla_ss r5, r6, r7 ; rl r15, r16, r17 }
+	{ sb r25, r26 ; mullla_ss r5, r6, r7 ; sub r15, r16, r17 }
+	{ sb r25, r26 ; mullla_uu r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; mullla_uu r5, r6, r7 }
+	{ sb r25, r26 ; mvnz r5, r6, r7 ; s3a r15, r16, r17 }
+	{ sb r25, r26 ; mvz r5, r6, r7 ; addi r15, r16, 5 }
+	{ sb r25, r26 ; mvz r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sb r25, r26 ; mz r15, r16, r17 ; andi r5, r6, 5 }
+	{ sb r25, r26 ; mz r15, r16, r17 ; mvz r5, r6, r7 }
+	{ sb r25, r26 ; mz r15, r16, r17 ; slte r5, r6, r7 }
+	{ sb r25, r26 ; mz r5, r6, r7 ; info 19 }
+	{ sb r25, r26 ; mz r5, r6, r7 ; slt r15, r16, r17 }
+	{ sb r25, r26 ; nop ; bitx r5, r6 }
+	{ sb r25, r26 ; nop ; mullla_ss r5, r6, r7 }
+	{ sb r25, r26 ; nop ; s2a r15, r16, r17 }
+	{ sb r25, r26 ; nop ; slte r15, r16, r17 }
+	{ sb r25, r26 ; nop ; xor r15, r16, r17 }
+	{ sb r25, r26 ; nor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ sb r25, r26 ; nor r15, r16, r17 ; shl r5, r6, r7 }
+	{ sb r25, r26 ; nor r5, r6, r7 ; add r15, r16, r17 }
+	{ sb r25, r26 ; nor r5, r6, r7 ; seq r15, r16, r17 }
+	{ sb r25, r26 ; or r15, r16, r17 ; and r5, r6, r7 }
+	{ sb r25, r26 ; or r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ sb r25, r26 ; or r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ sb r25, r26 ; or r5, r6, r7 ; ill }
+	{ sb r25, r26 ; or r5, r6, r7 ; shri r15, r16, 5 }
+	{ sb r25, r26 ; ori r15, r16, 5 ; ctz r5, r6 }
+	{ sb r25, r26 ; ori r15, r16, 5 ; or r5, r6, r7 }
+	{ sb r25, r26 ; ori r15, r16, 5 ; sne r5, r6, r7 }
+	{ sb r25, r26 ; ori r5, r6, 5 ; mz r15, r16, r17 }
+	{ sb r25, r26 ; ori r5, r6, 5 ; slti r15, r16, 5 }
+	{ sb r25, r26 ; pcnt r5, r6 ; nor r15, r16, r17 }
+	{ sb r25, r26 ; pcnt r5, r6 ; sne r15, r16, r17 }
+	{ sb r25, r26 ; rl r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; rl r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; rl r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; rl r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; rl r5, r6, r7 }
+	{ sb r25, r26 ; rli r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ sb r25, r26 ; rli r15, r16, 5 ; shr r5, r6, r7 }
+	{ sb r25, r26 ; rli r5, r6, 5 ; and r15, r16, r17 }
+	{ sb r25, r26 ; rli r5, r6, 5 ; shl r15, r16, r17 }
+	{ sb r25, r26 ; s1a r15, r16, r17 ; bitx r5, r6 }
+	{ sb r25, r26 ; s1a r15, r16, r17 ; mz r5, r6, r7 }
+	{ sb r25, r26 ; s1a r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sb r25, r26 ; s1a r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sb r25, r26 ; s1a r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sb r25, r26 ; s2a r15, r16, r17 ; info 19 }
+	{ sb r25, r26 ; s2a r15, r16, r17 ; pcnt r5, r6 }
+	{ sb r25, r26 ; s2a r15, r16, r17 ; srai r5, r6, 5 }
+	{ sb r25, r26 ; s2a r5, r6, r7 ; nor r15, r16, r17 }
+	{ sb r25, r26 ; s2a r5, r6, r7 ; sne r15, r16, r17 }
+	{ sb r25, r26 ; s3a r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; s3a r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; s3a r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; s3a r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; seq r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sb r25, r26 ; seq r15, r16, r17 ; shr r5, r6, r7 }
+	{ sb r25, r26 ; seq r5, r6, r7 ; and r15, r16, r17 }
+	{ sb r25, r26 ; seq r5, r6, r7 ; shl r15, r16, r17 }
+	{ sb r25, r26 ; seqi r15, r16, 5 ; bitx r5, r6 }
+	{ sb r25, r26 ; seqi r15, r16, 5 ; mz r5, r6, r7 }
+	{ sb r25, r26 ; seqi r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ sb r25, r26 ; seqi r5, r6, 5 ; mnz r15, r16, r17 }
+	{ sb r25, r26 ; seqi r5, r6, 5 ; slt_u r15, r16, r17 }
+	{ sb r25, r26 ; shl r15, r16, r17 ; info 19 }
+	{ sb r25, r26 ; shl r15, r16, r17 ; pcnt r5, r6 }
+	{ sb r25, r26 ; shl r15, r16, r17 ; srai r5, r6, 5 }
+	{ sb r25, r26 ; shl r5, r6, r7 ; nor r15, r16, r17 }
+	{ sb r25, r26 ; shl r5, r6, r7 ; sne r15, r16, r17 }
+	{ sb r25, r26 ; shli r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; shli r15, r16, 5 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; shli r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; shli r5, r6, 5 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; shli r5, r6, 5 }
+	{ sb r25, r26 ; shr r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sb r25, r26 ; shr r15, r16, r17 ; shr r5, r6, r7 }
+	{ sb r25, r26 ; shr r5, r6, r7 ; and r15, r16, r17 }
+	{ sb r25, r26 ; shr r5, r6, r7 ; shl r15, r16, r17 }
+	{ sb r25, r26 ; shri r15, r16, 5 ; bitx r5, r6 }
+	{ sb r25, r26 ; shri r15, r16, 5 ; mz r5, r6, r7 }
+	{ sb r25, r26 ; shri r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ sb r25, r26 ; shri r5, r6, 5 ; mnz r15, r16, r17 }
+	{ sb r25, r26 ; shri r5, r6, 5 ; slt_u r15, r16, r17 }
+	{ sb r25, r26 ; slt r15, r16, r17 ; info 19 }
+	{ sb r25, r26 ; slt r15, r16, r17 ; pcnt r5, r6 }
+	{ sb r25, r26 ; slt r15, r16, r17 ; srai r5, r6, 5 }
+	{ sb r25, r26 ; slt r5, r6, r7 ; nor r15, r16, r17 }
+	{ sb r25, r26 ; slt r5, r6, r7 ; sne r15, r16, r17 }
+	{ sb r25, r26 ; slt_u r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; slt_u r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; slt_u r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; slt_u r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; slt_u r5, r6, r7 }
+	{ sb r25, r26 ; slte r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sb r25, r26 ; slte r15, r16, r17 ; shr r5, r6, r7 }
+	{ sb r25, r26 ; slte r5, r6, r7 ; and r15, r16, r17 }
+	{ sb r25, r26 ; slte r5, r6, r7 ; shl r15, r16, r17 }
+	{ sb r25, r26 ; slte_u r15, r16, r17 ; bitx r5, r6 }
+	{ sb r25, r26 ; slte_u r15, r16, r17 ; mz r5, r6, r7 }
+	{ sb r25, r26 ; slte_u r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sb r25, r26 ; slte_u r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sb r25, r26 ; slte_u r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sb r25, r26 ; slti r15, r16, 5 ; info 19 }
+	{ sb r25, r26 ; slti r15, r16, 5 ; pcnt r5, r6 }
+	{ sb r25, r26 ; slti r15, r16, 5 ; srai r5, r6, 5 }
+	{ sb r25, r26 ; slti r5, r6, 5 ; nor r15, r16, r17 }
+	{ sb r25, r26 ; slti r5, r6, 5 ; sne r15, r16, r17 }
+	{ sb r25, r26 ; slti_u r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; slti_u r15, r16, 5 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; slti_u r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; slti_u r5, r6, 5 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; slti_u r5, r6, 5 }
+	{ sb r25, r26 ; sne r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sb r25, r26 ; sne r15, r16, r17 ; shr r5, r6, r7 }
+	{ sb r25, r26 ; sne r5, r6, r7 ; and r15, r16, r17 }
+	{ sb r25, r26 ; sne r5, r6, r7 ; shl r15, r16, r17 }
+	{ sb r25, r26 ; sra r15, r16, r17 ; bitx r5, r6 }
+	{ sb r25, r26 ; sra r15, r16, r17 ; mz r5, r6, r7 }
+	{ sb r25, r26 ; sra r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sb r25, r26 ; sra r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sb r25, r26 ; sra r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sb r25, r26 ; srai r15, r16, 5 ; info 19 }
+	{ sb r25, r26 ; srai r15, r16, 5 ; pcnt r5, r6 }
+	{ sb r25, r26 ; srai r15, r16, 5 ; srai r5, r6, 5 }
+	{ sb r25, r26 ; srai r5, r6, 5 ; nor r15, r16, r17 }
+	{ sb r25, r26 ; srai r5, r6, 5 ; sne r15, r16, r17 }
+	{ sb r25, r26 ; sub r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sb r25, r26 ; sub r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sb r25, r26 ; sub r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sb r25, r26 ; sub r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sb r25, r26 ; sub r5, r6, r7 }
+	{ sb r25, r26 ; tblidxb0 r5, r6 ; s3a r15, r16, r17 }
+	{ sb r25, r26 ; tblidxb1 r5, r6 ; addi r15, r16, 5 }
+	{ sb r25, r26 ; tblidxb1 r5, r6 ; seqi r15, r16, 5 }
+	{ sb r25, r26 ; tblidxb2 r5, r6 ; andi r15, r16, 5 }
+	{ sb r25, r26 ; tblidxb2 r5, r6 ; shli r15, r16, 5 }
+	{ sb r25, r26 ; tblidxb3 r5, r6 ; ill }
+	{ sb r25, r26 ; tblidxb3 r5, r6 ; shri r15, r16, 5 }
+	{ sb r25, r26 ; xor r15, r16, r17 ; ctz r5, r6 }
+	{ sb r25, r26 ; xor r15, r16, r17 ; or r5, r6, r7 }
+	{ sb r25, r26 ; xor r15, r16, r17 ; sne r5, r6, r7 }
+	{ sb r25, r26 ; xor r5, r6, r7 ; mz r15, r16, r17 }
+	{ sb r25, r26 ; xor r5, r6, r7 ; slti r15, r16, 5 }
+	{ sbadd r15, r16, 5 ; adiffh r5, r6, r7 }
+	{ sbadd r15, r16, 5 ; maxb_u r5, r6, r7 }
+	{ sbadd r15, r16, 5 ; mulhha_su r5, r6, r7 }
+	{ sbadd r15, r16, 5 ; mvz r5, r6, r7 }
+	{ sbadd r15, r16, 5 ; sadah_u r5, r6, r7 }
+	{ sbadd r15, r16, 5 ; shrib r5, r6, 5 }
+	{ sbadd r15, r16, 5 ; sne r5, r6, r7 }
+	{ sbadd r15, r16, 5 ; xori r5, r6, 5 }
+	{ seq r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
+	{ seq r15, r16, r17 ; and r5, r6, r7 ; sw r25, r26 }
+	{ seq r15, r16, r17 ; bitx r5, r6 ; prefetch r25 }
+	{ seq r15, r16, r17 ; clz r5, r6 ; prefetch r25 }
+	{ seq r15, r16, r17 ; fnop ; lh r25, r26 }
+	{ seq r15, r16, r17 ; inthh r5, r6, r7 }
+	{ seq r15, r16, r17 ; lb r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ seq r15, r16, r17 ; lb r25, r26 ; shl r5, r6, r7 }
+	{ seq r15, r16, r17 ; lb_u r25, r26 ; add r5, r6, r7 }
+	{ seq r15, r16, r17 ; lb_u r25, r26 ; mullla_ss r5, r6, r7 }
+	{ seq r15, r16, r17 ; lb_u r25, r26 ; shri r5, r6, 5 }
+	{ seq r15, r16, r17 ; lh r25, r26 ; andi r5, r6, 5 }
+	{ seq r15, r16, r17 ; lh r25, r26 ; mvz r5, r6, r7 }
+	{ seq r15, r16, r17 ; lh r25, r26 ; slte r5, r6, r7 }
+	{ seq r15, r16, r17 ; lh_u r25, r26 ; clz r5, r6 }
+	{ seq r15, r16, r17 ; lh_u r25, r26 ; nor r5, r6, r7 }
+	{ seq r15, r16, r17 ; lh_u r25, r26 ; slti_u r5, r6, 5 }
+	{ seq r15, r16, r17 ; lw r25, r26 ; info 19 }
+	{ seq r15, r16, r17 ; lw r25, r26 ; pcnt r5, r6 }
+	{ seq r15, r16, r17 ; lw r25, r26 ; srai r5, r6, 5 }
+	{ seq r15, r16, r17 ; mnz r5, r6, r7 ; lh_u r25, r26 }
+	{ seq r15, r16, r17 ; movei r5, 5 ; lb_u r25, r26 }
+	{ seq r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ seq r15, r16, r17 ; mulhha_ss r5, r6, r7 ; sw r25, r26 }
+	{ seq r15, r16, r17 ; mulhla_us r5, r6, r7 }
+	{ seq r15, r16, r17 ; mulll_ss r5, r6, r7 ; sw r25, r26 }
+	{ seq r15, r16, r17 ; mullla_ss r5, r6, r7 ; sh r25, r26 }
+	{ seq r15, r16, r17 ; mvnz r5, r6, r7 ; prefetch r25 }
+	{ seq r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 }
+	{ seq r15, r16, r17 ; nor r5, r6, r7 ; lh_u r25, r26 }
+	{ seq r15, r16, r17 ; ori r5, r6, 5 ; lh_u r25, r26 }
+	{ seq r15, r16, r17 ; pcnt r5, r6 }
+	{ seq r15, r16, r17 ; prefetch r25 ; mulll_uu r5, r6, r7 }
+	{ seq r15, r16, r17 ; prefetch r25 ; shr r5, r6, r7 }
+	{ seq r15, r16, r17 ; rl r5, r6, r7 ; lh r25, r26 }
+	{ seq r15, r16, r17 ; s1a r5, r6, r7 ; lh r25, r26 }
+	{ seq r15, r16, r17 ; s3a r5, r6, r7 ; lh r25, r26 }
+	{ seq r15, r16, r17 ; sb r25, r26 ; clz r5, r6 }
+	{ seq r15, r16, r17 ; sb r25, r26 ; nor r5, r6, r7 }
+	{ seq r15, r16, r17 ; sb r25, r26 ; slti_u r5, r6, 5 }
+	{ seq r15, r16, r17 ; seq r5, r6, r7 }
+	{ seq r15, r16, r17 ; sh r25, r26 ; bytex r5, r6 }
+	{ seq r15, r16, r17 ; sh r25, r26 ; nop }
+	{ seq r15, r16, r17 ; sh r25, r26 ; slti r5, r6, 5 }
+	{ seq r15, r16, r17 ; shl r5, r6, r7 ; sw r25, r26 }
+	{ seq r15, r16, r17 ; shr r5, r6, r7 ; lw r25, r26 }
+	{ seq r15, r16, r17 ; slt r5, r6, r7 ; lb r25, r26 }
+	{ seq r15, r16, r17 ; sltb r5, r6, r7 }
+	{ seq r15, r16, r17 ; slte_u r5, r6, r7 ; sw r25, r26 }
+	{ seq r15, r16, r17 ; slti_u r5, r6, 5 ; lh r25, r26 }
+	{ seq r15, r16, r17 ; sne r5, r6, r7 ; sw r25, r26 }
+	{ seq r15, r16, r17 ; srai r5, r6, 5 ; lw r25, r26 }
+	{ seq r15, r16, r17 ; subh r5, r6, r7 }
+	{ seq r15, r16, r17 ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ seq r15, r16, r17 ; sw r25, r26 ; shl r5, r6, r7 }
+	{ seq r15, r16, r17 ; tblidxb0 r5, r6 ; lb r25, r26 }
+	{ seq r15, r16, r17 ; tblidxb2 r5, r6 ; lb r25, r26 }
+	{ seq r15, r16, r17 ; xor r5, r6, r7 ; lb r25, r26 }
+	{ seq r5, r6, r7 ; add r15, r16, r17 }
+	{ seq r5, r6, r7 ; and r15, r16, r17 ; lb r25, r26 }
+	{ seq r5, r6, r7 ; auli r15, r16, 0x1234 }
+	{ seq r5, r6, r7 ; ill ; prefetch r25 }
+	{ seq r5, r6, r7 ; inv r15 }
+	{ seq r5, r6, r7 ; lb r25, r26 ; or r15, r16, r17 }
+	{ seq r5, r6, r7 ; lb r25, r26 ; sra r15, r16, r17 }
+	{ seq r5, r6, r7 ; lb_u r25, r26 ; ori r15, r16, 5 }
+	{ seq r5, r6, r7 ; lb_u r25, r26 ; srai r15, r16, 5 }
+	{ seq r5, r6, r7 ; lh r25, r26 ; or r15, r16, r17 }
+	{ seq r5, r6, r7 ; lh r25, r26 ; sra r15, r16, r17 }
+	{ seq r5, r6, r7 ; lh_u r25, r26 ; ori r15, r16, 5 }
+	{ seq r5, r6, r7 ; lh_u r25, r26 ; srai r15, r16, 5 }
+	{ seq r5, r6, r7 ; lw r25, r26 ; nor r15, r16, r17 }
+	{ seq r5, r6, r7 ; lw r25, r26 ; sne r15, r16, r17 }
+	{ seq r5, r6, r7 ; mnz r15, r16, r17 ; lb r25, r26 }
+	{ seq r5, r6, r7 ; move r15, r16 ; sw r25, r26 }
+	{ seq r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 }
+	{ seq r5, r6, r7 ; nor r15, r16, r17 ; lh_u r25, r26 }
+	{ seq r5, r6, r7 ; ori r15, r16, 5 ; lh_u r25, r26 }
+	{ seq r5, r6, r7 ; prefetch r25 ; move r15, r16 }
+	{ seq r5, r6, r7 ; prefetch r25 ; slte r15, r16, r17 }
+	{ seq r5, r6, r7 ; rl r15, r16, r17 }
+	{ seq r5, r6, r7 ; s1a r15, r16, r17 }
+	{ seq r5, r6, r7 ; s3a r15, r16, r17 }
+	{ seq r5, r6, r7 ; sb r25, r26 ; s2a r15, r16, r17 }
+	{ seq r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ seq r5, r6, r7 ; seqi r15, r16, 5 ; sh r25, r26 }
+	{ seq r5, r6, r7 ; sh r25, r26 ; ori r15, r16, 5 }
+	{ seq r5, r6, r7 ; sh r25, r26 ; srai r15, r16, 5 }
+	{ seq r5, r6, r7 ; shli r15, r16, 5 ; lh_u r25, r26 }
+	{ seq r5, r6, r7 ; shrh r15, r16, r17 }
+	{ seq r5, r6, r7 ; slt r15, r16, r17 ; sh r25, r26 }
+	{ seq r5, r6, r7 ; slte r15, r16, r17 ; prefetch r25 }
+	{ seq r5, r6, r7 ; slth_u r15, r16, r17 }
+	{ seq r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ seq r5, r6, r7 ; sra r15, r16, r17 ; lh_u r25, r26 }
+	{ seq r5, r6, r7 ; sraih r15, r16, 5 }
+	{ seq r5, r6, r7 ; sw r25, r26 ; andi r15, r16, 5 }
+	{ seq r5, r6, r7 ; sw r25, r26 ; shli r15, r16, 5 }
+	{ seq r5, r6, r7 ; xor r15, r16, r17 ; lh r25, r26 }
+	{ seqb r15, r16, r17 ; adiffb_u r5, r6, r7 }
+	{ seqb r15, r16, r17 ; intlh r5, r6, r7 }
+	{ seqb r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ seqb r15, r16, r17 ; mvnz r5, r6, r7 }
+	{ seqb r15, r16, r17 ; sadah r5, r6, r7 }
+	{ seqb r15, r16, r17 ; shri r5, r6, 5 }
+	{ seqb r15, r16, r17 ; sltih_u r5, r6, 5 }
+	{ seqb r15, r16, r17 ; xor r5, r6, r7 }
+	{ seqb r5, r6, r7 ; icoh r15 }
+	{ seqb r5, r6, r7 ; lhadd r15, r16, 5 }
+	{ seqb r5, r6, r7 ; mnzh r15, r16, r17 }
+	{ seqb r5, r6, r7 ; rli r15, r16, 5 }
+	{ seqb r5, r6, r7 ; shr r15, r16, r17 }
+	{ seqb r5, r6, r7 ; sltib r15, r16, 5 }
+	{ seqb r5, r6, r7 ; swadd r15, r16, 5 }
+	{ seqh r15, r16, r17 ; auli r5, r6, 0x1234 }
+	{ seqh r15, r16, r17 ; maxih r5, r6, 5 }
+	{ seqh r15, r16, r17 ; mulhl_ss r5, r6, r7 }
+	{ seqh r15, r16, r17 ; mzh r5, r6, r7 }
+	{ seqh r15, r16, r17 ; sadh_u r5, r6, r7 }
+	{ seqh r15, r16, r17 ; slt_u r5, r6, r7 }
+	{ seqh r15, r16, r17 ; sra r5, r6, r7 }
+	{ seqh r5, r6, r7 ; addbs_u r15, r16, r17 }
+	{ seqh r5, r6, r7 ; inthb r15, r16, r17 }
+	{ seqh r5, r6, r7 ; lw_na r15, r16 }
+	{ seqh r5, r6, r7 ; movelis r15, 0x1234 }
+	{ seqh r5, r6, r7 ; sb r15, r16 }
+	{ seqh r5, r6, r7 ; shrib r15, r16, 5 }
+	{ seqh r5, r6, r7 ; sne r15, r16, r17 }
+	{ seqh r5, r6, r7 ; xori r15, r16, 5 }
+	{ seqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
+	{ seqi r15, r16, 5 ; and r5, r6, r7 ; sw r25, r26 }
+	{ seqi r15, r16, 5 ; bitx r5, r6 ; prefetch r25 }
+	{ seqi r15, r16, 5 ; clz r5, r6 ; prefetch r25 }
+	{ seqi r15, r16, 5 ; fnop ; lh r25, r26 }
+	{ seqi r15, r16, 5 ; inthh r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lb r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lb r25, r26 ; shl r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lb_u r25, r26 ; add r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lb_u r25, r26 ; mullla_ss r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lb_u r25, r26 ; shri r5, r6, 5 }
+	{ seqi r15, r16, 5 ; lh r25, r26 ; andi r5, r6, 5 }
+	{ seqi r15, r16, 5 ; lh r25, r26 ; mvz r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lh r25, r26 ; slte r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lh_u r25, r26 ; clz r5, r6 }
+	{ seqi r15, r16, 5 ; lh_u r25, r26 ; nor r5, r6, r7 }
+	{ seqi r15, r16, 5 ; lh_u r25, r26 ; slti_u r5, r6, 5 }
+	{ seqi r15, r16, 5 ; lw r25, r26 ; info 19 }
+	{ seqi r15, r16, 5 ; lw r25, r26 ; pcnt r5, r6 }
+	{ seqi r15, r16, 5 ; lw r25, r26 ; srai r5, r6, 5 }
+	{ seqi r15, r16, 5 ; mnz r5, r6, r7 ; lh_u r25, r26 }
+	{ seqi r15, r16, 5 ; movei r5, 5 ; lb_u r25, r26 }
+	{ seqi r15, r16, 5 ; mulhh_ss r5, r6, r7 }
+	{ seqi r15, r16, 5 ; mulhha_ss r5, r6, r7 ; sw r25, r26 }
+	{ seqi r15, r16, 5 ; mulhla_us r5, r6, r7 }
+	{ seqi r15, r16, 5 ; mulll_ss r5, r6, r7 ; sw r25, r26 }
+	{ seqi r15, r16, 5 ; mullla_ss r5, r6, r7 ; sh r25, r26 }
+	{ seqi r15, r16, 5 ; mvnz r5, r6, r7 ; prefetch r25 }
+	{ seqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 }
+	{ seqi r15, r16, 5 ; nor r5, r6, r7 ; lh_u r25, r26 }
+	{ seqi r15, r16, 5 ; ori r5, r6, 5 ; lh_u r25, r26 }
+	{ seqi r15, r16, 5 ; pcnt r5, r6 }
+	{ seqi r15, r16, 5 ; prefetch r25 ; mulll_uu r5, r6, r7 }
+	{ seqi r15, r16, 5 ; prefetch r25 ; shr r5, r6, r7 }
+	{ seqi r15, r16, 5 ; rl r5, r6, r7 ; lh r25, r26 }
+	{ seqi r15, r16, 5 ; s1a r5, r6, r7 ; lh r25, r26 }
+	{ seqi r15, r16, 5 ; s3a r5, r6, r7 ; lh r25, r26 }
+	{ seqi r15, r16, 5 ; sb r25, r26 ; clz r5, r6 }
+	{ seqi r15, r16, 5 ; sb r25, r26 ; nor r5, r6, r7 }
+	{ seqi r15, r16, 5 ; sb r25, r26 ; slti_u r5, r6, 5 }
+	{ seqi r15, r16, 5 ; seq r5, r6, r7 }
+	{ seqi r15, r16, 5 ; sh r25, r26 ; bytex r5, r6 }
+	{ seqi r15, r16, 5 ; sh r25, r26 ; nop }
+	{ seqi r15, r16, 5 ; sh r25, r26 ; slti r5, r6, 5 }
+	{ seqi r15, r16, 5 ; shl r5, r6, r7 ; sw r25, r26 }
+	{ seqi r15, r16, 5 ; shr r5, r6, r7 ; lw r25, r26 }
+	{ seqi r15, r16, 5 ; slt r5, r6, r7 ; lb r25, r26 }
+	{ seqi r15, r16, 5 ; sltb r5, r6, r7 }
+	{ seqi r15, r16, 5 ; slte_u r5, r6, r7 ; sw r25, r26 }
+	{ seqi r15, r16, 5 ; slti_u r5, r6, 5 ; lh r25, r26 }
+	{ seqi r15, r16, 5 ; sne r5, r6, r7 ; sw r25, r26 }
+	{ seqi r15, r16, 5 ; srai r5, r6, 5 ; lw r25, r26 }
+	{ seqi r15, r16, 5 ; subh r5, r6, r7 }
+	{ seqi r15, r16, 5 ; sw r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ seqi r15, r16, 5 ; sw r25, r26 ; shl r5, r6, r7 }
+	{ seqi r15, r16, 5 ; tblidxb0 r5, r6 ; lb r25, r26 }
+	{ seqi r15, r16, 5 ; tblidxb2 r5, r6 ; lb r25, r26 }
+	{ seqi r15, r16, 5 ; xor r5, r6, r7 ; lb r25, r26 }
+	{ seqi r5, r6, 5 ; add r15, r16, r17 }
+	{ seqi r5, r6, 5 ; and r15, r16, r17 ; lb r25, r26 }
+	{ seqi r5, r6, 5 ; auli r15, r16, 0x1234 }
+	{ seqi r5, r6, 5 ; ill ; prefetch r25 }
+	{ seqi r5, r6, 5 ; inv r15 }
+	{ seqi r5, r6, 5 ; lb r25, r26 ; or r15, r16, r17 }
+	{ seqi r5, r6, 5 ; lb r25, r26 ; sra r15, r16, r17 }
+	{ seqi r5, r6, 5 ; lb_u r25, r26 ; ori r15, r16, 5 }
+	{ seqi r5, r6, 5 ; lb_u r25, r26 ; srai r15, r16, 5 }
+	{ seqi r5, r6, 5 ; lh r25, r26 ; or r15, r16, r17 }
+	{ seqi r5, r6, 5 ; lh r25, r26 ; sra r15, r16, r17 }
+	{ seqi r5, r6, 5 ; lh_u r25, r26 ; ori r15, r16, 5 }
+	{ seqi r5, r6, 5 ; lh_u r25, r26 ; srai r15, r16, 5 }
+	{ seqi r5, r6, 5 ; lw r25, r26 ; nor r15, r16, r17 }
+	{ seqi r5, r6, 5 ; lw r25, r26 ; sne r15, r16, r17 }
+	{ seqi r5, r6, 5 ; mnz r15, r16, r17 ; lb r25, r26 }
+	{ seqi r5, r6, 5 ; move r15, r16 ; sw r25, r26 }
+	{ seqi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 }
+	{ seqi r5, r6, 5 ; nor r15, r16, r17 ; lh_u r25, r26 }
+	{ seqi r5, r6, 5 ; ori r15, r16, 5 ; lh_u r25, r26 }
+	{ seqi r5, r6, 5 ; prefetch r25 ; move r15, r16 }
+	{ seqi r5, r6, 5 ; prefetch r25 ; slte r15, r16, r17 }
+	{ seqi r5, r6, 5 ; rl r15, r16, r17 }
+	{ seqi r5, r6, 5 ; s1a r15, r16, r17 }
+	{ seqi r5, r6, 5 ; s3a r15, r16, r17 }
+	{ seqi r5, r6, 5 ; sb r25, r26 ; s2a r15, r16, r17 }
+	{ seqi r5, r6, 5 ; sbadd r15, r16, 5 }
+	{ seqi r5, r6, 5 ; seqi r15, r16, 5 ; sh r25, r26 }
+	{ seqi r5, r6, 5 ; sh r25, r26 ; ori r15, r16, 5 }
+	{ seqi r5, r6, 5 ; sh r25, r26 ; srai r15, r16, 5 }
+	{ seqi r5, r6, 5 ; shli r15, r16, 5 ; lh_u r25, r26 }
+	{ seqi r5, r6, 5 ; shrh r15, r16, r17 }
+	{ seqi r5, r6, 5 ; slt r15, r16, r17 ; sh r25, r26 }
+	{ seqi r5, r6, 5 ; slte r15, r16, r17 ; prefetch r25 }
+	{ seqi r5, r6, 5 ; slth_u r15, r16, r17 }
+	{ seqi r5, r6, 5 ; slti_u r15, r16, 5 }
+	{ seqi r5, r6, 5 ; sra r15, r16, r17 ; lh_u r25, r26 }
+	{ seqi r5, r6, 5 ; sraih r15, r16, 5 }
+	{ seqi r5, r6, 5 ; sw r25, r26 ; andi r15, r16, 5 }
+	{ seqi r5, r6, 5 ; sw r25, r26 ; shli r15, r16, 5 }
+	{ seqi r5, r6, 5 ; xor r15, r16, r17 ; lh r25, r26 }
+	{ seqib r15, r16, 5 ; adiffb_u r5, r6, r7 }
+	{ seqib r15, r16, 5 ; intlh r5, r6, r7 }
+	{ seqib r15, r16, 5 ; mulhha_ss r5, r6, r7 }
+	{ seqib r15, r16, 5 ; mvnz r5, r6, r7 }
+	{ seqib r15, r16, 5 ; sadah r5, r6, r7 }
+	{ seqib r15, r16, 5 ; shri r5, r6, 5 }
+	{ seqib r15, r16, 5 ; sltih_u r5, r6, 5 }
+	{ seqib r15, r16, 5 ; xor r5, r6, r7 }
+	{ seqib r5, r6, 5 ; icoh r15 }
+	{ seqib r5, r6, 5 ; lhadd r15, r16, 5 }
+	{ seqib r5, r6, 5 ; mnzh r15, r16, r17 }
+	{ seqib r5, r6, 5 ; rli r15, r16, 5 }
+	{ seqib r5, r6, 5 ; shr r15, r16, r17 }
+	{ seqib r5, r6, 5 ; sltib r15, r16, 5 }
+	{ seqib r5, r6, 5 ; swadd r15, r16, 5 }
+	{ seqih r15, r16, 5 ; auli r5, r6, 0x1234 }
+	{ seqih r15, r16, 5 ; maxih r5, r6, 5 }
+	{ seqih r15, r16, 5 ; mulhl_ss r5, r6, r7 }
+	{ seqih r15, r16, 5 ; mzh r5, r6, r7 }
+	{ seqih r15, r16, 5 ; sadh_u r5, r6, r7 }
+	{ seqih r15, r16, 5 ; slt_u r5, r6, r7 }
+	{ seqih r15, r16, 5 ; sra r5, r6, r7 }
+	{ seqih r5, r6, 5 ; addbs_u r15, r16, r17 }
+	{ seqih r5, r6, 5 ; inthb r15, r16, r17 }
+	{ seqih r5, r6, 5 ; lw_na r15, r16 }
+	{ seqih r5, r6, 5 ; movelis r15, 0x1234 }
+	{ seqih r5, r6, 5 ; sb r15, r16 }
+	{ seqih r5, r6, 5 ; shrib r15, r16, 5 }
+	{ seqih r5, r6, 5 ; sne r15, r16, r17 }
+	{ seqih r5, r6, 5 ; xori r15, r16, 5 }
+	{ sh r15, r16 ; bytex r5, r6 }
+	{ sh r15, r16 ; minih r5, r6, 5 }
+	{ sh r15, r16 ; mulhla_ss r5, r6, r7 }
+	{ sh r15, r16 ; ori r5, r6, 5 }
+	{ sh r15, r16 ; seqi r5, r6, 5 }
+	{ sh r15, r16 ; slte_u r5, r6, r7 }
+	{ sh r15, r16 ; sraib r5, r6, 5 }
+	{ sh r25, r26 ; add r15, r16, r17 ; clz r5, r6 }
+	{ sh r25, r26 ; add r15, r16, r17 ; nor r5, r6, r7 }
+	{ sh r25, r26 ; add r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ sh r25, r26 ; add r5, r6, r7 ; movei r15, 5 }
+	{ sh r25, r26 ; add r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ sh r25, r26 ; addi r15, r16, 5 ; move r5, r6 }
+	{ sh r25, r26 ; addi r15, r16, 5 ; rli r5, r6, 5 }
+	{ sh r25, r26 ; addi r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ sh r25, r26 ; addi r5, r6, 5 ; ori r15, r16, 5 }
+	{ sh r25, r26 ; addi r5, r6, 5 ; srai r15, r16, 5 }
+	{ sh r25, r26 ; and r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ sh r25, r26 ; and r15, r16, r17 ; seqi r5, r6, 5 }
+	{ sh r25, r26 ; and r15, r16, r17 }
+	{ sh r25, r26 ; and r5, r6, r7 ; s3a r15, r16, r17 }
+	{ sh r25, r26 ; andi r15, r16, 5 ; addi r5, r6, 5 }
+	{ sh r25, r26 ; andi r15, r16, 5 ; mullla_uu r5, r6, r7 }
+	{ sh r25, r26 ; andi r15, r16, 5 ; slt r5, r6, r7 }
+	{ sh r25, r26 ; andi r5, r6, 5 ; fnop }
+	{ sh r25, r26 ; andi r5, r6, 5 ; shr r15, r16, r17 }
+	{ sh r25, r26 ; bitx r5, r6 ; info 19 }
+	{ sh r25, r26 ; bitx r5, r6 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; bytex r5, r6 ; move r15, r16 }
+	{ sh r25, r26 ; bytex r5, r6 ; slte r15, r16, r17 }
+	{ sh r25, r26 ; clz r5, r6 ; mz r15, r16, r17 }
+	{ sh r25, r26 ; clz r5, r6 ; slti r15, r16, 5 }
+	{ sh r25, r26 ; ctz r5, r6 ; nor r15, r16, r17 }
+	{ sh r25, r26 ; ctz r5, r6 ; sne r15, r16, r17 }
+	{ sh r25, r26 ; fnop ; info 19 }
+	{ sh r25, r26 ; fnop ; nop }
+	{ sh r25, r26 ; fnop ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; fnop ; slti_u r15, r16, 5 }
+	{ sh r25, r26 ; ill ; andi r5, r6, 5 }
+	{ sh r25, r26 ; ill ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; ill ; slte r5, r6, r7 }
+	{ sh r25, r26 ; info 19 ; andi r15, r16, 5 }
+	{ sh r25, r26 ; info 19 ; mulll_ss r5, r6, r7 }
+	{ sh r25, r26 ; info 19 ; s1a r15, r16, r17 }
+	{ sh r25, r26 ; info 19 ; slt_u r15, r16, r17 }
+	{ sh r25, r26 ; info 19 ; tblidxb2 r5, r6 }
+	{ sh r25, r26 ; mnz r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ sh r25, r26 ; mnz r15, r16, r17 ; seq r5, r6, r7 }
+	{ sh r25, r26 ; mnz r15, r16, r17 ; xor r5, r6, r7 }
+	{ sh r25, r26 ; mnz r5, r6, r7 ; s2a r15, r16, r17 }
+	{ sh r25, r26 ; move r15, r16 ; add r5, r6, r7 }
+	{ sh r25, r26 ; move r15, r16 ; mullla_ss r5, r6, r7 }
+	{ sh r25, r26 ; move r15, r16 ; shri r5, r6, 5 }
+	{ sh r25, r26 ; move r5, r6 ; andi r15, r16, 5 }
+	{ sh r25, r26 ; move r5, r6 ; shli r15, r16, 5 }
+	{ sh r25, r26 ; movei r15, 5 ; bytex r5, r6 }
+	{ sh r25, r26 ; movei r15, 5 ; nop }
+	{ sh r25, r26 ; movei r15, 5 ; slti r5, r6, 5 }
+	{ sh r25, r26 ; movei r5, 5 ; move r15, r16 }
+	{ sh r25, r26 ; movei r5, 5 ; slte r15, r16, r17 }
+	{ sh r25, r26 ; mulhh_ss r5, r6, r7 ; mz r15, r16, r17 }
+	{ sh r25, r26 ; mulhh_ss r5, r6, r7 ; slti r15, r16, 5 }
+	{ sh r25, r26 ; mulhh_uu r5, r6, r7 ; nor r15, r16, r17 }
+	{ sh r25, r26 ; mulhh_uu r5, r6, r7 ; sne r15, r16, r17 }
+	{ sh r25, r26 ; mulhha_ss r5, r6, r7 ; ori r15, r16, 5 }
+	{ sh r25, r26 ; mulhha_ss r5, r6, r7 ; srai r15, r16, 5 }
+	{ sh r25, r26 ; mulhha_uu r5, r6, r7 ; rli r15, r16, 5 }
+	{ sh r25, r26 ; mulhha_uu r5, r6, r7 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; mulhlsa_uu r5, r6, r7 ; s2a r15, r16, r17 }
+	{ sh r25, r26 ; mulll_ss r5, r6, r7 ; add r15, r16, r17 }
+	{ sh r25, r26 ; mulll_ss r5, r6, r7 ; seq r15, r16, r17 }
+	{ sh r25, r26 ; mulll_uu r5, r6, r7 ; and r15, r16, r17 }
+	{ sh r25, r26 ; mulll_uu r5, r6, r7 ; shl r15, r16, r17 }
+	{ sh r25, r26 ; mullla_ss r5, r6, r7 ; fnop }
+	{ sh r25, r26 ; mullla_ss r5, r6, r7 ; shr r15, r16, r17 }
+	{ sh r25, r26 ; mullla_uu r5, r6, r7 ; info 19 }
+	{ sh r25, r26 ; mullla_uu r5, r6, r7 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; mvnz r5, r6, r7 ; move r15, r16 }
+	{ sh r25, r26 ; mvnz r5, r6, r7 ; slte r15, r16, r17 }
+	{ sh r25, r26 ; mvz r5, r6, r7 ; mz r15, r16, r17 }
+	{ sh r25, r26 ; mvz r5, r6, r7 ; slti r15, r16, 5 }
+	{ sh r25, r26 ; mz r15, r16, r17 ; movei r5, 5 }
+	{ sh r25, r26 ; mz r15, r16, r17 ; s1a r5, r6, r7 }
+	{ sh r25, r26 ; mz r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ sh r25, r26 ; mz r5, r6, r7 ; rl r15, r16, r17 }
+	{ sh r25, r26 ; mz r5, r6, r7 ; sub r15, r16, r17 }
+	{ sh r25, r26 ; nop ; move r15, r16 }
+	{ sh r25, r26 ; nop ; or r15, r16, r17 }
+	{ sh r25, r26 ; nop ; shl r5, r6, r7 }
+	{ sh r25, r26 ; nop ; sne r5, r6, r7 }
+	{ sh r25, r26 ; nor r15, r16, r17 ; clz r5, r6 }
+	{ sh r25, r26 ; nor r15, r16, r17 ; nor r5, r6, r7 }
+	{ sh r25, r26 ; nor r15, r16, r17 ; slti_u r5, r6, 5 }
+	{ sh r25, r26 ; nor r5, r6, r7 ; movei r15, 5 }
+	{ sh r25, r26 ; nor r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ sh r25, r26 ; or r15, r16, r17 ; move r5, r6 }
+	{ sh r25, r26 ; or r15, r16, r17 ; rli r5, r6, 5 }
+	{ sh r25, r26 ; or r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ sh r25, r26 ; or r5, r6, r7 ; ori r15, r16, 5 }
+	{ sh r25, r26 ; or r5, r6, r7 ; srai r15, r16, 5 }
+	{ sh r25, r26 ; ori r15, r16, 5 ; mulhha_uu r5, r6, r7 }
+	{ sh r25, r26 ; ori r15, r16, 5 ; seqi r5, r6, 5 }
+	{ sh r25, r26 ; ori r15, r16, 5 }
+	{ sh r25, r26 ; ori r5, r6, 5 ; s3a r15, r16, r17 }
+	{ sh r25, r26 ; pcnt r5, r6 ; addi r15, r16, 5 }
+	{ sh r25, r26 ; pcnt r5, r6 ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; rl r15, r16, r17 ; andi r5, r6, 5 }
+	{ sh r25, r26 ; rl r15, r16, r17 ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; rl r15, r16, r17 ; slte r5, r6, r7 }
+	{ sh r25, r26 ; rl r5, r6, r7 ; info 19 }
+	{ sh r25, r26 ; rl r5, r6, r7 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; rli r15, r16, 5 ; fnop }
+	{ sh r25, r26 ; rli r15, r16, 5 ; ori r5, r6, 5 }
+	{ sh r25, r26 ; rli r15, r16, 5 ; sra r5, r6, r7 }
+	{ sh r25, r26 ; rli r5, r6, 5 ; nop }
+	{ sh r25, r26 ; rli r5, r6, 5 ; slti_u r15, r16, 5 }
+	{ sh r25, r26 ; s1a r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ sh r25, r26 ; s1a r15, r16, r17 ; s2a r5, r6, r7 }
+	{ sh r25, r26 ; s1a r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sh r25, r26 ; s1a r5, r6, r7 ; rli r15, r16, 5 }
+	{ sh r25, r26 ; s1a r5, r6, r7 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; s2a r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ sh r25, r26 ; s2a r15, r16, r17 ; shli r5, r6, 5 }
+	{ sh r25, r26 ; s2a r5, r6, r7 ; addi r15, r16, 5 }
+	{ sh r25, r26 ; s2a r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; s3a r15, r16, r17 ; andi r5, r6, 5 }
+	{ sh r25, r26 ; s3a r15, r16, r17 ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; s3a r15, r16, r17 ; slte r5, r6, r7 }
+	{ sh r25, r26 ; s3a r5, r6, r7 ; info 19 }
+	{ sh r25, r26 ; s3a r5, r6, r7 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; seq r15, r16, r17 ; fnop }
+	{ sh r25, r26 ; seq r15, r16, r17 ; ori r5, r6, 5 }
+	{ sh r25, r26 ; seq r15, r16, r17 ; sra r5, r6, r7 }
+	{ sh r25, r26 ; seq r5, r6, r7 ; nop }
+	{ sh r25, r26 ; seq r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sh r25, r26 ; seqi r15, r16, 5 ; mulhh_ss r5, r6, r7 }
+	{ sh r25, r26 ; seqi r15, r16, 5 ; s2a r5, r6, r7 }
+	{ sh r25, r26 ; seqi r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ sh r25, r26 ; seqi r5, r6, 5 ; rli r15, r16, 5 }
+	{ sh r25, r26 ; seqi r5, r6, 5 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; shl r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ sh r25, r26 ; shl r15, r16, r17 ; shli r5, r6, 5 }
+	{ sh r25, r26 ; shl r5, r6, r7 ; addi r15, r16, 5 }
+	{ sh r25, r26 ; shl r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; shli r15, r16, 5 ; andi r5, r6, 5 }
+	{ sh r25, r26 ; shli r15, r16, 5 ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; shli r15, r16, 5 ; slte r5, r6, r7 }
+	{ sh r25, r26 ; shli r5, r6, 5 ; info 19 }
+	{ sh r25, r26 ; shli r5, r6, 5 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; shr r15, r16, r17 ; fnop }
+	{ sh r25, r26 ; shr r15, r16, r17 ; ori r5, r6, 5 }
+	{ sh r25, r26 ; shr r15, r16, r17 ; sra r5, r6, r7 }
+	{ sh r25, r26 ; shr r5, r6, r7 ; nop }
+	{ sh r25, r26 ; shr r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sh r25, r26 ; shri r15, r16, 5 ; mulhh_ss r5, r6, r7 }
+	{ sh r25, r26 ; shri r15, r16, 5 ; s2a r5, r6, r7 }
+	{ sh r25, r26 ; shri r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ sh r25, r26 ; shri r5, r6, 5 ; rli r15, r16, 5 }
+	{ sh r25, r26 ; shri r5, r6, 5 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; slt r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ sh r25, r26 ; slt r15, r16, r17 ; shli r5, r6, 5 }
+	{ sh r25, r26 ; slt r5, r6, r7 ; addi r15, r16, 5 }
+	{ sh r25, r26 ; slt r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; slt_u r15, r16, r17 ; andi r5, r6, 5 }
+	{ sh r25, r26 ; slt_u r15, r16, r17 ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; slt_u r15, r16, r17 ; slte r5, r6, r7 }
+	{ sh r25, r26 ; slt_u r5, r6, r7 ; info 19 }
+	{ sh r25, r26 ; slt_u r5, r6, r7 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; slte r15, r16, r17 ; fnop }
+	{ sh r25, r26 ; slte r15, r16, r17 ; ori r5, r6, 5 }
+	{ sh r25, r26 ; slte r15, r16, r17 ; sra r5, r6, r7 }
+	{ sh r25, r26 ; slte r5, r6, r7 ; nop }
+	{ sh r25, r26 ; slte r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sh r25, r26 ; slte_u r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ sh r25, r26 ; slte_u r15, r16, r17 ; s2a r5, r6, r7 }
+	{ sh r25, r26 ; slte_u r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sh r25, r26 ; slte_u r5, r6, r7 ; rli r15, r16, 5 }
+	{ sh r25, r26 ; slte_u r5, r6, r7 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; slti r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ sh r25, r26 ; slti r15, r16, 5 ; shli r5, r6, 5 }
+	{ sh r25, r26 ; slti r5, r6, 5 ; addi r15, r16, 5 }
+	{ sh r25, r26 ; slti r5, r6, 5 ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; slti_u r15, r16, 5 ; andi r5, r6, 5 }
+	{ sh r25, r26 ; slti_u r15, r16, 5 ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; slti_u r15, r16, 5 ; slte r5, r6, r7 }
+	{ sh r25, r26 ; slti_u r5, r6, 5 ; info 19 }
+	{ sh r25, r26 ; slti_u r5, r6, 5 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; sne r15, r16, r17 ; fnop }
+	{ sh r25, r26 ; sne r15, r16, r17 ; ori r5, r6, 5 }
+	{ sh r25, r26 ; sne r15, r16, r17 ; sra r5, r6, r7 }
+	{ sh r25, r26 ; sne r5, r6, r7 ; nop }
+	{ sh r25, r26 ; sne r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sh r25, r26 ; sra r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ sh r25, r26 ; sra r15, r16, r17 ; s2a r5, r6, r7 }
+	{ sh r25, r26 ; sra r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sh r25, r26 ; sra r5, r6, r7 ; rli r15, r16, 5 }
+	{ sh r25, r26 ; sra r5, r6, r7 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; srai r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ sh r25, r26 ; srai r15, r16, 5 ; shli r5, r6, 5 }
+	{ sh r25, r26 ; srai r5, r6, 5 ; addi r15, r16, 5 }
+	{ sh r25, r26 ; srai r5, r6, 5 ; seqi r15, r16, 5 }
+	{ sh r25, r26 ; sub r15, r16, r17 ; andi r5, r6, 5 }
+	{ sh r25, r26 ; sub r15, r16, r17 ; mvz r5, r6, r7 }
+	{ sh r25, r26 ; sub r15, r16, r17 ; slte r5, r6, r7 }
+	{ sh r25, r26 ; sub r5, r6, r7 ; info 19 }
+	{ sh r25, r26 ; sub r5, r6, r7 ; slt r15, r16, r17 }
+	{ sh r25, r26 ; tblidxb0 r5, r6 ; move r15, r16 }
+	{ sh r25, r26 ; tblidxb0 r5, r6 ; slte r15, r16, r17 }
+	{ sh r25, r26 ; tblidxb1 r5, r6 ; mz r15, r16, r17 }
+	{ sh r25, r26 ; tblidxb1 r5, r6 ; slti r15, r16, 5 }
+	{ sh r25, r26 ; tblidxb2 r5, r6 ; nor r15, r16, r17 }
+	{ sh r25, r26 ; tblidxb2 r5, r6 ; sne r15, r16, r17 }
+	{ sh r25, r26 ; tblidxb3 r5, r6 ; ori r15, r16, 5 }
+	{ sh r25, r26 ; tblidxb3 r5, r6 ; srai r15, r16, 5 }
+	{ sh r25, r26 ; xor r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ sh r25, r26 ; xor r15, r16, r17 ; seqi r5, r6, 5 }
+	{ sh r25, r26 ; xor r15, r16, r17 }
+	{ sh r25, r26 ; xor r5, r6, r7 ; s3a r15, r16, r17 }
+	{ shadd r15, r16, 5 ; addb r5, r6, r7 }
+	{ shadd r15, r16, 5 ; crc32_32 r5, r6, r7 }
+	{ shadd r15, r16, 5 ; mnz r5, r6, r7 }
+	{ shadd r15, r16, 5 ; mulhla_us r5, r6, r7 }
+	{ shadd r15, r16, 5 ; packhb r5, r6, r7 }
+	{ shadd r15, r16, 5 ; seqih r5, r6, 5 }
+	{ shadd r15, r16, 5 ; slteb_u r5, r6, r7 }
+	{ shadd r15, r16, 5 ; sub r5, r6, r7 }
+	{ shl r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ shl r15, r16, r17 ; adds r5, r6, r7 }
+	{ shl r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ shl r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ shl r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ shl r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ shl r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ shl r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ shl r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ shl r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ shl r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ shl r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ shl r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ shl r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ shl r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ shl r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shl r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ shl r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ shl r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ shl r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ shl r15, r16, r17 ; maxh r5, r6, r7 }
+	{ shl r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ shl r15, r16, r17 ; moveli r5, 0x1234 }
+	{ shl r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ shl r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ shl r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ shl r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ shl r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ shl r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ shl r15, r16, r17 ; nop ; lh r25, r26 }
+	{ shl r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ shl r15, r16, r17 ; packhs r5, r6, r7 }
+	{ shl r15, r16, r17 ; prefetch r25 ; fnop }
+	{ shl r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ shl r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ shl r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ shl r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ shl r15, r16, r17 ; sadah r5, r6, r7 }
+	{ shl r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shl r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ shl r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ shl r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ shl r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ shl r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ shl r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ shl r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ shl r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ shl r15, r16, r17 ; slt r5, r6, r7 }
+	{ shl r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ shl r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ shl r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ shl r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ shl r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ shl r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ shl r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ shl r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ shl r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ shl r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ shl r15, r16, r17 ; xor r5, r6, r7 }
+	{ shl r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ shl r5, r6, r7 ; and r15, r16, r17 }
+	{ shl r5, r6, r7 ; fnop ; prefetch r25 }
+	{ shl r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ shl r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ shl r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ shl r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ shl r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ shl r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ shl r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ shl r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ shl r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ shl r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ shl r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ shl r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ shl r5, r6, r7 ; mnz r15, r16, r17 }
+	{ shl r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ shl r5, r6, r7 ; nop ; lh r25, r26 }
+	{ shl r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ shl r5, r6, r7 ; packhs r15, r16, r17 }
+	{ shl r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ shl r5, r6, r7 ; prefetch r25 }
+	{ shl r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ shl r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ shl r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ shl r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ shl r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ shl r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ shl r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ shl r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ shl r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ shl r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ shl r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ shl r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ shl r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ shl r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ shl r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ shl r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ shl r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ shl r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ shlb r15, r16, r17 ; add r5, r6, r7 }
+	{ shlb r15, r16, r17 ; clz r5, r6 }
+	{ shlb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ shlb r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ shlb r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ shlb r15, r16, r17 ; seqib r5, r6, 5 }
+	{ shlb r15, r16, r17 ; slteb r5, r6, r7 }
+	{ shlb r15, r16, r17 ; sraih r5, r6, 5 }
+	{ shlb r5, r6, r7 ; addih r15, r16, 5 }
+	{ shlb r5, r6, r7 ; iret }
+	{ shlb r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ shlb r5, r6, r7 ; nop }
+	{ shlb r5, r6, r7 ; seqi r15, r16, 5 }
+	{ shlb r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ shlb r5, r6, r7 ; srah r15, r16, r17 }
+	{ shlh r15, r16, r17 ; addhs r5, r6, r7 }
+	{ shlh r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ shlh r15, r16, r17 ; move r5, r6 }
+	{ shlh r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ shlh r15, r16, r17 ; pcnt r5, r6 }
+	{ shlh r15, r16, r17 ; shlh r5, r6, r7 }
+	{ shlh r15, r16, r17 ; slth r5, r6, r7 }
+	{ shlh r15, r16, r17 ; subh r5, r6, r7 }
+	{ shlh r5, r6, r7 ; and r15, r16, r17 }
+	{ shlh r5, r6, r7 ; jrp r15 }
+	{ shlh r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ shlh r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ shlh r5, r6, r7 ; shadd r15, r16, 5 }
+	{ shlh r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ shlh r5, r6, r7 ; sub r15, r16, r17 }
+	{ shli r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+	{ shli r15, r16, 5 ; adds r5, r6, r7 }
+	{ shli r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ shli r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 }
+	{ shli r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 }
+	{ shli r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+	{ shli r15, r16, 5 ; lb r25, r26 ; clz r5, r6 }
+	{ shli r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ shli r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ shli r15, r16, 5 ; lb_u r25, r26 ; info 19 }
+	{ shli r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ shli r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ shli r15, r16, 5 ; lh r25, r26 ; movei r5, 5 }
+	{ shli r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ shli r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ shli r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shli r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ shli r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ shli r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ shli r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ shli r15, r16, 5 ; maxh r5, r6, r7 }
+	{ shli r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+	{ shli r15, r16, 5 ; moveli r5, 0x1234 }
+	{ shli r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ shli r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ shli r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ shli r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ shli r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ shli r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ shli r15, r16, 5 ; nop ; lh r25, r26 }
+	{ shli r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+	{ shli r15, r16, 5 ; packhs r5, r6, r7 }
+	{ shli r15, r16, 5 ; prefetch r25 ; fnop }
+	{ shli r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 }
+	{ shli r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 }
+	{ shli r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ shli r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ shli r15, r16, 5 ; sadah r5, r6, r7 }
+	{ shli r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shli r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ shli r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ shli r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ shli r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ shli r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ shli r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ shli r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+	{ shli r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ shli r15, r16, 5 ; slt r5, r6, r7 }
+	{ shli r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ shli r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ shli r15, r16, 5 ; sltib_u r5, r6, 5 }
+	{ shli r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+	{ shli r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ shli r15, r16, 5 ; sw r25, r26 ; clz r5, r6 }
+	{ shli r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ shli r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ shli r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ shli r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ shli r15, r16, 5 ; xor r5, r6, r7 }
+	{ shli r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ shli r5, r6, 5 ; and r15, r16, r17 }
+	{ shli r5, r6, 5 ; fnop ; prefetch r25 }
+	{ shli r5, r6, 5 ; info 19 ; lw r25, r26 }
+	{ shli r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 }
+	{ shli r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ shli r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ shli r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 }
+	{ shli r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ shli r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ shli r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ shli r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ shli r5, r6, 5 ; maxb_u r15, r16, r17 }
+	{ shli r5, r6, 5 ; mnz r15, r16, r17 }
+	{ shli r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+	{ shli r5, r6, 5 ; nop ; lh r25, r26 }
+	{ shli r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+	{ shli r5, r6, 5 ; packhs r15, r16, r17 }
+	{ shli r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ shli r5, r6, 5 ; prefetch r25 }
+	{ shli r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ shli r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ shli r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ shli r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ shli r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ shli r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ shli r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ shli r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ shli r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ shli r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ shli r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ shli r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ shli r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ shli r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ shli r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ shli r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ shli r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ shli r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ shlib r15, r16, 5 ; add r5, r6, r7 }
+	{ shlib r15, r16, 5 ; clz r5, r6 }
+	{ shlib r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+	{ shlib r15, r16, 5 ; mulhla_su r5, r6, r7 }
+	{ shlib r15, r16, 5 ; packbs_u r5, r6, r7 }
+	{ shlib r15, r16, 5 ; seqib r5, r6, 5 }
+	{ shlib r15, r16, 5 ; slteb r5, r6, r7 }
+	{ shlib r15, r16, 5 ; sraih r5, r6, 5 }
+	{ shlib r5, r6, 5 ; addih r15, r16, 5 }
+	{ shlib r5, r6, 5 ; iret }
+	{ shlib r5, r6, 5 ; maxib_u r15, r16, 5 }
+	{ shlib r5, r6, 5 ; nop }
+	{ shlib r5, r6, 5 ; seqi r15, r16, 5 }
+	{ shlib r5, r6, 5 ; sltb_u r15, r16, r17 }
+	{ shlib r5, r6, 5 ; srah r15, r16, r17 }
+	{ shlih r15, r16, 5 ; addhs r5, r6, r7 }
+	{ shlih r15, r16, 5 ; dword_align r5, r6, r7 }
+	{ shlih r15, r16, 5 ; move r5, r6 }
+	{ shlih r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ shlih r15, r16, 5 ; pcnt r5, r6 }
+	{ shlih r15, r16, 5 ; shlh r5, r6, r7 }
+	{ shlih r15, r16, 5 ; slth r5, r6, r7 }
+	{ shlih r15, r16, 5 ; subh r5, r6, r7 }
+	{ shlih r5, r6, 5 ; and r15, r16, r17 }
+	{ shlih r5, r6, 5 ; jrp r15 }
+	{ shlih r5, r6, 5 ; minb_u r15, r16, r17 }
+	{ shlih r5, r6, 5 ; packbs_u r15, r16, r17 }
+	{ shlih r5, r6, 5 ; shadd r15, r16, 5 }
+	{ shlih r5, r6, 5 ; slteb_u r15, r16, r17 }
+	{ shlih r5, r6, 5 ; sub r15, r16, r17 }
+	{ shr r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ shr r15, r16, r17 ; adds r5, r6, r7 }
+	{ shr r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ shr r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ shr r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ shr r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ shr r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ shr r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ shr r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ shr r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ shr r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ shr r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ shr r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ shr r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ shr r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ shr r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shr r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ shr r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ shr r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ shr r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ shr r15, r16, r17 ; maxh r5, r6, r7 }
+	{ shr r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ shr r15, r16, r17 ; moveli r5, 0x1234 }
+	{ shr r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ shr r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ shr r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ shr r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ shr r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ shr r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ shr r15, r16, r17 ; nop ; lh r25, r26 }
+	{ shr r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ shr r15, r16, r17 ; packhs r5, r6, r7 }
+	{ shr r15, r16, r17 ; prefetch r25 ; fnop }
+	{ shr r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ shr r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ shr r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ shr r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ shr r15, r16, r17 ; sadah r5, r6, r7 }
+	{ shr r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shr r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ shr r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ shr r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ shr r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ shr r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ shr r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ shr r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ shr r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ shr r15, r16, r17 ; slt r5, r6, r7 }
+	{ shr r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ shr r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ shr r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ shr r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ shr r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ shr r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ shr r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ shr r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ shr r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ shr r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ shr r15, r16, r17 ; xor r5, r6, r7 }
+	{ shr r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ shr r5, r6, r7 ; and r15, r16, r17 }
+	{ shr r5, r6, r7 ; fnop ; prefetch r25 }
+	{ shr r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ shr r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ shr r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ shr r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ shr r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ shr r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ shr r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ shr r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ shr r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ shr r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ shr r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ shr r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ shr r5, r6, r7 ; mnz r15, r16, r17 }
+	{ shr r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ shr r5, r6, r7 ; nop ; lh r25, r26 }
+	{ shr r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ shr r5, r6, r7 ; packhs r15, r16, r17 }
+	{ shr r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ shr r5, r6, r7 ; prefetch r25 }
+	{ shr r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ shr r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ shr r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ shr r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ shr r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ shr r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ shr r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ shr r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ shr r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ shr r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ shr r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ shr r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ shr r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ shr r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ shr r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ shr r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ shr r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ shr r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ shrb r15, r16, r17 ; add r5, r6, r7 }
+	{ shrb r15, r16, r17 ; clz r5, r6 }
+	{ shrb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ shrb r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ shrb r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ shrb r15, r16, r17 ; seqib r5, r6, 5 }
+	{ shrb r15, r16, r17 ; slteb r5, r6, r7 }
+	{ shrb r15, r16, r17 ; sraih r5, r6, 5 }
+	{ shrb r5, r6, r7 ; addih r15, r16, 5 }
+	{ shrb r5, r6, r7 ; iret }
+	{ shrb r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ shrb r5, r6, r7 ; nop }
+	{ shrb r5, r6, r7 ; seqi r15, r16, 5 }
+	{ shrb r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ shrb r5, r6, r7 ; srah r15, r16, r17 }
+	{ shrh r15, r16, r17 ; addhs r5, r6, r7 }
+	{ shrh r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ shrh r15, r16, r17 ; move r5, r6 }
+	{ shrh r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ shrh r15, r16, r17 ; pcnt r5, r6 }
+	{ shrh r15, r16, r17 ; shlh r5, r6, r7 }
+	{ shrh r15, r16, r17 ; slth r5, r6, r7 }
+	{ shrh r15, r16, r17 ; subh r5, r6, r7 }
+	{ shrh r5, r6, r7 ; and r15, r16, r17 }
+	{ shrh r5, r6, r7 ; jrp r15 }
+	{ shrh r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ shrh r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ shrh r5, r6, r7 ; shadd r15, r16, 5 }
+	{ shrh r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ shrh r5, r6, r7 ; sub r15, r16, r17 }
+	{ shri r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+	{ shri r15, r16, 5 ; adds r5, r6, r7 }
+	{ shri r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ shri r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 }
+	{ shri r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 }
+	{ shri r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+	{ shri r15, r16, 5 ; lb r25, r26 ; clz r5, r6 }
+	{ shri r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ shri r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ shri r15, r16, 5 ; lb_u r25, r26 ; info 19 }
+	{ shri r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ shri r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ shri r15, r16, 5 ; lh r25, r26 ; movei r5, 5 }
+	{ shri r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ shri r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ shri r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shri r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ shri r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ shri r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ shri r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ shri r15, r16, 5 ; maxh r5, r6, r7 }
+	{ shri r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+	{ shri r15, r16, 5 ; moveli r5, 0x1234 }
+	{ shri r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ shri r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ shri r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ shri r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ shri r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ shri r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ shri r15, r16, 5 ; nop ; lh r25, r26 }
+	{ shri r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+	{ shri r15, r16, 5 ; packhs r5, r6, r7 }
+	{ shri r15, r16, 5 ; prefetch r25 ; fnop }
+	{ shri r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 }
+	{ shri r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 }
+	{ shri r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ shri r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ shri r15, r16, 5 ; sadah r5, r6, r7 }
+	{ shri r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ shri r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ shri r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ shri r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ shri r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ shri r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ shri r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ shri r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+	{ shri r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ shri r15, r16, 5 ; slt r5, r6, r7 }
+	{ shri r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ shri r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ shri r15, r16, 5 ; sltib_u r5, r6, 5 }
+	{ shri r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+	{ shri r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ shri r15, r16, 5 ; sw r25, r26 ; clz r5, r6 }
+	{ shri r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ shri r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ shri r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ shri r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ shri r15, r16, 5 ; xor r5, r6, r7 }
+	{ shri r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ shri r5, r6, 5 ; and r15, r16, r17 }
+	{ shri r5, r6, 5 ; fnop ; prefetch r25 }
+	{ shri r5, r6, 5 ; info 19 ; lw r25, r26 }
+	{ shri r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 }
+	{ shri r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ shri r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ shri r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ shri r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 }
+	{ shri r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ shri r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ shri r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ shri r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ shri r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ shri r5, r6, 5 ; maxb_u r15, r16, r17 }
+	{ shri r5, r6, 5 ; mnz r15, r16, r17 }
+	{ shri r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+	{ shri r5, r6, 5 ; nop ; lh r25, r26 }
+	{ shri r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+	{ shri r5, r6, 5 ; packhs r15, r16, r17 }
+	{ shri r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ shri r5, r6, 5 ; prefetch r25 }
+	{ shri r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ shri r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ shri r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ shri r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ shri r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ shri r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ shri r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ shri r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ shri r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ shri r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ shri r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ shri r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ shri r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ shri r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ shri r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ shri r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ shri r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ shri r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ shrib r15, r16, 5 ; add r5, r6, r7 }
+	{ shrib r15, r16, 5 ; clz r5, r6 }
+	{ shrib r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+	{ shrib r15, r16, 5 ; mulhla_su r5, r6, r7 }
+	{ shrib r15, r16, 5 ; packbs_u r5, r6, r7 }
+	{ shrib r15, r16, 5 ; seqib r5, r6, 5 }
+	{ shrib r15, r16, 5 ; slteb r5, r6, r7 }
+	{ shrib r15, r16, 5 ; sraih r5, r6, 5 }
+	{ shrib r5, r6, 5 ; addih r15, r16, 5 }
+	{ shrib r5, r6, 5 ; iret }
+	{ shrib r5, r6, 5 ; maxib_u r15, r16, 5 }
+	{ shrib r5, r6, 5 ; nop }
+	{ shrib r5, r6, 5 ; seqi r15, r16, 5 }
+	{ shrib r5, r6, 5 ; sltb_u r15, r16, r17 }
+	{ shrib r5, r6, 5 ; srah r15, r16, r17 }
+	{ shrih r15, r16, 5 ; addhs r5, r6, r7 }
+	{ shrih r15, r16, 5 ; dword_align r5, r6, r7 }
+	{ shrih r15, r16, 5 ; move r5, r6 }
+	{ shrih r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ shrih r15, r16, 5 ; pcnt r5, r6 }
+	{ shrih r15, r16, 5 ; shlh r5, r6, r7 }
+	{ shrih r15, r16, 5 ; slth r5, r6, r7 }
+	{ shrih r15, r16, 5 ; subh r5, r6, r7 }
+	{ shrih r5, r6, 5 ; and r15, r16, r17 }
+	{ shrih r5, r6, 5 ; jrp r15 }
+	{ shrih r5, r6, 5 ; minb_u r15, r16, r17 }
+	{ shrih r5, r6, 5 ; packbs_u r15, r16, r17 }
+	{ shrih r5, r6, 5 ; shadd r15, r16, 5 }
+	{ shrih r5, r6, 5 ; slteb_u r15, r16, r17 }
+	{ shrih r5, r6, 5 ; sub r15, r16, r17 }
+	{ slt r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ slt r15, r16, r17 ; adds r5, r6, r7 }
+	{ slt r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ slt r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ slt r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ slt r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ slt r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ slt r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ slt r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ slt r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ slt r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ slt r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ slt r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ slt r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ slt r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ slt r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ slt r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ slt r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ slt r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slt r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ slt r15, r16, r17 ; maxh r5, r6, r7 }
+	{ slt r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ slt r15, r16, r17 ; moveli r5, 0x1234 }
+	{ slt r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ slt r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ slt r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ slt r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ slt r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ slt r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ slt r15, r16, r17 ; nop ; lh r25, r26 }
+	{ slt r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ slt r15, r16, r17 ; packhs r5, r6, r7 }
+	{ slt r15, r16, r17 ; prefetch r25 ; fnop }
+	{ slt r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ slt r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ slt r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ slt r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ slt r15, r16, r17 ; sadah r5, r6, r7 }
+	{ slt r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ slt r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ slt r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ slt r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ slt r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ slt r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ slt r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ slt r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ slt r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ slt r15, r16, r17 ; slt r5, r6, r7 }
+	{ slt r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ slt r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ slt r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ slt r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ slt r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ slt r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ slt r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ slt r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ slt r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ slt r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ slt r15, r16, r17 ; xor r5, r6, r7 }
+	{ slt r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ slt r5, r6, r7 ; and r15, r16, r17 }
+	{ slt r5, r6, r7 ; fnop ; prefetch r25 }
+	{ slt r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ slt r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ slt r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ slt r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ slt r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ slt r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ slt r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ slt r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ slt r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ slt r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ slt r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ slt r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ slt r5, r6, r7 ; mnz r15, r16, r17 }
+	{ slt r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ slt r5, r6, r7 ; nop ; lh r25, r26 }
+	{ slt r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ slt r5, r6, r7 ; packhs r15, r16, r17 }
+	{ slt r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ slt r5, r6, r7 ; prefetch r25 }
+	{ slt r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ slt r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ slt r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ slt r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ slt r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ slt r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ slt r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ slt r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ slt r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ slt r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ slt r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ slt r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ slt r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ slt r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ slt r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ slt r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ slt r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ slt r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ slt_u r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 }
+	{ slt_u r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 }
+	{ slt_u r15, r16, r17 ; and r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; bitx r5, r6 ; sb r25, r26 }
+	{ slt_u r15, r16, r17 ; clz r5, r6 ; sb r25, r26 }
+	{ slt_u r15, r16, r17 ; fnop ; lh_u r25, r26 }
+	{ slt_u r15, r16, r17 ; intlb r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lb r25, r26 ; shli r5, r6, 5 }
+	{ slt_u r15, r16, r17 ; lb_u r25, r26 ; addi r5, r6, 5 }
+	{ slt_u r15, r16, r17 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lb_u r25, r26 ; slt r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lh r25, r26 ; bitx r5, r6 }
+	{ slt_u r15, r16, r17 ; lh r25, r26 ; mz r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lh r25, r26 ; slte_u r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lh_u r25, r26 ; ctz r5, r6 }
+	{ slt_u r15, r16, r17 ; lh_u r25, r26 ; or r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lh_u r25, r26 ; sne r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lw r25, r26 ; mnz r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lw r25, r26 ; rl r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; lw r25, r26 ; sub r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+	{ slt_u r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+	{ slt_u r15, r16, r17 ; mulhh_su r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; mulhla_uu r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; mullla_ss r5, r6, r7 ; sw r25, r26 }
+	{ slt_u r15, r16, r17 ; mvnz r5, r6, r7 ; sb r25, r26 }
+	{ slt_u r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+	{ slt_u r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 }
+	{ slt_u r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 }
+	{ slt_u r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; prefetch r25 ; mullla_ss r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; prefetch r25 ; shri r5, r6, 5 }
+	{ slt_u r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 }
+	{ slt_u r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+	{ slt_u r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+	{ slt_u r15, r16, r17 ; sb r25, r26 ; ctz r5, r6 }
+	{ slt_u r15, r16, r17 ; sb r25, r26 ; or r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; sb r25, r26 ; sne r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; seqb r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; sh r25, r26 ; clz r5, r6 }
+	{ slt_u r15, r16, r17 ; sh r25, r26 ; nor r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; sh r25, r26 ; slti_u r5, r6, 5 }
+	{ slt_u r15, r16, r17 ; shl r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 }
+	{ slt_u r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+	{ slt_u r15, r16, r17 ; sltb_u r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+	{ slt_u r15, r16, r17 ; sne r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 }
+	{ slt_u r15, r16, r17 ; subhs r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; sw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slt_u r15, r16, r17 ; sw r25, r26 ; shli r5, r6, 5 }
+	{ slt_u r15, r16, r17 ; tblidxb0 r5, r6 ; lb_u r25, r26 }
+	{ slt_u r15, r16, r17 ; tblidxb2 r5, r6 ; lb_u r25, r26 }
+	{ slt_u r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 }
+	{ slt_u r5, r6, r7 ; addb r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+	{ slt_u r5, r6, r7 ; dtlbpr r15 }
+	{ slt_u r5, r6, r7 ; ill ; sb r25, r26 }
+	{ slt_u r5, r6, r7 ; iret }
+	{ slt_u r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 }
+	{ slt_u r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 }
+	{ slt_u r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 }
+	{ slt_u r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 }
+	{ slt_u r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+	{ slt_u r5, r6, r7 ; move r15, r16 }
+	{ slt_u r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+	{ slt_u r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+	{ slt_u r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+	{ slt_u r5, r6, r7 ; prefetch r25 ; movei r15, 5 }
+	{ slt_u r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+	{ slt_u r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+	{ slt_u r5, r6, r7 ; sb r15, r16 }
+	{ slt_u r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+	{ slt_u r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+	{ slt_u r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ slt_u r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+	{ slt_u r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+	{ slt_u r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+	{ slt_u r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+	{ slt_u r5, r6, r7 ; sltib r15, r16, 5 }
+	{ slt_u r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ slt_u r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+	{ slt_u r5, r6, r7 ; sw r25, r26 ; fnop }
+	{ slt_u r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 }
+	{ slt_u r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+	{ sltb r15, r16, r17 ; adiffh r5, r6, r7 }
+	{ sltb r15, r16, r17 ; maxb_u r5, r6, r7 }
+	{ sltb r15, r16, r17 ; mulhha_su r5, r6, r7 }
+	{ sltb r15, r16, r17 ; mvz r5, r6, r7 }
+	{ sltb r15, r16, r17 ; sadah_u r5, r6, r7 }
+	{ sltb r15, r16, r17 ; shrib r5, r6, 5 }
+	{ sltb r15, r16, r17 ; sne r5, r6, r7 }
+	{ sltb r15, r16, r17 ; xori r5, r6, 5 }
+	{ sltb r5, r6, r7 ; ill }
+	{ sltb r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ sltb r5, r6, r7 ; move r15, r16 }
+	{ sltb r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sltb r5, r6, r7 ; shrb r15, r16, r17 }
+	{ sltb r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ sltb r5, r6, r7 ; tns r15, r16 }
+	{ sltb_u r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ sltb_u r15, r16, r17 ; minb_u r5, r6, r7 }
+	{ sltb_u r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ sltb_u r15, r16, r17 ; nop }
+	{ sltb_u r15, r16, r17 ; seq r5, r6, r7 }
+	{ sltb_u r15, r16, r17 ; sltb r5, r6, r7 }
+	{ sltb_u r15, r16, r17 ; srab r5, r6, r7 }
+	{ sltb_u r5, r6, r7 ; addh r15, r16, r17 }
+	{ sltb_u r5, r6, r7 ; inthh r15, r16, r17 }
+	{ sltb_u r5, r6, r7 ; lwadd r15, r16, 5 }
+	{ sltb_u r5, r6, r7 ; mtspr 0x5, r16 }
+	{ sltb_u r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ sltb_u r5, r6, r7 ; shrih r15, r16, 5 }
+	{ sltb_u r5, r6, r7 ; sneb r15, r16, r17 }
+	{ slte r15, r16, r17 ; add r5, r6, r7 ; lb r25, r26 }
+	{ slte r15, r16, r17 ; addi r5, r6, 5 ; sb r25, r26 }
+	{ slte r15, r16, r17 ; and r5, r6, r7 }
+	{ slte r15, r16, r17 ; bitx r5, r6 ; sb r25, r26 }
+	{ slte r15, r16, r17 ; clz r5, r6 ; sb r25, r26 }
+	{ slte r15, r16, r17 ; fnop ; lh_u r25, r26 }
+	{ slte r15, r16, r17 ; intlb r5, r6, r7 }
+	{ slte r15, r16, r17 ; lb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slte r15, r16, r17 ; lb r25, r26 ; shli r5, r6, 5 }
+	{ slte r15, r16, r17 ; lb_u r25, r26 ; addi r5, r6, 5 }
+	{ slte r15, r16, r17 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ slte r15, r16, r17 ; lb_u r25, r26 ; slt r5, r6, r7 }
+	{ slte r15, r16, r17 ; lh r25, r26 ; bitx r5, r6 }
+	{ slte r15, r16, r17 ; lh r25, r26 ; mz r5, r6, r7 }
+	{ slte r15, r16, r17 ; lh r25, r26 ; slte_u r5, r6, r7 }
+	{ slte r15, r16, r17 ; lh_u r25, r26 ; ctz r5, r6 }
+	{ slte r15, r16, r17 ; lh_u r25, r26 ; or r5, r6, r7 }
+	{ slte r15, r16, r17 ; lh_u r25, r26 ; sne r5, r6, r7 }
+	{ slte r15, r16, r17 ; lw r25, r26 ; mnz r5, r6, r7 }
+	{ slte r15, r16, r17 ; lw r25, r26 ; rl r5, r6, r7 }
+	{ slte r15, r16, r17 ; lw r25, r26 ; sub r5, r6, r7 }
+	{ slte r15, r16, r17 ; mnz r5, r6, r7 ; lw r25, r26 }
+	{ slte r15, r16, r17 ; movei r5, 5 ; lh r25, r26 }
+	{ slte r15, r16, r17 ; mulhh_su r5, r6, r7 }
+	{ slte r15, r16, r17 ; mulhha_ss r5, r6, r7 }
+	{ slte r15, r16, r17 ; mulhla_uu r5, r6, r7 }
+	{ slte r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ slte r15, r16, r17 ; mullla_ss r5, r6, r7 ; sw r25, r26 }
+	{ slte r15, r16, r17 ; mvnz r5, r6, r7 ; sb r25, r26 }
+	{ slte r15, r16, r17 ; mz r5, r6, r7 ; sb r25, r26 }
+	{ slte r15, r16, r17 ; nor r5, r6, r7 ; lw r25, r26 }
+	{ slte r15, r16, r17 ; ori r5, r6, 5 ; lw r25, r26 }
+	{ slte r15, r16, r17 ; prefetch r25 ; add r5, r6, r7 }
+	{ slte r15, r16, r17 ; prefetch r25 ; mullla_ss r5, r6, r7 }
+	{ slte r15, r16, r17 ; prefetch r25 ; shri r5, r6, 5 }
+	{ slte r15, r16, r17 ; rl r5, r6, r7 ; lh_u r25, r26 }
+	{ slte r15, r16, r17 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+	{ slte r15, r16, r17 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+	{ slte r15, r16, r17 ; sb r25, r26 ; ctz r5, r6 }
+	{ slte r15, r16, r17 ; sb r25, r26 ; or r5, r6, r7 }
+	{ slte r15, r16, r17 ; sb r25, r26 ; sne r5, r6, r7 }
+	{ slte r15, r16, r17 ; seqb r5, r6, r7 }
+	{ slte r15, r16, r17 ; sh r25, r26 ; clz r5, r6 }
+	{ slte r15, r16, r17 ; sh r25, r26 ; nor r5, r6, r7 }
+	{ slte r15, r16, r17 ; sh r25, r26 ; slti_u r5, r6, 5 }
+	{ slte r15, r16, r17 ; shl r5, r6, r7 }
+	{ slte r15, r16, r17 ; shr r5, r6, r7 ; prefetch r25 }
+	{ slte r15, r16, r17 ; slt r5, r6, r7 ; lb_u r25, r26 }
+	{ slte r15, r16, r17 ; sltb_u r5, r6, r7 }
+	{ slte r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ slte r15, r16, r17 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+	{ slte r15, r16, r17 ; sne r5, r6, r7 }
+	{ slte r15, r16, r17 ; srai r5, r6, 5 ; prefetch r25 }
+	{ slte r15, r16, r17 ; subhs r5, r6, r7 }
+	{ slte r15, r16, r17 ; sw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slte r15, r16, r17 ; sw r25, r26 ; shli r5, r6, 5 }
+	{ slte r15, r16, r17 ; tblidxb0 r5, r6 ; lb_u r25, r26 }
+	{ slte r15, r16, r17 ; tblidxb2 r5, r6 ; lb_u r25, r26 }
+	{ slte r15, r16, r17 ; xor r5, r6, r7 ; lb_u r25, r26 }
+	{ slte r5, r6, r7 ; addb r15, r16, r17 }
+	{ slte r5, r6, r7 ; and r15, r16, r17 ; lb_u r25, r26 }
+	{ slte r5, r6, r7 ; dtlbpr r15 }
+	{ slte r5, r6, r7 ; ill ; sb r25, r26 }
+	{ slte r5, r6, r7 ; iret }
+	{ slte r5, r6, r7 ; lb r25, r26 ; ori r15, r16, 5 }
+	{ slte r5, r6, r7 ; lb r25, r26 ; srai r15, r16, 5 }
+	{ slte r5, r6, r7 ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ slte r5, r6, r7 ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ slte r5, r6, r7 ; lh r25, r26 ; ori r15, r16, 5 }
+	{ slte r5, r6, r7 ; lh r25, r26 ; srai r15, r16, 5 }
+	{ slte r5, r6, r7 ; lh_u r25, r26 ; rl r15, r16, r17 }
+	{ slte r5, r6, r7 ; lh_u r25, r26 ; sub r15, r16, r17 }
+	{ slte r5, r6, r7 ; lw r25, r26 ; or r15, r16, r17 }
+	{ slte r5, r6, r7 ; lw r25, r26 ; sra r15, r16, r17 }
+	{ slte r5, r6, r7 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+	{ slte r5, r6, r7 ; move r15, r16 }
+	{ slte r5, r6, r7 ; mz r15, r16, r17 ; sb r25, r26 }
+	{ slte r5, r6, r7 ; nor r15, r16, r17 ; lw r25, r26 }
+	{ slte r5, r6, r7 ; ori r15, r16, 5 ; lw r25, r26 }
+	{ slte r5, r6, r7 ; prefetch r25 ; movei r15, 5 }
+	{ slte r5, r6, r7 ; prefetch r25 ; slte_u r15, r16, r17 }
+	{ slte r5, r6, r7 ; rli r15, r16, 5 ; lb r25, r26 }
+	{ slte r5, r6, r7 ; s2a r15, r16, r17 ; lb r25, r26 }
+	{ slte r5, r6, r7 ; sb r15, r16 }
+	{ slte r5, r6, r7 ; sb r25, r26 ; s3a r15, r16, r17 }
+	{ slte r5, r6, r7 ; seq r15, r16, r17 ; lb r25, r26 }
+	{ slte r5, r6, r7 ; seqi r15, r16, 5 ; sw r25, r26 }
+	{ slte r5, r6, r7 ; sh r25, r26 ; rl r15, r16, r17 }
+	{ slte r5, r6, r7 ; sh r25, r26 ; sub r15, r16, r17 }
+	{ slte r5, r6, r7 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ slte r5, r6, r7 ; shri r15, r16, 5 ; lb r25, r26 }
+	{ slte r5, r6, r7 ; slt r15, r16, r17 ; sw r25, r26 }
+	{ slte r5, r6, r7 ; slte r15, r16, r17 ; sb r25, r26 }
+	{ slte r5, r6, r7 ; slti r15, r16, 5 ; lb r25, r26 }
+	{ slte r5, r6, r7 ; sltib r15, r16, 5 }
+	{ slte r5, r6, r7 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ slte r5, r6, r7 ; sub r15, r16, r17 ; lb r25, r26 }
+	{ slte r5, r6, r7 ; sw r25, r26 ; fnop }
+	{ slte r5, r6, r7 ; sw r25, r26 ; shr r15, r16, r17 }
+	{ slte r5, r6, r7 ; xor r15, r16, r17 ; lh_u r25, r26 }
+	{ slte_u r15, r16, r17 ; addh r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; and r5, r6, r7 ; lb_u r25, r26 }
+	{ slte_u r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; bytex r5, r6 ; sw r25, r26 }
+	{ slte_u r15, r16, r17 ; ctz r5, r6 ; sb r25, r26 }
+	{ slte_u r15, r16, r17 ; info 19 ; prefetch r25 }
+	{ slte_u r15, r16, r17 ; lb r25, r26 ; mnz r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lb r25, r26 ; rl r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lb r25, r26 ; sub r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lb_u r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lb_u r25, r26 ; s2a r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lb_u r25, r26 ; tblidxb2 r5, r6 }
+	{ slte_u r15, r16, r17 ; lh r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lh r25, r26 ; seqi r5, r6, 5 }
+	{ slte_u r15, r16, r17 ; lh r25, r26 }
+	{ slte_u r15, r16, r17 ; lh_u r25, r26 ; mulll_uu r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lh_u r25, r26 ; shr r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lw r25, r26 ; and r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lw r25, r26 ; mvnz r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; lw r25, r26 ; slt_u r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; minh r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; move r5, r6 ; lw r25, r26 }
+	{ slte_u r15, r16, r17 ; mulhh_ss r5, r6, r7 ; lh r25, r26 }
+	{ slte_u r15, r16, r17 ; mulhha_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ slte_u r15, r16, r17 ; mulhhsa_uu r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; mulll_ss r5, r6, r7 ; lb_u r25, r26 }
+	{ slte_u r15, r16, r17 ; mullla_ss r5, r6, r7 ; lb r25, r26 }
+	{ slte_u r15, r16, r17 ; mullla_uu r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; mvz r5, r6, r7 ; sw r25, r26 }
+	{ slte_u r15, r16, r17 ; nop ; sb r25, r26 }
+	{ slte_u r15, r16, r17 ; or r5, r6, r7 ; sb r25, r26 }
+	{ slte_u r15, r16, r17 ; pcnt r5, r6 ; lh r25, r26 }
+	{ slte_u r15, r16, r17 ; prefetch r25 ; movei r5, 5 }
+	{ slte_u r15, r16, r17 ; prefetch r25 ; s1a r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; prefetch r25 ; tblidxb1 r5, r6 }
+	{ slte_u r15, r16, r17 ; rli r5, r6, 5 ; prefetch r25 }
+	{ slte_u r15, r16, r17 ; s2a r5, r6, r7 ; prefetch r25 }
+	{ slte_u r15, r16, r17 ; sadh_u r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; sb r25, r26 ; mulll_uu r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; sb r25, r26 ; shr r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; seq r5, r6, r7 ; lh r25, r26 }
+	{ slte_u r15, r16, r17 ; seqib r5, r6, 5 }
+	{ slte_u r15, r16, r17 ; sh r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; sh r25, r26 ; shli r5, r6, 5 }
+	{ slte_u r15, r16, r17 ; shl r5, r6, r7 ; lb_u r25, r26 }
+	{ slte_u r15, r16, r17 ; shli r5, r6, 5 }
+	{ slte_u r15, r16, r17 ; shri r5, r6, 5 ; prefetch r25 }
+	{ slte_u r15, r16, r17 ; slt_u r5, r6, r7 ; lh_u r25, r26 }
+	{ slte_u r15, r16, r17 ; slte_u r5, r6, r7 ; lb_u r25, r26 }
+	{ slte_u r15, r16, r17 ; slti r5, r6, 5 ; prefetch r25 }
+	{ slte_u r15, r16, r17 ; sne r5, r6, r7 ; lb_u r25, r26 }
+	{ slte_u r15, r16, r17 ; sra r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; sub r5, r6, r7 ; prefetch r25 }
+	{ slte_u r15, r16, r17 ; sw r25, r26 ; mnz r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; sw r25, r26 ; rl r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; sw r25, r26 ; sub r5, r6, r7 }
+	{ slte_u r15, r16, r17 ; tblidxb1 r5, r6 ; lh_u r25, r26 }
+	{ slte_u r15, r16, r17 ; tblidxb3 r5, r6 ; lh_u r25, r26 }
+	{ slte_u r5, r6, r7 ; add r15, r16, r17 ; lh r25, r26 }
+	{ slte_u r5, r6, r7 ; addi r15, r16, 5 ; sw r25, r26 }
+	{ slte_u r5, r6, r7 ; andi r15, r16, 5 ; lh_u r25, r26 }
+	{ slte_u r5, r6, r7 ; fnop }
+	{ slte_u r5, r6, r7 ; info 19 ; sw r25, r26 }
+	{ slte_u r5, r6, r7 ; lb r25, r26 ; info 19 }
+	{ slte_u r5, r6, r7 ; lb r25, r26 ; slt r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; lb_u r25, r26 ; mnz r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; lb_u r25, r26 ; slt_u r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; lh r25, r26 ; info 19 }
+	{ slte_u r5, r6, r7 ; lh r25, r26 ; slt r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; lh_u r25, r26 ; mnz r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; lh_u r25, r26 ; slt_u r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; lw r25, r26 ; ill }
+	{ slte_u r5, r6, r7 ; lw r25, r26 ; shri r15, r16, 5 }
+	{ slte_u r5, r6, r7 ; mf }
+	{ slte_u r5, r6, r7 ; move r15, r16 ; lb_u r25, r26 }
+	{ slte_u r5, r6, r7 ; movelis r15, 0x1234 }
+	{ slte_u r5, r6, r7 ; nop ; sb r25, r26 }
+	{ slte_u r5, r6, r7 ; or r15, r16, r17 ; sb r25, r26 }
+	{ slte_u r5, r6, r7 ; prefetch r25 ; addi r15, r16, 5 }
+	{ slte_u r5, r6, r7 ; prefetch r25 ; seqi r15, r16, 5 }
+	{ slte_u r5, r6, r7 ; rl r15, r16, r17 ; lh r25, r26 }
+	{ slte_u r5, r6, r7 ; s1a r15, r16, r17 ; lh r25, r26 }
+	{ slte_u r5, r6, r7 ; s3a r15, r16, r17 ; lh r25, r26 }
+	{ slte_u r5, r6, r7 ; sb r25, r26 ; nop }
+	{ slte_u r5, r6, r7 ; sb r25, r26 ; slti_u r15, r16, 5 }
+	{ slte_u r5, r6, r7 ; seqi r15, r16, 5 ; lb r25, r26 }
+	{ slte_u r5, r6, r7 ; sh r25, r26 ; mnz r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; sh r25, r26 ; slt_u r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; shl r15, r16, r17 ; sw r25, r26 }
+	{ slte_u r5, r6, r7 ; shr r15, r16, r17 ; lw r25, r26 }
+	{ slte_u r5, r6, r7 ; slt r15, r16, r17 ; lb r25, r26 }
+	{ slte_u r5, r6, r7 ; sltb r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; slte_u r15, r16, r17 ; sw r25, r26 }
+	{ slte_u r5, r6, r7 ; slti_u r15, r16, 5 ; lh r25, r26 }
+	{ slte_u r5, r6, r7 ; sne r15, r16, r17 ; sw r25, r26 }
+	{ slte_u r5, r6, r7 ; srai r15, r16, 5 ; lw r25, r26 }
+	{ slte_u r5, r6, r7 ; subh r15, r16, r17 }
+	{ slte_u r5, r6, r7 ; sw r25, r26 ; rli r15, r16, 5 }
+	{ slte_u r5, r6, r7 ; sw r25, r26 ; xor r15, r16, r17 }
+	{ slteb r15, r16, r17 ; addhs r5, r6, r7 }
+	{ slteb r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ slteb r15, r16, r17 ; move r5, r6 }
+	{ slteb r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ slteb r15, r16, r17 ; pcnt r5, r6 }
+	{ slteb r15, r16, r17 ; shlh r5, r6, r7 }
+	{ slteb r15, r16, r17 ; slth r5, r6, r7 }
+	{ slteb r15, r16, r17 ; subh r5, r6, r7 }
+	{ slteb r5, r6, r7 ; and r15, r16, r17 }
+	{ slteb r5, r6, r7 ; jrp r15 }
+	{ slteb r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ slteb r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ slteb r5, r6, r7 ; shadd r15, r16, 5 }
+	{ slteb r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ slteb r5, r6, r7 ; sub r15, r16, r17 }
+	{ slteb_u r15, r16, r17 ; addli r5, r6, 0x1234 }
+	{ slteb_u r15, r16, r17 ; inthb r5, r6, r7 }
+	{ slteb_u r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ slteb_u r15, r16, r17 ; mullla_su r5, r6, r7 }
+	{ slteb_u r15, r16, r17 ; s2a r5, r6, r7 }
+	{ slteb_u r15, r16, r17 ; shr r5, r6, r7 }
+	{ slteb_u r15, r16, r17 ; sltib r5, r6, 5 }
+	{ slteb_u r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ slteb_u r5, r6, r7 ; finv r15 }
+	{ slteb_u r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ slteb_u r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+	{ slteb_u r5, r6, r7 ; prefetch r15 }
+	{ slteb_u r5, r6, r7 ; shli r15, r16, 5 }
+	{ slteb_u r5, r6, r7 ; slth_u r15, r16, r17 }
+	{ slteb_u r5, r6, r7 ; subhs r15, r16, r17 }
+	{ slteh r15, r16, r17 ; adiffh r5, r6, r7 }
+	{ slteh r15, r16, r17 ; maxb_u r5, r6, r7 }
+	{ slteh r15, r16, r17 ; mulhha_su r5, r6, r7 }
+	{ slteh r15, r16, r17 ; mvz r5, r6, r7 }
+	{ slteh r15, r16, r17 ; sadah_u r5, r6, r7 }
+	{ slteh r15, r16, r17 ; shrib r5, r6, 5 }
+	{ slteh r15, r16, r17 ; sne r5, r6, r7 }
+	{ slteh r15, r16, r17 ; xori r5, r6, 5 }
+	{ slteh r5, r6, r7 ; ill }
+	{ slteh r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ slteh r5, r6, r7 ; move r15, r16 }
+	{ slteh r5, r6, r7 ; s1a r15, r16, r17 }
+	{ slteh r5, r6, r7 ; shrb r15, r16, r17 }
+	{ slteh r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ slteh r5, r6, r7 ; tns r15, r16 }
+	{ slteh_u r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ slteh_u r15, r16, r17 ; minb_u r5, r6, r7 }
+	{ slteh_u r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ slteh_u r15, r16, r17 ; nop }
+	{ slteh_u r15, r16, r17 ; seq r5, r6, r7 }
+	{ slteh_u r15, r16, r17 ; sltb r5, r6, r7 }
+	{ slteh_u r15, r16, r17 ; srab r5, r6, r7 }
+	{ slteh_u r5, r6, r7 ; addh r15, r16, r17 }
+	{ slteh_u r5, r6, r7 ; inthh r15, r16, r17 }
+	{ slteh_u r5, r6, r7 ; lwadd r15, r16, 5 }
+	{ slteh_u r5, r6, r7 ; mtspr 0x5, r16 }
+	{ slteh_u r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ slteh_u r5, r6, r7 ; shrih r15, r16, 5 }
+	{ slteh_u r5, r6, r7 ; sneb r15, r16, r17 }
+	{ slth r15, r16, r17 ; add r5, r6, r7 }
+	{ slth r15, r16, r17 ; clz r5, r6 }
+	{ slth r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ slth r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ slth r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ slth r15, r16, r17 ; seqib r5, r6, 5 }
+	{ slth r15, r16, r17 ; slteb r5, r6, r7 }
+	{ slth r15, r16, r17 ; sraih r5, r6, 5 }
+	{ slth r5, r6, r7 ; addih r15, r16, 5 }
+	{ slth r5, r6, r7 ; iret }
+	{ slth r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ slth r5, r6, r7 ; nop }
+	{ slth r5, r6, r7 ; seqi r15, r16, 5 }
+	{ slth r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ slth r5, r6, r7 ; srah r15, r16, r17 }
+	{ slth_u r15, r16, r17 ; addhs r5, r6, r7 }
+	{ slth_u r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ slth_u r15, r16, r17 ; move r5, r6 }
+	{ slth_u r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ slth_u r15, r16, r17 ; pcnt r5, r6 }
+	{ slth_u r15, r16, r17 ; shlh r5, r6, r7 }
+	{ slth_u r15, r16, r17 ; slth r5, r6, r7 }
+	{ slth_u r15, r16, r17 ; subh r5, r6, r7 }
+	{ slth_u r5, r6, r7 ; and r15, r16, r17 }
+	{ slth_u r5, r6, r7 ; jrp r15 }
+	{ slth_u r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ slth_u r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ slth_u r5, r6, r7 ; shadd r15, r16, 5 }
+	{ slth_u r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ slth_u r5, r6, r7 ; sub r15, r16, r17 }
+	{ slti r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+	{ slti r15, r16, 5 ; adds r5, r6, r7 }
+	{ slti r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ slti r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 }
+	{ slti r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 }
+	{ slti r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+	{ slti r15, r16, 5 ; lb r25, r26 ; clz r5, r6 }
+	{ slti r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ slti r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ slti r15, r16, 5 ; lb_u r25, r26 ; info 19 }
+	{ slti r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ slti r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ slti r15, r16, 5 ; lh r25, r26 ; movei r5, 5 }
+	{ slti r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ slti r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ slti r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ slti r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ slti r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ slti r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slti r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ slti r15, r16, 5 ; maxh r5, r6, r7 }
+	{ slti r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+	{ slti r15, r16, 5 ; moveli r5, 0x1234 }
+	{ slti r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ slti r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ slti r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ slti r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ slti r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ slti r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ slti r15, r16, 5 ; nop ; lh r25, r26 }
+	{ slti r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+	{ slti r15, r16, 5 ; packhs r5, r6, r7 }
+	{ slti r15, r16, 5 ; prefetch r25 ; fnop }
+	{ slti r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 }
+	{ slti r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 }
+	{ slti r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ slti r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ slti r15, r16, 5 ; sadah r5, r6, r7 }
+	{ slti r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ slti r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ slti r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ slti r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ slti r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ slti r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ slti r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ slti r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+	{ slti r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ slti r15, r16, 5 ; slt r5, r6, r7 }
+	{ slti r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ slti r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ slti r15, r16, 5 ; sltib_u r5, r6, 5 }
+	{ slti r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+	{ slti r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ slti r15, r16, 5 ; sw r25, r26 ; clz r5, r6 }
+	{ slti r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ slti r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ slti r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ slti r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ slti r15, r16, 5 ; xor r5, r6, r7 }
+	{ slti r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ slti r5, r6, 5 ; and r15, r16, r17 }
+	{ slti r5, r6, 5 ; fnop ; prefetch r25 }
+	{ slti r5, r6, 5 ; info 19 ; lw r25, r26 }
+	{ slti r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 }
+	{ slti r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ slti r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ slti r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ slti r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 }
+	{ slti r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ slti r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ slti r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ slti r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ slti r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ slti r5, r6, 5 ; maxb_u r15, r16, r17 }
+	{ slti r5, r6, 5 ; mnz r15, r16, r17 }
+	{ slti r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+	{ slti r5, r6, 5 ; nop ; lh r25, r26 }
+	{ slti r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+	{ slti r5, r6, 5 ; packhs r15, r16, r17 }
+	{ slti r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ slti r5, r6, 5 ; prefetch r25 }
+	{ slti r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ slti r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ slti r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ slti r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ slti r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ slti r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ slti r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ slti r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ slti r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ slti r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ slti r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ slti r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ slti r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ slti r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ slti r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ slti r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ slti r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ slti r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ slti_u r15, r16, 5 ; add r5, r6, r7 ; lb r25, r26 }
+	{ slti_u r15, r16, 5 ; addi r5, r6, 5 ; sb r25, r26 }
+	{ slti_u r15, r16, 5 ; and r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; bitx r5, r6 ; sb r25, r26 }
+	{ slti_u r15, r16, 5 ; clz r5, r6 ; sb r25, r26 }
+	{ slti_u r15, r16, 5 ; fnop ; lh_u r25, r26 }
+	{ slti_u r15, r16, 5 ; intlb r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lb r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lb r25, r26 ; shli r5, r6, 5 }
+	{ slti_u r15, r16, 5 ; lb_u r25, r26 ; addi r5, r6, 5 }
+	{ slti_u r15, r16, 5 ; lb_u r25, r26 ; mullla_uu r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lb_u r25, r26 ; slt r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lh r25, r26 ; bitx r5, r6 }
+	{ slti_u r15, r16, 5 ; lh r25, r26 ; mz r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lh r25, r26 ; slte_u r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lh_u r25, r26 ; ctz r5, r6 }
+	{ slti_u r15, r16, 5 ; lh_u r25, r26 ; or r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lh_u r25, r26 ; sne r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lw r25, r26 ; mnz r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lw r25, r26 ; rl r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; lw r25, r26 ; sub r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; mnz r5, r6, r7 ; lw r25, r26 }
+	{ slti_u r15, r16, 5 ; movei r5, 5 ; lh r25, r26 }
+	{ slti_u r15, r16, 5 ; mulhh_su r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; mulhha_ss r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; mulhla_uu r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; mullla_ss r5, r6, r7 ; sw r25, r26 }
+	{ slti_u r15, r16, 5 ; mvnz r5, r6, r7 ; sb r25, r26 }
+	{ slti_u r15, r16, 5 ; mz r5, r6, r7 ; sb r25, r26 }
+	{ slti_u r15, r16, 5 ; nor r5, r6, r7 ; lw r25, r26 }
+	{ slti_u r15, r16, 5 ; ori r5, r6, 5 ; lw r25, r26 }
+	{ slti_u r15, r16, 5 ; prefetch r25 ; add r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; prefetch r25 ; mullla_ss r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; prefetch r25 ; shri r5, r6, 5 }
+	{ slti_u r15, r16, 5 ; rl r5, r6, r7 ; lh_u r25, r26 }
+	{ slti_u r15, r16, 5 ; s1a r5, r6, r7 ; lh_u r25, r26 }
+	{ slti_u r15, r16, 5 ; s3a r5, r6, r7 ; lh_u r25, r26 }
+	{ slti_u r15, r16, 5 ; sb r25, r26 ; ctz r5, r6 }
+	{ slti_u r15, r16, 5 ; sb r25, r26 ; or r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; sb r25, r26 ; sne r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; seqb r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; sh r25, r26 ; clz r5, r6 }
+	{ slti_u r15, r16, 5 ; sh r25, r26 ; nor r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; sh r25, r26 ; slti_u r5, r6, 5 }
+	{ slti_u r15, r16, 5 ; shl r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; shr r5, r6, r7 ; prefetch r25 }
+	{ slti_u r15, r16, 5 ; slt r5, r6, r7 ; lb_u r25, r26 }
+	{ slti_u r15, r16, 5 ; sltb_u r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; slti_u r5, r6, 5 ; lh_u r25, r26 }
+	{ slti_u r15, r16, 5 ; sne r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; srai r5, r6, 5 ; prefetch r25 }
+	{ slti_u r15, r16, 5 ; subhs r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; sw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ slti_u r15, r16, 5 ; sw r25, r26 ; shli r5, r6, 5 }
+	{ slti_u r15, r16, 5 ; tblidxb0 r5, r6 ; lb_u r25, r26 }
+	{ slti_u r15, r16, 5 ; tblidxb2 r5, r6 ; lb_u r25, r26 }
+	{ slti_u r15, r16, 5 ; xor r5, r6, r7 ; lb_u r25, r26 }
+	{ slti_u r5, r6, 5 ; addb r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; and r15, r16, r17 ; lb_u r25, r26 }
+	{ slti_u r5, r6, 5 ; dtlbpr r15 }
+	{ slti_u r5, r6, 5 ; ill ; sb r25, r26 }
+	{ slti_u r5, r6, 5 ; iret }
+	{ slti_u r5, r6, 5 ; lb r25, r26 ; ori r15, r16, 5 }
+	{ slti_u r5, r6, 5 ; lb r25, r26 ; srai r15, r16, 5 }
+	{ slti_u r5, r6, 5 ; lb_u r25, r26 ; rl r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; lb_u r25, r26 ; sub r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; lh r25, r26 ; ori r15, r16, 5 }
+	{ slti_u r5, r6, 5 ; lh r25, r26 ; srai r15, r16, 5 }
+	{ slti_u r5, r6, 5 ; lh_u r25, r26 ; rl r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; lh_u r25, r26 ; sub r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; lw r25, r26 ; or r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; lw r25, r26 ; sra r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; mnz r15, r16, r17 ; lb_u r25, r26 }
+	{ slti_u r5, r6, 5 ; move r15, r16 }
+	{ slti_u r5, r6, 5 ; mz r15, r16, r17 ; sb r25, r26 }
+	{ slti_u r5, r6, 5 ; nor r15, r16, r17 ; lw r25, r26 }
+	{ slti_u r5, r6, 5 ; ori r15, r16, 5 ; lw r25, r26 }
+	{ slti_u r5, r6, 5 ; prefetch r25 ; movei r15, 5 }
+	{ slti_u r5, r6, 5 ; prefetch r25 ; slte_u r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; rli r15, r16, 5 ; lb r25, r26 }
+	{ slti_u r5, r6, 5 ; s2a r15, r16, r17 ; lb r25, r26 }
+	{ slti_u r5, r6, 5 ; sb r15, r16 }
+	{ slti_u r5, r6, 5 ; sb r25, r26 ; s3a r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; seq r15, r16, r17 ; lb r25, r26 }
+	{ slti_u r5, r6, 5 ; seqi r15, r16, 5 ; sw r25, r26 }
+	{ slti_u r5, r6, 5 ; sh r25, r26 ; rl r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; sh r25, r26 ; sub r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; shli r15, r16, 5 ; lw r25, r26 }
+	{ slti_u r5, r6, 5 ; shri r15, r16, 5 ; lb r25, r26 }
+	{ slti_u r5, r6, 5 ; slt r15, r16, r17 ; sw r25, r26 }
+	{ slti_u r5, r6, 5 ; slte r15, r16, r17 ; sb r25, r26 }
+	{ slti_u r5, r6, 5 ; slti r15, r16, 5 ; lb r25, r26 }
+	{ slti_u r5, r6, 5 ; sltib r15, r16, 5 }
+	{ slti_u r5, r6, 5 ; sra r15, r16, r17 ; lw r25, r26 }
+	{ slti_u r5, r6, 5 ; sub r15, r16, r17 ; lb r25, r26 }
+	{ slti_u r5, r6, 5 ; sw r25, r26 ; fnop }
+	{ slti_u r5, r6, 5 ; sw r25, r26 ; shr r15, r16, r17 }
+	{ slti_u r5, r6, 5 ; xor r15, r16, r17 ; lh_u r25, r26 }
+	{ sltib r15, r16, 5 ; adiffh r5, r6, r7 }
+	{ sltib r15, r16, 5 ; maxb_u r5, r6, r7 }
+	{ sltib r15, r16, 5 ; mulhha_su r5, r6, r7 }
+	{ sltib r15, r16, 5 ; mvz r5, r6, r7 }
+	{ sltib r15, r16, 5 ; sadah_u r5, r6, r7 }
+	{ sltib r15, r16, 5 ; shrib r5, r6, 5 }
+	{ sltib r15, r16, 5 ; sne r5, r6, r7 }
+	{ sltib r15, r16, 5 ; xori r5, r6, 5 }
+	{ sltib r5, r6, 5 ; ill }
+	{ sltib r5, r6, 5 ; lhadd_u r15, r16, 5 }
+	{ sltib r5, r6, 5 ; move r15, r16 }
+	{ sltib r5, r6, 5 ; s1a r15, r16, r17 }
+	{ sltib r5, r6, 5 ; shrb r15, r16, r17 }
+	{ sltib r5, r6, 5 ; sltib_u r15, r16, 5 }
+	{ sltib r5, r6, 5 ; tns r15, r16 }
+	{ sltib_u r15, r16, 5 ; avgb_u r5, r6, r7 }
+	{ sltib_u r15, r16, 5 ; minb_u r5, r6, r7 }
+	{ sltib_u r15, r16, 5 ; mulhl_su r5, r6, r7 }
+	{ sltib_u r15, r16, 5 ; nop }
+	{ sltib_u r15, r16, 5 ; seq r5, r6, r7 }
+	{ sltib_u r15, r16, 5 ; sltb r5, r6, r7 }
+	{ sltib_u r15, r16, 5 ; srab r5, r6, r7 }
+	{ sltib_u r5, r6, 5 ; addh r15, r16, r17 }
+	{ sltib_u r5, r6, 5 ; inthh r15, r16, r17 }
+	{ sltib_u r5, r6, 5 ; lwadd r15, r16, 5 }
+	{ sltib_u r5, r6, 5 ; mtspr 0x5, r16 }
+	{ sltib_u r5, r6, 5 ; sbadd r15, r16, 5 }
+	{ sltib_u r5, r6, 5 ; shrih r15, r16, 5 }
+	{ sltib_u r5, r6, 5 ; sneb r15, r16, r17 }
+	{ sltih r15, r16, 5 ; add r5, r6, r7 }
+	{ sltih r15, r16, 5 ; clz r5, r6 }
+	{ sltih r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+	{ sltih r15, r16, 5 ; mulhla_su r5, r6, r7 }
+	{ sltih r15, r16, 5 ; packbs_u r5, r6, r7 }
+	{ sltih r15, r16, 5 ; seqib r5, r6, 5 }
+	{ sltih r15, r16, 5 ; slteb r5, r6, r7 }
+	{ sltih r15, r16, 5 ; sraih r5, r6, 5 }
+	{ sltih r5, r6, 5 ; addih r15, r16, 5 }
+	{ sltih r5, r6, 5 ; iret }
+	{ sltih r5, r6, 5 ; maxib_u r15, r16, 5 }
+	{ sltih r5, r6, 5 ; nop }
+	{ sltih r5, r6, 5 ; seqi r15, r16, 5 }
+	{ sltih r5, r6, 5 ; sltb_u r15, r16, r17 }
+	{ sltih r5, r6, 5 ; srah r15, r16, r17 }
+	{ sltih_u r15, r16, 5 ; addhs r5, r6, r7 }
+	{ sltih_u r15, r16, 5 ; dword_align r5, r6, r7 }
+	{ sltih_u r15, r16, 5 ; move r5, r6 }
+	{ sltih_u r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ sltih_u r15, r16, 5 ; pcnt r5, r6 }
+	{ sltih_u r15, r16, 5 ; shlh r5, r6, r7 }
+	{ sltih_u r15, r16, 5 ; slth r5, r6, r7 }
+	{ sltih_u r15, r16, 5 ; subh r5, r6, r7 }
+	{ sltih_u r5, r6, 5 ; and r15, r16, r17 }
+	{ sltih_u r5, r6, 5 ; jrp r15 }
+	{ sltih_u r5, r6, 5 ; minb_u r15, r16, r17 }
+	{ sltih_u r5, r6, 5 ; packbs_u r15, r16, r17 }
+	{ sltih_u r5, r6, 5 ; shadd r15, r16, 5 }
+	{ sltih_u r5, r6, 5 ; slteb_u r15, r16, r17 }
+	{ sltih_u r5, r6, 5 ; sub r15, r16, r17 }
+	{ sne r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ sne r15, r16, r17 ; adds r5, r6, r7 }
+	{ sne r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ sne r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ sne r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ sne r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ sne r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ sne r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ sne r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ sne r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ sne r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ sne r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ sne r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ sne r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ sne r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ sne r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ sne r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ sne r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ sne r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ sne r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ sne r15, r16, r17 ; maxh r5, r6, r7 }
+	{ sne r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ sne r15, r16, r17 ; moveli r5, 0x1234 }
+	{ sne r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ sne r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ sne r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ sne r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ sne r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ sne r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ sne r15, r16, r17 ; nop ; lh r25, r26 }
+	{ sne r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ sne r15, r16, r17 ; packhs r5, r6, r7 }
+	{ sne r15, r16, r17 ; prefetch r25 ; fnop }
+	{ sne r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ sne r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ sne r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ sne r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ sne r15, r16, r17 ; sadah r5, r6, r7 }
+	{ sne r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ sne r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ sne r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ sne r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ sne r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ sne r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ sne r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ sne r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ sne r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ sne r15, r16, r17 ; slt r5, r6, r7 }
+	{ sne r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ sne r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ sne r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ sne r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ sne r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ sne r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ sne r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ sne r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ sne r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ sne r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sne r15, r16, r17 ; xor r5, r6, r7 }
+	{ sne r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ sne r5, r6, r7 ; and r15, r16, r17 }
+	{ sne r5, r6, r7 ; fnop ; prefetch r25 }
+	{ sne r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ sne r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ sne r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ sne r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ sne r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ sne r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ sne r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ sne r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ sne r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ sne r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ sne r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ sne r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ sne r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sne r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ sne r5, r6, r7 ; nop ; lh r25, r26 }
+	{ sne r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ sne r5, r6, r7 ; packhs r15, r16, r17 }
+	{ sne r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ sne r5, r6, r7 ; prefetch r25 }
+	{ sne r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ sne r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ sne r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ sne r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ sne r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ sne r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ sne r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ sne r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ sne r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ sne r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ sne r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ sne r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ sne r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ sne r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ sne r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ sne r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ sne r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ sne r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ sneb r15, r16, r17 ; add r5, r6, r7 }
+	{ sneb r15, r16, r17 ; clz r5, r6 }
+	{ sneb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ sneb r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ sneb r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ sneb r15, r16, r17 ; seqib r5, r6, 5 }
+	{ sneb r15, r16, r17 ; slteb r5, r6, r7 }
+	{ sneb r15, r16, r17 ; sraih r5, r6, 5 }
+	{ sneb r5, r6, r7 ; addih r15, r16, 5 }
+	{ sneb r5, r6, r7 ; iret }
+	{ sneb r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ sneb r5, r6, r7 ; nop }
+	{ sneb r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sneb r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ sneb r5, r6, r7 ; srah r15, r16, r17 }
+	{ sneh r15, r16, r17 ; addhs r5, r6, r7 }
+	{ sneh r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ sneh r15, r16, r17 ; move r5, r6 }
+	{ sneh r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ sneh r15, r16, r17 ; pcnt r5, r6 }
+	{ sneh r15, r16, r17 ; shlh r5, r6, r7 }
+	{ sneh r15, r16, r17 ; slth r5, r6, r7 }
+	{ sneh r15, r16, r17 ; subh r5, r6, r7 }
+	{ sneh r5, r6, r7 ; and r15, r16, r17 }
+	{ sneh r5, r6, r7 ; jrp r15 }
+	{ sneh r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ sneh r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ sneh r5, r6, r7 ; shadd r15, r16, 5 }
+	{ sneh r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ sneh r5, r6, r7 ; sub r15, r16, r17 }
+	{ sra r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ sra r15, r16, r17 ; adds r5, r6, r7 }
+	{ sra r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ sra r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ sra r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ sra r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ sra r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ sra r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ sra r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ sra r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ sra r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ sra r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ sra r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ sra r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ sra r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ sra r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ sra r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ sra r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ sra r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ sra r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ sra r15, r16, r17 ; maxh r5, r6, r7 }
+	{ sra r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ sra r15, r16, r17 ; moveli r5, 0x1234 }
+	{ sra r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ sra r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ sra r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ sra r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ sra r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ sra r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ sra r15, r16, r17 ; nop ; lh r25, r26 }
+	{ sra r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ sra r15, r16, r17 ; packhs r5, r6, r7 }
+	{ sra r15, r16, r17 ; prefetch r25 ; fnop }
+	{ sra r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ sra r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ sra r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ sra r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ sra r15, r16, r17 ; sadah r5, r6, r7 }
+	{ sra r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ sra r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ sra r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ sra r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ sra r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ sra r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ sra r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ sra r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ sra r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ sra r15, r16, r17 ; slt r5, r6, r7 }
+	{ sra r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ sra r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ sra r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ sra r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ sra r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ sra r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ sra r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ sra r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ sra r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ sra r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sra r15, r16, r17 ; xor r5, r6, r7 }
+	{ sra r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ sra r5, r6, r7 ; and r15, r16, r17 }
+	{ sra r5, r6, r7 ; fnop ; prefetch r25 }
+	{ sra r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ sra r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ sra r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ sra r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ sra r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ sra r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ sra r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ sra r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ sra r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ sra r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ sra r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ sra r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ sra r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sra r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ sra r5, r6, r7 ; nop ; lh r25, r26 }
+	{ sra r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ sra r5, r6, r7 ; packhs r15, r16, r17 }
+	{ sra r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ sra r5, r6, r7 ; prefetch r25 }
+	{ sra r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ sra r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ sra r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ sra r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ sra r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ sra r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ sra r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ sra r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ sra r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ sra r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ sra r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ sra r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ sra r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ sra r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ sra r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ sra r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ sra r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ sra r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ srab r15, r16, r17 ; add r5, r6, r7 }
+	{ srab r15, r16, r17 ; clz r5, r6 }
+	{ srab r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ srab r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ srab r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ srab r15, r16, r17 ; seqib r5, r6, 5 }
+	{ srab r15, r16, r17 ; slteb r5, r6, r7 }
+	{ srab r15, r16, r17 ; sraih r5, r6, 5 }
+	{ srab r5, r6, r7 ; addih r15, r16, 5 }
+	{ srab r5, r6, r7 ; iret }
+	{ srab r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ srab r5, r6, r7 ; nop }
+	{ srab r5, r6, r7 ; seqi r15, r16, 5 }
+	{ srab r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ srab r5, r6, r7 ; srah r15, r16, r17 }
+	{ srah r15, r16, r17 ; addhs r5, r6, r7 }
+	{ srah r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ srah r15, r16, r17 ; move r5, r6 }
+	{ srah r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ srah r15, r16, r17 ; pcnt r5, r6 }
+	{ srah r15, r16, r17 ; shlh r5, r6, r7 }
+	{ srah r15, r16, r17 ; slth r5, r6, r7 }
+	{ srah r15, r16, r17 ; subh r5, r6, r7 }
+	{ srah r5, r6, r7 ; and r15, r16, r17 }
+	{ srah r5, r6, r7 ; jrp r15 }
+	{ srah r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ srah r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ srah r5, r6, r7 ; shadd r15, r16, 5 }
+	{ srah r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ srah r5, r6, r7 ; sub r15, r16, r17 }
+	{ srai r15, r16, 5 ; add r5, r6, r7 ; sw r25, r26 }
+	{ srai r15, r16, 5 ; adds r5, r6, r7 }
+	{ srai r15, r16, 5 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ srai r15, r16, 5 ; bytex r5, r6 ; lw r25, r26 }
+	{ srai r15, r16, 5 ; ctz r5, r6 ; lh r25, r26 }
+	{ srai r15, r16, 5 ; info 19 ; lb_u r25, r26 }
+	{ srai r15, r16, 5 ; lb r25, r26 ; clz r5, r6 }
+	{ srai r15, r16, 5 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ srai r15, r16, 5 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ srai r15, r16, 5 ; lb_u r25, r26 ; info 19 }
+	{ srai r15, r16, 5 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ srai r15, r16, 5 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ srai r15, r16, 5 ; lh r25, r26 ; movei r5, 5 }
+	{ srai r15, r16, 5 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ srai r15, r16, 5 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ srai r15, r16, 5 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ srai r15, r16, 5 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ srai r15, r16, 5 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ srai r15, r16, 5 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ srai r15, r16, 5 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ srai r15, r16, 5 ; maxh r5, r6, r7 }
+	{ srai r15, r16, 5 ; move r5, r6 ; lb r25, r26 }
+	{ srai r15, r16, 5 ; moveli r5, 0x1234 }
+	{ srai r15, r16, 5 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ srai r15, r16, 5 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ srai r15, r16, 5 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ srai r15, r16, 5 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ srai r15, r16, 5 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ srai r15, r16, 5 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ srai r15, r16, 5 ; nop ; lh r25, r26 }
+	{ srai r15, r16, 5 ; or r5, r6, r7 ; lh r25, r26 }
+	{ srai r15, r16, 5 ; packhs r5, r6, r7 }
+	{ srai r15, r16, 5 ; prefetch r25 ; fnop }
+	{ srai r15, r16, 5 ; prefetch r25 ; ori r5, r6, 5 }
+	{ srai r15, r16, 5 ; prefetch r25 ; sra r5, r6, r7 }
+	{ srai r15, r16, 5 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ srai r15, r16, 5 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ srai r15, r16, 5 ; sadah r5, r6, r7 }
+	{ srai r15, r16, 5 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ srai r15, r16, 5 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ srai r15, r16, 5 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ srai r15, r16, 5 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ srai r15, r16, 5 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ srai r15, r16, 5 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ srai r15, r16, 5 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ srai r15, r16, 5 ; shli r5, r6, 5 ; prefetch r25 }
+	{ srai r15, r16, 5 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ srai r15, r16, 5 ; slt r5, r6, r7 }
+	{ srai r15, r16, 5 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ srai r15, r16, 5 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ srai r15, r16, 5 ; sltib_u r5, r6, 5 }
+	{ srai r15, r16, 5 ; sra r5, r6, r7 ; prefetch r25 }
+	{ srai r15, r16, 5 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ srai r15, r16, 5 ; sw r25, r26 ; clz r5, r6 }
+	{ srai r15, r16, 5 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ srai r15, r16, 5 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ srai r15, r16, 5 ; tblidxb0 r5, r6 }
+	{ srai r15, r16, 5 ; tblidxb2 r5, r6 }
+	{ srai r15, r16, 5 ; xor r5, r6, r7 }
+	{ srai r5, r6, 5 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ srai r5, r6, 5 ; and r15, r16, r17 }
+	{ srai r5, r6, 5 ; fnop ; prefetch r25 }
+	{ srai r5, r6, 5 ; info 19 ; lw r25, r26 }
+	{ srai r5, r6, 5 ; lb r25, r26 ; and r15, r16, r17 }
+	{ srai r5, r6, 5 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ srai r5, r6, 5 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ srai r5, r6, 5 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ srai r5, r6, 5 ; lh r25, r26 ; and r15, r16, r17 }
+	{ srai r5, r6, 5 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ srai r5, r6, 5 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ srai r5, r6, 5 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ srai r5, r6, 5 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ srai r5, r6, 5 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ srai r5, r6, 5 ; maxb_u r15, r16, r17 }
+	{ srai r5, r6, 5 ; mnz r15, r16, r17 }
+	{ srai r5, r6, 5 ; movei r15, 5 ; sh r25, r26 }
+	{ srai r5, r6, 5 ; nop ; lh r25, r26 }
+	{ srai r5, r6, 5 ; or r15, r16, r17 ; lh r25, r26 }
+	{ srai r5, r6, 5 ; packhs r15, r16, r17 }
+	{ srai r5, r6, 5 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ srai r5, r6, 5 ; prefetch r25 }
+	{ srai r5, r6, 5 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ srai r5, r6, 5 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ srai r5, r6, 5 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ srai r5, r6, 5 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ srai r5, r6, 5 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ srai r5, r6, 5 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ srai r5, r6, 5 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ srai r5, r6, 5 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ srai r5, r6, 5 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ srai r5, r6, 5 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ srai r5, r6, 5 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ srai r5, r6, 5 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ srai r5, r6, 5 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ srai r5, r6, 5 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ srai r5, r6, 5 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ srai r5, r6, 5 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ srai r5, r6, 5 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ srai r5, r6, 5 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ sraib r15, r16, 5 ; add r5, r6, r7 }
+	{ sraib r15, r16, 5 ; clz r5, r6 }
+	{ sraib r15, r16, 5 ; mm r5, r6, r7, 5, 7 }
+	{ sraib r15, r16, 5 ; mulhla_su r5, r6, r7 }
+	{ sraib r15, r16, 5 ; packbs_u r5, r6, r7 }
+	{ sraib r15, r16, 5 ; seqib r5, r6, 5 }
+	{ sraib r15, r16, 5 ; slteb r5, r6, r7 }
+	{ sraib r15, r16, 5 ; sraih r5, r6, 5 }
+	{ sraib r5, r6, 5 ; addih r15, r16, 5 }
+	{ sraib r5, r6, 5 ; iret }
+	{ sraib r5, r6, 5 ; maxib_u r15, r16, 5 }
+	{ sraib r5, r6, 5 ; nop }
+	{ sraib r5, r6, 5 ; seqi r15, r16, 5 }
+	{ sraib r5, r6, 5 ; sltb_u r15, r16, r17 }
+	{ sraib r5, r6, 5 ; srah r15, r16, r17 }
+	{ sraih r15, r16, 5 ; addhs r5, r6, r7 }
+	{ sraih r15, r16, 5 ; dword_align r5, r6, r7 }
+	{ sraih r15, r16, 5 ; move r5, r6 }
+	{ sraih r15, r16, 5 ; mulll_ss r5, r6, r7 }
+	{ sraih r15, r16, 5 ; pcnt r5, r6 }
+	{ sraih r15, r16, 5 ; shlh r5, r6, r7 }
+	{ sraih r15, r16, 5 ; slth r5, r6, r7 }
+	{ sraih r15, r16, 5 ; subh r5, r6, r7 }
+	{ sraih r5, r6, 5 ; and r15, r16, r17 }
+	{ sraih r5, r6, 5 ; jrp r15 }
+	{ sraih r5, r6, 5 ; minb_u r15, r16, r17 }
+	{ sraih r5, r6, 5 ; packbs_u r15, r16, r17 }
+	{ sraih r5, r6, 5 ; shadd r15, r16, 5 }
+	{ sraih r5, r6, 5 ; slteb_u r15, r16, r17 }
+	{ sraih r5, r6, 5 ; sub r15, r16, r17 }
+	{ sub r15, r16, r17 ; add r5, r6, r7 ; sw r25, r26 }
+	{ sub r15, r16, r17 ; adds r5, r6, r7 }
+	{ sub r15, r16, r17 ; andi r5, r6, 5 ; sh r25, r26 }
+	{ sub r15, r16, r17 ; bytex r5, r6 ; lw r25, r26 }
+	{ sub r15, r16, r17 ; ctz r5, r6 ; lh r25, r26 }
+	{ sub r15, r16, r17 ; info 19 ; lb_u r25, r26 }
+	{ sub r15, r16, r17 ; lb r25, r26 ; clz r5, r6 }
+	{ sub r15, r16, r17 ; lb r25, r26 ; nor r5, r6, r7 }
+	{ sub r15, r16, r17 ; lb r25, r26 ; slti_u r5, r6, 5 }
+	{ sub r15, r16, r17 ; lb_u r25, r26 ; info 19 }
+	{ sub r15, r16, r17 ; lb_u r25, r26 ; pcnt r5, r6 }
+	{ sub r15, r16, r17 ; lb_u r25, r26 ; srai r5, r6, 5 }
+	{ sub r15, r16, r17 ; lh r25, r26 ; movei r5, 5 }
+	{ sub r15, r16, r17 ; lh r25, r26 ; s1a r5, r6, r7 }
+	{ sub r15, r16, r17 ; lh r25, r26 ; tblidxb1 r5, r6 }
+	{ sub r15, r16, r17 ; lh_u r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ sub r15, r16, r17 ; lh_u r25, r26 ; seq r5, r6, r7 }
+	{ sub r15, r16, r17 ; lh_u r25, r26 ; xor r5, r6, r7 }
+	{ sub r15, r16, r17 ; lw r25, r26 ; mulll_ss r5, r6, r7 }
+	{ sub r15, r16, r17 ; lw r25, r26 ; shli r5, r6, 5 }
+	{ sub r15, r16, r17 ; maxh r5, r6, r7 }
+	{ sub r15, r16, r17 ; move r5, r6 ; lb r25, r26 }
+	{ sub r15, r16, r17 ; moveli r5, 0x1234 }
+	{ sub r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sh r25, r26 }
+	{ sub r15, r16, r17 ; mulhha_uu r5, r6, r7 ; sb r25, r26 }
+	{ sub r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sh r25, r26 }
+	{ sub r15, r16, r17 ; mulll_uu r5, r6, r7 ; sb r25, r26 }
+	{ sub r15, r16, r17 ; mullla_uu r5, r6, r7 ; prefetch r25 }
+	{ sub r15, r16, r17 ; mvz r5, r6, r7 ; lw r25, r26 }
+	{ sub r15, r16, r17 ; nop ; lh r25, r26 }
+	{ sub r15, r16, r17 ; or r5, r6, r7 ; lh r25, r26 }
+	{ sub r15, r16, r17 ; packhs r5, r6, r7 }
+	{ sub r15, r16, r17 ; prefetch r25 ; fnop }
+	{ sub r15, r16, r17 ; prefetch r25 ; ori r5, r6, 5 }
+	{ sub r15, r16, r17 ; prefetch r25 ; sra r5, r6, r7 }
+	{ sub r15, r16, r17 ; rli r5, r6, 5 ; lb_u r25, r26 }
+	{ sub r15, r16, r17 ; s2a r5, r6, r7 ; lb_u r25, r26 }
+	{ sub r15, r16, r17 ; sadah r5, r6, r7 }
+	{ sub r15, r16, r17 ; sb r25, r26 ; mulhha_ss r5, r6, r7 }
+	{ sub r15, r16, r17 ; sb r25, r26 ; seq r5, r6, r7 }
+	{ sub r15, r16, r17 ; sb r25, r26 ; xor r5, r6, r7 }
+	{ sub r15, r16, r17 ; seqi r5, r6, 5 ; sb r25, r26 }
+	{ sub r15, r16, r17 ; sh r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ sub r15, r16, r17 ; sh r25, r26 ; s3a r5, r6, r7 }
+	{ sub r15, r16, r17 ; sh r25, r26 ; tblidxb3 r5, r6 }
+	{ sub r15, r16, r17 ; shli r5, r6, 5 ; prefetch r25 }
+	{ sub r15, r16, r17 ; shri r5, r6, 5 ; lb_u r25, r26 }
+	{ sub r15, r16, r17 ; slt r5, r6, r7 }
+	{ sub r15, r16, r17 ; slte r5, r6, r7 ; sh r25, r26 }
+	{ sub r15, r16, r17 ; slti r5, r6, 5 ; lb_u r25, r26 }
+	{ sub r15, r16, r17 ; sltib_u r5, r6, 5 }
+	{ sub r15, r16, r17 ; sra r5, r6, r7 ; prefetch r25 }
+	{ sub r15, r16, r17 ; sub r5, r6, r7 ; lb_u r25, r26 }
+	{ sub r15, r16, r17 ; sw r25, r26 ; clz r5, r6 }
+	{ sub r15, r16, r17 ; sw r25, r26 ; nor r5, r6, r7 }
+	{ sub r15, r16, r17 ; sw r25, r26 ; slti_u r5, r6, 5 }
+	{ sub r15, r16, r17 ; tblidxb0 r5, r6 }
+	{ sub r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sub r15, r16, r17 ; xor r5, r6, r7 }
+	{ sub r5, r6, r7 ; addi r15, r16, 5 ; lw r25, r26 }
+	{ sub r5, r6, r7 ; and r15, r16, r17 }
+	{ sub r5, r6, r7 ; fnop ; prefetch r25 }
+	{ sub r5, r6, r7 ; info 19 ; lw r25, r26 }
+	{ sub r5, r6, r7 ; lb r25, r26 ; and r15, r16, r17 }
+	{ sub r5, r6, r7 ; lb r25, r26 ; shl r15, r16, r17 }
+	{ sub r5, r6, r7 ; lb_u r25, r26 ; andi r15, r16, 5 }
+	{ sub r5, r6, r7 ; lb_u r25, r26 ; shli r15, r16, 5 }
+	{ sub r5, r6, r7 ; lh r25, r26 ; and r15, r16, r17 }
+	{ sub r5, r6, r7 ; lh r25, r26 ; shl r15, r16, r17 }
+	{ sub r5, r6, r7 ; lh_u r25, r26 ; andi r15, r16, 5 }
+	{ sub r5, r6, r7 ; lh_u r25, r26 ; shli r15, r16, 5 }
+	{ sub r5, r6, r7 ; lw r25, r26 ; addi r15, r16, 5 }
+	{ sub r5, r6, r7 ; lw r25, r26 ; seqi r15, r16, 5 }
+	{ sub r5, r6, r7 ; maxb_u r15, r16, r17 }
+	{ sub r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sub r5, r6, r7 ; movei r15, 5 ; sh r25, r26 }
+	{ sub r5, r6, r7 ; nop ; lh r25, r26 }
+	{ sub r5, r6, r7 ; or r15, r16, r17 ; lh r25, r26 }
+	{ sub r5, r6, r7 ; packhs r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch r25 ; s1a r15, r16, r17 }
+	{ sub r5, r6, r7 ; prefetch r25 }
+	{ sub r5, r6, r7 ; rli r15, r16, 5 ; sw r25, r26 }
+	{ sub r5, r6, r7 ; s2a r15, r16, r17 ; sw r25, r26 }
+	{ sub r5, r6, r7 ; sb r25, r26 ; mnz r15, r16, r17 }
+	{ sub r5, r6, r7 ; sb r25, r26 ; slt_u r15, r16, r17 }
+	{ sub r5, r6, r7 ; seq r15, r16, r17 ; sw r25, r26 }
+	{ sub r5, r6, r7 ; sh r25, r26 ; andi r15, r16, 5 }
+	{ sub r5, r6, r7 ; sh r25, r26 ; shli r15, r16, 5 }
+	{ sub r5, r6, r7 ; shl r15, r16, r17 ; lw r25, r26 }
+	{ sub r5, r6, r7 ; shr r15, r16, r17 ; lb r25, r26 }
+	{ sub r5, r6, r7 ; shri r15, r16, 5 ; sw r25, r26 }
+	{ sub r5, r6, r7 ; slt_u r15, r16, r17 ; sb r25, r26 }
+	{ sub r5, r6, r7 ; slte_u r15, r16, r17 ; lw r25, r26 }
+	{ sub r5, r6, r7 ; slti r15, r16, 5 ; sw r25, r26 }
+	{ sub r5, r6, r7 ; sne r15, r16, r17 ; lw r25, r26 }
+	{ sub r5, r6, r7 ; srai r15, r16, 5 ; lb r25, r26 }
+	{ sub r5, r6, r7 ; sub r15, r16, r17 ; sw r25, r26 }
+	{ sub r5, r6, r7 ; sw r25, r26 ; nor r15, r16, r17 }
+	{ sub r5, r6, r7 ; sw r25, r26 ; sne r15, r16, r17 }
+	{ subb r15, r16, r17 ; add r5, r6, r7 }
+	{ subb r15, r16, r17 ; clz r5, r6 }
+	{ subb r15, r16, r17 ; mm r5, r6, r7, 5, 7 }
+	{ subb r15, r16, r17 ; mulhla_su r5, r6, r7 }
+	{ subb r15, r16, r17 ; packbs_u r5, r6, r7 }
+	{ subb r15, r16, r17 ; seqib r5, r6, 5 }
+	{ subb r15, r16, r17 ; slteb r5, r6, r7 }
+	{ subb r15, r16, r17 ; sraih r5, r6, 5 }
+	{ subb r5, r6, r7 ; addih r15, r16, 5 }
+	{ subb r5, r6, r7 ; iret }
+	{ subb r5, r6, r7 ; maxib_u r15, r16, 5 }
+	{ subb r5, r6, r7 ; nop }
+	{ subb r5, r6, r7 ; seqi r15, r16, 5 }
+	{ subb r5, r6, r7 ; sltb_u r15, r16, r17 }
+	{ subb r5, r6, r7 ; srah r15, r16, r17 }
+	{ subbs_u r15, r16, r17 ; addhs r5, r6, r7 }
+	{ subbs_u r15, r16, r17 ; dword_align r5, r6, r7 }
+	{ subbs_u r15, r16, r17 ; move r5, r6 }
+	{ subbs_u r15, r16, r17 ; mulll_ss r5, r6, r7 }
+	{ subbs_u r15, r16, r17 ; pcnt r5, r6 }
+	{ subbs_u r15, r16, r17 ; shlh r5, r6, r7 }
+	{ subbs_u r15, r16, r17 ; slth r5, r6, r7 }
+	{ subbs_u r15, r16, r17 ; subh r5, r6, r7 }
+	{ subbs_u r5, r6, r7 ; and r15, r16, r17 }
+	{ subbs_u r5, r6, r7 ; jrp r15 }
+	{ subbs_u r5, r6, r7 ; minb_u r15, r16, r17 }
+	{ subbs_u r5, r6, r7 ; packbs_u r15, r16, r17 }
+	{ subbs_u r5, r6, r7 ; shadd r15, r16, 5 }
+	{ subbs_u r5, r6, r7 ; slteb_u r15, r16, r17 }
+	{ subbs_u r5, r6, r7 ; sub r15, r16, r17 }
+	{ subh r15, r16, r17 ; addli r5, r6, 0x1234 }
+	{ subh r15, r16, r17 ; inthb r5, r6, r7 }
+	{ subh r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ subh r15, r16, r17 ; mullla_su r5, r6, r7 }
+	{ subh r15, r16, r17 ; s2a r5, r6, r7 }
+	{ subh r15, r16, r17 ; shr r5, r6, r7 }
+	{ subh r15, r16, r17 ; sltib r5, r6, 5 }
+	{ subh r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ subh r5, r6, r7 ; finv r15 }
+	{ subh r5, r6, r7 ; lbadd_u r15, r16, 5 }
+	{ subh r5, r6, r7 ; mm r15, r16, r17, 5, 7 }
+	{ subh r5, r6, r7 ; prefetch r15 }
+	{ subh r5, r6, r7 ; shli r15, r16, 5 }
+	{ subh r5, r6, r7 ; slth_u r15, r16, r17 }
+	{ subh r5, r6, r7 ; subhs r15, r16, r17 }
+	{ subhs r15, r16, r17 ; adiffh r5, r6, r7 }
+	{ subhs r15, r16, r17 ; maxb_u r5, r6, r7 }
+	{ subhs r15, r16, r17 ; mulhha_su r5, r6, r7 }
+	{ subhs r15, r16, r17 ; mvz r5, r6, r7 }
+	{ subhs r15, r16, r17 ; sadah_u r5, r6, r7 }
+	{ subhs r15, r16, r17 ; shrib r5, r6, 5 }
+	{ subhs r15, r16, r17 ; sne r5, r6, r7 }
+	{ subhs r15, r16, r17 ; xori r5, r6, 5 }
+	{ subhs r5, r6, r7 ; ill }
+	{ subhs r5, r6, r7 ; lhadd_u r15, r16, 5 }
+	{ subhs r5, r6, r7 ; move r15, r16 }
+	{ subhs r5, r6, r7 ; s1a r15, r16, r17 }
+	{ subhs r5, r6, r7 ; shrb r15, r16, r17 }
+	{ subhs r5, r6, r7 ; sltib_u r15, r16, 5 }
+	{ subhs r5, r6, r7 ; tns r15, r16 }
+	{ subs r15, r16, r17 ; avgb_u r5, r6, r7 }
+	{ subs r15, r16, r17 ; minb_u r5, r6, r7 }
+	{ subs r15, r16, r17 ; mulhl_su r5, r6, r7 }
+	{ subs r15, r16, r17 ; nop }
+	{ subs r15, r16, r17 ; seq r5, r6, r7 }
+	{ subs r15, r16, r17 ; sltb r5, r6, r7 }
+	{ subs r15, r16, r17 ; srab r5, r6, r7 }
+	{ subs r5, r6, r7 ; addh r15, r16, r17 }
+	{ subs r5, r6, r7 ; inthh r15, r16, r17 }
+	{ subs r5, r6, r7 ; lwadd r15, r16, 5 }
+	{ subs r5, r6, r7 ; mtspr 0x5, r16 }
+	{ subs r5, r6, r7 ; sbadd r15, r16, 5 }
+	{ subs r5, r6, r7 ; shrih r15, r16, 5 }
+	{ subs r5, r6, r7 ; sneb r15, r16, r17 }
+	{ sw r15, r16 ; add r5, r6, r7 }
+	{ sw r15, r16 ; clz r5, r6 }
+	{ sw r15, r16 ; mm r5, r6, r7, 5, 7 }
+	{ sw r15, r16 ; mulhla_su r5, r6, r7 }
+	{ sw r15, r16 ; packbs_u r5, r6, r7 }
+	{ sw r15, r16 ; seqib r5, r6, 5 }
+	{ sw r15, r16 ; slteb r5, r6, r7 }
+	{ sw r15, r16 ; sraih r5, r6, 5 }
+	{ sw r25, r26 ; add r15, r16, r17 ; ctz r5, r6 }
+	{ sw r25, r26 ; add r15, r16, r17 ; or r5, r6, r7 }
+	{ sw r25, r26 ; add r15, r16, r17 ; sne r5, r6, r7 }
+	{ sw r25, r26 ; add r5, r6, r7 ; mz r15, r16, r17 }
+	{ sw r25, r26 ; add r5, r6, r7 ; slti r15, r16, 5 }
+	{ sw r25, r26 ; addi r15, r16, 5 ; movei r5, 5 }
+	{ sw r25, r26 ; addi r15, r16, 5 ; s1a r5, r6, r7 }
+	{ sw r25, r26 ; addi r15, r16, 5 ; tblidxb1 r5, r6 }
+	{ sw r25, r26 ; addi r5, r6, 5 ; rl r15, r16, r17 }
+	{ sw r25, r26 ; addi r5, r6, 5 ; sub r15, r16, r17 }
+	{ sw r25, r26 ; and r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ sw r25, r26 ; and r15, r16, r17 ; shl r5, r6, r7 }
+	{ sw r25, r26 ; and r5, r6, r7 ; add r15, r16, r17 }
+	{ sw r25, r26 ; and r5, r6, r7 ; seq r15, r16, r17 }
+	{ sw r25, r26 ; andi r15, r16, 5 ; and r5, r6, r7 }
+	{ sw r25, r26 ; andi r15, r16, 5 ; mvnz r5, r6, r7 }
+	{ sw r25, r26 ; andi r15, r16, 5 ; slt_u r5, r6, r7 }
+	{ sw r25, r26 ; andi r5, r6, 5 ; ill }
+	{ sw r25, r26 ; andi r5, r6, 5 ; shri r15, r16, 5 }
+	{ sw r25, r26 ; bitx r5, r6 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; bitx r5, r6 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; bytex r5, r6 ; movei r15, 5 }
+	{ sw r25, r26 ; bytex r5, r6 ; slte_u r15, r16, r17 }
+	{ sw r25, r26 ; clz r5, r6 ; nop }
+	{ sw r25, r26 ; clz r5, r6 ; slti_u r15, r16, 5 }
+	{ sw r25, r26 ; ctz r5, r6 ; or r15, r16, r17 }
+	{ sw r25, r26 ; ctz r5, r6 ; sra r15, r16, r17 }
+	{ sw r25, r26 ; fnop ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; fnop ; nor r15, r16, r17 }
+	{ sw r25, r26 ; fnop ; seqi r5, r6, 5 }
+	{ sw r25, r26 ; fnop ; slti_u r5, r6, 5 }
+	{ sw r25, r26 ; ill ; bitx r5, r6 }
+	{ sw r25, r26 ; ill ; mz r5, r6, r7 }
+	{ sw r25, r26 ; ill ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; info 19 ; andi r5, r6, 5 }
+	{ sw r25, r26 ; info 19 ; mulll_uu r5, r6, r7 }
+	{ sw r25, r26 ; info 19 ; s1a r5, r6, r7 }
+	{ sw r25, r26 ; info 19 ; slt_u r5, r6, r7 }
+	{ sw r25, r26 ; info 19 ; tblidxb3 r5, r6 }
+	{ sw r25, r26 ; mnz r15, r16, r17 ; mulhha_uu r5, r6, r7 }
+	{ sw r25, r26 ; mnz r15, r16, r17 ; seqi r5, r6, 5 }
+	{ sw r25, r26 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; mnz r5, r6, r7 ; s3a r15, r16, r17 }
+	{ sw r25, r26 ; move r15, r16 ; addi r5, r6, 5 }
+	{ sw r25, r26 ; move r15, r16 ; mullla_uu r5, r6, r7 }
+	{ sw r25, r26 ; move r15, r16 ; slt r5, r6, r7 }
+	{ sw r25, r26 ; move r5, r6 ; fnop }
+	{ sw r25, r26 ; move r5, r6 ; shr r15, r16, r17 }
+	{ sw r25, r26 ; movei r15, 5 ; clz r5, r6 }
+	{ sw r25, r26 ; movei r15, 5 ; nor r5, r6, r7 }
+	{ sw r25, r26 ; movei r15, 5 ; slti_u r5, r6, 5 }
+	{ sw r25, r26 ; movei r5, 5 ; movei r15, 5 }
+	{ sw r25, r26 ; movei r5, 5 ; slte_u r15, r16, r17 }
+	{ sw r25, r26 ; mulhh_ss r5, r6, r7 ; nop }
+	{ sw r25, r26 ; mulhh_ss r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sw r25, r26 ; mulhh_uu r5, r6, r7 ; or r15, r16, r17 }
+	{ sw r25, r26 ; mulhh_uu r5, r6, r7 ; sra r15, r16, r17 }
+	{ sw r25, r26 ; mulhha_ss r5, r6, r7 ; rl r15, r16, r17 }
+	{ sw r25, r26 ; mulhha_ss r5, r6, r7 ; sub r15, r16, r17 }
+	{ sw r25, r26 ; mulhha_uu r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sw r25, r26 ; mulhha_uu r5, r6, r7 }
+	{ sw r25, r26 ; mulhlsa_uu r5, r6, r7 ; s3a r15, r16, r17 }
+	{ sw r25, r26 ; mulll_ss r5, r6, r7 ; addi r15, r16, 5 }
+	{ sw r25, r26 ; mulll_ss r5, r6, r7 ; seqi r15, r16, 5 }
+	{ sw r25, r26 ; mulll_uu r5, r6, r7 ; andi r15, r16, 5 }
+	{ sw r25, r26 ; mulll_uu r5, r6, r7 ; shli r15, r16, 5 }
+	{ sw r25, r26 ; mullla_ss r5, r6, r7 ; ill }
+	{ sw r25, r26 ; mullla_ss r5, r6, r7 ; shri r15, r16, 5 }
+	{ sw r25, r26 ; mullla_uu r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; mullla_uu r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; mvnz r5, r6, r7 ; movei r15, 5 }
+	{ sw r25, r26 ; mvnz r5, r6, r7 ; slte_u r15, r16, r17 }
+	{ sw r25, r26 ; mvz r5, r6, r7 ; nop }
+	{ sw r25, r26 ; mvz r5, r6, r7 ; slti_u r15, r16, 5 }
+	{ sw r25, r26 ; mz r15, r16, r17 ; mulhh_ss r5, r6, r7 }
+	{ sw r25, r26 ; mz r15, r16, r17 ; s2a r5, r6, r7 }
+	{ sw r25, r26 ; mz r15, r16, r17 ; tblidxb2 r5, r6 }
+	{ sw r25, r26 ; mz r5, r6, r7 ; rli r15, r16, 5 }
+	{ sw r25, r26 ; mz r5, r6, r7 ; xor r15, r16, r17 }
+	{ sw r25, r26 ; nop ; move r5, r6 }
+	{ sw r25, r26 ; nop ; or r5, r6, r7 }
+	{ sw r25, r26 ; nop ; shli r15, r16, 5 }
+	{ sw r25, r26 ; nop ; sra r15, r16, r17 }
+	{ sw r25, r26 ; nor r15, r16, r17 ; ctz r5, r6 }
+	{ sw r25, r26 ; nor r15, r16, r17 ; or r5, r6, r7 }
+	{ sw r25, r26 ; nor r15, r16, r17 ; sne r5, r6, r7 }
+	{ sw r25, r26 ; nor r5, r6, r7 ; mz r15, r16, r17 }
+	{ sw r25, r26 ; nor r5, r6, r7 ; slti r15, r16, 5 }
+	{ sw r25, r26 ; or r15, r16, r17 ; movei r5, 5 }
+	{ sw r25, r26 ; or r15, r16, r17 ; s1a r5, r6, r7 }
+	{ sw r25, r26 ; or r15, r16, r17 ; tblidxb1 r5, r6 }
+	{ sw r25, r26 ; or r5, r6, r7 ; rl r15, r16, r17 }
+	{ sw r25, r26 ; or r5, r6, r7 ; sub r15, r16, r17 }
+	{ sw r25, r26 ; ori r15, r16, 5 ; mulhlsa_uu r5, r6, r7 }
+	{ sw r25, r26 ; ori r15, r16, 5 ; shl r5, r6, r7 }
+	{ sw r25, r26 ; ori r5, r6, 5 ; add r15, r16, r17 }
+	{ sw r25, r26 ; ori r5, r6, 5 ; seq r15, r16, r17 }
+	{ sw r25, r26 ; pcnt r5, r6 ; and r15, r16, r17 }
+	{ sw r25, r26 ; pcnt r5, r6 ; shl r15, r16, r17 }
+	{ sw r25, r26 ; rl r15, r16, r17 ; bitx r5, r6 }
+	{ sw r25, r26 ; rl r15, r16, r17 ; mz r5, r6, r7 }
+	{ sw r25, r26 ; rl r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; rl r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; rl r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; rli r15, r16, 5 ; info 19 }
+	{ sw r25, r26 ; rli r15, r16, 5 ; pcnt r5, r6 }
+	{ sw r25, r26 ; rli r15, r16, 5 ; srai r5, r6, 5 }
+	{ sw r25, r26 ; rli r5, r6, 5 ; nor r15, r16, r17 }
+	{ sw r25, r26 ; rli r5, r6, 5 ; sne r15, r16, r17 }
+	{ sw r25, r26 ; s1a r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sw r25, r26 ; s1a r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sw r25, r26 ; s1a r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sw r25, r26 ; s1a r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sw r25, r26 ; s1a r5, r6, r7 }
+	{ sw r25, r26 ; s2a r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sw r25, r26 ; s2a r15, r16, r17 ; shr r5, r6, r7 }
+	{ sw r25, r26 ; s2a r5, r6, r7 ; and r15, r16, r17 }
+	{ sw r25, r26 ; s2a r5, r6, r7 ; shl r15, r16, r17 }
+	{ sw r25, r26 ; s3a r15, r16, r17 ; bitx r5, r6 }
+	{ sw r25, r26 ; s3a r15, r16, r17 ; mz r5, r6, r7 }
+	{ sw r25, r26 ; s3a r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; s3a r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; s3a r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; seq r15, r16, r17 ; info 19 }
+	{ sw r25, r26 ; seq r15, r16, r17 ; pcnt r5, r6 }
+	{ sw r25, r26 ; seq r15, r16, r17 ; srai r5, r6, 5 }
+	{ sw r25, r26 ; seq r5, r6, r7 ; nor r15, r16, r17 }
+	{ sw r25, r26 ; seq r5, r6, r7 ; sne r15, r16, r17 }
+	{ sw r25, r26 ; seqi r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ sw r25, r26 ; seqi r15, r16, 5 ; s3a r5, r6, r7 }
+	{ sw r25, r26 ; seqi r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ sw r25, r26 ; seqi r5, r6, 5 ; s1a r15, r16, r17 }
+	{ sw r25, r26 ; seqi r5, r6, 5 }
+	{ sw r25, r26 ; shl r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sw r25, r26 ; shl r15, r16, r17 ; shr r5, r6, r7 }
+	{ sw r25, r26 ; shl r5, r6, r7 ; and r15, r16, r17 }
+	{ sw r25, r26 ; shl r5, r6, r7 ; shl r15, r16, r17 }
+	{ sw r25, r26 ; shli r15, r16, 5 ; bitx r5, r6 }
+	{ sw r25, r26 ; shli r15, r16, 5 ; mz r5, r6, r7 }
+	{ sw r25, r26 ; shli r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; shli r5, r6, 5 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; shli r5, r6, 5 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; shr r15, r16, r17 ; info 19 }
+	{ sw r25, r26 ; shr r15, r16, r17 ; pcnt r5, r6 }
+	{ sw r25, r26 ; shr r15, r16, r17 ; srai r5, r6, 5 }
+	{ sw r25, r26 ; shr r5, r6, r7 ; nor r15, r16, r17 }
+	{ sw r25, r26 ; shr r5, r6, r7 ; sne r15, r16, r17 }
+	{ sw r25, r26 ; shri r15, r16, 5 ; mulhh_uu r5, r6, r7 }
+	{ sw r25, r26 ; shri r15, r16, 5 ; s3a r5, r6, r7 }
+	{ sw r25, r26 ; shri r15, r16, 5 ; tblidxb3 r5, r6 }
+	{ sw r25, r26 ; shri r5, r6, 5 ; s1a r15, r16, r17 }
+	{ sw r25, r26 ; shri r5, r6, 5 }
+	{ sw r25, r26 ; slt r15, r16, r17 ; mulll_uu r5, r6, r7 }
+	{ sw r25, r26 ; slt r15, r16, r17 ; shr r5, r6, r7 }
+	{ sw r25, r26 ; slt r5, r6, r7 ; and r15, r16, r17 }
+	{ sw r25, r26 ; slt r5, r6, r7 ; shl r15, r16, r17 }
+	{ sw r25, r26 ; slt_u r15, r16, r17 ; bitx r5, r6 }
+	{ sw r25, r26 ; slt_u r15, r16, r17 ; mz r5, r6, r7 }
+	{ sw r25, r26 ; slt_u r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; slt_u r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; slt_u r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; slte r15, r16, r17 ; info 19 }
+	{ sw r25, r26 ; slte r15, r16, r17 ; pcnt r5, r6 }
+	{ sw r25, r26 ; slte r15, r16, r17 ; srai r5, r6, 5 }
+	{ sw r25, r26 ; slte r5, r6, r7 ; nor r15, r16, r17 }
+	{ sw r25, r26 ; slte r5, r6, r7 ; sne r15, r16, r17 }
+	{ sw r25, r26 ; slte_u r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sw r25, r26 ; slte_u r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sw r25, r26 ; slte_u r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sw r25, r26 ; slte_u r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sw r25, r26 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; slti r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ sw r25, r26 ; slti r15, r16, 5 ; shr r5, r6, r7 }
+	{ sw r25, r26 ; slti r5, r6, 5 ; and r15, r16, r17 }
+	{ sw r25, r26 ; slti r5, r6, 5 ; shl r15, r16, r17 }
+	{ sw r25, r26 ; slti_u r15, r16, 5 ; bitx r5, r6 }
+	{ sw r25, r26 ; slti_u r15, r16, 5 ; mz r5, r6, r7 }
+	{ sw r25, r26 ; slti_u r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; slti_u r5, r6, 5 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; slti_u r5, r6, 5 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; sne r15, r16, r17 ; info 19 }
+	{ sw r25, r26 ; sne r15, r16, r17 ; pcnt r5, r6 }
+	{ sw r25, r26 ; sne r15, r16, r17 ; srai r5, r6, 5 }
+	{ sw r25, r26 ; sne r5, r6, r7 ; nor r15, r16, r17 }
+	{ sw r25, r26 ; sne r5, r6, r7 ; sne r15, r16, r17 }
+	{ sw r25, r26 ; sra r15, r16, r17 ; mulhh_uu r5, r6, r7 }
+	{ sw r25, r26 ; sra r15, r16, r17 ; s3a r5, r6, r7 }
+	{ sw r25, r26 ; sra r15, r16, r17 ; tblidxb3 r5, r6 }
+	{ sw r25, r26 ; sra r5, r6, r7 ; s1a r15, r16, r17 }
+	{ sw r25, r26 ; sra r5, r6, r7 }
+	{ sw r25, r26 ; srai r15, r16, 5 ; mulll_uu r5, r6, r7 }
+	{ sw r25, r26 ; srai r15, r16, 5 ; shr r5, r6, r7 }
+	{ sw r25, r26 ; srai r5, r6, 5 ; and r15, r16, r17 }
+	{ sw r25, r26 ; srai r5, r6, 5 ; shl r15, r16, r17 }
+	{ sw r25, r26 ; sub r15, r16, r17 ; bitx r5, r6 }
+	{ sw r25, r26 ; sub r15, r16, r17 ; mz r5, r6, r7 }
+	{ sw r25, r26 ; sub r15, r16, r17 ; slte_u r5, r6, r7 }
+	{ sw r25, r26 ; sub r5, r6, r7 ; mnz r15, r16, r17 }
+	{ sw r25, r26 ; sub r5, r6, r7 ; slt_u r15, r16, r17 }
+	{ sw r25, r26 ; tblidxb0 r5, r6 ; movei r15, 5 }
+	{ sw r25, r26 ; tblidxb0 r5, r6 ; slte_u r15, r16, r17 }
+	{ sw r25, r26 ; tblidxb1 r5, r6 ; nop }
+	{ sw r25, r26 ; tblidxb1 r5, r6 ; slti_u r15, r16, 5 }
+	{ sw r25, r26 ; tblidxb2 r5, r6 ; or r15, r16, r17 }
+	{ sw r25, r26 ; tblidxb2 r5, r6 ; sra r15, r16, r17 }
+	{ sw r25, r26 ; tblidxb3 r5, r6 ; rl r15, r16, r17 }
+	{ sw r25, r26 ; tblidxb3 r5, r6 ; sub r15, r16, r17 }
+	{ sw r25, r26 ; xor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 }
+	{ sw r25, r26 ; xor r15, r16, r17 ; shl r5, r6, r7 }
+	{ sw r25, r26 ; xor r5, r6, r7 ; add r15, r16, r17 }
+	{ sw r25, r26 ; xor r5, r6, r7 ; seq r15, r16, r17 }
+	{ swadd r15, r16, 5 ; addbs_u r5, r6, r7 }
+	{ swadd r15, r16, 5 ; crc32_8 r5, r6, r7 }
+	{ swadd r15, r16, 5 ; mnzb r5, r6, r7 }
+	{ swadd r15, r16, 5 ; mulhla_uu r5, r6, r7 }
+	{ swadd r15, r16, 5 ; packhs r5, r6, r7 }
+	{ swadd r15, r16, 5 ; shl r5, r6, r7 }
+	{ swadd r15, r16, 5 ; slteh r5, r6, r7 }
+	{ swadd r15, r16, 5 ; subb r5, r6, r7 }
+	{ tblidxb0 r5, r6 ; add r15, r16, r17 ; prefetch r25 }
+	{ tblidxb0 r5, r6 ; addih r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; andi r15, r16, 5 ; sb r25, r26 }
+	{ tblidxb0 r5, r6 ; ill ; lb_u r25, r26 }
+	{ tblidxb0 r5, r6 ; inthb r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; lb r25, r26 ; movei r15, 5 }
+	{ tblidxb0 r5, r6 ; lb r25, r26 ; slte_u r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; lb_u r25, r26 ; mz r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; lb_u r25, r26 ; slti r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; lh r25, r26 ; movei r15, 5 }
+	{ tblidxb0 r5, r6 ; lh r25, r26 ; slte_u r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; lh_u r25, r26 ; mz r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; lh_u r25, r26 ; slti r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; lw r25, r26 ; move r15, r16 }
+	{ tblidxb0 r5, r6 ; lw r25, r26 ; slte r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; minh r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; move r15, r16 ; lw r25, r26 }
+	{ tblidxb0 r5, r6 ; mz r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb0 r5, r6 ; nop }
+	{ tblidxb0 r5, r6 ; or r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; prefetch r25 ; fnop }
+	{ tblidxb0 r5, r6 ; prefetch r25 ; shr r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; rl r15, r16, r17 ; prefetch r25 }
+	{ tblidxb0 r5, r6 ; s1a r15, r16, r17 ; prefetch r25 }
+	{ tblidxb0 r5, r6 ; s3a r15, r16, r17 ; prefetch r25 }
+	{ tblidxb0 r5, r6 ; sb r25, r26 ; ori r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; sb r25, r26 ; srai r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; seqi r15, r16, 5 ; lh_u r25, r26 }
+	{ tblidxb0 r5, r6 ; sh r25, r26 ; mz r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; sh r25, r26 ; slti r15, r16, 5 }
+	{ tblidxb0 r5, r6 ; shlh r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; shr r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb0 r5, r6 ; slt r15, r16, r17 ; lh_u r25, r26 }
+	{ tblidxb0 r5, r6 ; slte r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb0 r5, r6 ; slteb_u r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; slti_u r15, r16, 5 ; prefetch r25 }
+	{ tblidxb0 r5, r6 ; sneh r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; srai r15, r16, 5 ; sh r25, r26 }
+	{ tblidxb0 r5, r6 ; sw r15, r16 }
+	{ tblidxb0 r5, r6 ; sw r25, r26 ; s3a r15, r16, r17 }
+	{ tblidxb0 r5, r6 ; tns r15, r16 }
+	{ tblidxb1 r5, r6 ; add r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb1 r5, r6 ; addlis r15, r16, 0x1234 }
+	{ tblidxb1 r5, r6 ; andi r15, r16, 5 ; sw r25, r26 }
+	{ tblidxb1 r5, r6 ; ill ; lh_u r25, r26 }
+	{ tblidxb1 r5, r6 ; intlb r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lb r25, r26 ; nop }
+	{ tblidxb1 r5, r6 ; lb r25, r26 ; slti_u r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; lb_u r25, r26 ; nor r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lb_u r25, r26 ; sne r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lh r25, r26 ; nop }
+	{ tblidxb1 r5, r6 ; lh r25, r26 ; slti_u r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; lh_u r25, r26 ; nor r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lh_u r25, r26 ; sne r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lw r25, r26 ; mz r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; lw r25, r26 ; slti r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; minih r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; move r15, r16 ; sb r25, r26 }
+	{ tblidxb1 r5, r6 ; mz r15, r16, r17 ; lh_u r25, r26 }
+	{ tblidxb1 r5, r6 ; nor r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb1 r5, r6 ; ori r15, r16, 5 ; lb_u r25, r26 }
+	{ tblidxb1 r5, r6 ; prefetch r25 ; info 19 }
+	{ tblidxb1 r5, r6 ; prefetch r25 ; slt r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; rl r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb1 r5, r6 ; s1a r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb1 r5, r6 ; s3a r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb1 r5, r6 ; sb r25, r26 ; rli r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; sb r25, r26 ; xor r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; seqi r15, r16, 5 ; prefetch r25 }
+	{ tblidxb1 r5, r6 ; sh r25, r26 ; nor r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; sh r25, r26 ; sne r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; shli r15, r16, 5 ; lb_u r25, r26 }
+	{ tblidxb1 r5, r6 ; shr r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; slt r15, r16, r17 ; prefetch r25 }
+	{ tblidxb1 r5, r6 ; slte r15, r16, r17 ; lh_u r25, r26 }
+	{ tblidxb1 r5, r6 ; slteh_u r15, r16, r17 }
+	{ tblidxb1 r5, r6 ; slti_u r15, r16, 5 ; sh r25, r26 }
+	{ tblidxb1 r5, r6 ; sra r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb1 r5, r6 ; srai r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; sw r25, r26 ; addi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; sw r25, r26 ; seqi r15, r16, 5 }
+	{ tblidxb1 r5, r6 ; xor r15, r16, r17 ; lb r25, r26 }
+	{ tblidxb2 r5, r6 ; add r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; and r15, r16, r17 ; lb r25, r26 }
+	{ tblidxb2 r5, r6 ; auli r15, r16, 0x1234 }
+	{ tblidxb2 r5, r6 ; ill ; prefetch r25 }
+	{ tblidxb2 r5, r6 ; inv r15 }
+	{ tblidxb2 r5, r6 ; lb r25, r26 ; or r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; lb r25, r26 ; sra r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; lb_u r25, r26 ; ori r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; lb_u r25, r26 ; srai r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; lh r25, r26 ; or r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; lh r25, r26 ; sra r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; lh_u r25, r26 ; ori r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; lh_u r25, r26 ; srai r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; lw r25, r26 ; nor r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; lw r25, r26 ; sne r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; mnz r15, r16, r17 ; lb r25, r26 }
+	{ tblidxb2 r5, r6 ; move r15, r16 ; sw r25, r26 }
+	{ tblidxb2 r5, r6 ; mz r15, r16, r17 ; prefetch r25 }
+	{ tblidxb2 r5, r6 ; nor r15, r16, r17 ; lh_u r25, r26 }
+	{ tblidxb2 r5, r6 ; ori r15, r16, 5 ; lh_u r25, r26 }
+	{ tblidxb2 r5, r6 ; prefetch r25 ; move r15, r16 }
+	{ tblidxb2 r5, r6 ; prefetch r25 ; slte r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; rl r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; s1a r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; s3a r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; sb r25, r26 ; s2a r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; sbadd r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; seqi r15, r16, 5 ; sh r25, r26 }
+	{ tblidxb2 r5, r6 ; sh r25, r26 ; ori r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; sh r25, r26 ; srai r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; shli r15, r16, 5 ; lh_u r25, r26 }
+	{ tblidxb2 r5, r6 ; shrh r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; slt r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb2 r5, r6 ; slte r15, r16, r17 ; prefetch r25 }
+	{ tblidxb2 r5, r6 ; slth_u r15, r16, r17 }
+	{ tblidxb2 r5, r6 ; slti_u r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; sra r15, r16, r17 ; lh_u r25, r26 }
+	{ tblidxb2 r5, r6 ; sraih r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; sw r25, r26 ; andi r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; sw r25, r26 ; shli r15, r16, 5 }
+	{ tblidxb2 r5, r6 ; xor r15, r16, r17 ; lh r25, r26 }
+	{ tblidxb3 r5, r6 ; addbs_u r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; and r15, r16, r17 ; lh r25, r26 }
+	{ tblidxb3 r5, r6 ; finv r15 }
+	{ tblidxb3 r5, r6 ; ill ; sh r25, r26 }
+	{ tblidxb3 r5, r6 ; jalr r15 }
+	{ tblidxb3 r5, r6 ; lb r25, r26 ; rl r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; lb r25, r26 ; sub r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; lb_u r25, r26 ; rli r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; lb_u r25, r26 ; xor r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; lh r25, r26 ; rl r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; lh r25, r26 ; sub r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; lh_u r25, r26 ; rli r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; lh_u r25, r26 ; xor r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; lw r25, r26 ; ori r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; lw r25, r26 ; srai r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; mnz r15, r16, r17 ; lh r25, r26 }
+	{ tblidxb3 r5, r6 ; movei r15, 5 ; lb r25, r26 }
+	{ tblidxb3 r5, r6 ; mz r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb3 r5, r6 ; nor r15, r16, r17 ; prefetch r25 }
+	{ tblidxb3 r5, r6 ; ori r15, r16, 5 ; prefetch r25 }
+	{ tblidxb3 r5, r6 ; prefetch r25 ; mz r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; prefetch r25 ; slti r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; rli r15, r16, 5 ; lb_u r25, r26 }
+	{ tblidxb3 r5, r6 ; s2a r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb3 r5, r6 ; sb r25, r26 ; add r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; sb r25, r26 ; seq r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; seq r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb3 r5, r6 ; seqi r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; sh r25, r26 ; rli r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; sh r25, r26 ; xor r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; shli r15, r16, 5 ; prefetch r25 }
+	{ tblidxb3 r5, r6 ; shri r15, r16, 5 ; lb_u r25, r26 }
+	{ tblidxb3 r5, r6 ; slt r15, r16, r17 }
+	{ tblidxb3 r5, r6 ; slte r15, r16, r17 ; sh r25, r26 }
+	{ tblidxb3 r5, r6 ; slti r15, r16, 5 ; lb_u r25, r26 }
+	{ tblidxb3 r5, r6 ; sltib_u r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; sra r15, r16, r17 ; prefetch r25 }
+	{ tblidxb3 r5, r6 ; sub r15, r16, r17 ; lb_u r25, r26 }
+	{ tblidxb3 r5, r6 ; sw r25, r26 ; ill }
+	{ tblidxb3 r5, r6 ; sw r25, r26 ; shri r15, r16, 5 }
+	{ tblidxb3 r5, r6 ; xor r15, r16, r17 ; lw r25, r26 }
+	{ tns r15, r16 ; and r5, r6, r7 }
+	{ tns r15, r16 ; maxh r5, r6, r7 }
+	{ tns r15, r16 ; mulhha_uu r5, r6, r7 }
+	{ tns r15, r16 ; mz r5, r6, r7 }
+	{ tns r15, r16 ; sadb_u r5, r6, r7 }
+	{ tns r15, r16 ; shrih r5, r6, 5 }
+	{ tns r15, r16 ; sneb r5, r6, r7 }
+	{ wh64 r15 ; add r5, r6, r7 }
+	{ wh64 r15 ; clz r5, r6 }
+	{ wh64 r15 ; mm r5, r6, r7, 5, 7 }
+	{ wh64 r15 ; mulhla_su r5, r6, r7 }
+	{ wh64 r15 ; packbs_u r5, r6, r7 }
+	{ wh64 r15 ; seqib r5, r6, 5 }
+	{ wh64 r15 ; slteb r5, r6, r7 }
+	{ wh64 r15 ; sraih r5, r6, 5 }
+	{ xor r15, r16, r17 ; add r5, r6, r7 ; sh r25, r26 }
+	{ xor r15, r16, r17 ; addlis r5, r6, 0x1234 }
+	{ xor r15, r16, r17 ; andi r5, r6, 5 ; sb r25, r26 }
+	{ xor r15, r16, r17 ; bytex r5, r6 ; lh_u r25, r26 }
+	{ xor r15, r16, r17 ; ctz r5, r6 ; lb_u r25, r26 }
+	{ xor r15, r16, r17 ; info 19 ; lb r25, r26 }
+	{ xor r15, r16, r17 ; lb r25, r26 ; bytex r5, r6 }
+	{ xor r15, r16, r17 ; lb r25, r26 ; nop }
+	{ xor r15, r16, r17 ; lb r25, r26 ; slti r5, r6, 5 }
+	{ xor r15, r16, r17 ; lb_u r25, r26 ; fnop }
+	{ xor r15, r16, r17 ; lb_u r25, r26 ; ori r5, r6, 5 }
+	{ xor r15, r16, r17 ; lb_u r25, r26 ; sra r5, r6, r7 }
+	{ xor r15, r16, r17 ; lh r25, r26 ; move r5, r6 }
+	{ xor r15, r16, r17 ; lh r25, r26 ; rli r5, r6, 5 }
+	{ xor r15, r16, r17 ; lh r25, r26 ; tblidxb0 r5, r6 }
+	{ xor r15, r16, r17 ; lh_u r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ xor r15, r16, r17 ; lh_u r25, r26 ; s3a r5, r6, r7 }
+	{ xor r15, r16, r17 ; lh_u r25, r26 ; tblidxb3 r5, r6 }
+	{ xor r15, r16, r17 ; lw r25, r26 ; mulhlsa_uu r5, r6, r7 }
+	{ xor r15, r16, r17 ; lw r25, r26 ; shl r5, r6, r7 }
+	{ xor r15, r16, r17 ; maxb_u r5, r6, r7 }
+	{ xor r15, r16, r17 ; mnzh r5, r6, r7 }
+	{ xor r15, r16, r17 ; movei r5, 5 }
+	{ xor r15, r16, r17 ; mulhh_uu r5, r6, r7 ; sb r25, r26 }
+	{ xor r15, r16, r17 ; mulhha_uu r5, r6, r7 ; prefetch r25 }
+	{ xor r15, r16, r17 ; mulhlsa_uu r5, r6, r7 ; sb r25, r26 }
+	{ xor r15, r16, r17 ; mulll_uu r5, r6, r7 ; prefetch r25 }
+	{ xor r15, r16, r17 ; mullla_uu r5, r6, r7 ; lw r25, r26 }
+	{ xor r15, r16, r17 ; mvz r5, r6, r7 ; lh_u r25, r26 }
+	{ xor r15, r16, r17 ; nop ; lb_u r25, r26 }
+	{ xor r15, r16, r17 ; or r5, r6, r7 ; lb_u r25, r26 }
+	{ xor r15, r16, r17 ; packhb r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch r25 ; ctz r5, r6 }
+	{ xor r15, r16, r17 ; prefetch r25 ; or r5, r6, r7 }
+	{ xor r15, r16, r17 ; prefetch r25 ; sne r5, r6, r7 }
+	{ xor r15, r16, r17 ; rli r5, r6, 5 ; lb r25, r26 }
+	{ xor r15, r16, r17 ; s2a r5, r6, r7 ; lb r25, r26 }
+	{ xor r15, r16, r17 ; sadab_u r5, r6, r7 }
+	{ xor r15, r16, r17 ; sb r25, r26 ; mulhh_uu r5, r6, r7 }
+	{ xor r15, r16, r17 ; sb r25, r26 ; s3a r5, r6, r7 }
+	{ xor r15, r16, r17 ; sb r25, r26 ; tblidxb3 r5, r6 }
+	{ xor r15, r16, r17 ; seqi r5, r6, 5 ; prefetch r25 }
+	{ xor r15, r16, r17 ; sh r25, r26 ; mulhh_ss r5, r6, r7 }
+	{ xor r15, r16, r17 ; sh r25, r26 ; s2a r5, r6, r7 }
+	{ xor r15, r16, r17 ; sh r25, r26 ; tblidxb2 r5, r6 }
+	{ xor r15, r16, r17 ; shli r5, r6, 5 ; lw r25, r26 }
+	{ xor r15, r16, r17 ; shri r5, r6, 5 ; lb r25, r26 }
+	{ xor r15, r16, r17 ; slt r5, r6, r7 ; sw r25, r26 }
+	{ xor r15, r16, r17 ; slte r5, r6, r7 ; sb r25, r26 }
+	{ xor r15, r16, r17 ; slti r5, r6, 5 ; lb r25, r26 }
+	{ xor r15, r16, r17 ; sltib r5, r6, 5 }
+	{ xor r15, r16, r17 ; sra r5, r6, r7 ; lw r25, r26 }
+	{ xor r15, r16, r17 ; sub r5, r6, r7 ; lb r25, r26 }
+	{ xor r15, r16, r17 ; sw r25, r26 ; bytex r5, r6 }
+	{ xor r15, r16, r17 ; sw r25, r26 ; nop }
+	{ xor r15, r16, r17 ; sw r25, r26 ; slti r5, r6, 5 }
+	{ xor r15, r16, r17 ; tblidxb0 r5, r6 ; sw r25, r26 }
+	{ xor r15, r16, r17 ; tblidxb2 r5, r6 ; sw r25, r26 }
+	{ xor r15, r16, r17 ; xor r5, r6, r7 ; sw r25, r26 }
+	{ xor r5, r6, r7 ; addi r15, r16, 5 ; lh_u r25, r26 }
+	{ xor r5, r6, r7 ; and r15, r16, r17 ; sw r25, r26 }
+	{ xor r5, r6, r7 ; fnop ; lw r25, r26 }
+	{ xor r5, r6, r7 ; info 19 ; lh_u r25, r26 }
+	{ xor r5, r6, r7 ; lb r25, r26 ; addi r15, r16, 5 }
+	{ xor r5, r6, r7 ; lb r25, r26 ; seqi r15, r16, 5 }
+	{ xor r5, r6, r7 ; lb_u r25, r26 ; and r15, r16, r17 }
+	{ xor r5, r6, r7 ; lb_u r25, r26 ; shl r15, r16, r17 }
+	{ xor r5, r6, r7 ; lh r25, r26 ; addi r15, r16, 5 }
+	{ xor r5, r6, r7 ; lh r25, r26 ; seqi r15, r16, 5 }
+	{ xor r5, r6, r7 ; lh_u r25, r26 ; and r15, r16, r17 }
+	{ xor r5, r6, r7 ; lh_u r25, r26 ; shl r15, r16, r17 }
+	{ xor r5, r6, r7 ; lw r25, r26 ; add r15, r16, r17 }
+	{ xor r5, r6, r7 ; lw r25, r26 ; seq r15, r16, r17 }
+	{ xor r5, r6, r7 ; lwadd_na r15, r16, 5 }
+	{ xor r5, r6, r7 ; mnz r15, r16, r17 ; sw r25, r26 }
+	{ xor r5, r6, r7 ; movei r15, 5 ; sb r25, r26 }
+	{ xor r5, r6, r7 ; nop ; lb_u r25, r26 }
+	{ xor r5, r6, r7 ; or r15, r16, r17 ; lb_u r25, r26 }
+	{ xor r5, r6, r7 ; packhb r15, r16, r17 }
+	{ xor r5, r6, r7 ; prefetch r25 ; rli r15, r16, 5 }
+	{ xor r5, r6, r7 ; prefetch r25 ; xor r15, r16, r17 }
+	{ xor r5, r6, r7 ; rli r15, r16, 5 ; sh r25, r26 }
+	{ xor r5, r6, r7 ; s2a r15, r16, r17 ; sh r25, r26 }
+	{ xor r5, r6, r7 ; sb r25, r26 ; info 19 }
+	{ xor r5, r6, r7 ; sb r25, r26 ; slt r15, r16, r17 }
+	{ xor r5, r6, r7 ; seq r15, r16, r17 ; sh r25, r26 }
+	{ xor r5, r6, r7 ; sh r25, r26 ; and r15, r16, r17 }
+	{ xor r5, r6, r7 ; sh r25, r26 ; shl r15, r16, r17 }
+	{ xor r5, r6, r7 ; shl r15, r16, r17 ; lh_u r25, r26 }
+	{ xor r5, r6, r7 ; shlih r15, r16, 5 }
+	{ xor r5, r6, r7 ; shri r15, r16, 5 ; sh r25, r26 }
+	{ xor r5, r6, r7 ; slt_u r15, r16, r17 ; prefetch r25 }
+	{ xor r5, r6, r7 ; slte_u r15, r16, r17 ; lh_u r25, r26 }
+	{ xor r5, r6, r7 ; slti r15, r16, 5 ; sh r25, r26 }
+	{ xor r5, r6, r7 ; sne r15, r16, r17 ; lh_u r25, r26 }
+	{ xor r5, r6, r7 ; srah r15, r16, r17 }
+	{ xor r5, r6, r7 ; sub r15, r16, r17 ; sh r25, r26 }
+	{ xor r5, r6, r7 ; sw r25, r26 ; nop }
+	{ xor r5, r6, r7 ; sw r25, r26 ; slti_u r15, r16, 5 }
+	{ xor r5, r6, r7 ; xori r15, r16, 5 }
+	{ xori r15, r16, 5 ; bytex r5, r6 }
+	{ xori r15, r16, 5 ; minih r5, r6, 5 }
+	{ xori r15, r16, 5 ; mulhla_ss r5, r6, r7 }
+	{ xori r15, r16, 5 ; ori r5, r6, 5 }
+	{ xori r15, r16, 5 ; seqi r5, r6, 5 }
+	{ xori r15, r16, 5 ; slte_u r5, r6, r7 }
+	{ xori r15, r16, 5 ; sraib r5, r6, 5 }
+	{ xori r5, r6, 5 ; addib r15, r16, 5 }
+	{ xori r5, r6, 5 ; inv r15 }
+	{ xori r5, r6, 5 ; maxh r15, r16, r17 }
+	{ xori r5, r6, 5 ; mzh r15, r16, r17 }
+	{ xori r5, r6, 5 ; seqh r15, r16, r17 }
+	{ xori r5, r6, 5 ; sltb r15, r16, r17 }
+	{ xori r5, r6, 5 ; srab r15, r16, r17 }
diff --git a/gas/testsuite/gas/tilepro/tilepro.exp b/gas/testsuite/gas/tilepro/tilepro.exp
new file mode 100644
index 0000000..f07e3fd
--- /dev/null
+++ b/gas/testsuite/gas/tilepro/tilepro.exp
@@ -0,0 +1,24 @@
+# Expect script for TILEPro assembler tests.
+#   Copyright 2011 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+if [istarget tilepro-*-*] {
+    run_dump_test "t_insns"
+    run_dump_test "t_constants"
+}