gas/

2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
author: Roland McGrath <roland@gnu.org> 2012-03-13 16:59:57 +0000
committer: Roland McGrath <roland@gnu.org> 2012-03-13 16:59:57 +0000
commit: fa94de6b5c193ccfe743efa63720647f63417032 (patch)
tree: 6e2097f0183c1ad232e4f9650cd885a26de0c6c7 /gas
parent: 46cb6474c3a9fae3dbe25f7f42a7d24217d0fb5c (diff)
download: gdb-fa94de6b5c193ccfe743efa63720647f63417032.zip
gdb-fa94de6b5c193ccfe743efa63720647f63417032.tar.gz
gdb-fa94de6b5c193ccfe743efa63720647f63417032.tar.bz2
24 files changed, 8953 insertions, 86 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 236e702..ebd2565 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,31 @@
+2012-03-12  Roland McGrath  <mcgrathr@google.com>
+
+	* config/tc-arm.c (arm_frag_max_var): New function.
+	* config/tc-arm.h: Declare it.
+	(md_frag_max_var): New macro.
+
+	* config/tc-i386.c (i386_frag_max_var): New function.
+	* config/tc-i386.h: Declare it.
+	(md_frag_max_var): New macro.
+
+	* doc/as.texinfo (Bundle directives): New node.
+	(Pseudo Ops): Add it to the menu.
+	* NEWS: Mention new feature.
+	* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
+	[HANDLE_BUNDLE] (bundle_align_p2): New variable.
+	[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
+	[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
+	New functions.
+	(assemble_one): New function if [HANDLE_BUNDLE], #define directly
+	to md_assembly if not.
+	(read_a_source_file): Call assemble_one in place of md_assemble.
+	(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
+	.bundle_lock at end of processing.
+	[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
+	New functions.
+	[HANDLE_BUNDLE] (potable): Add their entries.
+	* read.h: Declare new functions.
+
 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 
 	* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
diff --git a/gas/NEWS b/gas/NEWS
index 01bba64..6e2abff 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,8 @@
 -*- text -*-
 
+* Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
+  directives.  These are currently available only for x86 and ARM targets.
+
 * Add support for the Renesas RL78 architecture.
 
 * Add support for the Adapteva EPIPHANY architecture.
@@ -48,10 +51,10 @@ Changes in 2.20:
   indicate that if the symbol is the target of a relocation, its value should
   not be use.  Instead the function should be invoked and its result used as
   the value.
- 
+
 * Add support for Lattice Mico32 (lm32) architecture.
 
-* Add support for Xilinx MicroBlaze architecture. 
+* Add support for Xilinx MicroBlaze architecture.
 
 Changes in 2.19:
 
@@ -110,7 +113,7 @@ Changes in 2.17:
 * The SH target supports a new command line switch --enable-reg-prefix which,
   if enabled, will allow register names to be optionally prefixed with a $
   character.  This allows register names to be distinguished from label names.
-  
+
 * Macros with a variable number of arguments are now supported. See the
   documentation for how this works.
 
@@ -123,7 +126,7 @@ Changes in 2.17:
   known to cause problems in certain sources when the respective target uses
   characters inconsistently, and thus macro parameter references may no longer
   be recognized as such (see the documentation for details).
-  
+
 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
   for the VAX target in order to be more compatible with the VAX MACRO
   assembler.
@@ -189,7 +192,7 @@ Changes in 2.15:
 
 * Added --gstabs+ switch to enable the generation of STABS debug format
   information with GNU extensions.
- 
+
 * Added support for MIPS64 Release 2.
 
 * Added support for v850e1.
@@ -212,14 +215,14 @@ Changes in 2.14:
 
 * An assembler test generator has been contributed and an example file that
   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
-  
+
 * Support for SH2E added.
 
 * GASP has now been removed.
 
 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
   DSP's contributed by Michael Hayes and Svein E. Seldal.
-  
+
 * Support for the Ubicom IP2xxx microcontroller added.
 
 Changes in 2.13:
@@ -242,8 +245,8 @@ Changes in 2.12:
 
 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 
-* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for 
-  specifying the target instruction set.  The old method of specifying the 
+* The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
+  specifying the target instruction set.  The old method of specifying the
   target processor has been deprecated, but is still accepted for
   compatibility.
 
@@ -256,7 +259,7 @@ Changes in 2.12:
 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
   but still works for compatability.
 
-* The MIPS assembler no longer issues a warning by default when it 
+* The MIPS assembler no longer issues a warning by default when it
   generates a nop instruction from a macro. The new command line option
   -n will turn on the warning.
 
@@ -307,7 +310,7 @@ Changes in 2.10:
 
 * Motorola MCore 210 processor support added.
 
-* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386 
+* A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
   assembly programs with intel syntax.
 
 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
@@ -316,7 +319,7 @@ Changes in 2.10:
 
 * Full 16-bit mode support for i386.
 
-* Greatly improved instruction operand checking for i386.  This change will 
+* Greatly improved instruction operand checking for i386.  This change will
   produce errors or warnings on incorrect assembly code that previous versions
   of gas accepted.  If you get unexpected messages from code that worked with
   older versions of gas, please double check the code before reporting a bug.
@@ -335,12 +338,12 @@ Changes in 2.9:
 
 * Texas Instruments c30 (tms320c30) support added.
 
-* The assembler now optimizes the exception frame information generated by egcs 
+* The assembler now optimizes the exception frame information generated by egcs
   and gcc 2.8.  The new --traditional-format option disables this optimization.
 
 * Added --gstabs option to generate stabs debugging information.
 
-* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a 
+* The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
   listing.
 
 * Added -MD option to print dependencies.
@@ -390,7 +393,7 @@ Changes in 2.7:
 
 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
   default is to build COFF-only support.  To get a set of tools that generate
-  ELF (they'll understand both COFF and ELF), you must configure with 
+  ELF (they'll understand both COFF and ELF), you must configure with
   target=i386-unknown-sco3.2v5elf.
 
 * m88k-motorola-sysv3* support added.
@@ -421,18 +424,18 @@ Changes in 2.4:
 * Support for the control registers in the 68060.
 
 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
-  provide for possible future gcc changes, for targets where gas provides some 
-  features not available in the native assembler.  If the native assembler is 
+  provide for possible future gcc changes, for targets where gas provides some
+  features not available in the native assembler.  If the native assembler is
   used, it should become obvious pretty quickly what the problem is.
 
 * Usage message is available with "--help".
 
-* The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3 
+* The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
   also, but didn't get into the NEWS file.)
 
 * Weak symbol support for a.out.
 
-* A bug in the listing code which could cause an infinite loop has been fixed. 
+* A bug in the listing code which could cause an infinite loop has been fixed.
   Bugs in listings when generating a COFF object file have also been fixed.
 
 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
@@ -454,7 +457,7 @@ Changes in 2.3:
   again too.
 
 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
-  with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special 
+  with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
   in the "dist" directory.
@@ -463,18 +466,18 @@ Changes in 2.3:
   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
   currently required for BSD 4.3 builds.)
 
-* Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is 
+* Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
   based on code donated by CMU, which used an a.out-based format.  I'm afraid
   the alpha-a.out support is pretty badly mangled, and much of it removed;
   making it work will require rewriting it as BFD support for the format anyways.
 
 * Irix 5 support.
 
-* The test suites have been fixed up a bit, so that they should work with a 
+* The test suites have been fixed up a bit, so that they should work with a
   couple different versions of expect and dejagnu.
 
-* Symbols' values are now handled internally as expressions, permitting more 
-  flexibility in evaluating them in some cases.  Some details of relocation 
+* Symbols' values are now handled internally as expressions, permitting more
+  flexibility in evaluating them in some cases.  Some details of relocation
   handling have also changed, and simple constant pool management has been
   added, to make the Alpha port easier.
 
@@ -487,17 +490,17 @@ Changes in 2.2:
 
 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
 
-* Configurations that are still in development (and therefore are convenient to 
-  have listed in configure.in) still get rejected without a minor change to 
+* Configurations that are still in development (and therefore are convenient to
+  have listed in configure.in) still get rejected without a minor change to
   gas/Makefile.in, so people not doing development work shouldn't get the
   impression that support for such configurations is actually believed to be
   reliable.
 
-* The program name (usually "as") is printed when a fatal error message is 
+* The program name (usually "as") is printed when a fatal error message is
   displayed.  This should prevent some confusion about the source of occasional
   messages about "internal errors".
 
-* ELF support is falling into place.  Support for the 386 should be working. 
+* ELF support is falling into place.  Support for the 386 should be working.
   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
 
 * Symbol values are maintained as expressions instead of being immediately
@@ -506,22 +509,22 @@ Changes in 2.2:
   known.
 
 * DBX-style debugging info ("stabs") is now supported for COFF formats.
-  If any stabs directives are seen in the source, GAS will create two new 
-  sections: a ".stab" and a ".stabstr" section.  The format of the .stab 
+  If any stabs directives are seen in the source, GAS will create two new
+  sections: a ".stab" and a ".stabstr" section.  The format of the .stab
   section is nearly identical to the a.out symbol format, and .stabstr is
   its string table.  For this to be useful, you must have configured GCC
   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
   that can use the stab sections (4.11 or later).
 
-* LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS 
+* LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
   support is in progress.
 
 Changes in 2.1:
 
-* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been 
+* Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
   incorporated, but not well tested yet.
 
-* Altered the opcode table split for m68k; it should require less VM to compile 
+* Altered the opcode table split for m68k; it should require less VM to compile
   with gcc now.
 
 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 02a63a6..b2e0d86 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -1,6 +1,6 @@
 /* tc-arm.c -- Assemble for the ARM
    Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
-   2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+   2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
    Free Software Foundation, Inc.
    Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
 	Modified by David Taylor (dtaylor@armltd.co.uk)
@@ -98,7 +98,7 @@ enum arm_float_abi
 /* Types of processor to assemble for.	*/
 #ifndef CPU_DEFAULT
 /* The code that was here used to select a default CPU depending on compiler
-   pre-defines which were only present when doing native builds, thus 
+   pre-defines which were only present when doing native builds, thus
    changing gas' default behaviour depending upon the build host.
 
    If you have a target that requires a default CPU option then the you
@@ -5064,7 +5064,7 @@ parse_shifter_operand_group_reloc (char **str, int i)
 
 /* Parse a Neon alignment expression.  Information is written to
    inst.operands[i].  We assume the initial ':' has been skipped.
-   
+
    align	.imm = align << 8, .immisalign=1, .preind=0  */
 static parse_operand_result
 parse_neon_alignment (char **str, int i)
@@ -5177,7 +5177,7 @@ parse_address_main (char **str, int i, int group_relocations,
 	     code before we get to see it here. This may be subject to
 	     change.  */
 	  parse_operand_result result = parse_neon_alignment (&p, i);
-	  
+
 	  if (result != PARSE_OPERAND_SUCCESS)
 	    return result;
 	}
@@ -5265,7 +5265,7 @@ parse_address_main (char **str, int i, int group_relocations,
       /* FIXME: '@' should be used here, but it's filtered out by generic code
 	 before we get to see it here. This may be subject to change.  */
       parse_operand_result result = parse_neon_alignment (&p, i);
-      
+
       if (result != PARSE_OPERAND_SUCCESS)
 	return result;
     }
@@ -5448,7 +5448,7 @@ parse_psr (char **str, bfd_boolean lhs)
     {
       if (m_profile)
 	goto unsupported_psr;
-	
+
       psr_field = SPSR_BIT;
     }
   else if (strncasecmp (p, "CPSR", 4) == 0)
@@ -5521,7 +5521,7 @@ check_suffix:
 	  unsigned int nzcvq_bits = 0;
 	  unsigned int g_bit = 0;
 	  char *bit;
-	  
+
 	  for (bit = start; bit != p; bit++)
 	    {
 	      switch (TOLOWER (*bit))
@@ -5541,24 +5541,24 @@ check_suffix:
 		case 'v':
 		  nzcvq_bits |= (nzcvq_bits & 0x08) ? 0x20 : 0x08;
 		  break;
-		
+
 		case 'q':
 		  nzcvq_bits |= (nzcvq_bits & 0x10) ? 0x20 : 0x10;
 		  break;
-		
+
 		case 'g':
 		  g_bit |= (g_bit & 0x1) ? 0x2 : 0x1;
 		  break;
-		
+
 		default:
 		  inst.error = _("unexpected bit specified after APSR");
 		  return FAIL;
 		}
 	    }
-	  
+
 	  if (nzcvq_bits == 0x1f)
 	    psr_field |= PSR_f;
-	  
+
 	  if (g_bit == 0x1)
 	    {
 	      if (!ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6_dsp))
@@ -5570,7 +5570,7 @@ check_suffix:
 
 	      psr_field |= PSR_s;
 	    }
-	  
+
 	  if ((nzcvq_bits & 0x20) != 0
 	      || (nzcvq_bits != 0x1f && nzcvq_bits != 0)
 	      || (g_bit & 0x2) != 0)
@@ -6063,7 +6063,7 @@ enum operand_parse_code
   OP_RRnpc,	/* ARM register, not r15 */
   OP_RRnpcsp,	/* ARM register, neither r15 nor r13 (a.k.a. 'BadReg') */
   OP_RRnpcb,	/* ARM register, not r15, in square brackets */
-  OP_RRnpctw,	/* ARM register, not r15 in Thumb-state or with writeback, 
+  OP_RRnpctw,	/* ARM register, not r15 in Thumb-state or with writeback,
 		   optional trailing ! */
   OP_RRw,	/* ARM register, not r15, optional trailing ! */
   OP_RCP,	/* Coprocessor number */
@@ -6620,7 +6620,7 @@ parse_operands (char *str, const unsigned int *pattern, bfd_boolean thumb)
             goto failure;
 	  break;
 
-	case OP_wPSR:	 
+	case OP_wPSR:
 	case OP_rPSR:
 	  po_reg_or_goto (REG_TYPE_RNB, try_psr);
 	  if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_virt))
@@ -6780,8 +6780,8 @@ parse_operands (char *str, const unsigned int *pattern, bfd_boolean thumb)
 	  break;
 
 	case OP_RRnpctw:
-	  if (inst.operands[i].isreg 
-	      && inst.operands[i].reg == REG_PC 
+	  if (inst.operands[i].isreg
+	      && inst.operands[i].reg == REG_PC
 	      && (inst.operands[i].writeback || thumb))
 	    inst.error = BAD_PC;
 	  break;
@@ -8088,7 +8088,7 @@ static void
 do_vmrs (void)
 {
   unsigned Rt = inst.operands[0].reg;
-  
+
   if (thumb_mode && inst.operands[0].reg == REG_SP)
     {
       inst.error = BAD_SP;
@@ -8112,7 +8112,7 @@ static void
 do_vmsr (void)
 {
   unsigned Rt = inst.operands[1].reg;
-  
+
   if (thumb_mode)
     reject_bad_reg (Rt);
   else if (Rt == REG_PC)
@@ -8812,14 +8812,14 @@ vfp_conv (int srcsize)
 {
   int immbits = srcsize - inst.operands[1].imm;
 
-  if (srcsize == 16 && !(immbits >= 0 && immbits <= srcsize)) 
-    {  
+  if (srcsize == 16 && !(immbits >= 0 && immbits <= srcsize))
+    {
       /* If srcsize is 16, inst.operands[1].imm must be in the range 0-16.
          i.e. immbits must be in range 0 - 16.  */
       inst.error = _("immediate value out of range, expected range [0, 16]");
       return;
     }
-  else if (srcsize == 32 && !(immbits >= 0 && immbits < srcsize)) 
+  else if (srcsize == 32 && !(immbits >= 0 && immbits < srcsize))
     {
       /* If srcsize is 32, inst.operands[1].imm must be in the range 1-32.
          i.e. immbits must be in range 0 - 31.  */
@@ -10046,7 +10046,7 @@ do_t_branch23 (void)
 {
   set_it_insn_type_last ();
   encode_branch (BFD_RELOC_THUMB_PCREL_BRANCH23);
-  
+
   /* md_apply_fix blows up with 'bl foo(PLT)' where foo is defined in
      this file.  We used to simply ignore the PLT reloc type here --
      the branch encoding is now needed to deal with TLSCALL relocs.
@@ -10353,11 +10353,11 @@ do_t_ldmstm (void)
 		  /* First, record an error for Case 3.  */
 		  if (inst.operands[1].imm & mask
 		      && inst.operands[0].writeback)
-    		    inst.error = 
+		    inst.error =
 			_("having the base register in the register list when "
 			  "using write back is UNPREDICTABLE");
-		    
-		  opcode = (inst.instruction == T_MNEM_stmia ? T_MNEM_str 
+
+		  opcode = (inst.instruction == T_MNEM_stmia ? T_MNEM_str
 							     : T_MNEM_ldr);
 		  inst.instruction = THUMB_OP16 (opcode);
 		  inst.instruction |= inst.operands[0].reg << 3;
@@ -10369,7 +10369,7 @@ do_t_ldmstm (void)
 	    {
 	      if (inst.operands[0].writeback)
 		{
-		  inst.instruction = 
+		  inst.instruction =
 			THUMB_OP16 (inst.instruction == T_MNEM_stmia
 			            ? T_MNEM_push : T_MNEM_pop);
 		  inst.instruction |= inst.operands[1].imm;
@@ -10377,7 +10377,7 @@ do_t_ldmstm (void)
 		}
 	      else if ((inst.operands[1].imm & (inst.operands[1].imm-1)) == 0)
 		{
-		  inst.instruction = 
+		  inst.instruction =
 			THUMB_OP16 (inst.instruction == T_MNEM_stmia
 			            ? T_MNEM_str_sp : T_MNEM_ldr_sp);
 		  inst.instruction |= ((ffs (inst.operands[1].imm)-1) << 8);
@@ -10934,7 +10934,7 @@ do_t_mov_cmp (void)
 		constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6),
 			    "MOV Rd, Rs with two low registers is not "
 			    "permitted on this architecture");
-		ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, 
+		ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
 					arm_ext_v6);
 	      }
 
@@ -15256,7 +15256,7 @@ do_neon_ldr_str (void)
 
   /* Use of PC in vstr in ARM mode is deprecated in ARMv7.
      And is UNPREDICTABLE in thumb mode.  */
-  if (!is_ldr 
+  if (!is_ldr
       && inst.operands[1].reg == REG_PC
       && ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v7))
     {
@@ -16713,7 +16713,7 @@ static const struct reg_entry reg_names[] =
   SPLRBANK(12,MON,RNB), SPLRBANK(12,mon,RNB),
   REGDEF(elr_hyp,768|(14<<16),RNB), REGDEF(ELR_hyp,768|(14<<16),RNB),
   REGDEF(sp_hyp,768|(15<<16),RNB), REGDEF(SP_hyp,768|(15<<16),RNB),
-  REGDEF(spsr_hyp,768|(14<<16)|SPSR_BIT,RNB), 
+  REGDEF(spsr_hyp,768|(14<<16)|SPSR_BIT,RNB),
   REGDEF(SPSR_hyp,768|(14<<16)|SPSR_BIT,RNB),
 
   /* FPA registers.  */
@@ -18998,6 +18998,26 @@ md_chars_to_number (char * buf, int n)
 
 /* MD interface: Sections.  */
 
+/* Calculate the maximum variable size (i.e., excluding fr_fix)
+   that an rs_machine_dependent frag may reach.  */
+
+unsigned int
+arm_frag_max_var (fragS *fragp)
+{
+  /* We only use rs_machine_dependent for variable-size Thumb instructions,
+     which are either THUMB_SIZE (2) or INSN_SIZE (4).
+
+     Note that we generate relaxable instructions even for cases that don't
+     really need it, like an immediate that's a trivial constant.  So we're
+     overestimating the instruction size for some of those cases.  Rather
+     than putting more intelligence here, it would probably be better to
+     avoid generating a relaxation frag in the first place when it can be
+     determined up front that a short instruction will suffice.  */
+
+  gas_assert (fragp->fr_type == rs_machine_dependent);
+  return INSN_SIZE;
+}
+
 /* Estimate the size of a frag before relaxing.  Assume everything fits in
    2 bytes.  */
 
@@ -19569,7 +19589,7 @@ arm_frag_align_code (int n, int max)
     {
       char err_msg[128];
 
-      sprintf (err_msg, 
+      sprintf (err_msg,
         _("alignments greater than %d bytes not supported in .text sections."),
         MAX_MEM_FOR_RS_ALIGN_CODE + 1);
       as_fatal ("%s", err_msg);
@@ -20474,7 +20494,7 @@ encode_thumb2_b_bl_offset (char * buf, offsetT value)
   I1 = (value >> 23) & 0x01;
   I2 = (value >> 22) & 0x01;
   hi = (value >> 12) & 0x3ff;
-  lo = (value >> 1) & 0x7ff; 
+  lo = (value >> 1) & 0x7ff;
   newval   = md_chars_to_number (buf, THUMB_SIZE);
   newval2  = md_chars_to_number (buf + THUMB_SIZE, THUMB_SIZE);
   newval  |= (S << 10) | hi;
@@ -20591,7 +20611,7 @@ md_apply_fix (fixS *	fixP,
 		break;
 	      }
 	  }
-	
+
 	newimm = encode_arm_immediate (value);
 	temp = md_chars_to_number (buf, INSN_SIZE);
 
@@ -23217,10 +23237,10 @@ arm_parse_extension (char *str, const arm_feature_set **opt_p)
       xmalloc (sizeof (arm_feature_set));
 
   /* We insist on extensions being specified in alphabetical order, and with
-     extensions being added before being removed.  We achieve this by having 
-     the global ARM_EXTENSIONS table in alphabetical order, and using the 
+     extensions being added before being removed.  We achieve this by having
+     the global ARM_EXTENSIONS table in alphabetical order, and using the
      ADDING_VALUE variable to indicate whether we are adding an extension (1)
-     or removing it (0) and only allowing it to change in the order 
+     or removing it (0) and only allowing it to change in the order
      -1 -> 1 -> 0.  */
   const struct arm_option_extension_value_table * opt = NULL;
   int adding_value = -1;
@@ -23803,7 +23823,7 @@ aeabi_set_public_attributes (void)
     aeabi_set_attribute_int
       (Tag_Advanced_SIMD_arch, (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_fma)
 				? 2 : 1));
-  
+
   /* Tag_VFP_HP_extension (formerly Tag_NEON_FP16_arch).  */
   if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16))
     aeabi_set_attribute_int (Tag_VFP_HP_extension, 1);
diff --git a/gas/config/tc-arm.h b/gas/config/tc-arm.h
index b6b7a04..4425d75 100644
--- a/gas/config/tc-arm.h
+++ b/gas/config/tc-arm.h
@@ -84,6 +84,9 @@ struct fix;
 
 #define TC_FORCE_RELOCATION(FIX) arm_force_relocation (FIX)
 
+extern unsigned int arm_frag_max_var (struct frag *);
+#define md_frag_max_var arm_frag_max_var
+
 #define md_relax_frag(segment, fragp, stretch) \
   arm_relax_frag (segment, fragp, stretch)
 extern int arm_relax_frag (asection *, struct frag *, long);
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 144883e..ae0b436 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7715,6 +7715,18 @@ i386_att_operand (char *operand_string)
   return 1;			/* Normal return.  */
 }
 
+/* Calculate the maximum variable size (i.e., excluding fr_fix)
+   that an rs_machine_dependent frag may reach.  */
+
+unsigned int
+i386_frag_max_var (fragS *frag)
+{
+  /* The only relaxable frags are for jumps.
+     Unconditional jumps can grow by 4 bytes and others by 5 bytes.  */
+  gas_assert (frag->fr_type == rs_machine_dependent);
+  return TYPE_FROM_RELAX_STATE (frag->fr_subtype) == UNCOND_JUMP ? 4 : 5;
+}
+
 /* md_estimate_size_before_relax()
 
    Called just before relax() for rs_machine_dependent frags.  The x86
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h
index cc86c9d..599d0bf 100644
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -215,6 +215,9 @@ if (fragP->fr_type == rs_align_code) 					\
 void i386_print_statistics (FILE *);
 #define tc_print_statistics i386_print_statistics
 
+extern unsigned int i386_frag_max_var (fragS *);
+#define md_frag_max_var i386_frag_max_var
+
 #define md_number_to_chars number_to_chars_littleendian
 
 enum processor_type
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 45405b8..2f892e2 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -3970,6 +3970,7 @@ Some machine configurations provide additional directives.
 * Ascii::                       @code{.ascii "@var{string}"}@dots{}
 * Asciz::                       @code{.asciz "@var{string}"}@dots{}
 * Balign::                      @code{.balign @var{abs-expr} , @var{abs-expr}}
+* Bundle directives::           @code{.bundle_align_mode @var{abs-expr}}, @code{.bundle_lock}, @code{.bundle_unlock}
 * Byte::                        @code{.byte @var{expressions}}
 * CFI directives::		@code{.cfi_startproc [simple]}, @code{.cfi_endproc}, etc.
 * Comm::                        @code{.comm @var{symbol} , @var{length} }
@@ -4292,6 +4293,59 @@ filled in with the value 0x368d (the exact placement of the bytes depends upon
 the endianness of the processor).  If it skips 1 or 3 bytes, the fill value is
 undefined.
 
+@node Bundle directives
+@section @code{.bundle_align_mode @var{abs-expr}}
+@cindex @code{bundle_align_mode} directive
+@cindex bundle
+@cindex instruction bundle
+@cindex aligned instruction bundle
+@code{.bundle_align_mode} enables or disables @defn{aligned instruction
+bundle} mode.  In this mode, sequences of adjacent instructions are grouped
+into fixed-sized @defn{bundles}.  If the argument is zero, this mode is
+disabled (which is the default state).  If the argument it not zero, it
+gives the size of an instruction bundle as a power of two (as for the
+@code{.p2align} directive, @pxref{P2align}).
+
+For some targets, it's an ABI requirement that no instruction may span a
+certain aligned boundary.  A @defn{bundle} is simply a sequence of
+instructions that starts on an aligned boundary.  For example, if
+@var{abs-expr} is @code{5} then the bundle size is 32, so each aligned
+chunk of 32 bytes is a bundle.  When aligned instruction bundle mode is in
+effect, no single instruction may span a boundary between bundles.  If an
+instruction would start too close to the end of a bundle for the length of
+that particular instruction to fit within the bundle, then the space at the
+end of that bundle is filled with no-op instructions so the instruction
+starts in the next bundle.  As a corollary, it's an error if any single
+instruction's encoding is longer than the bundle size.
+
+@section @code{.bundle_lock} and @code{.bundle_unlock}
+@cindex @code{bundle_lock} directive
+@cindex @code{bundle_unlock} directive
+The @code{.bundle_lock} and directive @code{.bundle_unlock} directives
+allow explicit control over instruction bundle padding.  These directives
+are only valid when @code{.bundle_align_mode} has been used to enable
+aligned instruction bundle mode.  It's an error if they appear when
+@code{.bundle_align_mode} has not been used at all, or when the last
+directive was @w{@code{.bundle_align_mode 0}}.
+
+@cindex bundle-locked
+For some targets, it's an ABI requirement that certain instructions may
+appear only as part of specified permissible sequences of multiple
+instructions, all within the same bundle.  A pair of @code{.bundle_lock}
+and @code{.bundle_unlock} directives define a @defn{bundle-locked}
+instruction sequence.  For purposes of aligned instruction bundle mode, a
+sequence starting with @code{.bundle_lock} and ending with
+@code{.bundle_unlock} is treated as a single instruction.  That is, the
+entire sequence must fit into a single bundle and may not span a bundle
+boundary.  If necessary, no-op instructions will be inserted before the
+first instruction of the sequence so that the whole sequence starts on an
+aligned bundle boundary.  It's an error if the sequence is longer than the
+bundle size.
+
+Bundle-locked sequences do not nest.  It's an error if two
+@code{.bundle_lock} directives appear without an intervening
+@code{.bundle_unlock} directive.
+
 @node Byte
 @section @code{.byte @var{expressions}}
 
@@ -5521,7 +5575,7 @@ hence @emph{octa}-word for 16 bytes.
 Set the location counter to @var{loc} in the absolute section.  @var{loc} must
 be an absolute expression.  This directive may be useful for defining
 symbols with absolute values.  Do not confuse it with the @code{.org}
-directive. 
+directive.
 
 @node Org
 @section @code{.org @var{new-lc} , @var{fill}}
diff --git a/gas/read.c b/gas/read.c
index 445caa1..b47c74a 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -1,7 +1,7 @@
 /* read.c - read a source file -
    Copyright 1986, 1987, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
    1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
-   2010, 2011  Free Software Foundation, Inc.
+   2010, 2011, 2012  Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -209,6 +209,31 @@ static int dwarf_file_string;
 #endif
 #endif
 
+/* If the target defines the md_frag_max_var hook then we know
+   enough to implement the .bundle_align_mode features.  */
+#ifdef md_frag_max_var
+# define HANDLE_BUNDLE
+#endif
+
+#ifdef HANDLE_BUNDLE
+/* .bundle_align_mode sets this.  Normally it's zero.  When nonzero,
+   it's the exponent of the bundle size, and aligned instruction bundle
+   mode is in effect.  */
+static unsigned int bundle_align_p2;
+
+/* These are set by .bundle_lock and .bundle_unlock.  .bundle_lock sets
+   bundle_lock_frag to frag_now and then starts a new frag with
+   frag_align_code.  At the same time, bundle_lock_frain gets frchain_now,
+   so that .bundle_unlock can verify that we didn't change segments.
+   .bundle_unlock resets both to NULL.  If we detect a bundling violation,
+   then we reset bundle_lock_frchain to NULL as an indicator that we've
+   already diagnosed the error with as_bad and don't need a cascade of
+   redundant errors, but bundle_lock_frag remains set to indicate that
+   we are expecting to see .bundle_unlock.  */
+static fragS *bundle_lock_frag;
+static frchainS *bundle_lock_frchain;
+#endif
+
 static void do_s_func (int end_p, const char *default_prefix);
 static void do_align (int, char *, int, int);
 static void s_align (int, int);
@@ -277,6 +302,11 @@ static const pseudo_typeS potable[] = {
   {"balignw", s_align_bytes, -2},
   {"balignl", s_align_bytes, -4},
 /* block  */
+#ifdef HANDLE_BUNDLE
+  {"bundle_align_mode", s_bundle_align_mode, 0},
+  {"bundle_lock", s_bundle_lock, 0},
+  {"bundle_unlock", s_bundle_unlock, 0},
+#endif
   {"byte", cons, 1},
   {"comm", s_comm, 0},
   {"common", s_mri_common, 0},
@@ -583,6 +613,128 @@ try_macro (char term, const char *line)
   return 0;
 }
 
+#ifdef HANDLE_BUNDLE
+/* Start a new instruction bundle.  Returns the rs_align_code frag that
+   will be used to align the new bundle.  */
+static fragS *
+start_bundle (void)
+{
+  fragS *frag = frag_now;
+
+  frag_align_code (0, 0);
+
+  while (frag->fr_type != rs_align_code)
+    frag = frag->fr_next;
+
+  gas_assert (frag != frag_now);
+
+  return frag;
+}
+
+/* Calculate the maximum size after relaxation of the region starting
+   at the given frag and extending through frag_now (which is unfinished).  */
+static unsigned int
+pending_bundle_size (fragS *frag)
+{
+  unsigned int offset = frag->fr_fix;
+  unsigned int size = 0;
+
+  gas_assert (frag != frag_now);
+  gas_assert (frag->fr_type == rs_align_code);
+
+  while (frag != frag_now)
+    {
+      /* This should only happen in what will later become an error case.  */
+      if (frag == NULL)
+	return 0;
+
+      size += frag->fr_fix;
+      if (frag->fr_type == rs_machine_dependent)
+	size += md_frag_max_var (frag);
+
+      frag = frag->fr_next;
+    }
+
+  gas_assert (frag == frag_now);
+  size += frag_now_fix ();
+  if (frag->fr_type == rs_machine_dependent)
+    size += md_frag_max_var (frag);
+
+  gas_assert (size >= offset);
+
+  return size - offset;
+}
+
+/* Finish off the frag created to ensure bundle alignment.  */
+static void
+finish_bundle (fragS *frag, unsigned int size)
+{
+  gas_assert (bundle_align_p2 > 0);
+  gas_assert (frag->fr_type == rs_align_code);
+
+  if (size > 1)
+    {
+      /* If there is more than a single byte, then we need to set up the
+	 alignment frag.  Otherwise we leave it at its initial state from
+	 calling frag_align_code (0, 0), so that it does nothing.  */
+      frag->fr_offset = bundle_align_p2;
+      frag->fr_subtype = size - 1;
+    }
+
+  /* We do this every time rather than just in s_bundle_align_mode
+     so that we catch any affected section without needing hooks all
+     over for all paths that do section changes.  It's cheap enough.  */
+  record_alignment (now_seg, bundle_align_p2 - OCTETS_PER_BYTE_POWER);
+}
+
+/* Assemble one instruction.  This takes care of the bundle features
+   around calling md_assemble.  */
+static void
+assemble_one (char *line)
+{
+  fragS *insn_start_frag;
+
+  if (bundle_lock_frchain != NULL && bundle_lock_frchain != frchain_now)
+    {
+      as_bad (_("cannot change section or subsection inside .bundle_lock"));
+      /* Clearing this serves as a marker that we have already complained.  */
+      bundle_lock_frchain = NULL;
+    }
+
+  if (bundle_lock_frchain == NULL && bundle_align_p2 > 0)
+    insn_start_frag = start_bundle ();
+
+  md_assemble (line);
+
+  if (bundle_lock_frchain != NULL)
+    {
+      /* Make sure this hasn't pushed the locked sequence
+	 past the bundle size.  */
+      unsigned int bundle_size = pending_bundle_size (bundle_lock_frag);
+      if (bundle_size > (1U << bundle_align_p2))
+	as_bad (_("\
+.bundle_lock sequence at %u bytes but .bundle_align_mode limit is %u bytes"),
+		bundle_size, 1U << bundle_align_p2);
+    }
+  else if (bundle_align_p2 > 0)
+    {
+      unsigned int insn_size = pending_bundle_size (insn_start_frag);
+
+      if (insn_size > (1U << bundle_align_p2))
+	as_bad (_("\
+single instruction is %u bytes long but .bundle_align_mode limit is %u"),
+		(unsigned int) insn_size, 1U << bundle_align_p2);
+
+      finish_bundle (insn_start_frag, insn_size);
+    }
+}
+
+#else  /* !HANDLE_BUNDLE */
+
+# define assemble_one(line) md_assemble(line)
+
+#endif  /* HANDLE_BUNDLE */
+
 /* We read the file, putting things into a web that represents what we
    have been reading.  */
 void
@@ -795,7 +947,7 @@ read_a_source_file (char *name)
 		  /* Input_line_pointer->after ':'.  */
 		  SKIP_WHITESPACE ();
 		}
-              else if ((c == '=' && input_line_pointer[1] == '=')
+	      else if ((c == '=' && input_line_pointer[1] == '=')
 		       || ((c == ' ' || c == '\t')
 			   && input_line_pointer[1] == '='
 			   && input_line_pointer[2] == '='))
@@ -803,13 +955,13 @@ read_a_source_file (char *name)
 		  equals (s, -1);
 		  demand_empty_rest_of_line ();
 		}
-              else if ((c == '='
-                       || ((c == ' ' || c == '\t')
-                            && input_line_pointer[1] == '='))
+	      else if ((c == '='
+		       || ((c == ' ' || c == '\t')
+			    && input_line_pointer[1] == '='))
 #ifdef TC_EQUAL_IN_INSN
-                           && !TC_EQUAL_IN_INSN (c, s)
+			   && !TC_EQUAL_IN_INSN (c, s)
 #endif
-                           )
+			   )
 		{
 		  equals (s, 1);
 		  demand_empty_rest_of_line ();
@@ -947,7 +1099,7 @@ read_a_source_file (char *name)
 			    }
 			}
 
-		      md_assemble (s);	/* Assemble 1 instruction.  */
+		      assemble_one (s); /* Assemble 1 instruction.  */
 
 		      *input_line_pointer++ = c;
 
@@ -1128,6 +1280,16 @@ read_a_source_file (char *name)
  quit:
   symbol_set_value_now (&dot_symbol);
 
+#ifdef HANDLE_BUNDLE
+  if (bundle_lock_frag != NULL)
+    {
+      as_bad_where (bundle_lock_frag->fr_file, bundle_lock_frag->fr_line,
+		    _(".bundle_lock with no matching .bundle_unlock"));
+      bundle_lock_frag = NULL;
+      bundle_lock_frchain = NULL;
+    }
+#endif
+
 #ifdef md_cleanup
   md_cleanup ();
 #endif
@@ -1734,7 +1896,7 @@ s_app_line (int appline)
        Besides, it's silly.  GCC however will generate a line number of
        zero when it is pre-processing builtins for assembler-with-cpp files:
 
-          # 0 "<built-in>"
+	  # 0 "<built-in>"
 
        We do not want to barf on this, especially since such files are used
        in the GCC and GDB testsuites.  So we check for negative line numbers
@@ -1763,7 +1925,7 @@ s_app_line (int appline)
 		    /* From GCC's cpp documentation:
 		       1: start of a new file.
 		       2: returning to a file after having included
-		          another file.
+			  another file.
 		       3: following text comes from a system header file.
 		       4: following text should be treated as extern "C".
 
@@ -3606,7 +3768,7 @@ demand_empty_rest_of_line (void)
 		 *input_line_pointer);
       ignore_rest_of_line ();
     }
-  
+
   /* Return pointing just after end-of-line.  */
   know (is_end_of_line[(unsigned char) input_line_pointer[-1]]);
 }
@@ -3852,7 +4014,7 @@ cons_worker (int nbytes,	/* 1=.byte, 2=.word, 4=.long.  */
 	parse_mri_cons (&exp, (unsigned int) nbytes);
       else
 #endif
-        {
+	{
 	  if (*input_line_pointer == '"')
 	    {
 	      as_bad (_("unexpected `\"' in expression"));
@@ -5691,7 +5853,7 @@ s_include (int arg ATTRIBUTE_UNUSED)
 
   demand_empty_rest_of_line ();
   path = (char *) xmalloc ((unsigned long) i
-                           + include_dir_maxlen + 5 /* slop */ );
+			   + include_dir_maxlen + 5 /* slop */ );
 
   for (i = 0; i < include_dir_count; i++)
     {
@@ -5867,6 +6029,78 @@ do_s_func (int end_p, const char *default_prefix)
   demand_empty_rest_of_line ();
 }
 
+#ifdef HANDLE_BUNDLE
+
+void
+s_bundle_align_mode (int arg ATTRIBUTE_UNUSED)
+{
+  unsigned int align = get_absolute_expression ();
+  SKIP_WHITESPACE ();
+  demand_empty_rest_of_line ();
+
+  if (align > (unsigned int) TC_ALIGN_LIMIT)
+    as_fatal (_(".bundle_align_mode alignment too large (maximum %u)"),
+	      (unsigned int) TC_ALIGN_LIMIT);
+
+  if (bundle_lock_frag != NULL)
+    {
+      as_bad (_("cannot change .bundle_align_mode inside .bundle_lock"));
+      return;
+    }
+
+  bundle_align_p2 = align;
+}
+
+void
+s_bundle_lock (int arg ATTRIBUTE_UNUSED)
+{
+  demand_empty_rest_of_line ();
+
+  if (bundle_align_p2 == 0)
+    {
+      as_bad (_(".bundle_lock is meaningless without .bundle_align_mode"));
+      return;
+    }
+
+  if (bundle_lock_frag != NULL)
+    {
+      as_bad (_("second .bundle_lock without .bundle_unlock"));
+      return;
+    }
+
+  bundle_lock_frchain = frchain_now;
+  bundle_lock_frag = start_bundle ();
+}
+
+void
+s_bundle_unlock (int arg ATTRIBUTE_UNUSED)
+{
+  unsigned int size;
+
+  demand_empty_rest_of_line ();
+
+  if (bundle_lock_frag == NULL)
+    {
+      as_bad (_(".bundle_unlock without preceding .bundle_lock"));
+      return;
+    }
+
+  gas_assert (bundle_align_p2 > 0);
+
+  size = pending_bundle_size (bundle_lock_frag);
+
+  if (size > (1U << bundle_align_p2))
+    as_bad (_(".bundle_lock sequence is %u bytes, but bundle size only %u"),
+	    size, 1 << bundle_align_p2);
+  else
+    finish_bundle (bundle_lock_frag, size);
+
+  bundle_lock_frag = NULL;
+  bundle_lock_frchain = NULL;
+}
+
+#endif  /* HANDLE_BUNDLE */
+
 void
 s_ignore (int arg ATTRIBUTE_UNUSED)
 {
diff --git a/gas/read.h b/gas/read.h
index 82ccc75..4e5d1bb 100644
--- a/gas/read.h
+++ b/gas/read.h
@@ -1,6 +1,6 @@
 /* read.h - of read.c
    Copyright 1986, 1990, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
+   2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2012
    Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
@@ -143,6 +143,9 @@ extern symbolS *s_lcomm_internal (int, symbolS *, addressT);
 extern void s_app_file_string (char *, int);
 extern void s_app_file (int);
 extern void s_app_line (int);
+extern void s_bundle_align_mode (int);
+extern void s_bundle_lock (int);
+extern void s_bundle_unlock (int);
 extern void s_comm (int);
 extern void s_data (int);
 extern void s_desc (int);
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 718f942..04c1cee 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,23 @@
+2012-03-12  Roland McGrath  <mcgrathr@google.com>
+
+	* gas/i386/bundle-bad.s: New file.
+	* gas/i386/bundle-bad.d: New file.
+	* gas/i386/bundle-bad.l: New file.
+	* gas/i386/i386.exp: Run it.
+
+	* gas/arm/bundle.s: New file.
+	* gas/arm/bundle.d: New file.
+	* gas/arm/bundle-lock.s: New file.
+	* gas/arm/bundle-lock.d: New file.
+
+	* gas/i386/bundle.s: New file.
+	* gas/i386/bundle.d: New file.
+	* gas/i386/x86-64-bundle.s: New file.
+	* gas/i386/x86-64-bundle.d: New file.
+	* gas/i386/bundle-lock.s: New file.
+	* gas/i386/bundle-lock.d: New file.
+	* gas/i386/i386.exp: Run them.
+
 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 
 	* gas/ppc/e500mc64_nop.s: New test case for e500mc family
diff --git a/gas/testsuite/gas/arm/bundle-lock.d b/gas/testsuite/gas/arm/bundle-lock.d
new file mode 100644
index 0000000..d335833a
--- /dev/null
+++ b/gas/testsuite/gas/arm/bundle-lock.d
@@ -0,0 +1,247 @@
+#name: ARM .bundle_lock
+#as: -march=armv7-a
+#objdump: -drw
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+
+# This is testing the .bundle_lock feature, with 16-byte bundles.  To keep
+# this file simple, we just verify that every 16-byte boundary appears in
+# the disassembly as either bkpt (what we use for padding to the chosen
+# offset) or adds (what we use at the beginning of each bundle-locked
+# sequence).
+
+0+0000 <arm_sequence_1_offset_0>:
+#...
+ *0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *10:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *20:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *30:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *40:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *50:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *60:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *70:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *80:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *90:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *a0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *b0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *c0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *d0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *e0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *f0:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *100:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *110:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *120:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *130:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *140:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+ *150:\s+(e1200070\s+bkpt|e0900001\s+adds)\s+.+
+#...
+0+160 <thumb_sequence_1_offset_0>:
+ *160:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *170:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *180:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *190:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *1a0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *1b0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *1c0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *1d0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *1e0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *1f0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *200:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *210:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *220:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *230:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *240:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *250:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *260:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *270:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *280:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *290:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *2a0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *2b0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *2c0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *2d0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *2e0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *2f0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *300:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *310:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *320:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *330:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *340:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *350:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *360:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *370:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *380:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *390:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *3a0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *3b0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *3c0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *3d0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *3e0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *3f0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *400:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *410:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *420:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *430:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *440:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *450:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *460:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *470:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *480:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *490:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *4a0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *4b0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *4c0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *4d0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *4e0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *4f0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *500:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *510:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *520:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *530:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *540:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *550:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *560:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *570:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *580:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *590:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *5a0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *5b0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *5c0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *5d0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *5e0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *5f0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *600:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *610:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *620:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *630:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *640:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *650:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *660:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *670:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *680:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *690:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *6a0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *6b0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *6c0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *6d0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *6e0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *6f0:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *700:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *710:\s+(be00\s+bkpt|1840\s+adds)\s+.+
+#...
+ *720:\s+e1200070\s+bkpt\s+.+
+#...
diff --git a/gas/testsuite/gas/arm/bundle-lock.s b/gas/testsuite/gas/arm/bundle-lock.s
new file mode 100644
index 0000000..b8fa38f
--- /dev/null
+++ b/gas/testsuite/gas/arm/bundle-lock.s
@@ -0,0 +1,64 @@
+	.syntax unified
+	.bundle_align_mode 4
+
+# We use these macros to test each pattern at every offset from
+# bundle alignment, i.e. [0,16) by 2 or 4.
+
+	size_arm = 4
+	size_thumb = 2
+
+.macro offset_sequence which, size, offset
+	.p2align 4
+\which\()_sequence_\size\()_offset_\offset\():
+	.rept \offset / size_\which
+	bkpt
+	.endr
+	test_sequence \size
+.endm
+
+.macro test_offsets_arm size
+	.arm
+	offset_sequence arm, \size, 0
+	offset_sequence arm, \size, 4
+	offset_sequence arm, \size, 8
+	offset_sequence arm, \size, 12
+.endm
+
+.macro test_offsets_thumb size
+	.thumb
+	offset_sequence thumb, \size, 0
+	offset_sequence thumb, \size, 2
+	offset_sequence thumb, \size, 4
+	offset_sequence thumb, \size, 6
+	offset_sequence thumb, \size, 8
+	offset_sequence thumb, \size, 10
+	offset_sequence thumb, \size, 12
+	offset_sequence thumb, \size, 14
+.endm
+
+.macro test_sequence size
+	.bundle_lock
+	adds r0, r1
+	.rept \size - 1
+	subs r0, r1
+	.endr
+	.bundle_unlock
+.endm
+
+	test_offsets_arm 1
+	test_offsets_arm 2
+	test_offsets_arm 3
+	test_offsets_arm 4
+
+	test_offsets_thumb 1
+	test_offsets_thumb 2
+	test_offsets_thumb 3
+	test_offsets_thumb 4
+	test_offsets_thumb 5
+	test_offsets_thumb 6
+	test_offsets_thumb 7
+	test_offsets_thumb 8
+
+	.arm
+.p2align 4
+	bkpt
diff --git a/gas/testsuite/gas/arm/bundle.d b/gas/testsuite/gas/arm/bundle.d
new file mode 100644
index 0000000..1c5e5a2
--- /dev/null
+++ b/gas/testsuite/gas/arm/bundle.d
@@ -0,0 +1,96 @@
+#name: ARM .bundle_align_mode
+#as: -march=armv7-a
+#objdump: -drw
+
+.*: +file format .*arm.*
+
+Disassembly of section \.text:
+
+# This is testing the basic bundling features, with 16-byte bundles.
+# To keep this file simple, we just verify that every 16-byte boundary
+# appears in the disassembly as the start of an instruction.
+0+0000 <test_arm_offset_0>:
+ *0:\s+[0-9a-f]{8}\s+[a-z].+
+#...
+ *10:\s+[0-9a-f]{8}\s+[a-z].+
+#...
+ *20:\s+[0-9a-f]{8}\s+[a-z].+
+#...
+ *30:\s+[0-9a-f]{8}\s+[a-z].+
+#...
+0+0040 <test_thumb_2_offset_0>:
+#...
+ *40:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *50:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *60:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *70:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *80:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *90:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *a0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *b0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *c0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *d0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *e0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *f0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *100:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *110:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *120:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *130:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *140:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *150:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *160:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *170:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *180:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *190:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *1a0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *1b0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *1c0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *1d0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *1e0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *1f0:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *200:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *210:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *220:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *230:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *240:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *250:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *260:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+ *270:\s+([0-9a-f]{4} ){1,2}\s+[a-z].+
+#...
+[0-9a-f]+ <pad_for_far_target>:
+#...
diff --git a/gas/testsuite/gas/arm/bundle.s b/gas/testsuite/gas/arm/bundle.s
new file mode 100644
index 0000000..9ec8337
--- /dev/null
+++ b/gas/testsuite/gas/arm/bundle.s
@@ -0,0 +1,74 @@
+	.syntax unified
+	.bundle_align_mode 4
+
+# We use these macros to test each pattern at every offset from
+# bundle alignment, i.e. [0,16) by 2 or 4.
+
+.macro offset_insn insn_name, offset, size
+	.p2align 4
+\insn_name\()_offset_\offset\():
+	.rept \offset / \size
+	bkpt
+	.endr
+	\insn_name
+.endm
+
+.macro test_offsets_arm insn_name
+	.arm
+	offset_insn \insn_name, 0, 4
+	offset_insn \insn_name, 4, 4
+	offset_insn \insn_name, 8, 4
+	offset_insn \insn_name, 12, 4
+.endm
+
+.macro test_offsets_thumb insn_name
+	.thumb
+	offset_insn \insn_name, 0, 2
+	offset_insn \insn_name, 2, 2
+	offset_insn \insn_name, 4, 2
+	offset_insn \insn_name, 6, 2
+	offset_insn \insn_name, 8, 2
+	offset_insn \insn_name, 10, 2
+	offset_insn \insn_name, 12, 2
+	offset_insn \insn_name, 14, 2
+.endm
+
+.macro test_arm
+	add r0, r1
+.endm
+
+.macro test_thumb_2
+	adds r0, r1
+.endm
+.macro test_thumb_4
+	adds r8, r9
+.endm
+
+test_offsets_arm test_arm
+test_offsets_thumb test_thumb_2
+test_offsets_thumb test_thumb_4
+
+# There are many relaxation cases for Thumb instructions.
+# But we use as representative the simple branch cases.
+
+.macro test_thumb_b_2
+	b 0f
+	bkpt 1
+0:	bkpt 2
+.endm
+.macro test_thumb_b_4
+	b far_target
+.endm
+
+test_offsets_thumb test_thumb_b_2
+test_offsets_thumb test_thumb_b_4
+
+# This is to set up a branch target surely too far for a short branch.
+pad_for_far_target:
+	.rept 1025
+	bkpt 1
+	.endr
+far_target:
+	bkpt 2
+.p2align 4
+	bkpt
diff --git a/gas/testsuite/gas/i386/bundle-bad.d b/gas/testsuite/gas/i386/bundle-bad.d
new file mode 100644
index 0000000..ba56f32
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle-bad.d
@@ -0,0 +1,2 @@
+#name: .bundle_align_mode diagnostics
+#error-output: bundle-bad.l
diff --git a/gas/testsuite/gas/i386/bundle-bad.l b/gas/testsuite/gas/i386/bundle-bad.l
new file mode 100644
index 0000000..ece5d7e
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle-bad.l
@@ -0,0 +1,11 @@
+[^:]*: Assembler messages:
+[^:]*:4:.*\.bundle_lock is meaningless without \.bundle_align_mode
+[^:]*:6:.*\.bundle_unlock without preceding \.bundle_lock
+[^:]*:11:.*single instruction is [0-9]+ bytes long but \.bundle_align_mode limit is [0-9]+
+[^:]*:18:.*\.bundle_lock sequence at [0-9]+ bytes but \.bundle_align_mode limit is [0-9]+ bytes
+[^:]*:19:.*\.bundle_lock sequence is [0-9]+ bytes, but bundle size only [0-9]+
+[^:]*:26:.*cannot change section or subsection inside \.bundle_lock
+[^:]*:31:.*cannot change \.bundle_align_mode inside \.bundle_lock
+[^:]*:36:.*\.bundle_unlock without preceding \.bundle_lock
+[^:]*:41:.*second \.bundle_lock without \.bundle_unlock
+[^:]*:46:.*\.bundle_lock with no matching \.bundle_unlock
diff --git a/gas/testsuite/gas/i386/bundle-bad.s b/gas/testsuite/gas/i386/bundle-bad.s
new file mode 100644
index 0000000..0974d30
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle-bad.s
@@ -0,0 +1,47 @@
+	.text
+
+	# Using .bundle_lock without the mode enabled.
+	.bundle_lock
+	hlt
+	.bundle_unlock
+
+	.bundle_align_mode 3
+
+	# This instruction is 9 bytes long, exceeding the 8-byte bundle size.
+	lock addl $0xaabbccdd,%fs:0x10(%esi)
+
+	hlt
+
+	# This locked sequence exceeds the bundle size.
+	.bundle_lock
+	mov $0xaabbccdd,%eax
+	mov $0xaabbccdd,%eax
+	.bundle_unlock
+
+	# Test changing subsection inside .bundle_lock.
+	.text 0
+	.bundle_lock
+	clc
+	.text 1
+	cld
+	.bundle_unlock
+
+	# Trying to change the setting inside .bundle_lock.
+	.bundle_lock
+	.bundle_align_mode 0
+	.bundle_unlock
+
+	# Spurious .bundle_unlock.
+	hlt
+	.bundle_unlock
+
+	# Nested .bundle_lock.
+	.bundle_lock
+	clc
+	.bundle_lock
+	cld
+	.bundle_unlock
+
+	# End of input with dangling .bundle_lock.
+	.bundle_lock
+	hlt
diff --git a/gas/testsuite/gas/i386/bundle-lock.d b/gas/testsuite/gas/i386/bundle-lock.d
new file mode 100644
index 0000000..cf61943
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle-lock.d
@@ -0,0 +1,3055 @@
+#objdump: -drw
+#name: i386 .bundle_lock
+
+.*: +file format .*i386.*
+
+Disassembly of section \.text:
+
+# This is testing the .bundle_lock feature, with 32-byte bundles.  To keep
+# this file simple, we just verify that every 32-byte boundary appears in
+# the disassembly as either hlt (what we use for padding to the chosen
+# offset) or clc (what we use at the beginning of each bundle-locked
+# sequence).
+
+0+0000 <sequence_1_offset_0>:
+ *0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *100:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *120:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *140:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *160:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *180:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *200:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *220:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *240:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *260:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *280:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *2a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *2c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *2e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *300:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *320:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *340:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *360:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *380:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *3a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *3c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *3e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *400:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *420:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *440:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *460:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *480:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *4a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *4c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *4e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *500:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *520:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *540:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *560:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *580:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *5a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *5c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *5e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *600:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *620:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *640:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *660:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *680:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *6a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *6c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *6e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *700:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *720:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *740:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *760:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *780:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *7a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *7c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *7e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *800:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *820:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *840:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *860:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *880:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *8a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *8c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *8e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *900:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *920:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *940:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *960:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *980:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *9a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *9c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *9e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *a00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *a20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *a40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *a60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *a80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *aa0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ac0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ae0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *b00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *b20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *b40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *b60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *b80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ba0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *be0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *c00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *c20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *c40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *c60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *c80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ca0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *cc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ce0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *d00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *d20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *d40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *d60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *d80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *da0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *dc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *de0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *e00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *e20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *e40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *e60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *e80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ea0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ec0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *ee0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *f00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *f20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *f40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *f60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *f80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *fa0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *fc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *fe0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1000:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1020:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1040:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1060:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1080:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *10a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *10c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *10e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1100:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1120:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1140:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1160:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1180:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *11a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *11c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *11e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1200:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1220:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1240:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1260:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1280:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *12a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *12c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *12e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1300:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1320:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1340:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1360:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1380:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *13a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *13c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *13e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1400:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1420:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1440:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1460:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1480:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *14a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *14c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *14e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1500:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1520:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1540:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1560:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1580:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *15a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *15c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *15e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1600:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1620:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1640:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1660:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1680:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *16a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *16c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *16e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1700:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1720:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1740:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1760:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1780:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *17a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *17c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *17e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1800:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1820:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1840:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1860:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1880:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *18a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *18c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *18e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1900:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1920:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1940:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1960:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1980:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *19a0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *19c0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *19e0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1a00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1a20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1a40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1a60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1a80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1aa0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1ac0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1ae0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1b00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1b20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1b40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1b60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1b80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1ba0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1bc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1be0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1c00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1c20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1c40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1c60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1c80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1ca0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1cc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1ce0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1d00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1d20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1d40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1d60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1d80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1da0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1dc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1de0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1e00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1e20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1e40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1e60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *1e80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
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+ *bac0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bae0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bb00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bb20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bb40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bb60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bb80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bba0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bbc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bbe0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bc00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bc20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bc40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bc60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bc80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bca0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bcc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bce0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bd00:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bd20:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bd40:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bd60:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bd80:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bda0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bdc0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *bde0:\s+(f4\s+hlt|f8\s+clc)\s*
+#...
+ *be00:\s+f4\s+hlt\s*
diff --git a/gas/testsuite/gas/i386/bundle-lock.s b/gas/testsuite/gas/i386/bundle-lock.s
new file mode 100644
index 0000000..6fca9c8
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle-lock.s
@@ -0,0 +1,93 @@
+	.bundle_align_mode 5
+
+# We use these macros to test each pattern at every offset from
+# bundle alignment, i.e. [0,31].
+
+.macro offset_sequence size, offset
+	.p2align 5
+sequence_\size\()_offset_\offset\():
+	.if \offset
+	.space \offset, 0xf4
+	.endif
+	test_sequence \size
+.endm
+
+.macro test_offsets size
+	offset_sequence \size, 0
+	offset_sequence \size, 1
+	offset_sequence \size, 2
+	offset_sequence \size, 3
+	offset_sequence \size, 4
+	offset_sequence \size, 5
+	offset_sequence \size, 6
+	offset_sequence \size, 7
+	offset_sequence \size, 8
+	offset_sequence \size, 9
+	offset_sequence \size, 10
+	offset_sequence \size, 11
+	offset_sequence \size, 12
+	offset_sequence \size, 13
+	offset_sequence \size, 14
+	offset_sequence \size, 15
+	offset_sequence \size, 16
+	offset_sequence \size, 17
+	offset_sequence \size, 18
+	offset_sequence \size, 19
+	offset_sequence \size, 20
+	offset_sequence \size, 21
+	offset_sequence \size, 22
+	offset_sequence \size, 23
+	offset_sequence \size, 24
+	offset_sequence \size, 25
+	offset_sequence \size, 26
+	offset_sequence \size, 27
+	offset_sequence \size, 28
+	offset_sequence \size, 29
+	offset_sequence \size, 30
+	offset_sequence \size, 31
+.endm
+
+.macro test_sequence size
+	.bundle_lock
+	clc
+	.rept \size - 1
+	cld
+	.endr
+	.bundle_unlock
+.endm
+
+	test_offsets 1
+	test_offsets 2
+	test_offsets 3
+	test_offsets 4
+	test_offsets 5
+	test_offsets 6
+	test_offsets 7
+	test_offsets 8
+	test_offsets 9
+	test_offsets 10
+	test_offsets 11
+	test_offsets 12
+	test_offsets 13
+	test_offsets 14
+	test_offsets 15
+	test_offsets 16
+	test_offsets 17
+	test_offsets 18
+	test_offsets 19
+	test_offsets 20
+	test_offsets 21
+	test_offsets 22
+	test_offsets 23
+	test_offsets 24
+	test_offsets 25
+	test_offsets 26
+	test_offsets 27
+	test_offsets 28
+	test_offsets 29
+	test_offsets 30
+	test_offsets 31
+	test_offsets 32
+
+.p2align 5
+	hlt
diff --git a/gas/testsuite/gas/i386/bundle.d b/gas/testsuite/gas/i386/bundle.d
new file mode 100644
index 0000000..4dda7ac
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle.d
@@ -0,0 +1,2193 @@
+#objdump: -drw
+#name: i386 .bundle_align_mode
+
+.*: +file format .*i386.*
+
+Disassembly of section \.text:
+
+# This is testing the basic bundling features, with 32-byte bundles.
+# To keep this file simple, we just verify that every 32-byte boundary
+# appears in the disassembly as the start of an instruction.
+
+0+0000 <test_1_offset_0>:
+ *0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *100:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *120:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *140:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *160:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *180:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *200:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *220:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *240:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *260:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *280:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *2a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *2c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *2e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *300:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *320:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *340:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *360:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *380:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *3a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *3c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *3e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *400:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *420:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *440:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *460:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *480:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *4a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *4c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *4e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *500:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *520:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *540:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *560:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *580:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *5a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *5c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *5e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *600:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *620:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *640:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *660:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *680:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *6a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *6c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *6e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *700:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *720:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *740:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *760:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *780:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *800:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *820:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *840:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *860:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *880:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *900:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *920:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *940:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *960:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *980:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *9a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *9c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *9e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *aa0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ac0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ae0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *b00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *b20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *b40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *b60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *b80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ba0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *bc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *be0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ca0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *cc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ce0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *d00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *d20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *d40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *d60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *d80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *da0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *dc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *de0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ea0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ec0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *ee0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *f00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *f20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *f40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *f60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *f80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *fa0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *fc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *fe0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1000:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1020:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1040:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1060:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1080:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *10a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *10c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *10e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1100:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1120:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1140:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1160:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1180:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *11a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *11c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *11e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1200:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1220:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1240:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1260:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1280:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *12a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *12c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *12e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1300:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1320:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1340:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1360:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1380:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *13a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
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+ *7a80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7aa0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ac0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ae0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7b00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7b20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7b40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7b60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7b80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ba0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7bc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7be0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7c00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7c20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7c40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7c60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7c80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ca0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7cc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ce0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7d00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7d20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7d40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7d60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7d80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7da0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7dc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7de0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7e00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7e20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7e40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7e60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7e80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ea0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ec0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7ee0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7f00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7f20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7f40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7f60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7f80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7fa0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7fc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *7fe0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8000:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8020:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8040:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8060:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8080:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *80a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *80c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *80e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8100:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8120:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8140:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8160:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8180:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *81a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *81c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *81e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8200:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8220:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8240:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8260:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8280:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *82a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *82c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *82e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8300:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8320:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8340:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8360:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8380:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *83a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *83c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *83e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8400:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8420:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8440:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8460:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8480:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *84a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *84c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *84e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8500:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8520:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8540:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8560:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8580:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *85a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *85c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *85e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8600:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8620:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8640:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8660:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8680:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *86a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *86c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *86e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8700:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8720:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8740:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8760:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8780:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *87a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *87c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *87e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8800:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8820:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8840:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
diff --git a/gas/testsuite/gas/i386/bundle.s b/gas/testsuite/gas/i386/bundle.s
new file mode 100644
index 0000000..3932f63
--- /dev/null
+++ b/gas/testsuite/gas/i386/bundle.s
@@ -0,0 +1,158 @@
+	.bundle_align_mode 5
+
+# We use these macros to test each pattern at every offset from
+# bundle alignment, i.e. [0,31].
+
+.macro offset_insn insn_name, offset
+	.p2align 5
+\insn_name\()_offset_\offset\():
+	.if \offset
+	.space \offset, 0xf4
+	.endif
+	\insn_name
+.endm
+
+.macro test_offsets insn_name
+	offset_insn \insn_name, 0
+	offset_insn \insn_name, 1
+	offset_insn \insn_name, 2
+	offset_insn \insn_name, 3
+	offset_insn \insn_name, 4
+	offset_insn \insn_name, 5
+	offset_insn \insn_name, 6
+	offset_insn \insn_name, 7
+	offset_insn \insn_name, 8
+	offset_insn \insn_name, 9
+	offset_insn \insn_name, 10
+	offset_insn \insn_name, 11
+	offset_insn \insn_name, 12
+	offset_insn \insn_name, 13
+	offset_insn \insn_name, 14
+	offset_insn \insn_name, 15
+	offset_insn \insn_name, 16
+	offset_insn \insn_name, 17
+	offset_insn \insn_name, 18
+	offset_insn \insn_name, 19
+	offset_insn \insn_name, 20
+	offset_insn \insn_name, 21
+	offset_insn \insn_name, 22
+	offset_insn \insn_name, 23
+	offset_insn \insn_name, 24
+	offset_insn \insn_name, 25
+	offset_insn \insn_name, 26
+	offset_insn \insn_name, 27
+	offset_insn \insn_name, 28
+	offset_insn \insn_name, 29
+	offset_insn \insn_name, 30
+	offset_insn \insn_name, 31
+.endm
+
+# These are vanilla (non-relaxed) instructions of each length.
+.macro test_1
+	inc %eax
+.endm
+.macro test_2
+	add %eax,%eax
+.endm
+.macro test_3
+	and $3,%eax
+.endm
+.macro test_4
+	lock and $3,(%eax)
+.endm
+.macro test_5
+	mov $0xaabbccdd,%eax
+.endm
+.macro test_6
+	movl %eax,0xaabbccdd(%esi)
+.endm
+.macro test_7
+	movl $0xaabbccdd,0x7f(%esi)
+.endm
+.macro test_8
+	lock addl $0xaabbccdd,0x10(%esi)
+.endm
+.macro test_9
+	lock addl $0xaabbccdd,%fs:0x10(%esi)
+.endm
+.macro test_10
+	movl $0xaabbccdd,0x7ff(%esi)
+.endm
+.macro test_11
+	lock addl $0xaabbccdd,0x7ff(%esi)
+.endm
+.macro test_12
+	lock addl $0xaabbccdd,%fs:0x7ff(%esi)
+.endm
+
+test_offsets test_1
+test_offsets test_2
+test_offsets test_3
+test_offsets test_4
+test_offsets test_5
+test_offsets test_6
+test_offsets test_7
+test_offsets test_8
+test_offsets test_9
+test_offsets test_10
+test_offsets test_11
+test_offsets test_12
+
+# The only relaxation cases are the jump instructions.
+# For each of the three flavors of jump (unconditional, conditional,
+# and conditional with prediction), we test a case that can be relaxed
+# to its shortest form, and one that must use the long form.
+.macro jmp_2
+	jmp jmp_2_\@
+	movl $0xdeadbeef,%eax
+jmp_2_\@\():
+	movl $0xb00b,%eax
+.endm
+.macro jmp_5
+	jmp jmp_5_\@
+	.rept 128
+	inc %eax
+	.endr
+jmp_5_\@\():
+	movl $0xb00b,%eax
+.endm
+
+.macro cjmp_2
+	jz cjmp_2_\@
+	movl $0xdeadbeef,%eax
+cjmp_2_\@\():
+	movl $0xb00b,%eax
+.endm
+.macro cjmp_6
+	jz cjmp_6_\@
+	.rept 128
+	inc %eax
+	.endr
+cjmp_6_\@\():
+	movl $0xb00b,%eax
+.endm
+
+.macro pjmp_3
+	jz,pt pjmp_3_\@
+	movl $0xdeadbeef,%eax
+pjmp_3_\@\():
+	movl $0xb00b,%eax
+.endm
+.macro pjmp_7
+	jz,pt pjmp_7_\@
+	.rept 128
+	inc %eax
+	.endr
+pjmp_7_\@\():
+	movl $0xb00b,%eax
+.endm
+
+test_offsets jmp_2
+test_offsets cjmp_2
+test_offsets pjmp_3
+test_offsets jmp_5
+test_offsets cjmp_6
+test_offsets pjmp_7
+
+.p2align 5
+	hlt
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 028cda4..fc67db0 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -204,6 +204,9 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "fsgs-intel"
     run_dump_test "rdrnd"
     run_dump_test "rdrnd-intel"
+    run_dump_test "bundle"
+    run_dump_test "bundle-lock"
+    run_dump_test "bundle-bad"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -432,6 +435,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-fsgs-intel"
     run_dump_test "x86-64-rdrnd"
     run_dump_test "x86-64-rdrnd-intel"
+    run_dump_test "x86-64-bundle"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-bundle.d b/gas/testsuite/gas/i386/x86-64-bundle.d
new file mode 100644
index 0000000..8f6ccef
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-bundle.d
@@ -0,0 +1,2281 @@
+#objdump: -drw
+#name: x86-64 .bundle_align_mode
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+# This is testing the basic bundling features, with 32-byte bundles.
+# To keep this file simple, we just verify that every 32-byte boundary
+# appears in the disassembly as the start of an instruction.
+
+0+0000 <test_1_offset_0>:
+ *0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *100:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *120:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *140:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *160:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *180:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *1e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *200:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *220:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *240:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *260:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *280:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *2a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *2c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *2e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *300:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *320:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *340:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *360:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *380:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *3a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *3c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *3e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *400:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *420:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *440:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *460:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
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+ *8500:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8520:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8540:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8560:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8580:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *85a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *85c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *85e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8600:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8620:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8640:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8660:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8680:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *86a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *86c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *86e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8700:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8720:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8740:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8760:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8780:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *87a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *87c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *87e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8800:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8820:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8840:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8860:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8880:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *88a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *88c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *88e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8900:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8920:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8940:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8960:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8980:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *89a0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *89c0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *89e0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8a00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8a20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8a40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8a60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8a80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8aa0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8ac0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8ae0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8b00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8b20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8b40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8b60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8b80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8ba0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8bc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8be0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8c00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8c20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8c40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8c60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8c80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8ca0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8cc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8ce0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8d00:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8d20:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8d40:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8d60:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8d80:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8da0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
+#...
+ *8dc0:\s+([0-9a-f][0-9a-f] )+\s+[a-z].+
diff --git a/gas/testsuite/gas/i386/x86-64-bundle.s b/gas/testsuite/gas/i386/x86-64-bundle.s
new file mode 100644
index 0000000..8272f04
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-bundle.s
@@ -0,0 +1,162 @@
+	.bundle_align_mode 5
+
+# We use these macros to test each pattern at every offset from
+# bundle alignment, i.e. [0,31].
+
+.macro offset_insn insn_name, offset
+	.p2align 5
+\insn_name\()_offset_\offset\():
+	.if \offset
+	.space \offset, 0xf4
+	.endif
+	\insn_name
+.endm
+
+.macro test_offsets insn_name
+	offset_insn \insn_name, 0
+	offset_insn \insn_name, 1
+	offset_insn \insn_name, 2
+	offset_insn \insn_name, 3
+	offset_insn \insn_name, 4
+	offset_insn \insn_name, 5
+	offset_insn \insn_name, 6
+	offset_insn \insn_name, 7
+	offset_insn \insn_name, 8
+	offset_insn \insn_name, 9
+	offset_insn \insn_name, 10
+	offset_insn \insn_name, 11
+	offset_insn \insn_name, 12
+	offset_insn \insn_name, 13
+	offset_insn \insn_name, 14
+	offset_insn \insn_name, 15
+	offset_insn \insn_name, 16
+	offset_insn \insn_name, 17
+	offset_insn \insn_name, 18
+	offset_insn \insn_name, 19
+	offset_insn \insn_name, 20
+	offset_insn \insn_name, 21
+	offset_insn \insn_name, 22
+	offset_insn \insn_name, 23
+	offset_insn \insn_name, 24
+	offset_insn \insn_name, 25
+	offset_insn \insn_name, 26
+	offset_insn \insn_name, 27
+	offset_insn \insn_name, 28
+	offset_insn \insn_name, 29
+	offset_insn \insn_name, 30
+	offset_insn \insn_name, 31
+.endm
+
+# These are vanilla (non-relaxed) instructions of each length.
+.macro test_1
+	clc
+.endm
+.macro test_2
+	add %eax,%eax
+.endm
+.macro test_3
+	and $3,%eax
+.endm
+.macro test_4
+	lock and $3,(%rax)
+.endm
+.macro test_5
+	mov $0x11223344,%eax
+.endm
+.macro test_6
+	movl %eax,0x11223344(%rsi)
+.endm
+.macro test_7
+	movl $0x11223344,0x7f(%rsi)
+.endm
+.macro test_8
+	lock addl $0x11223344,0x10(%rsi)
+.endm
+.macro test_9
+	lock addl $0x11223344,%fs:0x10(%rsi)
+.endm
+.macro test_10
+	movl $0x11223344,0x7ff(%rsi)
+.endm
+.macro test_11
+	lock addl $0x11223344,0x7ff(%rsi)
+.endm
+.macro test_12
+	lock addl $0x11223344,%fs:0x7ff(%rsi)
+.endm
+.macro test_13
+	lock addl $0x11223344,%fs:0x7ff(%r11)
+.endm
+
+test_offsets test_1
+test_offsets test_2
+test_offsets test_3
+test_offsets test_4
+test_offsets test_5
+test_offsets test_6
+test_offsets test_7
+test_offsets test_8
+test_offsets test_9
+test_offsets test_10
+test_offsets test_11
+test_offsets test_12
+test_offsets test_13
+
+# The only relaxation cases are the jump instructions.
+# For each of the three flavors of jump (unconditional, conditional,
+# and conditional with prediction), we test a case that can be relaxed
+# to its shortest form, and one that must use the long form.
+.macro jmp_2
+	jmp jmp_2_\@
+	movl $0xdeadbeef,%eax
+jmp_2_\@\():
+	movl $0xb00b,%eax
+.endm
+.macro jmp_5
+	jmp jmp_5_\@
+	.rept 128
+	clc
+	.endr
+jmp_5_\@\():
+	movl $0xb00b,%eax
+.endm
+
+.macro cjmp_2
+	jz cjmp_2_\@
+	movl $0xdeadbeef,%eax
+cjmp_2_\@\():
+	movl $0xb00b,%eax
+.endm
+.macro cjmp_6
+	jz cjmp_6_\@
+	.rept 128
+	clc
+	.endr
+cjmp_6_\@\():
+	movl $0xb00b,%eax
+.endm
+
+.macro pjmp_3
+	jz,pt pjmp_3_\@
+	movl $0xdeadbeef,%eax
+pjmp_3_\@\():
+	movl $0xb00b,%eax
+.endm
+.macro pjmp_7
+	jz,pt pjmp_7_\@
+	.rept 128
+	clc
+	.endr
+pjmp_7_\@\():
+	movl $0xb00b,%eax
+.endm
+
+test_offsets jmp_2
+test_offsets cjmp_2
+test_offsets pjmp_3
+test_offsets jmp_5
+test_offsets cjmp_6
+test_offsets pjmp_7
+
+.p2align 5
+	hlt
author	Roland McGrath <roland@gnu.org>	2012-03-13 16:59:57 +0000
committer	Roland McGrath <roland@gnu.org>	2012-03-13 16:59:57 +0000
commit	fa94de6b5c193ccfe743efa63720647f63417032 (patch)
tree	6e2097f0183c1ad232e4f9650cd885a26de0c6c7 /gas
parent	46cb6474c3a9fae3dbe25f7f42a7d24217d0fb5c (diff)
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