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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2011-07-24 14:04:51 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2011-07-24 14:04:51 +0000 |
| commit | bcd530a7131f7830e80eae028fbfc2d0b5f531c6 (patch) | |
| tree | 96b5dbc8784880ac701e2dd460374e0ff35f0d00 /gas | |
| parent | bbc40cf228fff7b7e0c3d0856d8887949cdde54b (diff) | |
| download | gdb-bcd530a7131f7830e80eae028fbfc2d0b5f531c6.zip gdb-bcd530a7131f7830e80eae028fbfc2d0b5f531c6.tar.gz gdb-bcd530a7131f7830e80eae028fbfc2d0b5f531c6.tar.bz2 | |
include/opcode/
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (INSN_TRAP): Rename to...
(INSN_NO_DELAY_SLOT): ... this.
(INSN_SYNC): Remove macro.
gas/
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC
as well as explicit checks for ERET and DERET when scheduling
branch delay slots.
opcodes/
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
* mips-opc.c (NODS): New macro.
(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
(DSP_VOLA): Likewise.
(mips_builtin_opcodes): Add NODS annotation to "deret" and
"eret". Replace INSN_SYNC with NODS throughout. Use NODS in
place of TRAP for "wait", "waiti" and "yield".
* mips16-opc.c (NODS): New macro.
(TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
(mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc",
"restore" and "save".
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 20 |
2 files changed, 13 insertions, 14 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index d0d2693..508a3bb 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2011-07-24 Maciej W. Rozycki <macro@codesourcery.com> + + * config/tc-mips.c (can_swap_branch_p): Adjust for the rename of + INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC + as well as explicit checks for ERET and DERET when scheduling + branch delay slots. + 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add k1om. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index d08bcd3..afa8b38 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -3148,21 +3148,13 @@ can_swap_branch_p (struct mips_cl_insn *ip) && history[0].frag->fr_type == rs_machine_dependent) return FALSE; - /* We do not swap with a trap instruction, since it complicates trap - handlers to have the trap instruction be in a delay slot. */ + /* We do not swap with instructions that cannot architecturally + be placed in a branch delay slot, such as SYNC or ERET. We + also refrain from swapping with a trap instruction, since it + complicates trap handlers to have the trap instruction be in + a delay slot. */ prev_pinfo = history[0].insn_mo->pinfo; - if (prev_pinfo & INSN_TRAP) - return FALSE; - - /* If the previous instruction is a sync, sync.l, or sync.p, we can - not swap. */ - if (prev_pinfo & INSN_SYNC) - return FALSE; - - /* If the previous instruction is an ERET or DERET, avoid the swap. */ - if (history[0].insn_opcode == INSN_ERET) - return FALSE; - if (history[0].insn_opcode == INSN_DERET) + if (prev_pinfo & INSN_NO_DELAY_SLOT) return FALSE; /* Check for conflicts between the branch and the instructions |