diff options
author | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2012-08-24 07:50:38 +0000 |
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committer | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2012-08-24 07:50:38 +0000 |
commit | bca3892142429f819023a157be90c4d855cf93f8 (patch) | |
tree | 76e277e2b62f2589618489e945121e66bac4abbb /gas | |
parent | ecfb0d68c570de8a5e29858d104d82a76982de15 (diff) | |
download | gdb-bca3892142429f819023a157be90c4d855cf93f8.zip gdb-bca3892142429f819023a157be90c4d855cf93f8.tar.gz gdb-bca3892142429f819023a157be90c4d855cf93f8.tar.bz2 |
* bfd/elf32-arm.c (v8): New array.
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
(arm_attr_tag_FP_arch): Likewise.
(arm_attr_tag_Advanced_SIMD_arch): Likewise.
* gas/config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* gas/doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* include/opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 14 | ||||
-rw-r--r-- | gas/config/tc-arm.c | 71 | ||||
-rw-r--r-- | gas/doc/c-arm.texi | 11 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 11 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-march-all.d | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d | 18 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-march-armv8-a+fp.d | 17 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-march-armv8-a+simd.d | 18 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-march-armv8-a.d | 16 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/attr-mfpu-vfpv4.d | 1 |
11 files changed, 161 insertions, 20 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 53cd98e..0af7f05 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,17 @@ +2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + + * config/tc-arm.h (arm_ext_v8): New variable. + (fpu_vfp_ext_armv8): Likewise. + (fpu_neon_ext_armv8): Likewise. + (fpu_crypto_ext_armv8): Likewise. + (arm_archs): Add armv8-a. + (arm_extensions): Add crypto, fp, and simd. + (arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. + (cpu_arch_ver): Add support for ARMv8. + (aeabi_set_public_sttributes): Likewise. + * doc/c-arm.texi (ARM Options): Document new architecture and + extension options for ARMv8. + 2012-08-20 H.J. Lu <hongjiu.lu@intel.com> * doc/as.texinfo: Replace --n32 with --x32. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 795a1b5..101f86b 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -195,6 +195,7 @@ static const arm_feature_set arm_ext_v7 = ARM_FEATURE (ARM_EXT_V7, 0); static const arm_feature_set arm_ext_v7a = ARM_FEATURE (ARM_EXT_V7A, 0); static const arm_feature_set arm_ext_v7r = ARM_FEATURE (ARM_EXT_V7R, 0); static const arm_feature_set arm_ext_v7m = ARM_FEATURE (ARM_EXT_V7M, 0); +static const arm_feature_set arm_ext_v8 = ARM_FEATURE (ARM_EXT_V8, 0); static const arm_feature_set arm_ext_m = ARM_FEATURE (ARM_EXT_V6M | ARM_EXT_OS | ARM_EXT_V7M, 0); static const arm_feature_set arm_ext_mp = ARM_FEATURE (ARM_EXT_MP, 0); @@ -233,6 +234,12 @@ static const arm_feature_set fpu_vfp_v3_or_neon_ext = static const arm_feature_set fpu_vfp_fp16 = ARM_FEATURE (0, FPU_VFP_EXT_FP16); static const arm_feature_set fpu_neon_ext_fma = ARM_FEATURE (0, FPU_NEON_EXT_FMA); static const arm_feature_set fpu_vfp_ext_fma = ARM_FEATURE (0, FPU_VFP_EXT_FMA); +static const arm_feature_set fpu_vfp_ext_armv8 = + ARM_FEATURE (0, FPU_VFP_EXT_ARMV8); +static const arm_feature_set fpu_neon_ext_armv8 = + ARM_FEATURE (0, FPU_NEON_EXT_ARMV8); +static const arm_feature_set fpu_crypto_ext_armv8 = + ARM_FEATURE (0, FPU_CRYPTO_EXT_ARMV8); static int mfloat_abi_opt = -1; /* Record user cpu selection for object attributes. */ @@ -23188,6 +23195,7 @@ static const struct arm_arch_option_table arm_archs[] = ARM_ARCH_OPT ("armv7-r", ARM_ARCH_V7R, FPU_ARCH_VFP), ARM_ARCH_OPT ("armv7-m", ARM_ARCH_V7M, FPU_ARCH_VFP), ARM_ARCH_OPT ("armv7e-m", ARM_ARCH_V7EM, FPU_ARCH_VFP), + ARM_ARCH_OPT ("armv8-a", ARM_ARCH_V8A, FPU_ARCH_VFP), ARM_ARCH_OPT ("xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP), ARM_ARCH_OPT ("iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP), ARM_ARCH_OPT ("iwmmxt2", ARM_ARCH_IWMMXT2,FPU_ARCH_VFP), @@ -23209,6 +23217,10 @@ struct arm_option_extension_value_table #define ARM_EXT_OPT(N, V, AA) { N, sizeof (N) - 1, V, AA } static const struct arm_option_extension_value_table arm_extensions[] = { + ARM_EXT_OPT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8, + ARM_FEATURE (ARM_EXT_V8, 0)), + ARM_EXT_OPT ("fp", FPU_ARCH_VFP_ARMV8, + ARM_FEATURE (ARM_EXT_V8, 0)), ARM_EXT_OPT ("idiv", ARM_FEATURE (ARM_EXT_ADIV | ARM_EXT_DIV, 0), ARM_FEATURE (ARM_EXT_V7A | ARM_EXT_V7R, 0)), ARM_EXT_OPT ("iwmmxt",ARM_FEATURE (0, ARM_CEXT_IWMMXT), ARM_ANY), @@ -23218,6 +23230,8 @@ static const struct arm_option_extension_value_table arm_extensions[] = ARM_FEATURE (0, ARM_CEXT_MAVERICK), ARM_ANY), ARM_EXT_OPT ("mp", ARM_FEATURE (ARM_EXT_MP, 0), ARM_FEATURE (ARM_EXT_V7A | ARM_EXT_V7R, 0)), + ARM_EXT_OPT ("simd", FPU_ARCH_NEON_VFP_ARMV8, + ARM_FEATURE (ARM_EXT_V8, 0)), ARM_EXT_OPT ("os", ARM_FEATURE (ARM_EXT_OS, 0), ARM_FEATURE (ARM_EXT_V6M, 0)), ARM_EXT_OPT ("sec", ARM_FEATURE (ARM_EXT_SEC, 0), @@ -23275,6 +23289,10 @@ static const struct arm_option_fpu_value_table arm_fpus[] = {"vfpv4-d16", FPU_ARCH_VFP_V4D16}, {"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16}, {"neon-vfpv4", FPU_ARCH_NEON_VFP_V4}, + {"fp-armv8", FPU_ARCH_VFP_ARMV8}, + {"neon-fp-armv8", FPU_ARCH_NEON_VFP_ARMV8}, + {"crypto-neon-fp-armv8", + FPU_ARCH_CRYPTO_NEON_VFP_ARMV8}, {NULL, ARM_ARCH_NONE} }; @@ -23749,9 +23767,10 @@ static const cpu_arch_ver_table cpu_arch_ver[] = {11, ARM_ARCH_V6M}, {12, ARM_ARCH_V6SM}, {8, ARM_ARCH_V6T2}, - {10, ARM_ARCH_V7A}, + {10, ARM_ARCH_V7A_IDIV_MP_SEC_VIRT}, {10, ARM_ARCH_V7R}, {10, ARM_ARCH_V7M}, + {14, ARM_ARCH_V8A}, {0, ARM_ARCH_NONE} }; @@ -23781,6 +23800,7 @@ aeabi_set_public_attributes (void) int arch; char profile; int virt_sec = 0; + int fp16_optional = 0; arm_feature_set flags; arm_feature_set tmp; const cpu_arch_ver_table *p; @@ -23880,14 +23900,22 @@ aeabi_set_public_attributes (void) ARM_CPU_HAS_FEATURE (flags, arm_arch_t2) ? 2 : 1); /* Tag_VFP_arch. */ - if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_fma)) + if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_armv8)) + aeabi_set_attribute_int (Tag_VFP_arch, 7); + else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_fma)) aeabi_set_attribute_int (Tag_VFP_arch, ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_d32) ? 5 : 6); else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_d32)) - aeabi_set_attribute_int (Tag_VFP_arch, 3); + { + fp16_optional = 1; + aeabi_set_attribute_int (Tag_VFP_arch, 3); + } else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v3xd)) - aeabi_set_attribute_int (Tag_VFP_arch, 4); + { + aeabi_set_attribute_int (Tag_VFP_arch, 4); + fp16_optional = 1; + } else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v2)) aeabi_set_attribute_int (Tag_VFP_arch, 2); else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v1) @@ -23906,13 +23934,23 @@ aeabi_set_public_attributes (void) aeabi_set_attribute_int (Tag_WMMX_arch, 1); /* Tag_Advanced_SIMD_arch (formerly Tag_NEON_arch). */ - if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_v1)) - aeabi_set_attribute_int - (Tag_Advanced_SIMD_arch, (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_fma) - ? 2 : 1)); + if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_armv8)) + aeabi_set_attribute_int (Tag_Advanced_SIMD_arch, 3); + else if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_v1)) + { + if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_fma)) + { + aeabi_set_attribute_int (Tag_Advanced_SIMD_arch, 2); + } + else + { + aeabi_set_attribute_int (Tag_Advanced_SIMD_arch, 1); + fp16_optional = 1; + } + } /* Tag_VFP_HP_extension (formerly Tag_NEON_FP16_arch). */ - if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16)) + if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16) && fp16_optional) aeabi_set_attribute_int (Tag_VFP_HP_extension, 1); /* Tag_DIV_use. @@ -23921,12 +23959,17 @@ aeabi_set_public_attributes (void) in ARM state, or when Thumb integer divide instructions have been used, but we have no architecture profile set, nor have we any ARM instructions. + For ARMv8 we set the tag to 0 as integer divide is implied by the base + architecture. + For new architectures we will have to check these tests. */ - gas_assert (arch <= TAG_CPU_ARCH_V7E_M); - if (ARM_CPU_HAS_FEATURE (flags, arm_ext_adiv) - || (profile == '\0' - && ARM_CPU_HAS_FEATURE (flags, arm_ext_div) - && !ARM_CPU_HAS_FEATURE (arm_arch_used, arm_arch_any))) + gas_assert (arch <= TAG_CPU_ARCH_V8); + if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v8)) + aeabi_set_attribute_int (Tag_DIV_use, 0); + else if (ARM_CPU_HAS_FEATURE (flags, arm_ext_adiv) + || (profile == '\0' + && ARM_CPU_HAS_FEATURE (flags, arm_ext_div) + && !ARM_CPU_HAS_FEATURE (arm_arch_used, arm_arch_any))) aeabi_set_attribute_int (Tag_DIV_use, 2); /* Tag_MP_extension_use. */ diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index ae6c488..7d622ef 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -154,13 +154,16 @@ been added, again in ascending alphabetical order. For example, The following extensions are currently supported: -@code{idiv}, (Integer Divide Extensions for v7-A and v7-R architectures), +@code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}), +@code{fp} (Floating Point Extensions for v8-A architecture), +@code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures), @code{iwmmxt}, @code{iwmmxt2}, @code{maverick}, @code{mp} (Multiprocessing Extensions for v7-A and v7-R architectures), @code{os} (Operating System for v6M architecture), @code{sec} (Security Extensions for v6K and v7-A architectures), +@code{simd} (Advanced SIMD Extensions for v8-A architecture, implies @code{fp}), @code{virt} (Virtualization Extensions for v7-A architecture, implies @code{idiv}), and @@ -199,6 +202,7 @@ names are recognized: @code{armv7-r}, @code{armv7-m}, @code{armv7e-m}, +@code{armv8-a}, @code{iwmmxt} and @code{xscale}. @@ -241,13 +245,16 @@ The following format options are recognized: @code{vfpv4}, @code{vfpv4-d16}, @code{fpv4-sp-d16}, +@code{fp-armv8}, @code{arm1020t}, @code{arm1020e}, @code{arm1136jf-s}, @code{maverick}, @code{neon}, +@code{neon-vfpv4}, +@code{neon-fp-armv8}, and -@code{neon-vfpv4}. +@code{crypto-neon-fp-armv8}. In addition to determining which instructions are assembled, this option also affects the way in which the @code{.double} assembler directive behaves diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 328cdb0..dd0254d 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + + * gas/arm/attr-march-all.d: Update for change in expected + output. + * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. + * gas/arm/attr-mfpu-vfpv4.d: Likewise. + * gas/arm/attr-march-armv8-a+crypto.d: New testcase. + * gas/arm/attr-march-armv8-a+fp.d: Likewise. + * gas/arm/attr-march-armv8-a+simd.d: Likewise. + * gas/arm/attr-march-armv8-a.d: Likewise. + 2012-08-21 David S. Miller <davem@davemloft.net> * gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions. diff --git a/gas/testsuite/gas/arm/attr-march-all.d b/gas/testsuite/gas/arm/attr-march-all.d index ed4d652..4a80d2f 100644 --- a/gas/testsuite/gas/arm/attr-march-all.d +++ b/gas/testsuite/gas/arm/attr-march-all.d @@ -8,10 +8,9 @@ Attribute Section: aeabi File Attributes Tag_CPU_name: "all" - Tag_CPU_arch: v7 + Tag_CPU_arch: v8 Tag_CPU_arch_profile: Application Tag_ARM_ISA_use: Yes Tag_THUMB_ISA_use: Thumb-2 Tag_MPextension_use: Allowed - Tag_DIV_use: Allowed in v7-A with integer division extension Tag_Virtualization_use: TrustZone and Virtualization Extensions diff --git a/gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d b/gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d new file mode 100644 index 0000000..f1d9cf4 --- /dev/null +++ b/gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d @@ -0,0 +1,18 @@ +# name: attributes for -march=armv8-a+crypto +# source: blank.s +# as: -march=armv8-a+crypto +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi *-*-nacl* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8-A" + Tag_CPU_arch: v8 + Tag_CPU_arch_profile: Application + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_FP_arch: FP for ARMv8 + Tag_Advanced_SIMD_arch: NEON for ARMv8 + Tag_MPextension_use: Allowed + Tag_Virtualization_use: TrustZone and Virtualization Extensions diff --git a/gas/testsuite/gas/arm/attr-march-armv8-a+fp.d b/gas/testsuite/gas/arm/attr-march-armv8-a+fp.d new file mode 100644 index 0000000..54d472f --- /dev/null +++ b/gas/testsuite/gas/arm/attr-march-armv8-a+fp.d @@ -0,0 +1,17 @@ +# name: attributes for -march=armv8-a+fp +# source: blank.s +# as: -march=armv8-a+fp +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi *-*-nacl* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8-A" + Tag_CPU_arch: v8 + Tag_CPU_arch_profile: Application + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_FP_arch: FP for ARMv8 + Tag_MPextension_use: Allowed + Tag_Virtualization_use: TrustZone and Virtualization Extensions diff --git a/gas/testsuite/gas/arm/attr-march-armv8-a+simd.d b/gas/testsuite/gas/arm/attr-march-armv8-a+simd.d new file mode 100644 index 0000000..e8e6af9 --- /dev/null +++ b/gas/testsuite/gas/arm/attr-march-armv8-a+simd.d @@ -0,0 +1,18 @@ +# name: attributes for -march=armv8-a+simd +# source: blank.s +# as: -march=armv8-a+simd +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi *-*-nacl* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8-A" + Tag_CPU_arch: v8 + Tag_CPU_arch_profile: Application + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_FP_arch: FP for ARMv8 + Tag_Advanced_SIMD_arch: NEON for ARMv8 + Tag_MPextension_use: Allowed + Tag_Virtualization_use: TrustZone and Virtualization Extensions diff --git a/gas/testsuite/gas/arm/attr-march-armv8-a.d b/gas/testsuite/gas/arm/attr-march-armv8-a.d new file mode 100644 index 0000000..d02bc651 --- /dev/null +++ b/gas/testsuite/gas/arm/attr-march-armv8-a.d @@ -0,0 +1,16 @@ +# name: attributes for -march=armv8-a +# source: blank.s +# as: -march=armv8-a +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi *-*-nacl* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8-A" + Tag_CPU_arch: v8 + Tag_CPU_arch_profile: Application + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_MPextension_use: Allowed + Tag_Virtualization_use: TrustZone and Virtualization Extensions diff --git a/gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d b/gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d index 1b0e297..fd71a93 100644 --- a/gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d +++ b/gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d @@ -10,4 +10,3 @@ File Attributes Tag_ARM_ISA_use: Yes Tag_THUMB_ISA_use: Thumb-1 Tag_FP_arch: VFPv4-D16 - Tag_FP_HP_extension: Allowed diff --git a/gas/testsuite/gas/arm/attr-mfpu-vfpv4.d b/gas/testsuite/gas/arm/attr-mfpu-vfpv4.d index 1be3048..2a3edf7 100644 --- a/gas/testsuite/gas/arm/attr-mfpu-vfpv4.d +++ b/gas/testsuite/gas/arm/attr-mfpu-vfpv4.d @@ -10,4 +10,3 @@ File Attributes Tag_ARM_ISA_use: Yes Tag_THUMB_ISA_use: Thumb-1 Tag_FP_arch: VFPv4 - Tag_FP_HP_extension: Allowed |