2009-11-18 Sebastian Pop <sebastian.pop@amd.com>

	gas/
	* config/tc-i386.c (cpu_arch): Remove cvt16.
	(md_show_usage): Same.
	* doc/c-i386.texi: Same.

	gas/testsuite/
	* gas/i386/cvt16.d: Removed.
	* gas/i386/cvt16.s: Removed.
	* gas/i386/x86-64-cvt16.d: Removed.
	* gas/i386/x86-64-cvt16.s: Removed.
	* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.

	opcodes/
	* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
	(VEX_LEN_XOP_08_A1): Removed.
	(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
	VEX_LEN_XOP_08_A1.
	(vex_len_table): Same.
	* i386-gen.c (CPU_CVT16_FLAGS): Removed.
	(cpu_flags): Remove field for CpuCVT16.
	* i386-opc.h (CpuCVT16): Removed.
	(i386_cpu_flags): Remove bitfield cpucvt16.
	(i386-opc.tbl): Remove CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

9 files changed, 16 insertions, 301 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2af13c3..e9381c1 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2009-11-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+	* config/tc-i386.c (cpu_arch): Remove cvt16.
+	(md_show_usage): Same.
+	* doc/c-i386.texi: Same.
+
 2009-11-18  Paul Brook  <paul@codesourcery.com>
 
 	* config/tc-arm.c (arm_fpus): Add fpv4-sp-d16.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index e05db3b..87820d1 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -644,8 +644,6 @@ static const arch_entry cpu_arch[] =
     CPU_FMA4_FLAGS },
   { ".xop", PROCESSOR_UNKNOWN,
     CPU_XOP_FLAGS },
-  { ".cvt16", PROCESSOR_UNKNOWN,
-    CPU_CVT16_FLAGS },
   { ".lwp", PROCESSOR_UNKNOWN,
     CPU_LWP_FLAGS },
   { ".movbe", PROCESSOR_UNKNOWN,
@@ -8127,7 +8125,7 @@ md_show_usage (stream)
                            ssse3, sse4.1, sse4.2, sse4, nosse, avx, noavx,\n\
                            vmx, smx, xsave, movbe, ept, aes, pclmul, fma,\n\
                            clflush, syscall, rdtscp, 3dnow, 3dnowa, sse4a,\n\
-                           svme, abm, padlock, fma4, xop, cvt16, lwp\n"));
+                           svme, abm, padlock, fma4, xop, lwp\n"));
   fprintf (stream, _("\
   -mtune=CPU              optimize for CPU, CPU is one of:\n\
                            i8086, i186, i286, i386, i486, pentium, pentiumpro,\n\
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 27e77ac..2c440bf 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -144,7 +144,6 @@ accept various extension mnemonics.  For example,
 @code{lwp},
 @code{fma4},
 @code{xop},
-@code{cvt16},
 @code{syscall},
 @code{rdtscp},
 @code{3dnow},
@@ -925,7 +924,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.ept} @tab @samp{.clflush}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
-@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cvt16}
+@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop}
 @item @samp{.padlock}
 @end multitable
 
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 59bb011..bb79a5f 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2009-11-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+	* gas/i386/cvt16.d: Removed.
+	* gas/i386/cvt16.s: Removed.
+	* gas/i386/x86-64-cvt16.d: Removed.
+	* gas/i386/x86-64-cvt16.s: Removed.
+	* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.
+
 2009-11-18  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/rex.d: Remove suffix on fxsave.
diff --git a/gas/testsuite/gas/i386/cvt16.d b/gas/testsuite/gas/i386/cvt16.d
deleted file mode 100644
index 21680c5..0000000
--- a/gas/testsuite/gas/i386/cvt16.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#objdump: -dw
-#name: i386 CVT16
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <_start>:
-[ 	]*[a-f0-9]+:	8f e8 78 a0 ff 00[ 	]+vcvtph2ps \$0x0,%xmm7,%xmm7
-[ 	]*[a-f0-9]+:	8f e8 78 a0 3b 00[ 	]+vcvtph2ps \$0x0,\(%ebx\),%xmm7
-[ 	]*[a-f0-9]+:	8f e8 78 a0 e8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%xmm5
-[ 	]*[a-f0-9]+:	8f e8 78 a0 c5 ff[ 	]+vcvtph2ps \$0xff,%xmm5,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 c0 03[ 	]+vcvtph2ps \$0x3,%xmm0,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 c7 03[ 	]+vcvtph2ps \$0x3,%xmm7,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 ed 00[ 	]+vcvtph2ps \$0x0,%xmm5,%xmm5
-[ 	]*[a-f0-9]+:	8f e8 78 a0 f8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	8f e8 78 a0 00 03[ 	]+vcvtph2ps \$0x3,\(%eax\),%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 03 ff[ 	]+vcvtph2ps \$0xff,\(%ebx\),%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 38 00[ 	]+vcvtph2ps \$0x0,\(%eax\),%xmm7
-[ 	]*[a-f0-9]+:	8f e8 78 a0 ff ff[ 	]+vcvtph2ps \$0xff,%xmm7,%xmm7
-[ 	]*[a-f0-9]+:	8f e8 78 a0 ed ff[ 	]+vcvtph2ps \$0xff,%xmm5,%xmm5
-[ 	]*[a-f0-9]+:	8f e8 78 a0 2b ff[ 	]+vcvtph2ps \$0xff,\(%ebx\),%xmm5
-[ 	]*[a-f0-9]+:	8f e8 78 a0 c7 ff[ 	]+vcvtph2ps \$0xff,%xmm7,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 38 03[ 	]+vcvtph2ps \$0x3,\(%eax\),%xmm7
-[ 	]*[a-f0-9]+:	8f e8 7c a0 ff 00[ 	]+vcvtph2ps \$0x0,%xmm7,%ymm7
-[ 	]*[a-f0-9]+:	8f e8 7c a0 3b 00[ 	]+vcvtph2ps \$0x0,\(%ebx\),%ymm7
-[ 	]*[a-f0-9]+:	8f e8 7c a0 e8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%ymm5
-[ 	]*[a-f0-9]+:	8f e8 7c a0 c5 ff[ 	]+vcvtph2ps \$0xff,%xmm5,%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 c0 03[ 	]+vcvtph2ps \$0x3,%xmm0,%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 c7 03[ 	]+vcvtph2ps \$0x3,%xmm7,%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 ed 00[ 	]+vcvtph2ps \$0x0,%xmm5,%ymm5
-[ 	]*[a-f0-9]+:	8f e8 7c a0 f8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%ymm7
-[ 	]*[a-f0-9]+:	8f e8 7c a0 00 03[ 	]+vcvtph2ps \$0x3,\(%eax\),%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 03 ff[ 	]+vcvtph2ps \$0xff,\(%ebx\),%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 38 00[ 	]+vcvtph2ps \$0x0,\(%eax\),%ymm7
-[ 	]*[a-f0-9]+:	8f e8 7c a0 ff ff[ 	]+vcvtph2ps \$0xff,%xmm7,%ymm7
-[ 	]*[a-f0-9]+:	8f e8 7c a0 ed ff[ 	]+vcvtph2ps \$0xff,%xmm5,%ymm5
-[ 	]*[a-f0-9]+:	8f e8 7c a0 2b ff[ 	]+vcvtph2ps \$0xff,\(%ebx\),%ymm5
-[ 	]*[a-f0-9]+:	8f e8 7c a0 c7 ff[ 	]+vcvtph2ps \$0xff,%xmm7,%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 38 03[ 	]+vcvtph2ps \$0x3,\(%eax\),%ymm7
-[ 	]*[a-f0-9]+:	8f e8 78 a1 2b 00[ 	]+vcvtps2ph \$0x0,%xmm5,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 3e 00[ 	]+vcvtps2ph \$0x0,%xmm7,\(%esi\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 00 00[ 	]+vcvtps2ph \$0x0,%xmm0,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 ea ff[ 	]+vcvtps2ph \$0xff,%xmm5,%xmm2
-[ 	]*[a-f0-9]+:	8f e8 78 a1 c2 03[ 	]+vcvtps2ph \$0x3,%xmm0,%xmm2
-[ 	]*[a-f0-9]+:	8f e8 78 a1 ea 03[ 	]+vcvtps2ph \$0x3,%xmm5,%xmm2
-[ 	]*[a-f0-9]+:	8f e8 78 a1 c7 00[ 	]+vcvtps2ph \$0x0,%xmm0,%xmm7
-[ 	]*[a-f0-9]+:	8f e8 78 a1 06 00[ 	]+vcvtps2ph \$0x0,%xmm0,\(%esi\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 f8 ff[ 	]+vcvtps2ph \$0xff,%xmm7,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a1 3b 00[ 	]+vcvtps2ph \$0x0,%xmm7,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 2b ff[ 	]+vcvtps2ph \$0xff,%xmm5,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 00 ff[ 	]+vcvtps2ph \$0xff,%xmm0,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 38 ff[ 	]+vcvtps2ph \$0xff,%xmm7,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 3b 03[ 	]+vcvtps2ph \$0x3,%xmm7,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 28 03[ 	]+vcvtps2ph \$0x3,%xmm5,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 78 a1 ef ff[ 	]+vcvtps2ph \$0xff,%xmm5,%xmm7
-[ 	]*[a-f0-9]+:	8f e8 7c a1 2b 00[ 	]+vcvtps2ph \$0x0,%ymm5,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 3e 00[ 	]+vcvtps2ph \$0x0,%ymm7,\(%esi\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 00 00[ 	]+vcvtps2ph \$0x0,%ymm0,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 ea ff[ 	]+vcvtps2ph \$0xff,%ymm5,%xmm2
-[ 	]*[a-f0-9]+:	8f e8 7c a1 c2 03[ 	]+vcvtps2ph \$0x3,%ymm0,%xmm2
-[ 	]*[a-f0-9]+:	8f e8 7c a1 ea 03[ 	]+vcvtps2ph \$0x3,%ymm5,%xmm2
-[ 	]*[a-f0-9]+:	8f e8 7c a1 c7 00[ 	]+vcvtps2ph \$0x0,%ymm0,%xmm7
-[ 	]*[a-f0-9]+:	8f e8 7c a1 06 00[ 	]+vcvtps2ph \$0x0,%ymm0,\(%esi\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 f8 ff[ 	]+vcvtps2ph \$0xff,%ymm7,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 7c a1 3b 00[ 	]+vcvtps2ph \$0x0,%ymm7,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 2b ff[ 	]+vcvtps2ph \$0xff,%ymm5,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 00 ff[ 	]+vcvtps2ph \$0xff,%ymm0,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 38 ff[ 	]+vcvtps2ph \$0xff,%ymm7,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 3b 03[ 	]+vcvtps2ph \$0x3,%ymm7,\(%ebx\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 28 03[ 	]+vcvtps2ph \$0x3,%ymm5,\(%eax\)
-[ 	]*[a-f0-9]+:	8f e8 7c a1 ef ff[ 	]+vcvtps2ph \$0xff,%ymm5,%xmm7
-#pass
diff --git a/gas/testsuite/gas/i386/cvt16.s b/gas/testsuite/gas/i386/cvt16.s
deleted file mode 100644
index 9f01e68..0000000
--- a/gas/testsuite/gas/i386/cvt16.s
+++ /dev/null
@@ -1,74 +0,0 @@
-# Check CVT16 instructions (maxcombos=16, maxops=3, archbits=32, seed=1)
-
-	.allow_index_reg
-	.text
-_start:
-
-# Tests for op VCVTPH2PS imm8, xmm2/mem64, xmm1  (at&t syntax)
-    VCVTPH2PS      $0x0,%xmm7,%xmm7
-    VCVTPH2PS      $0x0,(%ebx),%xmm7
-    VCVTPH2PS      $0x0,%xmm0,%xmm5
-    VCVTPH2PS      $0xFF,%xmm5,%xmm0
-    VCVTPH2PS      $0x3,%xmm0,%xmm0
-    VCVTPH2PS      $0x3,%xmm7,%xmm0
-    VCVTPH2PS      $0x0,%xmm5,%xmm5
-    VCVTPH2PS      $0x0,%xmm0,%xmm7
-    VCVTPH2PS      $0x3,(%eax),%xmm0
-    VCVTPH2PS      $0xFF,(%ebx),%xmm0
-    VCVTPH2PS      $0x0,(%eax),%xmm7
-    VCVTPH2PS      $0xFF,%xmm7,%xmm7
-    VCVTPH2PS      $0xFF,%xmm5,%xmm5
-    VCVTPH2PS      $0xFF,(%ebx),%xmm5
-    VCVTPH2PS      $0xFF,%xmm7,%xmm0
-    VCVTPH2PS      $0x3,(%eax),%xmm7
-# Tests for op VCVTPH2PS imm8, xmm2/mem128, ymm1  (at&t syntax)
-    VCVTPH2PS      $0x0,%xmm7,%ymm7
-    VCVTPH2PS      $0x0,(%ebx),%ymm7
-    VCVTPH2PS      $0x0,%xmm0,%ymm5
-    VCVTPH2PS      $0xFF,%xmm5,%ymm0
-    VCVTPH2PS      $0x3,%xmm0,%ymm0
-    VCVTPH2PS      $0x3,%xmm7,%ymm0
-    VCVTPH2PS      $0x0,%xmm5,%ymm5
-    VCVTPH2PS      $0x0,%xmm0,%ymm7
-    VCVTPH2PS      $0x3,(%eax),%ymm0
-    VCVTPH2PS      $0xFF,(%ebx),%ymm0
-    VCVTPH2PS      $0x0,(%eax),%ymm7
-    VCVTPH2PS      $0xFF,%xmm7,%ymm7
-    VCVTPH2PS      $0xFF,%xmm5,%ymm5
-    VCVTPH2PS      $0xFF,(%ebx),%ymm5
-    VCVTPH2PS      $0xFF,%xmm7,%ymm0
-    VCVTPH2PS      $0x3,(%eax),%ymm7
-# Tests for op VCVTPS2PH imm8, xmm2, xmm1/mem64  (at&t syntax)
-    VCVTPS2PH      $0x0,%xmm5,(%ebx)
-    VCVTPS2PH      $0x0,%xmm7,(%esi)
-    VCVTPS2PH      $0x0,%xmm0,(%eax)
-    VCVTPS2PH      $0xFF,%xmm5,%xmm2
-    VCVTPS2PH      $0x3,%xmm0,%xmm2
-    VCVTPS2PH      $0x3,%xmm5,%xmm2
-    VCVTPS2PH      $0x0,%xmm0,%xmm7
-    VCVTPS2PH      $0x0,%xmm0,(%esi)
-    VCVTPS2PH      $0xFF,%xmm7,%xmm0
-    VCVTPS2PH      $0x0,%xmm7,(%ebx)
-    VCVTPS2PH      $0xFF,%xmm5,(%ebx)
-    VCVTPS2PH      $0xFF,%xmm0,(%eax)
-    VCVTPS2PH      $0xFF,%xmm7,(%eax)
-    VCVTPS2PH      $0x3,%xmm7,(%ebx)
-    VCVTPS2PH      $0x3,%xmm5,(%eax)
-    VCVTPS2PH      $0xFF,%xmm5,%xmm7
-# Tests for op VCVTPS2PH imm8, ymm2, xmm1/mem128  (at&t syntax)
-    VCVTPS2PH      $0x0,%ymm5,(%ebx)
-    VCVTPS2PH      $0x0,%ymm7,(%esi)
-    VCVTPS2PH      $0x0,%ymm0,(%eax)
-    VCVTPS2PH      $0xFF,%ymm5,%xmm2
-    VCVTPS2PH      $0x3,%ymm0,%xmm2
-    VCVTPS2PH      $0x3,%ymm5,%xmm2
-    VCVTPS2PH      $0x0,%ymm0,%xmm7
-    VCVTPS2PH      $0x0,%ymm0,(%esi)
-    VCVTPS2PH      $0xFF,%ymm7,%xmm0
-    VCVTPS2PH      $0x0,%ymm7,(%ebx)
-    VCVTPS2PH      $0xFF,%ymm5,(%ebx)
-    VCVTPS2PH      $0xFF,%ymm0,(%eax)
-    VCVTPS2PH      $0xFF,%ymm7,(%eax)
-    VCVTPS2PH      $0x3,%ymm7,(%ebx)
-    VCVTPS2PH      $0x3,%ymm5,(%eax)
-    VCVTPS2PH      $0xFF,%ymm5,%xmm7
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index d3b295b..0e6d10b 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -163,7 +163,6 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "fma4"
     run_dump_test "lwp"
     run_dump_test "xop"
-    run_dump_test "cvt16"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -339,7 +338,6 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-fma4"
     run_dump_test "x86-64-lwp"
     run_dump_test "x86-64-xop"
-    run_dump_test "x86-64-cvt16"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-cvt16.d b/gas/testsuite/gas/i386/x86-64-cvt16.d
deleted file mode 100644
index 6170dd6..0000000
--- a/gas/testsuite/gas/i386/x86-64-cvt16.d
+++ /dev/null
@@ -1,73 +0,0 @@
-#objdump: -dw
-#name: x86-64 CVT16
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <_start>:
-[ 	]*[a-f0-9]+:	8f 48 78 a0 ff 00[ 	]+vcvtph2ps \$0x0,%xmm15,%xmm15
-[ 	]*[a-f0-9]+:	8f 68 78 a0 3e 00[ 	]+vcvtph2ps \$0x0,\(%rsi\),%xmm15
-[ 	]*[a-f0-9]+:	8f 68 78 a0 d8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%xmm11
-[ 	]*[a-f0-9]+:	8f c8 78 a0 c7 ff[ 	]+vcvtph2ps \$0xff,%xmm15,%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 c0 03[ 	]+vcvtph2ps \$0x3,%xmm0,%xmm0
-[ 	]*[a-f0-9]+:	8f c8 78 a0 c7 03[ 	]+vcvtph2ps \$0x3,%xmm15,%xmm0
-[ 	]*[a-f0-9]+:	8f 48 78 a0 db 00[ 	]+vcvtph2ps \$0x0,%xmm11,%xmm11
-[ 	]*[a-f0-9]+:	8f 68 78 a0 f8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%xmm15
-[ 	]*[a-f0-9]+:	8f e8 78 a0 01 03[ 	]+vcvtph2ps \$0x3,\(%rcx\),%xmm0
-[ 	]*[a-f0-9]+:	8f e8 78 a0 06 ff[ 	]+vcvtph2ps \$0xff,\(%rsi\),%xmm0
-[ 	]*[a-f0-9]+:	8f 68 78 a0 3f 00[ 	]+vcvtph2ps \$0x0,\(%rdi\),%xmm15
-[ 	]*[a-f0-9]+:	8f 48 78 a0 ff ff[ 	]+vcvtph2ps \$0xff,%xmm15,%xmm15
-[ 	]*[a-f0-9]+:	8f 48 78 a0 db ff[ 	]+vcvtph2ps \$0xff,%xmm11,%xmm11
-[ 	]*[a-f0-9]+:	8f 68 78 a0 1e ff[ 	]+vcvtph2ps \$0xff,\(%rsi\),%xmm11
-[ 	]*[a-f0-9]+:	8f 68 78 a0 3f 03[ 	]+vcvtph2ps \$0x3,\(%rdi\),%xmm15
-[ 	]*[a-f0-9]+:	8f 48 78 a0 df 03[ 	]+vcvtph2ps \$0x3,%xmm15,%xmm11
-[ 	]*[a-f0-9]+:	8f 48 7c a0 ff 00[ 	]+vcvtph2ps \$0x0,%xmm15,%ymm15
-[ 	]*[a-f0-9]+:	8f 68 7c a0 3e 00[ 	]+vcvtph2ps \$0x0,\(%rsi\),%ymm15
-[ 	]*[a-f0-9]+:	8f 68 7c a0 d8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%ymm11
-[ 	]*[a-f0-9]+:	8f c8 7c a0 c7 ff[ 	]+vcvtph2ps \$0xff,%xmm15,%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 c0 03[ 	]+vcvtph2ps \$0x3,%xmm0,%ymm0
-[ 	]*[a-f0-9]+:	8f c8 7c a0 c7 03[ 	]+vcvtph2ps \$0x3,%xmm15,%ymm0
-[ 	]*[a-f0-9]+:	8f 48 7c a0 db 00[ 	]+vcvtph2ps \$0x0,%xmm11,%ymm11
-[ 	]*[a-f0-9]+:	8f 68 7c a0 f8 00[ 	]+vcvtph2ps \$0x0,%xmm0,%ymm15
-[ 	]*[a-f0-9]+:	8f e8 7c a0 01 03[ 	]+vcvtph2ps \$0x3,\(%rcx\),%ymm0
-[ 	]*[a-f0-9]+:	8f e8 7c a0 06 ff[ 	]+vcvtph2ps \$0xff,\(%rsi\),%ymm0
-[ 	]*[a-f0-9]+:	8f 68 7c a0 3f 00[ 	]+vcvtph2ps \$0x0,\(%rdi\),%ymm15
-[ 	]*[a-f0-9]+:	8f 48 7c a0 ff ff[ 	]+vcvtph2ps \$0xff,%xmm15,%ymm15
-[ 	]*[a-f0-9]+:	8f 48 7c a0 db ff[ 	]+vcvtph2ps \$0xff,%xmm11,%ymm11
-[ 	]*[a-f0-9]+:	8f 68 7c a0 1e ff[ 	]+vcvtph2ps \$0xff,\(%rsi\),%ymm11
-[ 	]*[a-f0-9]+:	8f 68 7c a0 3f 03[ 	]+vcvtph2ps \$0x3,\(%rdi\),%ymm15
-[ 	]*[a-f0-9]+:	8f 48 7c a0 df 03[ 	]+vcvtph2ps \$0x3,%xmm15,%ymm11
-[ 	]*[a-f0-9]+:	8f 68 78 a1 18 00[ 	]+vcvtps2ph \$0x0,%xmm11,\(%rax\)
-[ 	]*[a-f0-9]+:	8f 68 78 a1 3f 00[ 	]+vcvtps2ph \$0x0,%xmm15,\(%rdi\)
-[ 	]*[a-f0-9]+:	8f c8 78 a1 04 24 00[ 	]+vcvtps2ph \$0x0,%xmm0,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 48 78 a1 df ff[ 	]+vcvtps2ph \$0xff,%xmm11,%xmm15
-[ 	]*[a-f0-9]+:	8f c8 78 a1 c7 03[ 	]+vcvtps2ph \$0x3,%xmm0,%xmm15
-[ 	]*[a-f0-9]+:	8f 48 78 a1 df 03[ 	]+vcvtps2ph \$0x3,%xmm11,%xmm15
-[ 	]*[a-f0-9]+:	8f e8 78 a1 c4 00[ 	]+vcvtps2ph \$0x0,%xmm0,%xmm4
-[ 	]*[a-f0-9]+:	8f e8 78 a1 07 00[ 	]+vcvtps2ph \$0x0,%xmm0,\(%rdi\)
-[ 	]*[a-f0-9]+:	8f 68 78 a1 f8 ff[ 	]+vcvtps2ph \$0xff,%xmm15,%xmm0
-[ 	]*[a-f0-9]+:	8f 68 78 a1 38 00[ 	]+vcvtps2ph \$0x0,%xmm15,\(%rax\)
-[ 	]*[a-f0-9]+:	8f 68 78 a1 18 ff[ 	]+vcvtps2ph \$0xff,%xmm11,\(%rax\)
-[ 	]*[a-f0-9]+:	8f c8 78 a1 04 24 ff[ 	]+vcvtps2ph \$0xff,%xmm0,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 48 78 a1 3c 24 ff[ 	]+vcvtps2ph \$0xff,%xmm15,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 68 78 a1 38 03[ 	]+vcvtps2ph \$0x3,%xmm15,\(%rax\)
-[ 	]*[a-f0-9]+:	8f 48 78 a1 1c 24 03[ 	]+vcvtps2ph \$0x3,%xmm11,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 68 78 a1 dc ff[ 	]+vcvtps2ph \$0xff,%xmm11,%xmm4
-[ 	]*[a-f0-9]+:	8f 68 7c a1 18 00[ 	]+vcvtps2ph \$0x0,%ymm11,\(%rax\)
-[ 	]*[a-f0-9]+:	8f 68 7c a1 3f 00[ 	]+vcvtps2ph \$0x0,%ymm15,\(%rdi\)
-[ 	]*[a-f0-9]+:	8f c8 7c a1 04 24 00[ 	]+vcvtps2ph \$0x0,%ymm0,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 48 7c a1 df ff[ 	]+vcvtps2ph \$0xff,%ymm11,%xmm15
-[ 	]*[a-f0-9]+:	8f c8 7c a1 c7 03[ 	]+vcvtps2ph \$0x3,%ymm0,%xmm15
-[ 	]*[a-f0-9]+:	8f 48 7c a1 df 03[ 	]+vcvtps2ph \$0x3,%ymm11,%xmm15
-[ 	]*[a-f0-9]+:	8f e8 7c a1 c4 00[ 	]+vcvtps2ph \$0x0,%ymm0,%xmm4
-[ 	]*[a-f0-9]+:	8f e8 7c a1 07 00[ 	]+vcvtps2ph \$0x0,%ymm0,\(%rdi\)
-[ 	]*[a-f0-9]+:	8f 68 7c a1 f8 ff[ 	]+vcvtps2ph \$0xff,%ymm15,%xmm0
-[ 	]*[a-f0-9]+:	8f 68 7c a1 38 00[ 	]+vcvtps2ph \$0x0,%ymm15,\(%rax\)
-[ 	]*[a-f0-9]+:	8f 68 7c a1 18 ff[ 	]+vcvtps2ph \$0xff,%ymm11,\(%rax\)
-[ 	]*[a-f0-9]+:	8f c8 7c a1 04 24 ff[ 	]+vcvtps2ph \$0xff,%ymm0,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 48 7c a1 3c 24 ff[ 	]+vcvtps2ph \$0xff,%ymm15,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 68 7c a1 38 03[ 	]+vcvtps2ph \$0x3,%ymm15,\(%rax\)
-[ 	]*[a-f0-9]+:	8f 48 7c a1 1c 24 03[ 	]+vcvtps2ph \$0x3,%ymm11,\(%r12\)
-[ 	]*[a-f0-9]+:	8f 68 7c a1 dc ff[ 	]+vcvtps2ph \$0xff,%ymm11,%xmm4
-#pass
diff --git a/gas/testsuite/gas/i386/x86-64-cvt16.s b/gas/testsuite/gas/i386/x86-64-cvt16.s
deleted file mode 100644
index 0c317e8..0000000
--- a/gas/testsuite/gas/i386/x86-64-cvt16.s
+++ /dev/null
@@ -1,74 +0,0 @@
-# Check CVT16 instructions (maxcombos=16, maxops=3, archbits=64, seed=1)
-
-	.allow_index_reg
-	.text
-_start:
-
-# Tests for op VCVTPH2PS imm8, xmm2/mem64, xmm1  (at&t syntax)
-    VCVTPH2PS      $0x0,%xmm15,%xmm15
-    VCVTPH2PS      $0x0,(%rsi),%xmm15
-    VCVTPH2PS      $0x0,%xmm0,%xmm11
-    VCVTPH2PS      $0xFF,%xmm15,%xmm0
-    VCVTPH2PS      $0x3,%xmm0,%xmm0
-    VCVTPH2PS      $0x3,%xmm15,%xmm0
-    VCVTPH2PS      $0x0,%xmm11,%xmm11
-    VCVTPH2PS      $0x0,%xmm0,%xmm15
-    VCVTPH2PS      $0x3,(%rcx),%xmm0
-    VCVTPH2PS      $0xFF,(%rsi),%xmm0
-    VCVTPH2PS      $0x0,(%rdi),%xmm15
-    VCVTPH2PS      $0xFF,%xmm15,%xmm15
-    VCVTPH2PS      $0xFF,%xmm11,%xmm11
-    VCVTPH2PS      $0xFF,(%rsi),%xmm11
-    VCVTPH2PS      $0x3,(%rdi),%xmm15
-    VCVTPH2PS      $0x3,%xmm15,%xmm11
-# Tests for op VCVTPH2PS imm8, xmm2/mem128, ymm1  (at&t syntax)
-    VCVTPH2PS      $0x0,%xmm15,%ymm15
-    VCVTPH2PS      $0x0,(%rsi),%ymm15
-    VCVTPH2PS      $0x0,%xmm0,%ymm11
-    VCVTPH2PS      $0xFF,%xmm15,%ymm0
-    VCVTPH2PS      $0x3,%xmm0,%ymm0
-    VCVTPH2PS      $0x3,%xmm15,%ymm0
-    VCVTPH2PS      $0x0,%xmm11,%ymm11
-    VCVTPH2PS      $0x0,%xmm0,%ymm15
-    VCVTPH2PS      $0x3,(%rcx),%ymm0
-    VCVTPH2PS      $0xFF,(%rsi),%ymm0
-    VCVTPH2PS      $0x0,(%rdi),%ymm15
-    VCVTPH2PS      $0xFF,%xmm15,%ymm15
-    VCVTPH2PS      $0xFF,%xmm11,%ymm11
-    VCVTPH2PS      $0xFF,(%rsi),%ymm11
-    VCVTPH2PS      $0x3,(%rdi),%ymm15
-    VCVTPH2PS      $0x3,%xmm15,%ymm11
-# Tests for op VCVTPS2PH imm8, xmm2, xmm1/mem64  (at&t syntax)
-    VCVTPS2PH      $0x0,%xmm11,(%rax)
-    VCVTPS2PH      $0x0,%xmm15,(%rdi)
-    VCVTPS2PH      $0x0,%xmm0,(%r12)
-    VCVTPS2PH      $0xFF,%xmm11,%xmm15
-    VCVTPS2PH      $0x3,%xmm0,%xmm15
-    VCVTPS2PH      $0x3,%xmm11,%xmm15
-    VCVTPS2PH      $0x0,%xmm0,%xmm4
-    VCVTPS2PH      $0x0,%xmm0,(%rdi)
-    VCVTPS2PH      $0xFF,%xmm15,%xmm0
-    VCVTPS2PH      $0x0,%xmm15,(%rax)
-    VCVTPS2PH      $0xFF,%xmm11,(%rax)
-    VCVTPS2PH      $0xFF,%xmm0,(%r12)
-    VCVTPS2PH      $0xFF,%xmm15,(%r12)
-    VCVTPS2PH      $0x3,%xmm15,(%rax)
-    VCVTPS2PH      $0x3,%xmm11,(%r12)
-    VCVTPS2PH      $0xFF,%xmm11,%xmm4
-# Tests for op VCVTPS2PH imm8, ymm2, xmm1/mem128  (at&t syntax)
-    VCVTPS2PH      $0x0,%ymm11,(%rax)
-    VCVTPS2PH      $0x0,%ymm15,(%rdi)
-    VCVTPS2PH      $0x0,%ymm0,(%r12)
-    VCVTPS2PH      $0xFF,%ymm11,%xmm15
-    VCVTPS2PH      $0x3,%ymm0,%xmm15
-    VCVTPS2PH      $0x3,%ymm11,%xmm15
-    VCVTPS2PH      $0x0,%ymm0,%xmm4
-    VCVTPS2PH      $0x0,%ymm0,(%rdi)
-    VCVTPS2PH      $0xFF,%ymm15,%xmm0
-    VCVTPS2PH      $0x0,%ymm15,(%rax)
-    VCVTPS2PH      $0xFF,%ymm11,(%rax)
-    VCVTPS2PH      $0xFF,%ymm0,(%r12)
-    VCVTPS2PH      $0xFF,%ymm15,(%r12)
-    VCVTPS2PH      $0x3,%ymm15,(%rax)
-    VCVTPS2PH      $0x3,%ymm11,(%r12)
-    VCVTPS2PH      $0xFF,%ymm11,%xmm4