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author | Jason Eckhardt <jle@rice.edu> | 2003-08-17 03:16:23 +0000 |
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committer | Jason Eckhardt <jle@rice.edu> | 2003-08-17 03:16:23 +0000 |
commit | be6389fdef2f1df307fc760d344796c815103075 (patch) | |
tree | fc9c3efe81ade8df72f7b3dc5c472a2a531a1c38 /gas | |
parent | 7996bcec1c47e96ed965f4c8fb60390dc6601f89 (diff) | |
download | gdb-be6389fdef2f1df307fc760d344796c815103075.zip gdb-be6389fdef2f1df307fc760d344796c815103075.tar.gz gdb-be6389fdef2f1df307fc760d344796c815103075.tar.bz2 |
include/opcode/ChangeLog:
2003-08-16 Jason Eckhardt <jle@rice.edu>
* i860.h (fmov.ds): Expand as famov.ds.
(fmov.sd): Expand as famov.sd.
(pfmov.ds): Expand as pfamov.ds.
gas/testsuite/ChangeLog:
2003-08-16 Jason Eckhardt <jle@rice.edu>
* gas/i860/pseudo-ops01.{s,d}: New files.
* gas/i860/i860.exp: Execute the new test above.
* gas/i860/README.i860: Mention that pseudo-ops need more testing
and remove the align fill defect from the list.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/i860/README.i860 | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/i860/i860.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i860/pseudo-ops01.d | 14 | ||||
-rw-r--r-- | gas/testsuite/gas/i860/pseudo-ops01.s | 10 |
5 files changed, 32 insertions, 3 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 01fd171..160a222 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2003-08-16 Jason Eckhardt <jle@rice.edu> + + * gas/i860/pseudo-ops01.{s,d}: New files. + * gas/i860/i860.exp: Execute the new test above. + * gas/i860/README.i860: Remove align defect from list. + 2003-08-14 Nick Clifton <nickc@redhat.com> * gas/arm/pic.d: Update regexp for destination address of diff --git a/gas/testsuite/gas/i860/README.i860 b/gas/testsuite/gas/i860/README.i860 index ae5c890..cab0076 100644 --- a/gas/testsuite/gas/i860/README.i860 +++ b/gas/testsuite/gas/i860/README.i860 @@ -19,15 +19,13 @@ way GAS/i860 is tested against a known good assembler. TODO: - Relocation testing is basically non-existent. - pst.d (pixel store) is the only instruction with no testcase. + - Some pseudo instructions need testcases (mov, all pfmov, etc.). - More tests for dual instruction mode: check that dual mode has a proper pair (FLOP/core) of instructions, and other error conditions. - Most current testcases use the default AT&T/SVR4 syntax; a few simple tests of the Intel syntax should be added to prevent bitrot (including relocatable expression syntax, etc). Test file dual03.s uses Intel syntax lightly (i.e., register names without '%' prefix). - - Currently, .align in a .text section fills with 0x00000000. This is - a defect and it needs to fill with nop (0xa0000000). Write a testcase - for it. Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help. diff --git a/gas/testsuite/gas/i860/i860.exp b/gas/testsuite/gas/i860/i860.exp index 3a1ceed..041d859 100644 --- a/gas/testsuite/gas/i860/i860.exp +++ b/gas/testsuite/gas/i860/i860.exp @@ -48,6 +48,7 @@ if [istarget i860-*-*] { run_dump_test "pfmam" run_dump_test "pfmsm" run_dump_test "pfsm" + run_dump_test "pseudo-ops01" run_dump_test "regress01" run_dump_test "shift" run_dump_test "simd" diff --git a/gas/testsuite/gas/i860/pseudo-ops01.d b/gas/testsuite/gas/i860/pseudo-ops01.d new file mode 100644 index 0000000..3131e2e --- /dev/null +++ b/gas/testsuite/gas/i860/pseudo-ops01.d @@ -0,0 +1,14 @@ +#as: +#objdump: -d +#name: i860 pseudo-ops01 + +.*: +file format .* + +Disassembly of section \.text: + +00000000 <\.text>: + 0: 49 28 06 48 fiadd\.ss %f5,%f0,%f6 + 4: c9 41 0a 48 fiadd\.dd %f8,%f0,%f10 + 8: b3 18 14 48 famov\.sd %f3,%f20 + c: 33 c1 09 48 famov\.ds %f24,%f9 + 10: 33 e5 03 48 pfamov\.ds %f28,%f3 diff --git a/gas/testsuite/gas/i860/pseudo-ops01.s b/gas/testsuite/gas/i860/pseudo-ops01.s new file mode 100644 index 0000000..4b88925 --- /dev/null +++ b/gas/testsuite/gas/i860/pseudo-ops01.s @@ -0,0 +1,10 @@ +# Test some assembler pseudo-operations: +# Floating point moves. + + .text + fmov.ss %f5,%f6 + fmov.dd %f8,%f10 + fmov.sd %f3,%f20 + fmov.ds %f24,%f9 + pfmov.ds %f28,%f3 + |