bfd:

2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* aoutx.h (NAME (aout, machine_type)): Handle bfd_mach_mips_xlr.
	* archures.c (bfd_mach_mips_xlr): Define.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_xlr): Define.
	(arch_info_struct): Add XLR entry.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_XLR.
	(mips_set_isa_flags): Handle bfd_mach_mips_xlr
	(mips_mach_extensions): Add XLR entry.

binutils:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_MACH_XLR.

gas:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
	M_MSGWAIT and M_MSGWAIT_T.
	(mips_cpu_info_table): Add XLR entry.
	* doc/c-mips.texi (-march): Document xlr.

gas/testsuite:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* gas/mips/mips.exp (xlr): New architecture.
	(xlr-ext): Run test.
	* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.

include/elf:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* mips.h (E_MIPS_MACH_XLR): Define.

include/opcode:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* mips.h (INSN_XLR): Define.
	(INSN_CHIP_MASK): Update.
	(CPU_XLR): Define.
	(OPCODE_IS_MEMBER): Update.
	(M_MSGSND, M_MSGLD, M_MSGLD_T, M_MSGWAIT, M_MSGWAIT_T): Define.

opcodes:
2009-02-03  Sandip Matte  <sandip@rmicorp.com>

	* mips-dis.c (mips_cp0_names_xlr, mips_cp0sel_names_xlr): Define.
	(mips_arch_choices): Add XLR entry.
	* mips-opc.c (XLR): Define.
	(mips_builtin_opcodes): Add XLR instructions.

7 files changed, 105 insertions, 1 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f8f14bb..2cf0914 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2009-02-03  Sandip Matte  <sandip@rmicorp.com>
+
+	* config/tc-mips.c (macro): Handle M_MSGSND, M_MSGLD, M_MSGLD_T,
+	M_MSGWAIT and M_MSGWAIT_T.
+	(mips_cpu_info_table): Add XLR entry.
+	* doc/c-mips.texi (-march): Document xlr.
+
 2009-01-29  Eric B. Weddington  <eric.weddington@atmel.com>
 
 	* config/tc-avr.c (mcu_types): Add ata6289.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 1d4193c..c139ea1 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -6042,6 +6042,43 @@ macro (struct mips_cl_insn *ip)
 	macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, tempreg, breg);
       break;
 
+    case M_MSGSND:
+      {
+	unsigned long temp = (treg << 16) | (0x01);
+	macro_build (NULL, "c2", "C", temp);
+      }
+      /* AT is not used, just return */
+      return;
+
+    case M_MSGLD:
+      {
+	unsigned long temp = (0x02);
+	macro_build (NULL, "c2", "C", temp);
+      }
+      /* AT is not used, just return */
+      return;
+
+    case M_MSGLD_T:
+      {
+	unsigned long temp = (treg << 16) | (0x02);
+	macro_build (NULL, "c2", "C", temp);
+      }
+      /* AT is not used, just return */
+      return;
+
+    case M_MSGWAIT:
+      macro_build (NULL, "c2", "C", 3);
+      /* AT is not used, just return */
+      return;
+
+    case M_MSGWAIT_T:
+      {
+	unsigned long temp = (treg << 16) | 0x03;
+	macro_build (NULL, "c2", "C", temp);
+      }
+      /* AT is not used, just return */
+      return;
+
     case M_J_A:
       /* The j instruction may not be used in PIC code, since it
 	 requires an absolute address.  We convert it to a b
@@ -15196,6 +15233,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   /* Cavium Networks Octeon CPU core */
   { "octeon",	      0,      ISA_MIPS64R2,   CPU_OCTEON },
 
+  /* RMI Xlr */
+  { "xlr",	      0,      ISA_MIPS64,     CPU_XLR },
+
   /* End marker */
   { NULL, 0, 0, 0 }
 };
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 2acdbf3..91bd822 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -276,7 +276,8 @@ sb1,
 sb1a,
 loongson2e,
 loongson2f,
-octeon
+octeon,
+xlr
 @end quotation
 
 For compatibility reasons, @samp{@var{n}x} and @samp{@var{b}fx} are
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d24486b..a324383 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2009-02-03  Sandip Matte  <sandip@rmicorp.com>
+
+	* gas/mips/mips.exp (xlr): New architecture.
+	(xlr-ext): Run test.
+	* gas/mips/xlr-ext.d, gas/mips/xlr-ext.s: New.
+
 2009-02-03  Maxim Kuvyrkov  <maxim@codesourcery.com>
 
 	* gas/m68k/tls-gd-3.d, gas/m68k/tls-gd-3.s: New test.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 913b44d..b213aba 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -364,6 +364,8 @@ mips_arch_create sb1 	64	mips64	{ mips3d } \
 mips_arch_create octeon 64	mips64r2 {} \
 			{ -march=octeon -mtune=octeon } { -mmips:octeon } \
 			{ mips64octeon*-*-* }
+mips_arch_create xlr 	64	mips64	{} \
+			{ -march=xlr -mtune=xlr } { -mmips:xlr }
 
 #
 # And now begin the actual tests!  VxWorks uses RELA rather than REL
@@ -582,6 +584,7 @@ if { [istarget mips*-*-vxworks*] } {
 	run_dump_test "mips64-mdmx"
 	run_dump_test "sb1-ext-mdmx"
 	run_dump_test "sb1-ext-ps"
+	run_dump_test "xlr-ext"
     }
 
     run_dump_test "relax"
diff --git a/gas/testsuite/gas/mips/xlr-ext.d b/gas/testsuite/gas/mips/xlr-ext.d
new file mode 100644
index 0000000..72046f0
--- /dev/null
+++ b/gas/testsuite/gas/mips/xlr-ext.d
@@ -0,0 +1,20 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -mmips:xlr
+#name: XLRs native MIPS64 extensions
+#as: -march=xlr
+
+.*: +file format .*mips.*
+
+Disassembly of section .text:
+0+0000 <[^>]*> 3c000000 	lui	zero,0x0
+0+0004 <[^>]*> 8c010001 	lw	at,1\(zero\)
+0+0008 <[^>]*> 8c020002 	lw	v0,2\(zero\)
+0+000c <[^>]*> 70221838 	daddwc	v1,at,v0
+0+0010 <[^>]*> 70230010 	ldaddw	v1,at
+0+0014 <[^>]*> 70230011 	ldaddwu	v1,at
+0+0018 <[^>]*> 70230012 	ldaddd	v1,at
+0+001c <[^>]*> 70230014 	swapw	v1,at
+0+0020 <[^>]*> 70230015 	swapwu	v1,at
+0+0024 <[^>]*> 4a000003 	c2	0x3
+0+0028 <[^>]*> 4a000002 	c2	0x2
+0+002c <[^>]*> 4a000001 	c2	0x1
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/xlr-ext.s b/gas/testsuite/gas/mips/xlr-ext.s
new file mode 100644
index 0000000..b92708a
--- /dev/null
+++ b/gas/testsuite/gas/mips/xlr-ext.s
@@ -0,0 +1,27 @@
+# Source file used to test XLR's assembler instructions
+
+	.set 	noreorder
+	.set 	noat
+
+	.globl	text_label	.text
+text_label:	
+
+	lui     $0, 0x00
+	lw 	    $1, 0x01
+	lw 	    $2, 0x02
+	
+	daddwc	$3, $1, $2
+	
+	ldaddw	$3, $1
+	ldaddwu	$3, $1
+	ldaddd	$3, $1
+
+	swapw	$3, $1
+	swapwu	$3, $1
+	
+	msgwait
+	msgld	$0
+	msgsnd	$0
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space  8