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author | Gavin Romig-Koch <gavin@redhat.com> | 1998-12-29 15:46:59 +0000 |
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committer | Gavin Romig-Koch <gavin@redhat.com> | 1998-12-29 15:46:59 +0000 |
commit | 2e23624e62d1b5a1967deee01b59755fd396762d (patch) | |
tree | 2f17a018fe7f8d489b3b433cb363ce384c32d4f8 /gas | |
parent | ffa3e1860a0cd165d16d4e7adf60ecf5d50d4508 (diff) | |
download | gdb-2e23624e62d1b5a1967deee01b59755fd396762d.zip gdb-2e23624e62d1b5a1967deee01b59755fd396762d.tar.gz gdb-2e23624e62d1b5a1967deee01b59755fd396762d.tar.bz2 |
* config/tc-mips.c (append_insn): For mips16, insert a nop between
a read of HI or LO and an immediatly following branch.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-mips.c | 20 |
2 files changed, 25 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 8b74eb2..c3b7408 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 1998-12-29 Gavin Romig-Koch <gavin@cygnus.com> + * config/tc-mips.c (append_insn): For mips16, insert a nop between + a read of HI or LO and an immediatly following branch. + +1998-12-29 Gavin Romig-Koch <gavin@cygnus.com> + * config/tc-mips.c (md_begin): Another correction to the setting of mips_eabi64. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index a2e1afe..26b12e3 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -1689,6 +1689,16 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) && (mips_optimize == 0 || (pinfo & INSN_WRITE_LO))) nops += 2; + /* Most mips16 branch insns don't have a delay slot. + If a read from LO is immediately followed by a branch + to a write to LO we have a read followed by a write + less than 2 insns away. We assume the target of + a branch might be a write to LO, and insert a nop + between a read and an immediately following branch. */ + else if (mips_opts.mips16 + && (mips_optimize == 0 + || (pinfo & MIPS16_INSN_BRANCH))) + nops += 1; } else if (prev_insn.insn_mo->pinfo & INSN_READ_HI) { @@ -1701,6 +1711,16 @@ append_insn (place, ip, address_expr, reloc_type, unmatched_hi) && (mips_optimize == 0 || (pinfo & INSN_WRITE_HI))) nops += 2; + /* Most mips16 branch insns don't have a delay slot. + If a read from HI is immediately followed by a branch + to a write to HI we have a read followed by a write + less than 2 insns away. We assume the target of + a branch might be a write to HI, and insert a nop + between a read and an immediately following branch. */ + else if (mips_opts.mips16 + && (mips_optimize == 0 + || (pinfo & MIPS16_INSN_BRANCH))) + nops += 1; } /* If the previous instruction was in a noreorder section, then |