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authorH.J. Lu <hjl.tools@gmail.com>2007-08-30 15:13:46 +0000
committerH.J. Lu <hjl.tools@gmail.com>2007-08-30 15:13:46 +0000
commitbbedc8321e2c5f170b37295b9a00c2ff3b8312f8 (patch)
tree7a7a954902892c304cb0a6f3efe074ddca35b021 /gas
parent09c11c861badb766bb5140bac0e7dba017730f8a (diff)
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gas/testsuite/
2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/amd.s: Add rdtscp. * gas/i386/amd.d: Updated. * gas/i386/mem-intel.d: Update invlpg for BYTE PTR. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-opcode.s: Add swapgs. * gas/i386/x86-64-opcode.d: Updated. opcodes/ 2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (INVLPG_Fixup): Removed. (OPC_EXT_38): New. (OPC_EXT_RM_5): Likewise. (grps): Use OPC_EXT_38. (opc_ext_table): Add OPC_EXT_38. (opc_ext_rm_table): Add OPC_EXT_RM_5.
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/ChangeLog11
-rw-r--r--gas/testsuite/gas/i386/amd.d68
-rw-r--r--gas/testsuite/gas/i386/amd.s2
-rw-r--r--gas/testsuite/gas/i386/mem-intel.d4
-rw-r--r--gas/testsuite/gas/i386/x86-64-mem-intel.d4
-rw-r--r--gas/testsuite/gas/i386/x86-64-opcode.d1
-rw-r--r--gas/testsuite/gas/i386/x86-64-opcode.s2
7 files changed, 55 insertions, 37 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 39c07f0..cbacb82 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2007-08-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/amd.s: Add rdtscp.
+ * gas/i386/amd.d: Updated.
+
+ * gas/i386/mem-intel.d: Update invlpg for BYTE PTR.
+ * gas/i386/x86-64-mem-intel.d: Likewise.
+
+ * gas/i386/x86-64-opcode.s: Add swapgs.
+ * gas/i386/x86-64-opcode.d: Updated.
+
2007-08-29 Daniel Jacobowitz <dan@codesourcery.com>
* gas/lns/lns-duplicate.d, gas/lns/lns-duplicate.s: New.
diff --git a/gas/testsuite/gas/i386/amd.d b/gas/testsuite/gas/i386/amd.d
index 8009260..d645cc2 100644
--- a/gas/testsuite/gas/i386/amd.d
+++ b/gas/testsuite/gas/i386/amd.d
@@ -5,36 +5,38 @@
Disassembly of section .text:
-0+000 <foo>:
- 0: 0f 0d 03 [ ]*prefetch \(%ebx\)
- 3: 0f 0d 0c 75 00 10 00 00 [ ]*prefetchw 0x1000\(,%esi,2\)
- b: 0f 0e [ ]*femms
- d: 0f 0f 00 bf [ ]*pavgusb \(%eax\),%mm0
- 11: 0f 0f 48 02 1d [ ]*pf2id 0x2\(%eax\),%mm1
- 16: 0f 0f 90 00 01 00 00 ae [ ]*pfacc 0x100\(%eax\),%mm2
- 1e: 0f 0f 1e 9e [ ]*pfadd \(%esi\),%mm3
- 22: 0f 0f 66 02 b0 [ ]*pfcmpeq 0x2\(%esi\),%mm4
- 27: 0f 0f ae 90 90 00 00 90 [ ]*pfcmpge 0x9090\(%esi\),%mm5
- 2f: 0f 0f 74 75 00 a0 [ ]*pfcmpgt 0x0\(%ebp,%esi,2\),%mm6
- 35: 0f 0f 7c 75 02 a4 [ ]*pfmax 0x2\(%ebp,%esi,2\),%mm7
- 3b: 0f 0f 84 75 90 90 90 90 94 [ ]*pfmin -0x6f6f6f70\(%ebp,%esi,2\),%mm0
- 44: 0f 0f 0d 04 00 00 00 b4 [ ]*pfmul 0x4,%mm1
- 4c: 2e 0f 0f 54 c3 07 96 [ ]*pfrcp %cs:0x7\(%ebx,%eax,8\),%mm2
- 53: 0f 0f d8 a6 [ ]*pfrcpit1 %mm0,%mm3
- 57: 0f 0f e1 b6 [ ]*pfrcpit2 %mm1,%mm4
- 5b: 0f 0f ea a7 [ ]*pfrsqit1 %mm2,%mm5
- 5f: 0f 0f f3 97 [ ]*pfrsqrt %mm3,%mm6
- 63: 0f 0f fc 9a [ ]*pfsub %mm4,%mm7
- 67: 0f 0f c5 aa [ ]*pfsubr %mm5,%mm0
- 6b: 0f 0f ce 0d [ ]*pi2fd %mm6,%mm1
- 6f: 0f 0f d7 b7 [ ]*pmulhrw %mm7,%mm2
- 73: 2e 0f [ ]*\(bad\)
- 75: 0f 54 c3 [ ]*andps %xmm3,%xmm0
- 78: 07 [ ]*pop %es
- 79: c3 [ ]*ret
- 7a: 90 [ ]*nop
- 7b: 90 [ ]*nop
- 7c: 90 [ ]*nop
- 7d: 90 [ ]*nop
- 7e: 90 [ ]*nop
- 7f: 90 [ ]*nop
+0+ <foo>:
+[ ]*[a-f0-9]+: 0f 0d 03 prefetch \(%ebx\)
+[ ]*[a-f0-9]+: 0f 0d 0c 75 00 10 00 00 prefetchw 0x1000\(,%esi,2\)
+[ ]*[a-f0-9]+: 0f 0e femms
+[ ]*[a-f0-9]+: 0f 0f 00 bf pavgusb \(%eax\),%mm0
+[ ]*[a-f0-9]+: 0f 0f 48 02 1d pf2id 0x2\(%eax\),%mm1
+[ ]*[a-f0-9]+: 0f 0f 90 00 01 00 00 ae pfacc 0x100\(%eax\),%mm2
+[ ]*[a-f0-9]+: 0f 0f 1e 9e pfadd \(%esi\),%mm3
+[ ]*[a-f0-9]+: 0f 0f 66 02 b0 pfcmpeq 0x2\(%esi\),%mm4
+[ ]*[a-f0-9]+: 0f 0f ae 90 90 00 00 90 pfcmpge 0x9090\(%esi\),%mm5
+[ ]*[a-f0-9]+: 0f 0f 74 75 00 a0 pfcmpgt 0x0\(%ebp,%esi,2\),%mm6
+[ ]*[a-f0-9]+: 0f 0f 7c 75 02 a4 pfmax 0x2\(%ebp,%esi,2\),%mm7
+[ ]*[a-f0-9]+: 0f 0f 84 75 90 90 90 90 94 pfmin -0x6f6f6f70\(%ebp,%esi,2\),%mm0
+[ ]*[a-f0-9]+: 0f 0f 0d 04 00 00 00 b4 pfmul 0x4,%mm1
+[ ]*[a-f0-9]+: 2e 0f 0f 54 c3 07 96 pfrcp %cs:0x7\(%ebx,%eax,8\),%mm2
+[ ]*[a-f0-9]+: 0f 0f d8 a6 pfrcpit1 %mm0,%mm3
+[ ]*[a-f0-9]+: 0f 0f e1 b6 pfrcpit2 %mm1,%mm4
+[ ]*[a-f0-9]+: 0f 0f ea a7 pfrsqit1 %mm2,%mm5
+[ ]*[a-f0-9]+: 0f 0f f3 97 pfrsqrt %mm3,%mm6
+[ ]*[a-f0-9]+: 0f 0f fc 9a pfsub %mm4,%mm7
+[ ]*[a-f0-9]+: 0f 0f c5 aa pfsubr %mm5,%mm0
+[ ]*[a-f0-9]+: 0f 0f ce 0d pi2fd %mm6,%mm1
+[ ]*[a-f0-9]+: 0f 0f d7 b7 pmulhrw %mm7,%mm2
+[ ]*[a-f0-9]+: 0f 01 f9 rdtscp
+[ ]*[a-f0-9]+: 2e 0f \(bad\)
+[ ]*[a-f0-9]+: 0f 54 c3 andps %xmm3,%xmm0
+[ ]*[a-f0-9]+: 07 pop %es
+[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+#pass
diff --git a/gas/testsuite/gas/i386/amd.s b/gas/testsuite/gas/i386/amd.s
index b409c61..a6264b4 100644
--- a/gas/testsuite/gas/i386/amd.s
+++ b/gas/testsuite/gas/i386/amd.s
@@ -25,6 +25,8 @@ foo:
pi2fd %mm6,%mm1
pmulhrw %mm7,%mm2
+ rdtscp
+
# This is a 3DNow! instruction, with a prefix, that isn't quite right
# Everything's good bar the opcode suffix
.byte 0x2e, 0x0f, 0x0f, 0x54, 0xc3, 0x07, 0xc3
diff --git a/gas/testsuite/gas/i386/mem-intel.d b/gas/testsuite/gas/i386/mem-intel.d
index 10968f1..d37443e 100644
--- a/gas/testsuite/gas/i386/mem-intel.d
+++ b/gas/testsuite/gas/i386/mem-intel.d
@@ -12,7 +12,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 0e sidtd \[esi\]
[ ]*[a-f0-9]+: 0f 01 16 lgdtd \[esi\]
[ ]*[a-f0-9]+: 0f 01 1e lidtd \[esi\]
-[ ]*[a-f0-9]+: 0f 01 3e invlpg \[esi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[esi\]
[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[esi\]
[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[esi\]
[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[esi\]
@@ -27,7 +27,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 0e sidtd \[esi\]
[ ]*[a-f0-9]+: 0f 01 16 lgdtd \[esi\]
[ ]*[a-f0-9]+: 0f 01 1e lidtd \[esi\]
-[ ]*[a-f0-9]+: 0f 01 3e invlpg \[esi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[esi\]
[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[esi\]
[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[esi\]
[ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[esi\]
diff --git a/gas/testsuite/gas/i386/x86-64-mem-intel.d b/gas/testsuite/gas/i386/x86-64-mem-intel.d
index 7d0eb97..d40f083 100644
--- a/gas/testsuite/gas/i386/x86-64-mem-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-mem-intel.d
@@ -12,7 +12,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
-[ ]*[a-f0-9]+: 0f 01 3e invlpg \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\]
[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
@@ -28,7 +28,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
[ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
[ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
-[ ]*[a-f0-9]+: 0f 01 3e invlpg \[rsi\]
+[ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\]
[ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
[ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
[ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d
index 348476e..4d19682 100644
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -292,4 +292,5 @@ Disassembly of section .text:
[ ]*[0-9a-f]+:[ ]+0f 00 c8[ ]+str[ ]+%eax[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+66 0f 00 c8[ ]+str[ ]+%ax[ ]*(#.*)*
[ ]*[0-9a-f]+:[ ]+0f 00 08[ ]+str[ ]+\(%rax\)[ ]*(#.*)*
+[ ]*[a-f0-9]+: 0f 01 f8 swapgs
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s
index dd37342..63d1579 100644
--- a/gas/testsuite/gas/i386/x86-64-opcode.s
+++ b/gas/testsuite/gas/i386/x86-64-opcode.s
@@ -418,4 +418,6 @@
str %ax # 66 -- -- -- 0F 00 c8
str (%rax) # -- -- -- -- 0F 00 08
+ swapgs # -- -- -- -- 0F 01 f8
+
.p2align 4,0