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author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 19:40:51 +0000 |
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committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 20:37:32 +0000 |
commit | 9dcf357fd243bdf21892ae2a5614b26e5d506436 (patch) | |
tree | c997221c72efcd11b38e630611e7edceb08dbb84 /gas | |
parent | 5d766ae78a9dd4e71d7c989e8f3bdf1fd61b8068 (diff) | |
download | gdb-9dcf357fd243bdf21892ae2a5614b26e5d506436.zip gdb-9dcf357fd243bdf21892ae2a5614b26e5d506436.tar.gz gdb-9dcf357fd243bdf21892ae2a5614b26e5d506436.tar.bz2 |
MIPS16: Add ASMACRO instruction support
Add ASMACRO instruction support as per the MIPS16e ASE architecture
specifications [1][2], completing MIPS16e instruction set support.
[1] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Section 4.1 "MIPS16e Instruction Descriptions", p. 65
[2] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Section 1.1 "MIPS16e Instruction Descriptions", p. 66
include/
* opcode/mips.h: Document `0', `1', `2', `3', `4' and `s'
operand codes.
opcodes/
* mips16-opc.c (decode_mips16_operand): Add `0', `1', `2', `3',
`4' and `s' operand codes.
(mips16_opcodes): Add "asmacro" entry.
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: Update for
ASMACRO support.
gas/
* testsuite/gas/mips/mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-asmacro.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
(cherry picked from commit 5284e471d53ccb7c7a1d140bd83098607ccf4b8a)
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d | 21 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d | 21 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips16-asmacro.d | 14 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips16-asmacro.s | 13 |
6 files changed, 79 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 3a05d78..16575d1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,13 @@ 2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * testsuite/gas/mips/mips16-asmacro.d: New test. + * testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test. + * testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test. + * testsuite/gas/mips/mips16-asmacro.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new tests. + +2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * config/tc-mips.c (mips16_immed): Limit `mips16_immed_extend' use to operands whose LSB position is zero. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 678e8d9..0da2df9 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1357,6 +1357,8 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test "mips16-jal-t" run_dump_test "mips16-jal-e" + run_dump_test_arches "mips16-asmacro" [mips_arch_list_matching mips16-32] + run_dump_test "vxworks1" run_dump_test "vxworks1-xgot" run_dump_test "vxworks1-el" diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d b/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d new file mode 100644 index 0000000..8c50a8c --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d @@ -0,0 +1,21 @@ +#objdump: -d --prefix-addresses --show-raw-insn +#name: MIPS16 ASMACRO instruction +#as: -32 +#source: mips16-asmacro.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> f000 extend 0x0 +[0-9a-f]+ <[^>]*> e000 0xe000 +[0-9a-f]+ <[^>]*> f0a4 extend 0xa4 +[0-9a-f]+ <[^>]*> e341 addu s0,v1,v0 +[0-9a-f]+ <[^>]*> f0e0 extend 0xe0 +[0-9a-f]+ <[^>]*> e71f subu a3,s0 +[0-9a-f]+ <[^>]*> f501 extend 0x501 +[0-9a-f]+ <[^>]*> e264 0xe264 +[0-9a-f]+ <[^>]*> f71f extend 0x71f +[0-9a-f]+ <[^>]*> e0e0 0xe0e0 +[0-9a-f]+ <[^>]*> f7ff extend 0x7ff +[0-9a-f]+ <[^>]*> e7ff subu a3,a3 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d b/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d new file mode 100644 index 0000000..466f411 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-64@mips16-asmacro.d @@ -0,0 +1,21 @@ +#objdump: -d --prefix-addresses --show-raw-insn +#name: MIPS16 ASMACRO instruction +#as: -32 +#source: mips16-asmacro.s + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> f000 extend 0x0 +[0-9a-f]+ <[^>]*> e000 daddu s0,s0 +[0-9a-f]+ <[^>]*> f0a4 extend 0xa4 +[0-9a-f]+ <[^>]*> e341 addu s0,v1,v0 +[0-9a-f]+ <[^>]*> f0e0 extend 0xe0 +[0-9a-f]+ <[^>]*> e71f subu a3,s0 +[0-9a-f]+ <[^>]*> f501 extend 0x501 +[0-9a-f]+ <[^>]*> e264 daddu s1,v0,v1 +[0-9a-f]+ <[^>]*> f71f extend 0x71f +[0-9a-f]+ <[^>]*> e0e0 daddu s0,a3 +[0-9a-f]+ <[^>]*> f7ff extend 0x7ff +[0-9a-f]+ <[^>]*> e7ff subu a3,a3 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips16-asmacro.d b/gas/testsuite/gas/mips/mips16-asmacro.d new file mode 100644 index 0000000..1a81c84 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-asmacro.d @@ -0,0 +1,14 @@ +#objdump: -d --prefix-addresses --show-raw-insn +#name: MIPS16 ASMACRO instruction +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> f000 e000 asmacro 0x0,0x0,0x0,0x0,0x0,0x0 +[0-9a-f]+ <[^>]*> f0a4 e341 asmacro 0x0,0x1,0x2,0x3,0x4,0x5 +[0-9a-f]+ <[^>]*> f0e0 e71f asmacro 0x0,0x1f,0x0,0x7,0x0,0x7 +[0-9a-f]+ <[^>]*> f501 e264 asmacro 0x5,0x4,0x3,0x2,0x1,0x0 +[0-9a-f]+ <[^>]*> f71f e0e0 asmacro 0x7,0x0,0x7,0x0,0x1f,0x0 +[0-9a-f]+ <[^>]*> f7ff e7ff asmacro 0x7,0x1f,0x7,0x7,0x1f,0x7 + \.\.\. diff --git a/gas/testsuite/gas/mips/mips16-asmacro.s b/gas/testsuite/gas/mips/mips16-asmacro.s new file mode 100644 index 0000000..18d0ce1 --- /dev/null +++ b/gas/testsuite/gas/mips/mips16-asmacro.s @@ -0,0 +1,13 @@ + .set mips32 + .set mips16 +foo: + asmacro 0, 0, 0, 0, 0, 0 + asmacro 0, 1, 2, 3, 4, 5 + asmacro 0, 31, 0, 7, 0, 7 + asmacro 5, 4, 3, 2, 1, 0 + asmacro 7, 0, 7, 0, 31, 0 + asmacro 7, 31, 7, 7, 31, 7 + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 |