sve

[AArch64] Add a "compnum" feature

This patch adds a named "compnum" feature for the ARMv8.3-A FCADD
and FCMLA extensions.

include/
	* opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro.
	(AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM.

opcodes/
	* aarch64-tbl.h (aarch64_feature_simd_v8_3): Replace with...
	(aarch64_feature_compnum): ...this.
	(SIMD_V8_3): Replace with...
	(COMPNUM): ...this.
	(CNUM_INSN): New macro.
	(aarch64_opcode_table): Use it for the complex number instructions.

gas/
	* doc/c-aarch64.texi: Add a "compnum" entry.
	* config/tc-aarch64.c (aarch64_features): Likewise,
	* testsuite/gas/aarch64/advsimd-compnum.s: New test.
	* testsuite/gas/aarch64/advsimd-compnum.d: Likewise.

5 files changed, 62 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3542209..01ccefb 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
 2017-02-27  Richard Sandiford  <richard.sandiford@arm.com>
 
+	* doc/c-aarch64.texi: Add a "compnum" entry.
+	* config/tc-aarch64.c (aarch64_features): Likewise,
+	* testsuite/gas/aarch64/advsimd-compnum.s: New test.
+	* testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
+
+2017-02-27  Richard Sandiford  <richard.sandiford@arm.com>
+
 	* testsuite/gas/aarch64/sve-sysreg.s,
 	testsuite/gas/aarch64/sve-sysreg.d,
 	testsuite/gas/aarch64/sve-sysreg-invalid.d,
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index c236df1..8a9b277 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8438,6 +8438,9 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"sve",		AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0),
 			AARCH64_FEATURE (AARCH64_FEATURE_FP
 					 | AARCH64_FEATURE_SIMD, 0)},
+  {"compnum",		AARCH64_FEATURE (AARCH64_FEATURE_COMPNUM, 0),
+			AARCH64_FEATURE (AARCH64_FEATURE_F16
+					 | AARCH64_FEATURE_SIMD, 0)},
   {"rcpc",		AARCH64_FEATURE (AARCH64_FEATURE_RCPC, 0),
 			AARCH64_ARCH_NONE},
   {NULL,		AARCH64_ARCH_NONE, AARCH64_ARCH_NONE},
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 59467c5..71d8072 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -131,6 +131,9 @@ automatically cause those extensions to be disabled.
 @multitable @columnfractions .12 .17 .17 .54
 @headitem Extension @tab Minimum Architecture @tab Enabled by default
  @tab Description
+@item @code{compnum} @tab ARMv8.2-A @tab ARMv8.3-A or later
+ @tab Enable the complex number SIMD extensions.  This implies
+ @code{fp16} and @code{simd}.
 @item @code{crc} @tab ARMv8-A @tab ARMv8.1-A or later
  @tab Enable CRC instructions.
 @item @code{crypto} @tab ARMv8-A @tab No
diff --git a/gas/testsuite/gas/aarch64/advsimd-compnum.d b/gas/testsuite/gas/aarch64/advsimd-compnum.d
new file mode 100644
index 0000000..64543a1
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/advsimd-compnum.d
@@ -0,0 +1,40 @@
+#as: -march=armv8.2-a+compnum -I$srcdir/$subdir
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+[^:]+:	6ec3c441 	fcmla	v1\.2d, v2\.2d, v3\.2d, #0
+[^:]+:	6ec3cc41 	fcmla	v1\.2d, v2\.2d, v3\.2d, #90
+[^:]+:	6ec3d441 	fcmla	v1\.2d, v2\.2d, v3\.2d, #180
+[^:]+:	6ec3dc41 	fcmla	v1\.2d, v2\.2d, v3\.2d, #270
+[^:]+:	2e83cc41 	fcmla	v1\.2s, v2\.2s, v3\.2s, #90
+[^:]+:	6e83cc41 	fcmla	v1\.4s, v2\.4s, v3\.4s, #90
+[^:]+:	2e43cc41 	fcmla	v1\.4h, v2\.4h, v3\.4h, #90
+[^:]+:	6e43cc41 	fcmla	v1\.8h, v2\.8h, v3\.8h, #90
+[^:]+:	6f831041 	fcmla	v1\.4s, v2\.4s, v3\.s\[0\], #0
+[^:]+:	6f833041 	fcmla	v1\.4s, v2\.4s, v3\.s\[0\], #90
+[^:]+:	6f835041 	fcmla	v1\.4s, v2\.4s, v3\.s\[0\], #180
+[^:]+:	6f837041 	fcmla	v1\.4s, v2\.4s, v3\.s\[0\], #270
+[^:]+:	6f833841 	fcmla	v1\.4s, v2\.4s, v3\.s\[1\], #90
+[^:]+:	2f433041 	fcmla	v1\.4h, v2\.4h, v3\.h\[0\], #90
+[^:]+:	2f633041 	fcmla	v1\.4h, v2\.4h, v3\.h\[1\], #90
+[^:]+:	6f433041 	fcmla	v1\.8h, v2\.8h, v3\.h\[0\], #90
+[^:]+:	6f633041 	fcmla	v1\.8h, v2\.8h, v3\.h\[1\], #90
+[^:]+:	6f433841 	fcmla	v1\.8h, v2\.8h, v3\.h\[2\], #90
+[^:]+:	6f633841 	fcmla	v1\.8h, v2\.8h, v3\.h\[3\], #90
+[^:]+:	6ec3e441 	fcadd	v1\.2d, v2\.2d, v3\.2d, #90
+[^:]+:	6ec3f441 	fcadd	v1\.2d, v2\.2d, v3\.2d, #270
+[^:]+:	2e83e441 	fcadd	v1\.2s, v2\.2s, v3\.2s, #90
+[^:]+:	6e83e441 	fcadd	v1\.4s, v2\.4s, v3\.4s, #90
+[^:]+:	2e43e441 	fcadd	v1\.4h, v2\.4h, v3\.4h, #90
+[^:]+:	6e43e441 	fcadd	v1\.8h, v2\.8h, v3\.8h, #90
+[^:]+:	4e63d441 	fadd	v1\.2d, v2\.2d, v3\.2d
+[^:]+:	0e23d441 	fadd	v1\.2s, v2\.2s, v3\.2s
+[^:]+:	4e23d441 	fadd	v1\.4s, v2\.4s, v3\.4s
+[^:]+:	0e401400 	fadd	v0\.4h, v0\.4h, v0\.4h
+[^:]+:	0e431441 	fadd	v1\.4h, v2\.4h, v3\.4h
+[^:]+:	4e401400 	fadd	v0\.8h, v0\.8h, v0\.8h
+[^:]+:	4e431441 	fadd	v1\.8h, v2\.8h, v3\.8h
diff --git a/gas/testsuite/gas/aarch64/advsimd-compnum.s b/gas/testsuite/gas/aarch64/advsimd-compnum.s
new file mode 100644
index 0000000..fcf25f8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/advsimd-compnum.s
@@ -0,0 +1,9 @@
+	.include "advsimd-armv8_3.s"
+
+	fadd	v1.2d, v2.2d, v3.2d
+	fadd	v1.2s, v2.2s, v3.2s
+	fadd	v1.4s, v2.4s, v3.4s
+	fadd	v0.4h, v0.4h, v0.4h
+	fadd	v1.4h, v2.4h, v3.4h
+	fadd	v0.8h, v0.8h, v0.8h
+	fadd	v1.8h, v2.8h, v3.8h