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authorRamana Radhakrishnan <ramana.r@gmail.com>2013-10-15 13:30:40 +0000
committerRamana Radhakrishnan <ramana.r@gmail.com>2013-10-15 13:30:40 +0000
commit85181173183083283b896dc5adbfa318506d9fe4 (patch)
treeafc37ae7b349cdd2717f02282e2e304bb06862c9 /gas
parent02fb2970366197c8726943b89f164fc604284d66 (diff)
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Fix neon vshll disassembly.
opcodes/ 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * arm-dis.c (neon_opcodes): Adjust print string for vshll. gas/testsuite/ 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * gas/arm/neon-cov.d: Adjust output.
Diffstat (limited to 'gas')
-rw-r--r--gas/testsuite/ChangeLog4
-rw-r--r--gas/testsuite/gas/arm/neon-cov.d12
2 files changed, 10 insertions, 6 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 782d30d..7116862 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * gas/arm/neon-cov.d: Adjust output.
+
2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* gas/mips/micromips@msa-relax.d, gas/mips/micromips@msa.d,
diff --git a/gas/testsuite/gas/arm/neon-cov.d b/gas/testsuite/gas/arm/neon-cov.d
index e3f02f8..3d7a488 100644
--- a/gas/testsuite/gas/arm/neon-cov.d
+++ b/gas/testsuite/gas/arm/neon-cov.d
@@ -1106,12 +1106,12 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f2910850 vrshrn\.i32 d0, q0, #15
0[0-9a-f]+ <[^>]+> f2910850 vrshrn\.i32 d0, q0, #15
0[0-9a-f]+ <[^>]+> f2a10850 vrshrn\.i64 d0, q0, #31
-0[0-9a-f]+ <[^>]+> f2890a10 vshll\.s8 d0, q0, #1
-0[0-9a-f]+ <[^>]+> f2910a10 vshll\.s16 d0, q0, #1
-0[0-9a-f]+ <[^>]+> f2a10a10 vshll\.s32 d0, q0, #1
-0[0-9a-f]+ <[^>]+> f3890a10 vshll\.u8 d0, q0, #1
-0[0-9a-f]+ <[^>]+> f3910a10 vshll\.u16 d0, q0, #1
-0[0-9a-f]+ <[^>]+> f3a10a10 vshll\.u32 d0, q0, #1
+0[0-9a-f]+ <[^>]+> f2890a10 vshll\.s8 q0, d0, #1
+0[0-9a-f]+ <[^>]+> f2910a10 vshll\.s16 q0, d0, #1
+0[0-9a-f]+ <[^>]+> f2a10a10 vshll\.s32 q0, d0, #1
+0[0-9a-f]+ <[^>]+> f3890a10 vshll\.u8 q0, d0, #1
+0[0-9a-f]+ <[^>]+> f3910a10 vshll\.u16 q0, d0, #1
+0[0-9a-f]+ <[^>]+> f3a10a10 vshll\.u32 q0, d0, #1
0[0-9a-f]+ <[^>]+> f3b20300 vshll\.i8 q0, d0, #8
0[0-9a-f]+ <[^>]+> f3b60300 vshll\.i16 q0, d0, #16
0[0-9a-f]+ <[^>]+> f3ba0300 vshll\.i32 q0, d0, #32