diff options
author | Walter Lee <walt@tilera.com> | 2012-02-25 19:51:34 +0000 |
---|---|---|
committer | Walter Lee <walt@tilera.com> | 2012-02-25 19:51:34 +0000 |
commit | fb6ceddedd56805fc4fd64792a0e73baa8c22a21 (patch) | |
tree | 035d5e8c3f9a3be2c2b82f975fcde4e4074ba612 /gas | |
parent | 825902491e89db303b036d82eef32ef0b07d4317 (diff) | |
download | gdb-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.zip gdb-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.tar.gz gdb-fb6ceddedd56805fc4fd64792a0e73baa8c22a21.tar.bz2 |
Add big-endian support for tilegx.
bfd/
* config.bfd (tilegx-*-*): rename little endian vector; add big
endian vector.
(tilegxbe-*-*): New case.
* configure.in (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): New vector.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): New vector.
* configure: Regenerate.
* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* targets.c (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): Declare.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): Declare.
(_bfd_target_vector): Add / rename above vectors.
binutils/testsuite/
* binutils-all/objdump.exp (cpus_expected): Add tilegx.
gas/
* tc-tilegx.c (tilegx_target_format): Handle big endian.
(OPTION_EB): Define.
(OPTION_EL): Define.
(md_longopts): Add entries for "EB" and "EL".
(md_parse_option): Handle OPTION_EB and OPTION_EL.
(md_show_usage): Add -EB and -EL.
(md_number_to_chars): New.
* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
ifndef.
(md_number_to_chars): Delete.
* configure.tgt (tilegx*be): Handle.
* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
* doc/c-tilegx.texi: Ditto.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
(eelf32tilegx_be.c): Add rule to build this file.
(eelf64tilegx_be.c): Ditto.
* Makefile.in: Regenerate.
* configure.tgt (tilegx-*-*): Support big endian.
(tilegxbe-*-*): New.
* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf32tilegx_be.sh: New.
* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf64tilegx_be.sh: New.
ld/testsuite/
* ld-tilegx/reloc-be.d: New.
* ld-tilegx/reloc-le.d: New.
* ld-tilegx/reloc.d: Delete.
* ld-tilegx/tilegx.exp: Test big and little endian.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 15 | ||||
-rw-r--r-- | gas/config/tc-tilegx.c | 28 | ||||
-rw-r--r-- | gas/config/tc-tilegx.h | 4 | ||||
-rw-r--r-- | gas/configure.tgt | 4 | ||||
-rw-r--r-- | gas/doc/as.texinfo | 2 | ||||
-rw-r--r-- | gas/doc/c-tilegx.texi | 5 |
6 files changed, 52 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index dda0c1a..fd16b97 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,6 +1,19 @@ 2012-02-25 Walter Lee <walt@tilera.com> - * tc-tilegx.c (md_begin): set architecture and machine. + * tc-tilegx.c (md_begin): Set architecture and machine. + (tilegx_target_format): Handle big endian. + (OPTION_EB): Define. + (OPTION_EL): Define. + (md_longopts): Add entries for "EB" and "EL". + (md_parse_option): Handle OPTION_EB and OPTION_EL. + (md_show_usage): Add -EB and -EL. + (md_number_to_chars): New. + * tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with + ifndef. + (md_number_to_chars): Delete. + * configure.tgt (tilegx*be): Handle. + * doc/as.texinfo [TILE-Gx]: Document -EB and -EL. + * doc/c-tilegx.texi: Ditto. 2012-02-21 H.J. Lu <hongjiu.lu@intel.com> diff --git a/gas/config/tc-tilegx.c b/gas/config/tc-tilegx.c index 9f6e349..01237d1 100644 --- a/gas/config/tc-tilegx.c +++ b/gas/config/tc-tilegx.c @@ -72,12 +72,18 @@ static int tilegx_arch_size = 64; const char * tilegx_target_format (void) { - return tilegx_arch_size == 64 ? "elf64-tilegx" : "elf32-tilegx"; + if (target_big_endian) { + return tilegx_arch_size == 64 ? "elf64-tilegx-be" : "elf32-tilegx-be"; + } else { + return tilegx_arch_size == 64 ? "elf64-tilegx-le" : "elf32-tilegx-le"; + } } #define OPTION_32 (OPTION_MD_BASE + 0) #define OPTION_64 (OPTION_MD_BASE + 1) +#define OPTION_EB (OPTION_MD_BASE + 2) +#define OPTION_EL (OPTION_MD_BASE + 3) const char *md_shortopts = "VQ:"; @@ -85,6 +91,8 @@ struct option md_longopts[] = { {"32", no_argument, NULL, OPTION_32}, {"64", no_argument, NULL, OPTION_64}, + {"EB", no_argument, NULL, OPTION_EB }, + {"EL", no_argument, NULL, OPTION_EL }, {NULL, no_argument, NULL, 0} }; @@ -113,6 +121,14 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) tilegx_arch_size = 64; break; + case OPTION_EB: + target_big_endian = 1; + break; + + case OPTION_EL: + target_big_endian = 0; + break; + default: return 0; } @@ -126,6 +142,7 @@ md_show_usage (FILE *stream) fprintf (stream, _("\ -Q ignored\n\ -V print assembler version number\n\ + -EB/-EL generate big-endian/little-endian code\n\ --32/--64 generate 32bit/64bit code\n")); } @@ -1269,6 +1286,15 @@ const pseudo_typeS md_pseudo_table[] = /* Equal to MAX_PRECISION in atof-ieee.c */ #define MAX_LITTLENUMS 6 +void +md_number_to_chars (char * buf, valueT val, int n) +{ + if (target_big_endian) + number_to_chars_bigendian (buf, val, n); + else + number_to_chars_littleendian (buf, val, n); +} + /* Turn the string pointed to by litP into a floating point constant of type TYPE, and emit the appropriate bytes. The number of LITTLENUMS emitted is stored in *SIZEP. An error message is diff --git a/gas/config/tc-tilegx.h b/gas/config/tc-tilegx.h index aad6313..ec8a40d 100644 --- a/gas/config/tc-tilegx.h +++ b/gas/config/tc-tilegx.h @@ -24,7 +24,9 @@ #define TC_TILEGX +#ifndef TARGET_BYTES_BIG_ENDIAN #define TARGET_BYTES_BIG_ENDIAN 0 +#endif #define WORKING_DOT_WORD @@ -35,8 +37,6 @@ extern const char * tilegx_target_format (void); #define DWARF2_LINE_MIN_INSN_LENGTH 8 -#define md_number_to_chars number_to_chars_littleendian - #define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */ #define HANDLE_ALIGN(fragp) tilegx_handle_align (fragp) diff --git a/gas/configure.tgt b/gas/configure.tgt index c33bb7a..06fb6ca 100644 --- a/gas/configure.tgt +++ b/gas/configure.tgt @@ -82,6 +82,8 @@ case ${cpu} in sparclet*) cpu_type=sparc arch=sparclet ;; sparclite*) cpu_type=sparc arch=sparclite ;; sparc*) cpu_type=sparc arch=sparclite ;; # ??? See tc-sparc.c. + tilegx*be) cpu_type=tilegx endian=big ;; + tilegx*) cpu_type=tilegx endian=little ;; v850*) cpu_type=v850 ;; x86_64*) cpu_type=i386 arch=x86_64;; xtensa*) cpu_type=xtensa arch=xtensa ;; @@ -404,7 +406,7 @@ case ${generic_target} in tic54x-*-* | c54x*-*-*) fmt=coff bfd_gas=yes need_libm=yes;; tic6x-*-*) fmt=elf ;; - tilepro-*-* | tilegx-*-*) fmt=elf ;; + tilepro-*-* | tilegx*-*-*) fmt=elf ;; v850*-*-*) fmt=elf ;; diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index 7a41f02..81ad370 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -497,7 +497,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @ifset TILEGX @emph{Target TILE-Gx options:} - [@b{-m32}|@b{-m64}] + [@b{-m32}|@b{-m64}][@b{-EB}][@b{-EL}] @end ifset @ifset TILEPRO @c TILEPro has no machine-dependent assembler options diff --git a/gas/doc/c-tilegx.texi b/gas/doc/c-tilegx.texi index 66dd5a3..c2f5bc1 100644 --- a/gas/doc/c-tilegx.texi +++ b/gas/doc/c-tilegx.texi @@ -33,6 +33,11 @@ The following table lists all available TILE-Gx specific options: @item -m32 | -m64 Select the word size, either 32 bits or 64 bits. +@cindex @samp{-EB} option, TILE-Gx +@cindex @samp{-EL} option, TILE-Gx +@item -EB | -EL +Select the endianness, either big-endian (-EB) or little-endian (-EL). + @end table @c man end |