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authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2017-01-12 08:42:17 -0800
committerH.J. Lu <hjl.tools@gmail.com>2017-01-12 08:44:24 -0800
commit620214f742f7816e2844e1bb7f78a7a684431927 (patch)
treee39b951fa3ab85dd33960b110cc1cf29f2545d5d /gas
parent3015c06465584a437261c65a397fbd8f1a71aae7 (diff)
downloadgdb-620214f742f7816e2844e1bb7f78a7a684431927.zip
gdb-620214f742f7816e2844e1bb7f78a7a684431927.tar.gz
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Enable Intel AVX512_VPOPCNTDQ instructions
gas/ 2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com> * config/tc-i386.c (cpu_arch): Add .avx512_vpopcntdq. (cpu_noarch): Add noavx512_vpopcntdq. * doc/c-i386.texi: Document avx512_vpopcntdq, noavx512_vpopcntdq. * testsuite/gas/i386/i386.exp: Run AVX512_VPOPCNTDQ tests. * testsuite/gas/i386/avx512_vpopcntdqd-intel.d: New file. * testsuite/gas/i386/avx512_vpopcntdqd.d: Ditto. * testsuite/gas/i386/avx512_vpopcntdqd.s: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdqd-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.d: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.s: Ditto. opcodes/ 2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com> * i386-dis.c (enum): Add PREFIX_EVEX_0F3855, EVEX_W_0F3855_P_2. * i386-dis-evex.h (evex_table): Updated. * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VPOPCNTDQ_FLAGS, CPU_ANY_AVX512_VPOPCNTDQ_FLAGS. Update CPU_ANY_AVX512F_FLAGS. (cpu_flags): Add CpuAVX512_VPOPCNTDQ. * i386-opc.h (enum): (AVX512_VPOPCNTDQ): New. (i386_cpu_flags): Add cpuavx512_vpopcntdq. * i386-opc.tbl: Add Intel AVX512_VPOPCNTDQ instructions. * i386-init.h: Regenerate. * i386-tbl.h: Ditto.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog13
-rw-r--r--gas/config/tc-i386.c3
-rw-r--r--gas/doc/c-i386.texi4
-rw-r--r--gas/testsuite/gas/i386/avx512_vpopcntdq-intel.d68
-rw-r--r--gas/testsuite/gas/i386/avx512_vpopcntdq.d68
-rw-r--r--gas/testsuite/gas/i386/avx512_vpopcntdq.s63
-rw-r--r--gas/testsuite/gas/i386/i386.exp4
-rw-r--r--gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq-intel.d68
-rw-r--r--gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.d68
-rw-r--r--gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.s63
10 files changed, 421 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 40cfce1..e999cd7 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,16 @@
+2017-01-12 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * config/tc-i386.c (cpu_arch): Add .avx512_vpopcntdq.
+ (cpu_noarch): Add noavx512_vpopcntdq.
+ * doc/c-i386.texi: Document avx512_vpopcntdq, noavx512_vpopcntdq.
+ * testsuite/gas/i386/i386.exp: Run AVX512_VPOPCNTDQ tests.
+ * testsuite/gas/i386/avx512_vpopcntdqd-intel.d: New file.
+ * testsuite/gas/i386/avx512_vpopcntdqd.d: Ditto.
+ * testsuite/gas/i386/avx512_vpopcntdqd.s: Ditto.
+ * testsuite/gas/i386/x86-64-avx512_vpopcntdqd-intel.d: Ditto.
+ * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.d: Ditto.
+ * testsuite/gas/i386/x86-64-avx512_vpopcntdqd.s: Ditto.
+
2017-01-12 Nick Clifton <nickc@redhat.com>
* read.c (temp_ilp): New function. Installs a temporary input
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index ffaf63b..80812cf 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -966,6 +966,8 @@ static const arch_entry cpu_arch[] =
CPU_AVX512_4FMAPS_FLAGS, 0 },
{ STRING_COMMA_LEN (".avx512_4vnniw"), PROCESSOR_UNKNOWN,
CPU_AVX512_4VNNIW_FLAGS, 0 },
+ { STRING_COMMA_LEN (".avx512_vpopcntdq"), PROCESSOR_UNKNOWN,
+ CPU_AVX512_VPOPCNTDQ_FLAGS, 0 },
{ STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN,
CPU_CLZERO_FLAGS, 0 },
{ STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN,
@@ -1005,6 +1007,7 @@ static const noarch_entry cpu_noarch[] =
{ STRING_COMMA_LEN ("noavx512vbmi"), CPU_ANY_AVX512VBMI_FLAGS },
{ STRING_COMMA_LEN ("noavx512_4fmaps"), CPU_ANY_AVX512_4FMAPS_FLAGS },
{ STRING_COMMA_LEN ("noavx512_4vnniw"), CPU_ANY_AVX512_4VNNIW_FLAGS },
+ { STRING_COMMA_LEN ("noavx512_vpopcntdq"), CPU_ANY_AVX512_VPOPCNTDQ_FLAGS },
};
#ifdef I386COFF
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 4968b36..d4e0294 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -182,6 +182,7 @@ accept various extension mnemonics. For example,
@code{avx512vbmi},
@code{avx512_4fmaps},
@code{avx512_4vnniw},
+@code{avx512_vpopcntdq},
@code{noavx512f},
@code{noavx512cd},
@code{noavx512er},
@@ -193,6 +194,7 @@ accept various extension mnemonics. For example,
@code{noavx512vbmi},
@code{noavx512_4fmaps},
@code{noavx512_4vnniw},
+@code{noavx512_vpopcntdq},
@code{vmx},
@code{vmfunc},
@code{smx},
@@ -1195,7 +1197,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf}
@item @samp{.avx512vl} @tab @samp{.avx512bw} @tab @samp{.avx512dq} @tab @samp{.avx512ifma}
@item @samp{.avx512vbmi} @tab @samp{.avx512_4fmaps} @tab @samp{.avx512_4vnniw}
-@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite}
+@item @samp{.avx512_vpopcntdq} @tab @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
diff --git a/gas/testsuite/gas/i386/avx512_vpopcntdq-intel.d b/gas/testsuite/gas/i386/avx512_vpopcntdq-intel.d
new file mode 100644
index 0000000..d311c45
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512_vpopcntdq-intel.d
@@ -0,0 +1,68 @@
+#as:
+#objdump: -dw -Mintel
+#name: i386 AVX512/VPOPCNTDQ insns (Intel disassembly)
+#source: avx512_vpopcntdq.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 f5[ ]*vpopcntd zmm6,zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 4f 55 f5[ ]*vpopcntd zmm6\{k7\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d cf 55 f5[ ]*vpopcntd zmm6\{k7\}\{z\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 31[ ]*vpopcntd zmm6,ZMMWORD PTR \[ecx\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntd zmm6,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 30[ ]*vpopcntd zmm6,DWORD PTR \[eax\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 7f[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 00 20 00 00[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 80[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 7f[ ]*vpopcntd zmm6,DWORD PTR \[edx\+0x1fc\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 00 02 00 00[ ]*vpopcntd zmm6,DWORD PTR \[edx\+0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 80[ ]*vpopcntd zmm6,DWORD PTR \[edx-0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd zmm6,DWORD PTR \[edx-0x204\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 f5[ ]*vpopcntq zmm6,zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 4f 55 f5[ ]*vpopcntq zmm6\{k7\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 fd cf 55 f5[ ]*vpopcntq zmm6\{k7\}\{z\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 31[ ]*vpopcntq zmm6,ZMMWORD PTR \[ecx\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntq zmm6,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 30[ ]*vpopcntq zmm6,QWORD PTR \[eax\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 7f[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 00 20 00 00[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 80[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 7f[ ]*vpopcntq zmm6,QWORD PTR \[edx\+0x3f8\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 00 04 00 00[ ]*vpopcntq zmm6,QWORD PTR \[edx\+0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 80[ ]*vpopcntq zmm6,QWORD PTR \[edx-0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq zmm6,QWORD PTR \[edx-0x408\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 f5[ ]*vpopcntd zmm6,zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 4f 55 f5[ ]*vpopcntd zmm6\{k7\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d cf 55 f5[ ]*vpopcntd zmm6\{k7\}\{z\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 31[ ]*vpopcntd zmm6,ZMMWORD PTR \[ecx\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntd zmm6,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 30[ ]*vpopcntd zmm6,DWORD PTR \[eax\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 7f[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 00 20 00 00[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 80[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd zmm6,ZMMWORD PTR \[edx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 7f[ ]*vpopcntd zmm6,DWORD PTR \[edx\+0x1fc\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 00 02 00 00[ ]*vpopcntd zmm6,DWORD PTR \[edx\+0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 80[ ]*vpopcntd zmm6,DWORD PTR \[edx-0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd zmm6,DWORD PTR \[edx-0x204\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 f5[ ]*vpopcntq zmm6,zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 4f 55 f5[ ]*vpopcntq zmm6\{k7\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 fd cf 55 f5[ ]*vpopcntq zmm6\{k7\}\{z\},zmm5
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 31[ ]*vpopcntq zmm6,ZMMWORD PTR \[ecx\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntq zmm6,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 30[ ]*vpopcntq zmm6,QWORD PTR \[eax\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 7f[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 00 20 00 00[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 80[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq zmm6,ZMMWORD PTR \[edx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 7f[ ]*vpopcntq zmm6,QWORD PTR \[edx\+0x3f8\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 00 04 00 00[ ]*vpopcntq zmm6,QWORD PTR \[edx\+0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 80[ ]*vpopcntq zmm6,QWORD PTR \[edx-0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq zmm6,QWORD PTR \[edx-0x408\]\{1to8\}
+#pass
diff --git a/gas/testsuite/gas/i386/avx512_vpopcntdq.d b/gas/testsuite/gas/i386/avx512_vpopcntdq.d
new file mode 100644
index 0000000..3f10887
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512_vpopcntdq.d
@@ -0,0 +1,68 @@
+#as:
+#objdump: -dw
+#name: i386 AVX512/VPOPCNTDQ insns
+#source: avx512_vpopcntdq.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 f5[ ]*vpopcntd %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 4f 55 f5[ ]*vpopcntd %zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d cf 55 f5[ ]*vpopcntd %zmm5,%zmm6\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 31[ ]*vpopcntd \(%ecx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntd -0x1e240\(%esp,%esi,8\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 30[ ]*vpopcntd \(%eax\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 7f[ ]*vpopcntd 0x1fc0\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 00 20 00 00[ ]*vpopcntd 0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 80[ ]*vpopcntd -0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd -0x2040\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 7f[ ]*vpopcntd 0x1fc\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 00 02 00 00[ ]*vpopcntd 0x200\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 80[ ]*vpopcntd -0x200\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd -0x204\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 f5[ ]*vpopcntq %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 4f 55 f5[ ]*vpopcntq %zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd cf 55 f5[ ]*vpopcntq %zmm5,%zmm6\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 31[ ]*vpopcntq \(%ecx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntq -0x1e240\(%esp,%esi,8\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 30[ ]*vpopcntq \(%eax\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 7f[ ]*vpopcntq 0x1fc0\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 00 20 00 00[ ]*vpopcntq 0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 80[ ]*vpopcntq -0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq -0x2040\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 7f[ ]*vpopcntq 0x3f8\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 00 04 00 00[ ]*vpopcntq 0x400\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 80[ ]*vpopcntq -0x400\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq -0x408\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 f5[ ]*vpopcntd %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 4f 55 f5[ ]*vpopcntd %zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d cf 55 f5[ ]*vpopcntd %zmm5,%zmm6\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 31[ ]*vpopcntd \(%ecx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntd -0x1e240\(%esp,%esi,8\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 30[ ]*vpopcntd \(%eax\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 7f[ ]*vpopcntd 0x1fc0\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 00 20 00 00[ ]*vpopcntd 0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 72 80[ ]*vpopcntd -0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd -0x2040\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 7f[ ]*vpopcntd 0x1fc\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 00 02 00 00[ ]*vpopcntd 0x200\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 72 80[ ]*vpopcntd -0x200\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd -0x204\(%edx\)\{1to16\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 f5[ ]*vpopcntq %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 4f 55 f5[ ]*vpopcntq %zmm5,%zmm6\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd cf 55 f5[ ]*vpopcntq %zmm5,%zmm6\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 31[ ]*vpopcntq \(%ecx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b4 f4 c0 1d fe ff[ ]*vpopcntq -0x1e240\(%esp,%esi,8\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 30[ ]*vpopcntq \(%eax\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 7f[ ]*vpopcntq 0x1fc0\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 00 20 00 00[ ]*vpopcntq 0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 72 80[ ]*vpopcntq -0x2000\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq -0x2040\(%edx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 7f[ ]*vpopcntq 0x3f8\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 00 04 00 00[ ]*vpopcntq 0x400\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 72 80[ ]*vpopcntq -0x400\(%edx\)\{1to8\},%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq -0x408\(%edx\)\{1to8\},%zmm6
+#pass
diff --git a/gas/testsuite/gas/i386/avx512_vpopcntdq.s b/gas/testsuite/gas/i386/avx512_vpopcntdq.s
new file mode 100644
index 0000000..2691a46
--- /dev/null
+++ b/gas/testsuite/gas/i386/avx512_vpopcntdq.s
@@ -0,0 +1,63 @@
+# Check 32bit AVX512_VPOPCNTDQ instructions
+
+ .allow_index_reg
+ .text
+_start:
+ vpopcntd %zmm5, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd %zmm5, %zmm6{%k7} # AVX512_VPOPCNTDQ
+ vpopcntd %zmm5, %zmm6{%k7}{z} # AVX512_VPOPCNTDQ
+ vpopcntd (%ecx), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd -123456(%esp,%esi,8), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd (%eax){1to16}, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd 8128(%edx), %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd 8192(%edx), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd -8192(%edx), %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd -8256(%edx), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd 508(%edx){1to16}, %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd 512(%edx){1to16}, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntd -512(%edx){1to16}, %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd -516(%edx){1to16}, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq %zmm5, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq %zmm5, %zmm6{%k7} # AVX512_VPOPCNTDQ
+ vpopcntq %zmm5, %zmm6{%k7}{z} # AVX512_VPOPCNTDQ
+ vpopcntq (%ecx), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq -123456(%esp,%esi,8), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq (%eax){1to8}, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq 8128(%edx), %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq 8192(%edx), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq -8192(%edx), %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq -8256(%edx), %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq 1016(%edx){1to8}, %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq 1024(%edx){1to8}, %zmm6 # AVX512_VPOPCNTDQ
+ vpopcntq -1024(%edx){1to8}, %zmm6 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq -1032(%edx){1to8}, %zmm6 # AVX512_VPOPCNTDQ
+
+ .intel_syntax noprefix
+ vpopcntd zmm6, zmm5 # AVX512_VPOPCNTDQ
+ vpopcntd zmm6{k7}, zmm5 # AVX512_VPOPCNTDQ
+ vpopcntd zmm6{k7}{z}, zmm5 # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, ZMMWORD PTR [ecx] # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, ZMMWORD PTR [esp+esi*8-123456] # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, [eax]{1to16} # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, ZMMWORD PTR [edx+8128] # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm6, ZMMWORD PTR [edx+8192] # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, ZMMWORD PTR [edx-8192] # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm6, ZMMWORD PTR [edx-8256] # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, [edx+508]{1to16} # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm6, [edx+512]{1to16} # AVX512_VPOPCNTDQ
+ vpopcntd zmm6, [edx-512]{1to16} # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm6, [edx-516]{1to16} # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, zmm5 # AVX512_VPOPCNTDQ
+ vpopcntq zmm6{k7}, zmm5 # AVX512_VPOPCNTDQ
+ vpopcntq zmm6{k7}{z}, zmm5 # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, ZMMWORD PTR [ecx] # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, ZMMWORD PTR [esp+esi*8-123456] # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, [eax]{1to8} # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, ZMMWORD PTR [edx+8128] # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm6, ZMMWORD PTR [edx+8192] # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, ZMMWORD PTR [edx-8192] # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm6, ZMMWORD PTR [edx-8256] # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, [edx+1016]{1to8} # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm6, [edx+1024]{1to8} # AVX512_VPOPCNTDQ
+ vpopcntq zmm6, [edx-1024]{1to8} # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm6, [edx-1032]{1to8} # AVX512_VPOPCNTDQ
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index bfd9ce5..10fe71c 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -368,6 +368,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "avx512_4vnniw-intel"
run_dump_test "avx512_4vnniw_vl"
run_dump_test "avx512_4vnniw_vl-intel"
+ run_dump_test "avx512_vpopcntdq"
+ run_dump_test "avx512_vpopcntdq-intel"
run_dump_test "clzero"
run_dump_test "disassem"
run_dump_test "mwaitx-bdver4"
@@ -781,6 +783,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-avx512_4vnniw-intel"
run_dump_test "x86-64-avx512_4vnniw_vl"
run_dump_test "x86-64-avx512_4vnniw_vl-intel"
+ run_dump_test "x86-64-avx512_vpopcntdq"
+ run_dump_test "x86-64-avx512_vpopcntdq-intel"
run_dump_test "x86-64-clzero"
run_dump_test "x86-64-mwaitx-bdver4"
run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq-intel.d b/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq-intel.d
new file mode 100644
index 0000000..476d586
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq-intel.d
@@ -0,0 +1,68 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 AVX512/VPOPCNTDQ insns (Intel disassembly)
+#source: x86-64-avx512_vpopcntdq.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 55 f5[ ]*vpopcntd zmm30,zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 7d 4f 55 f5[ ]*vpopcntd zmm30\{k7\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 7d cf 55 f5[ ]*vpopcntd zmm30\{k7\}\{z\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 31[ ]*vpopcntd zmm30,ZMMWORD PTR \[rcx\]
+[ ]*[a-f0-9]+:[ ]*62 22 7d 48 55 b4 f0 23 01 00 00[ ]*vpopcntd zmm30,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 31[ ]*vpopcntd zmm30,DWORD PTR \[rcx\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 7f[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 00 20 00 00[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 80[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 7f[ ]*vpopcntd zmm30,DWORD PTR \[rdx\+0x1fc\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 00 02 00 00[ ]*vpopcntd zmm30,DWORD PTR \[rdx\+0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 80[ ]*vpopcntd zmm30,DWORD PTR \[rdx-0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd zmm30,DWORD PTR \[rdx-0x204\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 02 fd 48 55 f5[ ]*vpopcntq zmm30,zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 fd 4f 55 f5[ ]*vpopcntq zmm30\{k7\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 fd cf 55 f5[ ]*vpopcntq zmm30\{k7\}\{z\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 31[ ]*vpopcntq zmm30,ZMMWORD PTR \[rcx\]
+[ ]*[a-f0-9]+:[ ]*62 22 fd 48 55 b4 f0 23 01 00 00[ ]*vpopcntq zmm30,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 31[ ]*vpopcntq zmm30,QWORD PTR \[rcx\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 7f[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 00 20 00 00[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 80[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 7f[ ]*vpopcntq zmm30,QWORD PTR \[rdx\+0x3f8\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 00 04 00 00[ ]*vpopcntq zmm30,QWORD PTR \[rdx\+0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 80[ ]*vpopcntq zmm30,QWORD PTR \[rdx-0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq zmm30,QWORD PTR \[rdx-0x408\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 55 f5[ ]*vpopcntd zmm30,zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 7d 4f 55 f5[ ]*vpopcntd zmm30\{k7\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 7d cf 55 f5[ ]*vpopcntd zmm30\{k7\}\{z\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 31[ ]*vpopcntd zmm30,ZMMWORD PTR \[rcx\]
+[ ]*[a-f0-9]+:[ ]*62 22 7d 48 55 b4 f0 34 12 00 00[ ]*vpopcntd zmm30,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 31[ ]*vpopcntd zmm30,DWORD PTR \[rcx\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 7f[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 00 20 00 00[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 80[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd zmm30,ZMMWORD PTR \[rdx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 7f[ ]*vpopcntd zmm30,DWORD PTR \[rdx\+0x1fc\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 00 02 00 00[ ]*vpopcntd zmm30,DWORD PTR \[rdx\+0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 80[ ]*vpopcntd zmm30,DWORD PTR \[rdx-0x200\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd zmm30,DWORD PTR \[rdx-0x204\]\{1to16\}
+[ ]*[a-f0-9]+:[ ]*62 02 fd 48 55 f5[ ]*vpopcntq zmm30,zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 fd 4f 55 f5[ ]*vpopcntq zmm30\{k7\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 02 fd cf 55 f5[ ]*vpopcntq zmm30\{k7\}\{z\},zmm29
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 31[ ]*vpopcntq zmm30,ZMMWORD PTR \[rcx\]
+[ ]*[a-f0-9]+:[ ]*62 22 fd 48 55 b4 f0 34 12 00 00[ ]*vpopcntq zmm30,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 31[ ]*vpopcntq zmm30,QWORD PTR \[rcx\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 7f[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx\+0x1fc0\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 00 20 00 00[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx\+0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 80[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx-0x2000\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq zmm30,ZMMWORD PTR \[rdx-0x2040\]
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 7f[ ]*vpopcntq zmm30,QWORD PTR \[rdx\+0x3f8\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 00 04 00 00[ ]*vpopcntq zmm30,QWORD PTR \[rdx\+0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 80[ ]*vpopcntq zmm30,QWORD PTR \[rdx-0x400\]\{1to8\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq zmm30,QWORD PTR \[rdx-0x408\]\{1to8\}
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.d b/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.d
new file mode 100644
index 0000000..0926917
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.d
@@ -0,0 +1,68 @@
+#as:
+#objdump: -dw
+#name: x86_64 AVX512/VPOPCNTDQ insns
+#source: x86-64-avx512_vpopcntdq.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 55 f5[ ]*vpopcntd %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 7d 4f 55 f5[ ]*vpopcntd %zmm29,%zmm30\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 02 7d cf 55 f5[ ]*vpopcntd %zmm29,%zmm30\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 31[ ]*vpopcntd \(%rcx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 22 7d 48 55 b4 f0 23 01 00 00[ ]*vpopcntd 0x123\(%rax,%r14,8\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 31[ ]*vpopcntd \(%rcx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 7f[ ]*vpopcntd 0x1fc0\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 00 20 00 00[ ]*vpopcntd 0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 80[ ]*vpopcntd -0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd -0x2040\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 7f[ ]*vpopcntd 0x1fc\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 00 02 00 00[ ]*vpopcntd 0x200\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 80[ ]*vpopcntd -0x200\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd -0x204\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 fd 48 55 f5[ ]*vpopcntq %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 fd 4f 55 f5[ ]*vpopcntq %zmm29,%zmm30\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 02 fd cf 55 f5[ ]*vpopcntq %zmm29,%zmm30\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 31[ ]*vpopcntq \(%rcx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 22 fd 48 55 b4 f0 23 01 00 00[ ]*vpopcntq 0x123\(%rax,%r14,8\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 31[ ]*vpopcntq \(%rcx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 7f[ ]*vpopcntq 0x1fc0\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 00 20 00 00[ ]*vpopcntq 0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 80[ ]*vpopcntq -0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq -0x2040\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 7f[ ]*vpopcntq 0x3f8\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 00 04 00 00[ ]*vpopcntq 0x400\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 80[ ]*vpopcntq -0x400\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq -0x408\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 55 f5[ ]*vpopcntd %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 7d 4f 55 f5[ ]*vpopcntd %zmm29,%zmm30\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 02 7d cf 55 f5[ ]*vpopcntd %zmm29,%zmm30\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 31[ ]*vpopcntd \(%rcx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 22 7d 48 55 b4 f0 34 12 00 00[ ]*vpopcntd 0x1234\(%rax,%r14,8\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 31[ ]*vpopcntd \(%rcx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 7f[ ]*vpopcntd 0x1fc0\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 00 20 00 00[ ]*vpopcntd 0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 72 80[ ]*vpopcntd -0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 55 b2 c0 df ff ff[ ]*vpopcntd -0x2040\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 7f[ ]*vpopcntd 0x1fc\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 00 02 00 00[ ]*vpopcntd 0x200\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 72 80[ ]*vpopcntd -0x200\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 58 55 b2 fc fd ff ff[ ]*vpopcntd -0x204\(%rdx\)\{1to16\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 fd 48 55 f5[ ]*vpopcntq %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 fd 4f 55 f5[ ]*vpopcntq %zmm29,%zmm30\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 02 fd cf 55 f5[ ]*vpopcntq %zmm29,%zmm30\{%k7\}\{z\}
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 31[ ]*vpopcntq \(%rcx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 22 fd 48 55 b4 f0 34 12 00 00[ ]*vpopcntq 0x1234\(%rax,%r14,8\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 31[ ]*vpopcntq \(%rcx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 7f[ ]*vpopcntq 0x1fc0\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 00 20 00 00[ ]*vpopcntq 0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 72 80[ ]*vpopcntq -0x2000\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 48 55 b2 c0 df ff ff[ ]*vpopcntq -0x2040\(%rdx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 7f[ ]*vpopcntq 0x3f8\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 00 04 00 00[ ]*vpopcntq 0x400\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 72 80[ ]*vpopcntq -0x400\(%rdx\)\{1to8\},%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 fd 58 55 b2 f8 fb ff ff[ ]*vpopcntq -0x408\(%rdx\)\{1to8\},%zmm30
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.s b/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.s
new file mode 100644
index 0000000..06e5ad2
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-avx512_vpopcntdq.s
@@ -0,0 +1,63 @@
+# Check 64bit AVX512_VPOPCNTDQ instructions
+
+ .allow_index_reg
+ .text
+_start:
+ vpopcntd %zmm29, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd %zmm29, %zmm30{%k7} # AVX512_VPOPCNTDQ
+ vpopcntd %zmm29, %zmm30{%k7}{z} # AVX512_VPOPCNTDQ
+ vpopcntd (%rcx), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd 0x123(%rax,%r14,8), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd (%rcx){1to16}, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd 8128(%rdx), %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd 8192(%rdx), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd -8192(%rdx), %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd -8256(%rdx), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd 508(%rdx){1to16}, %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd 512(%rdx){1to16}, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntd -512(%rdx){1to16}, %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntd -516(%rdx){1to16}, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq %zmm29, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq %zmm29, %zmm30{%k7} # AVX512_VPOPCNTDQ
+ vpopcntq %zmm29, %zmm30{%k7}{z} # AVX512_VPOPCNTDQ
+ vpopcntq (%rcx), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq 0x123(%rax,%r14,8), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq (%rcx){1to8}, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq 8128(%rdx), %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq 8192(%rdx), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq -8192(%rdx), %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq -8256(%rdx), %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq 1016(%rdx){1to8}, %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq 1024(%rdx){1to8}, %zmm30 # AVX512_VPOPCNTDQ
+ vpopcntq -1024(%rdx){1to8}, %zmm30 # AVX512_VPOPCNTDQ Disp8
+ vpopcntq -1032(%rdx){1to8}, %zmm30 # AVX512_VPOPCNTDQ
+
+ .intel_syntax noprefix
+ vpopcntd zmm30, zmm29 # AVX512_VPOPCNTDQ
+ vpopcntd zmm30{k7}, zmm29 # AVX512_VPOPCNTDQ
+ vpopcntd zmm30{k7}{z}, zmm29 # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, ZMMWORD PTR [rcx] # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, [rcx]{1to16} # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, ZMMWORD PTR [rdx+8128] # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm30, ZMMWORD PTR [rdx+8192] # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, ZMMWORD PTR [rdx-8192] # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm30, ZMMWORD PTR [rdx-8256] # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, [rdx+508]{1to16} # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm30, [rdx+512]{1to16} # AVX512_VPOPCNTDQ
+ vpopcntd zmm30, [rdx-512]{1to16} # AVX512_VPOPCNTDQ Disp8
+ vpopcntd zmm30, [rdx-516]{1to16} # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, zmm29 # AVX512_VPOPCNTDQ
+ vpopcntq zmm30{k7}, zmm29 # AVX512_VPOPCNTDQ
+ vpopcntq zmm30{k7}{z}, zmm29 # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, ZMMWORD PTR [rcx] # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, [rcx]{1to8} # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, ZMMWORD PTR [rdx+8128] # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm30, ZMMWORD PTR [rdx+8192] # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, ZMMWORD PTR [rdx-8192] # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm30, ZMMWORD PTR [rdx-8256] # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, [rdx+1016]{1to8} # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm30, [rdx+1024]{1to8} # AVX512_VPOPCNTDQ
+ vpopcntq zmm30, [rdx-1024]{1to8} # AVX512_VPOPCNTDQ Disp8
+ vpopcntq zmm30, [rdx-1032]{1to8} # AVX512_VPOPCNTDQ