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authorYufeng Zhang <yufeng.zhang@arm.com>2013-05-28 16:39:51 +0000
committerYufeng Zhang <yufeng.zhang@arm.com>2013-05-28 16:39:51 +0000
commit418009c200310bee330ac27ab44cd9390a72bfef (patch)
tree305b56c3077ac97dec7e96e0c3b3b6d15e2693dd /gas
parent0a8897c77c37f8f9d688f1fb546a319b5c9c546d (diff)
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Correct the relocation names for R_AARCH64_TLSDESC_LD_PREL19 and R_AARCH64_TLSDESC_ADR_PAGE21.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog8
-rw-r--r--gas/config/tc-aarch64.c6
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/aarch64/tls.d2
-rw-r--r--gas/testsuite/gas/aarch64/tls.s2
5 files changed, 18 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6b2a166..b8fa3a5 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/tc-aarch64.c (reloc_table): Update to use
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
+ (md_apply_fix): Likewise.
+ (aarch64_force_relocation): Likewise.
+
2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/tc-arm.c (it_fsm_post_encode): Improve
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 6af526d..f462dbd 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2389,7 +2389,7 @@ static struct reloc_table_entry reloc_table[] = {
/* Get to the page containing GOT TLS entry for a symbol */
{"tlsdesc", 0,
- BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE,
+ BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21,
0,
0,
0},
@@ -6500,7 +6500,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
- case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE:
+ case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
S_SET_THREAD_LOCAL (fixP->fx_addsy);
@@ -6663,7 +6663,7 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
- case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE:
+ case BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSDESC_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
case BFD_RELOC_AARCH64_ADR_GOT_PAGE:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index bbfe39d..6bd45d5 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * gas/aarch64/tls.d: Update.
+ * gas/aarch64/tls.s: Update.
+
2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/armv8-a-bad.l: Update expected warning message.
diff --git a/gas/testsuite/gas/aarch64/tls.d b/gas/testsuite/gas/aarch64/tls.d
index 2934519..9b79c85 100644
--- a/gas/testsuite/gas/aarch64/tls.d
+++ b/gas/testsuite/gas/aarch64/tls.d
@@ -6,7 +6,7 @@ Disassembly of section \.text:
0000000000000000 <.*>:
0: 90000000 adrp x0, 0 <var>
- 0: R_AARCH64_TLSDESC_ADR_PAGE var
+ 0: R_AARCH64_TLSDESC_ADR_PAGE21 var
4: f9400001 ldr x1, \[x0\]
4: R_AARCH64_TLSDESC_LD64_LO12_NC var
8: 91000000 add x0, x0, #0x0
diff --git a/gas/testsuite/gas/aarch64/tls.s b/gas/testsuite/gas/aarch64/tls.s
index 6bf75b4..1c7025a 100644
--- a/gas/testsuite/gas/aarch64/tls.s
+++ b/gas/testsuite/gas/aarch64/tls.s
@@ -21,7 +21,7 @@
func:
- // R_AARCH64_TLSDESC_ADR_PAGE var
+ // R_AARCH64_TLSDESC_ADR_PAGE21 var
adrp x0, :tlsdesc:var
// R_AARCH64_TLSDESC_LD64_LO12 var
ldr x1, [x0, #:tlsdesc_lo12:var]