Add support for Intel SGX instructions

Add Intel SGX instructions support to assembler and disassembler.

gas/

	* config/tc-i386.c (cpu_arch): Add .se1.
	* doc/c-i386.texi: Document .se1/se1.

gas/testsuite/

	* gas/i386/i386.exp: Run SE1 tests.
	* gas/i386/se1.d: New file.
	* gas/i386/se1.s: Ditto.
	* gas/i386/x86-64-se1.d: Ditto.
	* gas/i386/x86-64-se1.s: Ditto.

opcodes/

	* i386-dis.c (rm_table): Add encls, enclu.
	* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
	(cpu_flags): Add CpuSE1.
	* i386-opc.h (enum): Add CpuSE1.
	(i386_cpu_flags): Add cpuse1.
	* i386-opc.tbl: Add encls, enclu.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

8 files changed, 57 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index c7adc4c..8ccea2e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-03  Ilya Tocar  <ilya.tocar@intel.com>
+
+	* config/tc-i386.c (cpu_arch): Add .se1.
+	* doc/c-i386.texi: Document .se1/se1.
+
 2014-04-02  DJ Delorie  <dj@redhat.com>
 
 	* config/tc-rl78.c (md_apply_fix): Add overflow warnings for
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 734935a..38857cc 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -914,6 +914,8 @@ static const arch_entry cpu_arch[] =
     CPU_XSAVES_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".prefetchwt1"), PROCESSOR_UNKNOWN,
     CPU_PREFETCHWT1_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".se1"), PROCESSOR_UNKNOWN,
+    CPU_SE1_FLAGS, 0, 0 },
 };
 
 #ifdef I386COFF
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d29e949..61b42dd 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
+
+	* gas/i386/i386.exp: Run SE1 tests.
+	* gas/i386/se1.d: New file.
+	* gas/i386/se1.s: Ditto.
+	* gas/i386/x86-64-se1.d: Ditto.
+	* gas/i386/x86-64-se1.s: Ditto.
+
 2014-03-21  David Weatherford <weath@cadence.com>
             Max Filippov <jcmvbkbc@gmail.com>
 
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 6bcf9fc..6389a07 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -276,6 +276,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "xsaves-intel"
     run_dump_test "prefetchwt1"
     run_dump_test "prefetchwt1-intel"
+    run_dump_test "se1"
     run_dump_test "disassem"
 
     # These tests require support for 8 and 16 bit relocs,
@@ -574,6 +575,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-xsaves-intel"
     run_dump_test "x86-64-prefetchwt1"
     run_dump_test "x86-64-prefetchwt1-intel"
+    run_dump_test "x86-64-se1"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/se1.d b/gas/testsuite/gas/i386/se1.d
new file mode 100644
index 0000000..ff2685c
--- /dev/null
+++ b/gas/testsuite/gas/i386/se1.d
@@ -0,0 +1,13 @@
+#objdump: -dw
+#name: i386 SE1 insns
+#source: se1.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 01 cf             	encls  
+[ 	]*[a-f0-9]+:	0f 01 d7             	enclu  
+#pass
diff --git a/gas/testsuite/gas/i386/se1.s b/gas/testsuite/gas/i386/se1.s
new file mode 100644
index 0000000..1b57ac8
--- /dev/null
+++ b/gas/testsuite/gas/i386/se1.s
@@ -0,0 +1,7 @@
+# Check SE1 new instructions.
+
+	.text
+_start:
+
+	encls
+	enclu
diff --git a/gas/testsuite/gas/i386/x86-64-se1.d b/gas/testsuite/gas/i386/x86-64-se1.d
new file mode 100644
index 0000000..29494f0
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-se1.d
@@ -0,0 +1,13 @@
+#objdump: -dw
+#name: x86-64 SE1 insns
+#source: x86-64-se1.s
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	0f 01 cf             	encls  
+[ 	]*[a-f0-9]+:	0f 01 d7             	enclu  
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-se1.s b/gas/testsuite/gas/i386/x86-64-se1.s
new file mode 100644
index 0000000..1b57ac8
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-se1.s
@@ -0,0 +1,7 @@
+# Check SE1 new instructions.
+
+	.text
+_start:
+
+	encls
+	enclu