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| author | H.J. Lu <hjl.tools@gmail.com> | 2008-02-17 00:26:19 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2008-02-17 00:26:19 +0000 |
| commit | 1fed0ba155aff29779a9746bd789c6d769c2b1fe (patch) | |
| tree | ba2ecc9a15c6b97d1cf2f8f4f2f9aa167f632d52 /gas | |
| parent | 47df48cc31644e0591eb7a1a21d579b55cce362e (diff) | |
| download | gdb-1fed0ba155aff29779a9746bd789c6d769c2b1fe.zip gdb-1fed0ba155aff29779a9746bd789c6d769c2b1fe.tar.gz gdb-1fed0ba155aff29779a9746bd789c6d769c2b1fe.tar.bz2 | |
2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_immext): Fix format.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 4 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 17 |
2 files changed, 12 insertions, 9 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 3a28e9b..56060ad 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,9 @@ 2008-02-16 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (process_immext): Fix format. + +2008-02-16 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (inoutportreg): New. (process_immext): New. (md_assemble): Use it. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 9190fcf..03360e3 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2402,20 +2402,19 @@ process_immext (void) if (i.tm.cpu_flags.bitfield.cpusse3 && i.operands > 0) { - /* SSE3 Instructions have the fixed operands with an opcode - suffix which is coded in the same place as an 8-bit immediate - field would be. Here we check those operands and remove them - afterwards. */ + /* SSE3 Instructions have the fixed operands with an opcode + suffix which is coded in the same place as an 8-bit immediate + field would be. Here we check those operands and remove them + afterwards. */ unsigned int x; for (x = 0; x < i.operands; x++) if (i.op[x].regs->reg_num != x) as_bad (_("can't use register '%s%s' as operand %d in '%s'."), - register_prefix, - i.op[x].regs->reg_name, - x + 1, - - i.tm.name); i.operands = 0; + register_prefix, i.op[x].regs->reg_name, x + 1, + i.tm.name); + + i.operands = 0; } /* These AMD 3DNow! and SSE2 Instructions have an opcode suffix |