diff options
| author | Alan Modra <amodra@gmail.com> | 2016-08-31 13:18:34 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2016-08-31 13:18:34 +0930 |
| commit | f7d69005fb97f0d90c9eb414944a5035bfd67b36 (patch) | |
| tree | 29b5bebb2f94c6c7c8cbc2fd957050514738bdb5 /gas | |
| parent | afe002dd6619560c569ac0e080cbf220c826f989 (diff) | |
| download | gdb-f7d69005fb97f0d90c9eb414944a5035bfd67b36.zip gdb-f7d69005fb97f0d90c9eb414944a5035bfd67b36.tar.gz gdb-f7d69005fb97f0d90c9eb414944a5035bfd67b36.tar.bz2 | |
PowerPC VLE sh_flags and p_flags
ELF section sh_flags SHF_PPC_VLE was being set based on arch/mach,
which meant all code sections in an object file has the flag or all
lacked it. We can do better than that. Only those code sections
where VLE is enabled ought to have the flag, allowing an object file
to contain both VLE and non-VLE code.
Also, ELF header p_flags PF_PPC_VLE wasn't being set, and segments
were being split unnecessarily.
bfd/
* elf32-ppc.c (ppc_elf_section_processing): Delete.
(elf_backend_section_processing): Don't define.
(ppc_elf_modify_segment_map): Set p_flags and mark valid. Don't
split on non-exec sections differing in SHF_PPC_VLE. When
splitting segments, mark size invalid.
gas/
* config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test
ppc_cpu rather than calling ppc_mach to determine VLE mode.
(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-ppc.c | 14 |
2 files changed, 15 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index abcdba7..11de10f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2016-08-31 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test + ppc_cpu rather than calling ppc_mach to determine VLE mode. + (ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu. + 2016-08-26 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/sparc/crypto.d: Rename invalid opcode camellia_fi diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index fc2a045..1417c26 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -3377,13 +3377,17 @@ md_assemble (char *str) however it'll remain clear for dual-mode instructions on dual-mode and, more importantly, standard-mode processors. */ if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE) - ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); + { + ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); + if (elf_section_data (now_seg) != NULL) + elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE; + } } #endif /* Write out the instruction. */ /* Differentiate between two and four byte insns. */ - if (ppc_mach () == bfd_mach_ppc_vle) + if ((ppc_cpu & PPC_OPCODE_VLE) != 0) { if (PPC_OP_SE_VLE (insn)) insn_length = 2; @@ -3400,7 +3404,7 @@ md_assemble (char *str) f = frag_more (insn_length); if (frag_now->has_code && frag_now->insn_addr != addr_mod) { - if (ppc_mach() == bfd_mach_ppc_vle) + if ((ppc_cpu & PPC_OPCODE_VLE) != 0) as_bad (_("instruction address is not a multiple of 2")); else as_bad (_("instruction address is not a multiple of 4")); @@ -6346,7 +6350,7 @@ ppc_frag_check (struct frag *fragP) if (!fragP->has_code) return; - if (ppc_mach() == bfd_mach_ppc_vle) + if ((ppc_cpu & PPC_OPCODE_VLE) != 0) { if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) as_bad (_("instruction address is not a multiple of 2")); @@ -6367,7 +6371,7 @@ ppc_handle_align (struct frag *fragP) valueT count = (fragP->fr_next->fr_address - (fragP->fr_address + fragP->fr_fix)); - if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) + if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0) { char *dest = fragP->fr_literal + fragP->fr_fix; |