MIPS: Convert cross-mode BAL to JALX

Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX,
similarly to how JAL instructions are converted.

	bfd/
	* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
	BAL to JALX.
	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
	corresponding error message.

	gas/
	* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
	Adjust comments for BAL to JALX linker conversion.
	(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
	* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
	expected.
	* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
	* testsuite/gas/mips/branch-local-4.d: New test.
	* testsuite/gas/mips/branch-local-n32-4.d: New test.
	* testsuite/gas/mips/branch-local-n64-4.d: New test.
	* testsuite/gas/mips/branch-addend.d: New test.
	* testsuite/gas/mips/branch-addend-n32.d: New test.
	* testsuite/gas/mips/branch-addend-n64.d: New test.
	* testsuite/gas/mips/branch-local-4.s: New test source.
	* testsuite/gas/mips/branch-addend.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
	messages expected.
	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
	* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
	* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
	source.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
	source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.

13 files changed, 238 insertions, 20 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 7126569..4eeafb9 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,23 @@
 2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
 
+	* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
+	Adjust comments for BAL to JALX linker conversion.
+	(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
+	* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
+	expected.
+	* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
+	* testsuite/gas/mips/branch-local-4.d: New test.
+	* testsuite/gas/mips/branch-local-n32-4.d: New test.
+	* testsuite/gas/mips/branch-local-n64-4.d: New test.
+	* testsuite/gas/mips/branch-addend.d: New test.
+	* testsuite/gas/mips/branch-addend-n32.d: New test.
+	* testsuite/gas/mips/branch-addend-n64.d: New test.
+	* testsuite/gas/mips/branch-local-4.s: New test source.
+	* testsuite/gas/mips/branch-addend.s: New test source.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
+2016-07-19  Maciej W. Rozycki  <macro@imgtec.com>
+
 	* config/tc-mips.c (mips_force_relocation): Also retain branch
 	relocations against MIPS16 and microMIPS symbols.
 	(fix_bad_cross_mode_jump_p): New function.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 57c2fe9..595e4fe 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -14803,7 +14803,7 @@ mips_force_relocation (fixS *fixp)
   /* We want to keep R_MIPS_PC26_S2, R_MIPS_PC21_S2, BFD_RELOC_16_PCREL_S2
      BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2 relocations
      against MIPS16 and microMIPS symbols so that we do cross-mode branch
-     diagnostics.  */
+     diagnostics and BAL to JALX conversion by the linker.  */
   if ((fixp->fx_r_type == R_MIPS_PC26_S2
        || fixp->fx_r_type == R_MIPS_PC21_S2
        || fixp->fx_r_type == BFD_RELOC_16_PCREL_S2
@@ -14950,7 +14950,12 @@ fix_bad_misaligned_jump_p (fixS *fixP, int shift)
 
 /* Return TRUE if the instruction pointed to by FIXP is an invalid branch
    to a symbol whose annotation indicates another ISA mode.  For absolute
-   symbols check the ISA bit instead.  */
+   symbols check the ISA bit instead.
+
+   We accept BFD_RELOC_16_PCREL_S2 relocations against MIPS16 and microMIPS
+   symbols or BFD_RELOC_MICROMIPS_16_PCREL_S1 relocations against regular
+   MIPS symbols and associated with BAL instructions as these instructions
+   may be be converted to JALX by the linker.  */
 
 static bfd_boolean
 fix_bad_cross_mode_branch_p (fixS *fixP)
@@ -14976,6 +14981,11 @@ fix_bad_cross_mode_branch_p (fixS *fixP)
   switch (fixP->fx_r_type)
     {
     case BFD_RELOC_16_PCREL_S2:
+      return ((absolute_p ? val & 1 : ELF_ST_IS_COMPRESSED (other))
+	      && opcode != 0x0411);
+    case BFD_RELOC_MICROMIPS_16_PCREL_S1:
+      return ((absolute_p ? !(val & 1) : !ELF_ST_IS_MICROMIPS (other))
+	      && opcode != 0x4060);
     case BFD_RELOC_MIPS_21_PCREL_S2:
     case BFD_RELOC_MIPS_26_PCREL_S2:
       return absolute_p ? val & 1 : ELF_ST_IS_COMPRESSED (other);
@@ -14983,7 +14993,6 @@ fix_bad_cross_mode_branch_p (fixS *fixP)
       return absolute_p ? !(val & 1) : !ELF_ST_IS_MIPS16 (other);
     case BFD_RELOC_MICROMIPS_7_PCREL_S1:
     case BFD_RELOC_MICROMIPS_10_PCREL_S1:
-    case BFD_RELOC_MICROMIPS_16_PCREL_S1:
       return absolute_p ? !(val & 1) : !ELF_ST_IS_MICROMIPS (other);
     default:
       abort ();
@@ -17463,7 +17472,8 @@ mips_fix_adjustable (fixS *fixp)
 	  R_MICROMIPS_PC16_S1, R_MICROMIPS_PC10_S1 or R_MICROMIPS_PC7_S1)
 	  against MIPS16 or microMIPS symbols because we need to keep the
 	  MIPS16 or microMIPS symbol for the purpose of mode mismatch
-	  detection and JAL to JALX instruction conversion in the linker.
+	  detection and JAL or BAL to JALX instruction conversion in the
+	  linker.
 
      For simplicity, we deal with (3)-(4) by not reducing _any_ relocation
      against a MIPS16 symbol.  We deal with (5) by additionally leaving
diff --git a/gas/testsuite/gas/mips/branch-addend-n32.d b/gas/testsuite/gas/mips/branch-addend-n32.d
new file mode 100644
index 0000000..c0e87de
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-addend-n32.d
@@ -0,0 +1,23 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS BAL addend encoding (n32)
+#as: -n32 -march=from-abi
+#source: branch-addend.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+	\.\.\.
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 001f 0f3c 	jr	ra
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 0000 0000 	nop
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04110000 	bal	00001018 <bar\+0x8>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	foo\+0x1fffc
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04110000 	bal	00001020 <bar\+0x10>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	bar\+0x1fffc
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 03e00009 	jalr	zero,ra
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-addend-n64.d b/gas/testsuite/gas/mips/branch-addend-n64.d
new file mode 100644
index 0000000..46c9c37
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-addend-n64.d
@@ -0,0 +1,27 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS BAL addend encoding (n64)
+#as: -64 -march=from-abi
+#source: branch-addend.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+	\.\.\.
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 001f 0f3c 	jr	ra
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 0000 0000 	nop
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04110000 	bal	0000000000001018 <bar\+0x8>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	foo\+0x1fffc
+[ 	]*[0-9a-f]+: R_MIPS_NONE	\*ABS\*\+0x1fffc
+[ 	]*[0-9a-f]+: R_MIPS_NONE	\*ABS\*\+0x1fffc
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04110000 	bal	0000000000001020 <bar\+0x10>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	bar\+0x1fffc
+[ 	]*[0-9a-f]+: R_MIPS_NONE	\*ABS\*\+0x1fffc
+[ 	]*[0-9a-f]+: R_MIPS_NONE	\*ABS\*\+0x1fffc
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 03e00009 	jalr	zero,ra
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-addend.d b/gas/testsuite/gas/mips/branch-addend.d
new file mode 100644
index 0000000..ecee734
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-addend.d
@@ -0,0 +1,22 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS BAL addend encoding
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+	\.\.\.
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 001f 0f3c 	jr	ra
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 0000 0000 	nop
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04117fff 	bal	00021014 <bar\+0x20004>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	foo
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04117fff 	bal	0002101c <bar\+0x2000c>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	bar
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 03e00009 	jalr	zero,ra
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-addend.s b/gas/testsuite/gas/mips/branch-addend.s
new file mode 100644
index 0000000..f600b36
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-addend.s
@@ -0,0 +1,31 @@
+	.text
+	.set	noreorder
+	.space	0x1000
+
+	.align	4
+	.set	micromips
+	.globl	foo
+	.ent	foo
+foo:
+	nor	$0, $0
+	jalr	$0, $ra
+	 nor	$0, $0
+	.end	foo
+
+	.align	4
+	.set	nomicromips
+	.globl	bar
+	.ent	bar
+bar:
+	nor	$0, $0
+	bal	foo + 0x20000
+	 nor	$0, $0
+	bal	bar + 0x20000
+	 nor	$0, $0
+	jalr	$0, $ra
+	 nor	$0, $0
+	.end	bar
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/branch-local-4.d b/gas/testsuite/gas/mips/branch-local-4.d
new file mode 100644
index 0000000..cf5f8b3
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-local-4.d
@@ -0,0 +1,20 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS branch local symbol relocation 4
+#as: -32
+#source: branch-local-4.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+	\.\.\.
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 001f 0f3c 	jr	ra
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 0000 0000 	nop
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 0411ffff 	bal	00001014 <bar\+0x4>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	foo
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 03e00009 	jalr	zero,ra
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-local-4.s b/gas/testsuite/gas/mips/branch-local-4.s
new file mode 100644
index 0000000..c241dd3
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-local-4.s
@@ -0,0 +1,27 @@
+	.text
+	.set	noreorder
+	.space	0x1000
+
+	.align	4
+	.set	micromips
+	.ent	foo
+foo:
+	nor	$0, $0
+	jalr	$0, $ra
+	 nor	$0, $0
+	.end	foo
+
+	.align	4
+	.set	nomicromips
+	.ent	bar
+bar:
+	nor	$0, $0
+	bal	foo
+	 nor	$0, $0
+	jalr	$0, $ra
+	 nor	$0, $0
+	.end	bar
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.align	4, 0
+	.space	16
diff --git a/gas/testsuite/gas/mips/branch-local-n32-4.d b/gas/testsuite/gas/mips/branch-local-n32-4.d
new file mode 100644
index 0000000..3fc7e5e
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-local-n32-4.d
@@ -0,0 +1,20 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS branch local symbol relocation 4 (n32)
+#as: -n32 -march=from-abi
+#source: branch-local-4.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+	\.\.\.
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 001f 0f3c 	jr	ra
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 0000 0000 	nop
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04110000 	bal	00001018 <bar\+0x8>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	foo-0x4
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 03e00009 	jalr	zero,ra
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-local-n64-4.d b/gas/testsuite/gas/mips/branch-local-n64-4.d
new file mode 100644
index 0000000..0e39753
--- /dev/null
+++ b/gas/testsuite/gas/mips/branch-local-n64-4.d
@@ -0,0 +1,22 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS branch local symbol relocation 4 (n64)
+#as: -64 -march=from-abi
+#source: branch-local-4.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+	\.\.\.
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 001f 0f3c 	jr	ra
+[0-9a-f]+ <[^>]*> 0000 02d0 	not	zero,zero
+[0-9a-f]+ <[^>]*> 0000 0000 	nop
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 04110000 	bal	0000000000001018 <bar\+0x8>
+[ 	]*[0-9a-f]+: R_MIPS_PC16	foo-0x4
+[ 	]*[0-9a-f]+: R_MIPS_NONE	\*ABS\*-0x4
+[ 	]*[0-9a-f]+: R_MIPS_NONE	\*ABS\*-0x4
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+[0-9a-f]+ <[^>]*> 03e00009 	jalr	zero,ra
+[0-9a-f]+ <[^>]*> 00000027 	nor	zero,zero,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 80e598a..9e896f5 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -611,17 +611,25 @@ if { [istarget mips*-*-vxworks*] } {
 				"MIPS branch local symbol relocation 2"
     run_list_test "branch-local-3" "-32" \
 				"MIPS branch local symbol relocation 3"
+    run_dump_test "branch-local-4"
     if $has_newabi {
 	run_dump_test "branch-local-n32-1"
 	run_list_test "branch-local-n32-2" "-n32 -march=from-abi" \
 				"MIPS branch local symbol relocation 2 (n32)"
 	run_list_test "branch-local-n32-3" "-n32 -march=from-abi" \
 				"MIPS branch local symbol relocation 3 (n32)"
+	run_dump_test "branch-local-n32-4"
 	run_dump_test "branch-local-n64-1"
 	run_list_test "branch-local-n64-2" "-64 -march=from-abi" \
 				"MIPS branch local symbol relocation 2 (n64)"
 	run_list_test "branch-local-n64-3" "-64 -march=from-abi" \
 				"MIPS branch local symbol relocation 3 (n64)"
+	run_dump_test "branch-local-n64-4"
+    }
+    run_dump_test "branch-addend"
+    if $has_newabi {
+	run_dump_test "branch-addend-n32"
+	run_dump_test "branch-addend-n64"
     }
     run_dump_test "branch-absolute"
     run_dump_test "branch-absolute-addend"
diff --git a/gas/testsuite/gas/mips/unaligned-branch-1.l b/gas/testsuite/gas/mips/unaligned-branch-1.l
index beaab28..118e06c 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-1.l
+++ b/gas/testsuite/gas/mips/unaligned-branch-1.l
@@ -17,24 +17,21 @@
 .*:51: Error: branch to misaligned address \(0x11a7\)
 .*:53: Error: branch to misaligned address \(0x11a7\)
 .*:55: Error: branch to misaligned address \(0x11a7\)
-.*:63: Error: branch to a symbol in another ISA mode
 .*:65: Error: branch to a symbol in another ISA mode
 .*:67: Error: branch to a symbol in another ISA mode
-.*:69: Error: branch to a symbol in another ISA mode
+.*:69: Error: branch to misaligned address \(0x11b2\)
 .*:71: Error: branch to a symbol in another ISA mode
 .*:73: Error: branch to a symbol in another ISA mode
-.*:75: Error: branch to a symbol in another ISA mode
 .*:77: Error: branch to a symbol in another ISA mode
 .*:79: Error: branch to a symbol in another ISA mode
-.*:81: Error: branch to a symbol in another ISA mode
+.*:81: Error: branch to misaligned address \(0x11b5\)
 .*:83: Error: branch to a symbol in another ISA mode
 .*:85: Error: branch to a symbol in another ISA mode
-.*:87: Error: branch to a symbol in another ISA mode
+.*:87: Error: branch to misaligned address \(0x11b6\)
 .*:89: Error: branch to a symbol in another ISA mode
 .*:91: Error: branch to a symbol in another ISA mode
-.*:93: Error: branch to a symbol in another ISA mode
+.*:93: Error: branch to misaligned address \(0x11b7\)
 .*:95: Error: branch to a symbol in another ISA mode
 .*:97: Error: branch to a symbol in another ISA mode
-.*:99: Error: branch to a symbol in another ISA mode
 .*:101: Error: branch to a symbol in another ISA mode
 .*:103: Error: branch to a symbol in another ISA mode
diff --git a/gas/testsuite/gas/mips/unaligned-branch-micromips-1.l b/gas/testsuite/gas/mips/unaligned-branch-micromips-1.l
index 365a4bc..7e43ea2 100644
--- a/gas/testsuite/gas/mips/unaligned-branch-micromips-1.l
+++ b/gas/testsuite/gas/mips/unaligned-branch-micromips-1.l
@@ -1,13 +1,6 @@
 .*: Assembler messages:
-.*:10: Error: branch to a symbol in another ISA mode
-.*:12: Error: branch to a symbol in another ISA mode
-.*:14: Error: branch to a symbol in another ISA mode
-.*:16: Error: branch to a symbol in another ISA mode
-.*:18: Error: branch to a symbol in another ISA mode
-.*:20: Error: branch to a symbol in another ISA mode
-.*:22: Error: branch to a symbol in another ISA mode
-.*:24: Error: branch to a symbol in another ISA mode
-.*:26: Error: branch to a symbol in another ISA mode
+.*:20: Error: branch to misaligned address \(0x11e5\)
+.*:24: Error: branch to misaligned address \(0x11e7\)
 .*:34: Error: branch to misaligned address \(0x11f5\)
 .*:38: Error: branch to misaligned address \(0x11f7\)
 .*:42: Error: branch to a symbol in another ISA mode