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author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-06-14 21:48:11 +0100 |
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committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-06-15 09:01:48 +0100 |
commit | 02f3be19f6fca3a46794f8f32350cc090ac38d0e (patch) | |
tree | d82f2c8e7a521dcd148b248cc1a3af18f9356e8a /gas | |
parent | 31eef93e717c59975b3e6f37619ab956302ca37a (diff) | |
download | gdb-02f3be19f6fca3a46794f8f32350cc090ac38d0e.zip gdb-02f3be19f6fca3a46794f8f32350cc090ac38d0e.tar.gz gdb-02f3be19f6fca3a46794f8f32350cc090ac38d0e.tar.bz2 |
opcodes/arc: Fix extract for some add_s instructions
The extract function used for some arc_s instructions was not
implemented, and instead always returned 0. Fixed in this commit.
opcodes/ChangeLog:
* arc-opc.c (extract_rhv1): Extract value from insn.
gas/ChangeLog:
* testsuite/gas/arc/add_s.d: New file.
* testsuite/gas/arc/add_s.s: New file.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/arc/add_s.d | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/arc/add_s.s | 4 |
3 files changed, 17 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index df77393..eba7ddf 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2016-06-15 Andrew Burgess <andrew.burgess@embecosm.com> + + * testsuite/gas/arc/add_s.d: New file. + * testsuite/gas/arc/add_s.s: New file. + 2016-06-14 Graham Markall <graham.markall@embecosm.com> * testsuite/gas/arc/nps400-6.s: Add tests of ldbit. diff --git a/gas/testsuite/gas/arc/add_s.d b/gas/testsuite/gas/arc/add_s.d new file mode 100644 index 0000000..31b60e4 --- /dev/null +++ b/gas/testsuite/gas/arc/add_s.d @@ -0,0 +1,8 @@ +#as: -mcpu=arc700 +#objdump: -dr --prefix-addresses --show-raw-insn + +.*: +file format .*arc.* + +Disassembly of section .text: +0x[0-9a-f]+ 6178 add_s r0,r1,r3 +0x[0-9a-f]+ 70e7 add_s r0,r0,pcl diff --git a/gas/testsuite/gas/arc/add_s.s b/gas/testsuite/gas/arc/add_s.s new file mode 100644 index 0000000..71b60f8 --- /dev/null +++ b/gas/testsuite/gas/arc/add_s.s @@ -0,0 +1,4 @@ +# add_s test + + add_s r0,r1,r3 + add_s r0,r0,pcl |