Add R_386_GOT32X support to gas and ld

This patch adds support for the R_386_GOT32X relocation proposed in

https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I

to gas and ld.  It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)].  We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax".  With the locally defined symbol, foo,
we convert

   mov foo@GOT[(%reg1)], %reg2
to
   lea foo[@GOTOFF(%reg1)], %reg2

and convert

   call/jmp *foo@GOT[(%reg)]
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg1, foo@GOT[(%reg2)]
to
   test $foo, %reg1

and convert

binop foo@GOT[(%reg1)], %reg2

to

binop $foo, %reg2

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf32-i386.c: Include opcode/i386.h.
	(elf_howto_table): Add R_386_GOT32X.
	(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
	(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_i386_check_relocs): Handle R_386_GOT32X.  Replace
	need_convert_mov_to_lea with need_convert_load.
	(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_convert_mov_to_lea): Renamed to ...
	(elf_i386_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_386_GOT32X transformations.
	* reloc.c (BFD_RELOC_386_GOT32X): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_386_GOT32X.
	(tc_gen_reloc): Likewise.
	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
	"test %reg, mem" and "binop mem, %reg" where binop is one of
	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
	BFD_RELOC_386_GOT32X should be generated.
	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
	is set.

gas/testsuite/

	* gas/i386/got.d: New file.
	* gas/i386/got.s: Likewise.
	* gas/i386/i386.exp: Run got.
	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
	* gas/i386/mixed-mode-reloc32.d: Likewise.
	* gas/i386/reloc32.d: Likewise.

include/elf/

	* i386.h (R_386_GOT32X): New relocation.

ld/testsuite/

	* ld-i386/branch1.d: New file.
	* ld-i386/branch1.s: Likewise.
	* ld-i386/call1.d: Likewise.
	* ld-i386/call1.s: Likewise.
	* ld-i386/call2.d: Likewise.
	* ld-i386/call2.s: Likewise.
	* ld-i386/got1.dd: Likewise.
	* ld-i386/got1.out: Likewise.
	* ld-i386/got1a.S: Likewise.
	* ld-i386/got1b.c: Likewise.
	* ld-i386/got1c.c: Likewise.
	* ld-i386/got1d.S: Likewise.
	* ld-i386/jmp1.d: Likewise.
	* ld-i386/jmp1.s: Likewise.
	* ld-i386/jmp2.d: Likewise.
	* ld-i386/jmp2.s: Likewise.
	* ld-i386/load1.d: Likewise.
	* ld-i386/load1.s: Likewise.
	* ld-i386/load2.d: Likewise.
	* ld-i386/load2.s: Likewise.
	* ld-i386/load3.d: Likewise.
	* ld-i386/load3.s: Likewise.
	* ld-i386/load4.s: Likewise.
	* ld-i386/load4a.d: Likewise.
	* ld-i386/load4b.d: Likewise.
	* ld-i386/load5.s: Likewise.
	* ld-i386/load5a.d: Likewise.
	* ld-i386/load5b.d: Likewise.
	* ld-i386/load6.d: Likewise.
	* ld-i386/load6.s: Likewise.
	* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
	load1, load2, load3, load4a, load4b, load5a, load5b and load6
	tests.  Run got1 test.

9 files changed, 151 insertions, 19 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 4c8af4c..d2d0da4 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,17 @@
+2015-10-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
+	BFD_RELOC_386_GOT32X.
+	(tc_gen_reloc): Likewise.
+	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
+	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
+	"test %reg, mem" and "binop mem, %reg" where binop is one of
+	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
+	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
+	BFD_RELOC_386_GOT32X should be generated.
+	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
+	is set.
+
 2015-10-21  Nick Clifton  <nickc@redhat.com>
 
 	PR gas/19109
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index b5c27ee..dd1a41b 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2928,6 +2928,7 @@ tc_i386_fix_adjustable (fixS *fixP ATTRIBUTE_UNUSED)
       || fixP->fx_r_type == BFD_RELOC_386_GOTOFF
       || fixP->fx_r_type == BFD_RELOC_386_PLT32
       || fixP->fx_r_type == BFD_RELOC_386_GOT32
+      || fixP->fx_r_type == BFD_RELOC_386_GOT32X
       || fixP->fx_r_type == BFD_RELOC_386_TLS_GD
       || fixP->fx_r_type == BFD_RELOC_386_TLS_LDM
       || fixP->fx_r_type == BFD_RELOC_386_TLS_LDO_32
@@ -4791,6 +4792,10 @@ match_template (void)
 	    }
 	  }
 
+      /* Force 0x8b encoding for "mov foo@GOT, %eax".  */
+      if (i.reloc[0] == BFD_RELOC_386_GOT32 && t->base_opcode == 0xa0)
+	continue;
+
       /* We check register size if needed.  */
       check_register = t->opcode_modifier.checkregsize;
       overlap0 = operand_type_and (i.types[0], operand_types[0]);
@@ -7157,6 +7162,7 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
 	      int size = disp_size (n);
 	      int sign = i.types[n].bitfield.disp32s;
 	      int pcrel = (i.flags[n] & Operand_PCrel) != 0;
+	      fixS *fixP;
 
 	      /* We can't have 8 bit displacement here.  */
 	      gas_assert (!i.types[n].bitfield.disp8);
@@ -7225,8 +7231,34 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off)
 		       insn, and that is taken care of in other code.  */
 		    reloc_type = BFD_RELOC_X86_64_GOTPC32;
 		}
-	      fix_new_exp (frag_now, p - frag_now->fr_literal, size,
-			   i.op[n].disps, pcrel, reloc_type);
+	      fixP = fix_new_exp (frag_now, p - frag_now->fr_literal,
+				  size, i.op[n].disps, pcrel,
+				  reloc_type);
+	      /* Check for "call/jmp *mem", "mov mem, %reg",
+		 "test %reg, mem" and "binop mem, %reg" where binop
+		 is one of adc, add, and, cmp, or, sbb, sub, xor
+		 instructions.  */
+	      if ((i.rm.mode == 2
+		   || (i.rm.mode == 0 && i.rm.regmem == 5))
+		  && ((i.operands == 1
+		       && i.tm.base_opcode == 0xff
+		       && (i.rm.reg == 2 || i.rm.reg == 4))
+		      || (i.operands == 2
+			  && (i.tm.base_opcode == 0x8b
+			      || i.tm.base_opcode == 0x85
+			      || (i.tm.base_opcode & 0xc7) == 0x03))))
+		{
+		  if (object_64bit)
+		    {
+		      fixP->fx_tcbit = i.rex != 0;
+		      if (i.base_reg
+			  && (i.base_reg->reg_num == RegRip
+			      || i.base_reg->reg_num == RegEip))
+		      fixP->fx_tcbit2 = 1;
+		    }
+		  else
+		    fixP->fx_tcbit2 = 1;
+		}
 	    }
 	}
     }
@@ -10321,23 +10353,39 @@ s_bss (int ignore ATTRIBUTE_UNUSED)
 void
 i386_validate_fix (fixS *fixp)
 {
-  if (fixp->fx_subsy && fixp->fx_subsy == GOT_symbol)
+  if (fixp->fx_subsy)
     {
-      if (fixp->fx_r_type == BFD_RELOC_32_PCREL)
-	{
-	  if (!object_64bit)
-	    abort ();
-	  fixp->fx_r_type = BFD_RELOC_X86_64_GOTPCREL;
-	}
-      else
+      if (fixp->fx_subsy == GOT_symbol)
 	{
-	  if (!object_64bit)
-	    fixp->fx_r_type = BFD_RELOC_386_GOTOFF;
+	  if (fixp->fx_r_type == BFD_RELOC_32_PCREL)
+	    {
+	      if (!object_64bit)
+		abort ();
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+	      if (fixp->fx_tcbit2)
+		fixp->fx_r_type = BFD_RELOC_X86_64_GOTPCREL;
+	      else
+#endif
+		fixp->fx_r_type = BFD_RELOC_X86_64_GOTPCREL;
+	    }
 	  else
-	    fixp->fx_r_type = BFD_RELOC_X86_64_GOTOFF64;
+	    {
+	      if (!object_64bit)
+		fixp->fx_r_type = BFD_RELOC_386_GOTOFF;
+	      else
+		fixp->fx_r_type = BFD_RELOC_X86_64_GOTOFF64;
+	    }
+	  fixp->fx_subsy = 0;
 	}
-      fixp->fx_subsy = 0;
     }
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+  else if (!object_64bit)
+    {
+      if (fixp->fx_r_type == BFD_RELOC_386_GOT32
+	  && fixp->fx_tcbit2)
+	fixp->fx_r_type = BFD_RELOC_386_GOT32X;
+    }
+#endif
 }
 
 arelent *
@@ -10373,6 +10421,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
     case BFD_RELOC_X86_64_GOTPCREL:
     case BFD_RELOC_386_PLT32:
     case BFD_RELOC_386_GOT32:
+    case BFD_RELOC_386_GOT32X:
     case BFD_RELOC_386_GOTOFF:
     case BFD_RELOC_386_GOTPC:
     case BFD_RELOC_386_TLS_GD:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index fd3d479..d149faa 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2015-10-22  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gas/i386/got.d: New file.
+	* gas/i386/got.s: Likewise.
+	* gas/i386/i386.exp: Run got.
+	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
+	* gas/i386/mixed-mode-reloc32.d: Likewise.
+	* gas/i386/reloc32.d: Likewise.
+
 2015-10-22  Alan Modra  <amodra@gmail.com>
 
 	PR gas/18500
diff --git a/gas/testsuite/gas/i386/got.d b/gas/testsuite/gas/i386/got.d
new file mode 100644
index 0000000..f76ca47
--- /dev/null
+++ b/gas/testsuite/gas/i386/got.d
@@ -0,0 +1,29 @@
+#objdump: -dwr
+
+.*: +file format .*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	b8 00 00 00 00       	mov    \$0x0,%eax	1: R_386_GOT32	foo
+[ 	]*[a-f0-9]+:	8b 05 00 00 00 00    	mov    0x0,%eax	7: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	8b 80 00 00 00 00    	mov    0x0\(%eax\),%eax	d: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	05 00 00 00 00       	add    \$0x0,%eax	12: R_386_GOT32	foo
+[ 	]*[a-f0-9]+:	03 05 00 00 00 00    	add    0x0,%eax	18: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	03 80 00 00 00 00    	add    0x0\(%eax\),%eax	1e: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff 15 00 00 00 00    	call   \*0x0	24: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff 90 00 00 00 00    	call   \*0x0\(%eax\)	2a: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff 25 00 00 00 00    	jmp    \*0x0	30: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff a0 00 00 00 00    	jmp    \*0x0\(%eax\)	36: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	b8 00 00 00 00       	mov    \$0x0,%eax	3b: R_386_GOT32	foo
+[ 	]*[a-f0-9]+:	8b 05 00 00 00 00    	mov    0x0,%eax	41: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	8b 80 00 00 00 00    	mov    0x0\(%eax\),%eax	47: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	05 00 00 00 00       	add    \$0x0,%eax	4c: R_386_GOT32	foo
+[ 	]*[a-f0-9]+:	03 05 00 00 00 00    	add    0x0,%eax	52: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	03 80 00 00 00 00    	add    0x0\(%eax\),%eax	58: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff 90 00 00 00 00    	call   \*0x0\(%eax\)	5e: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff 15 00 00 00 00    	call   \*0x0	64: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff a0 00 00 00 00    	jmp    \*0x0\(%eax\)	6a: R_386_GOT32X	foo
+[ 	]*[a-f0-9]+:	ff 25 00 00 00 00    	jmp    \*0x0	70: R_386_GOT32X	foo
+#pass
diff --git a/gas/testsuite/gas/i386/got.s b/gas/testsuite/gas/i386/got.s
new file mode 100644
index 0000000..10fa881
--- /dev/null
+++ b/gas/testsuite/gas/i386/got.s
@@ -0,0 +1,29 @@
+	.text
+_start:
+	movl	$foo@GOT, %eax
+	movl	foo@GOT, %eax
+	movl	foo@GOT(%eax), %eax
+
+	addl	$foo@GOT, %eax
+	addl	foo@GOT, %eax
+	addl	foo@GOT(%eax), %eax
+
+	call	*foo@GOT
+	call	*foo@GOT(%eax)
+	jmp	*foo@GOT
+	jmp	*foo@GOT(%eax)
+
+	.intel_syntax noprefix
+
+	mov	eax, offset foo@got
+	mov	eax, DWORD PTR [foo@GOT]
+	mov	eax, DWORD PTR [eax + foo@GOT]
+
+	add	eax, offset foo@got
+	add	eax, DWORD PTR [foo@GOT]
+	add	eax, DWORD PTR [eax + foo@GOT]
+
+	call	DWORD PTR [eax + foo@GOT]
+	call	DWORD PTR [foo@GOT]
+	jmp	DWORD PTR [eax + foo@GOT]
+	jmp	DWORD PTR [foo@GOT]
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index f59b598..8c374f2 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -404,6 +404,8 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
 	run_dump_test "relax-3"
 	run_dump_test "relax-4"
 
+	run_dump_test "got"
+
 	if {![istarget "*-*-nacl*"]} then {
 	    run_dump_test "iamcu-1"
 	    run_dump_test "iamcu-2"
diff --git a/gas/testsuite/gas/i386/localpic.d b/gas/testsuite/gas/i386/localpic.d
index 93ac871..04fb5ce 100644
--- a/gas/testsuite/gas/i386/localpic.d
+++ b/gas/testsuite/gas/i386/localpic.d
@@ -3,7 +3,7 @@
 
 Relocation section '.rel.text' at offset 0x[0-9a-f]+ contains 1 entries:
  Offset     Info    Type            Sym.Value  Sym. Name
-[0-9a-f]+ +[0-9a-f]+ R_386_GOT32 +[0-9a-f]+ +foo
+[0-9a-f]+ +[0-9a-f]+ R_386_GOT32X +[0-9a-f]+ +foo
 #...
  +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +NOTYPE +LOCAL +DEFAULT +[0-9]+ +foo
 #pass
diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc32.d b/gas/testsuite/gas/i386/mixed-mode-reloc32.d
index 6bc52f7..9affc36 100644
--- a/gas/testsuite/gas/i386/mixed-mode-reloc32.d
+++ b/gas/testsuite/gas/i386/mixed-mode-reloc32.d
@@ -6,9 +6,9 @@
 
 RELOCATION RECORDS FOR \[.text\]:
 OFFSET[ 	]+TYPE[ 	]+VALUE[ 	]*
-[0-9a-f]+[ 	]+R_386_GOT32[ 	]+xtrn[ 	]*
+[0-9a-f]+[ 	]+R_386_GOT32X[ 	]+xtrn[ 	]*
 [0-9a-f]+[ 	]+R_386_PLT32[ 	]+xtrn[ 	]*
-[0-9a-f]+[ 	]+R_386_GOT32[ 	]+xtrn[ 	]*
+[0-9a-f]+[ 	]+R_386_GOT32X[ 	]+xtrn[ 	]*
 [0-9a-f]+[ 	]+R_386_PLT32[ 	]+xtrn[ 	]*
-[0-9a-f]+[ 	]+R_386_GOT32[ 	]+xtrn[ 	]*
+[0-9a-f]+[ 	]+R_386_GOT32X[ 	]+xtrn[ 	]*
 [0-9a-f]+[ 	]+R_386_PLT32[ 	]+xtrn[ 	]*
diff --git a/gas/testsuite/gas/i386/reloc32.d b/gas/testsuite/gas/i386/reloc32.d
index cbd71d6..45c9cd2 100644
--- a/gas/testsuite/gas/i386/reloc32.d
+++ b/gas/testsuite/gas/i386/reloc32.d
@@ -18,7 +18,7 @@ Disassembly of section \.text:
 .*[ 	]+R_386_PC32[ 	]+xtrn
 .*[ 	]+R_386_PC8[ 	]+xtrn
 .*[ 	]+R_386_GOT32[ 	]+xtrn
-.*[ 	]+R_386_GOT32[ 	]+xtrn
+.*[ 	]+R_386_GOT32X[ 	]+xtrn
 .*[ 	]+R_386_GOTOFF[ 	]+xtrn
 .*[ 	]+R_386_GOTOFF[ 	]+xtrn
 .*[ 	]+R_386_GOTPC[ 	]+_GLOBAL_OFFSET_TABLE_