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| author | Jim Wilson <wilson@tuliptree.org> | 2004-07-04 00:29:21 +0000 |
|---|---|---|
| committer | Jim Wilson <wilson@tuliptree.org> | 2004-07-04 00:29:21 +0000 |
| commit | 5a9ff93dab6b113db2b37fcea9e0937fae1ae41d (patch) | |
| tree | 9ee8d9812a6aa5f3157967626032097ff6f2c079 /gas | |
| parent | 2405c5d661781d27b766f8889d2e2fa960d2d0c6 (diff) | |
| download | gdb-5a9ff93dab6b113db2b37fcea9e0937fae1ae41d.zip gdb-5a9ff93dab6b113db2b37fcea9e0937fae1ae41d.tar.gz gdb-5a9ff93dab6b113db2b37fcea9e0937fae1ae41d.tar.bz2 | |
Emit error for unaligned instructions.
* config/tc-ia64.c (emit_one_bundle): Check and set insn_addr.
* config/tc-ia64.h (md_frag_check): Define.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-ia64.c | 9 | ||||
| -rw-r--r-- | gas/config/tc-ia64.h | 8 |
3 files changed, 22 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index f02d2a8..86101d4 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2004-07-03 James E Wilson <wilson@specifixinc.com> + + * config/tc-ia64.c (emit_one_bundle): Check and set insn_addr. + * config/tc-ia64.h (md_frag_check): Define. + 2004-07-03 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com> * config/obj-coff.c (obj_coff_weak): New .weak syntax for PE weak diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c index 3d153ae..74ee215 100644 --- a/gas/config/tc-ia64.c +++ b/gas/config/tc-ia64.c @@ -6129,6 +6129,7 @@ emit_one_bundle () char mnemonic[16]; fixS *fix; char *f; + int addr_mod; first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; know (first >= 0 & first < NUM_SLOTS); @@ -6160,6 +6161,14 @@ emit_one_bundle () f = frag_more (16); + /* Check to see if this bundle is at an offset that is a multiple of 16-bytes + from the start of the frag. */ + addr_mod = frag_now_fix () & 15; + if (frag_now->has_code && frag_now->insn_addr != addr_mod) + as_bad (_("instruction address is not a multiple of 16")); + frag_now->insn_addr = addr_mod; + frag_now->has_code = 1; + /* now fill in slots with as many insns as possible: */ curr = first; idesc = md.slot[curr].idesc; diff --git a/gas/config/tc-ia64.h b/gas/config/tc-ia64.h index dcc2c29..f626c46 100644 --- a/gas/config/tc-ia64.h +++ b/gas/config/tc-ia64.h @@ -158,6 +158,14 @@ extern void ia64_convert_frag (fragS *); #define TC_FRAG_TYPE int #define TC_FRAG_INIT(FRAGP) do {(FRAGP)->tc_frag_data = 0;}while (0) +/* Give an error if a frag containing code is not aligned to a 16 byte + boundary. */ +#define md_frag_check(FRAGP) \ + if ((FRAGP)->has_code \ + && (((FRAGP)->fr_address + (FRAGP)->insn_addr) & 15) != 0) \ + as_bad_where ((FRAGP)->fr_file, (FRAGP)->fr_line, \ + _("instruction address is not a multiple of 16")); + #define MAX_MEM_FOR_RS_ALIGN_CODE (15 + 16) #define WORKING_DOT_WORD /* don't do broken word processing for now */ |