diff options
author | Nick Clifton <nickc@redhat.com> | 2000-04-08 00:11:46 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2000-04-08 00:11:46 +0000 |
commit | d92b1a8a2a1a736a4c5c125928dbab47a47551fc (patch) | |
tree | e09fd143bb223eeae8c4065a5107a5a399c4092b /gas | |
parent | dfc5f959f382fb049adadf27a404131680d0e8d7 (diff) | |
download | gdb-d92b1a8a2a1a736a4c5c125928dbab47a47551fc.zip gdb-d92b1a8a2a1a736a4c5c125928dbab47a47551fc.tar.gz gdb-d92b1a8a2a1a736a4c5c125928dbab47a47551fc.tar.bz2 |
Add support for BFD_RELOC_{ARM|THUMB}_PCREL_BLX relocs.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 9 | ||||
-rw-r--r-- | gas/config/tc-arm.c | 26 |
2 files changed, 34 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index c6467ba..6d19a08 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2000-04-07 Nick Clifton <nickc@cygnus.com> + + * config/tc-arm.c (md_apply_fix3): Treat BFD_RELOC_ARM_PCREL_BLX + in the same way as BFD_RELOC_ARM_PCREL_BRANCH, and + BFD_RELOC_THUMB_PCREL_BLX lie BFD_RELOC_THUMB_PCREL_BRANCH. + (tc_gen_reloc): Accept BFD_RELOC_{ARM|THUMB}_PCREL_BLX. + (arm_force_relocation): Force relocations for + BFD_RELOC_{ARM|THUMB}_PCREL_BLX as well. + Wed Apr 5 22:26:32 2000 J"orn Rennecke <amylaar@cygnus.co.uk> * config/tc-sh.c (get_operands): There's no third operand if the diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 4779b3d..53c6b2f 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -2661,8 +2661,8 @@ do_adr (str, flags) inst.reloc.exp.X_add_number -= 8; /* PC relative adjust. */ inst.reloc.pc_rel = 1; inst.instruction |= flags; + end_of_line (str); - return; } static void @@ -5370,6 +5370,7 @@ md_apply_fix3 (fixP, val, seg) { if (target_oabi && (fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BRANCH + || fixP->fx_r_type == BFD_RELOC_ARM_PCREL_BLX )) value = 0; else @@ -5617,6 +5618,22 @@ md_apply_fix3 (fixP, val, seg) md_number_to_chars (buf, newval, INSN_SIZE); break; + case BFD_RELOC_ARM_PCREL_BLX: + { + offsetT hbit; + newval = md_chars_to_number (buf, INSN_SIZE); + +#ifdef OBJ_ELF + if (! target_oabi) + value = fixP->fx_offset; +#endif + hbit = (value >> 1) & 1; + value = (value >> 2) & 0x00ffffff; + value = (value + (newval & 0x00ffffff)) & 0x00ffffff; + newval = value | (newval & 0xfe000000) | (hbit << 24); + md_number_to_chars (buf, newval, INSN_SIZE); + } + break; case BFD_RELOC_THUMB_PCREL_BRANCH9: /* conditional branch */ newval = md_chars_to_number (buf, THUMB_SIZE); @@ -5650,6 +5667,7 @@ md_apply_fix3 (fixP, val, seg) md_number_to_chars (buf, newval, THUMB_SIZE); break; + case BFD_RELOC_THUMB_PCREL_BLX: case BFD_RELOC_THUMB_PCREL_BRANCH23: { offsetT newval2; @@ -5956,10 +5974,12 @@ tc_gen_reloc (section, fixp) } case BFD_RELOC_ARM_PCREL_BRANCH: + case BFD_RELOC_ARM_PCREL_BLX: case BFD_RELOC_RVA: case BFD_RELOC_THUMB_PCREL_BRANCH9: case BFD_RELOC_THUMB_PCREL_BRANCH12: case BFD_RELOC_THUMB_PCREL_BRANCH23: + case BFD_RELOC_THUMB_PCREL_BLX: case BFD_RELOC_VTABLE_ENTRY: case BFD_RELOC_VTABLE_INHERIT: code = fixp->fx_r_type; @@ -6172,10 +6192,12 @@ md_assemble (str) keep trying with progressively smaller basic instructions until one matches, or we run out of opcode. */ q = (p - str > LONGEST_INST) ? str + LONGEST_INST : p; + for (; q != str; q--) { c = *q; *q = '\0'; + opcode = (CONST struct asm_opcode *) hash_find (arm_ops_hsh, str); *q = c; @@ -7102,6 +7124,8 @@ arm_force_relocation (fixp) if ( fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY || fixp->fx_r_type == BFD_RELOC_ARM_PCREL_BRANCH + || fixp->fx_r_type == BFD_RELOC_ARM_PCREL_BLX + || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX || fixp->fx_r_type == BFD_RELOC_THUMB_PCREL_BRANCH23) return 1; |