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author | Nick Clifton <nickc@redhat.com> | 2000-07-14 22:28:24 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2000-07-14 22:28:24 +0000 |
commit | d547a75e6b9d1e7ef3fc3c0aa05769c0461d2b19 (patch) | |
tree | 3846a8256d25fd11679dffb39fbd8e7654a2b567 /gas | |
parent | 119d663aa4319972849e0d1d6095b6d06e2368b1 (diff) | |
download | gdb-d547a75e6b9d1e7ef3fc3c0aa05769c0461d2b19.zip gdb-d547a75e6b9d1e7ef3fc3c0aa05769c0461d2b19.tar.gz gdb-d547a75e6b9d1e7ef3fc3c0aa05769c0461d2b19.tar.bz2 |
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Diffstat (limited to 'gas')
-rw-r--r-- | gas/config/tc-mips.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 1333d05..63db064 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -317,7 +317,7 @@ static int mips_trap; by a assembling two single width halves into two single width floating point registers which just happen to alias the double width destination register. On some architectures this aliasing can be disabled by a bit - in the status register, and the settin gof this bit cannot be determined + in the status register, and the setting of this bit cannot be determined automatically at assemble time. */ static int mips_disable_float_construction; |