binutils/

	* doc/binutils.texi (objdump): Document -Mppcps.

gas/
	* config/tc-ppc.c (parse_cpu): Handle "750cl".
	(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
	(md_show_usage): Document -m750cl.
	(md_assemble): Handle two delimiters in succession (eg. `),').
	* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
	* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
	* testsuite/gas/ppc/ppc750ps.s: New file.
	* testsuite/gas/ppc/ppc750ps.d: Likewise.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCPS): New.

opcodes/
	* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
	(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
	(PPCPS): Likewise.
	(powerpc_opcodes): Add all pair singles instructions.
	* ppc-dis.c (powerpc_dialect): Handle "ppcps".
	(print_ppc_disassembler_options): Document -Mppcps.

6 files changed, 184 insertions, 1 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index fe7eb80..a9d2491 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,16 @@
 2007-08-23  Ben Elliston  <bje@au.ibm.com>
 
+	* config/tc-ppc.c (parse_cpu): Handle "750cl".
+	(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
+	(md_show_usage): Document -m750cl.
+	(md_assemble): Handle two delimiters in succession (eg. `),').
+	* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
+	* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
+	* testsuite/gas/ppc/ppc750ps.s: New file.
+	* testsuite/gas/ppc/ppc750ps.d: Likewise.
+
+2007-08-23  Ben Elliston  <bje@au.ibm.com>
+
 	* doc/c-arm.texi (ARM Directives): Move brackets out of @vars.
 
 2007-08-17  Alan Modra  <amodra@bigpond.net.au>
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index f8405fc..868258f 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -396,6 +396,24 @@ static const struct pd_reg pre_defined_registers[] =
 
   { "fpscr", 0 },
 
+  /* Quantization registers used with pair single instructions.  */
+  { "gqr.0", 0 },
+  { "gqr.1", 1 },
+  { "gqr.2", 2 },
+  { "gqr.3", 3 },
+  { "gqr.4", 4 },
+  { "gqr.5", 5 },
+  { "gqr.6", 6 },
+  { "gqr.7", 7 },
+  { "gqr0", 0 },
+  { "gqr1", 1 },
+  { "gqr2", 2 },
+  { "gqr3", 3 },
+  { "gqr4", 4 },
+  { "gqr5", 5 },
+  { "gqr6", 6 },
+  { "gqr7", 7 },
+
   { "lr", 8 },     /* Link Register */
 
   { "pmr", 0 },
@@ -824,6 +842,9 @@ parse_cpu (const char *arg)
 	   || strcmp (arg, "603") == 0
 	   || strcmp (arg, "604") == 0)
     ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
+  /* Do all PPC750s have paired single ops?  */
+  else if (strcmp (arg, "750cl") == 0)
+    ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
   /* -m403 and -m405 mean to assemble for the PowerPC 403/405.  */
   else if (strcmp (arg, "403") == 0
 	   || strcmp (arg, "405") == 0)
@@ -1091,7 +1112,8 @@ PowerPC options:\n\
 -m403, -m405		generate code for PowerPC 403/405\n\
 -m440			generate code for PowerPC 440\n\
 -m7400, -m7410, -m7450, -m7455\n\
-			generate code For PowerPC 7400/7410/7450/7455\n"));
+			generate code for PowerPC 7400/7410/7450/7455\n\
+-m750cl			generate code for PowerPC 750cl\n"));
   fprintf (stream, _("\
 -mppc64, -m620		generate code for PowerPC 620/625/630\n\
 -mppc64bridge		generate code for PowerPC 64, including bridge insns\n\
@@ -2639,6 +2661,14 @@ md_assemble (char *str)
 	{
 	  endc = ')';
 	  need_paren = 0;
+	  /* If expecting more operands, then we want to see "),".  */
+	  if (*str == endc && opindex_ptr[1] != 0)
+	    {
+	      do
+		++str;
+	      while (ISSPACE (*str));
+	      endc = ',';
+	    }
 	}
       else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
 	{
diff --git a/gas/doc/c-ppc.texi b/gas/doc/c-ppc.texi
index a41e1dd..c71ace9 100644
--- a/gas/doc/c-ppc.texi
+++ b/gas/doc/c-ppc.texi
@@ -55,6 +55,9 @@ Generate code for PowerPC 440.  BookE and some 405 instructions.
 @item -m7400, -m7410, -m7450, -m7455
 Generate code for PowerPC 7400/7410/7450/7455.
 
+@item -m750cl
+Generate code for PowerPC 750CL.
+
 @item -mppc64, -m620
 Generate code for PowerPC 620/625/630.
 
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 0e2db22..69d1f4a 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -41,5 +41,6 @@ if { [istarget powerpc*-*-*] } then {
 	run_dump_test "booke"
 	run_dump_test "e500"
 	run_list_test "range" "-a32"
+	run_dump_test "ppc750ps"
     }
 }
diff --git a/gas/testsuite/gas/ppc/ppc750ps.d b/gas/testsuite/gas/ppc/ppc750ps.d
new file mode 100644
index 0000000..b58147f
--- /dev/null
+++ b/gas/testsuite/gas/ppc/ppc750ps.d
@@ -0,0 +1,72 @@
+#as: -m750cl
+#objdump: -dr -Mppcps
+#name: PPC750CL paired single tests
+
+.*: +file format elf(32)?(64)?-powerpc.*
+
+Disassembly of section \.text:
+
+0+0000000 <start>:
+   0:	e0 03 d0 04 	psq_l   f0,4\(r3\),1,5
+   4:	e4 22 30 08 	psq_lu  f1,8\(r2\),0,3
+   8:	10 45 25 4c 	psq_lux f2,r5,r4,1,2
+   c:	10 62 22 8c 	psq_lx  f3,r2,r4,0,5
+  10:	f0 62 30 08 	psq_st  f3,8\(r2\),0,3
+  14:	f4 62 70 08 	psq_stu f3,8\(r2\),0,7
+  18:	10 43 22 ce 	psq_stux f2,r3,r4,0,5
+  1c:	10 c7 46 0e 	psq_stx f6,r7,r8,1,4
+  20:	10 a0 3a 10 	ps_abs  f5,f7
+  24:	10 a0 3a 11 	ps_abs. f5,f7
+  28:	10 22 18 2a 	ps_add  f1,f2,f3
+  2c:	10 22 18 2b 	ps_add. f1,f2,f3
+  30:	11 82 20 40 	ps_cmpo0 cr3,f2,f4
+  34:	11 82 20 c0 	ps_cmpo1 cr3,f2,f4
+  38:	11 82 20 00 	ps_cmpu0 cr3,f2,f4
+  3c:	11 82 20 80 	ps_cmpu1 cr3,f2,f4
+  40:	10 44 30 24 	ps_div  f2,f4,f6
+  44:	10 44 30 25 	ps_div. f2,f4,f6
+  48:	10 01 18 ba 	ps_madd f0,f1,f2,f3
+  4c:	10 01 18 bb 	ps_madd. f0,f1,f2,f3
+  50:	10 22 20 dc 	ps_madds0 f1,f2,f3,f4
+  54:	10 22 20 dd 	ps_madds0. f1,f2,f3,f4
+  58:	10 22 20 de 	ps_madds1 f1,f2,f3,f4
+  5c:	10 22 20 df 	ps_madds1. f1,f2,f3,f4
+  60:	10 44 34 20 	ps_merge00 f2,f4,f6
+  64:	10 44 34 21 	ps_merge00. f2,f4,f6
+  68:	10 44 34 60 	ps_merge01 f2,f4,f6
+  6c:	10 44 34 61 	ps_merge01. f2,f4,f6
+  70:	10 44 34 a0 	ps_merge10 f2,f4,f6
+  74:	10 44 34 a1 	ps_merge10. f2,f4,f6
+  78:	10 44 34 e0 	ps_merge11 f2,f4,f6
+  7c:	10 44 34 e1 	ps_merge11. f2,f4,f6
+  80:	10 60 28 90 	ps_mr   f3,f5
+  84:	10 60 28 91 	ps_mr.  f3,f5
+  88:	10 44 41 b8 	ps_msub f2,f4,f6,f8
+  8c:	10 44 41 b9 	ps_msub. f2,f4,f6,f8
+  90:	10 43 01 72 	ps_mul  f2,f3,f5
+  94:	10 43 01 73 	ps_mul. f2,f3,f5
+  98:	10 64 01 d8 	ps_muls0 f3,f4,f7
+  9c:	10 64 01 d9 	ps_muls0. f3,f4,f7
+  a0:	10 64 01 da 	ps_muls1 f3,f4,f7
+  a4:	10 64 01 db 	ps_muls1. f3,f4,f7
+  a8:	10 20 29 10 	ps_nabs f1,f5
+  ac:	10 20 29 11 	ps_nabs. f1,f5
+  b0:	10 20 28 50 	ps_neg  f1,f5
+  b4:	10 20 28 51 	ps_neg. f1,f5
+  b8:	10 23 39 7e 	ps_nmadd f1,f3,f5,f7
+  bc:	10 23 39 7f 	ps_nmadd. f1,f3,f5,f7
+  c0:	10 23 39 7c 	ps_nmsub f1,f3,f5,f7
+  c4:	10 23 39 7d 	ps_nmsub. f1,f3,f5,f7
+  c8:	11 20 18 30 	ps_res  f9,f3
+  cc:	11 20 18 31 	ps_res. f9,f3
+  d0:	11 20 18 34 	ps_rsqrte f9,f3
+  d4:	11 20 18 35 	ps_rsqrte. f9,f3
+  d8:	10 22 20 ee 	ps_sel  f1,f2,f3,f4
+  dc:	10 22 20 ef 	ps_sel. f1,f2,f3,f4
+  e0:	10 ab 10 28 	ps_sub  f5,f11,f2
+  e4:	10 ab 10 29 	ps_sub. f5,f11,f2
+  e8:	10 45 52 54 	ps_sum0 f2,f5,f9,f10
+  ec:	10 45 52 55 	ps_sum0. f2,f5,f9,f10
+  f0:	10 45 52 56 	ps_sum1 f2,f5,f9,f10
+  f4:	10 45 52 57 	ps_sum1. f2,f5,f9,f10
+  f8:	10 03 2f ec 	dcbz_l  r3,r5
diff --git a/gas/testsuite/gas/ppc/ppc750ps.s b/gas/testsuite/gas/ppc/ppc750ps.s
new file mode 100644
index 0000000..60b674d
--- /dev/null
+++ b/gas/testsuite/gas/ppc/ppc750ps.s
@@ -0,0 +1,66 @@
+# PowerPC 750 paired single precision tests
+	.section ".text"
+start:
+	psq_l	0, 4(3), 1, 5
+	psq_lu	1, 8(2), 0, 3
+	psq_lux	2, 5, 4, 1, 2
+	psq_lx	3, 2, 4, 0, 5
+	psq_st	3, 8(2), 0, 3
+	psq_stu	3, 8(2), 0, 7
+	psq_stux 2, 3, 4, 0, 5
+	psq_stx	6, 7, 8, 1, 4
+	ps_abs	5,7
+	ps_abs.	5,7
+	ps_add	1,2,3
+	ps_add. 1,2,3
+	ps_cmpo0 3,2,4
+	ps_cmpo1 3,2,4
+	ps_cmpu0 3,2,4
+	ps_cmpu1 3,2,4
+	ps_div 2,4,6
+	ps_div. 2,4,6
+	ps_madd 0,1,2,3
+	ps_madd. 0,1,2,3
+	ps_madds0 1,2,3,4
+	ps_madds0. 1,2,3,4
+	ps_madds1 1,2,3,4
+	ps_madds1. 1,2,3,4
+	ps_merge00 2,4,6
+	ps_merge00. 2,4,6
+	ps_merge01 2,4,6
+	ps_merge01. 2,4,6
+	ps_merge10 2,4,6
+	ps_merge10. 2,4,6
+	ps_merge11 2,4,6
+	ps_merge11. 2,4,6
+	ps_mr 3,5
+	ps_mr. 3,5
+	ps_msub 2,4,6,8
+	ps_msub. 2,4,6,8
+	ps_mul 2,3,5
+	ps_mul. 2,3,5
+	ps_muls0 3,4,7
+	ps_muls0. 3,4,7
+	ps_muls1 3,4,7
+	ps_muls1. 3,4,7
+	ps_nabs	1,5
+	ps_nabs. 1,5
+	ps_neg 1,5
+	ps_neg. 1,5
+	ps_nmadd 1,3,5,7
+	ps_nmadd. 1,3,5,7
+	ps_nmsub 1,3,5,7
+	ps_nmsub. 1,3,5,7
+	ps_res 9,3
+	ps_res. 9,3
+	ps_rsqrte 9,3
+	ps_rsqrte. 9,3
+	ps_sel 1,2,3,4
+	ps_sel. 1,2,3,4
+	ps_sub 5,11,2
+	ps_sub. 5,11,2
+	ps_sum0 2,5,9,10
+	ps_sum0. 2,5,9,10
+	ps_sum1 2,5,9,10
+	ps_sum1. 2,5,9,10
+	dcbz_l 3,5