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authorJim Wilson <wilson@tuliptree.org>2000-12-12 22:56:36 +0000
committerJim Wilson <wilson@tuliptree.org>2000-12-12 22:56:36 +0000
commit514829c3af7d26ac20b0f3993f449624d965bb18 (patch)
tree49b43efb38d99cfd20cfba953dcf3bc985a68545 /gas
parent3a71aec8b4c34df68c74c4869c47a109ca7bcfb6 (diff)
downloadgdb-514829c3af7d26ac20b0f3993f449624d965bb18.zip
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Eliminate ia64 compiler warnings. Fix ia64 gas testsuite again.
* elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *. * config/tc-ia64.h (ia64_init): Add prototype. * gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update. * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode argument. * ia64_gen.c (insert_deplist): Cast sizeof result to int. (print_dependency_table): Print NULL if semantics field not set. (insert_opcode_dependencies): Mark cmp parameter as unused. (print_main_table): Use fprintf_vma to print long long fields. (main): Mark argv paramter as unused. Convert to old style definition. * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int. * ia64-asmtab.c: Regnerate.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog4
-rw-r--r--gas/config/tc-ia64.h1
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/ia64/dv-imply.d12
-rw-r--r--gas/testsuite/gas/ia64/dv-mutex.d12
-rw-r--r--gas/testsuite/gas/ia64/dv-safe.d6
-rw-r--r--gas/testsuite/gas/ia64/dv-srlz.d4
-rw-r--r--gas/testsuite/gas/ia64/opc-m.d1728
8 files changed, 891 insertions, 881 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 21901da..2ba9c0e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2000-12-12 Jim Wilson <wilson@redhat.com>
+
+ * config/tc-ia64.h (ia64_init): Add prototype.
+
2000-12-12 H.J. Lu <hjl@gnu.org>
* dwarf2dbg.c: Enabled only if BFD_ASSEMBLER is defined.
diff --git a/gas/config/tc-ia64.h b/gas/config/tc-ia64.h
index 264fe12..73add66 100644
--- a/gas/config/tc-ia64.h
+++ b/gas/config/tc-ia64.h
@@ -39,6 +39,7 @@
md_parse_args. */
#define HOST_SPECIAL_INIT ia64_init
+extern void ia64_init PARAMS ((int, char **));
#define TARGET_FORMAT ia64_target_format()
extern const char *ia64_target_format PARAMS ((void));
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index e47bc4d..213b4d3 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2000-12-12 Jim Wilson <wilson@redhat.com>
+
+ * gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d,
+ gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update.
+
2000-12-12 Nick Clifton <nickc@redhat.com>
* gas/vtable/vtable.exp: Fix formatting.
diff --git a/gas/testsuite/gas/ia64/dv-imply.d b/gas/testsuite/gas/ia64/dv-imply.d
index c8d9bca..d009be07 100644
--- a/gas/testsuite/gas/ia64/dv-imply.d
+++ b/gas/testsuite/gas/ia64/dv-imply.d
@@ -22,18 +22,18 @@ Disassembly of section \.text:
40: 6a 08 06 04 02 78 \[MMI\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2;;
46: 40 10 00 00 42 00 \(p01\) mov r4=2
4c: 00 00 04 00 nop\.i 0x0
- 50: 76 00 1c 00 00 10 \[BBB\] \(p03\) br\.cond\.sptk\.few c0 <L>
- 56: 00 00 00 00 10 00 nop\.b 0x0
- 5c: 00 00 00 20 nop\.b 0x0
+ 50: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 56: 00 00 00 02 80 01 nop\.f 0x0
+ 5c: 70 00 00 40 \(p03\) br\.cond\.sptk\.few c0 <L>
60: 1d 20 1c 00 00 21 \[MFB\] mov r4=7
66: 00 00 00 02 00 00 nop\.f 0x0
6c: 00 00 20 00 rfi;;
70: 62 08 06 04 02 38 \[MII\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
76: 30 28 18 88 e8 80 cmp\.eq\.or p3,p4=r5,r6;;
7c: 20 00 00 84 \(p01\) mov r4=2
- 80: 76 00 10 00 00 10 \[BBB\] \(p03\) br\.cond\.sptk\.few c0 <L>
- 86: 00 00 00 00 10 00 nop\.b 0x0
- 8c: 00 00 00 20 nop\.b 0x0
+ 80: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 86: 00 00 00 02 80 01 nop\.f 0x0
+ 8c: 40 00 00 40 \(p03\) br\.cond\.sptk\.few c0 <L>
90: 1d 20 1c 00 00 21 \[MFB\] mov r4=7
96: 00 00 00 02 00 00 nop\.f 0x0
9c: 00 00 20 00 rfi;;
diff --git a/gas/testsuite/gas/ia64/dv-mutex.d b/gas/testsuite/gas/ia64/dv-mutex.d
index e21a80f..f5663a6 100644
--- a/gas/testsuite/gas/ia64/dv-mutex.d
+++ b/gas/testsuite/gas/ia64/dv-mutex.d
@@ -10,18 +10,18 @@ Disassembly of section \.text:
0: 20 20 08 00 00 a1 \[MII\] \(p01\) mov r4=2
6: 40 28 00 00 c2 81 \(p02\) mov r4=5
c: 70 00 00 84 \(p03\) mov r4=7
- 10: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
- 16: 00 00 00 00 10 00 nop\.b 0x0
+ 10: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 16: 00 00 00 02 00 00 nop\.f 0x0
1c: 00 00 20 00 rfi;;
20: 0a 08 04 04 02 78 \[MMI\] cmp\.eq p1,p2=r1,r2;;
26: 40 10 00 00 42 81 \(p01\) mov r4=2
2c: 40 00 00 84 \(p02\) mov r4=4
- 30: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
- 36: 00 00 00 00 10 00 nop\.b 0x0
+ 30: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 36: 00 00 00 02 00 00 nop\.f 0x0
3c: 00 00 20 00 rfi;;
40: 60 08 06 04 02 78 \[MII\] \(p03\) cmp\.eq\.unc p1,p2=r1,r2
46: 40 10 00 00 42 81 \(p01\) mov r4=2
4c: 40 00 00 84 \(p02\) mov r4=4
- 50: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
- 56: 00 00 00 00 10 00 nop\.b 0x0
+ 50: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 56: 00 00 00 02 00 00 nop\.f 0x0
5c: 00 00 20 00 rfi;;
diff --git a/gas/testsuite/gas/ia64/dv-safe.d b/gas/testsuite/gas/ia64/dv-safe.d
index de0e892..c45ef9b 100644
--- a/gas/testsuite/gas/ia64/dv-safe.d
+++ b/gas/testsuite/gas/ia64/dv-safe.d
@@ -10,9 +10,9 @@ Disassembly of section \.text:
0: 02 08 04 04 02 38 \[MII\] cmp\.eq p1,p2=r1,r2
6: 30 18 10 08 70 00 cmp\.eq p3,p4=r3,r4;;
c: 00 00 04 00 nop\.i 0x0
- 10: 76 08 0c 00 00 14 \[BBB\] \(p03\) br\.call\.sptk\.few b1=40 <L>
- 16: 00 00 00 00 10 00 nop\.b 0x0
- 1c: 00 00 00 20 nop\.b 0x0
+ 10: 1c 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 16: 00 00 00 02 80 21 nop\.f 0x0
+ 1c: 30 00 00 50 \(p03\) br\.call\.sptk\.few b1=40 <L>
20: 20 20 08 00 00 a1 \[MII\] \(p01\) mov r4=2
26: 40 28 00 00 c2 a1 \(p02\) mov r4=5
2c: 00 30 00 84 \(p03\) mov r5=r6
diff --git a/gas/testsuite/gas/ia64/dv-srlz.d b/gas/testsuite/gas/ia64/dv-srlz.d
index 856cfde..31759a1 100644
--- a/gas/testsuite/gas/ia64/dv-srlz.d
+++ b/gas/testsuite/gas/ia64/dv-srlz.d
@@ -19,6 +19,6 @@ Disassembly of section \.text:
30: 17 00 00 00 10 00 \[BBB\] epc
36: 00 00 00 00 10 00 nop\.b 0x0
3c: 00 00 00 20 nop\.b 0x0;;
- 40: 17 00 00 00 00 08 \[BBB\] nop\.b 0x0
- 46: 00 00 00 00 10 00 nop\.b 0x0
+ 40: 1d 00 00 00 01 00 \[MFB\] nop\.m 0x0
+ 46: 00 00 00 02 00 00 nop\.f 0x0
4c: 00 00 20 00 rfi;;
diff --git a/gas/testsuite/gas/ia64/opc-m.d b/gas/testsuite/gas/ia64/opc-m.d
index ad72767..3549b2e 100644
--- a/gas/testsuite/gas/ia64/opc-m.d
+++ b/gas/testsuite/gas/ia64/opc-m.d
@@ -6,1263 +6,1263 @@
Disassembly of section \.text:
0000000000000000 <_start>:
- 0: 0e 20 00 0a 00 10 \[MMF\] ld1 r4=\[r5\]
+ 0: 18 20 00 0a 00 10 \[MMB\] ld1 r4=\[r5\]
6: 40 30 14 00 24 00 ld1 r4=\[r5\],r6
- c: 00 00 04 00 nop\.f 0x0
- 10: 0e 20 00 0a 00 16 \[MMF\] ld1 r4=\[r5\],-256
+ c: 00 00 00 20 nop\.b 0x0
+ 10: 18 20 00 0a 00 16 \[MMB\] ld1 r4=\[r5\],-256
16: 40 00 14 04 20 00 ld1\.nt1 r4=\[r5\]
- 1c: 00 00 04 00 nop\.f 0x0
- 20: 0e 20 18 0a 02 12 \[MMF\] ld1\.nt1 r4=\[r5\],r6
+ 1c: 00 00 00 20 nop\.b 0x0
+ 20: 18 20 18 0a 02 12 \[MMB\] ld1\.nt1 r4=\[r5\],r6
26: 40 68 14 04 2c 00 ld1\.nt1 r4=\[r5\],-243
- 2c: 00 00 04 00 nop\.f 0x0
- 30: 0e 20 00 0a 06 10 \[MMF\] ld1\.nta r4=\[r5\]
+ 2c: 00 00 00 20 nop\.b 0x0
+ 30: 18 20 00 0a 06 10 \[MMB\] ld1\.nta r4=\[r5\]
36: 40 30 14 0c 24 00 ld1\.nta r4=\[r5\],r6
- 3c: 00 00 04 00 nop\.f 0x0
- 40: 0e 20 68 0a 06 16 \[MMF\] ld1\.nta r4=\[r5\],-230
+ 3c: 00 00 00 20 nop\.b 0x0
+ 40: 18 20 68 0a 06 16 \[MMB\] ld1\.nta r4=\[r5\],-230
46: 40 00 14 40 20 00 ld1\.s r4=\[r5\]
- 4c: 00 00 04 00 nop\.f 0x0
- 50: 0e 20 18 0a 20 12 \[MMF\] ld1\.s r4=\[r5\],r6
+ 4c: 00 00 00 20 nop\.b 0x0
+ 50: 18 20 18 0a 20 12 \[MMB\] ld1\.s r4=\[r5\],r6
56: 40 38 15 40 2c 00 ld1\.s r4=\[r5\],-217
- 5c: 00 00 04 00 nop\.f 0x0
- 60: 0e 20 00 0a 22 10 \[MMF\] ld1\.s\.nt1 r4=\[r5\]
+ 5c: 00 00 00 20 nop\.b 0x0
+ 60: 18 20 00 0a 22 10 \[MMB\] ld1\.s\.nt1 r4=\[r5\]
66: 40 30 14 44 24 00 ld1\.s\.nt1 r4=\[r5\],r6
- 6c: 00 00 04 00 nop\.f 0x0
- 70: 0e 20 d0 0a 22 16 \[MMF\] ld1\.s\.nt1 r4=\[r5\],-204
+ 6c: 00 00 00 20 nop\.b 0x0
+ 70: 18 20 d0 0a 22 16 \[MMB\] ld1\.s\.nt1 r4=\[r5\],-204
76: 40 00 14 4c 20 00 ld1\.s\.nta r4=\[r5\]
- 7c: 00 00 04 00 nop\.f 0x0
- 80: 0e 20 18 0a 26 12 \[MMF\] ld1\.s\.nta r4=\[r5\],r6
+ 7c: 00 00 00 20 nop\.b 0x0
+ 80: 18 20 18 0a 26 12 \[MMB\] ld1\.s\.nta r4=\[r5\],r6
86: 40 08 16 4c 2c 00 ld1\.s\.nta r4=\[r5\],-191
- 8c: 00 00 04 00 nop\.f 0x0
- 90: 0e 20 00 0a 40 10 \[MMF\] ld1\.a r4=\[r5\]
+ 8c: 00 00 00 20 nop\.b 0x0
+ 90: 18 20 00 0a 40 10 \[MMB\] ld1\.a r4=\[r5\]
96: 40 30 14 80 24 00 ld1\.a r4=\[r5\],r6
- 9c: 00 00 04 00 nop\.f 0x0
- a0: 0e 20 38 0b 40 16 \[MMF\] ld1\.a r4=\[r5\],-178
+ 9c: 00 00 00 20 nop\.b 0x0
+ a0: 18 20 38 0b 40 16 \[MMB\] ld1\.a r4=\[r5\],-178
a6: 40 00 14 84 20 00 ld1\.a\.nt1 r4=\[r5\]
- ac: 00 00 04 00 nop\.f 0x0
- b0: 0e 20 18 0a 42 12 \[MMF\] ld1\.a\.nt1 r4=\[r5\],r6
+ ac: 00 00 00 20 nop\.b 0x0
+ b0: 18 20 18 0a 42 12 \[MMB\] ld1\.a\.nt1 r4=\[r5\],r6
b6: 40 d8 16 84 2c 00 ld1\.a\.nt1 r4=\[r5\],-165
- bc: 00 00 04 00 nop\.f 0x0
- c0: 0e 20 00 0a 46 10 \[MMF\] ld1\.a\.nta r4=\[r5\]
+ bc: 00 00 00 20 nop\.b 0x0
+ c0: 18 20 00 0a 46 10 \[MMB\] ld1\.a\.nta r4=\[r5\]
c6: 40 30 14 8c 24 00 ld1\.a\.nta r4=\[r5\],r6
- cc: 00 00 04 00 nop\.f 0x0
- d0: 0e 20 a0 0b 46 16 \[MMF\] ld1\.a\.nta r4=\[r5\],-152
+ cc: 00 00 00 20 nop\.b 0x0
+ d0: 18 20 a0 0b 46 16 \[MMB\] ld1\.a\.nta r4=\[r5\],-152
d6: 40 00 14 c0 20 00 ld1\.sa r4=\[r5\]
- dc: 00 00 04 00 nop\.f 0x0
- e0: 0e 20 18 0a 60 12 \[MMF\] ld1\.sa r4=\[r5\],r6
+ dc: 00 00 00 20 nop\.b 0x0
+ e0: 18 20 18 0a 60 12 \[MMB\] ld1\.sa r4=\[r5\],r6
e6: 40 a8 17 c0 2c 00 ld1\.sa r4=\[r5\],-139
- ec: 00 00 04 00 nop\.f 0x0
- f0: 0e 20 00 0a 62 10 \[MMF\] ld1\.sa\.nt1 r4=\[r5\]
+ ec: 00 00 00 20 nop\.b 0x0
+ f0: 18 20 00 0a 62 10 \[MMB\] ld1\.sa\.nt1 r4=\[r5\]
f6: 40 30 14 c4 24 00 ld1\.sa\.nt1 r4=\[r5\],r6
- fc: 00 00 04 00 nop\.f 0x0
- 100: 0e 20 08 0a 63 16 \[MMF\] ld1\.sa\.nt1 r4=\[r5\],-126
+ fc: 00 00 00 20 nop\.b 0x0
+ 100: 18 20 08 0a 63 16 \[MMB\] ld1\.sa\.nt1 r4=\[r5\],-126
106: 40 00 14 cc 20 00 ld1\.sa\.nta r4=\[r5\]
- 10c: 00 00 04 00 nop\.f 0x0
- 110: 0e 20 18 0a 66 12 \[MMF\] ld1\.sa\.nta r4=\[r5\],r6
+ 10c: 00 00 00 20 nop\.b 0x0
+ 110: 18 20 18 0a 66 12 \[MMB\] ld1\.sa\.nta r4=\[r5\],r6
116: 40 78 14 ce 2c 00 ld1\.sa\.nta r4=\[r5\],-113
- 11c: 00 00 04 00 nop\.f 0x0
- 120: 0e 20 00 0a 00 11 \[MMF\] ld1\.c\.clr r4=\[r5\]
+ 11c: 00 00 00 20 nop\.b 0x0
+ 120: 18 20 00 0a 00 11 \[MMB\] ld1\.c\.clr r4=\[r5\]
126: 40 30 14 00 26 00 ld1\.c\.clr r4=\[r5\],r6
- 12c: 00 00 04 00 nop\.f 0x0
- 130: 0e 20 70 0a 01 17 \[MMF\] ld1\.c\.clr r4=\[r5\],-100
+ 12c: 00 00 00 20 nop\.b 0x0
+ 130: 18 20 70 0a 01 17 \[MMB\] ld1\.c\.clr r4=\[r5\],-100
136: 40 00 14 04 22 00 ld1\.c\.clr\.nt1 r4=\[r5\]
- 13c: 00 00 04 00 nop\.f 0x0
- 140: 0e 20 18 0a 02 13 \[MMF\] ld1\.c\.clr\.nt1 r4=\[r5\],r6
+ 13c: 00 00 00 20 nop\.b 0x0
+ 140: 18 20 18 0a 02 13 \[MMB\] ld1\.c\.clr\.nt1 r4=\[r5\],r6
146: 40 48 15 06 2e 00 ld1\.c\.clr\.nt1 r4=\[r5\],-87
- 14c: 00 00 04 00 nop\.f 0x0
- 150: 0e 20 00 0a 06 11 \[MMF\] ld1\.c\.clr\.nta r4=\[r5\]
+ 14c: 00 00 00 20 nop\.b 0x0
+ 150: 18 20 00 0a 06 11 \[MMB\] ld1\.c\.clr\.nta r4=\[r5\]
156: 40 30 14 0c 26 00 ld1\.c\.clr\.nta r4=\[r5\],r6
- 15c: 00 00 04 00 nop\.f 0x0
- 160: 0e 20 d8 0a 07 17 \[MMF\] ld1\.c\.clr\.nta r4=\[r5\],-74
+ 15c: 00 00 00 20 nop\.b 0x0
+ 160: 18 20 d8 0a 07 17 \[MMB\] ld1\.c\.clr\.nta r4=\[r5\],-74
166: 40 00 14 40 22 00 ld1\.c\.nc r4=\[r5\]
- 16c: 00 00 04 00 nop\.f 0x0
- 170: 0e 20 18 0a 20 13 \[MMF\] ld1\.c\.nc r4=\[r5\],r6
+ 16c: 00 00 00 20 nop\.b 0x0
+ 170: 18 20 18 0a 20 13 \[MMB\] ld1\.c\.nc r4=\[r5\],r6
176: 40 18 16 42 2e 00 ld1\.c\.nc r4=\[r5\],-61
- 17c: 00 00 04 00 nop\.f 0x0
- 180: 0e 20 00 0a 22 11 \[MMF\] ld1\.c\.nc\.nt1 r4=\[r5\]
+ 17c: 00 00 00 20 nop\.b 0x0
+ 180: 18 20 00 0a 22 11 \[MMB\] ld1\.c\.nc\.nt1 r4=\[r5\]
186: 40 30 14 44 26 00 ld1\.c\.nc\.nt1 r4=\[r5\],r6
- 18c: 00 00 04 00 nop\.f 0x0
- 190: 0e 20 40 0b 23 17 \[MMF\] ld1\.c\.nc\.nt1 r4=\[r5\],-48
+ 18c: 00 00 00 20 nop\.b 0x0
+ 190: 18 20 40 0b 23 17 \[MMB\] ld1\.c\.nc\.nt1 r4=\[r5\],-48
196: 40 00 14 4c 22 00 ld1\.c\.nc\.nta r4=\[r5\]
- 19c: 00 00 04 00 nop\.f 0x0
- 1a0: 0e 20 18 0a 26 13 \[MMF\] ld1\.c\.nc\.nta r4=\[r5\],r6
+ 19c: 00 00 00 20 nop\.b 0x0
+ 1a0: 18 20 18 0a 26 13 \[MMB\] ld1\.c\.nc\.nta r4=\[r5\],r6
1a6: 40 e8 16 4e 2e 00 ld1\.c\.nc\.nta r4=\[r5\],-35
- 1ac: 00 00 04 00 nop\.f 0x0
- 1b0: 0e 20 00 0a 80 10 \[MMF\] ld1\.bias r4=\[r5\]
+ 1ac: 00 00 00 20 nop\.b 0x0
+ 1b0: 18 20 00 0a 80 10 \[MMB\] ld1\.bias r4=\[r5\]
1b6: 40 30 14 00 25 00 ld1\.bias r4=\[r5\],r6
- 1bc: 00 00 04 00 nop\.f 0x0
- 1c0: 0e 20 a8 0b 81 16 \[MMF\] ld1\.bias r4=\[r5\],-22
+ 1bc: 00 00 00 20 nop\.b 0x0
+ 1c0: 18 20 a8 0b 81 16 \[MMB\] ld1\.bias r4=\[r5\],-22
1c6: 40 00 14 04 21 00 ld1\.bias\.nt1 r4=\[r5\]
- 1cc: 00 00 04 00 nop\.f 0x0
- 1d0: 0e 20 18 0a 82 12 \[MMF\] ld1\.bias\.nt1 r4=\[r5\],r6
+ 1cc: 00 00 00 20 nop\.b 0x0
+ 1d0: 18 20 18 0a 82 12 \[MMB\] ld1\.bias\.nt1 r4=\[r5\],r6
1d6: 40 b8 17 06 2d 00 ld1\.bias\.nt1 r4=\[r5\],-9
- 1dc: 00 00 04 00 nop\.f 0x0
- 1e0: 0e 20 00 0a 86 10 \[MMF\] ld1\.bias\.nta r4=\[r5\]
+ 1dc: 00 00 00 20 nop\.b 0x0
+ 1e0: 18 20 00 0a 86 10 \[MMB\] ld1\.bias\.nta r4=\[r5\]
1e6: 40 30 14 0c 25 00 ld1\.bias\.nta r4=\[r5\],r6
- 1ec: 00 00 04 00 nop\.f 0x0
- 1f0: 0e 20 10 0a 86 14 \[MMF\] ld1\.bias\.nta r4=\[r5\],4
+ 1ec: 00 00 00 20 nop\.b 0x0
+ 1f0: 18 20 10 0a 86 14 \[MMB\] ld1\.bias\.nta r4=\[r5\],4
1f6: 40 00 14 40 21 00 ld1\.acq r4=\[r5\]
- 1fc: 00 00 04 00 nop\.f 0x0
- 200: 0e 20 18 0a a0 12 \[MMF\] ld1\.acq r4=\[r5\],r6
+ 1fc: 00 00 00 20 nop\.b 0x0
+ 200: 18 20 18 0a a0 12 \[MMB\] ld1\.acq r4=\[r5\],r6
206: 40 88 14 40 29 00 ld1\.acq r4=\[r5\],17
- 20c: 00 00 04 00 nop\.f 0x0
- 210: 0e 20 00 0a a2 10 \[MMF\] ld1\.acq\.nt1 r4=\[r5\]
+ 20c: 00 00 00 20 nop\.b 0x0
+ 210: 18 20 00 0a a2 10 \[MMB\] ld1\.acq\.nt1 r4=\[r5\]
216: 40 30 14 44 25 00 ld1\.acq\.nt1 r4=\[r5\],r6
- 21c: 00 00 04 00 nop\.f 0x0
- 220: 0e 20 78 0a a2 14 \[MMF\] ld1\.acq\.nt1 r4=\[r5\],30
+ 21c: 00 00 00 20 nop\.b 0x0
+ 220: 18 20 78 0a a2 14 \[MMB\] ld1\.acq\.nt1 r4=\[r5\],30
226: 40 00 14 4c 21 00 ld1\.acq\.nta r4=\[r5\]
- 22c: 00 00 04 00 nop\.f 0x0
- 230: 0e 20 18 0a a6 12 \[MMF\] ld1\.acq\.nta r4=\[r5\],r6
+ 22c: 00 00 00 20 nop\.b 0x0
+ 230: 18 20 18 0a a6 12 \[MMB\] ld1\.acq\.nta r4=\[r5\],r6
236: 40 58 15 4c 29 00 ld1\.acq\.nta r4=\[r5\],43
- 23c: 00 00 04 00 nop\.f 0x0
- 240: 0e 20 00 0a 40 11 \[MMF\] ld1\.c\.clr\.acq r4=\[r5\]
+ 23c: 00 00 00 20 nop\.b 0x0
+ 240: 18 20 00 0a 40 11 \[MMB\] ld1\.c\.clr\.acq r4=\[r5\]
246: 40 30 14 80 26 00 ld1\.c\.clr\.acq r4=\[r5\],r6
- 24c: 00 00 04 00 nop\.f 0x0
- 250: 0e 20 e0 0a 40 15 \[MMF\] ld1\.c\.clr\.acq r4=\[r5\],56
+ 24c: 00 00 00 20 nop\.b 0x0
+ 250: 18 20 e0 0a 40 15 \[MMB\] ld1\.c\.clr\.acq r4=\[r5\],56
256: 40 00 14 84 22 00 ld1\.c\.clr\.acq\.nt1 r4=\[r5\]
- 25c: 00 00 04 00 nop\.f 0x0
- 260: 0e 20 18 0a 42 13 \[MMF\] ld1\.c\.clr\.acq\.nt1 r4=\[r5\],r6
+ 25c: 00 00 00 20 nop\.b 0x0
+ 260: 18 20 18 0a 42 13 \[MMB\] ld1\.c\.clr\.acq\.nt1 r4=\[r5\],r6
266: 40 28 16 84 2a 00 ld1\.c\.clr\.acq\.nt1 r4=\[r5\],69
- 26c: 00 00 04 00 nop\.f 0x0
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426: 40 30 14 5c 26 00 ld2\.c\.nc\.nta r4=\[r5\],r6
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456: 40 30 14 14 25 00 ld2\.bias\.nt1 r4=\[r5\],r6
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466: 40 00 14 1c 21 00 ld2\.bias\.nta r4=\[r5\]
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486: 40 30 14 50 25 00 ld2\.acq r4=\[r5\],r6
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496: 40 00 14 54 21 00 ld2\.acq\.nt1 r4=\[r5\]
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526: 40 00 14 24 20 00 ld4\.nt1 r4=\[r5\]
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536: 40 58 16 26 2c 00 ld4\.nt1 r4=\[r5\],-53
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556: 40 00 14 60 20 00 ld4\.s r4=\[r5\]
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576: 40 30 14 64 24 00 ld4\.s\.nt1 r4=\[r5\],r6
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586: 40 00 14 6c 20 00 ld4\.s\.nta r4=\[r5\]
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596: 40 f8 17 6e 2c 00 ld4\.s\.nta r4=\[r5\],-1
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5a6: 40 30 14 a0 24 00 ld4\.a r4=\[r5\],r6
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5b6: 40 00 14 a4 20 00 ld4\.a\.nt1 r4=\[r5\]
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5c6: 40 c8 14 a4 28 00 ld4\.a\.nt1 r4=\[r5\],25
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5e6: 40 00 14 e0 20 00 ld4\.sa r4=\[r5\]
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5f6: 40 98 15 e0 28 00 ld4\.sa r4=\[r5\],51
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606: 40 30 14 e4 24 00 ld4\.sa\.nt1 r4=\[r5\],r6
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616: 40 00 14 ec 20 00 ld4\.sa\.nta r4=\[r5\]
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626: 40 68 16 ec 28 00 ld4\.sa\.nta r4=\[r5\],77
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636: 40 30 14 20 26 00 ld4\.c\.clr r4=\[r5\],r6
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646: 40 00 14 24 22 00 ld4\.c\.clr\.nt1 r4=\[r5\]
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656: 40 38 17 24 2a 00 ld4\.c\.clr\.nt1 r4=\[r5\],103
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666: 40 30 14 2c 26 00 ld4\.c\.clr\.nta r4=\[r5\],r6
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+ 1a10: 18 00 00 00 22 00 \[MMB\] mf
1a16: 00 00 00 46 00 00 mf\.a
- 1a1c: 00 00 04 00 nop\.f 0x0
- 1a20: 0e 00 00 00 30 00 \[MMF\] srlz\.d
+ 1a1c: 00 00 00 20 nop\.b 0x0
+ 1a20: 18 00 00 00 30 00 \[MMB\] srlz\.d
1a26: 00 00 00 62 00 00 srlz\.i
- 1a2c: 00 00 04 00 nop\.f 0x0
+ 1a2c: 00 00 00 20 nop\.b 0x0
1a30: 09 00 00 00 33 00 \[MMI\] sync\.i
1a36: 00 00 00 02 00 00 nop\.m 0x0
1a3c: 00 00 04 00 nop\.i 0x0;;
@@ -1275,54 +1275,54 @@ Disassembly of section \.text:
1a60: 00 00 00 00 0a 00 \[MII\] loadrs
1a66: 00 00 00 02 00 00 nop\.i 0x0
1a6c: 00 00 04 00 nop\.i 0x0
- 1a70: 0e 20 00 00 12 00 \[MMF\] invala\.e r4
+ 1a70: 18 20 00 00 12 00 \[MMB\] invala\.e r4
1a76: 40 00 00 26 00 00 invala\.e f4
- 1a7c: 00 00 04 00 nop\.f 0x0
- 1a80: 0e 00 00 08 30 04 \[MMF\] fc r4
+ 1a7c: 00 00 00 20 nop\.b 0x0
+ 1a80: 18 00 00 08 30 04 \[MMB\] fc r4
1a86: 00 00 10 68 08 00 ptc\.e r4
- 1a8c: 00 00 04 00 nop\.f 0x0
- 1a90: 0e 00 00 00 00 00 \[MMF\] break\.m 0x0
+ 1a8c: 00 00 00 20 nop\.b 0x0
+ 1a90: 18 00 00 00 00 00 \[MMB\] break\.m 0x0
1a96: f0 ff 1f 00 00 00 break\.m 0x1ffff
- 1a9c: 00 00 04 00 nop\.f 0x0
- 1aa0: 0e 00 00 00 01 00 \[MMF\] nop\.m 0x0
+ 1a9c: 00 00 00 20 nop\.b 0x0
+ 1aa0: 18 00 00 00 01 00 \[MMB\] nop\.m 0x0
1aa6: f0 ff 1f 00 00 00 break\.m 0x1ffff
- 1aac: 00 00 04 00 nop\.f 0x0
- 1ab0: 0e 20 18 0a 38 04 \[MMF\] probe\.r r4=r5,r6
+ 1aac: 00 00 00 20 nop\.b 0x0
+ 1ab0: 18 20 18 0a 38 04 \[MMB\] probe\.r r4=r5,r6
1ab6: 40 30 14 72 08 00 probe\.w r4=r5,r6
- 1abc: 00 00 04 00 nop\.f 0x0
- 1ac0: 0e 20 00 0a 18 04 \[MMF\] probe\.r r4=r5,0
+ 1abc: 00 00 00 20 nop\.b 0x0
+ 1ac0: 18 20 00 0a 18 04 \[MMB\] probe\.r r4=r5,0
1ac6: 40 08 14 32 08 00 probe\.w r4=r5,1
- 1acc: 00 00 04 00 nop\.f 0x0
- 1ad0: 0e 00 08 06 32 04 \[MMF\] probe\.r\.fault r3,2
+ 1acc: 00 00 00 20 nop\.b 0x0
+ 1ad0: 18 00 08 06 32 04 \[MMB\] probe\.r\.fault r3,2
1ad6: 00 18 0c 66 08 00 probe\.w\.fault r3,3
- 1adc: 00 00 04 00 nop\.f 0x0
- 1ae0: 0e 00 00 06 31 04 \[MMF\] probe\.rw\.fault r3,0
+ 1adc: 00 00 00 20 nop\.b 0x0
+ 1ae0: 18 00 00 06 31 04 \[MMB\] probe\.rw\.fault r3,0
1ae6: 00 00 00 02 00 00 nop\.m 0x0
- 1aec: 00 00 04 00 nop\.f 0x0
+ 1aec: 00 00 00 20 nop\.b 0x0
1af0: 0b 00 20 00 2e 04 \[MMI\] itc\.d r8;;
1af6: 00 00 00 02 00 00 nop\.m 0x0
1afc: 00 00 04 00 nop\.i 0x0;;
1b00: 0a 00 24 00 2f 04 \[MMI\] itc\.i r9;;
1b06: 40 23 01 08 00 00 sum 0x1234
1b0c: 00 00 04 00 nop\.i 0x0
- 1b10: 0e 50 55 d5 25 00 \[MMF\] rum 0x5aaaaa
+ 1b10: 18 50 55 d5 25 00 \[MMB\] rum 0x5aaaaa
1b16: f0 ff ff 6d 04 00 ssm 0xffffff
- 1b1c: 00 00 04 00 nop\.f 0x0
- 1b20: 0e 00 00 00 27 00 \[MMF\] rsm 0x400000
+ 1b1c: 00 00 00 20 nop\.b 0x0
+ 1b20: 18 00 00 00 27 00 \[MMB\] rsm 0x400000
1b26: 00 28 10 12 08 00 ptc\.l r4,r5
- 1b2c: 00 00 04 00 nop\.f 0x0
+ 1b2c: 00 00 00 20 nop\.b 0x0
1b30: 0a 00 14 08 0a 04 \[MMI\] ptc\.g r4,r5;;
1b36: 00 00 00 02 00 00 nop\.m 0x0
1b3c: 00 00 04 00 nop\.i 0x0
1b40: 0a 00 14 08 0b 04 \[MMI\] ptc\.ga r4,r5;;
1b46: 00 00 00 02 00 00 nop\.m 0x0
1b4c: 00 00 04 00 nop\.i 0x0
- 1b50: 0e 00 14 08 0c 04 \[MMF\] ptr\.d r4,r5
+ 1b50: 18 00 14 08 0c 04 \[MMB\] ptr\.d r4,r5
1b56: 00 28 10 1a 08 00 ptr\.i r4,r5
- 1b5c: 00 00 04 00 nop\.f 0x0
- 1b60: 0e 20 00 0a 1a 04 \[MMF\] thash r4=r5
+ 1b5c: 00 00 00 20 nop\.b 0x0
+ 1b60: 18 20 00 0a 1a 04 \[MMB\] thash r4=r5
1b66: 40 00 14 36 08 00 ttag r4=r5
- 1b6c: 00 00 04 00 nop\.f 0x0
- 1b70: 0f 20 00 0a 1e 04 \[MMF\] tpa r4=r5
+ 1b6c: 00 00 00 20 nop\.b 0x0
+ 1b70: 19 20 00 0a 1e 04 \[MMB\] tpa r4=r5
1b76: 40 00 14 3e 08 00 tak r4=r5
- 1b7c: 00 00 04 00 nop\.f 0x0;;
+ 1b7c: 00 00 00 20 nop\.b 0x0;;