diff options
author | Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> | 2014-10-31 13:48:04 -0700 |
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committer | Andrew Pinski <apinski@cavium.com> | 2014-10-31 13:50:10 -0700 |
commit | 2c62985659da21a3fe16062d211a7158f79ad2e9 (patch) | |
tree | a0bf9d9f8326d5a0729e286c907599c2cff4d75a /gas | |
parent | 222016651396c7baea9ff3f96003bd53bbc11ab0 (diff) | |
download | gdb-2c62985659da21a3fe16062d211a7158f79ad2e9.zip gdb-2c62985659da21a3fe16062d211a7158f79ad2e9.tar.gz gdb-2c62985659da21a3fe16062d211a7158f79ad2e9.tar.bz2 |
MIPS: Add Octeon 3 support
binutils:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* readelf.c (print_mips_isa_ext): Print the value of Octeon3.
gas:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3.
(mips_cpu_info_table): Octeon3 enables virt ase.
* doc/c-mips.texi: Document octeon3 as an acceptable value for
-march=.
gas/testsuite:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* gas/mips/mips.exp: Add support for Octeon3 architecture.
Also add in support for running Octeon3 tests.
* gas/mips/octeon3.d: New test.
* gas/mips/octeon3.s: New test source.
opcodes:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add octeon3.
* mips-opc.c (IOCT): Include INSN_OCTEON3.
(IOCT2): Likewise.
(IOCT3): New define.
(IVIRT): New define.
(mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0,
tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti
IVIRT instructions.
Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another
operand for IOCT3.
bfd:
2014-10-31 Andrew Pinski <apinski@cavium.com>
Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
* archures.c: Add octeon3 for mips target.
* bfd-in2.h: Regenerate.
* bfd/cpu-mips.c: Define I_mipsocteon3.
nfo_struct): Add octeon3 support.
* bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for
octeon3.
(mips_set_isa_flags): Add support for octeon3.
(bfd_mips_isa_ext): Add bfd_mach_mips_octeon3.
(mips_mach_extensions): Make bfd_mach_mips_octeon3 an
extension of bfd_mach_mips_octeon2.
(print_mips_isa_ext): Print the value of Octeon3.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 8 | ||||
-rw-r--r-- | gas/config/tc-mips.c | 4 | ||||
-rw-r--r-- | gas/doc/c-mips.texi | 1 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/octeon3.d | 20 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/octeon3.s | 22 |
7 files changed, 66 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 183232f..a1a4224 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2014-10-31 Andrew Pinski <apinski@cavium.com> + Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3. + (mips_cpu_info_table): Octeon3 enables virt ase. + * doc/c-mips.texi: Document octeon3 as an acceptable value for + -march=. + 2014-10-30 Dr Philipp Tomsich <philipp.tomsich@theobroma-systems.com> * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 54442f4..355a566 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -510,7 +510,8 @@ static int mips_32bitmode = 0; #define CPU_HAS_ROR(CPU) CPU_HAS_DROR (CPU) /* True if CPU is in the Octeon family */ -#define CPU_IS_OCTEON(CPU) ((CPU) == CPU_OCTEON || (CPU) == CPU_OCTEONP || (CPU) == CPU_OCTEON2) +#define CPU_IS_OCTEON(CPU) ((CPU) == CPU_OCTEON || (CPU) == CPU_OCTEONP \ + || (CPU) == CPU_OCTEON2 || (CPU) == CPU_OCTEON3) /* True if CPU has seq/sne and seqi/snei instructions. */ #define CPU_HAS_SEQ(CPU) (CPU_IS_OCTEON (CPU)) @@ -18663,6 +18664,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "octeon", 0, 0, ISA_MIPS64R2, CPU_OCTEON }, { "octeon+", 0, 0, ISA_MIPS64R2, CPU_OCTEONP }, { "octeon2", 0, 0, ISA_MIPS64R2, CPU_OCTEON2 }, + { "octeon3", 0, ASE_VIRT | ASE_VIRT64, ISA_MIPS64R5, CPU_OCTEON3 }, /* RMI Xlr */ { "xlr", 0, 0, ISA_MIPS64, CPU_XLR }, diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index d960022..899e6e2 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -382,6 +382,7 @@ loongson3a, octeon, octeon+, octeon2, +octeon3, xlr, xlp @end quotation diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 4988b00..1b41cc4 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2014-10-31 Andrew Pinski <apinski@cavium.com> + Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> + + * gas/mips/mips.exp: Add support for Octeon3 architecture. + Also add in support for running Octeon3 tests. + * gas/mips/octeon3.d: New test. + * gas/mips/octeon3.s: New test source. + 2014-10-21 Maciej W. Rozycki <macro@codesourcery.com> * gas/mips/insn-opts.d: New test. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 5750b75..855e2cd 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -495,6 +495,9 @@ mips_arch_create octeonp 64 octeon { oddspreg } \ mips_arch_create octeon2 64 octeonp { oddspreg } \ { -march=octeon2 -mtune=octeon2 } { -mmips:octeon2 } \ { } +mips_arch_create octeon3 64 octeon2 { oddspreg } \ + { -march=octeon3 -mtune=octeon3 } { -mmips:octeon3 } \ + { } mips_arch_create xlr 64 mips64 { oddspreg } \ { -march=xlr -mtune=xlr } { -mmips:xlr } mips_arch_create r5900 64 mips3 { gpr_ilocks singlefloat nollsc } \ @@ -1100,6 +1103,7 @@ if { [istarget mips*-*-vxworks*] } { run_list_test_arches "octeon-ill" [mips_arch_list_matching octeon] run_dump_test_arches "octeon-pref" [mips_arch_list_matching octeon] run_dump_test_arches "octeon2" [mips_arch_list_matching octeon2] + run_dump_test_arches "octeon3" [mips_arch_list_matching octeon3] run_dump_test "smartmips" run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32r2 \ diff --git a/gas/testsuite/gas/mips/octeon3.d b/gas/testsuite/gas/mips/octeon3.d new file mode 100644 index 0000000..0e0b508 --- /dev/null +++ b/gas/testsuite/gas/mips/octeon3.d @@ -0,0 +1,20 @@ +#objdump: -d -r --show-raw-insn +#name: MIPS octeon3 instructions + +.*: +file format .*mips.* + +Disassembly of section .text: + +[0-9a-f]+ <foo>: +.*: 71ec0008 mtm0 t3,t0 +.*: 71a40008 mtm0 t1,a0 +.*: 7083000c mtm1 a0,v1 +.*: 70e1000c mtm1 a3,at +.*: 7022000d mtm2 at,v0 +.*: 7083000c mtm1 a0,v1 +.*: 70a20009 mtp0 a1,v0 +.*: 70c40009 mtp0 a2,a0 +.*: 7083000a mtp1 a0,v1 +.*: 70e1000a mtp1 a3,at +.*: 7022000b mtp2 at,v0 +.*: 7083000a mtp1 a0,v1 diff --git a/gas/testsuite/gas/mips/octeon3.s b/gas/testsuite/gas/mips/octeon3.s new file mode 100644 index 0000000..f28425c --- /dev/null +++ b/gas/testsuite/gas/mips/octeon3.s @@ -0,0 +1,22 @@ + .text + .set noreorder + .set noat + +foo: + mtm0 $15,$12 + mtm0 $13,$4 + + mtm1 $4,$3 + mtm1 $7,$1 + + mtm2 $1,$2 + mtm1 $4,$3 + + mtp0 $5,$2 + mtp0 $6,$4 + + mtp1 $4,$3 + mtp1 $7,$1 + + mtp2 $1,$2 + mtp1 $4,$3 |